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Commit 005b5e4d0c7795d2ec298c34c96cbe2c1e1902b0

Authored by Uli Luckas
Committed by Russell King
1 parent 8b76a68c6c
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[ARM] 3624/1: Report true modem control line states 

Patch from Uli Luckas

This patch removes the fake return from serial_pxa_get_mctrl.

Signed-off-by: Uli Luckas <u.luckas@road-gmbh.de>
I just can't remember why this return was there.
Being in the first column clearly indicates it was meant to be removed.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Showing 1 changed file with 0 additions and 1 deletions Inline Diff

drivers/serial/pxa.c
Diff comments   View file @ 005b5e4
1 /* 1 /*
2 * linux/drivers/serial/pxa.c 2 * linux/drivers/serial/pxa.c
3 * 3 *
4 * Based on drivers/serial/8250.c by Russell King. 4 * Based on drivers/serial/8250.c by Russell King.
5 * 5 *
6 * Author: Nicolas Pitre 6 * Author: Nicolas Pitre
7 * Created: Feb 20, 2003 7 * Created: Feb 20, 2003
8 * Copyright: (C) 2003 Monta Vista Software, Inc. 8 * Copyright: (C) 2003 Monta Vista Software, Inc.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or 12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version. 13 * (at your option) any later version.
14 * 14 *
15 * Note 1: This driver is made separate from the already too overloaded 15 * Note 1: This driver is made separate from the already too overloaded
16 * 8250.c because it needs some kirks of its own and that'll make it 16 * 8250.c because it needs some kirks of its own and that'll make it
17 * easier to add DMA support. 17 * easier to add DMA support.
18 * 18 *
19 * Note 2: I'm too sick of device allocation policies for serial ports. 19 * Note 2: I'm too sick of device allocation policies for serial ports.
20 * If someone else wants to request an "official" allocation of major/minor 20 * If someone else wants to request an "official" allocation of major/minor
21 * for this driver please be my guest. And don't forget that new hardware 21 * for this driver please be my guest. And don't forget that new hardware
22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's 22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
23 * hope for a better port registration and dynamic device allocation scheme 23 * hope for a better port registration and dynamic device allocation scheme
24 * with the serial core maintainer satisfaction to appear soon. 24 * with the serial core maintainer satisfaction to appear soon.
25 */ 25 */
26 26
27 #include <linux/config.h> 27 #include <linux/config.h>
28 28
29 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 29 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
30 #define SUPPORT_SYSRQ 30 #define SUPPORT_SYSRQ
31 #endif 31 #endif
32 32
33 #include <linux/module.h> 33 #include <linux/module.h>
34 #include <linux/ioport.h> 34 #include <linux/ioport.h>
35 #include <linux/init.h> 35 #include <linux/init.h>
36 #include <linux/console.h> 36 #include <linux/console.h>
37 #include <linux/sysrq.h> 37 #include <linux/sysrq.h>
38 #include <linux/serial_reg.h> 38 #include <linux/serial_reg.h>
39 #include <linux/circ_buf.h> 39 #include <linux/circ_buf.h>
40 #include <linux/delay.h> 40 #include <linux/delay.h>
41 #include <linux/interrupt.h> 41 #include <linux/interrupt.h>
42 #include <linux/platform_device.h> 42 #include <linux/platform_device.h>
43 #include <linux/tty.h> 43 #include <linux/tty.h>
44 #include <linux/tty_flip.h> 44 #include <linux/tty_flip.h>
45 #include <linux/serial_core.h> 45 #include <linux/serial_core.h>
46 46
47 #include <asm/io.h> 47 #include <asm/io.h>
48 #include <asm/hardware.h> 48 #include <asm/hardware.h>
49 #include <asm/irq.h> 49 #include <asm/irq.h>
50 #include <asm/arch/pxa-regs.h> 50 #include <asm/arch/pxa-regs.h>
51 51
52 52
53 struct uart_pxa_port { 53 struct uart_pxa_port {
54 struct uart_port port; 54 struct uart_port port;
55 unsigned char ier; 55 unsigned char ier;
56 unsigned char lcr; 56 unsigned char lcr;
57 unsigned char mcr; 57 unsigned char mcr;
58 unsigned int lsr_break_flag; 58 unsigned int lsr_break_flag;
59 unsigned int cken; 59 unsigned int cken;
60 char *name; 60 char *name;
61 }; 61 };
62 62
63 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset) 63 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
64 { 64 {
65 offset <<= 2; 65 offset <<= 2;
66 return readl(up->port.membase + offset); 66 return readl(up->port.membase + offset);
67 } 67 }
68 68
69 static inline void serial_out(struct uart_pxa_port *up, int offset, int value) 69 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
70 { 70 {
71 offset <<= 2; 71 offset <<= 2;
72 writel(value, up->port.membase + offset); 72 writel(value, up->port.membase + offset);
73 } 73 }
74 74
75 static void serial_pxa_enable_ms(struct uart_port *port) 75 static void serial_pxa_enable_ms(struct uart_port *port)
76 { 76 {
77 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 77 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
78 78
79 up->ier |= UART_IER_MSI; 79 up->ier |= UART_IER_MSI;
80 serial_out(up, UART_IER, up->ier); 80 serial_out(up, UART_IER, up->ier);
81 } 81 }
82 82
83 static void serial_pxa_stop_tx(struct uart_port *port) 83 static void serial_pxa_stop_tx(struct uart_port *port)
84 { 84 {
85 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 85 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
86 86
87 if (up->ier & UART_IER_THRI) { 87 if (up->ier & UART_IER_THRI) {
88 up->ier &= ~UART_IER_THRI; 88 up->ier &= ~UART_IER_THRI;
89 serial_out(up, UART_IER, up->ier); 89 serial_out(up, UART_IER, up->ier);
90 } 90 }
91 } 91 }
92 92
93 static void serial_pxa_stop_rx(struct uart_port *port) 93 static void serial_pxa_stop_rx(struct uart_port *port)
94 { 94 {
95 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 95 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
96 96
97 up->ier &= ~UART_IER_RLSI; 97 up->ier &= ~UART_IER_RLSI;
98 up->port.read_status_mask &= ~UART_LSR_DR; 98 up->port.read_status_mask &= ~UART_LSR_DR;
99 serial_out(up, UART_IER, up->ier); 99 serial_out(up, UART_IER, up->ier);
100 } 100 }
101 101
102 static inline void 102 static inline void
103 receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs) 103 receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
104 { 104 {
105 struct tty_struct *tty = up->port.info->tty; 105 struct tty_struct *tty = up->port.info->tty;
106 unsigned int ch, flag; 106 unsigned int ch, flag;
107 int max_count = 256; 107 int max_count = 256;
108 108
109 do { 109 do {
110 ch = serial_in(up, UART_RX); 110 ch = serial_in(up, UART_RX);
111 flag = TTY_NORMAL; 111 flag = TTY_NORMAL;
112 up->port.icount.rx++; 112 up->port.icount.rx++;
113 113
114 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE | 114 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
115 UART_LSR_FE | UART_LSR_OE))) { 115 UART_LSR_FE | UART_LSR_OE))) {
116 /* 116 /*
117 * For statistics only 117 * For statistics only
118 */ 118 */
119 if (*status & UART_LSR_BI) { 119 if (*status & UART_LSR_BI) {
120 *status &= ~(UART_LSR_FE | UART_LSR_PE); 120 *status &= ~(UART_LSR_FE | UART_LSR_PE);
121 up->port.icount.brk++; 121 up->port.icount.brk++;
122 /* 122 /*
123 * We do the SysRQ and SAK checking 123 * We do the SysRQ and SAK checking
124 * here because otherwise the break 124 * here because otherwise the break
125 * may get masked by ignore_status_mask 125 * may get masked by ignore_status_mask
126 * or read_status_mask. 126 * or read_status_mask.
127 */ 127 */
128 if (uart_handle_break(&up->port)) 128 if (uart_handle_break(&up->port))
129 goto ignore_char; 129 goto ignore_char;
130 } else if (*status & UART_LSR_PE) 130 } else if (*status & UART_LSR_PE)
131 up->port.icount.parity++; 131 up->port.icount.parity++;
132 else if (*status & UART_LSR_FE) 132 else if (*status & UART_LSR_FE)
133 up->port.icount.frame++; 133 up->port.icount.frame++;
134 if (*status & UART_LSR_OE) 134 if (*status & UART_LSR_OE)
135 up->port.icount.overrun++; 135 up->port.icount.overrun++;
136 136
137 /* 137 /*
138 * Mask off conditions which should be ignored. 138 * Mask off conditions which should be ignored.
139 */ 139 */
140 *status &= up->port.read_status_mask; 140 *status &= up->port.read_status_mask;
141 141
142 #ifdef CONFIG_SERIAL_PXA_CONSOLE 142 #ifdef CONFIG_SERIAL_PXA_CONSOLE
143 if (up->port.line == up->port.cons->index) { 143 if (up->port.line == up->port.cons->index) {
144 /* Recover the break flag from console xmit */ 144 /* Recover the break flag from console xmit */
145 *status |= up->lsr_break_flag; 145 *status |= up->lsr_break_flag;
146 up->lsr_break_flag = 0; 146 up->lsr_break_flag = 0;
147 } 147 }
148 #endif 148 #endif
149 if (*status & UART_LSR_BI) { 149 if (*status & UART_LSR_BI) {
150 flag = TTY_BREAK; 150 flag = TTY_BREAK;
151 } else if (*status & UART_LSR_PE) 151 } else if (*status & UART_LSR_PE)
152 flag = TTY_PARITY; 152 flag = TTY_PARITY;
153 else if (*status & UART_LSR_FE) 153 else if (*status & UART_LSR_FE)
154 flag = TTY_FRAME; 154 flag = TTY_FRAME;
155 } 155 }
156 156
157 if (uart_handle_sysrq_char(&up->port, ch, regs)) 157 if (uart_handle_sysrq_char(&up->port, ch, regs))
158 goto ignore_char; 158 goto ignore_char;
159 159
160 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag); 160 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
161 161
162 ignore_char: 162 ignore_char:
163 *status = serial_in(up, UART_LSR); 163 *status = serial_in(up, UART_LSR);
164 } while ((*status & UART_LSR_DR) && (max_count-- > 0)); 164 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
165 tty_flip_buffer_push(tty); 165 tty_flip_buffer_push(tty);
166 } 166 }
167 167
168 static void transmit_chars(struct uart_pxa_port *up) 168 static void transmit_chars(struct uart_pxa_port *up)
169 { 169 {
170 struct circ_buf *xmit = &up->port.info->xmit; 170 struct circ_buf *xmit = &up->port.info->xmit;
171 int count; 171 int count;
172 172
173 if (up->port.x_char) { 173 if (up->port.x_char) {
174 serial_out(up, UART_TX, up->port.x_char); 174 serial_out(up, UART_TX, up->port.x_char);
175 up->port.icount.tx++; 175 up->port.icount.tx++;
176 up->port.x_char = 0; 176 up->port.x_char = 0;
177 return; 177 return;
178 } 178 }
179 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { 179 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
180 serial_pxa_stop_tx(&up->port); 180 serial_pxa_stop_tx(&up->port);
181 return; 181 return;
182 } 182 }
183 183
184 count = up->port.fifosize / 2; 184 count = up->port.fifosize / 2;
185 do { 185 do {
186 serial_out(up, UART_TX, xmit->buf[xmit->tail]); 186 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
187 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 187 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
188 up->port.icount.tx++; 188 up->port.icount.tx++;
189 if (uart_circ_empty(xmit)) 189 if (uart_circ_empty(xmit))
190 break; 190 break;
191 } while (--count > 0); 191 } while (--count > 0);
192 192
193 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 193 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
194 uart_write_wakeup(&up->port); 194 uart_write_wakeup(&up->port);
195 195
196 196
197 if (uart_circ_empty(xmit)) 197 if (uart_circ_empty(xmit))
198 serial_pxa_stop_tx(&up->port); 198 serial_pxa_stop_tx(&up->port);
199 } 199 }
200 200
201 static void serial_pxa_start_tx(struct uart_port *port) 201 static void serial_pxa_start_tx(struct uart_port *port)
202 { 202 {
203 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 203 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
204 204
205 if (!(up->ier & UART_IER_THRI)) { 205 if (!(up->ier & UART_IER_THRI)) {
206 up->ier |= UART_IER_THRI; 206 up->ier |= UART_IER_THRI;
207 serial_out(up, UART_IER, up->ier); 207 serial_out(up, UART_IER, up->ier);
208 } 208 }
209 } 209 }
210 210
211 static inline void check_modem_status(struct uart_pxa_port *up) 211 static inline void check_modem_status(struct uart_pxa_port *up)
212 { 212 {
213 int status; 213 int status;
214 214
215 status = serial_in(up, UART_MSR); 215 status = serial_in(up, UART_MSR);
216 216
217 if ((status & UART_MSR_ANY_DELTA) == 0) 217 if ((status & UART_MSR_ANY_DELTA) == 0)
218 return; 218 return;
219 219
220 if (status & UART_MSR_TERI) 220 if (status & UART_MSR_TERI)
221 up->port.icount.rng++; 221 up->port.icount.rng++;
222 if (status & UART_MSR_DDSR) 222 if (status & UART_MSR_DDSR)
223 up->port.icount.dsr++; 223 up->port.icount.dsr++;
224 if (status & UART_MSR_DDCD) 224 if (status & UART_MSR_DDCD)
225 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); 225 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
226 if (status & UART_MSR_DCTS) 226 if (status & UART_MSR_DCTS)
227 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); 227 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
228 228
229 wake_up_interruptible(&up->port.info->delta_msr_wait); 229 wake_up_interruptible(&up->port.info->delta_msr_wait);
230 } 230 }
231 231
232 /* 232 /*
233 * This handles the interrupt from one port. 233 * This handles the interrupt from one port.
234 */ 234 */
235 static inline irqreturn_t 235 static inline irqreturn_t
236 serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs) 236 serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
237 { 237 {
238 struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id; 238 struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
239 unsigned int iir, lsr; 239 unsigned int iir, lsr;
240 240
241 iir = serial_in(up, UART_IIR); 241 iir = serial_in(up, UART_IIR);
242 if (iir & UART_IIR_NO_INT) 242 if (iir & UART_IIR_NO_INT)
243 return IRQ_NONE; 243 return IRQ_NONE;
244 lsr = serial_in(up, UART_LSR); 244 lsr = serial_in(up, UART_LSR);
245 if (lsr & UART_LSR_DR) 245 if (lsr & UART_LSR_DR)
246 receive_chars(up, &lsr, regs); 246 receive_chars(up, &lsr, regs);
247 check_modem_status(up); 247 check_modem_status(up);
248 if (lsr & UART_LSR_THRE) 248 if (lsr & UART_LSR_THRE)
249 transmit_chars(up); 249 transmit_chars(up);
250 return IRQ_HANDLED; 250 return IRQ_HANDLED;
251 } 251 }
252 252
253 static unsigned int serial_pxa_tx_empty(struct uart_port *port) 253 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
254 { 254 {
255 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 255 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
256 unsigned long flags; 256 unsigned long flags;
257 unsigned int ret; 257 unsigned int ret;
258 258
259 spin_lock_irqsave(&up->port.lock, flags); 259 spin_lock_irqsave(&up->port.lock, flags);
260 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 260 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
261 spin_unlock_irqrestore(&up->port.lock, flags); 261 spin_unlock_irqrestore(&up->port.lock, flags);
262 262
263 return ret; 263 return ret;
264 } 264 }
265 265
266 static unsigned int serial_pxa_get_mctrl(struct uart_port *port) 266 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
267 { 267 {
268 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 268 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
269 unsigned char status; 269 unsigned char status;
270 unsigned int ret; 270 unsigned int ret;
271 271
272 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
273 status = serial_in(up, UART_MSR); 272 status = serial_in(up, UART_MSR);
274 273
275 ret = 0; 274 ret = 0;
276 if (status & UART_MSR_DCD) 275 if (status & UART_MSR_DCD)
277 ret |= TIOCM_CAR; 276 ret |= TIOCM_CAR;
278 if (status & UART_MSR_RI) 277 if (status & UART_MSR_RI)
279 ret |= TIOCM_RNG; 278 ret |= TIOCM_RNG;
280 if (status & UART_MSR_DSR) 279 if (status & UART_MSR_DSR)
281 ret |= TIOCM_DSR; 280 ret |= TIOCM_DSR;
282 if (status & UART_MSR_CTS) 281 if (status & UART_MSR_CTS)
283 ret |= TIOCM_CTS; 282 ret |= TIOCM_CTS;
284 return ret; 283 return ret;
285 } 284 }
286 285
287 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl) 286 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
288 { 287 {
289 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 288 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
290 unsigned char mcr = 0; 289 unsigned char mcr = 0;
291 290
292 if (mctrl & TIOCM_RTS) 291 if (mctrl & TIOCM_RTS)
293 mcr |= UART_MCR_RTS; 292 mcr |= UART_MCR_RTS;
294 if (mctrl & TIOCM_DTR) 293 if (mctrl & TIOCM_DTR)
295 mcr |= UART_MCR_DTR; 294 mcr |= UART_MCR_DTR;
296 if (mctrl & TIOCM_OUT1) 295 if (mctrl & TIOCM_OUT1)
297 mcr |= UART_MCR_OUT1; 296 mcr |= UART_MCR_OUT1;
298 if (mctrl & TIOCM_OUT2) 297 if (mctrl & TIOCM_OUT2)
299 mcr |= UART_MCR_OUT2; 298 mcr |= UART_MCR_OUT2;
300 if (mctrl & TIOCM_LOOP) 299 if (mctrl & TIOCM_LOOP)
301 mcr |= UART_MCR_LOOP; 300 mcr |= UART_MCR_LOOP;
302 301
303 mcr |= up->mcr; 302 mcr |= up->mcr;
304 303
305 serial_out(up, UART_MCR, mcr); 304 serial_out(up, UART_MCR, mcr);
306 } 305 }
307 306
308 static void serial_pxa_break_ctl(struct uart_port *port, int break_state) 307 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
309 { 308 {
310 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 309 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
311 unsigned long flags; 310 unsigned long flags;
312 311
313 spin_lock_irqsave(&up->port.lock, flags); 312 spin_lock_irqsave(&up->port.lock, flags);
314 if (break_state == -1) 313 if (break_state == -1)
315 up->lcr |= UART_LCR_SBC; 314 up->lcr |= UART_LCR_SBC;
316 else 315 else
317 up->lcr &= ~UART_LCR_SBC; 316 up->lcr &= ~UART_LCR_SBC;
318 serial_out(up, UART_LCR, up->lcr); 317 serial_out(up, UART_LCR, up->lcr);
319 spin_unlock_irqrestore(&up->port.lock, flags); 318 spin_unlock_irqrestore(&up->port.lock, flags);
320 } 319 }
321 320
322 #if 0 321 #if 0
323 static void serial_pxa_dma_init(struct pxa_uart *up) 322 static void serial_pxa_dma_init(struct pxa_uart *up)
324 { 323 {
325 up->rxdma = 324 up->rxdma =
326 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up); 325 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
327 if (up->rxdma < 0) 326 if (up->rxdma < 0)
328 goto out; 327 goto out;
329 up->txdma = 328 up->txdma =
330 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up); 329 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
331 if (up->txdma < 0) 330 if (up->txdma < 0)
332 goto err_txdma; 331 goto err_txdma;
333 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL); 332 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
334 if (!up->dmadesc) 333 if (!up->dmadesc)
335 goto err_alloc; 334 goto err_alloc;
336 335
337 /* ... */ 336 /* ... */
338 err_alloc: 337 err_alloc:
339 pxa_free_dma(up->txdma); 338 pxa_free_dma(up->txdma);
340 err_rxdma: 339 err_rxdma:
341 pxa_free_dma(up->rxdma); 340 pxa_free_dma(up->rxdma);
342 out: 341 out:
343 return; 342 return;
344 } 343 }
345 #endif 344 #endif
346 345
347 static int serial_pxa_startup(struct uart_port *port) 346 static int serial_pxa_startup(struct uart_port *port)
348 { 347 {
349 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 348 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
350 unsigned long flags; 349 unsigned long flags;
351 int retval; 350 int retval;
352 351
353 if (port->line == 3) /* HWUART */ 352 if (port->line == 3) /* HWUART */
354 up->mcr |= UART_MCR_AFE; 353 up->mcr |= UART_MCR_AFE;
355 else 354 else
356 up->mcr = 0; 355 up->mcr = 0;
357 356
358 /* 357 /*
359 * Allocate the IRQ 358 * Allocate the IRQ
360 */ 359 */
361 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up); 360 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
362 if (retval) 361 if (retval)
363 return retval; 362 return retval;
364 363
365 /* 364 /*
366 * Clear the FIFO buffers and disable them. 365 * Clear the FIFO buffers and disable them.
367 * (they will be reenabled in set_termios()) 366 * (they will be reenabled in set_termios())
368 */ 367 */
369 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); 368 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
370 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 369 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
371 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); 370 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
372 serial_out(up, UART_FCR, 0); 371 serial_out(up, UART_FCR, 0);
373 372
374 /* 373 /*
375 * Clear the interrupt registers. 374 * Clear the interrupt registers.
376 */ 375 */
377 (void) serial_in(up, UART_LSR); 376 (void) serial_in(up, UART_LSR);
378 (void) serial_in(up, UART_RX); 377 (void) serial_in(up, UART_RX);
379 (void) serial_in(up, UART_IIR); 378 (void) serial_in(up, UART_IIR);
380 (void) serial_in(up, UART_MSR); 379 (void) serial_in(up, UART_MSR);
381 380
382 /* 381 /*
383 * Now, initialize the UART 382 * Now, initialize the UART
384 */ 383 */
385 serial_out(up, UART_LCR, UART_LCR_WLEN8); 384 serial_out(up, UART_LCR, UART_LCR_WLEN8);
386 385
387 spin_lock_irqsave(&up->port.lock, flags); 386 spin_lock_irqsave(&up->port.lock, flags);
388 up->port.mctrl |= TIOCM_OUT2; 387 up->port.mctrl |= TIOCM_OUT2;
389 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 388 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
390 spin_unlock_irqrestore(&up->port.lock, flags); 389 spin_unlock_irqrestore(&up->port.lock, flags);
391 390
392 /* 391 /*
393 * Finally, enable interrupts. Note: Modem status interrupts 392 * Finally, enable interrupts. Note: Modem status interrupts
394 * are set via set_termios(), which will be occuring imminently 393 * are set via set_termios(), which will be occuring imminently
395 * anyway, so we don't enable them here. 394 * anyway, so we don't enable them here.
396 */ 395 */
397 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE; 396 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
398 serial_out(up, UART_IER, up->ier); 397 serial_out(up, UART_IER, up->ier);
399 398
400 /* 399 /*
401 * And clear the interrupt registers again for luck. 400 * And clear the interrupt registers again for luck.
402 */ 401 */
403 (void) serial_in(up, UART_LSR); 402 (void) serial_in(up, UART_LSR);
404 (void) serial_in(up, UART_RX); 403 (void) serial_in(up, UART_RX);
405 (void) serial_in(up, UART_IIR); 404 (void) serial_in(up, UART_IIR);
406 (void) serial_in(up, UART_MSR); 405 (void) serial_in(up, UART_MSR);
407 406
408 return 0; 407 return 0;
409 } 408 }
410 409
411 static void serial_pxa_shutdown(struct uart_port *port) 410 static void serial_pxa_shutdown(struct uart_port *port)
412 { 411 {
413 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 412 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
414 unsigned long flags; 413 unsigned long flags;
415 414
416 free_irq(up->port.irq, up); 415 free_irq(up->port.irq, up);
417 416
418 /* 417 /*
419 * Disable interrupts from this port 418 * Disable interrupts from this port
420 */ 419 */
421 up->ier = 0; 420 up->ier = 0;
422 serial_out(up, UART_IER, 0); 421 serial_out(up, UART_IER, 0);
423 422
424 spin_lock_irqsave(&up->port.lock, flags); 423 spin_lock_irqsave(&up->port.lock, flags);
425 up->port.mctrl &= ~TIOCM_OUT2; 424 up->port.mctrl &= ~TIOCM_OUT2;
426 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 425 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
427 spin_unlock_irqrestore(&up->port.lock, flags); 426 spin_unlock_irqrestore(&up->port.lock, flags);
428 427
429 /* 428 /*
430 * Disable break condition and FIFOs 429 * Disable break condition and FIFOs
431 */ 430 */
432 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); 431 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
433 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | 432 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
434 UART_FCR_CLEAR_RCVR | 433 UART_FCR_CLEAR_RCVR |
435 UART_FCR_CLEAR_XMIT); 434 UART_FCR_CLEAR_XMIT);
436 serial_out(up, UART_FCR, 0); 435 serial_out(up, UART_FCR, 0);
437 } 436 }
438 437
439 static void 438 static void
440 serial_pxa_set_termios(struct uart_port *port, struct termios *termios, 439 serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
441 struct termios *old) 440 struct termios *old)
442 { 441 {
443 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 442 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
444 unsigned char cval, fcr = 0; 443 unsigned char cval, fcr = 0;
445 unsigned long flags; 444 unsigned long flags;
446 unsigned int baud, quot; 445 unsigned int baud, quot;
447 446
448 switch (termios->c_cflag & CSIZE) { 447 switch (termios->c_cflag & CSIZE) {
449 case CS5: 448 case CS5:
450 cval = UART_LCR_WLEN5; 449 cval = UART_LCR_WLEN5;
451 break; 450 break;
452 case CS6: 451 case CS6:
453 cval = UART_LCR_WLEN6; 452 cval = UART_LCR_WLEN6;
454 break; 453 break;
455 case CS7: 454 case CS7:
456 cval = UART_LCR_WLEN7; 455 cval = UART_LCR_WLEN7;
457 break; 456 break;
458 default: 457 default:
459 case CS8: 458 case CS8:
460 cval = UART_LCR_WLEN8; 459 cval = UART_LCR_WLEN8;
461 break; 460 break;
462 } 461 }
463 462
464 if (termios->c_cflag & CSTOPB) 463 if (termios->c_cflag & CSTOPB)
465 cval |= UART_LCR_STOP; 464 cval |= UART_LCR_STOP;
466 if (termios->c_cflag & PARENB) 465 if (termios->c_cflag & PARENB)
467 cval |= UART_LCR_PARITY; 466 cval |= UART_LCR_PARITY;
468 if (!(termios->c_cflag & PARODD)) 467 if (!(termios->c_cflag & PARODD))
469 cval |= UART_LCR_EPAR; 468 cval |= UART_LCR_EPAR;
470 469
471 /* 470 /*
472 * Ask the core to calculate the divisor for us. 471 * Ask the core to calculate the divisor for us.
473 */ 472 */
474 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 473 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
475 quot = uart_get_divisor(port, baud); 474 quot = uart_get_divisor(port, baud);
476 475
477 if ((up->port.uartclk / quot) < (2400 * 16)) 476 if ((up->port.uartclk / quot) < (2400 * 16))
478 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1; 477 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
479 else if ((up->port.uartclk / quot) < (230400 * 16)) 478 else if ((up->port.uartclk / quot) < (230400 * 16))
480 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8; 479 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
481 else 480 else
482 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32; 481 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
483 482
484 /* 483 /*
485 * Ok, we're now changing the port state. Do it with 484 * Ok, we're now changing the port state. Do it with
486 * interrupts disabled. 485 * interrupts disabled.
487 */ 486 */
488 spin_lock_irqsave(&up->port.lock, flags); 487 spin_lock_irqsave(&up->port.lock, flags);
489 488
490 /* 489 /*
491 * Ensure the port will be enabled. 490 * Ensure the port will be enabled.
492 * This is required especially for serial console. 491 * This is required especially for serial console.
493 */ 492 */
494 up->ier |= IER_UUE; 493 up->ier |= IER_UUE;
495 494
496 /* 495 /*
497 * Update the per-port timeout. 496 * Update the per-port timeout.
498 */ 497 */
499 uart_update_timeout(port, termios->c_cflag, baud); 498 uart_update_timeout(port, termios->c_cflag, baud);
500 499
501 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 500 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
502 if (termios->c_iflag & INPCK) 501 if (termios->c_iflag & INPCK)
503 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; 502 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
504 if (termios->c_iflag & (BRKINT | PARMRK)) 503 if (termios->c_iflag & (BRKINT | PARMRK))
505 up->port.read_status_mask |= UART_LSR_BI; 504 up->port.read_status_mask |= UART_LSR_BI;
506 505
507 /* 506 /*
508 * Characters to ignore 507 * Characters to ignore
509 */ 508 */
510 up->port.ignore_status_mask = 0; 509 up->port.ignore_status_mask = 0;
511 if (termios->c_iflag & IGNPAR) 510 if (termios->c_iflag & IGNPAR)
512 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; 511 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
513 if (termios->c_iflag & IGNBRK) { 512 if (termios->c_iflag & IGNBRK) {
514 up->port.ignore_status_mask |= UART_LSR_BI; 513 up->port.ignore_status_mask |= UART_LSR_BI;
515 /* 514 /*
516 * If we're ignoring parity and break indicators, 515 * If we're ignoring parity and break indicators,
517 * ignore overruns too (for real raw support). 516 * ignore overruns too (for real raw support).
518 */ 517 */
519 if (termios->c_iflag & IGNPAR) 518 if (termios->c_iflag & IGNPAR)
520 up->port.ignore_status_mask |= UART_LSR_OE; 519 up->port.ignore_status_mask |= UART_LSR_OE;
521 } 520 }
522 521
523 /* 522 /*
524 * ignore all characters if CREAD is not set 523 * ignore all characters if CREAD is not set
525 */ 524 */
526 if ((termios->c_cflag & CREAD) == 0) 525 if ((termios->c_cflag & CREAD) == 0)
527 up->port.ignore_status_mask |= UART_LSR_DR; 526 up->port.ignore_status_mask |= UART_LSR_DR;
528 527
529 /* 528 /*
530 * CTS flow control flag and modem status interrupts 529 * CTS flow control flag and modem status interrupts
531 */ 530 */
532 up->ier &= ~UART_IER_MSI; 531 up->ier &= ~UART_IER_MSI;
533 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) 532 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
534 up->ier |= UART_IER_MSI; 533 up->ier |= UART_IER_MSI;
535 534
536 serial_out(up, UART_IER, up->ier); 535 serial_out(up, UART_IER, up->ier);
537 536
538 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ 537 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
539 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ 538 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
540 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ 539 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
541 serial_out(up, UART_LCR, cval); /* reset DLAB */ 540 serial_out(up, UART_LCR, cval); /* reset DLAB */
542 up->lcr = cval; /* Save LCR */ 541 up->lcr = cval; /* Save LCR */
543 serial_pxa_set_mctrl(&up->port, up->port.mctrl); 542 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
544 serial_out(up, UART_FCR, fcr); 543 serial_out(up, UART_FCR, fcr);
545 spin_unlock_irqrestore(&up->port.lock, flags); 544 spin_unlock_irqrestore(&up->port.lock, flags);
546 } 545 }
547 546
548 static void 547 static void
549 serial_pxa_pm(struct uart_port *port, unsigned int state, 548 serial_pxa_pm(struct uart_port *port, unsigned int state,
550 unsigned int oldstate) 549 unsigned int oldstate)
551 { 550 {
552 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 551 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
553 pxa_set_cken(up->cken, !state); 552 pxa_set_cken(up->cken, !state);
554 if (!state) 553 if (!state)
555 udelay(1); 554 udelay(1);
556 } 555 }
557 556
558 static void serial_pxa_release_port(struct uart_port *port) 557 static void serial_pxa_release_port(struct uart_port *port)
559 { 558 {
560 } 559 }
561 560
562 static int serial_pxa_request_port(struct uart_port *port) 561 static int serial_pxa_request_port(struct uart_port *port)
563 { 562 {
564 return 0; 563 return 0;
565 } 564 }
566 565
567 static void serial_pxa_config_port(struct uart_port *port, int flags) 566 static void serial_pxa_config_port(struct uart_port *port, int flags)
568 { 567 {
569 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 568 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
570 up->port.type = PORT_PXA; 569 up->port.type = PORT_PXA;
571 } 570 }
572 571
573 static int 572 static int
574 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser) 573 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
575 { 574 {
576 /* we don't want the core code to modify any port params */ 575 /* we don't want the core code to modify any port params */
577 return -EINVAL; 576 return -EINVAL;
578 } 577 }
579 578
580 static const char * 579 static const char *
581 serial_pxa_type(struct uart_port *port) 580 serial_pxa_type(struct uart_port *port)
582 { 581 {
583 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 582 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
584 return up->name; 583 return up->name;
585 } 584 }
586 585
587 #ifdef CONFIG_SERIAL_PXA_CONSOLE 586 #ifdef CONFIG_SERIAL_PXA_CONSOLE
588 587
589 static struct uart_pxa_port serial_pxa_ports[]; 588 static struct uart_pxa_port serial_pxa_ports[];
590 static struct uart_driver serial_pxa_reg; 589 static struct uart_driver serial_pxa_reg;
591 590
592 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE) 591 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
593 592
594 /* 593 /*
595 * Wait for transmitter & holding register to empty 594 * Wait for transmitter & holding register to empty
596 */ 595 */
597 static inline void wait_for_xmitr(struct uart_pxa_port *up) 596 static inline void wait_for_xmitr(struct uart_pxa_port *up)
598 { 597 {
599 unsigned int status, tmout = 10000; 598 unsigned int status, tmout = 10000;
600 599
601 /* Wait up to 10ms for the character(s) to be sent. */ 600 /* Wait up to 10ms for the character(s) to be sent. */
602 do { 601 do {
603 status = serial_in(up, UART_LSR); 602 status = serial_in(up, UART_LSR);
604 603
605 if (status & UART_LSR_BI) 604 if (status & UART_LSR_BI)
606 up->lsr_break_flag = UART_LSR_BI; 605 up->lsr_break_flag = UART_LSR_BI;
607 606
608 if (--tmout == 0) 607 if (--tmout == 0)
609 break; 608 break;
610 udelay(1); 609 udelay(1);
611 } while ((status & BOTH_EMPTY) != BOTH_EMPTY); 610 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
612 611
613 /* Wait up to 1s for flow control if necessary */ 612 /* Wait up to 1s for flow control if necessary */
614 if (up->port.flags & UPF_CONS_FLOW) { 613 if (up->port.flags & UPF_CONS_FLOW) {
615 tmout = 1000000; 614 tmout = 1000000;
616 while (--tmout && 615 while (--tmout &&
617 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) 616 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
618 udelay(1); 617 udelay(1);
619 } 618 }
620 } 619 }
621 620
622 static void serial_pxa_console_putchar(struct uart_port *port, int ch) 621 static void serial_pxa_console_putchar(struct uart_port *port, int ch)
623 { 622 {
624 struct uart_pxa_port *up = (struct uart_pxa_port *)port; 623 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
625 624
626 wait_for_xmitr(up); 625 wait_for_xmitr(up);
627 serial_out(up, UART_TX, ch); 626 serial_out(up, UART_TX, ch);
628 } 627 }
629 628
630 /* 629 /*
631 * Print a string to the serial port trying not to disturb 630 * Print a string to the serial port trying not to disturb
632 * any possible real use of the port... 631 * any possible real use of the port...
633 * 632 *
634 * The console_lock must be held when we get here. 633 * The console_lock must be held when we get here.
635 */ 634 */
636 static void 635 static void
637 serial_pxa_console_write(struct console *co, const char *s, unsigned int count) 636 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
638 { 637 {
639 struct uart_pxa_port *up = &serial_pxa_ports[co->index]; 638 struct uart_pxa_port *up = &serial_pxa_ports[co->index];
640 unsigned int ier; 639 unsigned int ier;
641 640
642 /* 641 /*
643 * First save the IER then disable the interrupts 642 * First save the IER then disable the interrupts
644 */ 643 */
645 ier = serial_in(up, UART_IER); 644 ier = serial_in(up, UART_IER);
646 serial_out(up, UART_IER, UART_IER_UUE); 645 serial_out(up, UART_IER, UART_IER_UUE);
647 646
648 uart_console_write(&up->port, s, count, serial_pxa_console_putchar); 647 uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
649 648
650 /* 649 /*
651 * Finally, wait for transmitter to become empty 650 * Finally, wait for transmitter to become empty
652 * and restore the IER 651 * and restore the IER
653 */ 652 */
654 wait_for_xmitr(up); 653 wait_for_xmitr(up);
655 serial_out(up, UART_IER, ier); 654 serial_out(up, UART_IER, ier);
656 } 655 }
657 656
658 static int __init 657 static int __init
659 serial_pxa_console_setup(struct console *co, char *options) 658 serial_pxa_console_setup(struct console *co, char *options)
660 { 659 {
661 struct uart_pxa_port *up; 660 struct uart_pxa_port *up;
662 int baud = 9600; 661 int baud = 9600;
663 int bits = 8; 662 int bits = 8;
664 int parity = 'n'; 663 int parity = 'n';
665 int flow = 'n'; 664 int flow = 'n';
666 665
667 if (co->index == -1 || co->index >= serial_pxa_reg.nr) 666 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
668 co->index = 0; 667 co->index = 0;
669 up = &serial_pxa_ports[co->index]; 668 up = &serial_pxa_ports[co->index];
670 669
671 if (options) 670 if (options)
672 uart_parse_options(options, &baud, &parity, &bits, &flow); 671 uart_parse_options(options, &baud, &parity, &bits, &flow);
673 672
674 return uart_set_options(&up->port, co, baud, parity, bits, flow); 673 return uart_set_options(&up->port, co, baud, parity, bits, flow);
675 } 674 }
676 675
677 static struct console serial_pxa_console = { 676 static struct console serial_pxa_console = {
678 .name = "ttyS", 677 .name = "ttyS",
679 .write = serial_pxa_console_write, 678 .write = serial_pxa_console_write,
680 .device = uart_console_device, 679 .device = uart_console_device,
681 .setup = serial_pxa_console_setup, 680 .setup = serial_pxa_console_setup,
682 .flags = CON_PRINTBUFFER, 681 .flags = CON_PRINTBUFFER,
683 .index = -1, 682 .index = -1,
684 .data = &serial_pxa_reg, 683 .data = &serial_pxa_reg,
685 }; 684 };
686 685
687 static int __init 686 static int __init
688 serial_pxa_console_init(void) 687 serial_pxa_console_init(void)
689 { 688 {
690 register_console(&serial_pxa_console); 689 register_console(&serial_pxa_console);
691 return 0; 690 return 0;
692 } 691 }
693 692
694 console_initcall(serial_pxa_console_init); 693 console_initcall(serial_pxa_console_init);
695 694
696 #define PXA_CONSOLE &serial_pxa_console 695 #define PXA_CONSOLE &serial_pxa_console
697 #else 696 #else
698 #define PXA_CONSOLE NULL 697 #define PXA_CONSOLE NULL
699 #endif 698 #endif
700 699
701 struct uart_ops serial_pxa_pops = { 700 struct uart_ops serial_pxa_pops = {
702 .tx_empty = serial_pxa_tx_empty, 701 .tx_empty = serial_pxa_tx_empty,
703 .set_mctrl = serial_pxa_set_mctrl, 702 .set_mctrl = serial_pxa_set_mctrl,
704 .get_mctrl = serial_pxa_get_mctrl, 703 .get_mctrl = serial_pxa_get_mctrl,
705 .stop_tx = serial_pxa_stop_tx, 704 .stop_tx = serial_pxa_stop_tx,
706 .start_tx = serial_pxa_start_tx, 705 .start_tx = serial_pxa_start_tx,
707 .stop_rx = serial_pxa_stop_rx, 706 .stop_rx = serial_pxa_stop_rx,
708 .enable_ms = serial_pxa_enable_ms, 707 .enable_ms = serial_pxa_enable_ms,
709 .break_ctl = serial_pxa_break_ctl, 708 .break_ctl = serial_pxa_break_ctl,
710 .startup = serial_pxa_startup, 709 .startup = serial_pxa_startup,
711 .shutdown = serial_pxa_shutdown, 710 .shutdown = serial_pxa_shutdown,
712 .set_termios = serial_pxa_set_termios, 711 .set_termios = serial_pxa_set_termios,
713 .pm = serial_pxa_pm, 712 .pm = serial_pxa_pm,
714 .type = serial_pxa_type, 713 .type = serial_pxa_type,
715 .release_port = serial_pxa_release_port, 714 .release_port = serial_pxa_release_port,
716 .request_port = serial_pxa_request_port, 715 .request_port = serial_pxa_request_port,
717 .config_port = serial_pxa_config_port, 716 .config_port = serial_pxa_config_port,
718 .verify_port = serial_pxa_verify_port, 717 .verify_port = serial_pxa_verify_port,
719 }; 718 };
720 719
721 static struct uart_pxa_port serial_pxa_ports[] = { 720 static struct uart_pxa_port serial_pxa_ports[] = {
722 { /* FFUART */ 721 { /* FFUART */
723 .name = "FFUART", 722 .name = "FFUART",
724 .cken = CKEN6_FFUART, 723 .cken = CKEN6_FFUART,
725 .port = { 724 .port = {
726 .type = PORT_PXA, 725 .type = PORT_PXA,
727 .iotype = UPIO_MEM, 726 .iotype = UPIO_MEM,
728 .membase = (void *)&FFUART, 727 .membase = (void *)&FFUART,
729 .mapbase = __PREG(FFUART), 728 .mapbase = __PREG(FFUART),
730 .irq = IRQ_FFUART, 729 .irq = IRQ_FFUART,
731 .uartclk = 921600 * 16, 730 .uartclk = 921600 * 16,
732 .fifosize = 64, 731 .fifosize = 64,
733 .ops = &serial_pxa_pops, 732 .ops = &serial_pxa_pops,
734 .line = 0, 733 .line = 0,
735 }, 734 },
736 }, { /* BTUART */ 735 }, { /* BTUART */
737 .name = "BTUART", 736 .name = "BTUART",
738 .cken = CKEN7_BTUART, 737 .cken = CKEN7_BTUART,
739 .port = { 738 .port = {
740 .type = PORT_PXA, 739 .type = PORT_PXA,
741 .iotype = UPIO_MEM, 740 .iotype = UPIO_MEM,
742 .membase = (void *)&BTUART, 741 .membase = (void *)&BTUART,
743 .mapbase = __PREG(BTUART), 742 .mapbase = __PREG(BTUART),
744 .irq = IRQ_BTUART, 743 .irq = IRQ_BTUART,
745 .uartclk = 921600 * 16, 744 .uartclk = 921600 * 16,
746 .fifosize = 64, 745 .fifosize = 64,
747 .ops = &serial_pxa_pops, 746 .ops = &serial_pxa_pops,
748 .line = 1, 747 .line = 1,
749 }, 748 },
750 }, { /* STUART */ 749 }, { /* STUART */
751 .name = "STUART", 750 .name = "STUART",
752 .cken = CKEN5_STUART, 751 .cken = CKEN5_STUART,
753 .port = { 752 .port = {
754 .type = PORT_PXA, 753 .type = PORT_PXA,
755 .iotype = UPIO_MEM, 754 .iotype = UPIO_MEM,
756 .membase = (void *)&STUART, 755 .membase = (void *)&STUART,
757 .mapbase = __PREG(STUART), 756 .mapbase = __PREG(STUART),
758 .irq = IRQ_STUART, 757 .irq = IRQ_STUART,
759 .uartclk = 921600 * 16, 758 .uartclk = 921600 * 16,
760 .fifosize = 64, 759 .fifosize = 64,
761 .ops = &serial_pxa_pops, 760 .ops = &serial_pxa_pops,
762 .line = 2, 761 .line = 2,
763 }, 762 },
764 }, { /* HWUART */ 763 }, { /* HWUART */
765 .name = "HWUART", 764 .name = "HWUART",
766 .cken = CKEN4_HWUART, 765 .cken = CKEN4_HWUART,
767 .port = { 766 .port = {
768 .type = PORT_PXA, 767 .type = PORT_PXA,
769 .iotype = UPIO_MEM, 768 .iotype = UPIO_MEM,
770 .membase = (void *)&HWUART, 769 .membase = (void *)&HWUART,
771 .mapbase = __PREG(HWUART), 770 .mapbase = __PREG(HWUART),
772 .irq = IRQ_HWUART, 771 .irq = IRQ_HWUART,
773 .uartclk = 921600 * 16, 772 .uartclk = 921600 * 16,
774 .fifosize = 64, 773 .fifosize = 64,
775 .ops = &serial_pxa_pops, 774 .ops = &serial_pxa_pops,
776 .line = 3, 775 .line = 3,
777 }, 776 },
778 } 777 }
779 }; 778 };
780 779
781 static struct uart_driver serial_pxa_reg = { 780 static struct uart_driver serial_pxa_reg = {
782 .owner = THIS_MODULE, 781 .owner = THIS_MODULE,
783 .driver_name = "PXA serial", 782 .driver_name = "PXA serial",
784 .devfs_name = "tts/", 783 .devfs_name = "tts/",
785 .dev_name = "ttyS", 784 .dev_name = "ttyS",
786 .major = TTY_MAJOR, 785 .major = TTY_MAJOR,
787 .minor = 64, 786 .minor = 64,
788 .nr = ARRAY_SIZE(serial_pxa_ports), 787 .nr = ARRAY_SIZE(serial_pxa_ports),
789 .cons = PXA_CONSOLE, 788 .cons = PXA_CONSOLE,
790 }; 789 };
791 790
792 static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state) 791 static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
793 { 792 {
794 struct uart_pxa_port *sport = platform_get_drvdata(dev); 793 struct uart_pxa_port *sport = platform_get_drvdata(dev);
795 794
796 if (sport) 795 if (sport)
797 uart_suspend_port(&serial_pxa_reg, &sport->port); 796 uart_suspend_port(&serial_pxa_reg, &sport->port);
798 797
799 return 0; 798 return 0;
800 } 799 }
801 800
802 static int serial_pxa_resume(struct platform_device *dev) 801 static int serial_pxa_resume(struct platform_device *dev)
803 { 802 {
804 struct uart_pxa_port *sport = platform_get_drvdata(dev); 803 struct uart_pxa_port *sport = platform_get_drvdata(dev);
805 804
806 if (sport) 805 if (sport)
807 uart_resume_port(&serial_pxa_reg, &sport->port); 806 uart_resume_port(&serial_pxa_reg, &sport->port);
808 807
809 return 0; 808 return 0;
810 } 809 }
811 810
812 static int serial_pxa_probe(struct platform_device *dev) 811 static int serial_pxa_probe(struct platform_device *dev)
813 { 812 {
814 serial_pxa_ports[dev->id].port.dev = &dev->dev; 813 serial_pxa_ports[dev->id].port.dev = &dev->dev;
815 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port); 814 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
816 platform_set_drvdata(dev, &serial_pxa_ports[dev->id]); 815 platform_set_drvdata(dev, &serial_pxa_ports[dev->id]);
817 return 0; 816 return 0;
818 } 817 }
819 818
820 static int serial_pxa_remove(struct platform_device *dev) 819 static int serial_pxa_remove(struct platform_device *dev)
821 { 820 {
822 struct uart_pxa_port *sport = platform_get_drvdata(dev); 821 struct uart_pxa_port *sport = platform_get_drvdata(dev);
823 822
824 platform_set_drvdata(dev, NULL); 823 platform_set_drvdata(dev, NULL);
825 824
826 if (sport) 825 if (sport)
827 uart_remove_one_port(&serial_pxa_reg, &sport->port); 826 uart_remove_one_port(&serial_pxa_reg, &sport->port);
828 827
829 return 0; 828 return 0;
830 } 829 }
831 830
832 static struct platform_driver serial_pxa_driver = { 831 static struct platform_driver serial_pxa_driver = {
833 .probe = serial_pxa_probe, 832 .probe = serial_pxa_probe,
834 .remove = serial_pxa_remove, 833 .remove = serial_pxa_remove,
835 834
836 .suspend = serial_pxa_suspend, 835 .suspend = serial_pxa_suspend,
837 .resume = serial_pxa_resume, 836 .resume = serial_pxa_resume,
838 .driver = { 837 .driver = {
839 .name = "pxa2xx-uart", 838 .name = "pxa2xx-uart",
840 }, 839 },
841 }; 840 };
842 841
843 int __init serial_pxa_init(void) 842 int __init serial_pxa_init(void)
844 { 843 {
845 int ret; 844 int ret;
846 845
847 ret = uart_register_driver(&serial_pxa_reg); 846 ret = uart_register_driver(&serial_pxa_reg);
848 if (ret != 0) 847 if (ret != 0)
849 return ret; 848 return ret;
850 849
851 ret = platform_driver_register(&serial_pxa_driver); 850 ret = platform_driver_register(&serial_pxa_driver);
852 if (ret != 0) 851 if (ret != 0)
853 uart_unregister_driver(&serial_pxa_reg); 852 uart_unregister_driver(&serial_pxa_reg);
854 853
855 return ret; 854 return ret;
856 } 855 }
857 856
858 void __exit serial_pxa_exit(void) 857 void __exit serial_pxa_exit(void)
859 { 858 {
860 platform_driver_unregister(&serial_pxa_driver); 859 platform_driver_unregister(&serial_pxa_driver);
861 uart_unregister_driver(&serial_pxa_reg); 860 uart_unregister_driver(&serial_pxa_reg);
862 } 861 }
863 862
864 module_init(serial_pxa_init); 863 module_init(serial_pxa_init);
865 module_exit(serial_pxa_exit); 864 module_exit(serial_pxa_exit);
866 865
867 MODULE_LICENSE("GPL"); 866 MODULE_LICENSE("GPL");
868 867
869 868