Commit 035114fbdbf8c88fbf80a160716be9d0078f01ee

Authored by Jayachandran C
Committed by Ralf Baechle
1 parent 033e6f2887

MIPS: Netlogic: Support for multiple built-in device trees

This enables us to have a default device tree per SoC family to be built
into the kernel. The default device tree for XLP3xx has been added as part
of this change. Later this can be used to provide support default boards
for XLP2xx and XLP9xx SoCs.

Kconfig options are provided for each default device tree so that just the
needed ones can be selected to be built into the kernel.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5023/
Acked-by: John Crispin <blogic@openwrt.org>

Showing 5 changed files with 158 additions and 8 deletions Inline Diff

arch/mips/netlogic/Kconfig
1 if NLM_XLP_BOARD || NLM_XLR_BOARD 1 if NLM_XLP_BOARD || NLM_XLR_BOARD
2 2
3 if NLM_XLP_BOARD 3 if NLM_XLP_BOARD
4 config DT_XLP_EVP 4 config DT_XLP_EVP
5 bool "Built-in device tree for XLP EVP/SVP boards" 5 bool "Built-in device tree for XLP EVP boards"
6 default y 6 default y
7 help 7 help
8 Add an FDT blob for XLP EVP and SVP boards into the kernel. 8 Add an FDT blob for XLP EVP boards into the kernel.
9 This DTB will be used if the firmware does not pass in a DTB 9 This DTB will be used if the firmware does not pass in a DTB
10 pointer to the kernel. The corresponding DTS file is at 10 pointer to the kernel. The corresponding DTS file is at
11 arch/mips/netlogic/dts/xlp_evp.dts 11 arch/mips/netlogic/dts/xlp_evp.dts
12
13 config DT_XLP_SVP
14 bool "Built-in device tree for XLP SVP boards"
15 default y
16 help
17 Add an FDT blob for XLP VP boards into the kernel.
18 This DTB will be used if the firmware does not pass in a DTB
19 pointer to the kernel. The corresponding DTS file is at
20 arch/mips/netlogic/dts/xlp_svp.dts
12 21
13 config NLM_MULTINODE 22 config NLM_MULTINODE
14 bool "Support for multi-chip boards" 23 bool "Support for multi-chip boards"
15 depends on NLM_XLP_BOARD 24 depends on NLM_XLP_BOARD
16 default n 25 default n
17 help 26 help
18 Add support for boards with 2 or 4 XLPs connected over ICI. 27 Add support for boards with 2 or 4 XLPs connected over ICI.
19 28
20 if NLM_MULTINODE 29 if NLM_MULTINODE
21 choice 30 choice
22 prompt "Number of XLPs on the board" 31 prompt "Number of XLPs on the board"
23 default NLM_MULTINODE_2 32 default NLM_MULTINODE_2
24 help 33 help
25 In the multi-node case, specify the number of SoCs on the board. 34 In the multi-node case, specify the number of SoCs on the board.
26 35
27 config NLM_MULTINODE_2 36 config NLM_MULTINODE_2
28 bool "Dual-XLP board" 37 bool "Dual-XLP board"
29 help 38 help
30 Support boards with upto two XLPs connected over ICI. 39 Support boards with upto two XLPs connected over ICI.
31 40
32 config NLM_MULTINODE_4 41 config NLM_MULTINODE_4
33 bool "Quad-XLP board" 42 bool "Quad-XLP board"
34 help 43 help
35 Support boards with upto four XLPs connected over ICI. 44 Support boards with upto four XLPs connected over ICI.
36 45
37 endchoice 46 endchoice
38 47
39 endif 48 endif
40 endif 49 endif
41 50
42 config NLM_COMMON 51 config NLM_COMMON
43 bool 52 bool
44 53
45 endif 54 endif
46 55
arch/mips/netlogic/dts/Makefile
1 obj-$(CONFIG_DT_XLP_EVP) := xlp_evp.dtb.o 1 obj-$(CONFIG_DT_XLP_EVP) := xlp_evp.dtb.o
2 obj-$(CONFIG_DT_XLP_SVP) += xlp_svp.dtb.o
2 3
arch/mips/netlogic/dts/xlp_evp.dts
1 /* 1 /*
2 * XLP8XX Device Tree Source for EVP boards 2 * XLP8XX Device Tree Source for EVP boards
3 */ 3 */
4 4
5 /dts-v1/; 5 /dts-v1/;
6 / { 6 / {
7 model = "netlogic,XLP-EVP"; 7 model = "netlogic,XLP-EVP";
8 compatible = "netlogic,xlp"; 8 compatible = "netlogic,xlp";
9 #address-cells = <2>; 9 #address-cells = <2>;
10 #size-cells = <2>; 10 #size-cells = <2>;
11 11
12 memory { 12 memory {
13 device_type = "memory"; 13 device_type = "memory";
14 reg = <0 0x00100000 0 0x0FF00000 // 255M at 1M 14 reg = <0 0x00100000 0 0x0FF00000 // 255M at 1M
15 0 0x20000000 0 0xa0000000 // 2560M at 512M 15 0 0x20000000 0 0xa0000000 // 2560M at 512M
16 0 0xe0000000 1 0x00000000>; 16 0 0xe0000000 1 0x00000000>;
17 }; 17 };
18 18
19 soc { 19 soc {
20 #address-cells = <2>; 20 #address-cells = <2>;
21 #size-cells = <1>; 21 #size-cells = <1>;
22 compatible = "simple-bus"; 22 compatible = "simple-bus";
23 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG 23 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
24 1 0 0 0x16000000 0x01000000>; // GBU chipselects 24 1 0 0 0x16000000 0x01000000>; // GBU chipselects
25 25
26 serial0: serial@30000 { 26 serial0: serial@30000 {
27 device_type = "serial"; 27 device_type = "serial";
28 compatible = "ns16550"; 28 compatible = "ns16550";
29 reg = <0 0x30100 0xa00>; 29 reg = <0 0x30100 0xa00>;
30 reg-shift = <2>; 30 reg-shift = <2>;
31 reg-io-width = <4>; 31 reg-io-width = <4>;
32 clock-frequency = <133333333>; 32 clock-frequency = <133333333>;
33 interrupt-parent = <&pic>; 33 interrupt-parent = <&pic>;
34 interrupts = <17>; 34 interrupts = <17>;
35 }; 35 };
36 serial1: serial@31000 { 36 serial1: serial@31000 {
37 device_type = "serial"; 37 device_type = "serial";
38 compatible = "ns16550"; 38 compatible = "ns16550";
39 reg = <0 0x31100 0xa00>; 39 reg = <0 0x31100 0xa00>;
40 reg-shift = <2>; 40 reg-shift = <2>;
41 reg-io-width = <4>; 41 reg-io-width = <4>;
42 clock-frequency = <133333333>; 42 clock-frequency = <133333333>;
43 interrupt-parent = <&pic>; 43 interrupt-parent = <&pic>;
44 interrupts = <18>; 44 interrupts = <18>;
45 }; 45 };
46 i2c0: ocores@32000 { 46 i2c0: ocores@32000 {
47 compatible = "opencores,i2c-ocores"; 47 compatible = "opencores,i2c-ocores";
48 #address-cells = <1>; 48 #address-cells = <1>;
49 #size-cells = <0>; 49 #size-cells = <0>;
50 reg = <0 0x32100 0xa00>; 50 reg = <0 0x32100 0xa00>;
51 reg-shift = <2>; 51 reg-shift = <2>;
52 reg-io-width = <4>; 52 reg-io-width = <4>;
53 clock-frequency = <32000000>; 53 clock-frequency = <32000000>;
54 interrupt-parent = <&pic>; 54 interrupt-parent = <&pic>;
55 interrupts = <30>; 55 interrupts = <30>;
56 }; 56 };
57 i2c1: ocores@33000 { 57 i2c1: ocores@33000 {
58 compatible = "opencores,i2c-ocores"; 58 compatible = "opencores,i2c-ocores";
59 #address-cells = <1>; 59 #address-cells = <1>;
60 #size-cells = <0>; 60 #size-cells = <0>;
61 reg = <0 0x33100 0xa00>; 61 reg = <0 0x33100 0xa00>;
62 reg-shift = <2>; 62 reg-shift = <2>;
63 reg-io-width = <4>; 63 reg-io-width = <4>;
64 clock-frequency = <32000000>; 64 clock-frequency = <32000000>;
65 interrupt-parent = <&pic>; 65 interrupt-parent = <&pic>;
66 interrupts = <31>; 66 interrupts = <31>;
67 67
68 rtc@68 { 68 rtc@68 {
69 compatible = "dallas,ds1374"; 69 compatible = "dallas,ds1374";
70 reg = <0x68>; 70 reg = <0x68>;
71 }; 71 };
72 72
73 dtt@4c { 73 dtt@4c {
74 compatible = "national,lm90"; 74 compatible = "national,lm90";
75 reg = <0x4c>; 75 reg = <0x4c>;
76 }; 76 };
77 }; 77 };
78 pic: pic@4000 { 78 pic: pic@4000 {
79 interrupt-controller; 79 interrupt-controller;
80 #address-cells = <0>; 80 #address-cells = <0>;
81 #interrupt-cells = <1>; 81 #interrupt-cells = <1>;
82 reg = <0 0x4000 0x200>; 82 reg = <0 0x4000 0x200>;
83 }; 83 };
84 84
85 nor_flash@1,0 { 85 nor_flash@1,0 {
86 compatible = "cfi-flash"; 86 compatible = "cfi-flash";
87 #address-cells = <1>; 87 #address-cells = <1>;
88 #size-cells = <1>; 88 #size-cells = <1>;
89 bank-width = <2>; 89 bank-width = <2>;
90 reg = <1 0 0x1000000>; 90 reg = <1 0 0x1000000>;
91 91
92 partition@0 { 92 partition@0 {
93 label = "x-loader"; 93 label = "x-loader";
94 reg = <0x0 0x100000>; /* 1M */ 94 reg = <0x0 0x100000>; /* 1M */
95 read-only; 95 read-only;
96 }; 96 };
97 97
98 partition@100000 { 98 partition@100000 {
99 label = "u-boot"; 99 label = "u-boot";
100 reg = <0x100000 0x100000>; /* 1M */ 100 reg = <0x100000 0x100000>; /* 1M */
101 }; 101 };
102 102
103 partition@200000 { 103 partition@200000 {
104 label = "kernel"; 104 label = "kernel";
105 reg = <0x200000 0x500000>; /* 5M */ 105 reg = <0x200000 0x500000>; /* 5M */
106 }; 106 };
107 107
108 partition@700000 { 108 partition@700000 {
109 label = "rootfs"; 109 label = "rootfs";
110 reg = <0x700000 0x800000>; /* 8M */ 110 reg = <0x700000 0x800000>; /* 8M */
111 }; 111 };
112 112
113 partition@f00000 { 113 partition@f00000 {
114 label = "env"; 114 label = "env";
115 reg = <0xf00000 0x100000>; /* 1M */ 115 reg = <0xf00000 0x100000>; /* 1M */
116 read-only; 116 read-only;
117 }; 117 };
118 }; 118 };
119 }; 119 };
120 120
121 chosen { 121 chosen {
122 bootargs = "console=ttyS0,115200 rdinit=/sbin/init"; 122 bootargs = "console=ttyS0,115200 rdinit=/sbin/init";
123 }; 123 };
124 }; 124 };
125 125
arch/mips/netlogic/dts/xlp_svp.dts
File was created 1 /*
2 * XLP3XX Device Tree Source for SVP boards
3 */
4
5 /dts-v1/;
6 / {
7 model = "netlogic,XLP-SVP";
8 compatible = "netlogic,xlp";
9 #address-cells = <2>;
10 #size-cells = <2>;
11
12 memory {
13 device_type = "memory";
14 reg = <0 0x00100000 0 0x0FF00000 // 255M at 1M
15 0 0x20000000 0 0xa0000000 // 2560M at 512M
16 0 0xe0000000 0 0x40000000>;
17 };
18
19 soc {
20 #address-cells = <2>;
21 #size-cells = <1>;
22 compatible = "simple-bus";
23 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
24 1 0 0 0x16000000 0x01000000>; // GBU chipselects
25
26 serial0: serial@30000 {
27 device_type = "serial";
28 compatible = "ns16550";
29 reg = <0 0x30100 0xa00>;
30 reg-shift = <2>;
31 reg-io-width = <4>;
32 clock-frequency = <133333333>;
33 interrupt-parent = <&pic>;
34 interrupts = <17>;
35 };
36 serial1: serial@31000 {
37 device_type = "serial";
38 compatible = "ns16550";
39 reg = <0 0x31100 0xa00>;
40 reg-shift = <2>;
41 reg-io-width = <4>;
42 clock-frequency = <133333333>;
43 interrupt-parent = <&pic>;
44 interrupts = <18>;
45 };
46 i2c0: ocores@32000 {
47 compatible = "opencores,i2c-ocores";
48 #address-cells = <1>;
49 #size-cells = <0>;
50 reg = <0 0x32100 0xa00>;
51 reg-shift = <2>;
52 reg-io-width = <4>;
53 clock-frequency = <32000000>;
54 interrupt-parent = <&pic>;
55 interrupts = <30>;
56 };
57 i2c1: ocores@33000 {
58 compatible = "opencores,i2c-ocores";
59 #address-cells = <1>;
60 #size-cells = <0>;
61 reg = <0 0x33100 0xa00>;
62 reg-shift = <2>;
63 reg-io-width = <4>;
64 clock-frequency = <32000000>;
65 interrupt-parent = <&pic>;
66 interrupts = <31>;
67
68 rtc@68 {
69 compatible = "dallas,ds1374";
70 reg = <0x68>;
71 };
72
73 dtt@4c {
74 compatible = "national,lm90";
75 reg = <0x4c>;
76 };
77 };
78 pic: pic@4000 {
79 interrupt-controller;
80 #address-cells = <0>;
81 #interrupt-cells = <1>;
82 reg = <0 0x4000 0x200>;
83 };
84
85 nor_flash@1,0 {
86 compatible = "cfi-flash";
87 #address-cells = <1>;
88 #size-cells = <1>;
89 bank-width = <2>;
90 reg = <1 0 0x1000000>;
91
92 partition@0 {
93 label = "x-loader";
94 reg = <0x0 0x100000>; /* 1M */
95 read-only;
96 };
97
98 partition@100000 {
99 label = "u-boot";
100 reg = <0x100000 0x100000>; /* 1M */
101 };
102
103 partition@200000 {
104 label = "kernel";
105 reg = <0x200000 0x500000>; /* 5M */
106 };
107
108 partition@700000 {
109 label = "rootfs";
110 reg = <0x700000 0x800000>; /* 8M */
111 };
112
113 partition@f00000 {
114 label = "env";
115 reg = <0xf00000 0x100000>; /* 1M */
116 read-only;
117 };
118 };
119 };
120
121 chosen {
122 bootargs = "console=ttyS0,115200 rdinit=/sbin/init";
123 };
124 };
125
arch/mips/netlogic/xlp/setup.c
1 /* 1 /*
2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights 2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3 * reserved. 3 * reserved.
4 * 4 *
5 * This software is available to you under a choice of one of two 5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU 6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file 7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the NetLogic 8 * COPYING in the main directory of this source tree, or the NetLogic
9 * license below: 9 * license below:
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 14 *
15 * 1. Redistributions of source code must retain the above copyright 15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer. 16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright 17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in 18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the 19 * the documentation and/or other materials provided with the
20 * distribution. 20 * distribution.
21 * 21 *
22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR 22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE 25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35 #include <linux/kernel.h> 35 #include <linux/kernel.h>
36 #include <linux/serial_8250.h> 36 #include <linux/serial_8250.h>
37 #include <linux/pm.h> 37 #include <linux/pm.h>
38 #include <linux/bootmem.h> 38 #include <linux/bootmem.h>
39 39
40 #include <asm/reboot.h> 40 #include <asm/reboot.h>
41 #include <asm/time.h> 41 #include <asm/time.h>
42 #include <asm/bootinfo.h> 42 #include <asm/bootinfo.h>
43 43
44 #include <linux/of_fdt.h> 44 #include <linux/of_fdt.h>
45 #include <linux/of_platform.h> 45 #include <linux/of_platform.h>
46 #include <linux/of_device.h> 46 #include <linux/of_device.h>
47 47
48 #include <asm/netlogic/haldefs.h> 48 #include <asm/netlogic/haldefs.h>
49 #include <asm/netlogic/common.h> 49 #include <asm/netlogic/common.h>
50 50
51 #include <asm/netlogic/xlp-hal/iomap.h> 51 #include <asm/netlogic/xlp-hal/iomap.h>
52 #include <asm/netlogic/xlp-hal/xlp.h> 52 #include <asm/netlogic/xlp-hal/xlp.h>
53 #include <asm/netlogic/xlp-hal/sys.h> 53 #include <asm/netlogic/xlp-hal/sys.h>
54 54
55 uint64_t nlm_io_base; 55 uint64_t nlm_io_base;
56 struct nlm_soc_info nlm_nodes[NLM_NR_NODES]; 56 struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
57 cpumask_t nlm_cpumask = CPU_MASK_CPU0; 57 cpumask_t nlm_cpumask = CPU_MASK_CPU0;
58 unsigned int nlm_threads_per_core; 58 unsigned int nlm_threads_per_core;
59 extern u32 __dtb_start[]; 59 extern u32 __dtb_xlp_evp_begin[], __dtb_xlp_svp_begin[], __dtb_start[];
60 60
61 static void nlm_linux_exit(void) 61 static void nlm_linux_exit(void)
62 { 62 {
63 uint64_t sysbase = nlm_get_node(0)->sysbase; 63 uint64_t sysbase = nlm_get_node(0)->sysbase;
64 64
65 nlm_write_sys_reg(sysbase, SYS_CHIP_RESET, 1); 65 nlm_write_sys_reg(sysbase, SYS_CHIP_RESET, 1);
66 for ( ; ; ) 66 for ( ; ; )
67 cpu_wait(); 67 cpu_wait();
68 } 68 }
69 69
70 void __init plat_mem_setup(void) 70 void __init plat_mem_setup(void)
71 { 71 {
72 void *fdtp; 72 void *fdtp;
73 73
74 panic_timeout = 5; 74 panic_timeout = 5;
75 _machine_restart = (void (*)(char *))nlm_linux_exit; 75 _machine_restart = (void (*)(char *))nlm_linux_exit;
76 _machine_halt = nlm_linux_exit; 76 _machine_halt = nlm_linux_exit;
77 pm_power_off = nlm_linux_exit; 77 pm_power_off = nlm_linux_exit;
78 78
79 /* 79 /*
80 * If no FDT pointer is passed in, use the built-in FDT. 80 * If no FDT pointer is passed in, use the built-in FDT.
81 * device_tree_init() does not handle CKSEG0 pointers in 81 * device_tree_init() does not handle CKSEG0 pointers in
82 * 64-bit, so convert pointer. 82 * 64-bit, so convert pointer.
83 */ 83 */
84 fdtp = (void *)(long)fw_arg0; 84 fdtp = (void *)(long)fw_arg0;
85 if (!fdtp) 85 if (!fdtp) {
86 fdtp = __dtb_start; 86 switch (current_cpu_data.processor_id & 0xff00) {
87 #ifdef CONFIG_DT_XLP_SVP
88 case PRID_IMP_NETLOGIC_XLP3XX:
89 fdtp = __dtb_xlp_svp_begin;
90 break;
91 #endif
92 #ifdef CONFIG_DT_XLP_EVP
93 case PRID_IMP_NETLOGIC_XLP8XX:
94 fdtp = __dtb_xlp_evp_begin;
95 break;
96 #endif
97 default:
98 /* Pick a built-in if any, and hope for the best */
99 fdtp = __dtb_start;
100 break;
101 }
102 }
87 fdtp = phys_to_virt(__pa(fdtp)); 103 fdtp = phys_to_virt(__pa(fdtp));
88 early_init_devtree(fdtp); 104 early_init_devtree(fdtp);
89 } 105 }
90 106
91 const char *get_system_type(void) 107 const char *get_system_type(void)
92 { 108 {
93 return "Netlogic XLP Series"; 109 return "Netlogic XLP Series";
94 } 110 }
95 111
96 void __init prom_free_prom_memory(void) 112 void __init prom_free_prom_memory(void)
97 { 113 {
98 /* Nothing yet */ 114 /* Nothing yet */
99 } 115 }
100 116
101 void xlp_mmu_init(void) 117 void xlp_mmu_init(void)
102 { 118 {
103 /* enable extended TLB and Large Fixed TLB */ 119 /* enable extended TLB and Large Fixed TLB */
104 write_c0_config6(read_c0_config6() | 0x24); 120 write_c0_config6(read_c0_config6() | 0x24);
105 121
106 /* set page mask of Fixed TLB in config7 */ 122 /* set page mask of Fixed TLB in config7 */
107 write_c0_config7(PM_DEFAULT_MASK >> 123 write_c0_config7(PM_DEFAULT_MASK >>
108 (13 + (ffz(PM_DEFAULT_MASK >> 13) / 2))); 124 (13 + (ffz(PM_DEFAULT_MASK >> 13) / 2)));
109 } 125 }
110 126
111 void nlm_percpu_init(int hwcpuid) 127 void nlm_percpu_init(int hwcpuid)
112 { 128 {
113 } 129 }
114 130
115 void __init prom_init(void) 131 void __init prom_init(void)
116 { 132 {
117 nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE); 133 nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
118 xlp_mmu_init(); 134 xlp_mmu_init();
119 nlm_node_init(0); 135 nlm_node_init(0);
120 136
121 #ifdef CONFIG_SMP 137 #ifdef CONFIG_SMP
122 cpumask_setall(&nlm_cpumask); 138 cpumask_setall(&nlm_cpumask);
123 nlm_wakeup_secondary_cpus(); 139 nlm_wakeup_secondary_cpus();
124 140
125 /* update TLB size after waking up threads */ 141 /* update TLB size after waking up threads */
126 current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1; 142 current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1;
127 143
128 register_smp_ops(&nlm_smp_ops); 144 register_smp_ops(&nlm_smp_ops);
129 #endif 145 #endif
130 } 146 }
131 147
132 void __init device_tree_init(void) 148 void __init device_tree_init(void)
133 { 149 {
134 unsigned long base, size; 150 unsigned long base, size;
135 151
136 if (!initial_boot_params) 152 if (!initial_boot_params)
137 return; 153 return;
138 154
139 base = virt_to_phys((void *)initial_boot_params); 155 base = virt_to_phys((void *)initial_boot_params);
140 size = be32_to_cpu(initial_boot_params->totalsize); 156 size = be32_to_cpu(initial_boot_params->totalsize);
141 157
142 /* Before we do anything, lets reserve the dt blob */ 158 /* Before we do anything, lets reserve the dt blob */
143 reserve_bootmem(base, size, BOOTMEM_DEFAULT); 159 reserve_bootmem(base, size, BOOTMEM_DEFAULT);
144 160
145 unflatten_device_tree(); 161 unflatten_device_tree();
146 162
147 /* free the space reserved for the dt blob */ 163 /* free the space reserved for the dt blob */
148 free_bootmem(base, size); 164 free_bootmem(base, size);
149 } 165 }
150 166
151 static struct of_device_id __initdata xlp_ids[] = { 167 static struct of_device_id __initdata xlp_ids[] = {
152 { .compatible = "simple-bus", }, 168 { .compatible = "simple-bus", },
153 {}, 169 {},
154 }; 170 };
155 171
156 int __init xlp8xx_ds_publish_devices(void) 172 int __init xlp8xx_ds_publish_devices(void)
157 { 173 {
158 if (!of_have_populated_dt()) 174 if (!of_have_populated_dt())
159 return 0; 175 return 0;
160 return of_platform_bus_probe(NULL, xlp_ids, NULL); 176 return of_platform_bus_probe(NULL, xlp_ids, NULL);
161 } 177 }
162 178
163 device_initcall(xlp8xx_ds_publish_devices); 179 device_initcall(xlp8xx_ds_publish_devices);
164 180