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Commit 1e3ce2b8545390a2aee8dbfcd49ca4161b636000

Authored by Jean-Christophe PLAGNIOL-VILLARD
Committed by Nicolas Ferre
1 parent 1441bd325b
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

ARN: at91: introduce SOC_AT91xxx define to allow to compile SoC core support 

We can now compile all SoC core support together and DT boards.
We still can not compile together the non DT board.
So We keep the ARCH_AT91xxx for the non DT board and for backward defconfig
compatibility. This will enable the plaform_device ressources.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Showing 7 changed files with 101 additions and 62 deletions Inline Diff

arch/arm/configs/at91rm9200_defconfig
Diff comments   View file @ 1e3ce2b
1 CONFIG_EXPERIMENTAL=y 1 CONFIG_EXPERIMENTAL=y
2 # CONFIG_LOCALVERSION_AUTO is not set 2 # CONFIG_LOCALVERSION_AUTO is not set
3 # CONFIG_SWAP is not set 3 # CONFIG_SWAP is not set
4 CONFIG_SYSVIPC=y 4 CONFIG_SYSVIPC=y
5 CONFIG_IKCONFIG=y 5 CONFIG_IKCONFIG=y
6 CONFIG_IKCONFIG_PROC=y 6 CONFIG_IKCONFIG_PROC=y
7 CONFIG_LOG_BUF_SHIFT=14 7 CONFIG_LOG_BUF_SHIFT=14
8 CONFIG_BLK_DEV_INITRD=y 8 CONFIG_BLK_DEV_INITRD=y
9 CONFIG_MODULES=y 9 CONFIG_MODULES=y
10 CONFIG_MODULE_FORCE_LOAD=y 10 CONFIG_MODULE_FORCE_LOAD=y
11 CONFIG_MODULE_UNLOAD=y 11 CONFIG_MODULE_UNLOAD=y
12 CONFIG_MODVERSIONS=y 12 CONFIG_MODVERSIONS=y
13 CONFIG_MODULE_SRCVERSION_ALL=y 13 CONFIG_MODULE_SRCVERSION_ALL=y
14 # CONFIG_BLK_DEV_BSG is not set 14 # CONFIG_BLK_DEV_BSG is not set
15 # CONFIG_IOSCHED_CFQ is not set 15 # CONFIG_IOSCHED_CFQ is not set
16 CONFIG_ARCH_AT91=y 16 CONFIG_ARCH_AT91=y
17 CONFIG_ARCH_AT91RM9200=y
17 CONFIG_MACH_ONEARM=y 18 CONFIG_MACH_ONEARM=y
18 CONFIG_ARCH_AT91RM9200DK=y 19 CONFIG_ARCH_AT91RM9200DK=y
19 CONFIG_MACH_AT91RM9200EK=y 20 CONFIG_MACH_AT91RM9200EK=y
20 CONFIG_MACH_CSB337=y 21 CONFIG_MACH_CSB337=y
21 CONFIG_MACH_CSB637=y 22 CONFIG_MACH_CSB637=y
22 CONFIG_MACH_CARMEVA=y 23 CONFIG_MACH_CARMEVA=y
23 CONFIG_MACH_ATEB9200=y 24 CONFIG_MACH_ATEB9200=y
24 CONFIG_MACH_KB9200=y 25 CONFIG_MACH_KB9200=y
25 CONFIG_MACH_PICOTUX2XX=y 26 CONFIG_MACH_PICOTUX2XX=y
26 CONFIG_MACH_KAFA=y 27 CONFIG_MACH_KAFA=y
27 CONFIG_MACH_ECBAT91=y 28 CONFIG_MACH_ECBAT91=y
28 CONFIG_MACH_YL9200=y 29 CONFIG_MACH_YL9200=y
29 CONFIG_MACH_CPUAT91=y 30 CONFIG_MACH_CPUAT91=y
30 CONFIG_MACH_ECO920=y 31 CONFIG_MACH_ECO920=y
31 CONFIG_MTD_AT91_DATAFLASH_CARD=y 32 CONFIG_MTD_AT91_DATAFLASH_CARD=y
32 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y 33 CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
33 CONFIG_AT91_TIMER_HZ=100 34 CONFIG_AT91_TIMER_HZ=100
34 # CONFIG_ARM_THUMB is not set 35 # CONFIG_ARM_THUMB is not set
35 CONFIG_PCCARD=y 36 CONFIG_PCCARD=y
36 CONFIG_AT91_CF=y 37 CONFIG_AT91_CF=y
37 CONFIG_NO_HZ=y 38 CONFIG_NO_HZ=y
38 CONFIG_HIGH_RES_TIMERS=y 39 CONFIG_HIGH_RES_TIMERS=y
39 CONFIG_PREEMPT=y 40 CONFIG_PREEMPT=y
40 CONFIG_AEABI=y 41 CONFIG_AEABI=y
41 CONFIG_LEDS=y 42 CONFIG_LEDS=y
42 CONFIG_LEDS_CPU=y 43 CONFIG_LEDS_CPU=y
43 CONFIG_ZBOOT_ROM_TEXT=0x10000000 44 CONFIG_ZBOOT_ROM_TEXT=0x10000000
44 CONFIG_ZBOOT_ROM_BSS=0x20040000 45 CONFIG_ZBOOT_ROM_BSS=0x20040000
45 CONFIG_KEXEC=y 46 CONFIG_KEXEC=y
46 CONFIG_FPE_NWFPE=y 47 CONFIG_FPE_NWFPE=y
47 CONFIG_BINFMT_MISC=y 48 CONFIG_BINFMT_MISC=y
48 CONFIG_NET=y 49 CONFIG_NET=y
49 CONFIG_PACKET=y 50 CONFIG_PACKET=y
50 CONFIG_UNIX=y 51 CONFIG_UNIX=y
51 CONFIG_XFRM_USER=m 52 CONFIG_XFRM_USER=m
52 CONFIG_INET=y 53 CONFIG_INET=y
53 CONFIG_IP_MULTICAST=y 54 CONFIG_IP_MULTICAST=y
54 CONFIG_IP_PNP=y 55 CONFIG_IP_PNP=y
55 CONFIG_IP_PNP_DHCP=y 56 CONFIG_IP_PNP_DHCP=y
56 CONFIG_IP_PNP_BOOTP=y 57 CONFIG_IP_PNP_BOOTP=y
57 CONFIG_NET_IPIP=m 58 CONFIG_NET_IPIP=m
58 CONFIG_INET_AH=m 59 CONFIG_INET_AH=m
59 CONFIG_INET_ESP=m 60 CONFIG_INET_ESP=m
60 CONFIG_INET_IPCOMP=m 61 CONFIG_INET_IPCOMP=m
61 CONFIG_INET_XFRM_MODE_TRANSPORT=m 62 CONFIG_INET_XFRM_MODE_TRANSPORT=m
62 CONFIG_INET_XFRM_MODE_TUNNEL=m 63 CONFIG_INET_XFRM_MODE_TUNNEL=m
63 CONFIG_INET_XFRM_MODE_BEET=m 64 CONFIG_INET_XFRM_MODE_BEET=m
64 CONFIG_IPV6_PRIVACY=y 65 CONFIG_IPV6_PRIVACY=y
65 CONFIG_IPV6_ROUTER_PREF=y 66 CONFIG_IPV6_ROUTER_PREF=y
66 CONFIG_IPV6_ROUTE_INFO=y 67 CONFIG_IPV6_ROUTE_INFO=y
67 CONFIG_INET6_AH=m 68 CONFIG_INET6_AH=m
68 CONFIG_INET6_ESP=m 69 CONFIG_INET6_ESP=m
69 CONFIG_INET6_IPCOMP=m 70 CONFIG_INET6_IPCOMP=m
70 CONFIG_IPV6_MIP6=m 71 CONFIG_IPV6_MIP6=m
71 CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m 72 CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
72 CONFIG_IPV6_TUNNEL=m 73 CONFIG_IPV6_TUNNEL=m
73 CONFIG_BRIDGE=m 74 CONFIG_BRIDGE=m
74 CONFIG_VLAN_8021Q=m 75 CONFIG_VLAN_8021Q=m
75 CONFIG_BT=m 76 CONFIG_BT=m
76 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 77 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
77 CONFIG_MTD=y 78 CONFIG_MTD=y
78 CONFIG_MTD_CMDLINE_PARTS=y 79 CONFIG_MTD_CMDLINE_PARTS=y
79 CONFIG_MTD_AFS_PARTS=y 80 CONFIG_MTD_AFS_PARTS=y
80 CONFIG_MTD_CHAR=y 81 CONFIG_MTD_CHAR=y
81 CONFIG_MTD_BLOCK=y 82 CONFIG_MTD_BLOCK=y
82 CONFIG_MTD_CFI=y 83 CONFIG_MTD_CFI=y
83 CONFIG_MTD_JEDECPROBE=y 84 CONFIG_MTD_JEDECPROBE=y
84 CONFIG_MTD_CFI_INTELEXT=y 85 CONFIG_MTD_CFI_INTELEXT=y
85 CONFIG_MTD_CFI_AMDSTD=y 86 CONFIG_MTD_CFI_AMDSTD=y
86 CONFIG_MTD_COMPLEX_MAPPINGS=y 87 CONFIG_MTD_COMPLEX_MAPPINGS=y
87 CONFIG_MTD_PHYSMAP=y 88 CONFIG_MTD_PHYSMAP=y
88 CONFIG_MTD_PLATRAM=y 89 CONFIG_MTD_PLATRAM=y
89 CONFIG_MTD_DATAFLASH=y 90 CONFIG_MTD_DATAFLASH=y
90 CONFIG_MTD_NAND=y 91 CONFIG_MTD_NAND=y
91 CONFIG_MTD_NAND_ATMEL=y 92 CONFIG_MTD_NAND_ATMEL=y
92 CONFIG_MTD_NAND_PLATFORM=y 93 CONFIG_MTD_NAND_PLATFORM=y
93 CONFIG_MTD_UBI=y 94 CONFIG_MTD_UBI=y
94 CONFIG_MTD_UBI_GLUEBI=y 95 CONFIG_MTD_UBI_GLUEBI=y
95 CONFIG_BLK_DEV_LOOP=y 96 CONFIG_BLK_DEV_LOOP=y
96 CONFIG_BLK_DEV_NBD=y 97 CONFIG_BLK_DEV_NBD=y
97 CONFIG_BLK_DEV_RAM=y 98 CONFIG_BLK_DEV_RAM=y
98 CONFIG_BLK_DEV_RAM_SIZE=8192 99 CONFIG_BLK_DEV_RAM_SIZE=8192
99 CONFIG_SCSI=y 100 CONFIG_SCSI=y
100 CONFIG_BLK_DEV_SD=y 101 CONFIG_BLK_DEV_SD=y
101 CONFIG_BLK_DEV_SR=m 102 CONFIG_BLK_DEV_SR=m
102 CONFIG_BLK_DEV_SR_VENDOR=y 103 CONFIG_BLK_DEV_SR_VENDOR=y
103 CONFIG_CHR_DEV_SG=m 104 CONFIG_CHR_DEV_SG=m
104 CONFIG_SCSI_MULTI_LUN=y 105 CONFIG_SCSI_MULTI_LUN=y
105 # CONFIG_SCSI_LOWLEVEL is not set 106 # CONFIG_SCSI_LOWLEVEL is not set
106 CONFIG_NETDEVICES=y 107 CONFIG_NETDEVICES=y
107 CONFIG_TUN=m 108 CONFIG_TUN=m
108 CONFIG_ARM_AT91_ETHER=y 109 CONFIG_ARM_AT91_ETHER=y
109 CONFIG_PHYLIB=y 110 CONFIG_PHYLIB=y
110 CONFIG_DAVICOM_PHY=y 111 CONFIG_DAVICOM_PHY=y
111 CONFIG_SMSC_PHY=y 112 CONFIG_SMSC_PHY=y
112 CONFIG_MICREL_PHY=y 113 CONFIG_MICREL_PHY=y
113 CONFIG_PPP=y 114 CONFIG_PPP=y
114 CONFIG_PPP_BSDCOMP=y 115 CONFIG_PPP_BSDCOMP=y
115 CONFIG_PPP_DEFLATE=y 116 CONFIG_PPP_DEFLATE=y
116 CONFIG_PPP_FILTER=y 117 CONFIG_PPP_FILTER=y
117 CONFIG_PPP_MPPE=m 118 CONFIG_PPP_MPPE=m
118 CONFIG_PPP_MULTILINK=y 119 CONFIG_PPP_MULTILINK=y
119 CONFIG_PPPOE=m 120 CONFIG_PPPOE=m
120 CONFIG_PPP_ASYNC=y 121 CONFIG_PPP_ASYNC=y
121 CONFIG_SLIP=m 122 CONFIG_SLIP=m
122 CONFIG_SLIP_COMPRESSED=y 123 CONFIG_SLIP_COMPRESSED=y
123 CONFIG_SLIP_SMART=y 124 CONFIG_SLIP_SMART=y
124 CONFIG_SLIP_MODE_SLIP6=y 125 CONFIG_SLIP_MODE_SLIP6=y
125 CONFIG_USB_CATC=m 126 CONFIG_USB_CATC=m
126 CONFIG_USB_KAWETH=m 127 CONFIG_USB_KAWETH=m
127 CONFIG_USB_PEGASUS=m 128 CONFIG_USB_PEGASUS=m
128 CONFIG_USB_RTL8150=m 129 CONFIG_USB_RTL8150=m
129 CONFIG_USB_USBNET=m 130 CONFIG_USB_USBNET=m
130 CONFIG_USB_NET_DM9601=m 131 CONFIG_USB_NET_DM9601=m
131 CONFIG_USB_NET_GL620A=m 132 CONFIG_USB_NET_GL620A=m
132 CONFIG_USB_NET_PLUSB=m 133 CONFIG_USB_NET_PLUSB=m
133 CONFIG_USB_NET_RNDIS_HOST=m 134 CONFIG_USB_NET_RNDIS_HOST=m
134 CONFIG_USB_ALI_M5632=y 135 CONFIG_USB_ALI_M5632=y
135 CONFIG_USB_AN2720=y 136 CONFIG_USB_AN2720=y
136 CONFIG_USB_EPSON2888=y 137 CONFIG_USB_EPSON2888=y
137 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set 138 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
138 CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 139 CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
139 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 140 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
140 CONFIG_INPUT_EVDEV=y 141 CONFIG_INPUT_EVDEV=y
141 CONFIG_KEYBOARD_GPIO=y 142 CONFIG_KEYBOARD_GPIO=y
142 # CONFIG_INPUT_MOUSE is not set 143 # CONFIG_INPUT_MOUSE is not set
143 CONFIG_INPUT_TOUCHSCREEN=y 144 CONFIG_INPUT_TOUCHSCREEN=y
144 CONFIG_LEGACY_PTY_COUNT=32 145 CONFIG_LEGACY_PTY_COUNT=32
145 CONFIG_SERIAL_ATMEL=y 146 CONFIG_SERIAL_ATMEL=y
146 CONFIG_SERIAL_ATMEL_CONSOLE=y 147 CONFIG_SERIAL_ATMEL_CONSOLE=y
147 CONFIG_HW_RANDOM=y 148 CONFIG_HW_RANDOM=y
148 CONFIG_I2C=y 149 CONFIG_I2C=y
149 CONFIG_I2C_CHARDEV=y 150 CONFIG_I2C_CHARDEV=y
150 CONFIG_I2C_GPIO=y 151 CONFIG_I2C_GPIO=y
151 CONFIG_SPI=y 152 CONFIG_SPI=y
152 CONFIG_SPI_ATMEL=y 153 CONFIG_SPI_ATMEL=y
153 CONFIG_SPI_BITBANG=y 154 CONFIG_SPI_BITBANG=y
154 CONFIG_GPIO_SYSFS=y 155 CONFIG_GPIO_SYSFS=y
155 CONFIG_HWMON=m 156 CONFIG_HWMON=m
156 CONFIG_SENSORS_ADM1021=m 157 CONFIG_SENSORS_ADM1021=m
157 CONFIG_SENSORS_ADM1025=m 158 CONFIG_SENSORS_ADM1025=m
158 CONFIG_SENSORS_ADM1026=m 159 CONFIG_SENSORS_ADM1026=m
159 CONFIG_SENSORS_ADM1029=m 160 CONFIG_SENSORS_ADM1029=m
160 CONFIG_SENSORS_ADM1031=m 161 CONFIG_SENSORS_ADM1031=m
161 CONFIG_SENSORS_ADM9240=m 162 CONFIG_SENSORS_ADM9240=m
162 CONFIG_SENSORS_DS1621=m 163 CONFIG_SENSORS_DS1621=m
163 CONFIG_SENSORS_GL518SM=m 164 CONFIG_SENSORS_GL518SM=m
164 CONFIG_SENSORS_GL520SM=m 165 CONFIG_SENSORS_GL520SM=m
165 CONFIG_SENSORS_IT87=m 166 CONFIG_SENSORS_IT87=m
166 CONFIG_SENSORS_LM63=m 167 CONFIG_SENSORS_LM63=m
167 CONFIG_SENSORS_LM73=m 168 CONFIG_SENSORS_LM73=m
168 CONFIG_SENSORS_LM75=m 169 CONFIG_SENSORS_LM75=m
169 CONFIG_SENSORS_LM77=m 170 CONFIG_SENSORS_LM77=m
170 CONFIG_SENSORS_LM78=m 171 CONFIG_SENSORS_LM78=m
171 CONFIG_SENSORS_LM80=m 172 CONFIG_SENSORS_LM80=m
172 CONFIG_SENSORS_LM83=m 173 CONFIG_SENSORS_LM83=m
173 CONFIG_SENSORS_LM85=m 174 CONFIG_SENSORS_LM85=m
174 CONFIG_SENSORS_LM87=m 175 CONFIG_SENSORS_LM87=m
175 CONFIG_SENSORS_LM90=m 176 CONFIG_SENSORS_LM90=m
176 CONFIG_SENSORS_LM92=m 177 CONFIG_SENSORS_LM92=m
177 CONFIG_SENSORS_MAX1619=m 178 CONFIG_SENSORS_MAX1619=m
178 CONFIG_SENSORS_PCF8591=m 179 CONFIG_SENSORS_PCF8591=m
179 CONFIG_SENSORS_SMSC47B397=m 180 CONFIG_SENSORS_SMSC47B397=m
180 CONFIG_SENSORS_W83781D=m 181 CONFIG_SENSORS_W83781D=m
181 CONFIG_SENSORS_W83791D=m 182 CONFIG_SENSORS_W83791D=m
182 CONFIG_SENSORS_W83792D=m 183 CONFIG_SENSORS_W83792D=m
183 CONFIG_SENSORS_W83793=m 184 CONFIG_SENSORS_W83793=m
184 CONFIG_SENSORS_W83L785TS=m 185 CONFIG_SENSORS_W83L785TS=m
185 CONFIG_WATCHDOG=y 186 CONFIG_WATCHDOG=y
186 CONFIG_WATCHDOG_NOWAYOUT=y 187 CONFIG_WATCHDOG_NOWAYOUT=y
187 CONFIG_AT91RM9200_WATCHDOG=y 188 CONFIG_AT91RM9200_WATCHDOG=y
188 CONFIG_FB=y 189 CONFIG_FB=y
189 CONFIG_FB_MODE_HELPERS=y 190 CONFIG_FB_MODE_HELPERS=y
190 CONFIG_FB_TILEBLITTING=y 191 CONFIG_FB_TILEBLITTING=y
191 CONFIG_FB_S1D13XXX=y 192 CONFIG_FB_S1D13XXX=y
192 CONFIG_BACKLIGHT_LCD_SUPPORT=y 193 CONFIG_BACKLIGHT_LCD_SUPPORT=y
193 CONFIG_LCD_CLASS_DEVICE=y 194 CONFIG_LCD_CLASS_DEVICE=y
194 CONFIG_BACKLIGHT_CLASS_DEVICE=y 195 CONFIG_BACKLIGHT_CLASS_DEVICE=y
195 # CONFIG_BACKLIGHT_GENERIC is not set 196 # CONFIG_BACKLIGHT_GENERIC is not set
196 CONFIG_DISPLAY_SUPPORT=y 197 CONFIG_DISPLAY_SUPPORT=y
197 CONFIG_FRAMEBUFFER_CONSOLE=y 198 CONFIG_FRAMEBUFFER_CONSOLE=y
198 CONFIG_FONTS=y 199 CONFIG_FONTS=y
199 CONFIG_FONT_MINI_4x6=y 200 CONFIG_FONT_MINI_4x6=y
200 CONFIG_LOGO=y 201 CONFIG_LOGO=y
201 # CONFIG_LOGO_LINUX_MONO is not set 202 # CONFIG_LOGO_LINUX_MONO is not set
202 # CONFIG_LOGO_LINUX_VGA16 is not set 203 # CONFIG_LOGO_LINUX_VGA16 is not set
203 CONFIG_USB=y 204 CONFIG_USB=y
204 CONFIG_USB_DEVICEFS=y 205 CONFIG_USB_DEVICEFS=y
205 # CONFIG_USB_DEVICE_CLASS is not set 206 # CONFIG_USB_DEVICE_CLASS is not set
206 CONFIG_USB_MON=y 207 CONFIG_USB_MON=y
207 CONFIG_USB_OHCI_HCD=y 208 CONFIG_USB_OHCI_HCD=y
208 CONFIG_USB_ACM=m 209 CONFIG_USB_ACM=m
209 CONFIG_USB_PRINTER=m 210 CONFIG_USB_PRINTER=m
210 CONFIG_USB_STORAGE=y 211 CONFIG_USB_STORAGE=y
211 CONFIG_USB_SERIAL=y 212 CONFIG_USB_SERIAL=y
212 CONFIG_USB_SERIAL_CONSOLE=y 213 CONFIG_USB_SERIAL_CONSOLE=y
213 CONFIG_USB_SERIAL_GENERIC=y 214 CONFIG_USB_SERIAL_GENERIC=y
214 CONFIG_USB_SERIAL_FTDI_SIO=y 215 CONFIG_USB_SERIAL_FTDI_SIO=y
215 CONFIG_USB_SERIAL_KEYSPAN=y 216 CONFIG_USB_SERIAL_KEYSPAN=y
216 CONFIG_USB_SERIAL_KEYSPAN_MPR=y 217 CONFIG_USB_SERIAL_KEYSPAN_MPR=y
217 CONFIG_USB_SERIAL_KEYSPAN_USA28=y 218 CONFIG_USB_SERIAL_KEYSPAN_USA28=y
218 CONFIG_USB_SERIAL_KEYSPAN_USA28X=y 219 CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
219 CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y 220 CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
220 CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y 221 CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
221 CONFIG_USB_SERIAL_KEYSPAN_USA19=y 222 CONFIG_USB_SERIAL_KEYSPAN_USA19=y
222 CONFIG_USB_SERIAL_KEYSPAN_USA18X=y 223 CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
223 CONFIG_USB_SERIAL_KEYSPAN_USA19W=y 224 CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
224 CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y 225 CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
225 CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y 226 CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
226 CONFIG_USB_SERIAL_KEYSPAN_USA49W=y 227 CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
227 CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y 228 CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
228 CONFIG_USB_SERIAL_MCT_U232=y 229 CONFIG_USB_SERIAL_MCT_U232=y
229 CONFIG_USB_SERIAL_PL2303=y 230 CONFIG_USB_SERIAL_PL2303=y
230 CONFIG_USB_GADGET=y 231 CONFIG_USB_GADGET=y
231 CONFIG_USB_ETH=m 232 CONFIG_USB_ETH=m
232 CONFIG_USB_MASS_STORAGE=m 233 CONFIG_USB_MASS_STORAGE=m
233 CONFIG_MMC=y 234 CONFIG_MMC=y
234 CONFIG_MMC_AT91=y 235 CONFIG_MMC_AT91=y
235 CONFIG_NEW_LEDS=y 236 CONFIG_NEW_LEDS=y
236 CONFIG_LEDS_CLASS=y 237 CONFIG_LEDS_CLASS=y
237 CONFIG_LEDS_GPIO=y 238 CONFIG_LEDS_GPIO=y
238 CONFIG_LEDS_TRIGGERS=y 239 CONFIG_LEDS_TRIGGERS=y
239 CONFIG_LEDS_TRIGGER_TIMER=y 240 CONFIG_LEDS_TRIGGER_TIMER=y
240 CONFIG_LEDS_TRIGGER_HEARTBEAT=y 241 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
241 CONFIG_LEDS_TRIGGER_GPIO=y 242 CONFIG_LEDS_TRIGGER_GPIO=y
242 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y 243 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
243 CONFIG_RTC_CLASS=y 244 CONFIG_RTC_CLASS=y
244 # CONFIG_RTC_HCTOSYS is not set 245 # CONFIG_RTC_HCTOSYS is not set
245 CONFIG_RTC_DRV_DS1307=y 246 CONFIG_RTC_DRV_DS1307=y
246 CONFIG_RTC_DRV_PCF8563=y 247 CONFIG_RTC_DRV_PCF8563=y
247 CONFIG_RTC_DRV_AT91RM9200=y 248 CONFIG_RTC_DRV_AT91RM9200=y
248 CONFIG_EXT2_FS=y 249 CONFIG_EXT2_FS=y
249 CONFIG_EXT2_FS_XATTR=y 250 CONFIG_EXT2_FS_XATTR=y
250 CONFIG_EXT3_FS=y 251 CONFIG_EXT3_FS=y
251 # CONFIG_EXT3_FS_XATTR is not set 252 # CONFIG_EXT3_FS_XATTR is not set
252 CONFIG_REISERFS_FS=y 253 CONFIG_REISERFS_FS=y
253 CONFIG_AUTOFS4_FS=y 254 CONFIG_AUTOFS4_FS=y
254 CONFIG_ISO9660_FS=y 255 CONFIG_ISO9660_FS=y
255 CONFIG_JOLIET=y 256 CONFIG_JOLIET=y
256 CONFIG_ZISOFS=y 257 CONFIG_ZISOFS=y
257 CONFIG_UDF_FS=y 258 CONFIG_UDF_FS=y
258 CONFIG_MSDOS_FS=y 259 CONFIG_MSDOS_FS=y
259 CONFIG_VFAT_FS=y 260 CONFIG_VFAT_FS=y
260 CONFIG_NTFS_FS=m 261 CONFIG_NTFS_FS=m
261 CONFIG_TMPFS=y 262 CONFIG_TMPFS=y
262 CONFIG_CONFIGFS_FS=y 263 CONFIG_CONFIGFS_FS=y
263 CONFIG_JFFS2_FS=y 264 CONFIG_JFFS2_FS=y
264 CONFIG_JFFS2_SUMMARY=y 265 CONFIG_JFFS2_SUMMARY=y
265 CONFIG_JFFS2_COMPRESSION_OPTIONS=y 266 CONFIG_JFFS2_COMPRESSION_OPTIONS=y
266 CONFIG_JFFS2_LZO=y 267 CONFIG_JFFS2_LZO=y
267 CONFIG_JFFS2_RUBIN=y 268 CONFIG_JFFS2_RUBIN=y
268 CONFIG_CRAMFS=y 269 CONFIG_CRAMFS=y
269 CONFIG_MINIX_FS=y 270 CONFIG_MINIX_FS=y
270 CONFIG_NFS_FS=y 271 CONFIG_NFS_FS=y
271 CONFIG_NFS_V3=y 272 CONFIG_NFS_V3=y
272 CONFIG_NFS_V3_ACL=y 273 CONFIG_NFS_V3_ACL=y
273 CONFIG_NFS_V4=y 274 CONFIG_NFS_V4=y
274 CONFIG_ROOT_NFS=y 275 CONFIG_ROOT_NFS=y
275 CONFIG_NFSD=y 276 CONFIG_NFSD=y
276 CONFIG_CIFS=m 277 CONFIG_CIFS=m
277 CONFIG_PARTITION_ADVANCED=y 278 CONFIG_PARTITION_ADVANCED=y
278 CONFIG_MAC_PARTITION=y 279 CONFIG_MAC_PARTITION=y
279 CONFIG_NLS_CODEPAGE_437=y 280 CONFIG_NLS_CODEPAGE_437=y
280 CONFIG_NLS_CODEPAGE_737=m 281 CONFIG_NLS_CODEPAGE_737=m
281 CONFIG_NLS_CODEPAGE_775=m 282 CONFIG_NLS_CODEPAGE_775=m
282 CONFIG_NLS_CODEPAGE_850=m 283 CONFIG_NLS_CODEPAGE_850=m
283 CONFIG_NLS_CODEPAGE_852=m 284 CONFIG_NLS_CODEPAGE_852=m
284 CONFIG_NLS_CODEPAGE_855=m 285 CONFIG_NLS_CODEPAGE_855=m
285 CONFIG_NLS_CODEPAGE_857=m 286 CONFIG_NLS_CODEPAGE_857=m
286 CONFIG_NLS_CODEPAGE_860=m 287 CONFIG_NLS_CODEPAGE_860=m
287 CONFIG_NLS_CODEPAGE_861=m 288 CONFIG_NLS_CODEPAGE_861=m
288 CONFIG_NLS_CODEPAGE_862=m 289 CONFIG_NLS_CODEPAGE_862=m
289 CONFIG_NLS_CODEPAGE_863=m 290 CONFIG_NLS_CODEPAGE_863=m
290 CONFIG_NLS_CODEPAGE_864=m 291 CONFIG_NLS_CODEPAGE_864=m
291 CONFIG_NLS_CODEPAGE_865=m 292 CONFIG_NLS_CODEPAGE_865=m
292 CONFIG_NLS_CODEPAGE_866=m 293 CONFIG_NLS_CODEPAGE_866=m
293 CONFIG_NLS_CODEPAGE_869=m 294 CONFIG_NLS_CODEPAGE_869=m
294 CONFIG_NLS_CODEPAGE_936=m 295 CONFIG_NLS_CODEPAGE_936=m
295 CONFIG_NLS_CODEPAGE_950=m 296 CONFIG_NLS_CODEPAGE_950=m
296 CONFIG_NLS_CODEPAGE_932=m 297 CONFIG_NLS_CODEPAGE_932=m
297 CONFIG_NLS_CODEPAGE_949=m 298 CONFIG_NLS_CODEPAGE_949=m
298 CONFIG_NLS_CODEPAGE_874=m 299 CONFIG_NLS_CODEPAGE_874=m
299 CONFIG_NLS_ISO8859_8=m 300 CONFIG_NLS_ISO8859_8=m
300 CONFIG_NLS_CODEPAGE_1250=m 301 CONFIG_NLS_CODEPAGE_1250=m
301 CONFIG_NLS_CODEPAGE_1251=m 302 CONFIG_NLS_CODEPAGE_1251=m
302 CONFIG_NLS_ASCII=m 303 CONFIG_NLS_ASCII=m
303 CONFIG_NLS_ISO8859_1=y 304 CONFIG_NLS_ISO8859_1=y
304 CONFIG_NLS_ISO8859_2=m 305 CONFIG_NLS_ISO8859_2=m
305 CONFIG_NLS_ISO8859_3=m 306 CONFIG_NLS_ISO8859_3=m
306 CONFIG_NLS_ISO8859_4=m 307 CONFIG_NLS_ISO8859_4=m
307 CONFIG_NLS_ISO8859_5=m 308 CONFIG_NLS_ISO8859_5=m
308 CONFIG_NLS_ISO8859_6=m 309 CONFIG_NLS_ISO8859_6=m
309 CONFIG_NLS_ISO8859_7=m 310 CONFIG_NLS_ISO8859_7=m
310 CONFIG_NLS_ISO8859_9=m 311 CONFIG_NLS_ISO8859_9=m
311 CONFIG_NLS_ISO8859_13=m 312 CONFIG_NLS_ISO8859_13=m
312 CONFIG_NLS_ISO8859_14=m 313 CONFIG_NLS_ISO8859_14=m
313 CONFIG_NLS_ISO8859_15=m 314 CONFIG_NLS_ISO8859_15=m
314 CONFIG_NLS_KOI8_R=m 315 CONFIG_NLS_KOI8_R=m
315 CONFIG_NLS_KOI8_U=m 316 CONFIG_NLS_KOI8_U=m
316 CONFIG_NLS_UTF8=y 317 CONFIG_NLS_UTF8=y
317 CONFIG_MAGIC_SYSRQ=y 318 CONFIG_MAGIC_SYSRQ=y
318 CONFIG_DEBUG_FS=y 319 CONFIG_DEBUG_FS=y
319 CONFIG_DEBUG_KERNEL=y 320 CONFIG_DEBUG_KERNEL=y
320 # CONFIG_FTRACE is not set 321 # CONFIG_FTRACE is not set
321 CONFIG_CRYPTO_PCBC=y 322 CONFIG_CRYPTO_PCBC=y
322 CONFIG_CRYPTO_SHA1=y 323 CONFIG_CRYPTO_SHA1=y
323 324
arch/arm/mach-at91/Kconfig
Diff comments   View file @ 1e3ce2b
1 if ARCH_AT91 1 if ARCH_AT91
2 2
3 config HAVE_AT91_DATAFLASH_CARD 3 config HAVE_AT91_DATAFLASH_CARD
4 bool 4 bool
5 5
6 config HAVE_AT91_DBGU0 6 config HAVE_AT91_DBGU0
7 bool 7 bool
8 8
9 config HAVE_AT91_DBGU1 9 config HAVE_AT91_DBGU1
10 bool 10 bool
11 11
12 config AT91_SAM9_ALT_RESET 12 config AT91_SAM9_ALT_RESET
13 bool 13 bool
14 default !ARCH_AT91X40 14 default !ARCH_AT91X40
15 15
16 config AT91_SAM9G45_RESET 16 config AT91_SAM9G45_RESET
17 bool 17 bool
18 default !ARCH_AT91X40 18 default !ARCH_AT91X40
19 19
20 config SOC_AT91SAM9 20 config SOC_AT91SAM9
21 bool 21 bool
22 select GENERIC_CLOCKEVENTS 22 select GENERIC_CLOCKEVENTS
23 select CPU_ARM926T 23 select CPU_ARM926T
24 24
25 menu "Atmel AT91 System-on-Chip" 25 menu "Atmel AT91 System-on-Chip"
26 26
27 choice 27 comment "Atmel AT91 Processor"
28 prompt "Atmel AT91 Processor"
29 28
30 config ARCH_AT91RM9200 29 config SOC_AT91SAM9
30 bool
31 select CPU_ARM926T
32 select AT91_SAM9_TIME
33 select AT91_SAM9_SMC
34
35 config SOC_AT91RM9200
31 bool "AT91RM9200" 36 bool "AT91RM9200"
32 select CPU_ARM920T 37 select CPU_ARM920T
33 select GENERIC_CLOCKEVENTS 38 select GENERIC_CLOCKEVENTS
34 select HAVE_AT91_DBGU0 39 select HAVE_AT91_DBGU0
35 40
36 config ARCH_AT91SAM9260 41 config SOC_AT91SAM9260
37 bool "AT91SAM9260 or AT91SAM9XE" 42 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
38 select SOC_AT91SAM9 43 select SOC_AT91SAM9
39 select HAVE_AT91_DBGU0 44 select HAVE_AT91_DBGU0
40 select HAVE_NET_MACB 45 select HAVE_NET_MACB
46 help
47 Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
48 or AT91SAM9G20 SoC.
41 49
42 config ARCH_AT91SAM9261 50 config SOC_AT91SAM9261
43 bool "AT91SAM9261" 51 bool "AT91SAM9261 or AT91SAM9G10"
44 select SOC_AT91SAM9 52 select SOC_AT91SAM9
45 select HAVE_FB_ATMEL
46 select HAVE_AT91_DBGU0 53 select HAVE_AT91_DBGU0
47
48 config ARCH_AT91SAM9G10
49 bool "AT91SAM9G10"
50 select SOC_AT91SAM9
51 select HAVE_AT91_DBGU0
52 select HAVE_FB_ATMEL 54 select HAVE_FB_ATMEL
55 help
56 Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
53 57
54 config ARCH_AT91SAM9263 58 config SOC_AT91SAM9263
55 bool "AT91SAM9263" 59 bool "AT91SAM9263"
56 select SOC_AT91SAM9 60 select SOC_AT91SAM9
61 select HAVE_AT91_DBGU1
57 select HAVE_FB_ATMEL 62 select HAVE_FB_ATMEL
58 select HAVE_NET_MACB 63 select HAVE_NET_MACB
59 select HAVE_AT91_DBGU1
60 64
61 config ARCH_AT91SAM9RL 65 config SOC_AT91SAM9RL
62 bool "AT91SAM9RL" 66 bool "AT91SAM9RL"
63 select SOC_AT91SAM9 67 select SOC_AT91SAM9
64 select HAVE_FB_ATMEL
65 select HAVE_AT91_DBGU0 68 select HAVE_AT91_DBGU0
69 select HAVE_FB_ATMEL
66 70
67 config ARCH_AT91SAM9G20 71 config SOC_AT91SAM9G45
68 bool "AT91SAM9G20"
69 select SOC_AT91SAM9
70 select HAVE_AT91_DBGU0
71 select HAVE_NET_MACB
72
73 config ARCH_AT91SAM9G45
74 bool "AT91SAM9G45 or AT91SAM9M10 families" 72 bool "AT91SAM9G45 or AT91SAM9M10 families"
75 select SOC_AT91SAM9 73 select SOC_AT91SAM9
74 select HAVE_AT91_DBGU1
76 select HAVE_FB_ATMEL 75 select HAVE_FB_ATMEL
77 select HAVE_NET_MACB 76 select HAVE_NET_MACB
78 select HAVE_AT91_DBGU1
79 help 77 help
80 Select this if you are using one of Atmel's AT91SAM9G45 family SoC. 78 Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
81 This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. 79 This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
82 80
83 config ARCH_AT91SAM9X5 81 config SOC_AT91SAM9X5
84 bool "AT91SAM9x5 family" 82 bool "AT91SAM9x5 family"
85 select SOC_AT91SAM9 83 select SOC_AT91SAM9
84 select HAVE_AT91_DBGU0
86 select HAVE_FB_ATMEL 85 select HAVE_FB_ATMEL
87 select HAVE_NET_MACB 86 select HAVE_NET_MACB
88 select HAVE_AT91_DBGU0
89 help 87 help
90 Select this if you are using one of Atmel's AT91SAM9x5 family SoC. 88 Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
91 This means that your SAM9 name finishes with a '5' (except if it is 89 This means that your SAM9 name finishes with a '5' (except if it is
92 AT91SAM9G45!). 90 AT91SAM9G45!).
93 This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35 91 This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35
94 and AT91SAM9X35. 92 and AT91SAM9X35.
95 93
94 choice
95 prompt "Atmel AT91 Processor Devices for non DT boards"
96
97 config ARCH_AT91_NONE
98 bool "None"
99
100 config ARCH_AT91RM9200
101 bool "AT91RM9200"
102 select SOC_AT91RM9200
103
104 config ARCH_AT91SAM9260
105 bool "AT91SAM9260 or AT91SAM9XE"
106 select SOC_AT91SAM9260
107
108 config ARCH_AT91SAM9261
109 bool "AT91SAM9261"
110 select SOC_AT91SAM9261
111
112 config ARCH_AT91SAM9G10
113 bool "AT91SAM9G10"
114 select SOC_AT91SAM9261
115
116 config ARCH_AT91SAM9263
117 bool "AT91SAM9263"
118 select SOC_AT91SAM9263
119
120 config ARCH_AT91SAM9RL
121 bool "AT91SAM9RL"
122 select SOC_AT91SAM9RL
123
124 config ARCH_AT91SAM9G20
125 bool "AT91SAM9G20"
126 select SOC_AT91SAM9260
127
128 config ARCH_AT91SAM9G45
129 bool "AT91SAM9G45"
130 select SOC_AT91SAM9G45
131
96 config ARCH_AT91X40 132 config ARCH_AT91X40
97 bool "AT91x40" 133 bool "AT91x40"
134 depends on !MMU
98 select ARCH_USES_GETTIMEOFFSET 135 select ARCH_USES_GETTIMEOFFSET
99 136
100 endchoice 137 endchoice
101 138
102 config AT91_PMC_UNIT 139 config AT91_PMC_UNIT
103 bool 140 bool
104 default !ARCH_AT91X40 141 default !ARCH_AT91X40
105 142
106 # ---------------------------------------------------------- 143 # ----------------------------------------------------------
107 144
108 if ARCH_AT91RM9200 145 if ARCH_AT91RM9200
109 146
110 comment "AT91RM9200 Board Type" 147 comment "AT91RM9200 Board Type"
111 148
112 config MACH_ONEARM 149 config MACH_ONEARM
113 bool "Ajeco 1ARM Single Board Computer" 150 bool "Ajeco 1ARM Single Board Computer"
114 help 151 help
115 Select this if you are using Ajeco's 1ARM Single Board Computer. 152 Select this if you are using Ajeco's 1ARM Single Board Computer.
116 <http://www.ajeco.fi/> 153 <http://www.ajeco.fi/>
117 154
118 config ARCH_AT91RM9200DK 155 config ARCH_AT91RM9200DK
119 bool "Atmel AT91RM9200-DK Development board" 156 bool "Atmel AT91RM9200-DK Development board"
120 select HAVE_AT91_DATAFLASH_CARD 157 select HAVE_AT91_DATAFLASH_CARD
121 help 158 help
122 Select this if you are using Atmel's AT91RM9200-DK Development board. 159 Select this if you are using Atmel's AT91RM9200-DK Development board.
123 (Discontinued) 160 (Discontinued)
124 161
125 config MACH_AT91RM9200EK 162 config MACH_AT91RM9200EK
126 bool "Atmel AT91RM9200-EK Evaluation Kit" 163 bool "Atmel AT91RM9200-EK Evaluation Kit"
127 select HAVE_AT91_DATAFLASH_CARD 164 select HAVE_AT91_DATAFLASH_CARD
128 help 165 help
129 Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit. 166 Select this if you are using Atmel's AT91RM9200-EK Evaluation Kit.
130 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507> 167 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3507>
131 168
132 config MACH_CSB337 169 config MACH_CSB337
133 bool "Cogent CSB337" 170 bool "Cogent CSB337"
134 help 171 help
135 Select this if you are using Cogent's CSB337 board. 172 Select this if you are using Cogent's CSB337 board.
136 <http://www.cogcomp.com/csb_csb337.htm> 173 <http://www.cogcomp.com/csb_csb337.htm>
137 174
138 config MACH_CSB637 175 config MACH_CSB637
139 bool "Cogent CSB637" 176 bool "Cogent CSB637"
140 help 177 help
141 Select this if you are using Cogent's CSB637 board. 178 Select this if you are using Cogent's CSB637 board.
142 <http://www.cogcomp.com/csb_csb637.htm> 179 <http://www.cogcomp.com/csb_csb637.htm>
143 180
144 config MACH_CARMEVA 181 config MACH_CARMEVA
145 bool "Conitec ARM&EVA" 182 bool "Conitec ARM&EVA"
146 help 183 help
147 Select this if you are using Conitec's AT91RM9200-MCU-Module. 184 Select this if you are using Conitec's AT91RM9200-MCU-Module.
148 <http://www.conitec.net/english/linuxboard.php> 185 <http://www.conitec.net/english/linuxboard.php>
149 186
150 config MACH_ATEB9200 187 config MACH_ATEB9200
151 bool "Embest ATEB9200" 188 bool "Embest ATEB9200"
152 help 189 help
153 Select this if you are using Embest's ATEB9200 board. 190 Select this if you are using Embest's ATEB9200 board.
154 <http://www.embedinfo.com/english/product/ATEB9200.asp> 191 <http://www.embedinfo.com/english/product/ATEB9200.asp>
155 192
156 config MACH_KB9200 193 config MACH_KB9200
157 bool "KwikByte KB920x" 194 bool "KwikByte KB920x"
158 help 195 help
159 Select this if you are using KwikByte's KB920x board. 196 Select this if you are using KwikByte's KB920x board.
160 <http://www.kwikbyte.com/KB9202.html> 197 <http://www.kwikbyte.com/KB9202.html>
161 198
162 config MACH_PICOTUX2XX 199 config MACH_PICOTUX2XX
163 bool "picotux 200" 200 bool "picotux 200"
164 help 201 help
165 Select this if you are using a picotux 200. 202 Select this if you are using a picotux 200.
166 <http://www.picotux.com/> 203 <http://www.picotux.com/>
167 204
168 config MACH_KAFA 205 config MACH_KAFA
169 bool "Sperry-Sun KAFA board" 206 bool "Sperry-Sun KAFA board"
170 help 207 help
171 Select this if you are using Sperry-Sun's KAFA board. 208 Select this if you are using Sperry-Sun's KAFA board.
172 209
173 config MACH_ECBAT91 210 config MACH_ECBAT91
174 bool "emQbit ECB_AT91 SBC" 211 bool "emQbit ECB_AT91 SBC"
175 select HAVE_AT91_DATAFLASH_CARD 212 select HAVE_AT91_DATAFLASH_CARD
176 help 213 help
177 Select this if you are using emQbit's ECB_AT91 board. 214 Select this if you are using emQbit's ECB_AT91 board.
178 <http://wiki.emqbit.com/free-ecb-at91> 215 <http://wiki.emqbit.com/free-ecb-at91>
179 216
180 config MACH_YL9200 217 config MACH_YL9200
181 bool "ucDragon YL-9200" 218 bool "ucDragon YL-9200"
182 help 219 help
183 Select this if you are using the ucDragon YL-9200 board. 220 Select this if you are using the ucDragon YL-9200 board.
184 221
185 config MACH_CPUAT91 222 config MACH_CPUAT91
186 bool "Eukrea CPUAT91" 223 bool "Eukrea CPUAT91"
187 help 224 help
188 Select this if you are using the Eukrea Electromatique's 225 Select this if you are using the Eukrea Electromatique's
189 CPUAT91 board <http://www.eukrea.com/>. 226 CPUAT91 board <http://www.eukrea.com/>.
190 227
191 config MACH_ECO920 228 config MACH_ECO920
192 bool "eco920" 229 bool "eco920"
193 help 230 help
194 Select this if you are using the eco920 board 231 Select this if you are using the eco920 board
195 232
196 config MACH_RSI_EWS 233 config MACH_RSI_EWS
197 bool "RSI Embedded Webserver" 234 bool "RSI Embedded Webserver"
198 depends on ARCH_AT91RM9200 235 depends on ARCH_AT91RM9200
199 help 236 help
200 Select this if you are using RSIs EWS board. 237 Select this if you are using RSIs EWS board.
201 endif 238 endif
202 239
203 # ---------------------------------------------------------- 240 # ----------------------------------------------------------
204 241
205 if ARCH_AT91SAM9260 242 if ARCH_AT91SAM9260
206 243
207 comment "AT91SAM9260 Variants" 244 comment "AT91SAM9260 Variants"
208 245
209 comment "AT91SAM9260 / AT91SAM9XE Board Type" 246 comment "AT91SAM9260 / AT91SAM9XE Board Type"
210 247
211 config MACH_AT91SAM9260EK 248 config MACH_AT91SAM9260EK
212 bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit" 249 bool "Atmel AT91SAM9260-EK / AT91SAM9XE Evaluation Kit"
213 select HAVE_AT91_DATAFLASH_CARD 250 select HAVE_AT91_DATAFLASH_CARD
214 help 251 help
215 Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit 252 Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
216 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933> 253 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
217 254
218 config MACH_CAM60 255 config MACH_CAM60
219 bool "KwikByte KB9260 (CAM60) board" 256 bool "KwikByte KB9260 (CAM60) board"
220 help 257 help
221 Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260. 258 Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260.
222 <http://www.kwikbyte.com/KB9260.html> 259 <http://www.kwikbyte.com/KB9260.html>
223 260
224 config MACH_SAM9_L9260 261 config MACH_SAM9_L9260
225 bool "Olimex SAM9-L9260 board" 262 bool "Olimex SAM9-L9260 board"
226 select HAVE_AT91_DATAFLASH_CARD 263 select HAVE_AT91_DATAFLASH_CARD
227 help 264 help
228 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260. 265 Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
229 <http://www.olimex.com/dev/sam9-L9260.html> 266 <http://www.olimex.com/dev/sam9-L9260.html>
230 267
231 config MACH_AFEB9260 268 config MACH_AFEB9260
232 bool "Custom afeb9260 board v1" 269 bool "Custom afeb9260 board v1"
233 help 270 help
234 Select this if you are using custom afeb9260 board based on 271 Select this if you are using custom afeb9260 board based on
235 open hardware design. Select this for revision 1 of the board. 272 open hardware design. Select this for revision 1 of the board.
236 <svn://194.85.238.22/home/users/george/svn/arm9eb> 273 <svn://194.85.238.22/home/users/george/svn/arm9eb>
237 <http://groups.google.com/group/arm9fpga-evolution-board> 274 <http://groups.google.com/group/arm9fpga-evolution-board>
238 275
239 config MACH_USB_A9260 276 config MACH_USB_A9260
240 bool "CALAO USB-A9260" 277 bool "CALAO USB-A9260"
241 help 278 help
242 Select this if you are using a Calao Systems USB-A9260. 279 Select this if you are using a Calao Systems USB-A9260.
243 <http://www.calao-systems.com> 280 <http://www.calao-systems.com>
244 281
245 config MACH_QIL_A9260 282 config MACH_QIL_A9260
246 bool "CALAO QIL-A9260 board" 283 bool "CALAO QIL-A9260 board"
247 help 284 help
248 Select this if you are using a Calao Systems QIL-A9260 Board. 285 Select this if you are using a Calao Systems QIL-A9260 Board.
249 <http://www.calao-systems.com> 286 <http://www.calao-systems.com>
250 287
251 config MACH_CPU9260 288 config MACH_CPU9260
252 bool "Eukrea CPU9260 board" 289 bool "Eukrea CPU9260 board"
253 help 290 help
254 Select this if you are using a Eukrea Electromatique's 291 Select this if you are using a Eukrea Electromatique's
255 CPU9260 Board <http://www.eukrea.com/> 292 CPU9260 Board <http://www.eukrea.com/>
256 293
257 config MACH_FLEXIBITY 294 config MACH_FLEXIBITY
258 bool "Flexibity Connect board" 295 bool "Flexibity Connect board"
259 help 296 help
260 Select this if you are using Flexibity Connect board 297 Select this if you are using Flexibity Connect board
261 <http://www.flexibity.com> 298 <http://www.flexibity.com>
262 299
263 endif 300 endif
264 301
265 # ---------------------------------------------------------- 302 # ----------------------------------------------------------
266 303
267 if ARCH_AT91SAM9261 304 if ARCH_AT91SAM9261
268 305
269 comment "AT91SAM9261 Board Type" 306 comment "AT91SAM9261 Board Type"
270 307
271 config MACH_AT91SAM9261EK 308 config MACH_AT91SAM9261EK
272 bool "Atmel AT91SAM9261-EK Evaluation Kit" 309 bool "Atmel AT91SAM9261-EK Evaluation Kit"
273 select HAVE_AT91_DATAFLASH_CARD 310 select HAVE_AT91_DATAFLASH_CARD
274 help 311 help
275 Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit. 312 Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
276 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820> 313 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
277 314
278 endif 315 endif
279 316
280 # ---------------------------------------------------------- 317 # ----------------------------------------------------------
281 318
282 if ARCH_AT91SAM9G10 319 if ARCH_AT91SAM9G10
283 320
284 comment "AT91SAM9G10 Board Type" 321 comment "AT91SAM9G10 Board Type"
285 322
286 config MACH_AT91SAM9G10EK 323 config MACH_AT91SAM9G10EK
287 bool "Atmel AT91SAM9G10-EK Evaluation Kit" 324 bool "Atmel AT91SAM9G10-EK Evaluation Kit"
288 select HAVE_AT91_DATAFLASH_CARD 325 select HAVE_AT91_DATAFLASH_CARD
289 help 326 help
290 Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit. 327 Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit.
291 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588> 328 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588>
292 329
293 endif 330 endif
294 331
295 # ---------------------------------------------------------- 332 # ----------------------------------------------------------
296 333
297 if ARCH_AT91SAM9263 334 if ARCH_AT91SAM9263
298 335
299 comment "AT91SAM9263 Board Type" 336 comment "AT91SAM9263 Board Type"
300 337
301 config MACH_AT91SAM9263EK 338 config MACH_AT91SAM9263EK
302 bool "Atmel AT91SAM9263-EK Evaluation Kit" 339 bool "Atmel AT91SAM9263-EK Evaluation Kit"
303 select HAVE_AT91_DATAFLASH_CARD 340 select HAVE_AT91_DATAFLASH_CARD
304 help 341 help
305 Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit. 342 Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
306 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057> 343 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
307 344
308 config MACH_USB_A9263 345 config MACH_USB_A9263
309 bool "CALAO USB-A9263" 346 bool "CALAO USB-A9263"
310 help 347 help
311 Select this if you are using a Calao Systems USB-A9263. 348 Select this if you are using a Calao Systems USB-A9263.
312 <http://www.calao-systems.com> 349 <http://www.calao-systems.com>
313 350
314 config MACH_NEOCORE926 351 config MACH_NEOCORE926
315 bool "Adeneo NEOCORE926" 352 bool "Adeneo NEOCORE926"
316 select HAVE_AT91_DATAFLASH_CARD 353 select HAVE_AT91_DATAFLASH_CARD
317 help 354 help
318 Select this if you are using the Adeneo Neocore 926 board. 355 Select this if you are using the Adeneo Neocore 926 board.
319 356
320 endif 357 endif
321 358
322 # ---------------------------------------------------------- 359 # ----------------------------------------------------------
323 360
324 if ARCH_AT91SAM9RL 361 if ARCH_AT91SAM9RL
325 362
326 comment "AT91SAM9RL Board Type" 363 comment "AT91SAM9RL Board Type"
327 364
328 config MACH_AT91SAM9RLEK 365 config MACH_AT91SAM9RLEK
329 bool "Atmel AT91SAM9RL-EK Evaluation Kit" 366 bool "Atmel AT91SAM9RL-EK Evaluation Kit"
330 help 367 help
331 Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit. 368 Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
332 369
333 endif 370 endif
334 371
335 # ---------------------------------------------------------- 372 # ----------------------------------------------------------
336 373
337 if ARCH_AT91SAM9G20 374 if ARCH_AT91SAM9G20
338 375
339 comment "AT91SAM9G20 Board Type" 376 comment "AT91SAM9G20 Board Type"
340 377
341 config MACH_AT91SAM9G20EK 378 config MACH_AT91SAM9G20EK
342 bool "Atmel AT91SAM9G20-EK Evaluation Kit" 379 bool "Atmel AT91SAM9G20-EK Evaluation Kit"
343 select HAVE_AT91_DATAFLASH_CARD 380 select HAVE_AT91_DATAFLASH_CARD
344 help 381 help
345 Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit 382 Select this if you are using Atmel's AT91SAM9G20-EK Evaluation Kit
346 that embeds only one SD/MMC slot. 383 that embeds only one SD/MMC slot.
347 384
348 config MACH_AT91SAM9G20EK_2MMC 385 config MACH_AT91SAM9G20EK_2MMC
349 depends on MACH_AT91SAM9G20EK 386 depends on MACH_AT91SAM9G20EK
350 bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots" 387 bool "Atmel AT91SAM9G20-EK Evaluation Kit with 2 SD/MMC Slots"
351 help 388 help
352 Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit 389 Select this if you are using an Atmel AT91SAM9G20-EK Evaluation Kit
353 with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and 390 with 2 SD/MMC Slots. This is the case for AT91SAM9G20-EK rev. C and
354 onwards. 391 onwards.
355 <http://www.atmel.com/tools/SAM9G20-EK.aspx> 392 <http://www.atmel.com/tools/SAM9G20-EK.aspx>
356 393
357 config MACH_CPU9G20 394 config MACH_CPU9G20
358 bool "Eukrea CPU9G20 board" 395 bool "Eukrea CPU9G20 board"
359 help 396 help
360 Select this if you are using a Eukrea Electromatique's 397 Select this if you are using a Eukrea Electromatique's
361 CPU9G20 Board <http://www.eukrea.com/> 398 CPU9G20 Board <http://www.eukrea.com/>
362 399
363 config MACH_ACMENETUSFOXG20 400 config MACH_ACMENETUSFOXG20
364 bool "Acme Systems srl FOX Board G20" 401 bool "Acme Systems srl FOX Board G20"
365 help 402 help
366 Select this if you are using Acme Systems 403 Select this if you are using Acme Systems
367 FOX Board G20 <http://www.acmesystems.it> 404 FOX Board G20 <http://www.acmesystems.it>
368 405
369 config MACH_PORTUXG20 406 config MACH_PORTUXG20
370 bool "taskit PortuxG20" 407 bool "taskit PortuxG20"
371 help 408 help
372 Select this if you are using taskit's PortuxG20. 409 Select this if you are using taskit's PortuxG20.
373 <http://www.taskit.de/en/> 410 <http://www.taskit.de/en/>
374 411
375 config MACH_STAMP9G20 412 config MACH_STAMP9G20
376 bool "taskit Stamp9G20 CPU module" 413 bool "taskit Stamp9G20 CPU module"
377 help 414 help
378 Select this if you are using taskit's Stamp9G20 CPU module on its 415 Select this if you are using taskit's Stamp9G20 CPU module on its
379 evaluation board. 416 evaluation board.
380 <http://www.taskit.de/en/> 417 <http://www.taskit.de/en/>
381 418
382 config MACH_PCONTROL_G20 419 config MACH_PCONTROL_G20
383 bool "PControl G20 CPU module" 420 bool "PControl G20 CPU module"
384 help 421 help
385 Select this if you are using taskit's Stamp9G20 CPU module on this 422 Select this if you are using taskit's Stamp9G20 CPU module on this
386 carrier board, beeing the decentralized unit of a building automation 423 carrier board, beeing the decentralized unit of a building automation
387 system; featuring nvram, eth-switch, iso-rs485, display, io 424 system; featuring nvram, eth-switch, iso-rs485, display, io
388 425
389 config MACH_GSIA18S 426 config MACH_GSIA18S
390 bool "GS_IA18_S board" 427 bool "GS_IA18_S board"
391 help 428 help
392 This enables support for the GS_IA18_S board 429 This enables support for the GS_IA18_S board
393 produced by GeoSIG Ltd company. This is an internet accelerograph. 430 produced by GeoSIG Ltd company. This is an internet accelerograph.
394 <http://www.geosig.com> 431 <http://www.geosig.com>
395 432
396 config MACH_USB_A9G20 433 config MACH_USB_A9G20
397 bool "CALAO USB-A9G20" 434 bool "CALAO USB-A9G20"
398 depends on ARCH_AT91SAM9G20 435 depends on ARCH_AT91SAM9G20
399 help 436 help
400 Select this if you are using a Calao Systems USB-A9G20. 437 Select this if you are using a Calao Systems USB-A9G20.
401 <http://www.calao-systems.com> 438 <http://www.calao-systems.com>
402 439
403 endif 440 endif
404 441
405 if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20) 442 if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
406 comment "AT91SAM9260/AT91SAM9G20 boards" 443 comment "AT91SAM9260/AT91SAM9G20 boards"
407 444
408 config MACH_SNAPPER_9260 445 config MACH_SNAPPER_9260
409 bool "Bluewater Systems Snapper 9260/9G20 module" 446 bool "Bluewater Systems Snapper 9260/9G20 module"
410 help 447 help
411 Select this if you are using the Bluewater Systems Snapper 9260 or 448 Select this if you are using the Bluewater Systems Snapper 9260 or
412 Snapper 9G20 modules. 449 Snapper 9G20 modules.
413 <http://www.bluewatersys.com/> 450 <http://www.bluewatersys.com/>
414 endif 451 endif
415 452
416 # ---------------------------------------------------------- 453 # ----------------------------------------------------------
417 454
418 if ARCH_AT91SAM9G45 455 if ARCH_AT91SAM9G45
419 456
420 comment "AT91SAM9G45 Board Type" 457 comment "AT91SAM9G45 Board Type"
421 458
422 config MACH_AT91SAM9M10G45EK 459 config MACH_AT91SAM9M10G45EK
423 bool "Atmel AT91SAM9M10G45-EK Evaluation Kits" 460 bool "Atmel AT91SAM9M10G45-EK Evaluation Kits"
424 help 461 help
425 Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit. 462 Select this if you are using Atmel's AT91SAM9M10G45-EK Evaluation Kit.
426 Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10 463 Those boards can be populated with any SoC of AT91SAM9G45 or AT91SAM9M10
427 families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. 464 families: AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
428 <http://www.atmel.com/tools/SAM9M10-G45-EK.aspx> 465 <http://www.atmel.com/tools/SAM9M10-G45-EK.aspx>
429 466
430 endif 467 endif
431 468
432 # ---------------------------------------------------------- 469 # ----------------------------------------------------------
433 470
434 if ARCH_AT91X40 471 if ARCH_AT91X40
435 472
436 comment "AT91X40 Board Type" 473 comment "AT91X40 Board Type"
437 474
438 config MACH_AT91EB01 475 config MACH_AT91EB01
439 bool "Atmel AT91EB01 Evaluation Kit" 476 bool "Atmel AT91EB01 Evaluation Kit"
440 help 477 help
441 Select this if you are using Atmel's AT91EB01 Evaluation Kit. 478 Select this if you are using Atmel's AT91EB01 Evaluation Kit.
442 It is also a popular target for simulators such as GDB's 479 It is also a popular target for simulators such as GDB's
443 ARM simulator (commonly known as the ARMulator) and the 480 ARM simulator (commonly known as the ARMulator) and the
444 Skyeye simulator. 481 Skyeye simulator.
445 482
446 endif 483 endif
447 484
448 # ---------------------------------------------------------- 485 # ----------------------------------------------------------
449 486
450 comment "Generic Board Type" 487 comment "Generic Board Type"
451 488
452 config MACH_AT91SAM_DT 489 config MACH_AT91SAM_DT
453 bool "Atmel AT91SAM Evaluation Kits with device-tree support" 490 bool "Atmel AT91SAM Evaluation Kits with device-tree support"
454 select USE_OF 491 select USE_OF
455 help 492 help
456 Select this if you want to experiment device-tree with 493 Select this if you want to experiment device-tree with
457 an Atmel Evaluation Kit. 494 an Atmel Evaluation Kit.
458 495
459 # ---------------------------------------------------------- 496 # ----------------------------------------------------------
460 497
461 comment "AT91 Board Options" 498 comment "AT91 Board Options"
462 499
463 config MTD_AT91_DATAFLASH_CARD 500 config MTD_AT91_DATAFLASH_CARD
464 bool "Enable DataFlash Card support" 501 bool "Enable DataFlash Card support"
465 depends on HAVE_AT91_DATAFLASH_CARD 502 depends on HAVE_AT91_DATAFLASH_CARD
466 help 503 help
467 Enable support for the DataFlash card. 504 Enable support for the DataFlash card.
468 505
469 # ---------------------------------------------------------- 506 # ----------------------------------------------------------
470 507
471 comment "AT91 Feature Selections" 508 comment "AT91 Feature Selections"
472 509
473 config AT91_PROGRAMMABLE_CLOCKS 510 config AT91_PROGRAMMABLE_CLOCKS
474 bool "Programmable Clocks" 511 bool "Programmable Clocks"
475 help 512 help
476 Select this if you need to program one or more of the PCK0..PCK3 513 Select this if you need to program one or more of the PCK0..PCK3
477 programmable clock outputs. 514 programmable clock outputs.
478 515
479 config AT91_SLOW_CLOCK 516 config AT91_SLOW_CLOCK
480 bool "Suspend-to-RAM disables main oscillator" 517 bool "Suspend-to-RAM disables main oscillator"
481 depends on SUSPEND 518 depends on SUSPEND
482 help 519 help
483 Select this if you want Suspend-to-RAM to save the most power 520 Select this if you want Suspend-to-RAM to save the most power
484 possible (without powering off the CPU) by disabling the PLLs 521 possible (without powering off the CPU) by disabling the PLLs
485 and main oscillator so that only the 32 KiHz clock is available. 522 and main oscillator so that only the 32 KiHz clock is available.
486 523
487 When only that slow-clock is available, some peripherals lose 524 When only that slow-clock is available, some peripherals lose
488 functionality. Many can't issue wakeup events unless faster 525 functionality. Many can't issue wakeup events unless faster
489 clocks are available. Some lose their operating state and 526 clocks are available. Some lose their operating state and
490 need to be completely re-initialized. 527 need to be completely re-initialized.
491 528
492 config AT91_TIMER_HZ 529 config AT91_TIMER_HZ
493 int "Kernel HZ (jiffies per second)" 530 int "Kernel HZ (jiffies per second)"
494 range 32 1024 531 range 32 1024
arch/arm/mach-at91/Makefile
Diff comments   View file @ 1e3ce2b
1 # 1 #
2 # Makefile for the linux kernel. 2 # Makefile for the linux kernel.
3 # 3 #
4 4
5 obj-y := irq.o gpio.o setup.o 5 obj-y := irq.o gpio.o setup.o
6 obj-m := 6 obj-m :=
7 obj-n := 7 obj-n :=
8 obj- := 8 obj- :=
9 9
10 obj-$(CONFIG_AT91_PMC_UNIT) += clock.o 10 obj-$(CONFIG_AT91_PMC_UNIT) += clock.o
11 obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o 11 obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o
12 obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o 12 obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o
13 obj-$(CONFIG_SOC_AT91SAM9) += at91sam926x_time.o sam9_smc.o 13 obj-$(CONFIG_SOC_AT91SAM9) += at91sam926x_time.o sam9_smc.o
14 14
15 # CPU-specific support 15 # CPU-specific support
16 obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o 16 obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o
17 obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam9260_devices.o 17 obj-$(CONFIG_SOC_AT91SAM9260) += at91sam9260.o
18 obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam9261_devices.o 18 obj-$(CONFIG_SOC_AT91SAM9261) += at91sam9261.o
19 obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam9261_devices.o 19 obj-$(CONFIG_SOC_AT91SAM9263) += at91sam9263.o
20 obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam9263_devices.o 20 obj-$(CONFIG_SOC_AT91SAM9G45) += at91sam9g45.o
21 obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam9rl_devices.o 21 obj-$(CONFIG_SOC_AT91SAM9X5) += at91sam9x5.o
22 obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam9260_devices.o 22 obj-$(CONFIG_SOC_AT91SAM9RL) += at91sam9rl.o
23 obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam9g45_devices.o 23
24 obj-$(CONFIG_ARCH_AT91SAM9X5) += at91sam9x5.o 24 obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
25 obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
26 obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o
27 obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261_devices.o
28 obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263_devices.o
29 obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl_devices.o
30 obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260_devices.o
31 obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45_devices.o
25 obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o 32 obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
26 33
27 # AT91RM9200 board-specific support 34 # AT91RM9200 board-specific support
28 obj-$(CONFIG_MACH_ONEARM) += board-1arm.o 35 obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
29 obj-$(CONFIG_ARCH_AT91RM9200DK) += board-rm9200dk.o 36 obj-$(CONFIG_ARCH_AT91RM9200DK) += board-rm9200dk.o
30 obj-$(CONFIG_MACH_AT91RM9200EK) += board-rm9200ek.o 37 obj-$(CONFIG_MACH_AT91RM9200EK) += board-rm9200ek.o
31 obj-$(CONFIG_MACH_CSB337) += board-csb337.o 38 obj-$(CONFIG_MACH_CSB337) += board-csb337.o
32 obj-$(CONFIG_MACH_CSB637) += board-csb637.o 39 obj-$(CONFIG_MACH_CSB637) += board-csb637.o
33 obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o 40 obj-$(CONFIG_MACH_CARMEVA) += board-carmeva.o
34 obj-$(CONFIG_MACH_KB9200) += board-kb9202.o 41 obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
35 obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o 42 obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
36 obj-$(CONFIG_MACH_KAFA) += board-kafa.o 43 obj-$(CONFIG_MACH_KAFA) += board-kafa.o
37 obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o 44 obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o
38 obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o 45 obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o
39 obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o 46 obj-$(CONFIG_MACH_YL9200) += board-yl-9200.o
40 obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o 47 obj-$(CONFIG_MACH_CPUAT91) += board-cpuat91.o
41 obj-$(CONFIG_MACH_ECO920) += board-eco920.o 48 obj-$(CONFIG_MACH_ECO920) += board-eco920.o
42 obj-$(CONFIG_MACH_RSI_EWS) += board-rsi-ews.o 49 obj-$(CONFIG_MACH_RSI_EWS) += board-rsi-ews.o
43 50
44 # AT91SAM9260 board-specific support 51 # AT91SAM9260 board-specific support
45 obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o 52 obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
46 obj-$(CONFIG_MACH_CAM60) += board-cam60.o 53 obj-$(CONFIG_MACH_CAM60) += board-cam60.o
47 obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o 54 obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o
48 obj-$(CONFIG_MACH_USB_A9260) += board-usb-a926x.o 55 obj-$(CONFIG_MACH_USB_A9260) += board-usb-a926x.o
49 obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o 56 obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o
50 obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o 57 obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o
51 obj-$(CONFIG_MACH_CPU9260) += board-cpu9krea.o 58 obj-$(CONFIG_MACH_CPU9260) += board-cpu9krea.o
52 obj-$(CONFIG_MACH_FLEXIBITY) += board-flexibity.o 59 obj-$(CONFIG_MACH_FLEXIBITY) += board-flexibity.o
53 60
54 # AT91SAM9261 board-specific support 61 # AT91SAM9261 board-specific support
55 obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o 62 obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
56 obj-$(CONFIG_MACH_AT91SAM9G10EK) += board-sam9261ek.o 63 obj-$(CONFIG_MACH_AT91SAM9G10EK) += board-sam9261ek.o
57 64
58 # AT91SAM9263 board-specific support 65 # AT91SAM9263 board-specific support
59 obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o 66 obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
60 obj-$(CONFIG_MACH_USB_A9263) += board-usb-a926x.o 67 obj-$(CONFIG_MACH_USB_A9263) += board-usb-a926x.o
61 obj-$(CONFIG_MACH_NEOCORE926) += board-neocore926.o 68 obj-$(CONFIG_MACH_NEOCORE926) += board-neocore926.o
62 69
63 # AT91SAM9RL board-specific support 70 # AT91SAM9RL board-specific support
64 obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o 71 obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
65 72
66 # AT91SAM9G20 board-specific support 73 # AT91SAM9G20 board-specific support
67 obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o 74 obj-$(CONFIG_MACH_AT91SAM9G20EK) += board-sam9g20ek.o
68 obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o 75 obj-$(CONFIG_MACH_CPU9G20) += board-cpu9krea.o
69 obj-$(CONFIG_MACH_ACMENETUSFOXG20) += board-foxg20.o 76 obj-$(CONFIG_MACH_ACMENETUSFOXG20) += board-foxg20.o
70 obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o 77 obj-$(CONFIG_MACH_STAMP9G20) += board-stamp9g20.o
71 obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o 78 obj-$(CONFIG_MACH_PORTUXG20) += board-stamp9g20.o
72 obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o 79 obj-$(CONFIG_MACH_PCONTROL_G20) += board-pcontrol-g20.o board-stamp9g20.o
73 obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o 80 obj-$(CONFIG_MACH_GSIA18S) += board-gsia18s.o board-stamp9g20.o
74 obj-$(CONFIG_MACH_USB_A9G20) += board-usb-a926x.o 81 obj-$(CONFIG_MACH_USB_A9G20) += board-usb-a926x.o
75 82
76 # AT91SAM9260/AT91SAM9G20 board-specific support 83 # AT91SAM9260/AT91SAM9G20 board-specific support
77 obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o 84 obj-$(CONFIG_MACH_SNAPPER_9260) += board-snapper9260.o
78 85
79 # AT91SAM9G45 board-specific support 86 # AT91SAM9G45 board-specific support
80 obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o 87 obj-$(CONFIG_MACH_AT91SAM9M10G45EK) += board-sam9m10g45ek.o
81 88
82 # AT91SAM board with device-tree 89 # AT91SAM board with device-tree
83 obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o 90 obj-$(CONFIG_MACH_AT91SAM_DT) += board-dt.o
84 91
85 # AT91X40 board-specific support 92 # AT91X40 board-specific support
86 obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o 93 obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o
87 94
88 # Drivers 95 # Drivers
89 obj-y += leds.o 96 obj-y += leds.o
90 97
91 # Power Management 98 # Power Management
92 obj-$(CONFIG_PM) += pm.o 99 obj-$(CONFIG_PM) += pm.o
93 obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o 100 obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o
94 obj-$(CONFIG_CPU_IDLE) += cpuidle.o 101 obj-$(CONFIG_CPU_IDLE) += cpuidle.o
95 102
96 ifeq ($(CONFIG_PM_DEBUG),y) 103 ifeq ($(CONFIG_PM_DEBUG),y)
97 CFLAGS_pm.o += -DDEBUG 104 CFLAGS_pm.o += -DDEBUG
98 endif 105 endif
99 106
arch/arm/mach-at91/include/mach/cpu.h
Diff comments   View file @ 1e3ce2b
1 /* 1 /*
2 * arch/arm/mach-at91/include/mach/cpu.h 2 * arch/arm/mach-at91/include/mach/cpu.h
3 * 3 *
4 * Copyright (C) 2006 SAN People 4 * Copyright (C) 2006 SAN People
5 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 5 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or 9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version. 10 * (at your option) any later version.
11 * 11 *
12 */ 12 */
13 13
14 #ifndef __MACH_CPU_H__ 14 #ifndef __MACH_CPU_H__
15 #define __MACH_CPU_H__ 15 #define __MACH_CPU_H__
16 16
17 #define ARCH_ID_AT91RM9200 0x09290780 17 #define ARCH_ID_AT91RM9200 0x09290780
18 #define ARCH_ID_AT91SAM9260 0x019803a0 18 #define ARCH_ID_AT91SAM9260 0x019803a0
19 #define ARCH_ID_AT91SAM9261 0x019703a0 19 #define ARCH_ID_AT91SAM9261 0x019703a0
20 #define ARCH_ID_AT91SAM9263 0x019607a0 20 #define ARCH_ID_AT91SAM9263 0x019607a0
21 #define ARCH_ID_AT91SAM9G10 0x019903a0 21 #define ARCH_ID_AT91SAM9G10 0x019903a0
22 #define ARCH_ID_AT91SAM9G20 0x019905a0 22 #define ARCH_ID_AT91SAM9G20 0x019905a0
23 #define ARCH_ID_AT91SAM9RL64 0x019b03a0 23 #define ARCH_ID_AT91SAM9RL64 0x019b03a0
24 #define ARCH_ID_AT91SAM9G45 0x819b05a0 24 #define ARCH_ID_AT91SAM9G45 0x819b05a0
25 #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ 25 #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */
26 #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ 26 #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */
27 #define ARCH_ID_AT91SAM9X5 0x819a05a0 27 #define ARCH_ID_AT91SAM9X5 0x819a05a0
28 28
29 #define ARCH_ID_AT91SAM9XE128 0x329973a0 29 #define ARCH_ID_AT91SAM9XE128 0x329973a0
30 #define ARCH_ID_AT91SAM9XE256 0x329a93a0 30 #define ARCH_ID_AT91SAM9XE256 0x329a93a0
31 #define ARCH_ID_AT91SAM9XE512 0x329aa3a0 31 #define ARCH_ID_AT91SAM9XE512 0x329aa3a0
32 32
33 #define ARCH_ID_AT91M40800 0x14080044 33 #define ARCH_ID_AT91M40800 0x14080044
34 #define ARCH_ID_AT91R40807 0x44080746 34 #define ARCH_ID_AT91R40807 0x44080746
35 #define ARCH_ID_AT91M40807 0x14080745 35 #define ARCH_ID_AT91M40807 0x14080745
36 #define ARCH_ID_AT91R40008 0x44000840 36 #define ARCH_ID_AT91R40008 0x44000840
37 37
38 #define ARCH_EXID_AT91SAM9M11 0x00000001 38 #define ARCH_EXID_AT91SAM9M11 0x00000001
39 #define ARCH_EXID_AT91SAM9M10 0x00000002 39 #define ARCH_EXID_AT91SAM9M10 0x00000002
40 #define ARCH_EXID_AT91SAM9G46 0x00000003 40 #define ARCH_EXID_AT91SAM9G46 0x00000003
41 #define ARCH_EXID_AT91SAM9G45 0x00000004 41 #define ARCH_EXID_AT91SAM9G45 0x00000004
42 42
43 #define ARCH_EXID_AT91SAM9G15 0x00000000 43 #define ARCH_EXID_AT91SAM9G15 0x00000000
44 #define ARCH_EXID_AT91SAM9G35 0x00000001 44 #define ARCH_EXID_AT91SAM9G35 0x00000001
45 #define ARCH_EXID_AT91SAM9X35 0x00000002 45 #define ARCH_EXID_AT91SAM9X35 0x00000002
46 #define ARCH_EXID_AT91SAM9G25 0x00000003 46 #define ARCH_EXID_AT91SAM9G25 0x00000003
47 #define ARCH_EXID_AT91SAM9X25 0x00000004 47 #define ARCH_EXID_AT91SAM9X25 0x00000004
48 48
49 #define ARCH_FAMILY_AT91X92 0x09200000 49 #define ARCH_FAMILY_AT91X92 0x09200000
50 #define ARCH_FAMILY_AT91SAM9 0x01900000 50 #define ARCH_FAMILY_AT91SAM9 0x01900000
51 #define ARCH_FAMILY_AT91SAM9XE 0x02900000 51 #define ARCH_FAMILY_AT91SAM9XE 0x02900000
52 52
53 /* RM9200 type */ 53 /* RM9200 type */
54 #define ARCH_REVISON_9200_BGA (0 << 0) 54 #define ARCH_REVISON_9200_BGA (0 << 0)
55 #define ARCH_REVISON_9200_PQFP (1 << 0) 55 #define ARCH_REVISON_9200_PQFP (1 << 0)
56 56
57 #ifndef __ASSEMBLY__
57 enum at91_soc_type { 58 enum at91_soc_type {
58 /* 920T */ 59 /* 920T */
59 AT91_SOC_RM9200, 60 AT91_SOC_RM9200,
60 61
61 /* SAM92xx */ 62 /* SAM92xx */
62 AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263, 63 AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263,
63 64
64 /* SAM9Gxx */ 65 /* SAM9Gxx */
65 AT91_SOC_SAM9G10, AT91_SOC_SAM9G20, AT91_SOC_SAM9G45, 66 AT91_SOC_SAM9G10, AT91_SOC_SAM9G20, AT91_SOC_SAM9G45,
66 67
67 /* SAM9RL */ 68 /* SAM9RL */
68 AT91_SOC_SAM9RL, 69 AT91_SOC_SAM9RL,
69 70
70 /* SAM9X5 */ 71 /* SAM9X5 */
71 AT91_SOC_SAM9X5, 72 AT91_SOC_SAM9X5,
72 73
73 /* Unknown type */ 74 /* Unknown type */
74 AT91_SOC_NONE 75 AT91_SOC_NONE
75 }; 76 };
76 77
77 enum at91_soc_subtype { 78 enum at91_soc_subtype {
78 /* RM9200 */ 79 /* RM9200 */
79 AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP, 80 AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP,
80 81
81 /* SAM9260 */ 82 /* SAM9260 */
82 AT91_SOC_SAM9XE, 83 AT91_SOC_SAM9XE,
83 84
84 /* SAM9G45 */ 85 /* SAM9G45 */
85 AT91_SOC_SAM9G45ES, AT91_SOC_SAM9M10, AT91_SOC_SAM9G46, AT91_SOC_SAM9M11, 86 AT91_SOC_SAM9G45ES, AT91_SOC_SAM9M10, AT91_SOC_SAM9G46, AT91_SOC_SAM9M11,
86 87
87 /* SAM9X5 */ 88 /* SAM9X5 */
88 AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35, 89 AT91_SOC_SAM9G15, AT91_SOC_SAM9G35, AT91_SOC_SAM9X35,
89 AT91_SOC_SAM9G25, AT91_SOC_SAM9X25, 90 AT91_SOC_SAM9G25, AT91_SOC_SAM9X25,
90 91
91 /* Unknown subtype */ 92 /* Unknown subtype */
92 AT91_SOC_SUBTYPE_NONE 93 AT91_SOC_SUBTYPE_NONE
93 }; 94 };
94 95
95 struct at91_socinfo { 96 struct at91_socinfo {
96 unsigned int type, subtype; 97 unsigned int type, subtype;
97 unsigned int cidr, exid; 98 unsigned int cidr, exid;
98 }; 99 };
99 100
100 extern struct at91_socinfo at91_soc_initdata; 101 extern struct at91_socinfo at91_soc_initdata;
101 const char *at91_get_soc_type(struct at91_socinfo *c); 102 const char *at91_get_soc_type(struct at91_socinfo *c);
102 const char *at91_get_soc_subtype(struct at91_socinfo *c); 103 const char *at91_get_soc_subtype(struct at91_socinfo *c);
103 104
104 static inline int at91_soc_is_detected(void) 105 static inline int at91_soc_is_detected(void)
105 { 106 {
106 return at91_soc_initdata.type != AT91_SOC_NONE; 107 return at91_soc_initdata.type != AT91_SOC_NONE;
107 } 108 }
108 109
109 #ifdef CONFIG_ARCH_AT91RM9200 110 #ifdef CONFIG_SOC_AT91RM9200
110 #define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200) 111 #define cpu_is_at91rm9200() (at91_soc_initdata.type == AT91_SOC_RM9200)
111 #define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA) 112 #define cpu_is_at91rm9200_bga() (at91_soc_initdata.subtype == AT91_SOC_RM9200_BGA)
112 #define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP) 113 #define cpu_is_at91rm9200_pqfp() (at91_soc_initdata.subtype == AT91_SOC_RM9200_PQFP)
113 #else 114 #else
114 #define cpu_is_at91rm9200() (0) 115 #define cpu_is_at91rm9200() (0)
115 #define cpu_is_at91rm9200_bga() (0) 116 #define cpu_is_at91rm9200_bga() (0)
116 #define cpu_is_at91rm9200_pqfp() (0) 117 #define cpu_is_at91rm9200_pqfp() (0)
117 #endif 118 #endif
118 119
119 #ifdef CONFIG_ARCH_AT91SAM9260 120 #ifdef CONFIG_SOC_AT91SAM9260
120 #define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE) 121 #define cpu_is_at91sam9xe() (at91_soc_initdata.subtype == AT91_SOC_SAM9XE)
121 #define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260) 122 #define cpu_is_at91sam9260() (at91_soc_initdata.type == AT91_SOC_SAM9260)
123 #define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
122 #else 124 #else
123 #define cpu_is_at91sam9xe() (0) 125 #define cpu_is_at91sam9xe() (0)
124 #define cpu_is_at91sam9260() (0) 126 #define cpu_is_at91sam9260() (0)
125 #endif
126
127 #ifdef CONFIG_ARCH_AT91SAM9G20
128 #define cpu_is_at91sam9g20() (at91_soc_initdata.type == AT91_SOC_SAM9G20)
129 #else
130 #define cpu_is_at91sam9g20() (0) 127 #define cpu_is_at91sam9g20() (0)
131 #endif 128 #endif
132 129
133 #ifdef CONFIG_ARCH_AT91SAM9261 130 #ifdef CONFIG_SOC_AT91SAM9261
134 #define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261) 131 #define cpu_is_at91sam9261() (at91_soc_initdata.type == AT91_SOC_SAM9261)
135 #else
136 #define cpu_is_at91sam9261() (0)
137 #endif
138
139 #ifdef CONFIG_ARCH_AT91SAM9G10
140 #define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10) 132 #define cpu_is_at91sam9g10() (at91_soc_initdata.type == AT91_SOC_SAM9G10)
141 #else 133 #else
134 #define cpu_is_at91sam9261() (0)
142 #define cpu_is_at91sam9g10() (0) 135 #define cpu_is_at91sam9g10() (0)
143 #endif 136 #endif
144 137
145 #ifdef CONFIG_ARCH_AT91SAM9263 138 #ifdef CONFIG_SOC_AT91SAM9263
146 #define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263) 139 #define cpu_is_at91sam9263() (at91_soc_initdata.type == AT91_SOC_SAM9263)
147 #else 140 #else
148 #define cpu_is_at91sam9263() (0) 141 #define cpu_is_at91sam9263() (0)
149 #endif 142 #endif
150 143
151 #ifdef CONFIG_ARCH_AT91SAM9RL 144 #ifdef CONFIG_SOC_AT91SAM9RL
152 #define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL) 145 #define cpu_is_at91sam9rl() (at91_soc_initdata.type == AT91_SOC_SAM9RL)
153 #else 146 #else
154 #define cpu_is_at91sam9rl() (0) 147 #define cpu_is_at91sam9rl() (0)
155 #endif 148 #endif
156 149
157 #ifdef CONFIG_ARCH_AT91SAM9G45 150 #ifdef CONFIG_SOC_AT91SAM9G45
158 #define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45) 151 #define cpu_is_at91sam9g45() (at91_soc_initdata.type == AT91_SOC_SAM9G45)
159 #define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES) 152 #define cpu_is_at91sam9g45es() (at91_soc_initdata.subtype == AT91_SOC_SAM9G45ES)
160 #define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10) 153 #define cpu_is_at91sam9m10() (at91_soc_initdata.subtype == AT91_SOC_SAM9M10)
161 #define cpu_is_at91sam9g46() (at91_soc_initdata.subtype == AT91_SOC_SAM9G46) 154 #define cpu_is_at91sam9g46() (at91_soc_initdata.subtype == AT91_SOC_SAM9G46)
162 #define cpu_is_at91sam9m11() (at91_soc_initdata.subtype == AT91_SOC_SAM9M11) 155 #define cpu_is_at91sam9m11() (at91_soc_initdata.subtype == AT91_SOC_SAM9M11)
163 #else 156 #else
164 #define cpu_is_at91sam9g45() (0) 157 #define cpu_is_at91sam9g45() (0)
165 #define cpu_is_at91sam9g45es() (0) 158 #define cpu_is_at91sam9g45es() (0)
166 #define cpu_is_at91sam9m10() (0) 159 #define cpu_is_at91sam9m10() (0)
167 #define cpu_is_at91sam9g46() (0) 160 #define cpu_is_at91sam9g46() (0)
168 #define cpu_is_at91sam9m11() (0) 161 #define cpu_is_at91sam9m11() (0)
169 #endif 162 #endif
170 163
171 #ifdef CONFIG_ARCH_AT91SAM9X5 164 #ifdef CONFIG_SOC_AT91SAM9X5
172 #define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5) 165 #define cpu_is_at91sam9x5() (at91_soc_initdata.type == AT91_SOC_SAM9X5)
173 #define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15) 166 #define cpu_is_at91sam9g15() (at91_soc_initdata.subtype == AT91_SOC_SAM9G15)
174 #define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35) 167 #define cpu_is_at91sam9g35() (at91_soc_initdata.subtype == AT91_SOC_SAM9G35)
175 #define cpu_is_at91sam9x35() (at91_soc_initdata.subtype == AT91_SOC_SAM9X35) 168 #define cpu_is_at91sam9x35() (at91_soc_initdata.subtype == AT91_SOC_SAM9X35)
176 #define cpu_is_at91sam9g25() (at91_soc_initdata.subtype == AT91_SOC_SAM9G25) 169 #define cpu_is_at91sam9g25() (at91_soc_initdata.subtype == AT91_SOC_SAM9G25)
177 #define cpu_is_at91sam9x25() (at91_soc_initdata.subtype == AT91_SOC_SAM9X25) 170 #define cpu_is_at91sam9x25() (at91_soc_initdata.subtype == AT91_SOC_SAM9X25)
178 #else 171 #else
179 #define cpu_is_at91sam9x5() (0) 172 #define cpu_is_at91sam9x5() (0)
180 #define cpu_is_at91sam9g15() (0) 173 #define cpu_is_at91sam9g15() (0)
181 #define cpu_is_at91sam9g35() (0) 174 #define cpu_is_at91sam9g35() (0)
182 #define cpu_is_at91sam9x35() (0) 175 #define cpu_is_at91sam9x35() (0)
183 #define cpu_is_at91sam9g25() (0) 176 #define cpu_is_at91sam9g25() (0)
184 #define cpu_is_at91sam9x25() (0) 177 #define cpu_is_at91sam9x25() (0)
185 #endif 178 #endif
186 179
187 /* 180 /*
188 * Since this is ARM, we will never run on any AVR32 CPU. But these 181 * Since this is ARM, we will never run on any AVR32 CPU. But these
189 * definitions may reduce clutter in common drivers. 182 * definitions may reduce clutter in common drivers.
190 */ 183 */
191 #define cpu_is_at32ap7000() (0) 184 #define cpu_is_at32ap7000() (0)
arch/arm/mach-at91/pm.h
Diff comments   View file @ 1e3ce2b
1 /* 1 /*
2 * AT91 Power Management 2 * AT91 Power Management
3 * 3 *
4 * Copyright (C) 2005 David Brownell 4 * Copyright (C) 2005 David Brownell
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or 8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version. 9 * (at your option) any later version.
10 */ 10 */
11 #ifndef __ARCH_ARM_MACH_AT91_PM 11 #ifndef __ARCH_ARM_MACH_AT91_PM
12 #define __ARCH_ARM_MACH_AT91_PM 12 #define __ARCH_ARM_MACH_AT91_PM
13 13
14 #include <mach/at91_ramc.h> 14 #include <mach/at91_ramc.h>
15 #include <mach/at91rm9200_sdramc.h> 15 #include <mach/at91rm9200_sdramc.h>
16 16
17 /* 17 /*
18 * The AT91RM9200 goes into self-refresh mode with this command, and will 18 * The AT91RM9200 goes into self-refresh mode with this command, and will
19 * terminate self-refresh automatically on the next SDRAM access. 19 * terminate self-refresh automatically on the next SDRAM access.
20 * 20 *
21 * Self-refresh mode is exited as soon as a memory access is made, but we don't 21 * Self-refresh mode is exited as soon as a memory access is made, but we don't
22 * know for sure when that happens. However, we need to restore the low-power 22 * know for sure when that happens. However, we need to restore the low-power
23 * mode if it was enabled before going idle. Restoring low-power mode while 23 * mode if it was enabled before going idle. Restoring low-power mode while
24 * still in self-refresh is "not recommended", but seems to work. 24 * still in self-refresh is "not recommended", but seems to work.
25 */ 25 */
26 26
27 static inline void at91rm9200_standby(void) 27 static inline void at91rm9200_standby(void)
28 { 28 {
29 u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR); 29 u32 lpr = at91_ramc_read(0, AT91RM9200_SDRAMC_LPR);
30 30
31 asm volatile( 31 asm volatile(
32 "b 1f\n\t" 32 "b 1f\n\t"
33 ".align 5\n\t" 33 ".align 5\n\t"
34 "1: mcr p15, 0, %0, c7, c10, 4\n\t" 34 "1: mcr p15, 0, %0, c7, c10, 4\n\t"
35 " str %0, [%1, %2]\n\t" 35 " str %0, [%1, %2]\n\t"
36 " str %3, [%1, %4]\n\t" 36 " str %3, [%1, %4]\n\t"
37 " mcr p15, 0, %0, c7, c0, 4\n\t" 37 " mcr p15, 0, %0, c7, c0, 4\n\t"
38 " str %5, [%1, %2]" 38 " str %5, [%1, %2]"
39 : 39 :
40 : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR), 40 : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR),
41 "r" (1), "r" (AT91RM9200_SDRAMC_SRR), 41 "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
42 "r" (lpr)); 42 "r" (lpr));
43 } 43 }
44 44
45 /* We manage both DDRAM/SDRAM controllers, we need more than one value to 45 /* We manage both DDRAM/SDRAM controllers, we need more than one value to
46 * remember. 46 * remember.
47 */ 47 */
48 static inline void at91sam9g45_standby(void) 48 static inline void at91sam9g45_standby(void)
49 { 49 {
50 /* Those two values allow us to delay self-refresh activation 50 /* Those two values allow us to delay self-refresh activation
51 * to the maximum. */ 51 * to the maximum. */
52 u32 lpr0, lpr1; 52 u32 lpr0, lpr1;
53 u32 saved_lpr0, saved_lpr1; 53 u32 saved_lpr0, saved_lpr1;
54 54
55 saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR); 55 saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
56 lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB; 56 lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
57 lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH; 57 lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
58 58
59 saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR); 59 saved_lpr0 = at91_ramc_read(0, AT91_DDRSDRC_LPR);
60 lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB; 60 lpr0 = saved_lpr0 & ~AT91_DDRSDRC_LPCB;
61 lpr0 |= AT91_DDRSDRC_LPCB_SELF_REFRESH; 61 lpr0 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
62 62
63 /* self-refresh mode now */ 63 /* self-refresh mode now */
64 at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0); 64 at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
65 at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1); 65 at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
66 66
67 cpu_do_idle(); 67 cpu_do_idle();
68 68
69 at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0); 69 at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
70 at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); 70 at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
71 } 71 }
72 72
73 #ifdef CONFIG_ARCH_AT91SAM9263 73 #ifdef CONFIG_SOC_AT91SAM9263
74 /* 74 /*
75 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; 75 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
76 * handle those cases both here and in the Suspend-To-RAM support. 76 * handle those cases both here and in the Suspend-To-RAM support.
77 */ 77 */
78 #warning Assuming EB1 SDRAM controller is *NOT* used 78 #warning Assuming EB1 SDRAM controller is *NOT* used
79 #endif 79 #endif
80 80
81 static inline void at91sam9_standby(void) 81 static inline void at91sam9_standby(void)
82 { 82 {
83 u32 saved_lpr, lpr; 83 u32 saved_lpr, lpr;
84 84
85 saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR); 85 saved_lpr = at91_ramc_read(0, AT91_SDRAMC_LPR);
86 86
87 lpr = saved_lpr & ~AT91_SDRAMC_LPCB; 87 lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
88 at91_ramc_write(0, AT91_SDRAMC_LPR, lpr | 88 at91_ramc_write(0, AT91_SDRAMC_LPR, lpr |
89 AT91_SDRAMC_LPCB_SELF_REFRESH); 89 AT91_SDRAMC_LPCB_SELF_REFRESH);
90 90
91 cpu_do_idle(); 91 cpu_do_idle();
92 92
93 at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr); 93 at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr);
94 } 94 }
95 95
96 #endif 96 #endif
97 97
arch/arm/mach-at91/pm_slowclock.S
Diff comments   View file @ 1e3ce2b
1 /* 1 /*
2 * arch/arm/mach-at91/pm_slow_clock.S 2 * arch/arm/mach-at91/pm_slow_clock.S
3 * 3 *
4 * Copyright (C) 2006 Savin Zlobec 4 * Copyright (C) 2006 Savin Zlobec
5 * 5 *
6 * AT91SAM9 support: 6 * AT91SAM9 support:
7 * Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee 7 * Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee
8 * 8 *
9 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12 * 12 *
13 */ 13 */
14 14
15 #include <linux/linkage.h> 15 #include <linux/linkage.h>
16 #include <mach/hardware.h> 16 #include <mach/hardware.h>
17 #include <mach/at91_pmc.h> 17 #include <mach/at91_pmc.h>
18 #include <mach/at91_ramc.h> 18 #include <mach/at91_ramc.h>
19 19
20 20
21 #ifdef CONFIG_ARCH_AT91SAM9263 21 #ifdef CONFIG_SOC_AT91SAM9263
22 /* 22 /*
23 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; 23 * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
24 * handle those cases both here and in the Suspend-To-RAM support. 24 * handle those cases both here and in the Suspend-To-RAM support.
25 */ 25 */
26 #warning Assuming EB1 SDRAM controller is *NOT* used 26 #warning Assuming EB1 SDRAM controller is *NOT* used
27 #endif 27 #endif
28 28
29 /* 29 /*
30 * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master 30 * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master
31 * clock during suspend by adjusting its prescalar and divisor. 31 * clock during suspend by adjusting its prescalar and divisor.
32 * NOTE: This hasn't been shown to be stable on SAM9s; and on the RM9200 there 32 * NOTE: This hasn't been shown to be stable on SAM9s; and on the RM9200 there
33 * are errata regarding adjusting the prescalar and divisor. 33 * are errata regarding adjusting the prescalar and divisor.
34 */ 34 */
35 #undef SLOWDOWN_MASTER_CLOCK 35 #undef SLOWDOWN_MASTER_CLOCK
36 36
37 #define MCKRDY_TIMEOUT 1000 37 #define MCKRDY_TIMEOUT 1000
38 #define MOSCRDY_TIMEOUT 1000 38 #define MOSCRDY_TIMEOUT 1000
39 #define PLLALOCK_TIMEOUT 1000 39 #define PLLALOCK_TIMEOUT 1000
40 #define PLLBLOCK_TIMEOUT 1000 40 #define PLLBLOCK_TIMEOUT 1000
41 41
42 pmc .req r0 42 pmc .req r0
43 sdramc .req r1 43 sdramc .req r1
44 ramc1 .req r2 44 ramc1 .req r2
45 memctrl .req r3 45 memctrl .req r3
46 tmp1 .req r4 46 tmp1 .req r4
47 tmp2 .req r5 47 tmp2 .req r5
48 48
49 /* 49 /*
50 * Wait until master clock is ready (after switching master clock source) 50 * Wait until master clock is ready (after switching master clock source)
51 */ 51 */
52 .macro wait_mckrdy 52 .macro wait_mckrdy
53 mov tmp2, #MCKRDY_TIMEOUT 53 mov tmp2, #MCKRDY_TIMEOUT
54 1: sub tmp2, tmp2, #1 54 1: sub tmp2, tmp2, #1
55 cmp tmp2, #0 55 cmp tmp2, #0
56 beq 2f 56 beq 2f
57 ldr tmp1, [pmc, #AT91_PMC_SR] 57 ldr tmp1, [pmc, #AT91_PMC_SR]
58 tst tmp1, #AT91_PMC_MCKRDY 58 tst tmp1, #AT91_PMC_MCKRDY
59 beq 1b 59 beq 1b
60 2: 60 2:
61 .endm 61 .endm
62 62
63 /* 63 /*
64 * Wait until master oscillator has stabilized. 64 * Wait until master oscillator has stabilized.
65 */ 65 */
66 .macro wait_moscrdy 66 .macro wait_moscrdy
67 mov tmp2, #MOSCRDY_TIMEOUT 67 mov tmp2, #MOSCRDY_TIMEOUT
68 1: sub tmp2, tmp2, #1 68 1: sub tmp2, tmp2, #1
69 cmp tmp2, #0 69 cmp tmp2, #0
70 beq 2f 70 beq 2f
71 ldr tmp1, [pmc, #AT91_PMC_SR] 71 ldr tmp1, [pmc, #AT91_PMC_SR]
72 tst tmp1, #AT91_PMC_MOSCS 72 tst tmp1, #AT91_PMC_MOSCS
73 beq 1b 73 beq 1b
74 2: 74 2:
75 .endm 75 .endm
76 76
77 /* 77 /*
78 * Wait until PLLA has locked. 78 * Wait until PLLA has locked.
79 */ 79 */
80 .macro wait_pllalock 80 .macro wait_pllalock
81 mov tmp2, #PLLALOCK_TIMEOUT 81 mov tmp2, #PLLALOCK_TIMEOUT
82 1: sub tmp2, tmp2, #1 82 1: sub tmp2, tmp2, #1
83 cmp tmp2, #0 83 cmp tmp2, #0
84 beq 2f 84 beq 2f
85 ldr tmp1, [pmc, #AT91_PMC_SR] 85 ldr tmp1, [pmc, #AT91_PMC_SR]
86 tst tmp1, #AT91_PMC_LOCKA 86 tst tmp1, #AT91_PMC_LOCKA
87 beq 1b 87 beq 1b
88 2: 88 2:
89 .endm 89 .endm
90 90
91 /* 91 /*
92 * Wait until PLLB has locked. 92 * Wait until PLLB has locked.
93 */ 93 */
94 .macro wait_pllblock 94 .macro wait_pllblock
95 mov tmp2, #PLLBLOCK_TIMEOUT 95 mov tmp2, #PLLBLOCK_TIMEOUT
96 1: sub tmp2, tmp2, #1 96 1: sub tmp2, tmp2, #1
97 cmp tmp2, #0 97 cmp tmp2, #0
98 beq 2f 98 beq 2f
99 ldr tmp1, [pmc, #AT91_PMC_SR] 99 ldr tmp1, [pmc, #AT91_PMC_SR]
100 tst tmp1, #AT91_PMC_LOCKB 100 tst tmp1, #AT91_PMC_LOCKB
101 beq 1b 101 beq 1b
102 2: 102 2:
103 .endm 103 .endm
104 104
105 .text 105 .text
106 106
107 /* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc, 107 /* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc,
108 * void __iomem *ramc1, int memctrl) 108 * void __iomem *ramc1, int memctrl)
109 */ 109 */
110 ENTRY(at91_slow_clock) 110 ENTRY(at91_slow_clock)
111 /* Save registers on stack */ 111 /* Save registers on stack */
112 stmfd sp!, {r4 - r12, lr} 112 stmfd sp!, {r4 - r12, lr}
113 113
114 /* 114 /*
115 * Register usage: 115 * Register usage:
116 * R0 = Base address of AT91_PMC 116 * R0 = Base address of AT91_PMC
117 * R1 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS) 117 * R1 = Base address of RAM Controller (SDRAM, DDRSDR, or AT91_SYS)
118 * R2 = Base address of second RAM Controller or 0 if not present 118 * R2 = Base address of second RAM Controller or 0 if not present
119 * R3 = Memory controller 119 * R3 = Memory controller
120 * R4 = temporary register 120 * R4 = temporary register
121 * R5 = temporary register 121 * R5 = temporary register
122 */ 122 */
123 123
124 /* Drain write buffer */ 124 /* Drain write buffer */
125 mov tmp1, #0 125 mov tmp1, #0
126 mcr p15, 0, tmp1, c7, c10, 4 126 mcr p15, 0, tmp1, c7, c10, 4
127 127
128 cmp memctrl, #AT91_MEMCTRL_MC 128 cmp memctrl, #AT91_MEMCTRL_MC
129 bne ddr_sr_enable 129 bne ddr_sr_enable
130 130
131 /* 131 /*
132 * at91rm9200 Memory controller 132 * at91rm9200 Memory controller
133 */ 133 */
134 /* Put SDRAM in self-refresh mode */ 134 /* Put SDRAM in self-refresh mode */
135 mov tmp1, #1 135 mov tmp1, #1
136 str tmp1, [sdramc, #AT91RM9200_SDRAMC_SRR] 136 str tmp1, [sdramc, #AT91RM9200_SDRAMC_SRR]
137 b sdr_sr_done 137 b sdr_sr_done
138 138
139 /* 139 /*
140 * DDRSDR Memory controller 140 * DDRSDR Memory controller
141 */ 141 */
142 ddr_sr_enable: 142 ddr_sr_enable:
143 cmp memctrl, #AT91_MEMCTRL_DDRSDR 143 cmp memctrl, #AT91_MEMCTRL_DDRSDR
144 bne sdr_sr_enable 144 bne sdr_sr_enable
145 145
146 /* prepare for DDRAM self-refresh mode */ 146 /* prepare for DDRAM self-refresh mode */
147 ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR] 147 ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR]
148 str tmp1, .saved_sam9_lpr 148 str tmp1, .saved_sam9_lpr
149 bic tmp1, #AT91_DDRSDRC_LPCB 149 bic tmp1, #AT91_DDRSDRC_LPCB
150 orr tmp1, #AT91_DDRSDRC_LPCB_SELF_REFRESH 150 orr tmp1, #AT91_DDRSDRC_LPCB_SELF_REFRESH
151 151
152 /* figure out if we use the second ram controller */ 152 /* figure out if we use the second ram controller */
153 cmp ramc1, #0 153 cmp ramc1, #0
154 ldrne tmp2, [ramc1, #AT91_DDRSDRC_LPR] 154 ldrne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
155 strne tmp2, .saved_sam9_lpr1 155 strne tmp2, .saved_sam9_lpr1
156 bicne tmp2, #AT91_DDRSDRC_LPCB 156 bicne tmp2, #AT91_DDRSDRC_LPCB
157 orrne tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH 157 orrne tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
158 158
159 /* Enable DDRAM self-refresh mode */ 159 /* Enable DDRAM self-refresh mode */
160 str tmp1, [sdramc, #AT91_DDRSDRC_LPR] 160 str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
161 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR] 161 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
162 162
163 b sdr_sr_done 163 b sdr_sr_done
164 164
165 /* 165 /*
166 * SDRAMC Memory controller 166 * SDRAMC Memory controller
167 */ 167 */
168 sdr_sr_enable: 168 sdr_sr_enable:
169 /* Enable SDRAM self-refresh mode */ 169 /* Enable SDRAM self-refresh mode */
170 ldr tmp1, [sdramc, #AT91_SDRAMC_LPR] 170 ldr tmp1, [sdramc, #AT91_SDRAMC_LPR]
171 str tmp1, .saved_sam9_lpr 171 str tmp1, .saved_sam9_lpr
172 172
173 bic tmp1, #AT91_SDRAMC_LPCB 173 bic tmp1, #AT91_SDRAMC_LPCB
174 orr tmp1, #AT91_SDRAMC_LPCB_SELF_REFRESH 174 orr tmp1, #AT91_SDRAMC_LPCB_SELF_REFRESH
175 str tmp1, [sdramc, #AT91_SDRAMC_LPR] 175 str tmp1, [sdramc, #AT91_SDRAMC_LPR]
176 176
177 sdr_sr_done: 177 sdr_sr_done:
178 /* Save Master clock setting */ 178 /* Save Master clock setting */
179 ldr tmp1, [pmc, #AT91_PMC_MCKR] 179 ldr tmp1, [pmc, #AT91_PMC_MCKR]
180 str tmp1, .saved_mckr 180 str tmp1, .saved_mckr
181 181
182 /* 182 /*
183 * Set the Master clock source to slow clock 183 * Set the Master clock source to slow clock
184 */ 184 */
185 bic tmp1, tmp1, #AT91_PMC_CSS 185 bic tmp1, tmp1, #AT91_PMC_CSS
186 str tmp1, [pmc, #AT91_PMC_MCKR] 186 str tmp1, [pmc, #AT91_PMC_MCKR]
187 187
188 wait_mckrdy 188 wait_mckrdy
189 189
190 #ifdef SLOWDOWN_MASTER_CLOCK 190 #ifdef SLOWDOWN_MASTER_CLOCK
191 /* 191 /*
192 * Set the Master Clock PRES and MDIV fields. 192 * Set the Master Clock PRES and MDIV fields.
193 * 193 *
194 * See AT91RM9200 errata #27 and #28 for details. 194 * See AT91RM9200 errata #27 and #28 for details.
195 */ 195 */
196 mov tmp1, #0 196 mov tmp1, #0
197 str tmp1, [pmc, #AT91_PMC_MCKR] 197 str tmp1, [pmc, #AT91_PMC_MCKR]
198 198
199 wait_mckrdy 199 wait_mckrdy
200 #endif 200 #endif
201 201
202 /* Save PLLA setting and disable it */ 202 /* Save PLLA setting and disable it */
203 ldr tmp1, [pmc, #AT91_CKGR_PLLAR] 203 ldr tmp1, [pmc, #AT91_CKGR_PLLAR]
204 str tmp1, .saved_pllar 204 str tmp1, .saved_pllar
205 205
206 mov tmp1, #AT91_PMC_PLLCOUNT 206 mov tmp1, #AT91_PMC_PLLCOUNT
207 orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */ 207 orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */
208 str tmp1, [pmc, #AT91_CKGR_PLLAR] 208 str tmp1, [pmc, #AT91_CKGR_PLLAR]
209 209
210 /* Save PLLB setting and disable it */ 210 /* Save PLLB setting and disable it */
211 ldr tmp1, [pmc, #AT91_CKGR_PLLBR] 211 ldr tmp1, [pmc, #AT91_CKGR_PLLBR]
212 str tmp1, .saved_pllbr 212 str tmp1, .saved_pllbr
213 213
214 mov tmp1, #AT91_PMC_PLLCOUNT 214 mov tmp1, #AT91_PMC_PLLCOUNT
215 str tmp1, [pmc, #AT91_CKGR_PLLBR] 215 str tmp1, [pmc, #AT91_CKGR_PLLBR]
216 216
217 /* Turn off the main oscillator */ 217 /* Turn off the main oscillator */
218 ldr tmp1, [pmc, #AT91_CKGR_MOR] 218 ldr tmp1, [pmc, #AT91_CKGR_MOR]
219 bic tmp1, tmp1, #AT91_PMC_MOSCEN 219 bic tmp1, tmp1, #AT91_PMC_MOSCEN
220 str tmp1, [pmc, #AT91_CKGR_MOR] 220 str tmp1, [pmc, #AT91_CKGR_MOR]
221 221
222 /* Wait for interrupt */ 222 /* Wait for interrupt */
223 mcr p15, 0, tmp1, c7, c0, 4 223 mcr p15, 0, tmp1, c7, c0, 4
224 224
225 /* Turn on the main oscillator */ 225 /* Turn on the main oscillator */
226 ldr tmp1, [pmc, #AT91_CKGR_MOR] 226 ldr tmp1, [pmc, #AT91_CKGR_MOR]
227 orr tmp1, tmp1, #AT91_PMC_MOSCEN 227 orr tmp1, tmp1, #AT91_PMC_MOSCEN
228 str tmp1, [pmc, #AT91_CKGR_MOR] 228 str tmp1, [pmc, #AT91_CKGR_MOR]
229 229
230 wait_moscrdy 230 wait_moscrdy
231 231
232 /* Restore PLLB setting */ 232 /* Restore PLLB setting */
233 ldr tmp1, .saved_pllbr 233 ldr tmp1, .saved_pllbr
234 str tmp1, [pmc, #AT91_CKGR_PLLBR] 234 str tmp1, [pmc, #AT91_CKGR_PLLBR]
235 235
236 tst tmp1, #(AT91_PMC_MUL & 0xff0000) 236 tst tmp1, #(AT91_PMC_MUL & 0xff0000)
237 bne 1f 237 bne 1f
238 tst tmp1, #(AT91_PMC_MUL & ~0xff0000) 238 tst tmp1, #(AT91_PMC_MUL & ~0xff0000)
239 beq 2f 239 beq 2f
240 1: 240 1:
241 wait_pllblock 241 wait_pllblock
242 2: 242 2:
243 243
244 /* Restore PLLA setting */ 244 /* Restore PLLA setting */
245 ldr tmp1, .saved_pllar 245 ldr tmp1, .saved_pllar
246 str tmp1, [pmc, #AT91_CKGR_PLLAR] 246 str tmp1, [pmc, #AT91_CKGR_PLLAR]
247 247
248 tst tmp1, #(AT91_PMC_MUL & 0xff0000) 248 tst tmp1, #(AT91_PMC_MUL & 0xff0000)
249 bne 3f 249 bne 3f
250 tst tmp1, #(AT91_PMC_MUL & ~0xff0000) 250 tst tmp1, #(AT91_PMC_MUL & ~0xff0000)
251 beq 4f 251 beq 4f
252 3: 252 3:
253 wait_pllalock 253 wait_pllalock
254 4: 254 4:
255 255
256 #ifdef SLOWDOWN_MASTER_CLOCK 256 #ifdef SLOWDOWN_MASTER_CLOCK
257 /* 257 /*
258 * First set PRES if it was not 0, 258 * First set PRES if it was not 0,
259 * than set CSS and MDIV fields. 259 * than set CSS and MDIV fields.
260 * 260 *
261 * See AT91RM9200 errata #27 and #28 for details. 261 * See AT91RM9200 errata #27 and #28 for details.
262 */ 262 */
263 ldr tmp1, .saved_mckr 263 ldr tmp1, .saved_mckr
264 tst tmp1, #AT91_PMC_PRES 264 tst tmp1, #AT91_PMC_PRES
265 beq 2f 265 beq 2f
266 and tmp1, tmp1, #AT91_PMC_PRES 266 and tmp1, tmp1, #AT91_PMC_PRES
267 str tmp1, [pmc, #AT91_PMC_MCKR] 267 str tmp1, [pmc, #AT91_PMC_MCKR]
268 268
269 wait_mckrdy 269 wait_mckrdy
270 #endif 270 #endif
271 271
272 /* 272 /*
273 * Restore master clock setting 273 * Restore master clock setting
274 */ 274 */
275 2: ldr tmp1, .saved_mckr 275 2: ldr tmp1, .saved_mckr
276 str tmp1, [pmc, #AT91_PMC_MCKR] 276 str tmp1, [pmc, #AT91_PMC_MCKR]
277 277
278 wait_mckrdy 278 wait_mckrdy
279 279
280 /* 280 /*
281 * at91rm9200 Memory controller 281 * at91rm9200 Memory controller
282 * Do nothing - self-refresh is automatically disabled. 282 * Do nothing - self-refresh is automatically disabled.
283 */ 283 */
284 cmp memctrl, #AT91_MEMCTRL_MC 284 cmp memctrl, #AT91_MEMCTRL_MC
285 beq ram_restored 285 beq ram_restored
286 286
287 /* 287 /*
288 * DDRSDR Memory controller 288 * DDRSDR Memory controller
289 */ 289 */
290 cmp memctrl, #AT91_MEMCTRL_DDRSDR 290 cmp memctrl, #AT91_MEMCTRL_DDRSDR
291 bne sdr_en_restore 291 bne sdr_en_restore
292 /* Restore LPR on AT91 with DDRAM */ 292 /* Restore LPR on AT91 with DDRAM */
293 ldr tmp1, .saved_sam9_lpr 293 ldr tmp1, .saved_sam9_lpr
294 str tmp1, [sdramc, #AT91_DDRSDRC_LPR] 294 str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
295 295
296 /* if we use the second ram controller */ 296 /* if we use the second ram controller */
297 cmp ramc1, #0 297 cmp ramc1, #0
298 ldrne tmp2, .saved_sam9_lpr1 298 ldrne tmp2, .saved_sam9_lpr1
299 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR] 299 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
300 300
301 b ram_restored 301 b ram_restored
302 302
303 /* 303 /*
304 * SDRAMC Memory controller 304 * SDRAMC Memory controller
305 */ 305 */
306 sdr_en_restore: 306 sdr_en_restore:
307 /* Restore LPR on AT91 with SDRAM */ 307 /* Restore LPR on AT91 with SDRAM */
308 ldr tmp1, .saved_sam9_lpr 308 ldr tmp1, .saved_sam9_lpr
309 str tmp1, [sdramc, #AT91_SDRAMC_LPR] 309 str tmp1, [sdramc, #AT91_SDRAMC_LPR]
310 310
311 ram_restored: 311 ram_restored:
312 /* Restore registers, and return */ 312 /* Restore registers, and return */
313 ldmfd sp!, {r4 - r12, pc} 313 ldmfd sp!, {r4 - r12, pc}
314 314
315 315
316 .saved_mckr: 316 .saved_mckr:
317 .word 0 317 .word 0
318 318
319 .saved_pllar: 319 .saved_pllar:
320 .word 0 320 .word 0
321 321
322 .saved_pllbr: 322 .saved_pllbr:
323 .word 0 323 .word 0
324 324
325 .saved_sam9_lpr: 325 .saved_sam9_lpr:
326 .word 0 326 .word 0
327 327
328 .saved_sam9_lpr1: 328 .saved_sam9_lpr1:
329 .word 0 329 .word 0
330 330
331 ENTRY(at91_slow_clock_sz) 331 ENTRY(at91_slow_clock_sz)
332 .word .-at91_slow_clock 332 .word .-at91_slow_clock
333 333
arch/arm/mach-at91/soc.h
Diff comments   View file @ 1e3ce2b
1 /* 1 /*
2 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 2 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
3 * 3 *
4 * Under GPLv2 4 * Under GPLv2
5 */ 5 */
6 6
7 struct at91_init_soc { 7 struct at91_init_soc {
8 unsigned int *default_irq_priority; 8 unsigned int *default_irq_priority;
9 void (*map_io)(void); 9 void (*map_io)(void);
10 void (*ioremap_registers)(void); 10 void (*ioremap_registers)(void);
11 void (*register_clocks)(void); 11 void (*register_clocks)(void);
12 void (*init)(void); 12 void (*init)(void);
13 }; 13 };
14 14
15 extern struct at91_init_soc at91_boot_soc; 15 extern struct at91_init_soc at91_boot_soc;
16 extern struct at91_init_soc at91rm9200_soc; 16 extern struct at91_init_soc at91rm9200_soc;
17 extern struct at91_init_soc at91sam9260_soc; 17 extern struct at91_init_soc at91sam9260_soc;
18 extern struct at91_init_soc at91sam9261_soc; 18 extern struct at91_init_soc at91sam9261_soc;
19 extern struct at91_init_soc at91sam9263_soc; 19 extern struct at91_init_soc at91sam9263_soc;
20 extern struct at91_init_soc at91sam9g45_soc; 20 extern struct at91_init_soc at91sam9g45_soc;
21 extern struct at91_init_soc at91sam9rl_soc; 21 extern struct at91_init_soc at91sam9rl_soc;
22 extern struct at91_init_soc at91sam9x5_soc; 22 extern struct at91_init_soc at91sam9x5_soc;
23 23
24 static inline int at91_soc_is_enabled(void) 24 static inline int at91_soc_is_enabled(void)
25 { 25 {
26 return at91_boot_soc.init != NULL; 26 return at91_boot_soc.init != NULL;
27 } 27 }
28 28
29 #if !defined(CONFIG_ARCH_AT91RM9200) 29 #if !defined(CONFIG_SOC_AT91RM9200)
30 #define at91rm9200_soc at91_boot_soc 30 #define at91rm9200_soc at91_boot_soc
31 #endif 31 #endif
32 32
33 #if !(defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20)) 33 #if !defined(CONFIG_SOC_AT91SAM9260)
34 #define at91sam9260_soc at91_boot_soc 34 #define at91sam9260_soc at91_boot_soc
35 #endif 35 #endif
36 36
37 #if !(defined(CONFIG_ARCH_AT91SAM9261) || defined(CONFIG_ARCH_AT91SAM9G10)) 37 #if !defined(CONFIG_SOC_AT91SAM9261)
38 #define at91sam9261_soc at91_boot_soc 38 #define at91sam9261_soc at91_boot_soc
39 #endif 39 #endif
40 40
41 #if !defined(CONFIG_ARCH_AT91SAM9263) 41 #if !defined(CONFIG_SOC_AT91SAM9263)
42 #define at91sam9263_soc at91_boot_soc 42 #define at91sam9263_soc at91_boot_soc
43 #endif 43 #endif
44 44
45 #if !defined(CONFIG_ARCH_AT91SAM9G45) 45 #if !defined(CONFIG_SOC_AT91SAM9G45)
46 #define at91sam9g45_soc at91_boot_soc 46 #define at91sam9g45_soc at91_boot_soc
47 #endif 47 #endif
48 48
49 #if !defined(CONFIG_ARCH_AT91SAM9RL) 49 #if !defined(CONFIG_SOC_AT91SAM9RL)
50 #define at91sam9rl_soc at91_boot_soc 50 #define at91sam9rl_soc at91_boot_soc
51 #endif 51 #endif
52 52
53 #if !defined(CONFIG_ARCH_AT91SAM9X5) 53 #if !defined(CONFIG_SOC_AT91SAM9X5)
54 #define at91sam9x5_soc at91_boot_soc 54 #define at91sam9x5_soc at91_boot_soc
55 #endif 55 #endif
56 56