Commit 2a05e333c2cee711c828d79300010b721c81574f

Authored by Holger Brunck
Committed by Kumar Gala
1 parent 37caf9f2a1

powerpc/82xx: updates for mgcoge

Add:
 - Setup dts node for USB
 - pin description and setup for SMC1 (serial interface)

Update and cleanup mgcoge_defconfig:
- enable: TIPC, UBIFS, USB_GADGET driver, SQUASHFS, HIGHRES timers
          POSIX_MQUEUE, EMBEDDED
- disable: EXT3, PPC_PMAC

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher <hs@denx.de>
cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Showing 3 changed files with 29 additions and 11 deletions Inline Diff

arch/powerpc/boot/dts/mgcoge.dts
1 /* 1 /*
2 * Device Tree for the MGCOGE plattform from keymile 2 * Device Tree for the MGCOGE plattform from keymile
3 * 3 *
4 * Copyright 2008 DENX Software Engineering GmbH 4 * Copyright 2008 DENX Software Engineering GmbH
5 * Heiko Schocher <hs@denx.de> 5 * Heiko Schocher <hs@denx.de>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your 9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13 /dts-v1/; 13 /dts-v1/;
14 / { 14 / {
15 model = "MGCOGE"; 15 model = "MGCOGE";
16 compatible = "keymile,km82xx"; 16 compatible = "keymile,km82xx";
17 #address-cells = <1>; 17 #address-cells = <1>;
18 #size-cells = <1>; 18 #size-cells = <1>;
19 19
20 aliases { 20 aliases {
21 ethernet0 = &eth0; 21 ethernet0 = &eth0;
22 serial0 = &smc2; 22 serial0 = &smc2;
23 }; 23 };
24 24
25 cpus { 25 cpus {
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 PowerPC,8247@0 { 29 PowerPC,8247@0 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 reg = <0>; 31 reg = <0>;
32 d-cache-line-size = <32>; 32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>; 33 i-cache-line-size = <32>;
34 d-cache-size = <16384>; 34 d-cache-size = <16384>;
35 i-cache-size = <16384>; 35 i-cache-size = <16384>;
36 timebase-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */
37 clock-frequency = <0>; /* Filled in by U-Boot */ 37 clock-frequency = <0>; /* Filled in by U-Boot */
38 bus-frequency = <0>; /* Filled in by U-Boot */ 38 bus-frequency = <0>; /* Filled in by U-Boot */
39 }; 39 };
40 }; 40 };
41 41
42 localbus@f0010100 { 42 localbus@f0010100 {
43 compatible = "fsl,mpc8247-localbus", 43 compatible = "fsl,mpc8247-localbus",
44 "fsl,pq2-localbus", 44 "fsl,pq2-localbus",
45 "simple-bus"; 45 "simple-bus";
46 #address-cells = <2>; 46 #address-cells = <2>;
47 #size-cells = <1>; 47 #size-cells = <1>;
48 reg = <0xf0010100 0x40>; 48 reg = <0xf0010100 0x40>;
49 49
50 ranges = <0 0 0xfe000000 0x00400000 50 ranges = <0 0 0xfe000000 0x00400000
51 1 0 0x30000000 0x00010000 51 1 0 0x30000000 0x00010000
52 2 0 0x40000000 0x00010000 52 2 0 0x40000000 0x00010000
53 5 0 0x50000000 0x04000000 53 5 0 0x50000000 0x04000000
54 >; 54 >;
55 55
56 flash@0,0 { 56 flash@0,0 {
57 compatible = "cfi-flash"; 57 compatible = "cfi-flash";
58 reg = <0 0x0 0x400000>; 58 reg = <0 0x0 0x400000>;
59 #address-cells = <1>; 59 #address-cells = <1>;
60 #size-cells = <1>; 60 #size-cells = <1>;
61 bank-width = <1>; 61 bank-width = <1>;
62 device-width = <1>; 62 device-width = <1>;
63 partition@0 { 63 partition@0 {
64 label = "u-boot"; 64 label = "u-boot";
65 reg = <0x00000 0xC0000>; 65 reg = <0x00000 0xC0000>;
66 }; 66 };
67 partition@1 { 67 partition@1 {
68 label = "env"; 68 label = "env";
69 reg = <0xC0000 0x20000>; 69 reg = <0xC0000 0x20000>;
70 }; 70 };
71 partition@2 { 71 partition@2 {
72 label = "envred"; 72 label = "envred";
73 reg = <0xE0000 0x20000>; 73 reg = <0xE0000 0x20000>;
74 }; 74 };
75 partition@3 { 75 partition@3 {
76 label = "free"; 76 label = "free";
77 reg = <0x100000 0x300000>; 77 reg = <0x100000 0x300000>;
78 }; 78 };
79 }; 79 };
80 80
81 flash@5,0 { 81 flash@5,0 {
82 compatible = "cfi-flash"; 82 compatible = "cfi-flash";
83 reg = <5 0x00000000 0x02000000 83 reg = <5 0x00000000 0x02000000
84 5 0x02000000 0x02000000>; 84 5 0x02000000 0x02000000>;
85 #address-cells = <1>; 85 #address-cells = <1>;
86 #size-cells = <1>; 86 #size-cells = <1>;
87 bank-width = <2>; 87 bank-width = <2>;
88 partition@app { /* 64 MBytes */ 88 partition@app { /* 64 MBytes */
89 label = "ubi0"; 89 label = "ubi0";
90 reg = <0x00000000 0x04000000>; 90 reg = <0x00000000 0x04000000>;
91 }; 91 };
92 }; 92 };
93 }; 93 };
94 94
95 memory { 95 memory {
96 device_type = "memory"; 96 device_type = "memory";
97 reg = <0 0>; /* Filled in by U-Boot */ 97 reg = <0 0>; /* Filled in by U-Boot */
98 }; 98 };
99 99
100 soc@f0000000 { 100 soc@f0000000 {
101 #address-cells = <1>; 101 #address-cells = <1>;
102 #size-cells = <1>; 102 #size-cells = <1>;
103 compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus"; 103 compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus";
104 ranges = <0x00000000 0xf0000000 0x00053000>; 104 ranges = <0x00000000 0xf0000000 0x00053000>;
105 105
106 // Temporary until code stops depending on it. 106 // Temporary until code stops depending on it.
107 device_type = "soc"; 107 device_type = "soc";
108 108
109 cpm@119c0 { 109 cpm@119c0 {
110 #address-cells = <1>; 110 #address-cells = <1>;
111 #size-cells = <1>; 111 #size-cells = <1>;
112 #interrupt-cells = <2>; 112 #interrupt-cells = <2>;
113 compatible = "fsl,mpc8247-cpm", "fsl,cpm2", 113 compatible = "fsl,mpc8247-cpm", "fsl,cpm2",
114 "simple-bus"; 114 "simple-bus";
115 reg = <0x119c0 0x30>; 115 reg = <0x119c0 0x30>;
116 ranges; 116 ranges;
117 117
118 muram { 118 muram {
119 compatible = "fsl,cpm-muram"; 119 compatible = "fsl,cpm-muram";
120 #address-cells = <1>; 120 #address-cells = <1>;
121 #size-cells = <1>; 121 #size-cells = <1>;
122 ranges = <0 0 0x10000>; 122 ranges = <0 0 0x10000>;
123 123
124 data@0 { 124 data@0 {
125 compatible = "fsl,cpm-muram-data"; 125 compatible = "fsl,cpm-muram-data";
126 reg = <0x80 0x1f80 0x9800 0x800>; 126 reg = <0x80 0x1f80 0x9800 0x800>;
127 }; 127 };
128 }; 128 };
129 129
130 brg@119f0 { 130 brg@119f0 {
131 compatible = "fsl,mpc8247-brg", 131 compatible = "fsl,mpc8247-brg",
132 "fsl,cpm2-brg", 132 "fsl,cpm2-brg",
133 "fsl,cpm-brg"; 133 "fsl,cpm-brg";
134 reg = <0x119f0 0x10 0x115f0 0x10>; 134 reg = <0x119f0 0x10 0x115f0 0x10>;
135 }; 135 };
136 136
137 /* Monitor port/SMC2 */ 137 /* Monitor port/SMC2 */
138 smc2: serial@11a90 { 138 smc2: serial@11a90 {
139 device_type = "serial"; 139 device_type = "serial";
140 compatible = "fsl,mpc8247-smc-uart", 140 compatible = "fsl,mpc8247-smc-uart",
141 "fsl,cpm2-smc-uart"; 141 "fsl,cpm2-smc-uart";
142 reg = <0x11a90 0x20 0x88fc 0x02>; 142 reg = <0x11a90 0x20 0x88fc 0x02>;
143 interrupts = <5 8>; 143 interrupts = <5 8>;
144 interrupt-parent = <&PIC>; 144 interrupt-parent = <&PIC>;
145 fsl,cpm-brg = <2>; 145 fsl,cpm-brg = <2>;
146 fsl,cpm-command = <0x21200000>; 146 fsl,cpm-command = <0x21200000>;
147 current-speed = <0>; /* Filled in by U-Boot */ 147 current-speed = <0>; /* Filled in by U-Boot */
148 }; 148 };
149 149
150 eth0: ethernet@11a60 { 150 eth0: ethernet@11a60 {
151 device_type = "network"; 151 device_type = "network";
152 compatible = "fsl,mpc8247-scc-enet", 152 compatible = "fsl,mpc8247-scc-enet",
153 "fsl,cpm2-scc-enet"; 153 "fsl,cpm2-scc-enet";
154 reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>; 154 reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>;
155 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */ 155 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
156 interrupts = <43 8>; 156 interrupts = <43 8>;
157 interrupt-parent = <&PIC>; 157 interrupt-parent = <&PIC>;
158 linux,network-index = <0>; 158 linux,network-index = <0>;
159 fsl,cpm-command = <0xce00000>; 159 fsl,cpm-command = <0xce00000>;
160 fixed-link = <0 0 10 0 0>; 160 fixed-link = <0 0 10 0 0>;
161 }; 161 };
162 162
163 i2c@11860 { 163 i2c@11860 {
164 compatible = "fsl,mpc8272-i2c", 164 compatible = "fsl,mpc8272-i2c",
165 "fsl,cpm2-i2c"; 165 "fsl,cpm2-i2c";
166 reg = <0x11860 0x20 0x8afc 0x2>; 166 reg = <0x11860 0x20 0x8afc 0x2>;
167 interrupts = <1 8>; 167 interrupts = <1 8>;
168 interrupt-parent = <&PIC>; 168 interrupt-parent = <&PIC>;
169 fsl,cpm-command = <0x29600000>; 169 fsl,cpm-command = <0x29600000>;
170 #address-cells = <1>; 170 #address-cells = <1>;
171 #size-cells = <0>; 171 #size-cells = <0>;
172 }; 172 };
173 173
174 mdio@10d40 { 174 mdio@10d40 {
175 compatible = "fsl,cpm2-mdio-bitbang"; 175 compatible = "fsl,cpm2-mdio-bitbang";
176 reg = <0x10d00 0x14>; 176 reg = <0x10d00 0x14>;
177 #address-cells = <1>; 177 #address-cells = <1>;
178 #size-cells = <0>; 178 #size-cells = <0>;
179 fsl,mdio-pin = <12>; 179 fsl,mdio-pin = <12>;
180 fsl,mdc-pin = <13>; 180 fsl,mdc-pin = <13>;
181 181
182 phy0: ethernet-phy@0 { 182 phy0: ethernet-phy@0 {
183 reg = <0x0>; 183 reg = <0x0>;
184 }; 184 };
185 185
186 phy1: ethernet-phy@1 { 186 phy1: ethernet-phy@1 {
187 reg = <0x1>; 187 reg = <0x1>;
188 }; 188 };
189 }; 189 };
190 190
191 /* FCC1 management to switch */ 191 /* FCC1 management to switch */
192 ethernet@11300 { 192 ethernet@11300 {
193 device_type = "network"; 193 device_type = "network";
194 compatible = "fsl,cpm2-fcc-enet"; 194 compatible = "fsl,cpm2-fcc-enet";
195 reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>; 195 reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
196 local-mac-address = [ 00 01 02 03 04 07 ]; 196 local-mac-address = [ 00 01 02 03 04 07 ];
197 interrupts = <32 8>; 197 interrupts = <32 8>;
198 interrupt-parent = <&PIC>; 198 interrupt-parent = <&PIC>;
199 phy-handle = <&phy0>; 199 phy-handle = <&phy0>;
200 linux,network-index = <1>; 200 linux,network-index = <1>;
201 fsl,cpm-command = <0x12000300>; 201 fsl,cpm-command = <0x12000300>;
202 }; 202 };
203 203
204 /* FCC2 to redundant core unit over backplane */ 204 /* FCC2 to redundant core unit over backplane */
205 ethernet@11320 { 205 ethernet@11320 {
206 device_type = "network"; 206 device_type = "network";
207 compatible = "fsl,cpm2-fcc-enet"; 207 compatible = "fsl,cpm2-fcc-enet";
208 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>; 208 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
209 local-mac-address = [ 00 01 02 03 04 08 ]; 209 local-mac-address = [ 00 01 02 03 04 08 ];
210 interrupts = <33 8>; 210 interrupts = <33 8>;
211 interrupt-parent = <&PIC>; 211 interrupt-parent = <&PIC>;
212 phy-handle = <&phy1>; 212 phy-handle = <&phy1>;
213 linux,network-index = <2>; 213 linux,network-index = <2>;
214 fsl,cpm-command = <0x16200300>; 214 fsl,cpm-command = <0x16200300>;
215 }; 215 };
216
217 usb@11b60 {
218 compatible = "fsl,mpc8272-cpm-usb";
219 mode = "peripheral";
220 reg = <0x11b60 0x40 0x8b00 0x100>;
221 interrupts = <11 8>;
222 interrupt-parent = <&PIC>;
223 usb-clock = <5>;
224 };
216 }; 225 };
217 226
218 cpm2_pio_c: gpio-controller@10d40 { 227 cpm2_pio_c: gpio-controller@10d40 {
219 #gpio-cells = <2>; 228 #gpio-cells = <2>;
220 compatible = "fsl,cpm2-pario-bank"; 229 compatible = "fsl,cpm2-pario-bank";
221 reg = <0x10d40 0x14>; 230 reg = <0x10d40 0x14>;
222 gpio-controller; 231 gpio-controller;
223 }; 232 };
224 233
225 PIC: interrupt-controller@10c00 { 234 PIC: interrupt-controller@10c00 {
226 #interrupt-cells = <2>; 235 #interrupt-cells = <2>;
227 interrupt-controller; 236 interrupt-controller;
228 reg = <0x10c00 0x80>; 237 reg = <0x10c00 0x80>;
229 compatible = "fsl,mpc8247-pic", "fsl,pq2-pic"; 238 compatible = "fsl,mpc8247-pic", "fsl,pq2-pic";
230 }; 239 };
231 }; 240 };
232 }; 241 };
233 242
arch/powerpc/configs/mgcoge_defconfig
1 CONFIG_EXPERIMENTAL=y
2 # CONFIG_SWAP is not set
1 CONFIG_SYSVIPC=y 3 CONFIG_SYSVIPC=y
4 CONFIG_POSIX_MQUEUE=y
2 CONFIG_SPARSE_IRQ=y 5 CONFIG_SPARSE_IRQ=y
3 CONFIG_IKCONFIG=y 6 CONFIG_IKCONFIG=y
4 CONFIG_IKCONFIG_PROC=y 7 CONFIG_IKCONFIG_PROC=y
5 CONFIG_LOG_BUF_SHIFT=14 8 CONFIG_LOG_BUF_SHIFT=14
6 CONFIG_BLK_DEV_INITRD=y 9 CONFIG_BLK_DEV_INITRD=y
7 CONFIG_EXPERT=y 10 # CONFIG_RD_GZIP is not set
8 CONFIG_KALLSYMS_ALL=y 11 CONFIG_KALLSYMS_ALL=y
12 # CONFIG_PCSPKR_PLATFORM is not set
13 CONFIG_EMBEDDED=y
9 CONFIG_SLAB=y 14 CONFIG_SLAB=y
10 # CONFIG_IOSCHED_CFQ is not set 15 # CONFIG_IOSCHED_CFQ is not set
16 # CONFIG_PPC_PMAC is not set
11 CONFIG_PPC_82xx=y 17 CONFIG_PPC_82xx=y
12 CONFIG_MGCOGE=y 18 CONFIG_MGCOGE=y
19 CONFIG_HIGH_RES_TIMERS=y
13 CONFIG_BINFMT_MISC=y 20 CONFIG_BINFMT_MISC=y
14 # CONFIG_SECCOMP is not set 21 # CONFIG_SECCOMP is not set
15 CONFIG_NET=y 22 CONFIG_NET=y
16 CONFIG_PACKET=y 23 CONFIG_PACKET=y
17 CONFIG_UNIX=y 24 CONFIG_UNIX=y
18 CONFIG_INET=y 25 CONFIG_INET=y
19 CONFIG_IP_MULTICAST=y 26 CONFIG_IP_MULTICAST=y
20 CONFIG_IP_PNP=y 27 CONFIG_IP_PNP=y
21 CONFIG_IP_PNP_DHCP=y 28 CONFIG_IP_PNP_DHCP=y
22 CONFIG_IP_PNP_BOOTP=y 29 CONFIG_IP_PNP_BOOTP=y
23 CONFIG_SYN_COOKIES=y 30 CONFIG_SYN_COOKIES=y
24 # CONFIG_INET_LRO is not set 31 # CONFIG_INET_LRO is not set
25 # CONFIG_IPV6 is not set 32 # CONFIG_IPV6 is not set
26 CONFIG_NETFILTER=y 33 CONFIG_NETFILTER=y
34 CONFIG_TIPC=y
27 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 35 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
28 # CONFIG_FW_LOADER is not set 36 # CONFIG_FW_LOADER is not set
29 CONFIG_MTD=y 37 CONFIG_MTD=y
30 CONFIG_MTD_CONCAT=y
31 CONFIG_MTD_PARTITIONS=y
32 CONFIG_MTD_CMDLINE_PARTS=y 38 CONFIG_MTD_CMDLINE_PARTS=y
33 CONFIG_MTD_CHAR=y 39 CONFIG_MTD_CHAR=y
34 CONFIG_MTD_BLKDEVS=y 40 CONFIG_MTD_BLKDEVS=y
35 CONFIG_MTD_CFI=y 41 CONFIG_MTD_CFI=y
36 CONFIG_MTD_CFI_ADV_OPTIONS=y 42 CONFIG_MTD_CFI_ADV_OPTIONS=y
37 CONFIG_MTD_CFI_GEOMETRY=y 43 CONFIG_MTD_CFI_GEOMETRY=y
38 # CONFIG_MTD_MAP_BANK_WIDTH_4 is not set 44 # CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
39 CONFIG_MTD_CFI_INTELEXT=y 45 CONFIG_MTD_CFI_INTELEXT=y
40 CONFIG_MTD_CFI_AMDSTD=y 46 CONFIG_MTD_CFI_AMDSTD=y
41 CONFIG_MTD_PHYSMAP_OF=y 47 CONFIG_MTD_PHYSMAP_OF=y
42 CONFIG_PROC_DEVICETREE=y 48 CONFIG_PROC_DEVICETREE=y
43 CONFIG_BLK_DEV_LOOP=y 49 CONFIG_BLK_DEV_LOOP=y
44 CONFIG_BLK_DEV_RAM=y 50 CONFIG_BLK_DEV_RAM=y
45 # CONFIG_MACINTOSH_DRIVERS is not set
46 CONFIG_NETDEVICES=y 51 CONFIG_NETDEVICES=y
47 CONFIG_FIXED_PHY=y 52 CONFIG_FIXED_PHY=y
48 CONFIG_NET_ETHERNET=y 53 CONFIG_NET_ETHERNET=y
49 CONFIG_FS_ENET=y 54 CONFIG_FS_ENET=y
50 CONFIG_FS_ENET_MDIO_FCC=y 55 CONFIG_FS_ENET_MDIO_FCC=y
51 # CONFIG_NETDEV_1000 is not set 56 # CONFIG_NETDEV_1000 is not set
52 # CONFIG_NETDEV_10000 is not set 57 # CONFIG_NETDEV_10000 is not set
58 # CONFIG_WLAN is not set
53 # CONFIG_INPUT is not set 59 # CONFIG_INPUT is not set
54 # CONFIG_SERIO is not set 60 # CONFIG_SERIO is not set
55 # CONFIG_VT is not set 61 # CONFIG_VT is not set
56 CONFIG_SERIAL_CPM=y 62 CONFIG_SERIAL_CPM=y
57 CONFIG_SERIAL_CPM_CONSOLE=y 63 CONFIG_SERIAL_CPM_CONSOLE=y
58 CONFIG_I2C=y 64 CONFIG_I2C=y
59 CONFIG_I2C_CHARDEV=y 65 CONFIG_I2C_CHARDEV=y
60 # CONFIG_I2C_POWERMAC is not set
61 CONFIG_I2C_CPM=y 66 CONFIG_I2C_CPM=y
62 # CONFIG_HWMON is not set 67 # CONFIG_HWMON is not set
63 # CONFIG_USB_SUPPORT is not set 68 CONFIG_USB_GADGET=y
69 CONFIG_USB_FSL_USB2=y
70 CONFIG_USB_G_SERIAL=y
71 CONFIG_UIO=y
72 CONFIG_UIO_PDRV=y
64 CONFIG_EXT2_FS=y 73 CONFIG_EXT2_FS=y
65 CONFIG_EXT3_FS=y
66 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
67 # CONFIG_EXT3_FS_XATTR is not set
68 CONFIG_AUTOFS4_FS=y 74 CONFIG_AUTOFS4_FS=y
69 CONFIG_PROC_KCORE=y 75 CONFIG_PROC_KCORE=y
70 CONFIG_TMPFS=y 76 CONFIG_TMPFS=y
71 CONFIG_JFFS2_FS=y 77 CONFIG_JFFS2_FS=y
72 CONFIG_CRAMFS=y 78 CONFIG_CRAMFS=y
79 CONFIG_SQUASHFS=y
73 CONFIG_NFS_FS=y 80 CONFIG_NFS_FS=y
74 CONFIG_NFS_V3=y 81 CONFIG_NFS_V3=y
75 CONFIG_ROOT_NFS=y 82 CONFIG_ROOT_NFS=y
76 CONFIG_PARTITION_ADVANCED=y 83 CONFIG_PARTITION_ADVANCED=y
77 # CONFIG_MAC_PARTITION is not set
78 CONFIG_NLS=y 84 CONFIG_NLS=y
79 CONFIG_NLS_CODEPAGE_437=y 85 CONFIG_NLS_CODEPAGE_437=y
80 CONFIG_NLS_ASCII=y 86 CONFIG_NLS_ASCII=y
81 CONFIG_NLS_ISO8859_1=y 87 CONFIG_NLS_ISO8859_1=y
82 CONFIG_NLS_UTF8=y 88 CONFIG_NLS_UTF8=y
83 CONFIG_MAGIC_SYSRQ=y 89 CONFIG_MAGIC_SYSRQ=y
84 CONFIG_DEBUG_FS=y 90 CONFIG_DEBUG_FS=y
85 CONFIG_DEBUG_KERNEL=y
arch/powerpc/platforms/82xx/km82xx.c
1 /* 1 /*
2 * Keymile km82xx support 2 * Keymile km82xx support
3 * Copyright 2008-2011 DENX Software Engineering GmbH 3 * Copyright 2008-2011 DENX Software Engineering GmbH
4 * Author: Heiko Schocher <hs@denx.de> 4 * Author: Heiko Schocher <hs@denx.de>
5 * 5 *
6 * based on code from: 6 * based on code from:
7 * Copyright 2007 Freescale Semiconductor, Inc. 7 * Copyright 2007 Freescale Semiconductor, Inc.
8 * Author: Scott Wood <scottwood@freescale.com> 8 * Author: Scott Wood <scottwood@freescale.com>
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify it 10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the 11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your 12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version. 13 * option) any later version.
14 */ 14 */
15 15
16 #include <linux/init.h> 16 #include <linux/init.h>
17 #include <linux/interrupt.h> 17 #include <linux/interrupt.h>
18 #include <linux/fsl_devices.h> 18 #include <linux/fsl_devices.h>
19 #include <linux/of_platform.h> 19 #include <linux/of_platform.h>
20 20
21 #include <asm/io.h> 21 #include <asm/io.h>
22 #include <asm/cpm2.h> 22 #include <asm/cpm2.h>
23 #include <asm/udbg.h> 23 #include <asm/udbg.h>
24 #include <asm/machdep.h> 24 #include <asm/machdep.h>
25 #include <asm/time.h> 25 #include <asm/time.h>
26 #include <asm/mpc8260.h> 26 #include <asm/mpc8260.h>
27 #include <asm/prom.h> 27 #include <asm/prom.h>
28 28
29 #include <sysdev/fsl_soc.h> 29 #include <sysdev/fsl_soc.h>
30 #include <sysdev/cpm2_pic.h> 30 #include <sysdev/cpm2_pic.h>
31 31
32 #include "pq2.h" 32 #include "pq2.h"
33 33
34 static void __init km82xx_pic_init(void) 34 static void __init km82xx_pic_init(void)
35 { 35 {
36 struct device_node *np = of_find_compatible_node(NULL, NULL, 36 struct device_node *np = of_find_compatible_node(NULL, NULL,
37 "fsl,pq2-pic"); 37 "fsl,pq2-pic");
38 if (!np) { 38 if (!np) {
39 printk(KERN_ERR "PIC init: can not find cpm-pic node\n"); 39 printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
40 return; 40 return;
41 } 41 }
42 42
43 cpm2_pic_init(np); 43 cpm2_pic_init(np);
44 of_node_put(np); 44 of_node_put(np);
45 } 45 }
46 46
47 struct cpm_pin { 47 struct cpm_pin {
48 int port, pin, flags; 48 int port, pin, flags;
49 }; 49 };
50 50
51 static __initdata struct cpm_pin km82xx_pins[] = { 51 static __initdata struct cpm_pin km82xx_pins[] = {
52 /* SMC1 */
53 {2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
54 {2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
52 55
53 /* SMC2 */ 56 /* SMC2 */
54 {0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 57 {0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
55 {0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 58 {0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
56 59
57 /* SCC1 */ 60 /* SCC1 */
58 {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 61 {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
59 {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 62 {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
60 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 63 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
61 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, 64 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
62 65
63 /* SCC4 */ 66 /* SCC4 */
64 {2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 67 {2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
65 {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 68 {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
66 {2, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 69 {2, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
67 {2, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 70 {2, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
68 {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 71 {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
69 {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 72 {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
70 73
71 /* FCC1 */ 74 /* FCC1 */
72 {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 75 {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
73 {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 76 {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
74 {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 77 {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
75 {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 78 {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
76 {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 79 {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
77 {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 80 {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
78 {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 81 {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
79 {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 82 {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
80 {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, 83 {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
81 {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, 84 {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
82 {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, 85 {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
83 {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, 86 {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
84 {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, 87 {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
85 {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, 88 {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
86 89
87 {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 90 {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
88 {2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 91 {2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
89 92
90 /* FCC2 */ 93 /* FCC2 */
91 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 94 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
92 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 95 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
93 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 96 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
94 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 97 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
95 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 98 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
96 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 99 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
97 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 100 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
98 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 101 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
99 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 102 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
100 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 103 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
101 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 104 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
102 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, 105 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
103 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 106 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
104 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 107 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
105 108
106 {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 109 {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
107 {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 110 {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
108 111
109 /* MDC */ 112 /* MDC */
110 {0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, 113 {0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO},
111 114
112 #if defined(CONFIG_I2C_CPM) 115 #if defined(CONFIG_I2C_CPM)
113 /* I2C */ 116 /* I2C */
114 {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, 117 {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
115 {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, 118 {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
116 #endif 119 #endif
117 120
118 /* USB */ 121 /* USB */
119 {0, 10, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, /* FULL_SPEED */ 122 {0, 10, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, /* FULL_SPEED */
120 {0, 11, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, /*/SLAVE */ 123 {0, 11, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, /*/SLAVE */
121 {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXN */ 124 {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXN */
122 {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXP */ 125 {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXP */
123 {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* /OE */ 126 {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* /OE */
124 {2, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXCLK */ 127 {2, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXCLK */
125 {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */ 128 {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
126 {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */ 129 {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
127 {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXD */ 130 {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* RXD */
128 }; 131 };
129 132
130 static void __init init_ioports(void) 133 static void __init init_ioports(void)
131 { 134 {
132 int i; 135 int i;
133 136
134 for (i = 0; i < ARRAY_SIZE(km82xx_pins); i++) { 137 for (i = 0; i < ARRAY_SIZE(km82xx_pins); i++) {
135 const struct cpm_pin *pin = &km82xx_pins[i]; 138 const struct cpm_pin *pin = &km82xx_pins[i];
136 cpm2_set_pin(pin->port, pin->pin, pin->flags); 139 cpm2_set_pin(pin->port, pin->pin, pin->flags);
137 } 140 }
138 141
139 cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8); 142 cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
143 cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
140 cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_RX); 144 cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_RX);
141 cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_TX); 145 cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_TX);
142 cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RTX); 146 cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RTX);
143 cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX); 147 cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
144 cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX); 148 cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
145 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX); 149 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);
146 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_TX); 150 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_TX);
147 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX); 151 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
148 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX); 152 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
149 153
150 /* Force USB FULL SPEED bit to '1' */ 154 /* Force USB FULL SPEED bit to '1' */
151 setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10)); 155 setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10));
152 /* clear USB_SLAVE */ 156 /* clear USB_SLAVE */
153 clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11)); 157 clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11));
154 } 158 }
155 159
156 static void __init km82xx_setup_arch(void) 160 static void __init km82xx_setup_arch(void)
157 { 161 {
158 if (ppc_md.progress) 162 if (ppc_md.progress)
159 ppc_md.progress("km82xx_setup_arch()", 0); 163 ppc_md.progress("km82xx_setup_arch()", 0);
160 164
161 cpm2_reset(); 165 cpm2_reset();
162 166
163 /* When this is set, snooping CPM DMA from RAM causes 167 /* When this is set, snooping CPM DMA from RAM causes
164 * machine checks. See erratum SIU18. 168 * machine checks. See erratum SIU18.
165 */ 169 */
166 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP); 170 clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
167 171
168 init_ioports(); 172 init_ioports();
169 173
170 if (ppc_md.progress) 174 if (ppc_md.progress)
171 ppc_md.progress("km82xx_setup_arch(), finish", 0); 175 ppc_md.progress("km82xx_setup_arch(), finish", 0);
172 } 176 }
173 177
174 static __initdata struct of_device_id of_bus_ids[] = { 178 static __initdata struct of_device_id of_bus_ids[] = {
175 { .compatible = "simple-bus", }, 179 { .compatible = "simple-bus", },
176 {}, 180 {},
177 }; 181 };
178 182
179 static int __init declare_of_platform_devices(void) 183 static int __init declare_of_platform_devices(void)
180 { 184 {
181 of_platform_bus_probe(NULL, of_bus_ids, NULL); 185 of_platform_bus_probe(NULL, of_bus_ids, NULL);
182 186
183 return 0; 187 return 0;
184 } 188 }
185 machine_device_initcall(km82xx, declare_of_platform_devices); 189 machine_device_initcall(km82xx, declare_of_platform_devices);
186 190
187 /* 191 /*
188 * Called very early, device-tree isn't unflattened 192 * Called very early, device-tree isn't unflattened
189 */ 193 */
190 static int __init km82xx_probe(void) 194 static int __init km82xx_probe(void)
191 { 195 {
192 unsigned long root = of_get_flat_dt_root(); 196 unsigned long root = of_get_flat_dt_root();
193 return of_flat_dt_is_compatible(root, "keymile,km82xx"); 197 return of_flat_dt_is_compatible(root, "keymile,km82xx");
194 } 198 }
195 199
196 define_machine(km82xx) 200 define_machine(km82xx)
197 { 201 {
198 .name = "Keymile km82xx", 202 .name = "Keymile km82xx",
199 .probe = km82xx_probe, 203 .probe = km82xx_probe,
200 .setup_arch = km82xx_setup_arch, 204 .setup_arch = km82xx_setup_arch,
201 .init_IRQ = km82xx_pic_init, 205 .init_IRQ = km82xx_pic_init,
202 .get_irq = cpm2_get_irq, 206 .get_irq = cpm2_get_irq,
203 .calibrate_decr = generic_calibrate_decr, 207 .calibrate_decr = generic_calibrate_decr,
204 .restart = pq2_restart, 208 .restart = pq2_restart,
205 .progress = udbg_progress, 209 .progress = udbg_progress,
206 }; 210 };
207 211