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Commit 328f5cc30290a92ea3ca62b2a63d2b9ebcb0d334

Authored by Rafael J. Wysocki 2011-04-23 04:02:33 +0800

Exists in master and in 7 other branches

ARM: Use struct syscore_ops instead of sysdevs for PM in common code

Convert some ARM architecture's common code to using
struct syscore_ops objects for power management instead of sysdev
classes and sysdevs.

This simplifies the code and reduces the kernel's memory footprint.
It also is necessary for removing sysdevs from the kernel entirely in
the future.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>

Showing 5 changed files with 58 additions and 94 deletions Inline Diff

arch/arm/common/vic.c
arch/arm/include/asm/mach/time.h
arch/arm/kernel/leds.c
arch/arm/kernel/time.c
arch/arm/vfp/vfpmodule.c

arch/arm/common/vic.c

Diff comments View file @ 328f5cc

 /*
  *  linux/arch/arm/common/vic.c
  *
  *  Copyright (C) 1999 - 2003 ARM Limited
  *  Copyright (C) 2000 Deep Blue Solutions Ltd
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/io.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/device.h>
 #include <linux/amba/bus.h>
 #include <asm/mach/irq.h>
 #include <asm/hardware/vic.h>
-#if defined(CONFIG_PM)
+#ifdef CONFIG_PM
 /**
  * struct vic_device - VIC PM device
- * @sysdev: The system device which is registered.
  * @irq: The IRQ number for the base of the VIC.
  * @base: The register base for the VIC.
  * @resume_sources: A bitmask of interrupts for resume.
  * @resume_irqs: The IRQs enabled for resume.
  * @int_select: Save for VIC_INT_SELECT.
  * @int_enable: Save for VIC_INT_ENABLE.
  * @soft_int: Save for VIC_INT_SOFT.
  * @protect: Save for VIC_PROTECT.
  */
 struct vic_device {
-	struct sys_device sysdev;
 	void __iomem	*base;
 	int		irq;
 	u32		resume_sources;
 	u32		resume_irqs;
 	u32		int_select;
 	u32		int_enable;
 	u32		soft_int;
 	u32		protect;
 };
 /* we cannot allocate memory when VICs are initially registered */
 static struct vic_device vic_devices[CONFIG_ARM_VIC_NR];
 static int vic_id;
-static inline struct vic_device *to_vic(struct sys_device *sys)
-{
-	return container_of(sys, struct vic_device, sysdev);
-}
 #endif /* CONFIG_PM */
 /**
  * vic_init2 - common initialisation code
  * @base: Base of the VIC.
  *
  * Common initialisation code for registration
  * and resume.
 */
 static void vic_init2(void __iomem *base)
 {
 	int i;
 	for (i = 0; i < 16; i++) {
 		void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4);
 		writel(VIC_VECT_CNTL_ENABLE | i, reg);
 	}
 	writel(32, base + VIC_PL190_DEF_VECT_ADDR);
 }
-#if defined(CONFIG_PM)
+#ifdef CONFIG_PM
-static int vic_class_resume(struct sys_device *dev)
+static void resume_one_vic(struct vic_device *vic)
 {
-	struct vic_device *vic = to_vic(dev);
 	void __iomem *base = vic->base;
 	printk(KERN_DEBUG "%s: resuming vic at %p\n", __func__, base);
 	/* re-initialise static settings */
 	vic_init2(base);
 	writel(vic->int_select, base + VIC_INT_SELECT);
 	writel(vic->protect, base + VIC_PROTECT);
 	/* set the enabled ints and then clear the non-enabled */
 	writel(vic->int_enable, base + VIC_INT_ENABLE);
 	writel(~vic->int_enable, base + VIC_INT_ENABLE_CLEAR);
 	/* and the same for the soft-int register */
 	writel(vic->soft_int, base + VIC_INT_SOFT);
 	writel(~vic->soft_int, base + VIC_INT_SOFT_CLEAR);
+}
-	return 0;
+static void vic_resume(void)
+{
+	int id;
+	for (id = vic_id - 1; id >= 0; id--)
+		resume_one_vic(vic_devices + id);
 }
-static int vic_class_suspend(struct sys_device *dev, pm_message_t state)
+static void suspend_one_vic(struct vic_device *vic)
 {
-	struct vic_device *vic = to_vic(dev);
 	void __iomem *base = vic->base;
 	printk(KERN_DEBUG "%s: suspending vic at %p\n", __func__, base);
 	vic->int_select = readl(base + VIC_INT_SELECT);
 	vic->int_enable = readl(base + VIC_INT_ENABLE);
 	vic->soft_int = readl(base + VIC_INT_SOFT);
 	vic->protect = readl(base + VIC_PROTECT);
 	/* set the interrupts (if any) that are used for
 	 * resuming the system */
 	writel(vic->resume_irqs, base + VIC_INT_ENABLE);
 	writel(~vic->resume_irqs, base + VIC_INT_ENABLE_CLEAR);
+}
+static int vic_suspend(void)
+{
+	int id;
+	for (id = 0; id < vic_id; id++)
+		suspend_one_vic(vic_devices + id);
 	return 0;
 }
-struct sysdev_class vic_class = {
+struct syscore_ops vic_syscore_ops = {
-	.name		= "vic",
+	.suspend	= vic_suspend,
-	.suspend	= vic_class_suspend,
+	.resume		= vic_resume,
-	.resume		= vic_class_resume,
 };
 /**
  * vic_pm_init - initicall to register VIC pm
  *
  * This is called via late_initcall() to register
  * the resources for the VICs due to the early
  * nature of the VIC's registration.
 */
 static int __init vic_pm_init(void)
 {
-	struct vic_device *dev = vic_devices;
+	if (vic_id > 0)
-	int err;
+		register_syscore_ops(&vic_syscore_ops);
-	int id;
-	if (vic_id == 0)
-		return 0;
-	err = sysdev_class_register(&vic_class);
-	if (err) {
-		printk(KERN_ERR "%s: cannot register class\n", __func__);
-		return err;
-	}
-	for (id = 0; id < vic_id; id++, dev++) {
-		dev->sysdev.id = id;
-		dev->sysdev.cls = &vic_class;
-		err = sysdev_register(&dev->sysdev);
-		if (err) {
-			printk(KERN_ERR "%s: failed to register device\n",
-			       __func__);
-			return err;
-		}
-	}
 	return 0;
 }
 late_initcall(vic_pm_init);
 /**
  * vic_pm_register - Register a VIC for later power management control
  * @base: The base address of the VIC.
  * @irq: The base IRQ for the VIC.
  * @resume_sources: bitmask of interrupts allowed for resume sources.
  *
  * Register the VIC with the system device tree so that it can be notified
  * of suspend and resume requests and ensure that the correct actions are
  * taken to re-instate the settings on resume.
  */
 static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources)
 {
 	struct vic_device *v;
 	if (vic_id >= ARRAY_SIZE(vic_devices))
 		printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
 	else {
 		v = &vic_devices[vic_id];
 		v->base = base;
 		v->resume_sources = resume_sources;
 		v->irq = irq;
 		vic_id++;
 	}
 }
 #else
 static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { }
 #endif /* CONFIG_PM */
 static void vic_ack_irq(struct irq_data *d)
 {
 	void __iomem *base = irq_data_get_irq_chip_data(d);
 	unsigned int irq = d->irq & 31;
 	writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
 	/* moreover, clear the soft-triggered, in case it was the reason */
 	writel(1 << irq, base + VIC_INT_SOFT_CLEAR);
 }
 static void vic_mask_irq(struct irq_data *d)
 {
 	void __iomem *base = irq_data_get_irq_chip_data(d);
 	unsigned int irq = d->irq & 31;
 	writel(1 << irq, base + VIC_INT_ENABLE_CLEAR);
 }
 static void vic_unmask_irq(struct irq_data *d)
 {
 	void __iomem *base = irq_data_get_irq_chip_data(d);
 	unsigned int irq = d->irq & 31;
 	writel(1 << irq, base + VIC_INT_ENABLE);
 }
 #if defined(CONFIG_PM)
 static struct vic_device *vic_from_irq(unsigned int irq)
 {
         struct vic_device *v = vic_devices;
 	unsigned int base_irq = irq & ~31;
 	int id;
 	for (id = 0; id < vic_id; id++, v++) {
 		if (v->irq == base_irq)
 			return v;
 	}
 	return NULL;
 }
 static int vic_set_wake(struct irq_data *d, unsigned int on)
 {
 	struct vic_device *v = vic_from_irq(d->irq);
 	unsigned int off = d->irq & 31;
 	u32 bit = 1 << off;
 	if (!v)
 		return -EINVAL;
 	if (!(bit & v->resume_sources))
 		return -EINVAL;
 	if (on)
 		v->resume_irqs |= bit;
 	else
 		v->resume_irqs &= ~bit;
 	return 0;
 }
 #else
 #define vic_set_wake NULL
 #endif /* CONFIG_PM */
 static struct irq_chip vic_chip = {
 	.name		= "VIC",
 	.irq_ack	= vic_ack_irq,
 	.irq_mask	= vic_mask_irq,
 	.irq_unmask	= vic_unmask_irq,
 	.irq_set_wake	= vic_set_wake,
 };
 static void __init vic_disable(void __iomem *base)
 {
 	writel(0, base + VIC_INT_SELECT);
 	writel(0, base + VIC_INT_ENABLE);
 	writel(~0, base + VIC_INT_ENABLE_CLEAR);
 	writel(0, base + VIC_IRQ_STATUS);
 	writel(0, base + VIC_ITCR);
 	writel(~0, base + VIC_INT_SOFT_CLEAR);
 }
 static void __init vic_clear_interrupts(void __iomem *base)
 {
 	unsigned int i;
 	writel(0, base + VIC_PL190_VECT_ADDR);
 	for (i = 0; i < 19; i++) {
 		unsigned int value;
 		value = readl(base + VIC_PL190_VECT_ADDR);
 		writel(value, base + VIC_PL190_VECT_ADDR);
 	}
 }
 static void __init vic_set_irq_sources(void __iomem *base,
 				unsigned int irq_start, u32 vic_sources)
 {
 	unsigned int i;
 	for (i = 0; i < 32; i++) {
 		if (vic_sources & (1 << i)) {
 			unsigned int irq = irq_start + i;
 			irq_set_chip_and_handler(irq, &vic_chip,
 						 handle_level_irq);
 			irq_set_chip_data(irq, base);
 			set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 		}
 	}
 }
 /*
  * The PL190 cell from ARM has been modified by ST to handle 64 interrupts.
  * The original cell has 32 interrupts, while the modified one has 64,
  * replocating two blocks 0x00..0x1f in 0x20..0x3f. In that case
  * the probe function is called twice, with base set to offset 000
  *  and 020 within the page. We call this "second block".
  */
 static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
 				u32 vic_sources)
 {
 	unsigned int i;
 	int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0;
 	/* Disable all interrupts initially. */
 	vic_disable(base);
 	/*
 	 * Make sure we clear all existing interrupts. The vector registers
 	 * in this cell are after the second block of general registers,
 	 * so we can address them using standard offsets, but only from
 	 * the second base address, which is 0x20 in the page
 	 */
 	if (vic_2nd_block) {
 		vic_clear_interrupts(base);
 		/* ST has 16 vectors as well, but we don't enable them by now */
 		for (i = 0; i < 16; i++) {
 			void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4);
 			writel(0, reg);
 		}
 		writel(32, base + VIC_PL190_DEF_VECT_ADDR);
 	}
 	vic_set_irq_sources(base, irq_start, vic_sources);
 }
 /**
  * vic_init - initialise a vectored interrupt controller
  * @base: iomem base address
  * @irq_start: starting interrupt number, must be muliple of 32
  * @vic_sources: bitmask of interrupt sources to allow
  * @resume_sources: bitmask of interrupt sources to allow for resume
  */
 void __init vic_init(void __iomem *base, unsigned int irq_start,
 		     u32 vic_sources, u32 resume_sources)
 {
 	unsigned int i;
 	u32 cellid = 0;
 	enum amba_vendor vendor;
 	/* Identify which VIC cell this one is, by reading the ID */
 	for (i = 0; i < 4; i++) {
 		u32 addr = ((u32)base & PAGE_MASK) + 0xfe0 + (i * 4);
 		cellid |= (readl(addr) & 0xff) << (8 * i);
 	}
 	vendor = (cellid >> 12) & 0xff;
 	printk(KERN_INFO "VIC @%p: id 0x%08x, vendor 0x%02x\n",
 	       base, cellid, vendor);
 	switch(vendor) {
 	case AMBA_VENDOR_ST:
 		vic_init_st(base, irq_start, vic_sources);
 		return;
 	default:
 		printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n");
 		/* fall through */
 	case AMBA_VENDOR_ARM:
 		break;
 	}

arch/arm/include/asm/mach/time.h

Diff comments View file @ 328f5cc

 /*
  * arch/arm/include/asm/mach/time.h
  *
  * Copyright (C) 2004 MontaVista Software, Inc.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
 #ifndef __ASM_ARM_MACH_TIME_H
 #define __ASM_ARM_MACH_TIME_H
 #include <linux/sysdev.h>
 /*
  * This is our kernel timer structure.
  *
  * - init
  *   Initialise the kernels jiffy timer source, claim interrupt
  *   using setup_irq.  This is called early on during initialisation
  *   while interrupts are still disabled on the local CPU.
  * - suspend
  *   Suspend the kernel jiffy timer source, if necessary.  This
  *   is called with interrupts disabled, after all normal devices
  *   have been suspended.  If no action is required, set this to
  *   NULL.
  * - resume
  *   Resume the kernel jiffy timer source, if necessary.  This
  *   is called with interrupts disabled before any normal devices
  *   are resumed.  If no action is required, set this to NULL.
  * - offset
  *   Return the timer offset in microseconds since the last timer
  *   interrupt.  Note: this must take account of any unprocessed
  *   timer interrupt which may be pending.
  */
 struct sys_timer {
-	struct sys_device	dev;
 	void			(*init)(void);
 	void			(*suspend)(void);
 	void			(*resume)(void);
 #ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
 	unsigned long		(*offset)(void);
 #endif
 };
 extern void timer_tick(void);
 #endif

arch/arm/kernel/leds.c

Diff comments View file @ 328f5cc

 /*
  * LED support code, ripped out of arch/arm/kernel/time.c
  *
  *  Copyright (C) 1994-2001 Russell King
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <asm/leds.h>
 static void dummy_leds_event(led_event_t evt)
 {
 }
 void (*leds_event)(led_event_t) = dummy_leds_event;
 struct leds_evt_name {
 	const char	name[8];
 	int		on;
 	int		off;
 };
 static const struct leds_evt_name evt_names[] = {
 	{ "amber", led_amber_on, led_amber_off },
 	{ "blue",  led_blue_on,  led_blue_off  },
 	{ "green", led_green_on, led_green_off },
 	{ "red",   led_red_on,   led_red_off   },
 };
 static ssize_t leds_store(struct sys_device *dev,
 			struct sysdev_attribute *attr,
 			const char *buf, size_t size)
 {
 	int ret = -EINVAL, len = strcspn(buf, " ");
 	if (len > 0 && buf[len] == '\0')
 		len--;
 	if (strncmp(buf, "claim", len) == 0) {
 		leds_event(led_claim);
 		ret = size;
 	} else if (strncmp(buf, "release", len) == 0) {
 		leds_event(led_release);
 		ret = size;
 	} else {
 		int i;
 		for (i = 0; i < ARRAY_SIZE(evt_names); i++) {
 			if (strlen(evt_names[i].name) != len ||
 			    strncmp(buf, evt_names[i].name, len) != 0)
 				continue;
 			if (strncmp(buf+len, " on", 3) == 0) {
 				leds_event(evt_names[i].on);
 				ret = size;
 			} else if (strncmp(buf+len, " off", 4) == 0) {
 				leds_event(evt_names[i].off);
 				ret = size;
 			}
 			break;
 		}
 	}
 	return ret;
 }
 static SYSDEV_ATTR(event, 0200, NULL, leds_store);
-static int leds_suspend(struct sys_device *dev, pm_message_t state)
+static struct sysdev_class leds_sysclass = {
+	.name		= "leds",
+};
+static struct sys_device leds_device = {
+	.id		= 0,
+	.cls		= &leds_sysclass,
+};
+static int leds_suspend(void)
 {
 	leds_event(led_stop);
 	return 0;
 }
-static int leds_resume(struct sys_device *dev)
+static void leds_resume(void)
 {
 	leds_event(led_start);
-	return 0;
 }
-static int leds_shutdown(struct sys_device *dev)
+static void leds_shutdown(void)
 {
 	leds_event(led_halted);
-	return 0;
 }
-static struct sysdev_class leds_sysclass = {
+static struct syscore_ops leds_syscore_ops = {
-	.name		= "leds",
 	.shutdown	= leds_shutdown,
 	.suspend	= leds_suspend,
 	.resume		= leds_resume,
 };
-static struct sys_device leds_device = {
-	.id		= 0,
-	.cls		= &leds_sysclass,
-};
 static int __init leds_init(void)
 {
 	int ret;
 	ret = sysdev_class_register(&leds_sysclass);
 	if (ret == 0)
 		ret = sysdev_register(&leds_device);
 	if (ret == 0)
 		ret = sysdev_create_file(&leds_device, &attr_event);
+	if (ret == 0)

arch/arm/kernel/time.c

Diff comments View file @ 328f5cc

1	/*	1	/*
2	* linux/arch/arm/kernel/time.c	2	* linux/arch/arm/kernel/time.c
3	*	3	*
4	* Copyright (C) 1991, 1992, 1995 Linus Torvalds	4	* Copyright (C) 1991, 1992, 1995 Linus Torvalds
5	* Modifications for ARM (C) 1994-2001 Russell King	5	* Modifications for ARM (C) 1994-2001 Russell King
6	*	6	*
7	* This program is free software; you can redistribute it and/or modify	7	* This program is free software; you can redistribute it and/or modify
8	* it under the terms of the GNU General Public License version 2 as	8	* it under the terms of the GNU General Public License version 2 as
9	* published by the Free Software Foundation.	9	* published by the Free Software Foundation.
10	*	10	*
11	* This file contains the ARM-specific time handling details:	11	* This file contains the ARM-specific time handling details:
12	* reading the RTC at bootup, etc...	12	* reading the RTC at bootup, etc...
13	*/	13	*/
14	#include <linux/module.h>	14	#include <linux/module.h>
15	#include <linux/kernel.h>	15	#include <linux/kernel.h>
16	#include <linux/interrupt.h>	16	#include <linux/interrupt.h>
17	#include <linux/time.h>	17	#include <linux/time.h>
18	#include <linux/init.h>	18	#include <linux/init.h>
19	#include <linux/sched.h>	19	#include <linux/sched.h>
20	#include <linux/smp.h>	20	#include <linux/smp.h>
21	#include <linux/timex.h>	21	#include <linux/timex.h>
22	#include <linux/errno.h>	22	#include <linux/errno.h>
23	#include <linux/profile.h>	23	#include <linux/profile.h>
24	#include <linux/sysdev.h>	24	#include <linux/syscore_ops.h>
25	#include <linux/timer.h>	25	#include <linux/timer.h>
26	#include <linux/irq.h>	26	#include <linux/irq.h>
27		27
28	#include <linux/mc146818rtc.h>	28	#include <linux/mc146818rtc.h>
29		29
30	#include <asm/leds.h>	30	#include <asm/leds.h>
31	#include <asm/thread_info.h>	31	#include <asm/thread_info.h>
32	#include <asm/sched_clock.h>	32	#include <asm/sched_clock.h>
33	#include <asm/stacktrace.h>	33	#include <asm/stacktrace.h>
34	#include <asm/mach/arch.h>	34	#include <asm/mach/arch.h>
35	#include <asm/mach/time.h>	35	#include <asm/mach/time.h>
36		36
37	/*	37	/*
38	* Our system timer.	38	* Our system timer.
39	*/	39	*/
40	static struct sys_timer *system_timer;	40	static struct sys_timer *system_timer;
41		41
42	#if defined(CONFIG_RTC_DRV_CMOS) \|\| defined(CONFIG_RTC_DRV_CMOS_MODULE)	42	#if defined(CONFIG_RTC_DRV_CMOS) \|\| defined(CONFIG_RTC_DRV_CMOS_MODULE)
43	/* this needs a better home */	43	/* this needs a better home */
44	DEFINE_SPINLOCK(rtc_lock);	44	DEFINE_SPINLOCK(rtc_lock);
45		45
46	#ifdef CONFIG_RTC_DRV_CMOS_MODULE	46	#ifdef CONFIG_RTC_DRV_CMOS_MODULE
47	EXPORT_SYMBOL(rtc_lock);	47	EXPORT_SYMBOL(rtc_lock);
48	#endif	48	#endif
49	#endif /* pc-style 'CMOS' RTC support */	49	#endif /* pc-style 'CMOS' RTC support */
50		50
51	/* change this if you have some constant time drift */	51	/* change this if you have some constant time drift */
52	#define USECS_PER_JIFFY (1000000/HZ)	52	#define USECS_PER_JIFFY (1000000/HZ)
53		53
54	#ifdef CONFIG_SMP	54	#ifdef CONFIG_SMP
55	unsigned long profile_pc(struct pt_regs *regs)	55	unsigned long profile_pc(struct pt_regs *regs)
56	{	56	{
57	struct stackframe frame;	57	struct stackframe frame;
58		58
59	if (!in_lock_functions(regs->ARM_pc))	59	if (!in_lock_functions(regs->ARM_pc))
60	return regs->ARM_pc;	60	return regs->ARM_pc;
61		61
62	frame.fp = regs->ARM_fp;	62	frame.fp = regs->ARM_fp;
63	frame.sp = regs->ARM_sp;	63	frame.sp = regs->ARM_sp;
64	frame.lr = regs->ARM_lr;	64	frame.lr = regs->ARM_lr;
65	frame.pc = regs->ARM_pc;	65	frame.pc = regs->ARM_pc;
66	do {	66	do {
67	int ret = unwind_frame(&frame);	67	int ret = unwind_frame(&frame);
68	if (ret < 0)	68	if (ret < 0)
69	return 0;	69	return 0;
70	} while (in_lock_functions(frame.pc));	70	} while (in_lock_functions(frame.pc));
71		71
72	return frame.pc;	72	return frame.pc;
73	}	73	}
74	EXPORT_SYMBOL(profile_pc);	74	EXPORT_SYMBOL(profile_pc);
75	#endif	75	#endif
76		76
77	#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET	77	#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
78	u32 arch_gettimeoffset(void)	78	u32 arch_gettimeoffset(void)
79	{	79	{
80	if (system_timer->offset != NULL)	80	if (system_timer->offset != NULL)
81	return system_timer->offset() * 1000;	81	return system_timer->offset() * 1000;
82		82
83	return 0;	83	return 0;
84	}	84	}
85	#endif /* CONFIG_ARCH_USES_GETTIMEOFFSET */	85	#endif /* CONFIG_ARCH_USES_GETTIMEOFFSET */
86		86
87	#ifdef CONFIG_LEDS_TIMER	87	#ifdef CONFIG_LEDS_TIMER
88	static inline void do_leds(void)	88	static inline void do_leds(void)
89	{	89	{
90	static unsigned int count = HZ/2;	90	static unsigned int count = HZ/2;
91		91
92	if (--count == 0) {	92	if (--count == 0) {
93	count = HZ/2;	93	count = HZ/2;
94	leds_event(led_timer);	94	leds_event(led_timer);
95	}	95	}
96	}	96	}
97	#else	97	#else
98	#define do_leds()	98	#define do_leds()
99	#endif	99	#endif
100		100
101		101
102	#ifndef CONFIG_GENERIC_CLOCKEVENTS	102	#ifndef CONFIG_GENERIC_CLOCKEVENTS
103	/*	103	/*
104	* Kernel system timer support.	104	* Kernel system timer support.
105	*/	105	*/
106	void timer_tick(void)	106	void timer_tick(void)
107	{	107	{
108	profile_tick(CPU_PROFILING);	108	profile_tick(CPU_PROFILING);
109	do_leds();	109	do_leds();
110	xtime_update(1);	110	xtime_update(1);
111	#ifndef CONFIG_SMP	111	#ifndef CONFIG_SMP
112	update_process_times(user_mode(get_irq_regs()));	112	update_process_times(user_mode(get_irq_regs()));
113	#endif	113	#endif
114	}	114	}
115	#endif	115	#endif
116		116
117	#if defined(CONFIG_PM) && !defined(CONFIG_GENERIC_CLOCKEVENTS)	117	#if defined(CONFIG_PM) && !defined(CONFIG_GENERIC_CLOCKEVENTS)
118	static int timer_suspend(struct sys_device *dev, pm_message_t state)	118	static int timer_suspend(void)
119	{	119	{
120	struct sys_timer *timer = container_of(dev, struct sys_timer, dev);	120	if (system_timer->suspend)
		121	system_timer->suspend();
121		122
122	if (timer->suspend != NULL)
123	timer->suspend();
124
125	return 0;	123	return 0;
126	}	124	}
127		125
128	static int timer_resume(struct sys_device *dev)	126	static void timer_resume(void)
129	{	127	{
130	struct sys_timer *timer = container_of(dev, struct sys_timer, dev);	128	if (system_timer->resume)
131		129	system_timer->resume();
132	if (timer->resume != NULL)
133	timer->resume();
134
135	return 0;
136	}	130	}
137	#else	131	#else
138	#define timer_suspend NULL	132	#define timer_suspend NULL
139	#define timer_resume NULL	133	#define timer_resume NULL
140	#endif	134	#endif
141		135
142	static struct sysdev_class timer_sysclass = {	136	static struct syscore_ops timer_syscore_ops = {
143	.name = "timer",
144	.suspend = timer_suspend,	137	.suspend = timer_suspend,
145	.resume = timer_resume,	138	.resume = timer_resume,
146	};	139	};
147		140
148	static int __init timer_init_sysfs(void)	141	static int __init timer_init_syscore_ops(void)
149	{	142	{
150	int ret = sysdev_class_register(&timer_sysclass);	143	register_syscore_ops(&timer_syscore_ops);
151	if (ret == 0) {
152	system_timer->dev.cls = &timer_sysclass;
153	ret = sysdev_register(&system_timer->dev);
154	}
155		144
156	return ret;	145	return 0;
157	}	146	}
158		147
159	device_initcall(timer_init_sysfs);	148	device_initcall(timer_init_syscore_ops);
160		149
161	void __init time_init(void)	150	void __init time_init(void)
162	{	151	{
163	system_timer = machine_desc->timer;	152	system_timer = machine_desc->timer;
164	system_timer->init();	153	system_timer->init();
165	#ifdef CONFIG_HAVE_SCHED_CLOCK	154	#ifdef CONFIG_HAVE_SCHED_CLOCK
166	sched_clock_postinit();	155	sched_clock_postinit();
167	#endif	156	#endif
168	}	157	}
169		158

arch/arm/vfp/vfpmodule.c

Diff comments View file @ 328f5cc

 /*
  *  linux/arch/arm/vfp/vfpmodule.c
  *
  *  Copyright (C) 2004 ARM Limited.
  *  Written by Deep Blue Solutions Limited.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
  */
 #include <linux/module.h>
 #include <linux/types.h>
 #include <linux/cpu.h>
 #include <linux/kernel.h>
 #include <linux/notifier.h>
 #include <linux/signal.h>
 #include <linux/sched.h>
 #include <linux/smp.h>
 #include <linux/init.h>
 #include <asm/cputype.h>
 #include <asm/thread_notify.h>
 #include <asm/vfp.h>
 #include "vfpinstr.h"
 #include "vfp.h"
 /*
  * Our undef handlers (in entry.S)
  */
 void vfp_testing_entry(void);
 void vfp_support_entry(void);
 void vfp_null_entry(void);
 void (*vfp_vector)(void) = vfp_null_entry;
 union vfp_state *last_VFP_context[NR_CPUS];
 /*
  * Dual-use variable.
  * Used in startup: set to non-zero if VFP checks fail
  * After startup, holds VFP architecture
  */
 unsigned int VFP_arch;
 /*
  * Per-thread VFP initialization.
  */
 static void vfp_thread_flush(struct thread_info *thread)
 {
 	union vfp_state *vfp = &thread->vfpstate;
 	unsigned int cpu;
 	memset(vfp, 0, sizeof(union vfp_state));
 	vfp->hard.fpexc = FPEXC_EN;
 	vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
 	/*
 	 * Disable VFP to ensure we initialize it first.  We must ensure
 	 * that the modification of last_VFP_context[] and hardware disable
 	 * are done for the same CPU and without preemption.
 	 */
 	cpu = get_cpu();
 	if (last_VFP_context[cpu] == vfp)
 		last_VFP_context[cpu] = NULL;
 	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
 	put_cpu();
 }
 static void vfp_thread_exit(struct thread_info *thread)
 {
 	/* release case: Per-thread VFP cleanup. */
 	union vfp_state *vfp = &thread->vfpstate;
 	unsigned int cpu = get_cpu();
 	if (last_VFP_context[cpu] == vfp)
 		last_VFP_context[cpu] = NULL;
 	put_cpu();
 }
 static void vfp_thread_copy(struct thread_info *thread)
 {
 	struct thread_info *parent = current_thread_info();
 	vfp_sync_hwstate(parent);
 	thread->vfpstate = parent->vfpstate;
 }
 /*
  * When this function is called with the following 'cmd's, the following
  * is true while this function is being run:
  *  THREAD_NOFTIFY_SWTICH:
  *   - the previously running thread will not be scheduled onto another CPU.
  *   - the next thread to be run (v) will not be running on another CPU.
  *   - thread->cpu is the local CPU number
  *   - not preemptible as we're called in the middle of a thread switch
  *  THREAD_NOTIFY_FLUSH:
  *   - the thread (v) will be running on the local CPU, so
  *	v === current_thread_info()
  *   - thread->cpu is the local CPU number at the time it is accessed,
  *	but may change at any time.
  *   - we could be preempted if tree preempt rcu is enabled, so
  *	it is unsafe to use thread->cpu.
  *  THREAD_NOTIFY_EXIT
  *   - the thread (v) will be running on the local CPU, so
  *	v === current_thread_info()
  *   - thread->cpu is the local CPU number at the time it is accessed,
  *	but may change at any time.
  *   - we could be preempted if tree preempt rcu is enabled, so
  *	it is unsafe to use thread->cpu.
  */
 static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
 {
 	struct thread_info *thread = v;
 	u32 fpexc;
 #ifdef CONFIG_SMP
 	unsigned int cpu;
 #endif
 	switch (cmd) {
 	case THREAD_NOTIFY_SWITCH:
 		fpexc = fmrx(FPEXC);
 #ifdef CONFIG_SMP
 		cpu = thread->cpu;
 		/*
 		 * On SMP, if VFP is enabled, save the old state in
 		 * case the thread migrates to a different CPU. The
 		 * restoring is done lazily.
 		 */
 		if ((fpexc & FPEXC_EN) && last_VFP_context[cpu]) {
 			vfp_save_state(last_VFP_context[cpu], fpexc);
 			last_VFP_context[cpu]->hard.cpu = cpu;
 		}
 		/*
 		 * Thread migration, just force the reloading of the
 		 * state on the new CPU in case the VFP registers
 		 * contain stale data.
 		 */
 		if (thread->vfpstate.hard.cpu != cpu)
 			last_VFP_context[cpu] = NULL;
 #endif
 		/*
 		 * Always disable VFP so we can lazily save/restore the
 		 * old state.
 		 */
 		fmxr(FPEXC, fpexc & ~FPEXC_EN);
 		break;
 	case THREAD_NOTIFY_FLUSH:
 		vfp_thread_flush(thread);
 		break;
 	case THREAD_NOTIFY_EXIT:
 		vfp_thread_exit(thread);
 		break;
 	case THREAD_NOTIFY_COPY:
 		vfp_thread_copy(thread);
 		break;
 	}
 	return NOTIFY_DONE;
 }
 static struct notifier_block vfp_notifier_block = {
 	.notifier_call	= vfp_notifier,
 };
 /*
  * Raise a SIGFPE for the current process.
  * sicode describes the signal being raised.
  */
 static void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
 {
 	siginfo_t info;
 	memset(&info, 0, sizeof(info));
 	info.si_signo = SIGFPE;
 	info.si_code = sicode;
 	info.si_addr = (void __user *)(instruction_pointer(regs) - 4);
 	/*
 	 * This is the same as NWFPE, because it's not clear what
 	 * this is used for
 	 */
 	current->thread.error_code = 0;
 	current->thread.trap_no = 6;
 	send_sig_info(SIGFPE, &info, current);
 }
 static void vfp_panic(char *reason, u32 inst)
 {
 	int i;
 	printk(KERN_ERR "VFP: Error: %s\n", reason);
 	printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
 		fmrx(FPEXC), fmrx(FPSCR), inst);
 	for (i = 0; i < 32; i += 2)
 		printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
 		       i, vfp_get_float(i), i+1, vfp_get_float(i+1));
 }
 /*
  * Process bitmask of exception conditions.
  */
 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)
 {
 	int si_code = 0;
 	pr_debug("VFP: raising exceptions %08x\n", exceptions);
 	if (exceptions == VFP_EXCEPTION_ERROR) {
 		vfp_panic("unhandled bounce", inst);
 		vfp_raise_sigfpe(0, regs);
 		return;
 	}
 	/*
 	 * If any of the status flags are set, update the FPSCR.
 	 * Comparison instructions always return at least one of
 	 * these flags set.
 	 */
 	if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
 		fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
 	fpscr |= exceptions;
 	fmxr(FPSCR, fpscr);
 #define RAISE(stat,en,sig)				\
 	if (exceptions & stat && fpscr & en)		\
 		si_code = sig;
 	/*
 	 * These are arranged in priority order, least to highest.
 	 */
 	RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV);
 	RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES);
 	RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND);
 	RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
 	RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
 	if (si_code)
 		vfp_raise_sigfpe(si_code, regs);
 }
 /*
  * Emulate a VFP instruction.
  */
 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
 {
 	u32 exceptions = VFP_EXCEPTION_ERROR;
 	pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr);
 	if (INST_CPRTDO(inst)) {
 		if (!INST_CPRT(inst)) {
 			/*
 			 * CPDO
 			 */
 			if (vfp_single(inst)) {
 				exceptions = vfp_single_cpdo(inst, fpscr);
 			} else {
 				exceptions = vfp_double_cpdo(inst, fpscr);
 			}
 		} else {
 			/*
 			 * A CPRT instruction can not appear in FPINST2, nor
 			 * can it cause an exception.  Therefore, we do not
 			 * have to emulate it.
 			 */
 		}
 	} else {
 		/*
 		 * A CPDT instruction can not appear in FPINST2, nor can
 		 * it cause an exception.  Therefore, we do not have to
 		 * emulate it.
 		 */
 	}
 	return exceptions & ~VFP_NAN_FLAG;
 }
 /*
  * Package up a bounce condition.
  */
 void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
 {
 	u32 fpscr, orig_fpscr, fpsid, exceptions;
 	pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
 	/*
 	 * At this point, FPEXC can have the following configuration:
 	 *
 	 *  EX DEX IXE
 	 *  0   1   x   - synchronous exception
 	 *  1   x   0   - asynchronous exception
 	 *  1   x   1   - sychronous on VFP subarch 1 and asynchronous on later
 	 *  0   0   1   - synchronous on VFP9 (non-standard subarch 1
 	 *                implementation), undefined otherwise
 	 *
 	 * Clear various bits and enable access to the VFP so we can
 	 * handle the bounce.
 	 */
 	fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK));
 	fpsid = fmrx(FPSID);
 	orig_fpscr = fpscr = fmrx(FPSCR);
 	/*
 	 * Check for the special VFP subarch 1 and FPSCR.IXE bit case
 	 */
 	if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT)
 	    && (fpscr & FPSCR_IXE)) {
 		/*
 		 * Synchronous exception, emulate the trigger instruction
 		 */
 		goto emulate;
 	}
 	if (fpexc & FPEXC_EX) {
 #ifndef CONFIG_CPU_FEROCEON
 		/*
 		 * Asynchronous exception. The instruction is read from FPINST
 		 * and the interrupted instruction has to be restarted.
 		 */
 		trigger = fmrx(FPINST);
 		regs->ARM_pc -= 4;
 #endif
 	} else if (!(fpexc & FPEXC_DEX)) {
 		/*
 		 * Illegal combination of bits. It can be caused by an
 		 * unallocated VFP instruction but with FPSCR.IXE set and not
 		 * on VFP subarch 1.
 		 */
 		 vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);
 		goto exit;
 	}
 	/*
 	 * Modify fpscr to indicate the number of iterations remaining.
 	 * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates
 	 * whether FPEXC.VECITR or FPSCR.LEN is used.
 	 */
 	if (fpexc & (FPEXC_EX | FPEXC_VV)) {
 		u32 len;
 		len = fpexc + (1 << FPEXC_LENGTH_BIT);
 		fpscr &= ~FPSCR_LENGTH_MASK;
 		fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT);
 	}
 	/*
 	 * Handle the first FP instruction.  We used to take note of the
 	 * FPEXC bounce reason, but this appears to be unreliable.
 	 * Emulate the bounced instruction instead.
 	 */
 	exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
 	if (exceptions)
 		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
 	/*
 	 * If there isn't a second FP instruction, exit now. Note that
 	 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
 	 */
 	if (fpexc ^ (FPEXC_EX | FPEXC_FP2V))
 		goto exit;
 	/*
 	 * The barrier() here prevents fpinst2 being read
 	 * before the condition above.
 	 */
 	barrier();
 	trigger = fmrx(FPINST2);
  emulate:
 	exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
 	if (exceptions)
 		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
  exit:
 	preempt_enable();
 }
 static void vfp_enable(void *unused)
 {
 	u32 access = get_copro_access();
 	/*
 	 * Enable full access to VFP (cp10 and cp11)
 	 */
 	set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
 }
 #ifdef CONFIG_PM
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
-static int vfp_pm_suspend(struct sys_device *dev, pm_message_t state)
+static int vfp_pm_suspend(void)
 {
 	struct thread_info *ti = current_thread_info();
 	u32 fpexc = fmrx(FPEXC);
 	/* if vfp is on, then save state for resumption */
 	if (fpexc & FPEXC_EN) {
 		printk(KERN_DEBUG "%s: saving vfp state\n", __func__);
 		vfp_save_state(&ti->vfpstate, fpexc);
 		/* disable, just in case */
 		fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
 	}
 	/* clear any information we had about last context state */
 	memset(last_VFP_context, 0, sizeof(last_VFP_context));
 	return 0;
 }
-static int vfp_pm_resume(struct sys_device *dev)
+static void vfp_pm_resume(void)
 {
 	/* ensure we have access to the vfp */
 	vfp_enable(NULL);
 	/* and disable it to ensure the next usage restores the state */
 	fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
-	return 0;
 }
-static struct sysdev_class vfp_pm_sysclass = {
+static struct syscore_ops vfp_pm_syscore_ops = {
-	.name		= "vfp",
 	.suspend	= vfp_pm_suspend,
 	.resume		= vfp_pm_resume,
 };
-static struct sys_device vfp_pm_sysdev = {
-	.cls	= &vfp_pm_sysclass,
-};
 static void vfp_pm_init(void)
 {
-	sysdev_class_register(&vfp_pm_sysclass);
+	register_syscore_ops(&vfp_pm_syscore_ops);
-	sysdev_register(&vfp_pm_sysdev);
 }
 #else
 static inline void vfp_pm_init(void) { }
 #endif /* CONFIG_PM */
 void vfp_sync_hwstate(struct thread_info *thread)
 {
 	unsigned int cpu = get_cpu();
 	/*
 	 * If the thread we're interested in is the current owner of the
 	 * hardware VFP state, then we need to save its state.
 	 */
 	if (last_VFP_context[cpu] == &thread->vfpstate) {
 		u32 fpexc = fmrx(FPEXC);
 		/*
 		 * Save the last VFP state on this CPU.
 		 */
 		fmxr(FPEXC, fpexc | FPEXC_EN);
 		vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN);
 		fmxr(FPEXC, fpexc);
 	}
 	put_cpu();
 }
 void vfp_flush_hwstate(struct thread_info *thread)
 {
 	unsigned int cpu = get_cpu();
 	/*
 	 * If the thread we're interested in is the current owner of the
 	 * hardware VFP state, then we need to save its state.
 	 */
 	if (last_VFP_context[cpu] == &thread->vfpstate) {
 		u32 fpexc = fmrx(FPEXC);
 		fmxr(FPEXC, fpexc & ~FPEXC_EN);
 		/*
 		 * Set the context to NULL to force a reload the next time
 		 * the thread uses the VFP.
 		 */
 		last_VFP_context[cpu] = NULL;
 	}
 #ifdef CONFIG_SMP
 	/*
 	 * For SMP we still have to take care of the case where the thread
 	 * migrates to another CPU and then back to the original CPU on which
 	 * the last VFP user is still the same thread. Mark the thread VFP
 	 * state as belonging to a non-existent CPU so that the saved one will
 	 * be reloaded in the above case.
 	 */
 	thread->vfpstate.hard.cpu = NR_CPUS;
 #endif
 	put_cpu();
 }
 /*
  * VFP hardware can lose all context when a CPU goes offline.
  * As we will be running in SMP mode with CPU hotplug, we will save the
  * hardware state at every thread switch.  We clear our held state when
  * a CPU has been killed, indicating that the VFP hardware doesn't contain
  * a threads VFP state.  When a CPU starts up, we re-enable access to the
  * VFP hardware.
  *
  * Both CPU_DYING and CPU_STARTING are called on the CPU which
  * is being offlined/onlined.
  */
 static int vfp_hotplug(struct notifier_block *b, unsigned long action,
 	void *hcpu)
 {
 	if (action == CPU_DYING || action == CPU_DYING_FROZEN) {
 		unsigned int cpu = (long)hcpu;
 		last_VFP_context[cpu] = NULL;
 	} else if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
 		vfp_enable(NULL);
 	return NOTIFY_OK;
 }
 /*
  * VFP support code initialisation.
  */
 static int __init vfp_init(void)
 {
 	unsigned int vfpsid;
 	unsigned int cpu_arch = cpu_architecture();
 	if (cpu_arch >= CPU_ARCH_ARMv6)
 		vfp_enable(NULL);
 	/*
 	 * First check that there is a VFP that we can use.
 	 * The handler is already setup to just log calls, so
 	 * we just need to read the VFPSID register.
 	 */
 	vfp_vector = vfp_testing_entry;
 	barrier();
 	vfpsid = fmrx(FPSID);
 	barrier();
 	vfp_vector = vfp_null_entry;
 	printk(KERN_INFO "VFP support v0.3: ");
 	if (VFP_arch)
 		printk("not present\n");
 	else if (vfpsid & FPSID_NODOUBLE) {
 		printk("no double precision support\n");
 	} else {
 		hotcpu_notifier(vfp_hotplug, 0);
 		smp_call_function(vfp_enable, NULL, 1);
 		VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT;  /* Extract the architecture version */
 		printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
 			(vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
 			(vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT,
 			(vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT,
 			(vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
 			(vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
 		vfp_vector = vfp_support_entry;
 		thread_register_notifier(&vfp_notifier_block);
 		vfp_pm_init();
 		/*
 		 * We detected VFP, and the support code is
 		 * in place; report VFP support to userspace.
 		 */
 		elf_hwcap |= HWCAP_VFP;
 #ifdef CONFIG_VFPv3
 		if (VFP_arch >= 2) {
 			elf_hwcap |= HWCAP_VFPv3;
 			/*
 			 * Check for VFPv3 D16. CPUs in this configuration
 			 * only have 16 x 64bit registers.
 			 */
 			if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
 				elf_hwcap |= HWCAP_VFPv3D16;
 		}
 #endif
 #ifdef CONFIG_NEON
 		/*
 		 * Check for the presence of the Advanced SIMD
 		 * load/store instructions, integer and single
 		 * precision floating point operations. Only check
 		 * for NEON if the hardware has the MVFR registers.
 		 */
 		if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
 			if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
 				elf_hwcap |= HWCAP_NEON;
 		}
 #endif
 	}
 	return 0;
 }
 late_initcall(vfp_init);