Commit 3bb5534853dbb1e445a9b26ecab8ad331ff14a7e
Committed by
Felipe Balbi
1 parent
1f3f7eceff
Exists in
smarc-l5.0.0_1.0.0-ga
and in
5 other branches
usb: musb: am335x: fix pdev resource bug
We are overwriting the resource->name to "mc" so that musb_core.c can understand it but this is also changing the platform device's resource->name as the "name" address remains same. Fixing the same by changing the resource->name field of local structure only. Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
Showing 1 changed file with 1 additions and 1 deletions Inline Diff
drivers/usb/musb/musb_dsps.c
1 | /* | 1 | /* |
2 | * Texas Instruments DSPS platforms "glue layer" | 2 | * Texas Instruments DSPS platforms "glue layer" |
3 | * | 3 | * |
4 | * Copyright (C) 2012, by Texas Instruments | 4 | * Copyright (C) 2012, by Texas Instruments |
5 | * | 5 | * |
6 | * Based on the am35x "glue layer" code. | 6 | * Based on the am35x "glue layer" code. |
7 | * | 7 | * |
8 | * This file is part of the Inventra Controller Driver for Linux. | 8 | * This file is part of the Inventra Controller Driver for Linux. |
9 | * | 9 | * |
10 | * The Inventra Controller Driver for Linux is free software; you | 10 | * The Inventra Controller Driver for Linux is free software; you |
11 | * can redistribute it and/or modify it under the terms of the GNU | 11 | * can redistribute it and/or modify it under the terms of the GNU |
12 | * General Public License version 2 as published by the Free Software | 12 | * General Public License version 2 as published by the Free Software |
13 | * Foundation. | 13 | * Foundation. |
14 | * | 14 | * |
15 | * The Inventra Controller Driver for Linux is distributed in | 15 | * The Inventra Controller Driver for Linux is distributed in |
16 | * the hope that it will be useful, but WITHOUT ANY WARRANTY; | 16 | * the hope that it will be useful, but WITHOUT ANY WARRANTY; |
17 | * without even the implied warranty of MERCHANTABILITY or | 17 | * without even the implied warranty of MERCHANTABILITY or |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | 18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
19 | * License for more details. | 19 | * License for more details. |
20 | * | 20 | * |
21 | * You should have received a copy of the GNU General Public License | 21 | * You should have received a copy of the GNU General Public License |
22 | * along with The Inventra Controller Driver for Linux ; if not, | 22 | * along with The Inventra Controller Driver for Linux ; if not, |
23 | * write to the Free Software Foundation, Inc., 59 Temple Place, | 23 | * write to the Free Software Foundation, Inc., 59 Temple Place, |
24 | * Suite 330, Boston, MA 02111-1307 USA | 24 | * Suite 330, Boston, MA 02111-1307 USA |
25 | * | 25 | * |
26 | * musb_dsps.c will be a common file for all the TI DSPS platforms | 26 | * musb_dsps.c will be a common file for all the TI DSPS platforms |
27 | * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. | 27 | * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. |
28 | * For now only ti81x is using this and in future davinci.c, am35x.c | 28 | * For now only ti81x is using this and in future davinci.c, am35x.c |
29 | * da8xx.c would be merged to this file after testing. | 29 | * da8xx.c would be merged to this file after testing. |
30 | */ | 30 | */ |
31 | 31 | ||
32 | #include <linux/init.h> | 32 | #include <linux/init.h> |
33 | #include <linux/io.h> | 33 | #include <linux/io.h> |
34 | #include <linux/err.h> | 34 | #include <linux/err.h> |
35 | #include <linux/platform_device.h> | 35 | #include <linux/platform_device.h> |
36 | #include <linux/dma-mapping.h> | 36 | #include <linux/dma-mapping.h> |
37 | #include <linux/pm_runtime.h> | 37 | #include <linux/pm_runtime.h> |
38 | #include <linux/module.h> | 38 | #include <linux/module.h> |
39 | 39 | ||
40 | #include <linux/of.h> | 40 | #include <linux/of.h> |
41 | #include <linux/of_device.h> | 41 | #include <linux/of_device.h> |
42 | #include <linux/of_address.h> | 42 | #include <linux/of_address.h> |
43 | 43 | ||
44 | #include <plat/usb.h> | 44 | #include <plat/usb.h> |
45 | 45 | ||
46 | #include "musb_core.h" | 46 | #include "musb_core.h" |
47 | 47 | ||
48 | /** | 48 | /** |
49 | * avoid using musb_readx()/musb_writex() as glue layer should not be | 49 | * avoid using musb_readx()/musb_writex() as glue layer should not be |
50 | * dependent on musb core layer symbols. | 50 | * dependent on musb core layer symbols. |
51 | */ | 51 | */ |
52 | static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) | 52 | static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) |
53 | { return __raw_readb(addr + offset); } | 53 | { return __raw_readb(addr + offset); } |
54 | 54 | ||
55 | static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) | 55 | static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) |
56 | { return __raw_readl(addr + offset); } | 56 | { return __raw_readl(addr + offset); } |
57 | 57 | ||
58 | static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) | 58 | static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) |
59 | { __raw_writeb(data, addr + offset); } | 59 | { __raw_writeb(data, addr + offset); } |
60 | 60 | ||
61 | static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) | 61 | static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) |
62 | { __raw_writel(data, addr + offset); } | 62 | { __raw_writel(data, addr + offset); } |
63 | 63 | ||
64 | /** | 64 | /** |
65 | * DSPS musb wrapper register offset. | 65 | * DSPS musb wrapper register offset. |
66 | * FIXME: This should be expanded to have all the wrapper registers from TI DSPS | 66 | * FIXME: This should be expanded to have all the wrapper registers from TI DSPS |
67 | * musb ips. | 67 | * musb ips. |
68 | */ | 68 | */ |
69 | struct dsps_musb_wrapper { | 69 | struct dsps_musb_wrapper { |
70 | u16 revision; | 70 | u16 revision; |
71 | u16 control; | 71 | u16 control; |
72 | u16 status; | 72 | u16 status; |
73 | u16 eoi; | 73 | u16 eoi; |
74 | u16 epintr_set; | 74 | u16 epintr_set; |
75 | u16 epintr_clear; | 75 | u16 epintr_clear; |
76 | u16 epintr_status; | 76 | u16 epintr_status; |
77 | u16 coreintr_set; | 77 | u16 coreintr_set; |
78 | u16 coreintr_clear; | 78 | u16 coreintr_clear; |
79 | u16 coreintr_status; | 79 | u16 coreintr_status; |
80 | u16 phy_utmi; | 80 | u16 phy_utmi; |
81 | u16 mode; | 81 | u16 mode; |
82 | 82 | ||
83 | /* bit positions for control */ | 83 | /* bit positions for control */ |
84 | unsigned reset:5; | 84 | unsigned reset:5; |
85 | 85 | ||
86 | /* bit positions for interrupt */ | 86 | /* bit positions for interrupt */ |
87 | unsigned usb_shift:5; | 87 | unsigned usb_shift:5; |
88 | u32 usb_mask; | 88 | u32 usb_mask; |
89 | u32 usb_bitmap; | 89 | u32 usb_bitmap; |
90 | unsigned drvvbus:5; | 90 | unsigned drvvbus:5; |
91 | 91 | ||
92 | unsigned txep_shift:5; | 92 | unsigned txep_shift:5; |
93 | u32 txep_mask; | 93 | u32 txep_mask; |
94 | u32 txep_bitmap; | 94 | u32 txep_bitmap; |
95 | 95 | ||
96 | unsigned rxep_shift:5; | 96 | unsigned rxep_shift:5; |
97 | u32 rxep_mask; | 97 | u32 rxep_mask; |
98 | u32 rxep_bitmap; | 98 | u32 rxep_bitmap; |
99 | 99 | ||
100 | /* bit positions for phy_utmi */ | 100 | /* bit positions for phy_utmi */ |
101 | unsigned otg_disable:5; | 101 | unsigned otg_disable:5; |
102 | 102 | ||
103 | /* bit positions for mode */ | 103 | /* bit positions for mode */ |
104 | unsigned iddig:5; | 104 | unsigned iddig:5; |
105 | /* miscellaneous stuff */ | 105 | /* miscellaneous stuff */ |
106 | u32 musb_core_offset; | 106 | u32 musb_core_offset; |
107 | u8 poll_seconds; | 107 | u8 poll_seconds; |
108 | }; | 108 | }; |
109 | 109 | ||
110 | /** | 110 | /** |
111 | * DSPS glue structure. | 111 | * DSPS glue structure. |
112 | */ | 112 | */ |
113 | struct dsps_glue { | 113 | struct dsps_glue { |
114 | struct device *dev; | 114 | struct device *dev; |
115 | struct platform_device *musb; /* child musb pdev */ | 115 | struct platform_device *musb; /* child musb pdev */ |
116 | const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ | 116 | const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ |
117 | struct timer_list timer; /* otg_workaround timer */ | 117 | struct timer_list timer; /* otg_workaround timer */ |
118 | }; | 118 | }; |
119 | 119 | ||
120 | /** | 120 | /** |
121 | * dsps_musb_enable - enable interrupts | 121 | * dsps_musb_enable - enable interrupts |
122 | */ | 122 | */ |
123 | static void dsps_musb_enable(struct musb *musb) | 123 | static void dsps_musb_enable(struct musb *musb) |
124 | { | 124 | { |
125 | struct device *dev = musb->controller; | 125 | struct device *dev = musb->controller; |
126 | struct platform_device *pdev = to_platform_device(dev->parent); | 126 | struct platform_device *pdev = to_platform_device(dev->parent); |
127 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 127 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
128 | const struct dsps_musb_wrapper *wrp = glue->wrp; | 128 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
129 | void __iomem *reg_base = musb->ctrl_base; | 129 | void __iomem *reg_base = musb->ctrl_base; |
130 | u32 epmask, coremask; | 130 | u32 epmask, coremask; |
131 | 131 | ||
132 | /* Workaround: setup IRQs through both register sets. */ | 132 | /* Workaround: setup IRQs through both register sets. */ |
133 | epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | | 133 | epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | |
134 | ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); | 134 | ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); |
135 | coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); | 135 | coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); |
136 | 136 | ||
137 | dsps_writel(reg_base, wrp->epintr_set, epmask); | 137 | dsps_writel(reg_base, wrp->epintr_set, epmask); |
138 | dsps_writel(reg_base, wrp->coreintr_set, coremask); | 138 | dsps_writel(reg_base, wrp->coreintr_set, coremask); |
139 | /* Force the DRVVBUS IRQ so we can start polling for ID change. */ | 139 | /* Force the DRVVBUS IRQ so we can start polling for ID change. */ |
140 | if (is_otg_enabled(musb)) | 140 | if (is_otg_enabled(musb)) |
141 | dsps_writel(reg_base, wrp->coreintr_set, | 141 | dsps_writel(reg_base, wrp->coreintr_set, |
142 | (1 << wrp->drvvbus) << wrp->usb_shift); | 142 | (1 << wrp->drvvbus) << wrp->usb_shift); |
143 | } | 143 | } |
144 | 144 | ||
145 | /** | 145 | /** |
146 | * dsps_musb_disable - disable HDRC and flush interrupts | 146 | * dsps_musb_disable - disable HDRC and flush interrupts |
147 | */ | 147 | */ |
148 | static void dsps_musb_disable(struct musb *musb) | 148 | static void dsps_musb_disable(struct musb *musb) |
149 | { | 149 | { |
150 | struct device *dev = musb->controller; | 150 | struct device *dev = musb->controller; |
151 | struct platform_device *pdev = to_platform_device(dev->parent); | 151 | struct platform_device *pdev = to_platform_device(dev->parent); |
152 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 152 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
153 | const struct dsps_musb_wrapper *wrp = glue->wrp; | 153 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
154 | void __iomem *reg_base = musb->ctrl_base; | 154 | void __iomem *reg_base = musb->ctrl_base; |
155 | 155 | ||
156 | dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); | 156 | dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); |
157 | dsps_writel(reg_base, wrp->epintr_clear, | 157 | dsps_writel(reg_base, wrp->epintr_clear, |
158 | wrp->txep_bitmap | wrp->rxep_bitmap); | 158 | wrp->txep_bitmap | wrp->rxep_bitmap); |
159 | dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); | 159 | dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); |
160 | dsps_writel(reg_base, wrp->eoi, 0); | 160 | dsps_writel(reg_base, wrp->eoi, 0); |
161 | } | 161 | } |
162 | 162 | ||
163 | static void otg_timer(unsigned long _musb) | 163 | static void otg_timer(unsigned long _musb) |
164 | { | 164 | { |
165 | struct musb *musb = (void *)_musb; | 165 | struct musb *musb = (void *)_musb; |
166 | void __iomem *mregs = musb->mregs; | 166 | void __iomem *mregs = musb->mregs; |
167 | struct device *dev = musb->controller; | 167 | struct device *dev = musb->controller; |
168 | struct platform_device *pdev = to_platform_device(dev->parent); | 168 | struct platform_device *pdev = to_platform_device(dev->parent); |
169 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 169 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
170 | const struct dsps_musb_wrapper *wrp = glue->wrp; | 170 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
171 | u8 devctl; | 171 | u8 devctl; |
172 | unsigned long flags; | 172 | unsigned long flags; |
173 | 173 | ||
174 | /* | 174 | /* |
175 | * We poll because DSPS IP's won't expose several OTG-critical | 175 | * We poll because DSPS IP's won't expose several OTG-critical |
176 | * status change events (from the transceiver) otherwise. | 176 | * status change events (from the transceiver) otherwise. |
177 | */ | 177 | */ |
178 | devctl = dsps_readb(mregs, MUSB_DEVCTL); | 178 | devctl = dsps_readb(mregs, MUSB_DEVCTL); |
179 | dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, | 179 | dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, |
180 | otg_state_string(musb->xceiv->state)); | 180 | otg_state_string(musb->xceiv->state)); |
181 | 181 | ||
182 | spin_lock_irqsave(&musb->lock, flags); | 182 | spin_lock_irqsave(&musb->lock, flags); |
183 | switch (musb->xceiv->state) { | 183 | switch (musb->xceiv->state) { |
184 | case OTG_STATE_A_WAIT_BCON: | 184 | case OTG_STATE_A_WAIT_BCON: |
185 | devctl &= ~MUSB_DEVCTL_SESSION; | 185 | devctl &= ~MUSB_DEVCTL_SESSION; |
186 | dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); | 186 | dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); |
187 | 187 | ||
188 | devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); | 188 | devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); |
189 | if (devctl & MUSB_DEVCTL_BDEVICE) { | 189 | if (devctl & MUSB_DEVCTL_BDEVICE) { |
190 | musb->xceiv->state = OTG_STATE_B_IDLE; | 190 | musb->xceiv->state = OTG_STATE_B_IDLE; |
191 | MUSB_DEV_MODE(musb); | 191 | MUSB_DEV_MODE(musb); |
192 | } else { | 192 | } else { |
193 | musb->xceiv->state = OTG_STATE_A_IDLE; | 193 | musb->xceiv->state = OTG_STATE_A_IDLE; |
194 | MUSB_HST_MODE(musb); | 194 | MUSB_HST_MODE(musb); |
195 | } | 195 | } |
196 | break; | 196 | break; |
197 | case OTG_STATE_A_WAIT_VFALL: | 197 | case OTG_STATE_A_WAIT_VFALL: |
198 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; | 198 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; |
199 | dsps_writel(musb->ctrl_base, wrp->coreintr_set, | 199 | dsps_writel(musb->ctrl_base, wrp->coreintr_set, |
200 | MUSB_INTR_VBUSERROR << wrp->usb_shift); | 200 | MUSB_INTR_VBUSERROR << wrp->usb_shift); |
201 | break; | 201 | break; |
202 | case OTG_STATE_B_IDLE: | 202 | case OTG_STATE_B_IDLE: |
203 | if (!is_peripheral_enabled(musb)) | 203 | if (!is_peripheral_enabled(musb)) |
204 | break; | 204 | break; |
205 | 205 | ||
206 | devctl = dsps_readb(mregs, MUSB_DEVCTL); | 206 | devctl = dsps_readb(mregs, MUSB_DEVCTL); |
207 | if (devctl & MUSB_DEVCTL_BDEVICE) | 207 | if (devctl & MUSB_DEVCTL_BDEVICE) |
208 | mod_timer(&glue->timer, | 208 | mod_timer(&glue->timer, |
209 | jiffies + wrp->poll_seconds * HZ); | 209 | jiffies + wrp->poll_seconds * HZ); |
210 | else | 210 | else |
211 | musb->xceiv->state = OTG_STATE_A_IDLE; | 211 | musb->xceiv->state = OTG_STATE_A_IDLE; |
212 | break; | 212 | break; |
213 | default: | 213 | default: |
214 | break; | 214 | break; |
215 | } | 215 | } |
216 | spin_unlock_irqrestore(&musb->lock, flags); | 216 | spin_unlock_irqrestore(&musb->lock, flags); |
217 | } | 217 | } |
218 | 218 | ||
219 | static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) | 219 | static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) |
220 | { | 220 | { |
221 | struct device *dev = musb->controller; | 221 | struct device *dev = musb->controller; |
222 | struct platform_device *pdev = to_platform_device(dev->parent); | 222 | struct platform_device *pdev = to_platform_device(dev->parent); |
223 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 223 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
224 | static unsigned long last_timer; | 224 | static unsigned long last_timer; |
225 | 225 | ||
226 | if (!is_otg_enabled(musb)) | 226 | if (!is_otg_enabled(musb)) |
227 | return; | 227 | return; |
228 | 228 | ||
229 | if (timeout == 0) | 229 | if (timeout == 0) |
230 | timeout = jiffies + msecs_to_jiffies(3); | 230 | timeout = jiffies + msecs_to_jiffies(3); |
231 | 231 | ||
232 | /* Never idle if active, or when VBUS timeout is not set as host */ | 232 | /* Never idle if active, or when VBUS timeout is not set as host */ |
233 | if (musb->is_active || (musb->a_wait_bcon == 0 && | 233 | if (musb->is_active || (musb->a_wait_bcon == 0 && |
234 | musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { | 234 | musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { |
235 | dev_dbg(musb->controller, "%s active, deleting timer\n", | 235 | dev_dbg(musb->controller, "%s active, deleting timer\n", |
236 | otg_state_string(musb->xceiv->state)); | 236 | otg_state_string(musb->xceiv->state)); |
237 | del_timer(&glue->timer); | 237 | del_timer(&glue->timer); |
238 | last_timer = jiffies; | 238 | last_timer = jiffies; |
239 | return; | 239 | return; |
240 | } | 240 | } |
241 | 241 | ||
242 | if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) { | 242 | if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) { |
243 | dev_dbg(musb->controller, | 243 | dev_dbg(musb->controller, |
244 | "Longer idle timer already pending, ignoring...\n"); | 244 | "Longer idle timer already pending, ignoring...\n"); |
245 | return; | 245 | return; |
246 | } | 246 | } |
247 | last_timer = timeout; | 247 | last_timer = timeout; |
248 | 248 | ||
249 | dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", | 249 | dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", |
250 | otg_state_string(musb->xceiv->state), | 250 | otg_state_string(musb->xceiv->state), |
251 | jiffies_to_msecs(timeout - jiffies)); | 251 | jiffies_to_msecs(timeout - jiffies)); |
252 | mod_timer(&glue->timer, timeout); | 252 | mod_timer(&glue->timer, timeout); |
253 | } | 253 | } |
254 | 254 | ||
255 | static irqreturn_t dsps_interrupt(int irq, void *hci) | 255 | static irqreturn_t dsps_interrupt(int irq, void *hci) |
256 | { | 256 | { |
257 | struct musb *musb = hci; | 257 | struct musb *musb = hci; |
258 | void __iomem *reg_base = musb->ctrl_base; | 258 | void __iomem *reg_base = musb->ctrl_base; |
259 | struct device *dev = musb->controller; | 259 | struct device *dev = musb->controller; |
260 | struct platform_device *pdev = to_platform_device(dev->parent); | 260 | struct platform_device *pdev = to_platform_device(dev->parent); |
261 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 261 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
262 | const struct dsps_musb_wrapper *wrp = glue->wrp; | 262 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
263 | unsigned long flags; | 263 | unsigned long flags; |
264 | irqreturn_t ret = IRQ_NONE; | 264 | irqreturn_t ret = IRQ_NONE; |
265 | u32 epintr, usbintr; | 265 | u32 epintr, usbintr; |
266 | 266 | ||
267 | spin_lock_irqsave(&musb->lock, flags); | 267 | spin_lock_irqsave(&musb->lock, flags); |
268 | 268 | ||
269 | /* Get endpoint interrupts */ | 269 | /* Get endpoint interrupts */ |
270 | epintr = dsps_readl(reg_base, wrp->epintr_status); | 270 | epintr = dsps_readl(reg_base, wrp->epintr_status); |
271 | musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; | 271 | musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; |
272 | musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; | 272 | musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; |
273 | 273 | ||
274 | if (epintr) | 274 | if (epintr) |
275 | dsps_writel(reg_base, wrp->epintr_status, epintr); | 275 | dsps_writel(reg_base, wrp->epintr_status, epintr); |
276 | 276 | ||
277 | /* Get usb core interrupts */ | 277 | /* Get usb core interrupts */ |
278 | usbintr = dsps_readl(reg_base, wrp->coreintr_status); | 278 | usbintr = dsps_readl(reg_base, wrp->coreintr_status); |
279 | if (!usbintr && !epintr) | 279 | if (!usbintr && !epintr) |
280 | goto eoi; | 280 | goto eoi; |
281 | 281 | ||
282 | musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; | 282 | musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; |
283 | if (usbintr) | 283 | if (usbintr) |
284 | dsps_writel(reg_base, wrp->coreintr_status, usbintr); | 284 | dsps_writel(reg_base, wrp->coreintr_status, usbintr); |
285 | 285 | ||
286 | dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", | 286 | dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", |
287 | usbintr, epintr); | 287 | usbintr, epintr); |
288 | /* | 288 | /* |
289 | * DRVVBUS IRQs are the only proxy we have (a very poor one!) for | 289 | * DRVVBUS IRQs are the only proxy we have (a very poor one!) for |
290 | * DSPS IP's missing ID change IRQ. We need an ID change IRQ to | 290 | * DSPS IP's missing ID change IRQ. We need an ID change IRQ to |
291 | * switch appropriately between halves of the OTG state machine. | 291 | * switch appropriately between halves of the OTG state machine. |
292 | * Managing DEVCTL.SESSION per Mentor docs requires that we know its | 292 | * Managing DEVCTL.SESSION per Mentor docs requires that we know its |
293 | * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. | 293 | * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. |
294 | * Also, DRVVBUS pulses for SRP (but not at 5V) ... | 294 | * Also, DRVVBUS pulses for SRP (but not at 5V) ... |
295 | */ | 295 | */ |
296 | if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb)) | 296 | if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb)) |
297 | pr_info("CAUTION: musb: Babble Interrupt Occured\n"); | 297 | pr_info("CAUTION: musb: Babble Interrupt Occured\n"); |
298 | 298 | ||
299 | if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { | 299 | if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { |
300 | int drvvbus = dsps_readl(reg_base, wrp->status); | 300 | int drvvbus = dsps_readl(reg_base, wrp->status); |
301 | void __iomem *mregs = musb->mregs; | 301 | void __iomem *mregs = musb->mregs; |
302 | u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); | 302 | u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); |
303 | int err; | 303 | int err; |
304 | 304 | ||
305 | err = is_host_enabled(musb) && (musb->int_usb & | 305 | err = is_host_enabled(musb) && (musb->int_usb & |
306 | MUSB_INTR_VBUSERROR); | 306 | MUSB_INTR_VBUSERROR); |
307 | if (err) { | 307 | if (err) { |
308 | /* | 308 | /* |
309 | * The Mentor core doesn't debounce VBUS as needed | 309 | * The Mentor core doesn't debounce VBUS as needed |
310 | * to cope with device connect current spikes. This | 310 | * to cope with device connect current spikes. This |
311 | * means it's not uncommon for bus-powered devices | 311 | * means it's not uncommon for bus-powered devices |
312 | * to get VBUS errors during enumeration. | 312 | * to get VBUS errors during enumeration. |
313 | * | 313 | * |
314 | * This is a workaround, but newer RTL from Mentor | 314 | * This is a workaround, but newer RTL from Mentor |
315 | * seems to allow a better one: "re"-starting sessions | 315 | * seems to allow a better one: "re"-starting sessions |
316 | * without waiting for VBUS to stop registering in | 316 | * without waiting for VBUS to stop registering in |
317 | * devctl. | 317 | * devctl. |
318 | */ | 318 | */ |
319 | musb->int_usb &= ~MUSB_INTR_VBUSERROR; | 319 | musb->int_usb &= ~MUSB_INTR_VBUSERROR; |
320 | musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; | 320 | musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; |
321 | mod_timer(&glue->timer, | 321 | mod_timer(&glue->timer, |
322 | jiffies + wrp->poll_seconds * HZ); | 322 | jiffies + wrp->poll_seconds * HZ); |
323 | WARNING("VBUS error workaround (delay coming)\n"); | 323 | WARNING("VBUS error workaround (delay coming)\n"); |
324 | } else if (is_host_enabled(musb) && drvvbus) { | 324 | } else if (is_host_enabled(musb) && drvvbus) { |
325 | musb->is_active = 1; | 325 | musb->is_active = 1; |
326 | MUSB_HST_MODE(musb); | 326 | MUSB_HST_MODE(musb); |
327 | musb->xceiv->otg->default_a = 1; | 327 | musb->xceiv->otg->default_a = 1; |
328 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; | 328 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; |
329 | del_timer(&glue->timer); | 329 | del_timer(&glue->timer); |
330 | } else { | 330 | } else { |
331 | musb->is_active = 0; | 331 | musb->is_active = 0; |
332 | MUSB_DEV_MODE(musb); | 332 | MUSB_DEV_MODE(musb); |
333 | musb->xceiv->otg->default_a = 0; | 333 | musb->xceiv->otg->default_a = 0; |
334 | musb->xceiv->state = OTG_STATE_B_IDLE; | 334 | musb->xceiv->state = OTG_STATE_B_IDLE; |
335 | } | 335 | } |
336 | 336 | ||
337 | /* NOTE: this must complete power-on within 100 ms. */ | 337 | /* NOTE: this must complete power-on within 100 ms. */ |
338 | dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", | 338 | dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", |
339 | drvvbus ? "on" : "off", | 339 | drvvbus ? "on" : "off", |
340 | otg_state_string(musb->xceiv->state), | 340 | otg_state_string(musb->xceiv->state), |
341 | err ? " ERROR" : "", | 341 | err ? " ERROR" : "", |
342 | devctl); | 342 | devctl); |
343 | ret = IRQ_HANDLED; | 343 | ret = IRQ_HANDLED; |
344 | } | 344 | } |
345 | 345 | ||
346 | if (musb->int_tx || musb->int_rx || musb->int_usb) | 346 | if (musb->int_tx || musb->int_rx || musb->int_usb) |
347 | ret |= musb_interrupt(musb); | 347 | ret |= musb_interrupt(musb); |
348 | 348 | ||
349 | eoi: | 349 | eoi: |
350 | /* EOI needs to be written for the IRQ to be re-asserted. */ | 350 | /* EOI needs to be written for the IRQ to be re-asserted. */ |
351 | if (ret == IRQ_HANDLED || epintr || usbintr) | 351 | if (ret == IRQ_HANDLED || epintr || usbintr) |
352 | dsps_writel(reg_base, wrp->eoi, 1); | 352 | dsps_writel(reg_base, wrp->eoi, 1); |
353 | 353 | ||
354 | /* Poll for ID change */ | 354 | /* Poll for ID change */ |
355 | if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) | 355 | if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE) |
356 | mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); | 356 | mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); |
357 | 357 | ||
358 | spin_unlock_irqrestore(&musb->lock, flags); | 358 | spin_unlock_irqrestore(&musb->lock, flags); |
359 | 359 | ||
360 | return ret; | 360 | return ret; |
361 | } | 361 | } |
362 | 362 | ||
363 | static int dsps_musb_init(struct musb *musb) | 363 | static int dsps_musb_init(struct musb *musb) |
364 | { | 364 | { |
365 | struct device *dev = musb->controller; | 365 | struct device *dev = musb->controller; |
366 | struct musb_hdrc_platform_data *plat = dev->platform_data; | 366 | struct musb_hdrc_platform_data *plat = dev->platform_data; |
367 | struct platform_device *pdev = to_platform_device(dev->parent); | 367 | struct platform_device *pdev = to_platform_device(dev->parent); |
368 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 368 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
369 | const struct dsps_musb_wrapper *wrp = glue->wrp; | 369 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
370 | struct omap_musb_board_data *data = plat->board_data; | 370 | struct omap_musb_board_data *data = plat->board_data; |
371 | void __iomem *reg_base = musb->ctrl_base; | 371 | void __iomem *reg_base = musb->ctrl_base; |
372 | u32 rev, val; | 372 | u32 rev, val; |
373 | int status; | 373 | int status; |
374 | 374 | ||
375 | /* mentor core register starts at offset of 0x400 from musb base */ | 375 | /* mentor core register starts at offset of 0x400 from musb base */ |
376 | musb->mregs += wrp->musb_core_offset; | 376 | musb->mregs += wrp->musb_core_offset; |
377 | 377 | ||
378 | /* NOP driver needs change if supporting dual instance */ | 378 | /* NOP driver needs change if supporting dual instance */ |
379 | usb_nop_xceiv_register(); | 379 | usb_nop_xceiv_register(); |
380 | musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); | 380 | musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); |
381 | if (IS_ERR_OR_NULL(musb->xceiv)) | 381 | if (IS_ERR_OR_NULL(musb->xceiv)) |
382 | return -ENODEV; | 382 | return -ENODEV; |
383 | 383 | ||
384 | /* Returns zero if e.g. not clocked */ | 384 | /* Returns zero if e.g. not clocked */ |
385 | rev = dsps_readl(reg_base, wrp->revision); | 385 | rev = dsps_readl(reg_base, wrp->revision); |
386 | if (!rev) { | 386 | if (!rev) { |
387 | status = -ENODEV; | 387 | status = -ENODEV; |
388 | goto err0; | 388 | goto err0; |
389 | } | 389 | } |
390 | 390 | ||
391 | if (is_host_enabled(musb)) | 391 | if (is_host_enabled(musb)) |
392 | setup_timer(&glue->timer, otg_timer, (unsigned long) musb); | 392 | setup_timer(&glue->timer, otg_timer, (unsigned long) musb); |
393 | 393 | ||
394 | /* Reset the musb */ | 394 | /* Reset the musb */ |
395 | dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); | 395 | dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); |
396 | 396 | ||
397 | /* Start the on-chip PHY and its PLL. */ | 397 | /* Start the on-chip PHY and its PLL. */ |
398 | if (data->set_phy_power) | 398 | if (data->set_phy_power) |
399 | data->set_phy_power(1); | 399 | data->set_phy_power(1); |
400 | 400 | ||
401 | musb->isr = dsps_interrupt; | 401 | musb->isr = dsps_interrupt; |
402 | 402 | ||
403 | /* reset the otgdisable bit, needed for host mode to work */ | 403 | /* reset the otgdisable bit, needed for host mode to work */ |
404 | val = dsps_readl(reg_base, wrp->phy_utmi); | 404 | val = dsps_readl(reg_base, wrp->phy_utmi); |
405 | val &= ~(1 << wrp->otg_disable); | 405 | val &= ~(1 << wrp->otg_disable); |
406 | dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); | 406 | dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); |
407 | 407 | ||
408 | /* clear level interrupt */ | 408 | /* clear level interrupt */ |
409 | dsps_writel(reg_base, wrp->eoi, 0); | 409 | dsps_writel(reg_base, wrp->eoi, 0); |
410 | 410 | ||
411 | return 0; | 411 | return 0; |
412 | err0: | 412 | err0: |
413 | usb_put_phy(musb->xceiv); | 413 | usb_put_phy(musb->xceiv); |
414 | usb_nop_xceiv_unregister(); | 414 | usb_nop_xceiv_unregister(); |
415 | return status; | 415 | return status; |
416 | } | 416 | } |
417 | 417 | ||
418 | static int dsps_musb_exit(struct musb *musb) | 418 | static int dsps_musb_exit(struct musb *musb) |
419 | { | 419 | { |
420 | struct device *dev = musb->controller; | 420 | struct device *dev = musb->controller; |
421 | struct musb_hdrc_platform_data *plat = dev->platform_data; | 421 | struct musb_hdrc_platform_data *plat = dev->platform_data; |
422 | struct omap_musb_board_data *data = plat->board_data; | 422 | struct omap_musb_board_data *data = plat->board_data; |
423 | struct platform_device *pdev = to_platform_device(dev->parent); | 423 | struct platform_device *pdev = to_platform_device(dev->parent); |
424 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 424 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
425 | 425 | ||
426 | if (is_host_enabled(musb)) | 426 | if (is_host_enabled(musb)) |
427 | del_timer_sync(&glue->timer); | 427 | del_timer_sync(&glue->timer); |
428 | 428 | ||
429 | /* Shutdown the on-chip PHY and its PLL. */ | 429 | /* Shutdown the on-chip PHY and its PLL. */ |
430 | if (data->set_phy_power) | 430 | if (data->set_phy_power) |
431 | data->set_phy_power(0); | 431 | data->set_phy_power(0); |
432 | 432 | ||
433 | /* NOP driver needs change if supporting dual instance */ | 433 | /* NOP driver needs change if supporting dual instance */ |
434 | usb_put_phy(musb->xceiv); | 434 | usb_put_phy(musb->xceiv); |
435 | usb_nop_xceiv_unregister(); | 435 | usb_nop_xceiv_unregister(); |
436 | 436 | ||
437 | return 0; | 437 | return 0; |
438 | } | 438 | } |
439 | 439 | ||
440 | static struct musb_platform_ops dsps_ops = { | 440 | static struct musb_platform_ops dsps_ops = { |
441 | .init = dsps_musb_init, | 441 | .init = dsps_musb_init, |
442 | .exit = dsps_musb_exit, | 442 | .exit = dsps_musb_exit, |
443 | 443 | ||
444 | .enable = dsps_musb_enable, | 444 | .enable = dsps_musb_enable, |
445 | .disable = dsps_musb_disable, | 445 | .disable = dsps_musb_disable, |
446 | 446 | ||
447 | .try_idle = dsps_musb_try_idle, | 447 | .try_idle = dsps_musb_try_idle, |
448 | }; | 448 | }; |
449 | 449 | ||
450 | static u64 musb_dmamask = DMA_BIT_MASK(32); | 450 | static u64 musb_dmamask = DMA_BIT_MASK(32); |
451 | 451 | ||
452 | static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id) | 452 | static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id) |
453 | { | 453 | { |
454 | struct device *dev = glue->dev; | 454 | struct device *dev = glue->dev; |
455 | struct platform_device *pdev = to_platform_device(dev); | 455 | struct platform_device *pdev = to_platform_device(dev); |
456 | struct musb_hdrc_platform_data *pdata = dev->platform_data; | 456 | struct musb_hdrc_platform_data *pdata = dev->platform_data; |
457 | struct platform_device *musb; | 457 | struct platform_device *musb; |
458 | struct resource *res; | 458 | struct resource *res; |
459 | struct resource resources[2]; | 459 | struct resource resources[2]; |
460 | char res_name[10]; | 460 | char res_name[10]; |
461 | int ret; | 461 | int ret; |
462 | 462 | ||
463 | /* get memory resource */ | 463 | /* get memory resource */ |
464 | sprintf(res_name, "musb%d", id); | 464 | sprintf(res_name, "musb%d", id); |
465 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); | 465 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); |
466 | if (!res) { | 466 | if (!res) { |
467 | dev_err(dev, "%s get mem resource failed\n", res_name); | 467 | dev_err(dev, "%s get mem resource failed\n", res_name); |
468 | ret = -ENODEV; | 468 | ret = -ENODEV; |
469 | goto err0; | 469 | goto err0; |
470 | } | 470 | } |
471 | res->parent = NULL; | 471 | res->parent = NULL; |
472 | resources[0] = *res; | 472 | resources[0] = *res; |
473 | 473 | ||
474 | /* get irq resource */ | 474 | /* get irq resource */ |
475 | sprintf(res_name, "musb%d-irq", id); | 475 | sprintf(res_name, "musb%d-irq", id); |
476 | res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); | 476 | res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); |
477 | if (!res) { | 477 | if (!res) { |
478 | dev_err(dev, "%s get irq resource failed\n", res_name); | 478 | dev_err(dev, "%s get irq resource failed\n", res_name); |
479 | ret = -ENODEV; | 479 | ret = -ENODEV; |
480 | goto err0; | 480 | goto err0; |
481 | } | 481 | } |
482 | strcpy((u8 *)res->name, "mc"); | ||
483 | res->parent = NULL; | 482 | res->parent = NULL; |
484 | resources[1] = *res; | 483 | resources[1] = *res; |
484 | resources[1].name = "mc"; | ||
485 | 485 | ||
486 | /* allocate the child platform device */ | 486 | /* allocate the child platform device */ |
487 | musb = platform_device_alloc("musb-hdrc", -1); | 487 | musb = platform_device_alloc("musb-hdrc", -1); |
488 | if (!musb) { | 488 | if (!musb) { |
489 | dev_err(dev, "failed to allocate musb device\n"); | 489 | dev_err(dev, "failed to allocate musb device\n"); |
490 | ret = -ENOMEM; | 490 | ret = -ENOMEM; |
491 | goto err0; | 491 | goto err0; |
492 | } | 492 | } |
493 | 493 | ||
494 | musb->dev.parent = dev; | 494 | musb->dev.parent = dev; |
495 | musb->dev.dma_mask = &musb_dmamask; | 495 | musb->dev.dma_mask = &musb_dmamask; |
496 | musb->dev.coherent_dma_mask = musb_dmamask; | 496 | musb->dev.coherent_dma_mask = musb_dmamask; |
497 | 497 | ||
498 | glue->musb = musb; | 498 | glue->musb = musb; |
499 | 499 | ||
500 | pdata->platform_ops = &dsps_ops; | 500 | pdata->platform_ops = &dsps_ops; |
501 | 501 | ||
502 | ret = platform_device_add_resources(musb, resources, 2); | 502 | ret = platform_device_add_resources(musb, resources, 2); |
503 | if (ret) { | 503 | if (ret) { |
504 | dev_err(dev, "failed to add resources\n"); | 504 | dev_err(dev, "failed to add resources\n"); |
505 | goto err1; | 505 | goto err1; |
506 | } | 506 | } |
507 | 507 | ||
508 | ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); | 508 | ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); |
509 | if (ret) { | 509 | if (ret) { |
510 | dev_err(dev, "failed to add platform_data\n"); | 510 | dev_err(dev, "failed to add platform_data\n"); |
511 | goto err1; | 511 | goto err1; |
512 | } | 512 | } |
513 | 513 | ||
514 | ret = platform_device_add(musb); | 514 | ret = platform_device_add(musb); |
515 | if (ret) { | 515 | if (ret) { |
516 | dev_err(dev, "failed to register musb device\n"); | 516 | dev_err(dev, "failed to register musb device\n"); |
517 | goto err1; | 517 | goto err1; |
518 | } | 518 | } |
519 | 519 | ||
520 | return 0; | 520 | return 0; |
521 | 521 | ||
522 | err1: | 522 | err1: |
523 | platform_device_put(musb); | 523 | platform_device_put(musb); |
524 | err0: | 524 | err0: |
525 | return ret; | 525 | return ret; |
526 | } | 526 | } |
527 | 527 | ||
528 | static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue) | 528 | static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue) |
529 | { | 529 | { |
530 | platform_device_del(glue->musb); | 530 | platform_device_del(glue->musb); |
531 | platform_device_put(glue->musb); | 531 | platform_device_put(glue->musb); |
532 | } | 532 | } |
533 | 533 | ||
534 | static int __devinit dsps_probe(struct platform_device *pdev) | 534 | static int __devinit dsps_probe(struct platform_device *pdev) |
535 | { | 535 | { |
536 | const struct platform_device_id *id = platform_get_device_id(pdev); | 536 | const struct platform_device_id *id = platform_get_device_id(pdev); |
537 | const struct dsps_musb_wrapper *wrp = | 537 | const struct dsps_musb_wrapper *wrp = |
538 | (struct dsps_musb_wrapper *)id->driver_data; | 538 | (struct dsps_musb_wrapper *)id->driver_data; |
539 | struct dsps_glue *glue; | 539 | struct dsps_glue *glue; |
540 | struct resource *iomem; | 540 | struct resource *iomem; |
541 | int ret; | 541 | int ret; |
542 | 542 | ||
543 | /* allocate glue */ | 543 | /* allocate glue */ |
544 | glue = kzalloc(sizeof(*glue), GFP_KERNEL); | 544 | glue = kzalloc(sizeof(*glue), GFP_KERNEL); |
545 | if (!glue) { | 545 | if (!glue) { |
546 | dev_err(&pdev->dev, "unable to allocate glue memory\n"); | 546 | dev_err(&pdev->dev, "unable to allocate glue memory\n"); |
547 | ret = -ENOMEM; | 547 | ret = -ENOMEM; |
548 | goto err0; | 548 | goto err0; |
549 | } | 549 | } |
550 | 550 | ||
551 | /* get memory resource */ | 551 | /* get memory resource */ |
552 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 552 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
553 | if (!iomem) { | 553 | if (!iomem) { |
554 | dev_err(&pdev->dev, "failed to get usbss mem resourse\n"); | 554 | dev_err(&pdev->dev, "failed to get usbss mem resourse\n"); |
555 | ret = -ENODEV; | 555 | ret = -ENODEV; |
556 | goto err1; | 556 | goto err1; |
557 | } | 557 | } |
558 | 558 | ||
559 | glue->dev = &pdev->dev; | 559 | glue->dev = &pdev->dev; |
560 | 560 | ||
561 | glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL); | 561 | glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL); |
562 | if (!glue->wrp) { | 562 | if (!glue->wrp) { |
563 | dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n"); | 563 | dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n"); |
564 | ret = -ENOMEM; | 564 | ret = -ENOMEM; |
565 | goto err1; | 565 | goto err1; |
566 | } | 566 | } |
567 | platform_set_drvdata(pdev, glue); | 567 | platform_set_drvdata(pdev, glue); |
568 | 568 | ||
569 | /* create the child platform device for first instances of musb */ | 569 | /* create the child platform device for first instances of musb */ |
570 | ret = dsps_create_musb_pdev(glue, 0); | 570 | ret = dsps_create_musb_pdev(glue, 0); |
571 | if (ret != 0) { | 571 | if (ret != 0) { |
572 | dev_err(&pdev->dev, "failed to create child pdev\n"); | 572 | dev_err(&pdev->dev, "failed to create child pdev\n"); |
573 | goto err2; | 573 | goto err2; |
574 | } | 574 | } |
575 | 575 | ||
576 | /* enable the usbss clocks */ | 576 | /* enable the usbss clocks */ |
577 | pm_runtime_enable(&pdev->dev); | 577 | pm_runtime_enable(&pdev->dev); |
578 | 578 | ||
579 | ret = pm_runtime_get_sync(&pdev->dev); | 579 | ret = pm_runtime_get_sync(&pdev->dev); |
580 | if (ret < 0) { | 580 | if (ret < 0) { |
581 | dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); | 581 | dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); |
582 | goto err3; | 582 | goto err3; |
583 | } | 583 | } |
584 | 584 | ||
585 | return 0; | 585 | return 0; |
586 | 586 | ||
587 | err3: | 587 | err3: |
588 | pm_runtime_disable(&pdev->dev); | 588 | pm_runtime_disable(&pdev->dev); |
589 | err2: | 589 | err2: |
590 | kfree(glue->wrp); | 590 | kfree(glue->wrp); |
591 | err1: | 591 | err1: |
592 | kfree(glue); | 592 | kfree(glue); |
593 | err0: | 593 | err0: |
594 | return ret; | 594 | return ret; |
595 | } | 595 | } |
596 | static int __devexit dsps_remove(struct platform_device *pdev) | 596 | static int __devexit dsps_remove(struct platform_device *pdev) |
597 | { | 597 | { |
598 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 598 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
599 | 599 | ||
600 | /* delete the child platform device */ | 600 | /* delete the child platform device */ |
601 | dsps_delete_musb_pdev(glue); | 601 | dsps_delete_musb_pdev(glue); |
602 | 602 | ||
603 | /* disable usbss clocks */ | 603 | /* disable usbss clocks */ |
604 | pm_runtime_put(&pdev->dev); | 604 | pm_runtime_put(&pdev->dev); |
605 | pm_runtime_disable(&pdev->dev); | 605 | pm_runtime_disable(&pdev->dev); |
606 | kfree(glue->wrp); | 606 | kfree(glue->wrp); |
607 | kfree(glue); | 607 | kfree(glue); |
608 | return 0; | 608 | return 0; |
609 | } | 609 | } |
610 | 610 | ||
611 | #ifdef CONFIG_PM_SLEEP | 611 | #ifdef CONFIG_PM_SLEEP |
612 | static int dsps_suspend(struct device *dev) | 612 | static int dsps_suspend(struct device *dev) |
613 | { | 613 | { |
614 | struct musb_hdrc_platform_data *plat = dev->platform_data; | 614 | struct musb_hdrc_platform_data *plat = dev->platform_data; |
615 | struct omap_musb_board_data *data = plat->board_data; | 615 | struct omap_musb_board_data *data = plat->board_data; |
616 | 616 | ||
617 | /* Shutdown the on-chip PHY and its PLL. */ | 617 | /* Shutdown the on-chip PHY and its PLL. */ |
618 | if (data->set_phy_power) | 618 | if (data->set_phy_power) |
619 | data->set_phy_power(0); | 619 | data->set_phy_power(0); |
620 | 620 | ||
621 | return 0; | 621 | return 0; |
622 | } | 622 | } |
623 | 623 | ||
624 | static int dsps_resume(struct device *dev) | 624 | static int dsps_resume(struct device *dev) |
625 | { | 625 | { |
626 | struct musb_hdrc_platform_data *plat = dev->platform_data; | 626 | struct musb_hdrc_platform_data *plat = dev->platform_data; |
627 | struct omap_musb_board_data *data = plat->board_data; | 627 | struct omap_musb_board_data *data = plat->board_data; |
628 | 628 | ||
629 | /* Start the on-chip PHY and its PLL. */ | 629 | /* Start the on-chip PHY and its PLL. */ |
630 | if (data->set_phy_power) | 630 | if (data->set_phy_power) |
631 | data->set_phy_power(1); | 631 | data->set_phy_power(1); |
632 | 632 | ||
633 | return 0; | 633 | return 0; |
634 | } | 634 | } |
635 | #endif | 635 | #endif |
636 | 636 | ||
637 | static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); | 637 | static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); |
638 | 638 | ||
639 | static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = { | 639 | static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = { |
640 | .revision = 0x00, | 640 | .revision = 0x00, |
641 | .control = 0x14, | 641 | .control = 0x14, |
642 | .status = 0x18, | 642 | .status = 0x18, |
643 | .eoi = 0x24, | 643 | .eoi = 0x24, |
644 | .epintr_set = 0x38, | 644 | .epintr_set = 0x38, |
645 | .epintr_clear = 0x40, | 645 | .epintr_clear = 0x40, |
646 | .epintr_status = 0x30, | 646 | .epintr_status = 0x30, |
647 | .coreintr_set = 0x3c, | 647 | .coreintr_set = 0x3c, |
648 | .coreintr_clear = 0x44, | 648 | .coreintr_clear = 0x44, |
649 | .coreintr_status = 0x34, | 649 | .coreintr_status = 0x34, |
650 | .phy_utmi = 0xe0, | 650 | .phy_utmi = 0xe0, |
651 | .mode = 0xe8, | 651 | .mode = 0xe8, |
652 | .reset = 0, | 652 | .reset = 0, |
653 | .otg_disable = 21, | 653 | .otg_disable = 21, |
654 | .iddig = 8, | 654 | .iddig = 8, |
655 | .usb_shift = 0, | 655 | .usb_shift = 0, |
656 | .usb_mask = 0x1ff, | 656 | .usb_mask = 0x1ff, |
657 | .usb_bitmap = (0x1ff << 0), | 657 | .usb_bitmap = (0x1ff << 0), |
658 | .drvvbus = 8, | 658 | .drvvbus = 8, |
659 | .txep_shift = 0, | 659 | .txep_shift = 0, |
660 | .txep_mask = 0xffff, | 660 | .txep_mask = 0xffff, |
661 | .txep_bitmap = (0xffff << 0), | 661 | .txep_bitmap = (0xffff << 0), |
662 | .rxep_shift = 16, | 662 | .rxep_shift = 16, |
663 | .rxep_mask = 0xfffe, | 663 | .rxep_mask = 0xfffe, |
664 | .rxep_bitmap = (0xfffe << 16), | 664 | .rxep_bitmap = (0xfffe << 16), |
665 | .musb_core_offset = 0x400, | 665 | .musb_core_offset = 0x400, |
666 | .poll_seconds = 2, | 666 | .poll_seconds = 2, |
667 | }; | 667 | }; |
668 | 668 | ||
669 | static const struct platform_device_id musb_dsps_id_table[] __devinitconst = { | 669 | static const struct platform_device_id musb_dsps_id_table[] __devinitconst = { |
670 | { | 670 | { |
671 | .name = "musb-ti81xx", | 671 | .name = "musb-ti81xx", |
672 | .driver_data = (kernel_ulong_t) &ti81xx_driver_data, | 672 | .driver_data = (kernel_ulong_t) &ti81xx_driver_data, |
673 | }, | 673 | }, |
674 | { }, /* Terminating Entry */ | 674 | { }, /* Terminating Entry */ |
675 | }; | 675 | }; |
676 | MODULE_DEVICE_TABLE(platform, musb_dsps_id_table); | 676 | MODULE_DEVICE_TABLE(platform, musb_dsps_id_table); |
677 | 677 | ||
678 | static const struct of_device_id musb_dsps_of_match[] __devinitconst = { | 678 | static const struct of_device_id musb_dsps_of_match[] __devinitconst = { |
679 | { .compatible = "musb-ti81xx", }, | 679 | { .compatible = "musb-ti81xx", }, |
680 | { .compatible = "ti,ti81xx-musb", }, | 680 | { .compatible = "ti,ti81xx-musb", }, |
681 | { .compatible = "ti,am335x-musb", }, | 681 | { .compatible = "ti,am335x-musb", }, |
682 | { }, | 682 | { }, |
683 | }; | 683 | }; |
684 | MODULE_DEVICE_TABLE(of, musb_dsps_of_match); | 684 | MODULE_DEVICE_TABLE(of, musb_dsps_of_match); |
685 | 685 | ||
686 | static struct platform_driver dsps_usbss_driver = { | 686 | static struct platform_driver dsps_usbss_driver = { |
687 | .probe = dsps_probe, | 687 | .probe = dsps_probe, |
688 | .remove = __devexit_p(dsps_remove), | 688 | .remove = __devexit_p(dsps_remove), |
689 | .driver = { | 689 | .driver = { |
690 | .name = "musb-dsps", | 690 | .name = "musb-dsps", |
691 | .pm = &dsps_pm_ops, | 691 | .pm = &dsps_pm_ops, |
692 | .of_match_table = musb_dsps_of_match, | 692 | .of_match_table = musb_dsps_of_match, |
693 | }, | 693 | }, |
694 | .id_table = musb_dsps_id_table, | 694 | .id_table = musb_dsps_id_table, |
695 | }; | 695 | }; |
696 | 696 | ||
697 | MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); | 697 | MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); |
698 | MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); | 698 | MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); |
699 | MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); | 699 | MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); |
700 | MODULE_LICENSE("GPL v2"); | 700 | MODULE_LICENSE("GPL v2"); |
701 | 701 | ||
702 | static int __init dsps_init(void) | 702 | static int __init dsps_init(void) |
703 | { | 703 | { |
704 | return platform_driver_register(&dsps_usbss_driver); | 704 | return platform_driver_register(&dsps_usbss_driver); |
705 | } | 705 | } |
706 | subsys_initcall(dsps_init); | 706 | subsys_initcall(dsps_init); |
707 | 707 | ||
708 | static void __exit dsps_exit(void) | 708 | static void __exit dsps_exit(void) |
709 | { | 709 | { |
710 | platform_driver_unregister(&dsps_usbss_driver); | 710 | platform_driver_unregister(&dsps_usbss_driver); |
711 | } | 711 | } |
712 | module_exit(dsps_exit); | 712 | module_exit(dsps_exit); |