Doug / smarc-fsl-linux-kernel | Embedian Git Server

Commit 3ed3bce846abc7ef460104b461cac793e41afe5e

Authored by Matt Domsch 2006-03-26 17:37:03 +0800

Committed by Linus Torvalds 2006-03-27 00:56:54 +0800

Exists in master and in 7 other branches

[PATCH] ia64: use i386 dmi_scan.c

Enable DMI table parsing on ia64.

Andi Kleen has a patch in his x86_64 tree which enables the use of i386
dmi_scan.c on x86_64.  dmi_scan.c functions are being used by the
drivers/char/ipmi/ipmi_si_intf.c driver for autodetecting the ports or
memory spaces where the IPMI controllers may be found.

This patch adds equivalent changes for ia64 as to what is in the x86_64
tree.  In addition, I reworked the DMI detection, such that on EFI-capable
systems, it uses the efi.smbios pointer to find the table, rather than
brute-force searching from 0xF0000.  On non-EFI systems, it continues the
brute-force search.

My test system, an Intel S870BN4 'Tiger4', aka Dell PowerEdge 7250, with
latest BIOS, does not list the IPMI controller in the ACPI namespace, nor
does it have an ACPI SPMI table.  Also note, currently shipping Dell x8xx
EM64T servers don't have these either, so DMI is the only method for
obtaining the address of the IPMI controller.

Signed-off-by: Matt Domsch <Matt_Domsch@dell.com>
Acked-by: "Luck, Tony" <tony.luck@intel.com>
Cc: Andi Kleen <ak@muc.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Showing 6 changed files with 83 additions and 33 deletions Inline Diff

arch/i386/kernel/dmi_scan.c
arch/ia64/Kconfig
arch/ia64/kernel/Makefile
arch/ia64/kernel/setup.c
include/asm-ia64/dmi.h
include/asm-ia64/io.h

arch/i386/kernel/dmi_scan.c

Diff comments View file @ 3ed3bce

1	#include <linux/types.h>	1	#include <linux/types.h>
2	#include <linux/string.h>	2	#include <linux/string.h>
3	#include <linux/init.h>	3	#include <linux/init.h>
4	#include <linux/module.h>	4	#include <linux/module.h>
5	#include <linux/dmi.h>	5	#include <linux/dmi.h>
		6	#include <linux/efi.h>
6	#include <linux/bootmem.h>	7	#include <linux/bootmem.h>
7	#include <linux/slab.h>	8	#include <linux/slab.h>
8	#include <asm/dmi.h>	9	#include <asm/dmi.h>
9		10
10	static char * __init dmi_string(struct dmi_header *dm, u8 s)	11	static char * __init dmi_string(struct dmi_header *dm, u8 s)
11	{	12	{
12	u8 bp = ((u8 ) dm) + dm->length;	13	u8 bp = ((u8 ) dm) + dm->length;
13	char *str = "";	14	char *str = "";
14		15
15	if (s) {	16	if (s) {
16	s--;	17	s--;
17	while (s > 0 && *bp) {	18	while (s > 0 && *bp) {
18	bp += strlen(bp) + 1;	19	bp += strlen(bp) + 1;
19	s--;	20	s--;
20	}	21	}
21		22
22	if (*bp != 0) {	23	if (*bp != 0) {
23	str = dmi_alloc(strlen(bp) + 1);	24	str = dmi_alloc(strlen(bp) + 1);
24	if (str != NULL)	25	if (str != NULL)
25	strcpy(str, bp);	26	strcpy(str, bp);
26	else	27	else
27	printk(KERN_ERR "dmi_string: out of memory.\n");	28	printk(KERN_ERR "dmi_string: out of memory.\n");
28	}	29	}
29	}	30	}
30		31
31	return str;	32	return str;
32	}	33	}
33		34
34	/*	35	/*
35	* We have to be cautious here. We have seen BIOSes with DMI pointers	36	* We have to be cautious here. We have seen BIOSes with DMI pointers
36	* pointing to completely the wrong place for example	37	* pointing to completely the wrong place for example
37	*/	38	*/
38	static int __init dmi_table(u32 base, int len, int num,	39	static int __init dmi_table(u32 base, int len, int num,
39	void (decode)(struct dmi_header ))	40	void (decode)(struct dmi_header ))
40	{	41	{
41	u8 buf, data;	42	u8 buf, data;
42	int i = 0;	43	int i = 0;
43		44
44	buf = dmi_ioremap(base, len);	45	buf = dmi_ioremap(base, len);
45	if (buf == NULL)	46	if (buf == NULL)
46	return -1;	47	return -1;
47		48
48	data = buf;	49	data = buf;
49		50
50	/*	51	/*
51	* Stop when we see all the items the table claimed to have	52	* Stop when we see all the items the table claimed to have
52	* OR we run off the end of the table (also happens)	53	* OR we run off the end of the table (also happens)
53	*/	54	*/
54	while ((i < num) && (data - buf + sizeof(struct dmi_header)) <= len) {	55	while ((i < num) && (data - buf + sizeof(struct dmi_header)) <= len) {
55	struct dmi_header dm = (struct dmi_header )data;	56	struct dmi_header dm = (struct dmi_header )data;
56	/*	57	/*
57	* We want to know the total length (formated area and strings)	58	* We want to know the total length (formated area and strings)
58	* before decoding to make sure we won't run off the table in	59	* before decoding to make sure we won't run off the table in
59	* dmi_decode or dmi_string	60	* dmi_decode or dmi_string
60	*/	61	*/
61	data += dm->length;	62	data += dm->length;
62	while ((data - buf < len - 1) && (data[0] \|\| data[1]))	63	while ((data - buf < len - 1) && (data[0] \|\| data[1]))
63	data++;	64	data++;
64	if (data - buf < len - 1)	65	if (data - buf < len - 1)
65	decode(dm);	66	decode(dm);
66	data += 2;	67	data += 2;
67	i++;	68	i++;
68	}	69	}
69	dmi_iounmap(buf, len);	70	dmi_iounmap(buf, len);
70	return 0;	71	return 0;
71	}	72	}
72		73
73	static int __init dmi_checksum(u8 *buf)	74	static int __init dmi_checksum(u8 *buf)
74	{	75	{
75	u8 sum = 0;	76	u8 sum = 0;
76	int a;	77	int a;
77		78
78	for (a = 0; a < 15; a++)	79	for (a = 0; a < 15; a++)
79	sum += buf[a];	80	sum += buf[a];
80		81
81	return sum == 0;	82	return sum == 0;
82	}	83	}
83		84
84	static char *dmi_ident[DMI_STRING_MAX];	85	static char *dmi_ident[DMI_STRING_MAX];
85	static LIST_HEAD(dmi_devices);	86	static LIST_HEAD(dmi_devices);
86		87
87	/*	88	/*
88	* Save a DMI string	89	* Save a DMI string
89	*/	90	*/
90	static void __init dmi_save_ident(struct dmi_header *dm, int slot, int string)	91	static void __init dmi_save_ident(struct dmi_header *dm, int slot, int string)
91	{	92	{
92	char p, d = (char*) dm;	93	char p, d = (char*) dm;
93		94
94	if (dmi_ident[slot])	95	if (dmi_ident[slot])
95	return;	96	return;
96		97
97	p = dmi_string(dm, d[string]);	98	p = dmi_string(dm, d[string]);
98	if (p == NULL)	99	if (p == NULL)
99	return;	100	return;
100		101
101	dmi_ident[slot] = p;	102	dmi_ident[slot] = p;
102	}	103	}
103		104
104	static void __init dmi_save_devices(struct dmi_header *dm)	105	static void __init dmi_save_devices(struct dmi_header *dm)
105	{	106	{
106	int i, count = (dm->length - sizeof(struct dmi_header)) / 2;	107	int i, count = (dm->length - sizeof(struct dmi_header)) / 2;
107	struct dmi_device *dev;	108	struct dmi_device *dev;
108		109
109	for (i = 0; i < count; i++) {	110	for (i = 0; i < count; i++) {
110	char d = (char )(dm + 1) + (i * 2);	111	char d = (char )(dm + 1) + (i * 2);
111		112
112	/* Skip disabled device */	113	/* Skip disabled device */
113	if ((*d & 0x80) == 0)	114	if ((*d & 0x80) == 0)
114	continue;	115	continue;
115		116
116	dev = dmi_alloc(sizeof(*dev));	117	dev = dmi_alloc(sizeof(*dev));
117	if (!dev) {	118	if (!dev) {
118	printk(KERN_ERR "dmi_save_devices: out of memory.\n");	119	printk(KERN_ERR "dmi_save_devices: out of memory.\n");
119	break;	120	break;
120	}	121	}
121		122
122	dev->type = *d++ & 0x7f;	123	dev->type = *d++ & 0x7f;
123	dev->name = dmi_string(dm, *d);	124	dev->name = dmi_string(dm, *d);
124	dev->device_data = NULL;	125	dev->device_data = NULL;
125		126
126	list_add(&dev->list, &dmi_devices);	127	list_add(&dev->list, &dmi_devices);
127	}	128	}
128	}	129	}
129		130
130	static void __init dmi_save_ipmi_device(struct dmi_header *dm)	131	static void __init dmi_save_ipmi_device(struct dmi_header *dm)
131	{	132	{
132	struct dmi_device *dev;	133	struct dmi_device *dev;
133	void * data;	134	void * data;
134		135
135	data = dmi_alloc(dm->length);	136	data = dmi_alloc(dm->length);
136	if (data == NULL) {	137	if (data == NULL) {
137	printk(KERN_ERR "dmi_save_ipmi_device: out of memory.\n");	138	printk(KERN_ERR "dmi_save_ipmi_device: out of memory.\n");
138	return;	139	return;
139	}	140	}
140		141
141	memcpy(data, dm, dm->length);	142	memcpy(data, dm, dm->length);
142		143
143	dev = dmi_alloc(sizeof(*dev));	144	dev = dmi_alloc(sizeof(*dev));
144	if (!dev) {	145	if (!dev) {
145	printk(KERN_ERR "dmi_save_ipmi_device: out of memory.\n");	146	printk(KERN_ERR "dmi_save_ipmi_device: out of memory.\n");
146	return;	147	return;
147	}	148	}
148		149
149	dev->type = DMI_DEV_TYPE_IPMI;	150	dev->type = DMI_DEV_TYPE_IPMI;
150	dev->name = "IPMI controller";	151	dev->name = "IPMI controller";
151	dev->device_data = data;	152	dev->device_data = data;
152		153
153	list_add(&dev->list, &dmi_devices);	154	list_add(&dev->list, &dmi_devices);
154	}	155	}
155		156
156	/*	157	/*
157	* Process a DMI table entry. Right now all we care about are the BIOS	158	* Process a DMI table entry. Right now all we care about are the BIOS
158	* and machine entries. For 2.5 we should pull the smbus controller info	159	* and machine entries. For 2.5 we should pull the smbus controller info
159	* out of here.	160	* out of here.
160	*/	161	*/
161	static void __init dmi_decode(struct dmi_header *dm)	162	static void __init dmi_decode(struct dmi_header *dm)
162	{	163	{
163	switch(dm->type) {	164	switch(dm->type) {
164	case 0: /* BIOS Information */	165	case 0: /* BIOS Information */
165	dmi_save_ident(dm, DMI_BIOS_VENDOR, 4);	166	dmi_save_ident(dm, DMI_BIOS_VENDOR, 4);
166	dmi_save_ident(dm, DMI_BIOS_VERSION, 5);	167	dmi_save_ident(dm, DMI_BIOS_VERSION, 5);
167	dmi_save_ident(dm, DMI_BIOS_DATE, 8);	168	dmi_save_ident(dm, DMI_BIOS_DATE, 8);
168	break;	169	break;
169	case 1: /* System Information */	170	case 1: /* System Information */
170	dmi_save_ident(dm, DMI_SYS_VENDOR, 4);	171	dmi_save_ident(dm, DMI_SYS_VENDOR, 4);
171	dmi_save_ident(dm, DMI_PRODUCT_NAME, 5);	172	dmi_save_ident(dm, DMI_PRODUCT_NAME, 5);
172	dmi_save_ident(dm, DMI_PRODUCT_VERSION, 6);	173	dmi_save_ident(dm, DMI_PRODUCT_VERSION, 6);
173	dmi_save_ident(dm, DMI_PRODUCT_SERIAL, 7);	174	dmi_save_ident(dm, DMI_PRODUCT_SERIAL, 7);
174	break;	175	break;
175	case 2: /* Base Board Information */	176	case 2: /* Base Board Information */
176	dmi_save_ident(dm, DMI_BOARD_VENDOR, 4);	177	dmi_save_ident(dm, DMI_BOARD_VENDOR, 4);
177	dmi_save_ident(dm, DMI_BOARD_NAME, 5);	178	dmi_save_ident(dm, DMI_BOARD_NAME, 5);
178	dmi_save_ident(dm, DMI_BOARD_VERSION, 6);	179	dmi_save_ident(dm, DMI_BOARD_VERSION, 6);
179	break;	180	break;
180	case 10: /* Onboard Devices Information */	181	case 10: /* Onboard Devices Information */
181	dmi_save_devices(dm);	182	dmi_save_devices(dm);
182	break;	183	break;
183	case 38: /* IPMI Device Information */	184	case 38: /* IPMI Device Information */
184	dmi_save_ipmi_device(dm);	185	dmi_save_ipmi_device(dm);
185	}	186	}
186	}	187	}
187		188
188	void __init dmi_scan_machine(void)	189	static int __init dmi_present(char __iomem *p)
189	{	190	{
190	u8 buf[15];	191	u8 buf[15];
		192	memcpy_fromio(buf, p, 15);
		193	if ((memcmp(buf, "_DMI_", 5) == 0) && dmi_checksum(buf)) {
		194	u16 num = (buf[13] << 8) \| buf[12];
		195	u16 len = (buf[7] << 8) \| buf[6];
		196	u32 base = (buf[11] << 24) \| (buf[10] << 16) \|
		197	(buf[9] << 8) \| buf[8];
		198
		199	/*
		200	* DMI version 0.0 means that the real version is taken from
		201	* the SMBIOS version, which we don't know at this point.
		202	*/
		203	if (buf[14] != 0)
		204	printk(KERN_INFO "DMI %d.%d present.\n",
		205	buf[14] >> 4, buf[14] & 0xF);
		206	else
		207	printk(KERN_INFO "DMI present.\n");
		208	if (dmi_table(base,len, num, dmi_decode) == 0)
		209	return 0;
		210	}
		211	return 1;
		212	}
		213
		214	void __init dmi_scan_machine(void)
		215	{
191	char __iomem p, q;	216	char __iomem p, q;
		217	int rc;
192		218
193	/*	219	if (efi_enabled) {
194	* no iounmap() for that ioremap(); it would be a no-op, but it's	220	if (!efi.smbios)
195	* so early in setup that sucker gets confused into doing what	221	goto out;
196	* it shouldn't if we actually call it.
197	*/
198	p = ioremap(0xF0000, 0x10000);
199	if (p == NULL)
200	goto out;
201		222
202	for (q = p; q < p + 0x10000; q += 16) {	223	/* This is called as a core_initcall() because it isn't
203	memcpy_fromio(buf, q, 15);	224	* needed during early boot. This also means we can
204	if ((memcmp(buf, "_DMI_", 5) == 0) && dmi_checksum(buf)) {	225	* iounmap the space when we're done with it.
205	u16 num = (buf[13] << 8) \| buf[12];	226	*/
206	u16 len = (buf[7] << 8) \| buf[6];	227	p = dmi_ioremap((unsigned long)efi.smbios, 0x10000);
207	u32 base = (buf[11] << 24) \| (buf[10] << 16) \|	228	if (p == NULL)
208	(buf[9] << 8) \| buf[8];	229	goto out;
209		230
210	/*	231	rc = dmi_present(p + 0x10); /* offset of _DMI_ string */
211	* DMI version 0.0 means that the real version is taken from	232	iounmap(p);
212	* the SMBIOS version, which we don't know at this point.	233	if (!rc)
213	*/	234	return;
214	if (buf[14] != 0)	235	}
215	printk(KERN_INFO "DMI %d.%d present.\n",	236	else {
216	buf[14] >> 4, buf[14] & 0xF);	237	/*
217	else	238	* no iounmap() for that ioremap(); it would be a no-op, but
218	printk(KERN_INFO "DMI present.\n");	239	* it's so early in setup that sucker gets confused into doing
		240	* what it shouldn't if we actually call it.
		241	*/
		242	p = dmi_ioremap(0xF0000, 0x10000);
		243	if (p == NULL)
		244	goto out;
219		245
220	if (dmi_table(base,len, num, dmi_decode) == 0)	246	for (q = p; q < p + 0x10000; q += 16) {
		247	rc = dmi_present(q);
		248	if (!rc)
221	return;	249	return;
222	}	250	}
223	}	251	}
224		252	out: printk(KERN_INFO "DMI not present or invalid.\n");
225	out: printk(KERN_INFO "DMI not present or invalid.\n");
226	}	253	}
227
228		254
229	/**	255	/**
230	* dmi_check_system - check system DMI data	256	* dmi_check_system - check system DMI data
231	* @list: array of dmi_system_id structures to match against	257	* @list: array of dmi_system_id structures to match against
232	*	258	*
233	* Walk the blacklist table running matching functions until someone	259	* Walk the blacklist table running matching functions until someone
234	* returns non zero or we hit the end. Callback function is called for	260	* returns non zero or we hit the end. Callback function is called for
235	* each successfull match. Returns the number of matches.	261	* each successfull match. Returns the number of matches.
236	*/	262	*/
237	int dmi_check_system(struct dmi_system_id *list)	263	int dmi_check_system(struct dmi_system_id *list)
238	{	264	{
239	int i, count = 0;	265	int i, count = 0;
240	struct dmi_system_id *d = list;	266	struct dmi_system_id *d = list;
241		267
242	while (d->ident) {	268	while (d->ident) {
243	for (i = 0; i < ARRAY_SIZE(d->matches); i++) {	269	for (i = 0; i < ARRAY_SIZE(d->matches); i++) {
244	int s = d->matches[i].slot;	270	int s = d->matches[i].slot;
245	if (s == DMI_NONE)	271	if (s == DMI_NONE)
246	continue;	272	continue;
247	if (dmi_ident[s] && strstr(dmi_ident[s], d->matches[i].substr))	273	if (dmi_ident[s] && strstr(dmi_ident[s], d->matches[i].substr))
248	continue;	274	continue;
249	/* No match */	275	/* No match */
250	goto fail;	276	goto fail;
251	}	277	}
252	count++;	278	count++;
253	if (d->callback && d->callback(d))	279	if (d->callback && d->callback(d))
254	break;	280	break;
255	fail: d++;	281	fail: d++;
256	}	282	}
257		283
258	return count;	284	return count;
259	}	285	}
260	EXPORT_SYMBOL(dmi_check_system);	286	EXPORT_SYMBOL(dmi_check_system);
261		287
262	/**	288	/**
263	* dmi_get_system_info - return DMI data value	289	* dmi_get_system_info - return DMI data value
264	* @field: data index (see enum dmi_filed)	290	* @field: data index (see enum dmi_filed)
265	*	291	*
266	* Returns one DMI data value, can be used to perform	292	* Returns one DMI data value, can be used to perform
267	* complex DMI data checks.	293	* complex DMI data checks.
268	*/	294	*/
269	char *dmi_get_system_info(int field)	295	char *dmi_get_system_info(int field)
270	{	296	{
271	return dmi_ident[field];	297	return dmi_ident[field];
272	}	298	}
273	EXPORT_SYMBOL(dmi_get_system_info);	299	EXPORT_SYMBOL(dmi_get_system_info);
274		300
275	/**	301	/**
276	* dmi_find_device - find onboard device by type/name	302	* dmi_find_device - find onboard device by type/name
277	* @type: device type or %DMI_DEV_TYPE_ANY to match all device types	303	* @type: device type or %DMI_DEV_TYPE_ANY to match all device types
278	* @desc: device name string or %NULL to match all	304	* @desc: device name string or %NULL to match all
279	* @from: previous device found in search, or %NULL for new search.	305	* @from: previous device found in search, or %NULL for new search.
280	*	306	*
281	* Iterates through the list of known onboard devices. If a device is	307	* Iterates through the list of known onboard devices. If a device is
282	* found with a matching @vendor and @device, a pointer to its device	308	* found with a matching @vendor and @device, a pointer to its device
283	* structure is returned. Otherwise, %NULL is returned.	309	* structure is returned. Otherwise, %NULL is returned.
284	* A new search is initiated by passing %NULL to the @from argument.	310	* A new search is initiated by passing %NULL to the @from argument.
285	* If @from is not %NULL, searches continue from next device.	311	* If @from is not %NULL, searches continue from next device.
286	*/	312	*/
287	struct dmi_device * dmi_find_device(int type, const char *name,	313	struct dmi_device * dmi_find_device(int type, const char *name,
288	struct dmi_device *from)	314	struct dmi_device *from)
289	{	315	{
290	struct list_head d, head = from ? &from->list : &dmi_devices;	316	struct list_head d, head = from ? &from->list : &dmi_devices;
291		317
292	for(d = head->next; d != &dmi_devices; d = d->next) {	318	for(d = head->next; d != &dmi_devices; d = d->next) {
293	struct dmi_device *dev = list_entry(d, struct dmi_device, list);	319	struct dmi_device *dev = list_entry(d, struct dmi_device, list);
294		320
295	if (((type == DMI_DEV_TYPE_ANY) \|\| (dev->type == type)) &&	321	if (((type == DMI_DEV_TYPE_ANY) \|\| (dev->type == type)) &&
296	((name == NULL) \|\| (strcmp(dev->name, name) == 0)))	322	((name == NULL) \|\| (strcmp(dev->name, name) == 0)))
297	return dev;	323	return dev;
298	}	324	}
299		325
300	return NULL;	326	return NULL;
301	}	327	}
302	EXPORT_SYMBOL(dmi_find_device);	328	EXPORT_SYMBOL(dmi_find_device);
303		329
304	/**	330	/**
305	* dmi_get_year - Return year of a DMI date	331	* dmi_get_year - Return year of a DMI date
306	* @field: data index (like dmi_get_system_info)	332	* @field: data index (like dmi_get_system_info)
307	*	333	*
308	* Returns -1 when the field doesn't exist. 0 when it is broken.	334	* Returns -1 when the field doesn't exist. 0 when it is broken.
309	*/	335	*/
310	int dmi_get_year(int field)	336	int dmi_get_year(int field)
311	{	337	{
312	int year;	338	int year;
313	char *s = dmi_get_system_info(field);	339	char *s = dmi_get_system_info(field);
314		340
315	if (!s)	341	if (!s)
316	return -1;	342	return -1;
317	if (*s == '\0')	343	if (*s == '\0')
318	return 0;	344	return 0;
319	s = strrchr(s, '/');	345	s = strrchr(s, '/');
320	if (!s)	346	if (!s)
321	return 0;	347	return 0;
322		348
323	s += 1;	349	s += 1;
324	year = simple_strtoul(s, NULL, 0);	350	year = simple_strtoul(s, NULL, 0);
325	if (year && year < 100) { /* 2-digit year */	351	if (year && year < 100) { /* 2-digit year */
326	year += 1900;	352	year += 1900;

arch/ia64/Kconfig

Diff comments View file @ 3ed3bce

 #
 # For a description of the syntax of this configuration file,
 # see Documentation/kbuild/kconfig-language.txt.
 #
 mainmenu "IA-64 Linux Kernel Configuration"
 source "init/Kconfig"
 menu "Processor type and features"
 config IA64
 	bool
 	default y
 	help
 	  The Itanium Processor Family is Intel's 64-bit successor to
 	  the 32-bit X86 line.  The IA-64 Linux project has a home
 	  page at <http://www.linuxia64.org/> and a mailing list at
 	  <linux-ia64@vger.kernel.org>.
 config 64BIT
 	bool
 	default y
 config MMU
 	bool
 	default y
 config SWIOTLB
        bool
        default y
 config RWSEM_XCHGADD_ALGORITHM
 	bool
 	default y
 config GENERIC_CALIBRATE_DELAY
 	bool
 	default y
 config TIME_INTERPOLATION
 	bool
 	default y
+config DMI
+	bool
+	default y
 config EFI
 	bool
 	default y
 config GENERIC_IOMAP
 	bool
 	default y
 config SCHED_NO_NO_OMIT_FRAME_POINTER
 	bool
 	default y
 config IA64_UNCACHED_ALLOCATOR
 	bool
 	select GENERIC_ALLOCATOR
 config DMA_IS_DMA32
 	bool
 	default y
 choice
 	prompt "System type"
 	default IA64_GENERIC
 config IA64_GENERIC
 	bool "generic"
 	select ACPI
 	select NUMA
 	select ACPI_NUMA
 	help
 	  This selects the system type of your hardware.  A "generic" kernel
 	  will run on any supported IA-64 system.  However, if you configure
 	  a kernel for your specific system, it will be faster and smaller.
 	  generic		For any supported IA-64 system
 	  DIG-compliant		For DIG ("Developer's Interface Guide") compliant systems
 	  HP-zx1/sx1000		For HP systems
 	  HP-zx1/sx1000+swiotlb	For HP systems with (broken) DMA-constrained devices.
 	  SGI-SN2		For SGI Altix systems
 	  Ski-simulator		For the HP simulator <http://www.hpl.hp.com/research/linux/ski/>
 	  If you don't know what to do, choose "generic".
 config IA64_DIG
 	bool "DIG-compliant"
 config IA64_HP_ZX1
 	bool "HP-zx1/sx1000"
 	help
 	  Build a kernel that runs on HP zx1 and sx1000 systems.  This adds
 	  support for the HP I/O MMU.
 config IA64_HP_ZX1_SWIOTLB
 	bool "HP-zx1/sx1000 with software I/O TLB"
 	help
 	  Build a kernel that runs on HP zx1 and sx1000 systems even when they
 	  have broken PCI devices which cannot DMA to full 32 bits.  Apart
 	  from support for the HP I/O MMU, this includes support for the software
 	  I/O TLB, which allows supporting the broken devices at the expense of
 	  wasting some kernel memory (about 2MB by default).
 config IA64_SGI_SN2
 	bool "SGI-SN2"
 	help
 	  Selecting this option will optimize the kernel for use on sn2 based
 	  systems, but the resulting kernel binary will not run on other
 	  types of ia64 systems.  If you have an SGI Altix system, it's safe
 	  to select this option.  If in doubt, select ia64 generic support
 	  instead.
 config IA64_HP_SIM
 	bool "Ski-simulator"
 endchoice
 choice
 	prompt "Processor type"
 	default ITANIUM
 config ITANIUM
 	bool "Itanium"
 	help
 	  Select your IA-64 processor type.  The default is Itanium.
 	  This choice is safe for all IA-64 systems, but may not perform
 	  optimally on systems with, say, Itanium 2 or newer processors.
 config MCKINLEY
 	bool "Itanium 2"
 	help
 	  Select this to configure for an Itanium 2 (McKinley) processor.
 endchoice
 choice
 	prompt "Kernel page size"
 	default IA64_PAGE_SIZE_16KB
 config IA64_PAGE_SIZE_4KB
 	bool "4KB"
 	help
 	  This lets you select the page size of the kernel.  For best IA-64
 	  performance, a page size of 8KB or 16KB is recommended.  For best
 	  IA-32 compatibility, a page size of 4KB should be selected (the vast
 	  majority of IA-32 binaries work perfectly fine with a larger page
 	  size).  For Itanium 2 or newer systems, a page size of 64KB can also
 	  be selected.
 	  4KB                For best IA-32 compatibility
 	  8KB                For best IA-64 performance
 	  16KB               For best IA-64 performance
 	  64KB               Requires Itanium 2 or newer processor.
 	  If you don't know what to do, choose 16KB.
 config IA64_PAGE_SIZE_8KB
 	bool "8KB"
 config IA64_PAGE_SIZE_16KB
 	bool "16KB"
 config IA64_PAGE_SIZE_64KB
 	depends on !ITANIUM
 	bool "64KB"
 endchoice
 choice
 	prompt "Page Table Levels"
 	default PGTABLE_3
 config PGTABLE_3
 	bool "3 Levels"
 config PGTABLE_4
 	depends on !IA64_PAGE_SIZE_64KB
 	bool "4 Levels"
 endchoice
 source kernel/Kconfig.hz
 config IA64_BRL_EMU
 	bool
 	depends on ITANIUM
 	default y
 # align cache-sensitive data to 128 bytes
 config IA64_L1_CACHE_SHIFT
 	int
 	default "7" if MCKINLEY
 	default "6" if ITANIUM
 config IA64_CYCLONE
 	bool "Cyclone (EXA) Time Source support"
 	help
 	  Say Y here to enable support for IBM EXA Cyclone time source.
 	  If you're unsure, answer N.
 config IOSAPIC
 	bool
 	depends on !IA64_HP_SIM
 	default y
 config IA64_SGI_SN_XP
 	tristate "Support communication between SGI SSIs"
 	depends on IA64_GENERIC || IA64_SGI_SN2
 	select IA64_UNCACHED_ALLOCATOR
 	help
 	  An SGI machine can be divided into multiple Single System
 	  Images which act independently of each other and have
 	  hardware based memory protection from the others.  Enabling
 	  this feature will allow for direct communication between SSIs
 	  based on a network adapter and DMA messaging.
 config FORCE_MAX_ZONEORDER
 	int "MAX_ORDER (11 - 17)"  if !HUGETLB_PAGE
 	range 11 17  if !HUGETLB_PAGE
 	default "17" if HUGETLB_PAGE
 	default "11"
 config SMP
 	bool "Symmetric multi-processing support"
 	help
 	  This enables support for systems with more than one CPU. If you have
 	  a system with only one CPU, say N.  If you have a system with more
 	  than one CPU, say Y.
 	  If you say N here, the kernel will run on single and multiprocessor
 	  systems, but will use only one CPU of a multiprocessor system.  If
 	  you say Y here, the kernel will run on many, but not all,
 	  single processor systems.  On a single processor system, the kernel
 	  will run faster if you say N here.
 	  See also the <file:Documentation/smp.txt> and the SMP-HOWTO
 	  available at <http://www.tldp.org/docs.html#howto>.
 	  If you don't know what to do here, say N.
 config NR_CPUS
 	int "Maximum number of CPUs (2-1024)"
 	range 2 1024
 	depends on SMP
 	default "64"
 	help
 	  You should set this to the number of CPUs in your system, but
 	  keep in mind that a kernel compiled for, e.g., 2 CPUs will boot but
 	  only use 2 CPUs on a >2 CPU system.  Setting this to a value larger
 	  than 64 will cause the use of a CPU mask array, causing a small
 	  performance hit.
 config IA64_NR_NODES
 	int "Maximum number of NODEs (256-1024)" if (IA64_SGI_SN2 || IA64_GENERIC)
 	range 256 1024
 	depends on IA64_SGI_SN2 || IA64_GENERIC
 	default "256"
 	help
 	  This option specifies the maximum number of nodes in your SSI system.
 	  If in doubt, use the default.
 config HOTPLUG_CPU
 	bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
 	depends on SMP && EXPERIMENTAL
 	select HOTPLUG
 	default n
 	---help---
 	  Say Y here to experiment with turning CPUs off and on.  CPUs
 	  can be controlled through /sys/devices/system/cpu/cpu#.
 	  Say N if you want to disable CPU hotplug.
 config SCHED_SMT
 	bool "SMT scheduler support"
 	depends on SMP
 	default off
 	help
 	  Improves the CPU scheduler's decision making when dealing with
 	  Intel IA64 chips with MultiThreading at a cost of slightly increased
 	  overhead in some places. If unsure say N here.
 config PERMIT_BSP_REMOVE
 	bool "Support removal of Bootstrap Processor"
 	depends on HOTPLUG_CPU
 	default n
 	---help---
 	Say Y here if your platform SAL will support removal of BSP with HOTPLUG_CPU
 	support.
 config FORCE_CPEI_RETARGET
 	bool "Force assumption that CPEI can be re-targetted"
 	depends on PERMIT_BSP_REMOVE
 	default n
 	---help---
 	Say Y if you need to force the assumption that CPEI can be re-targetted to
 	any cpu in the system. This hint is available via ACPI 3.0 specifications.
 	Tiger4 systems are capable of re-directing CPEI to any CPU other than BSP.
 	This option it useful to enable this feature on older BIOS's as well.
 	You can also enable this by using boot command line option force_cpei=1.
 config PREEMPT
 	bool "Preemptible Kernel"
         help
           This option reduces the latency of the kernel when reacting to
           real-time or interactive events by allowing a low priority process to
           be preempted even if it is in kernel mode executing a system call.
           This allows applications to run more reliably even when the system is
           under load.
           Say Y here if you are building a kernel for a desktop, embedded
           or real-time system.  Say N if you are unsure.
 source "mm/Kconfig"
 config ARCH_SELECT_MEMORY_MODEL
 	def_bool y
 config ARCH_DISCONTIGMEM_ENABLE
 	def_bool y
 	help
 	  Say Y to support efficient handling of discontiguous physical memory,
 	  for architectures which are either NUMA (Non-Uniform Memory Access)
 	  or have huge holes in the physical address space for other reasons.
  	  See <file:Documentation/vm/numa> for more.
 config ARCH_FLATMEM_ENABLE
 	def_bool y
 config ARCH_SPARSEMEM_ENABLE
 	def_bool y
 	depends on ARCH_DISCONTIGMEM_ENABLE
 config ARCH_DISCONTIGMEM_DEFAULT
 	def_bool y if (IA64_SGI_SN2 || IA64_GENERIC || IA64_HP_ZX1 || IA64_HP_ZX1_SWIOTLB)
 	depends on ARCH_DISCONTIGMEM_ENABLE
 config NUMA
 	bool "NUMA support"
 	depends on !IA64_HP_SIM && !FLATMEM
 	default y if IA64_SGI_SN2
 	help
 	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
 	  Access).  This option is for configuring high-end multiprocessor
 	  server systems.  If in doubt, say N.
 # VIRTUAL_MEM_MAP and FLAT_NODE_MEM_MAP are functionally equivalent.
 # VIRTUAL_MEM_MAP has been retained for historical reasons.
 config VIRTUAL_MEM_MAP
 	bool "Virtual mem map"
 	depends on !SPARSEMEM
 	default y if !IA64_HP_SIM
 	help
 	  Say Y to compile the kernel with support for a virtual mem map.
 	  This code also only takes effect if a memory hole of greater than
 	  1 Gb is found during boot.  You must turn this option on if you
 	  require the DISCONTIGMEM option for your machine. If you are
 	  unsure, say Y.
 config HOLES_IN_ZONE
 	bool
 	default y if VIRTUAL_MEM_MAP
 config HAVE_ARCH_EARLY_PFN_TO_NID
 	def_bool y
 	depends on NEED_MULTIPLE_NODES
 config IA32_SUPPORT
 	bool "Support for Linux/x86 binaries"
 	help
 	  IA-64 processors can execute IA-32 (X86) instructions.  By
 	  saying Y here, the kernel will include IA-32 system call
 	  emulation support which makes it possible to transparently
 	  run IA-32 Linux binaries on an IA-64 Linux system.
 	  If in doubt, say Y.
 config COMPAT
 	bool
 	depends on IA32_SUPPORT
 	default y
 config IA64_MCA_RECOVERY
 	tristate "MCA recovery from errors other than TLB."
 config PERFMON
 	bool "Performance monitor support"
 	help
 	  Selects whether support for the IA-64 performance monitor hardware
 	  is included in the kernel.  This makes some kernel data-structures a
 	  little bigger and slows down execution a bit, but it is generally
 	  a good idea to turn this on.  If you're unsure, say Y.
 config IA64_PALINFO
 	tristate "/proc/pal support"
 	help
 	  If you say Y here, you are able to get PAL (Processor Abstraction
 	  Layer) information in /proc/pal.  This contains useful information
 	  about the processors in your systems, such as cache and TLB sizes
 	  and the PAL firmware version in use.
 	  To use this option, you have to ensure that the "/proc file system
 	  support" (CONFIG_PROC_FS) is enabled, too.
 config SGI_SN
 	def_bool y if (IA64_SGI_SN2 || IA64_GENERIC)
 source "drivers/firmware/Kconfig"
 source "fs/Kconfig.binfmt"
 endmenu
 menu "Power management and ACPI"
 source "kernel/power/Kconfig"
 source "drivers/acpi/Kconfig"
 if PM
 source "arch/ia64/kernel/cpufreq/Kconfig"
 endif
 endmenu
 if !IA64_HP_SIM
 menu "Bus options (PCI, PCMCIA)"
 config PCI
 	bool "PCI support"
 	help
 	  Real IA-64 machines all have PCI/PCI-X/PCI Express busses.  Say Y
 	  here unless you are using a simulator without PCI support.
 config PCI_DOMAINS
 	bool
 	default PCI
 source "drivers/pci/Kconfig"
 source "drivers/pci/hotplug/Kconfig"
 source "drivers/pcmcia/Kconfig"
 endmenu
 endif
 source "net/Kconfig"
 source "drivers/Kconfig"
 source "fs/Kconfig"
 source "lib/Kconfig"
 #
 # Use the generic interrupt handling code in kernel/irq/:
 #
 config GENERIC_HARDIRQS
 	bool
 	default y
 config GENERIC_IRQ_PROBE
 	bool
 	default y
 config GENERIC_PENDING_IRQ
 	bool
 	depends on GENERIC_HARDIRQS && SMP
 	default y
 source "arch/ia64/hp/sim/Kconfig"
 menu "Instrumentation Support"
         depends on EXPERIMENTAL
 source "arch/ia64/oprofile/Kconfig"
 config KPROBES
 	bool "Kprobes (EXPERIMENTAL)"
 	depends on EXPERIMENTAL && MODULES
 	help
 	  Kprobes allows you to trap at almost any kernel address and
 	  execute a callback function.  register_kprobe() establishes
 	  a probepoint and specifies the callback.  Kprobes is useful
 	  for kernel debugging, non-intrusive instrumentation and testing.
 	  If in doubt, say "N".
 endmenu
 source "arch/ia64/Kconfig.debug"
 source "security/Kconfig"
 source "crypto/Kconfig"

arch/ia64/kernel/Makefile

Diff comments View file @ 3ed3bce

 #
 # Makefile for the linux kernel.
 #
 extra-y	:= head.o init_task.o vmlinux.lds
 obj-y := acpi.o entry.o efi.o efi_stub.o gate-data.o fsys.o ia64_ksyms.o irq.o irq_ia64.o	\
 	 irq_lsapic.o ivt.o machvec.o pal.o patch.o process.o perfmon.o ptrace.o sal.o		\
 	 salinfo.o semaphore.o setup.o signal.o sys_ia64.o time.o traps.o unaligned.o \
-	 unwind.o mca.o mca_asm.o topology.o
+	 unwind.o mca.o mca_asm.o topology.o dmi_scan.o
 obj-$(CONFIG_IA64_BRL_EMU)	+= brl_emu.o
 obj-$(CONFIG_IA64_GENERIC)	+= acpi-ext.o
 obj-$(CONFIG_IA64_HP_ZX1)	+= acpi-ext.o
 obj-$(CONFIG_IA64_HP_ZX1_SWIOTLB) += acpi-ext.o
 ifneq ($(CONFIG_ACPI_PROCESSOR),)
 obj-y				+= acpi-processor.o
 endif
 obj-$(CONFIG_IA64_PALINFO)	+= palinfo.o
 obj-$(CONFIG_IOSAPIC)		+= iosapic.o
 obj-$(CONFIG_MODULES)		+= module.o
 obj-$(CONFIG_SMP)		+= smp.o smpboot.o
 obj-$(CONFIG_NUMA)		+= numa.o
 obj-$(CONFIG_PERFMON)		+= perfmon_default_smpl.o
 obj-$(CONFIG_IA64_CYCLONE)	+= cyclone.o
 obj-$(CONFIG_CPU_FREQ)		+= cpufreq/
 obj-$(CONFIG_IA64_MCA_RECOVERY)	+= mca_recovery.o
 obj-$(CONFIG_KPROBES)		+= kprobes.o jprobes.o
 obj-$(CONFIG_IA64_UNCACHED_ALLOCATOR)	+= uncached.o
 mca_recovery-y			+= mca_drv.o mca_drv_asm.o
+dmi_scan-y			+= ../../i386/kernel/dmi_scan.o
 # The gate DSO image is built using a special linker script.
 targets += gate.so gate-syms.o
 extra-y += gate.so gate-syms.o gate.lds gate.o
 # fp_emulate() expects f2-f5,f16-f31 to contain the user-level state.
 CFLAGS_traps.o  += -mfixed-range=f2-f5,f16-f31
 CPPFLAGS_gate.lds := -P -C -U$(ARCH)
 quiet_cmd_gate = GATE $@
       cmd_gate = $(CC) -nostdlib $(GATECFLAGS_$(@F)) -Wl,-T,$(filter-out FORCE,$^) -o $@
 GATECFLAGS_gate.so = -shared -s -Wl,-soname=linux-gate.so.1
 $(obj)/gate.so: $(obj)/gate.lds $(obj)/gate.o FORCE
 	$(call if_changed,gate)
 $(obj)/built-in.o: $(obj)/gate-syms.o
 $(obj)/built-in.o: ld_flags += -R $(obj)/gate-syms.o
 GATECFLAGS_gate-syms.o = -r
 $(obj)/gate-syms.o: $(obj)/gate.lds $(obj)/gate.o FORCE
 	$(call if_changed,gate)
 # gate-data.o contains the gate DSO image as data in section .data.gate.
 # We must build gate.so before we can assemble it.
 # Note: kbuild does not track this dependency due to usage of .incbin
 $(obj)/gate-data.o: $(obj)/gate.so

arch/ia64/kernel/setup.c

Diff comments View file @ 3ed3bce

 /*
  * Architecture-specific setup.
  *
  * Copyright (C) 1998-2001, 2003-2004 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  *	Stephane Eranian <eranian@hpl.hp.com>
  * Copyright (C) 2000, 2004 Intel Corp
  * 	Rohit Seth <rohit.seth@intel.com>
  * 	Suresh Siddha <suresh.b.siddha@intel.com>
  * 	Gordon Jin <gordon.jin@intel.com>
  * Copyright (C) 1999 VA Linux Systems
  * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
  *
  * 12/26/04 S.Siddha, G.Jin, R.Seth
  *			Add multi-threading and multi-core detection
  * 11/12/01 D.Mosberger Convert get_cpuinfo() to seq_file based show_cpuinfo().
  * 04/04/00 D.Mosberger renamed cpu_initialized to cpu_online_map
  * 03/31/00 R.Seth	cpu_initialized and current->processor fixes
  * 02/04/00 D.Mosberger	some more get_cpuinfo fixes...
  * 02/01/00 R.Seth	fixed get_cpuinfo for SMP
  * 01/07/99 S.Eranian	added the support for command line argument
  * 06/24/99 W.Drummond	added boot_cpu_data.
  * 05/28/05 Z. Menyhart	Dynamic stride size for "flush_icache_range()"
  */
 #include <linux/config.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/acpi.h>
 #include <linux/bootmem.h>
 #include <linux/console.h>
 #include <linux/delay.h>
 #include <linux/kernel.h>
 #include <linux/reboot.h>
 #include <linux/sched.h>
 #include <linux/seq_file.h>
 #include <linux/string.h>
 #include <linux/threads.h>
 #include <linux/tty.h>
+#include <linux/dmi.h>
 #include <linux/serial.h>
 #include <linux/serial_core.h>
 #include <linux/efi.h>
 #include <linux/initrd.h>
 #include <linux/pm.h>
 #include <linux/cpufreq.h>
 #include <asm/ia32.h>
 #include <asm/machvec.h>
 #include <asm/mca.h>
 #include <asm/meminit.h>
 #include <asm/page.h>
 #include <asm/patch.h>
 #include <asm/pgtable.h>
 #include <asm/processor.h>
 #include <asm/sal.h>
 #include <asm/sections.h>
 #include <asm/serial.h>
 #include <asm/setup.h>
 #include <asm/smp.h>
 #include <asm/system.h>
 #include <asm/unistd.h>
 #include <asm/system.h>
 #if defined(CONFIG_SMP) && (IA64_CPU_SIZE > PAGE_SIZE)
 # error "struct cpuinfo_ia64 too big!"
 #endif
 #ifdef CONFIG_SMP
 unsigned long __per_cpu_offset[NR_CPUS];
 EXPORT_SYMBOL(__per_cpu_offset);
 #endif
 extern void ia64_setup_printk_clock(void);
 DEFINE_PER_CPU(struct cpuinfo_ia64, cpu_info);
 DEFINE_PER_CPU(unsigned long, local_per_cpu_offset);
 DEFINE_PER_CPU(unsigned long, ia64_phys_stacked_size_p8);
 unsigned long ia64_cycles_per_usec;
 struct ia64_boot_param *ia64_boot_param;
 struct screen_info screen_info;
 unsigned long vga_console_iobase;
 unsigned long vga_console_membase;
 static struct resource data_resource = {
 	.name	= "Kernel data",
 	.flags	= IORESOURCE_BUSY | IORESOURCE_MEM
 };
 static struct resource code_resource = {
 	.name	= "Kernel code",
 	.flags	= IORESOURCE_BUSY | IORESOURCE_MEM
 };
 extern void efi_initialize_iomem_resources(struct resource *,
 		struct resource *);
 extern char _text[], _end[], _etext[];
 unsigned long ia64_max_cacheline_size;
 int dma_get_cache_alignment(void)
 {
         return ia64_max_cacheline_size;
 }
 EXPORT_SYMBOL(dma_get_cache_alignment);
 unsigned long ia64_iobase;	/* virtual address for I/O accesses */
 EXPORT_SYMBOL(ia64_iobase);
 struct io_space io_space[MAX_IO_SPACES];
 EXPORT_SYMBOL(io_space);
 unsigned int num_io_spaces;
 /*
  * "flush_icache_range()" needs to know what processor dependent stride size to use
  * when it makes i-cache(s) coherent with d-caches.
  */
 #define	I_CACHE_STRIDE_SHIFT	5	/* Safest way to go: 32 bytes by 32 bytes */
 unsigned long ia64_i_cache_stride_shift = ~0;
 /*
  * The merge_mask variable needs to be set to (max(iommu_page_size(iommu)) - 1).  This
  * mask specifies a mask of address bits that must be 0 in order for two buffers to be
  * mergeable by the I/O MMU (i.e., the end address of the first buffer and the start
  * address of the second buffer must be aligned to (merge_mask+1) in order to be
  * mergeable).  By default, we assume there is no I/O MMU which can merge physically
  * discontiguous buffers, so we set the merge_mask to ~0UL, which corresponds to a iommu
  * page-size of 2^64.
  */
 unsigned long ia64_max_iommu_merge_mask = ~0UL;
 EXPORT_SYMBOL(ia64_max_iommu_merge_mask);
 /*
  * We use a special marker for the end of memory and it uses the extra (+1) slot
  */
 struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1] __initdata;
 int num_rsvd_regions __initdata;
 /*
  * Filter incoming memory segments based on the primitive map created from the boot
  * parameters. Segments contained in the map are removed from the memory ranges. A
  * caller-specified function is called with the memory ranges that remain after filtering.
  * This routine does not assume the incoming segments are sorted.
  */
 int __init
 filter_rsvd_memory (unsigned long start, unsigned long end, void *arg)
 {
 	unsigned long range_start, range_end, prev_start;
 	void (*func)(unsigned long, unsigned long, int);
 	int i;
 #if IGNORE_PFN0
 	if (start == PAGE_OFFSET) {
 		printk(KERN_WARNING "warning: skipping physical page 0\n");
 		start += PAGE_SIZE;
 		if (start >= end) return 0;
 	}
 #endif
 	/*
 	 * lowest possible address(walker uses virtual)
 	 */
 	prev_start = PAGE_OFFSET;
 	func = arg;
 	for (i = 0; i < num_rsvd_regions; ++i) {
 		range_start = max(start, prev_start);
 		range_end   = min(end, rsvd_region[i].start);
 		if (range_start < range_end)
 			call_pernode_memory(__pa(range_start), range_end - range_start, func);
 		/* nothing more available in this segment */
 		if (range_end == end) return 0;
 		prev_start = rsvd_region[i].end;
 	}
 	/* end of memory marker allows full processing inside loop body */
 	return 0;
 }
 static void __init
 sort_regions (struct rsvd_region *rsvd_region, int max)
 {
 	int j;
 	/* simple bubble sorting */
 	while (max--) {
 		for (j = 0; j < max; ++j) {
 			if (rsvd_region[j].start > rsvd_region[j+1].start) {
 				struct rsvd_region tmp;
 				tmp = rsvd_region[j];
 				rsvd_region[j] = rsvd_region[j + 1];
 				rsvd_region[j + 1] = tmp;
 			}
 		}
 	}
 }
 /*
  * Request address space for all standard resources
  */
 static int __init register_memory(void)
 {
 	code_resource.start = ia64_tpa(_text);
 	code_resource.end   = ia64_tpa(_etext) - 1;
 	data_resource.start = ia64_tpa(_etext);
 	data_resource.end   = ia64_tpa(_end) - 1;
 	efi_initialize_iomem_resources(&code_resource, &data_resource);
 	return 0;
 }
 __initcall(register_memory);
 /**
  * reserve_memory - setup reserved memory areas
  *
  * Setup the reserved memory areas set aside for the boot parameters,
  * initrd, etc.  There are currently %IA64_MAX_RSVD_REGIONS defined,
  * see include/asm-ia64/meminit.h if you need to define more.
  */
 void __init
 reserve_memory (void)
 {
 	int n = 0;
 	/*
 	 * none of the entries in this table overlap
 	 */
 	rsvd_region[n].start = (unsigned long) ia64_boot_param;
 	rsvd_region[n].end   = rsvd_region[n].start + sizeof(*ia64_boot_param);
 	n++;
 	rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->efi_memmap);
 	rsvd_region[n].end   = rsvd_region[n].start + ia64_boot_param->efi_memmap_size;
 	n++;
 	rsvd_region[n].start = (unsigned long) __va(ia64_boot_param->command_line);
 	rsvd_region[n].end   = (rsvd_region[n].start
 				+ strlen(__va(ia64_boot_param->command_line)) + 1);
 	n++;
 	rsvd_region[n].start = (unsigned long) ia64_imva((void *)KERNEL_START);
 	rsvd_region[n].end   = (unsigned long) ia64_imva(_end);
 	n++;
 #ifdef CONFIG_BLK_DEV_INITRD
 	if (ia64_boot_param->initrd_start) {
 		rsvd_region[n].start = (unsigned long)__va(ia64_boot_param->initrd_start);
 		rsvd_region[n].end   = rsvd_region[n].start + ia64_boot_param->initrd_size;
 		n++;
 	}
 #endif
 	efi_memmap_init(&rsvd_region[n].start, &rsvd_region[n].end);
 	n++;
 	/* end of memory marker */
 	rsvd_region[n].start = ~0UL;
 	rsvd_region[n].end   = ~0UL;
 	n++;
 	num_rsvd_regions = n;
 	sort_regions(rsvd_region, num_rsvd_regions);
 }
 /**
  * find_initrd - get initrd parameters from the boot parameter structure
  *
  * Grab the initrd start and end from the boot parameter struct given us by
  * the boot loader.
  */
 void __init
 find_initrd (void)
 {
 #ifdef CONFIG_BLK_DEV_INITRD
 	if (ia64_boot_param->initrd_start) {
 		initrd_start = (unsigned long)__va(ia64_boot_param->initrd_start);
 		initrd_end   = initrd_start+ia64_boot_param->initrd_size;
 		printk(KERN_INFO "Initial ramdisk at: 0x%lx (%lu bytes)\n",
 		       initrd_start, ia64_boot_param->initrd_size);
 	}
 #endif
 }
 static void __init
 io_port_init (void)
 {
 	unsigned long phys_iobase;
 	/*
 	 * Set `iobase' based on the EFI memory map or, failing that, the
 	 * value firmware left in ar.k0.
 	 *
 	 * Note that in ia32 mode, IN/OUT instructions use ar.k0 to compute
 	 * the port's virtual address, so ia32_load_state() loads it with a
 	 * user virtual address.  But in ia64 mode, glibc uses the
 	 * *physical* address in ar.k0 to mmap the appropriate area from
 	 * /dev/mem, and the inX()/outX() interfaces use MMIO.  In both
 	 * cases, user-mode can only use the legacy 0-64K I/O port space.
 	 *
 	 * ar.k0 is not involved in kernel I/O port accesses, which can use
 	 * any of the I/O port spaces and are done via MMIO using the
 	 * virtual mmio_base from the appropriate io_space[].
 	 */
 	phys_iobase = efi_get_iobase();
 	if (!phys_iobase) {
 		phys_iobase = ia64_get_kr(IA64_KR_IO_BASE);
 		printk(KERN_INFO "No I/O port range found in EFI memory map, "
 			"falling back to AR.KR0 (0x%lx)\n", phys_iobase);
 	}
 	ia64_iobase = (unsigned long) ioremap(phys_iobase, 0);
 	ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
 	/* setup legacy IO port space */
 	io_space[0].mmio_base = ia64_iobase;
 	io_space[0].sparse = 1;
 	num_io_spaces = 1;
 }
 /**
  * early_console_setup - setup debugging console
  *
  * Consoles started here require little enough setup that we can start using
  * them very early in the boot process, either right after the machine
  * vector initialization, or even before if the drivers can detect their hw.
  *
  * Returns non-zero if a console couldn't be setup.
  */
 static inline int __init
 early_console_setup (char *cmdline)
 {
 	int earlycons = 0;
 #ifdef CONFIG_SERIAL_SGI_L1_CONSOLE
 	{
 		extern int sn_serial_console_early_setup(void);
 		if (!sn_serial_console_early_setup())
 			earlycons++;
 	}
 #endif
 #ifdef CONFIG_EFI_PCDP
 	if (!efi_setup_pcdp_console(cmdline))
 		earlycons++;
 #endif
 #ifdef CONFIG_SERIAL_8250_CONSOLE
 	if (!early_serial_console_init(cmdline))
 		earlycons++;
 #endif
 	return (earlycons) ? 0 : -1;
 }
 static inline void
 mark_bsp_online (void)
 {
 #ifdef CONFIG_SMP
 	/* If we register an early console, allow CPU 0 to printk */
 	cpu_set(smp_processor_id(), cpu_online_map);
 #endif
 }
 #ifdef CONFIG_SMP
 static void __init
 check_for_logical_procs (void)
 {
 	pal_logical_to_physical_t info;
 	s64 status;
 	status = ia64_pal_logical_to_phys(0, &info);
 	if (status == -1) {
 		printk(KERN_INFO "No logical to physical processor mapping "
 		       "available\n");
 		return;
 	}
 	if (status) {
 		printk(KERN_ERR "ia64_pal_logical_to_phys failed with %ld\n",
 		       status);
 		return;
 	}
 	/*
 	 * Total number of siblings that BSP has.  Though not all of them
 	 * may have booted successfully. The correct number of siblings
 	 * booted is in info.overview_num_log.
 	 */
 	smp_num_siblings = info.overview_tpc;
 	smp_num_cpucores = info.overview_cpp;
 }
 #endif
 static __initdata int nomca;
 static __init int setup_nomca(char *s)
 {
 	nomca = 1;
 	return 0;
 }
 early_param("nomca", setup_nomca);
 void __init
 setup_arch (char **cmdline_p)
 {
 	unw_init();
 	ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
 	*cmdline_p = __va(ia64_boot_param->command_line);
 	strlcpy(saved_command_line, *cmdline_p, COMMAND_LINE_SIZE);
 	efi_init();
 	io_port_init();
 	parse_early_param();
 #ifdef CONFIG_IA64_GENERIC
 	machvec_init(NULL);
 #endif
 	if (early_console_setup(*cmdline_p) == 0)
 		mark_bsp_online();
 #ifdef CONFIG_ACPI
 	/* Initialize the ACPI boot-time table parser */
 	acpi_table_init();
 # ifdef CONFIG_ACPI_NUMA
 	acpi_numa_init();
 # endif
 #else
 # ifdef CONFIG_SMP
 	smp_build_cpu_map();	/* happens, e.g., with the Ski simulator */
 # endif
 #endif /* CONFIG_APCI_BOOT */
 	find_memory();
 	/* process SAL system table: */
 	ia64_sal_init(efi.sal_systab);
 	ia64_setup_printk_clock();
 #ifdef CONFIG_SMP
 	cpu_physical_id(0) = hard_smp_processor_id();
 	cpu_set(0, cpu_sibling_map[0]);
 	cpu_set(0, cpu_core_map[0]);
 	check_for_logical_procs();
 	if (smp_num_cpucores > 1)
 		printk(KERN_INFO
 		       "cpu package is Multi-Core capable: number of cores=%d\n",
 		       smp_num_cpucores);
 	if (smp_num_siblings > 1)
 		printk(KERN_INFO
 		       "cpu package is Multi-Threading capable: number of siblings=%d\n",
 		       smp_num_siblings);
 #endif
 	cpu_init();	/* initialize the bootstrap CPU */
 	mmu_context_init();	/* initialize context_id bitmap */
 #ifdef CONFIG_ACPI
 	acpi_boot_init();
 #endif
 #ifdef CONFIG_VT
 	if (!conswitchp) {
 # if defined(CONFIG_DUMMY_CONSOLE)
 		conswitchp = &dummy_con;
 # endif
 # if defined(CONFIG_VGA_CONSOLE)
 		/*
 		 * Non-legacy systems may route legacy VGA MMIO range to system
 		 * memory.  vga_con probes the MMIO hole, so memory looks like
 		 * a VGA device to it.  The EFI memory map can tell us if it's
 		 * memory so we can avoid this problem.
 		 */
 		if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
 			conswitchp = &vga_con;
 # endif
 	}
 #endif
 	/* enable IA-64 Machine Check Abort Handling unless disabled */
 	if (!nomca)
 		ia64_mca_init();
 	platform_setup(cmdline_p);
 	paging_init();
 }
 /*
  * Display cpu info for all cpu's.
  */
 static int
 show_cpuinfo (struct seq_file *m, void *v)
 {
 #ifdef CONFIG_SMP
 #	define lpj	c->loops_per_jiffy
 #	define cpunum	c->cpu
 #else
 #	define lpj	loops_per_jiffy
 #	define cpunum	0
 #endif
 	static struct {
 		unsigned long mask;
 		const char *feature_name;
 	} feature_bits[] = {
 		{ 1UL << 0, "branchlong" },
 		{ 1UL << 1, "spontaneous deferral"},
 		{ 1UL << 2, "16-byte atomic ops" }
 	};
 	char family[32], features[128], *cp, sep;
 	struct cpuinfo_ia64 *c = v;
 	unsigned long mask;
 	unsigned long proc_freq;
 	int i;
 	mask = c->features;
 	switch (c->family) {
 	      case 0x07:	memcpy(family, "Itanium", 8); break;
 	      case 0x1f:	memcpy(family, "Itanium 2", 10); break;
 	      default:		sprintf(family, "%u", c->family); break;
 	}
 	/* build the feature string: */
 	memcpy(features, " standard", 10);
 	cp = features;
 	sep = 0;
 	for (i = 0; i < (int) ARRAY_SIZE(feature_bits); ++i) {
 		if (mask & feature_bits[i].mask) {
 			if (sep)
 				*cp++ = sep;
 			sep = ',';
 			*cp++ = ' ';
 			strcpy(cp, feature_bits[i].feature_name);
 			cp += strlen(feature_bits[i].feature_name);
 			mask &= ~feature_bits[i].mask;
 		}
 	}
 	if (mask) {
 		/* print unknown features as a hex value: */
 		if (sep)
 			*cp++ = sep;
 		sprintf(cp, " 0x%lx", mask);
 	}
 	proc_freq = cpufreq_quick_get(cpunum);
 	if (!proc_freq)
 		proc_freq = c->proc_freq / 1000;
 	seq_printf(m,
 		   "processor  : %d\n"
 		   "vendor     : %s\n"
 		   "arch       : IA-64\n"
 		   "family     : %s\n"
 		   "model      : %u\n"
 		   "revision   : %u\n"
 		   "archrev    : %u\n"
 		   "features   :%s\n"	/* don't change this---it _is_ right! */
 		   "cpu number : %lu\n"
 		   "cpu regs   : %u\n"
 		   "cpu MHz    : %lu.%06lu\n"
 		   "itc MHz    : %lu.%06lu\n"
 		   "BogoMIPS   : %lu.%02lu\n",
 		   cpunum, c->vendor, family, c->model, c->revision, c->archrev,
 		   features, c->ppn, c->number,
 		   proc_freq / 1000, proc_freq % 1000,
 		   c->itc_freq / 1000000, c->itc_freq % 1000000,
 		   lpj*HZ/500000, (lpj*HZ/5000) % 100);
 #ifdef CONFIG_SMP
 	seq_printf(m, "siblings   : %u\n", cpus_weight(cpu_core_map[cpunum]));
 	if (c->threads_per_core > 1 || c->cores_per_socket > 1)
 		seq_printf(m,
 		   	   "physical id: %u\n"
 		   	   "core id    : %u\n"
 		   	   "thread id  : %u\n",
 		   	   c->socket_id, c->core_id, c->thread_id);
 #endif
 	seq_printf(m,"\n");
 	return 0;
 }
 static void *
 c_start (struct seq_file *m, loff_t *pos)
 {
 #ifdef CONFIG_SMP
 	while (*pos < NR_CPUS && !cpu_isset(*pos, cpu_online_map))
 		++*pos;
 #endif
 	return *pos < NR_CPUS ? cpu_data(*pos) : NULL;
 }
 static void *
 c_next (struct seq_file *m, void *v, loff_t *pos)
 {
 	++*pos;
 	return c_start(m, pos);
 }
 static void
 c_stop (struct seq_file *m, void *v)
 {
 }
 struct seq_operations cpuinfo_op = {
 	.start =	c_start,
 	.next =		c_next,
 	.stop =		c_stop,
 	.show =		show_cpuinfo
 };
 static void __cpuinit
 identify_cpu (struct cpuinfo_ia64 *c)
 {
 	union {
 		unsigned long bits[5];
 		struct {
 			/* id 0 & 1: */
 			char vendor[16];
 			/* id 2 */
 			u64 ppn;		/* processor serial number */
 			/* id 3: */
 			unsigned number		:  8;
 			unsigned revision	:  8;
 			unsigned model		:  8;
 			unsigned family		:  8;
 			unsigned archrev	:  8;
 			unsigned reserved	: 24;
 			/* id 4: */
 			u64 features;
 		} field;
 	} cpuid;
 	pal_vm_info_1_u_t vm1;
 	pal_vm_info_2_u_t vm2;
 	pal_status_t status;
 	unsigned long impl_va_msb = 50, phys_addr_size = 44;	/* Itanium defaults */
 	int i;
 	for (i = 0; i < 5; ++i)
 		cpuid.bits[i] = ia64_get_cpuid(i);
 	memcpy(c->vendor, cpuid.field.vendor, 16);
 #ifdef CONFIG_SMP
 	c->cpu = smp_processor_id();
 	/* below default values will be overwritten  by identify_siblings()
 	 * for Multi-Threading/Multi-Core capable cpu's
 	 */
 	c->threads_per_core = c->cores_per_socket = c->num_log = 1;
 	c->socket_id = -1;
 	identify_siblings(c);
 #endif
 	c->ppn = cpuid.field.ppn;
 	c->number = cpuid.field.number;
 	c->revision = cpuid.field.revision;
 	c->model = cpuid.field.model;
 	c->family = cpuid.field.family;
 	c->archrev = cpuid.field.archrev;
 	c->features = cpuid.field.features;
 	status = ia64_pal_vm_summary(&vm1, &vm2);
 	if (status == PAL_STATUS_SUCCESS) {
 		impl_va_msb = vm2.pal_vm_info_2_s.impl_va_msb;
 		phys_addr_size = vm1.pal_vm_info_1_s.phys_add_size;
 	}
 	c->unimpl_va_mask = ~((7L<<61) | ((1L << (impl_va_msb + 1)) - 1));
 	c->unimpl_pa_mask = ~((1L<<63) | ((1L << phys_addr_size) - 1));
 }
 void
 setup_per_cpu_areas (void)
 {
 	/* start_kernel() requires this... */
 #ifdef CONFIG_ACPI_HOTPLUG_CPU
 	prefill_possible_map();
 #endif
 }
 /*
  * Calculate the max. cache line size.
  *
  * In addition, the minimum of the i-cache stride sizes is calculated for
  * "flush_icache_range()".
  */
 static void __cpuinit
 get_max_cacheline_size (void)
 {
 	unsigned long line_size, max = 1;
 	unsigned int cache_size = 0;
 	u64 l, levels, unique_caches;
         pal_cache_config_info_t cci;
         s64 status;
         status = ia64_pal_cache_summary(&levels, &unique_caches);
         if (status != 0) {
                 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n",
                        __FUNCTION__, status);
                 max = SMP_CACHE_BYTES;
 		/* Safest setup for "flush_icache_range()" */
 		ia64_i_cache_stride_shift = I_CACHE_STRIDE_SHIFT;
 		goto out;
         }
 	for (l = 0; l < levels; ++l) {
 		status = ia64_pal_cache_config_info(l, /* cache_type (data_or_unified)= */ 2,
 						    &cci);
 		if (status != 0) {
 			printk(KERN_ERR
 			       "%s: ia64_pal_cache_config_info(l=%lu, 2) failed (status=%ld)\n",
 			       __FUNCTION__, l, status);
 			max = SMP_CACHE_BYTES;
 			/* The safest setup for "flush_icache_range()" */
 			cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
 			cci.pcci_unified = 1;
 		}
 		line_size = 1 << cci.pcci_line_size;
 		if (line_size > max)
 			max = line_size;
 		if (cache_size < cci.pcci_cache_size)
 			cache_size = cci.pcci_cache_size;
 		if (!cci.pcci_unified) {
 			status = ia64_pal_cache_config_info(l,
 						    /* cache_type (instruction)= */ 1,
 						    &cci);
 			if (status != 0) {
 				printk(KERN_ERR
 				"%s: ia64_pal_cache_config_info(l=%lu, 1) failed (status=%ld)\n",
 					__FUNCTION__, l, status);
 				/* The safest setup for "flush_icache_range()" */
 				cci.pcci_stride = I_CACHE_STRIDE_SHIFT;
 			}
 		}
 		if (cci.pcci_stride < ia64_i_cache_stride_shift)
 			ia64_i_cache_stride_shift = cci.pcci_stride;
 	}
   out:
 #ifdef CONFIG_SMP
 	max_cache_size = max(max_cache_size, cache_size);
 #endif
 	if (max > ia64_max_cacheline_size)
 		ia64_max_cacheline_size = max;
 }
 /*
  * cpu_init() initializes state that is per-CPU.  This function acts
  * as a 'CPU state barrier', nothing should get across.
  */
 void __cpuinit
 cpu_init (void)
 {
 	extern void __cpuinit ia64_mmu_init (void *);
 	unsigned long num_phys_stacked;
 	pal_vm_info_2_u_t vmi;
 	unsigned int max_ctx;
 	struct cpuinfo_ia64 *cpu_info;
 	void *cpu_data;
 	cpu_data = per_cpu_init();
 	/*
 	 * We set ar.k3 so that assembly code in MCA handler can compute
 	 * physical addresses of per cpu variables with a simple:
 	 *   phys = ar.k3 + &per_cpu_var
 	 */
 	ia64_set_kr(IA64_KR_PER_CPU_DATA,
 		    ia64_tpa(cpu_data) - (long) __per_cpu_start);
 	get_max_cacheline_size();
 	/*
 	 * We can't pass "local_cpu_data" to identify_cpu() because we haven't called
 	 * ia64_mmu_init() yet.  And we can't call ia64_mmu_init() first because it
 	 * depends on the data returned by identify_cpu().  We break the dependency by
 	 * accessing cpu_data() through the canonical per-CPU address.
 	 */
 	cpu_info = cpu_data + ((char *) &__ia64_per_cpu_var(cpu_info) - __per_cpu_start);
 	identify_cpu(cpu_info);
 #ifdef CONFIG_MCKINLEY
 	{
 #		define FEATURE_SET 16
 		struct ia64_pal_retval iprv;
 		if (cpu_info->family == 0x1f) {
 			PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, FEATURE_SET, 0);
 			if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80))
 				PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES,
 				              (iprv.v1 | 0x80), FEATURE_SET, 0);
 		}
 	}
 #endif
 	/* Clear the stack memory reserved for pt_regs: */
 	memset(task_pt_regs(current), 0, sizeof(struct pt_regs));
 	ia64_set_kr(IA64_KR_FPU_OWNER, 0);
 	/*
 	 * Initialize the page-table base register to a global
 	 * directory with all zeroes.  This ensure that we can handle
 	 * TLB-misses to user address-space even before we created the
 	 * first user address-space.  This may happen, e.g., due to
 	 * aggressive use of lfetch.fault.
 	 */
 	ia64_set_kr(IA64_KR_PT_BASE, __pa(ia64_imva(empty_zero_page)));
 	/*
 	 * Initialize default control register to defer speculative faults except
 	 * for those arising from TLB misses, which are not deferred.  The
 	 * kernel MUST NOT depend on a particular setting of these bits (in other words,
 	 * the kernel must have recovery code for all speculative accesses).  Turn on
 	 * dcr.lc as per recommendation by the architecture team.  Most IA-32 apps
 	 * shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll
 	 * be fine).
 	 */
 	ia64_setreg(_IA64_REG_CR_DCR,  (  IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR
 					| IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
 	atomic_inc(&init_mm.mm_count);
 	current->active_mm = &init_mm;
 	if (current->mm)
 		BUG();
 	ia64_mmu_init(ia64_imva(cpu_data));
 	ia64_mca_cpu_init(ia64_imva(cpu_data));
 #ifdef CONFIG_IA32_SUPPORT
 	ia32_cpu_init();
 #endif
 	/* Clear ITC to eliminiate sched_clock() overflows in human time.  */
 	ia64_set_itc(0);
 	/* disable all local interrupt sources: */
 	ia64_set_itv(1 << 16);
 	ia64_set_lrr0(1 << 16);
 	ia64_set_lrr1(1 << 16);
 	ia64_setreg(_IA64_REG_CR_PMV, 1 << 16);
 	ia64_setreg(_IA64_REG_CR_CMCV, 1 << 16);
 	/* clear TPR & XTP to enable all interrupt classes: */
 	ia64_setreg(_IA64_REG_CR_TPR, 0);
 #ifdef CONFIG_SMP
 	normal_xtp();
 #endif
 	/* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
 	if (ia64_pal_vm_summary(NULL, &vmi) == 0)
 		max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
 	else {
 		printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
 		max_ctx = (1U << 15) - 1;	/* use architected minimum */
 	}
 	while (max_ctx < ia64_ctx.max_ctx) {
 		unsigned int old = ia64_ctx.max_ctx;
 		if (cmpxchg(&ia64_ctx.max_ctx, old, max_ctx) == old)
 			break;
 	}
 	if (ia64_pal_rse_info(&num_phys_stacked, NULL) != 0) {
 		printk(KERN_WARNING "cpu_init: PAL RSE info failed; assuming 96 physical "
 		       "stacked regs\n");
 		num_phys_stacked = 96;
 	}
 	/* size of physical stacked register partition plus 8 bytes: */
 	__get_cpu_var(ia64_phys_stacked_size_p8) = num_phys_stacked*8 + 8;
 	platform_cpu_init();
 	pm_idle = default_idle;
 }
 /*
  * On SMP systems, when the scheduler does migration-cost autodetection,
  * it needs a way to flush as much of the CPU's caches as possible.
  */
 void sched_cacheflush(void)
 {
 	ia64_sal_cache_flush(3);
 }
 void __init
 check_bugs (void)
 {
 	ia64_patch_mckinley_e9((unsigned long) __start___mckinley_e9_bundles,
 			       (unsigned long) __end___mckinley_e9_bundles);
 }
+static int __init run_dmi_scan(void)
+{
+	dmi_scan_machine();
+	return 0;
+}
+core_initcall(run_dmi_scan);

include/asm-ia64/dmi.h

Diff comments View file @ 3ed3bce

File was created	1	#ifndef _ASM_DMI_H
	2	#define _ASM_DMI_H 1
	3
	4	#include <asm/io.h>
	5
	6	#endif
	7

include/asm-ia64/io.h

Diff comments View file @ 3ed3bce

 #ifndef _ASM_IA64_IO_H
 #define _ASM_IA64_IO_H
 /*
  * This file contains the definitions for the emulated IO instructions
  * inb/inw/inl/outb/outw/outl and the "string versions" of the same
  * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
  * versions of the single-IO instructions (inb_p/inw_p/..).
  *
  * This file is not meant to be obfuscating: it's just complicated to
  * (a) handle it all in a way that makes gcc able to optimize it as
  * well as possible and (b) trying to avoid writing the same thing
  * over and over again with slight variations and possibly making a
  * mistake somewhere.
  *
  * Copyright (C) 1998-2003 Hewlett-Packard Co
  *	David Mosberger-Tang <davidm@hpl.hp.com>
  * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
  * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
  */
 /* We don't use IO slowdowns on the ia64, but.. */
 #define __SLOW_DOWN_IO	do { } while (0)
 #define SLOW_DOWN_IO	do { } while (0)
 #define __IA64_UNCACHED_OFFSET	RGN_BASE(RGN_UNCACHED)
 /*
  * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but
  * large machines may have multiple other I/O spaces so we can't place any a priori limit
  * on IO_SPACE_LIMIT.  These additional spaces are described in ACPI.
  */
 #define IO_SPACE_LIMIT		0xffffffffffffffffUL
 #define MAX_IO_SPACES_BITS		4
 #define MAX_IO_SPACES			(1UL << MAX_IO_SPACES_BITS)
 #define IO_SPACE_BITS			24
 #define IO_SPACE_SIZE			(1UL << IO_SPACE_BITS)
 #define IO_SPACE_NR(port)		((port) >> IO_SPACE_BITS)
 #define IO_SPACE_BASE(space)		((space) << IO_SPACE_BITS)
 #define IO_SPACE_PORT(port)		((port) & (IO_SPACE_SIZE - 1))
 #define IO_SPACE_SPARSE_ENCODING(p)	((((p) >> 2) << 12) | ((p) & 0xfff))
 struct io_space {
 	unsigned long mmio_base;	/* base in MMIO space */
 	int sparse;
 };
 extern struct io_space io_space[];
 extern unsigned int num_io_spaces;
 # ifdef __KERNEL__
 /*
  * All MMIO iomem cookies are in region 6; anything less is a PIO cookie:
  *	0xCxxxxxxxxxxxxxxx	MMIO cookie (return from ioremap)
  *	0x000000001SPPPPPP	PIO cookie (S=space number, P..P=port)
  *
  * ioread/writeX() uses the leading 1 in PIO cookies (PIO_OFFSET) to catch
  * code that uses bare port numbers without the prerequisite pci_iomap().
  */
 #define PIO_OFFSET		(1UL << (MAX_IO_SPACES_BITS + IO_SPACE_BITS))
 #define PIO_MASK		(PIO_OFFSET - 1)
 #define PIO_RESERVED		__IA64_UNCACHED_OFFSET
 #define HAVE_ARCH_PIO_SIZE
 #include <asm/intrinsics.h>
 #include <asm/machvec.h>
 #include <asm/page.h>
 #include <asm/system.h>
 #include <asm-generic/iomap.h>
 /*
  * Change virtual addresses to physical addresses and vv.
  */
 static inline unsigned long
 virt_to_phys (volatile void *address)
 {
 	return (unsigned long) address - PAGE_OFFSET;
 }
 static inline void*
 phys_to_virt (unsigned long address)
 {
 	return (void *) (address + PAGE_OFFSET);
 }
 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE
 extern int valid_phys_addr_range (unsigned long addr, size_t *count); /* efi.c */
 extern int valid_mmap_phys_addr_range (unsigned long addr, size_t *count);
 /*
  * The following two macros are deprecated and scheduled for removal.
  * Please use the PCI-DMA interface defined in <asm/pci.h> instead.
  */
 #define bus_to_virt	phys_to_virt
 #define virt_to_bus	virt_to_phys
 #define page_to_bus	page_to_phys
 # endif /* KERNEL */
 /*
  * Memory fence w/accept.  This should never be used in code that is
  * not IA-64 specific.
  */
 #define __ia64_mf_a()	ia64_mfa()
 /**
  * ___ia64_mmiowb - I/O write barrier
  *
  * Ensure ordering of I/O space writes.  This will make sure that writes
  * following the barrier will arrive after all previous writes.  For most
  * ia64 platforms, this is a simple 'mf.a' instruction.
  *
  * See Documentation/DocBook/deviceiobook.tmpl for more information.
  */
 static inline void ___ia64_mmiowb(void)
 {
 	ia64_mfa();
 }
 static inline void*
 __ia64_mk_io_addr (unsigned long port)
 {
 	struct io_space *space;
 	unsigned long offset;
 	space = &io_space[IO_SPACE_NR(port)];
 	port = IO_SPACE_PORT(port);
 	if (space->sparse)
 		offset = IO_SPACE_SPARSE_ENCODING(port);
 	else
 		offset = port;
 	return (void *) (space->mmio_base | offset);
 }
 #define __ia64_inb	___ia64_inb
 #define __ia64_inw	___ia64_inw
 #define __ia64_inl	___ia64_inl
 #define __ia64_outb	___ia64_outb
 #define __ia64_outw	___ia64_outw
 #define __ia64_outl	___ia64_outl
 #define __ia64_readb	___ia64_readb
 #define __ia64_readw	___ia64_readw
 #define __ia64_readl	___ia64_readl
 #define __ia64_readq	___ia64_readq
 #define __ia64_readb_relaxed	___ia64_readb
 #define __ia64_readw_relaxed	___ia64_readw
 #define __ia64_readl_relaxed	___ia64_readl
 #define __ia64_readq_relaxed	___ia64_readq
 #define __ia64_writeb	___ia64_writeb
 #define __ia64_writew	___ia64_writew
 #define __ia64_writel	___ia64_writel
 #define __ia64_writeq	___ia64_writeq
 #define __ia64_mmiowb	___ia64_mmiowb
 /*
  * For the in/out routines, we need to do "mf.a" _after_ doing the I/O access to ensure
  * that the access has completed before executing other I/O accesses.  Since we're doing
  * the accesses through an uncachable (UC) translation, the CPU will execute them in
  * program order.  However, we still need to tell the compiler not to shuffle them around
  * during optimization, which is why we use "volatile" pointers.
  */
 static inline unsigned int
 ___ia64_inb (unsigned long port)
 {
 	volatile unsigned char *addr = __ia64_mk_io_addr(port);
 	unsigned char ret;
 	ret = *addr;
 	__ia64_mf_a();
 	return ret;
 }
 static inline unsigned int
 ___ia64_inw (unsigned long port)
 {
 	volatile unsigned short *addr = __ia64_mk_io_addr(port);
 	unsigned short ret;
 	ret = *addr;
 	__ia64_mf_a();
 	return ret;
 }
 static inline unsigned int
 ___ia64_inl (unsigned long port)
 {
 	volatile unsigned int *addr = __ia64_mk_io_addr(port);
 	unsigned int ret;
 	ret = *addr;
 	__ia64_mf_a();
 	return ret;
 }
 static inline void
 ___ia64_outb (unsigned char val, unsigned long port)
 {
 	volatile unsigned char *addr = __ia64_mk_io_addr(port);
 	*addr = val;
 	__ia64_mf_a();
 }
 static inline void
 ___ia64_outw (unsigned short val, unsigned long port)
 {
 	volatile unsigned short *addr = __ia64_mk_io_addr(port);
 	*addr = val;
 	__ia64_mf_a();
 }
 static inline void
 ___ia64_outl (unsigned int val, unsigned long port)
 {
 	volatile unsigned int *addr = __ia64_mk_io_addr(port);
 	*addr = val;
 	__ia64_mf_a();
 }
 static inline void
 __insb (unsigned long port, void *dst, unsigned long count)
 {
 	unsigned char *dp = dst;
 	while (count--)
 		*dp++ = platform_inb(port);
 }
 static inline void
 __insw (unsigned long port, void *dst, unsigned long count)
 {
 	unsigned short *dp = dst;
 	while (count--)
 		*dp++ = platform_inw(port);
 }
 static inline void
 __insl (unsigned long port, void *dst, unsigned long count)
 {
 	unsigned int *dp = dst;
 	while (count--)
 		*dp++ = platform_inl(port);
 }
 static inline void
 __outsb (unsigned long port, const void *src, unsigned long count)
 {
 	const unsigned char *sp = src;
 	while (count--)
 		platform_outb(*sp++, port);
 }
 static inline void
 __outsw (unsigned long port, const void *src, unsigned long count)
 {
 	const unsigned short *sp = src;
 	while (count--)
 		platform_outw(*sp++, port);
 }
 static inline void
 __outsl (unsigned long port, const void *src, unsigned long count)
 {
 	const unsigned int *sp = src;
 	while (count--)
 		platform_outl(*sp++, port);
 }
 /*
  * Unfortunately, some platforms are broken and do not follow the IA-64 architecture
  * specification regarding legacy I/O support.  Thus, we have to make these operations
  * platform dependent...
  */
 #define __inb		platform_inb
 #define __inw		platform_inw
 #define __inl		platform_inl
 #define __outb		platform_outb
 #define __outw		platform_outw
 #define __outl		platform_outl
 #define __mmiowb	platform_mmiowb
 #define inb(p)		__inb(p)
 #define inw(p)		__inw(p)
 #define inl(p)		__inl(p)
 #define insb(p,d,c)	__insb(p,d,c)
 #define insw(p,d,c)	__insw(p,d,c)
 #define insl(p,d,c)	__insl(p,d,c)
 #define outb(v,p)	__outb(v,p)
 #define outw(v,p)	__outw(v,p)
 #define outl(v,p)	__outl(v,p)
 #define outsb(p,s,c)	__outsb(p,s,c)
 #define outsw(p,s,c)	__outsw(p,s,c)
 #define outsl(p,s,c)	__outsl(p,s,c)
 #define mmiowb()	__mmiowb()
 /*
  * The address passed to these functions are ioremap()ped already.
  *
  * We need these to be machine vectors since some platforms don't provide
  * DMA coherence via PIO reads (PCI drivers and the spec imply that this is
  * a good idea).  Writes are ok though for all existing ia64 platforms (and
  * hopefully it'll stay that way).
  */
 static inline unsigned char
 ___ia64_readb (const volatile void __iomem *addr)
 {
 	return *(volatile unsigned char __force *)addr;
 }
 static inline unsigned short
 ___ia64_readw (const volatile void __iomem *addr)
 {
 	return *(volatile unsigned short __force *)addr;
 }
 static inline unsigned int
 ___ia64_readl (const volatile void __iomem *addr)
 {
 	return *(volatile unsigned int __force *) addr;
 }
 static inline unsigned long
 ___ia64_readq (const volatile void __iomem *addr)
 {
 	return *(volatile unsigned long __force *) addr;
 }
 static inline void
 __writeb (unsigned char val, volatile void __iomem *addr)
 {
 	*(volatile unsigned char __force *) addr = val;
 }
 static inline void
 __writew (unsigned short val, volatile void __iomem *addr)
 {
 	*(volatile unsigned short __force *) addr = val;
 }
 static inline void
 __writel (unsigned int val, volatile void __iomem *addr)
 {
 	*(volatile unsigned int __force *) addr = val;
 }
 static inline void
 __writeq (unsigned long val, volatile void __iomem *addr)
 {
 	*(volatile unsigned long __force *) addr = val;
 }
 #define __readb		platform_readb
 #define __readw		platform_readw
 #define __readl		platform_readl
 #define __readq		platform_readq
 #define __readb_relaxed	platform_readb_relaxed
 #define __readw_relaxed	platform_readw_relaxed
 #define __readl_relaxed	platform_readl_relaxed
 #define __readq_relaxed	platform_readq_relaxed
 #define readb(a)	__readb((a))
 #define readw(a)	__readw((a))
 #define readl(a)	__readl((a))
 #define readq(a)	__readq((a))
 #define readb_relaxed(a)	__readb_relaxed((a))
 #define readw_relaxed(a)	__readw_relaxed((a))
 #define readl_relaxed(a)	__readl_relaxed((a))
 #define readq_relaxed(a)	__readq_relaxed((a))
 #define __raw_readb	readb
 #define __raw_readw	readw
 #define __raw_readl	readl
 #define __raw_readq	readq
 #define __raw_readb_relaxed	readb_relaxed
 #define __raw_readw_relaxed	readw_relaxed
 #define __raw_readl_relaxed	readl_relaxed
 #define __raw_readq_relaxed	readq_relaxed
 #define writeb(v,a)	__writeb((v), (a))
 #define writew(v,a)	__writew((v), (a))
 #define writel(v,a)	__writel((v), (a))
 #define writeq(v,a)	__writeq((v), (a))
 #define __raw_writeb	writeb
 #define __raw_writew	writew
 #define __raw_writel	writel
 #define __raw_writeq	writeq
 #ifndef inb_p
 # define inb_p		inb
 #endif
 #ifndef inw_p
 # define inw_p		inw
 #endif
 #ifndef inl_p
 # define inl_p		inl
 #endif
 #ifndef outb_p
 # define outb_p		outb
 #endif
 #ifndef outw_p
 # define outw_p		outw
 #endif
 #ifndef outl_p
 # define outl_p		outl
 #endif
 /*
  * An "address" in IO memory space is not clearly either an integer or a pointer. We will
  * accept both, thus the casts.
  *
  * On ia-64, we access the physical I/O memory space through the uncached kernel region.
  */
 static inline void __iomem *
 ioremap (unsigned long offset, unsigned long size)
 {
 	return (void __iomem *) (__IA64_UNCACHED_OFFSET | (offset));
 }
 static inline void
 iounmap (volatile void __iomem *addr)
 {
 }
 #define ioremap_nocache(o,s)	ioremap(o,s)
+/* Use normal IO mappings for DMI */
+#define dmi_ioremap ioremap
+#define dmi_iounmap(x,l) iounmap(x)
+#define dmi_alloc(l) kmalloc(l, GFP_ATOMIC)
 # ifdef __KERNEL__
 /*
  * String version of IO memory access ops:
  */
 extern void memcpy_fromio(void *dst, const volatile void __iomem *src, long n);
 extern void memcpy_toio(volatile void __iomem *dst, const void *src, long n);
 extern void memset_io(volatile void __iomem *s, int c, long n);
 #define dma_cache_inv(_start,_size)             do { } while (0)
 #define dma_cache_wback(_start,_size)           do { } while (0)
 #define dma_cache_wback_inv(_start,_size)       do { } while (0)
 # endif /* __KERNEL__ */
 /*
  * Enabling BIO_VMERGE_BOUNDARY forces us to turn off I/O MMU bypassing.  It is said that
  * BIO-level virtual merging can give up to 4% performance boost (not verified for ia64).
  * On the other hand, we know that I/O MMU bypassing gives ~8% performance improvement on
  * SPECweb-like workloads on zx1-based machines.  Thus, for now we favor I/O MMU bypassing
  * over BIO-level virtual merging.
  */
 extern unsigned long ia64_max_iommu_merge_mask;
 #if 1
 #define BIO_VMERGE_BOUNDARY	0
 #else
 /*
  * It makes no sense at all to have this BIO_VMERGE_BOUNDARY macro here.  Should be
  * replaced by dma_merge_mask() or something of that sort.  Note: the only way
  * BIO_VMERGE_BOUNDARY is used is to mask off bits.  Effectively, our definition gets
  * expanded into:
  *
  *	addr & ((ia64_max_iommu_merge_mask + 1) - 1) == (addr & ia64_max_iommu_vmerge_mask)
  *
  * which is precisely what we want.
  */
 #define BIO_VMERGE_BOUNDARY	(ia64_max_iommu_merge_mask + 1)
 #endif
 #endif /* _ASM_IA64_IO_H */