Commit 45b301d2b188af6db332cbb14c36e20b5204223e

Authored by Axel Lin
Committed by Thierry Reding
1 parent 261995dd30

pwm: Convert pwm-pxa to use devm_* APIs

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>

Showing 1 changed file with 10 additions and 39 deletions Inline Diff

drivers/pwm/pwm-pxa.c
1 /* 1 /*
2 * linux/arch/arm/mach-pxa/pwm.c 2 * drivers/pwm/pwm-pxa.c
3 * 3 *
4 * simple driver for PWM (Pulse Width Modulator) controller 4 * simple driver for PWM (Pulse Width Modulator) controller
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 * 9 *
10 * 2008-02-13 initial version 10 * 2008-02-13 initial version
11 * eric miao <eric.miao@marvell.com> 11 * eric miao <eric.miao@marvell.com>
12 */ 12 */
13 13
14 #include <linux/module.h> 14 #include <linux/module.h>
15 #include <linux/kernel.h> 15 #include <linux/kernel.h>
16 #include <linux/platform_device.h> 16 #include <linux/platform_device.h>
17 #include <linux/slab.h> 17 #include <linux/slab.h>
18 #include <linux/err.h> 18 #include <linux/err.h>
19 #include <linux/clk.h> 19 #include <linux/clk.h>
20 #include <linux/io.h> 20 #include <linux/io.h>
21 #include <linux/pwm.h> 21 #include <linux/pwm.h>
22 22
23 #include <asm/div64.h> 23 #include <asm/div64.h>
24 24
25 #define HAS_SECONDARY_PWM 0x10 25 #define HAS_SECONDARY_PWM 0x10
26 #define PWM_ID_BASE(d) ((d) & 0xf) 26 #define PWM_ID_BASE(d) ((d) & 0xf)
27 27
28 static const struct platform_device_id pwm_id_table[] = { 28 static const struct platform_device_id pwm_id_table[] = {
29 /* PWM has_secondary_pwm? */ 29 /* PWM has_secondary_pwm? */
30 { "pxa25x-pwm", 0 }, 30 { "pxa25x-pwm", 0 },
31 { "pxa27x-pwm", 0 | HAS_SECONDARY_PWM }, 31 { "pxa27x-pwm", 0 | HAS_SECONDARY_PWM },
32 { "pxa168-pwm", 1 }, 32 { "pxa168-pwm", 1 },
33 { "pxa910-pwm", 1 }, 33 { "pxa910-pwm", 1 },
34 { }, 34 { },
35 }; 35 };
36 MODULE_DEVICE_TABLE(platform, pwm_id_table); 36 MODULE_DEVICE_TABLE(platform, pwm_id_table);
37 37
38 /* PWM registers and bits definitions */ 38 /* PWM registers and bits definitions */
39 #define PWMCR (0x00) 39 #define PWMCR (0x00)
40 #define PWMDCR (0x04) 40 #define PWMDCR (0x04)
41 #define PWMPCR (0x08) 41 #define PWMPCR (0x08)
42 42
43 #define PWMCR_SD (1 << 6) 43 #define PWMCR_SD (1 << 6)
44 #define PWMDCR_FD (1 << 10) 44 #define PWMDCR_FD (1 << 10)
45 45
46 struct pxa_pwm_chip { 46 struct pxa_pwm_chip {
47 struct pwm_chip chip; 47 struct pwm_chip chip;
48 struct device *dev; 48 struct device *dev;
49 49
50 struct clk *clk; 50 struct clk *clk;
51 int clk_enabled; 51 int clk_enabled;
52 void __iomem *mmio_base; 52 void __iomem *mmio_base;
53 }; 53 };
54 54
55 static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip) 55 static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip)
56 { 56 {
57 return container_of(chip, struct pxa_pwm_chip, chip); 57 return container_of(chip, struct pxa_pwm_chip, chip);
58 } 58 }
59 59
60 /* 60 /*
61 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE 61 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
62 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE 62 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
63 */ 63 */
64 static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 64 static int pxa_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
65 int duty_ns, int period_ns) 65 int duty_ns, int period_ns)
66 { 66 {
67 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip); 67 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
68 unsigned long long c; 68 unsigned long long c;
69 unsigned long period_cycles, prescale, pv, dc; 69 unsigned long period_cycles, prescale, pv, dc;
70 unsigned long offset; 70 unsigned long offset;
71 int rc; 71 int rc;
72 72
73 if (period_ns == 0 || duty_ns > period_ns) 73 if (period_ns == 0 || duty_ns > period_ns)
74 return -EINVAL; 74 return -EINVAL;
75 75
76 offset = pwm->hwpwm ? 0x10 : 0; 76 offset = pwm->hwpwm ? 0x10 : 0;
77 77
78 c = clk_get_rate(pc->clk); 78 c = clk_get_rate(pc->clk);
79 c = c * period_ns; 79 c = c * period_ns;
80 do_div(c, 1000000000); 80 do_div(c, 1000000000);
81 period_cycles = c; 81 period_cycles = c;
82 82
83 if (period_cycles < 1) 83 if (period_cycles < 1)
84 period_cycles = 1; 84 period_cycles = 1;
85 prescale = (period_cycles - 1) / 1024; 85 prescale = (period_cycles - 1) / 1024;
86 pv = period_cycles / (prescale + 1) - 1; 86 pv = period_cycles / (prescale + 1) - 1;
87 87
88 if (prescale > 63) 88 if (prescale > 63)
89 return -EINVAL; 89 return -EINVAL;
90 90
91 if (duty_ns == period_ns) 91 if (duty_ns == period_ns)
92 dc = PWMDCR_FD; 92 dc = PWMDCR_FD;
93 else 93 else
94 dc = (pv + 1) * duty_ns / period_ns; 94 dc = (pv + 1) * duty_ns / period_ns;
95 95
96 /* NOTE: the clock to PWM has to be enabled first 96 /* NOTE: the clock to PWM has to be enabled first
97 * before writing to the registers 97 * before writing to the registers
98 */ 98 */
99 rc = clk_prepare_enable(pc->clk); 99 rc = clk_prepare_enable(pc->clk);
100 if (rc < 0) 100 if (rc < 0)
101 return rc; 101 return rc;
102 102
103 writel(prescale, pc->mmio_base + offset + PWMCR); 103 writel(prescale, pc->mmio_base + offset + PWMCR);
104 writel(dc, pc->mmio_base + offset + PWMDCR); 104 writel(dc, pc->mmio_base + offset + PWMDCR);
105 writel(pv, pc->mmio_base + offset + PWMPCR); 105 writel(pv, pc->mmio_base + offset + PWMPCR);
106 106
107 clk_disable_unprepare(pc->clk); 107 clk_disable_unprepare(pc->clk);
108 return 0; 108 return 0;
109 } 109 }
110 110
111 static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) 111 static int pxa_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
112 { 112 {
113 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip); 113 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
114 int rc = 0; 114 int rc = 0;
115 115
116 if (!pc->clk_enabled) { 116 if (!pc->clk_enabled) {
117 rc = clk_prepare_enable(pc->clk); 117 rc = clk_prepare_enable(pc->clk);
118 if (!rc) 118 if (!rc)
119 pc->clk_enabled++; 119 pc->clk_enabled++;
120 } 120 }
121 return rc; 121 return rc;
122 } 122 }
123 123
124 static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) 124 static void pxa_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
125 { 125 {
126 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip); 126 struct pxa_pwm_chip *pc = to_pxa_pwm_chip(chip);
127 127
128 if (pc->clk_enabled) { 128 if (pc->clk_enabled) {
129 clk_disable_unprepare(pc->clk); 129 clk_disable_unprepare(pc->clk);
130 pc->clk_enabled--; 130 pc->clk_enabled--;
131 } 131 }
132 } 132 }
133 133
134 static struct pwm_ops pxa_pwm_ops = { 134 static struct pwm_ops pxa_pwm_ops = {
135 .config = pxa_pwm_config, 135 .config = pxa_pwm_config,
136 .enable = pxa_pwm_enable, 136 .enable = pxa_pwm_enable,
137 .disable = pxa_pwm_disable, 137 .disable = pxa_pwm_disable,
138 .owner = THIS_MODULE, 138 .owner = THIS_MODULE,
139 }; 139 };
140 140
141 static int __devinit pwm_probe(struct platform_device *pdev) 141 static int __devinit pwm_probe(struct platform_device *pdev)
142 { 142 {
143 const struct platform_device_id *id = platform_get_device_id(pdev); 143 const struct platform_device_id *id = platform_get_device_id(pdev);
144 struct pxa_pwm_chip *pwm; 144 struct pxa_pwm_chip *pwm;
145 struct resource *r; 145 struct resource *r;
146 int ret = 0; 146 int ret = 0;
147 147
148 pwm = kzalloc(sizeof(*pwm), GFP_KERNEL); 148 pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
149 if (pwm == NULL) { 149 if (pwm == NULL) {
150 dev_err(&pdev->dev, "failed to allocate memory\n"); 150 dev_err(&pdev->dev, "failed to allocate memory\n");
151 return -ENOMEM; 151 return -ENOMEM;
152 } 152 }
153 153
154 pwm->clk = clk_get(&pdev->dev, NULL); 154 pwm->clk = devm_clk_get(&pdev->dev, NULL);
155 if (IS_ERR(pwm->clk)) { 155 if (IS_ERR(pwm->clk))
156 ret = PTR_ERR(pwm->clk); 156 return PTR_ERR(pwm->clk);
157 goto err_free; 157
158 }
159 pwm->clk_enabled = 0; 158 pwm->clk_enabled = 0;
160 159
161 pwm->chip.dev = &pdev->dev; 160 pwm->chip.dev = &pdev->dev;
162 pwm->chip.ops = &pxa_pwm_ops; 161 pwm->chip.ops = &pxa_pwm_ops;
163 pwm->chip.base = -1; 162 pwm->chip.base = -1;
164 pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1; 163 pwm->chip.npwm = (id->driver_data & HAS_SECONDARY_PWM) ? 2 : 1;
165 164
166 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 165 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
167 if (r == NULL) { 166 if (r == NULL) {
168 dev_err(&pdev->dev, "no memory resource defined\n"); 167 dev_err(&pdev->dev, "no memory resource defined\n");
169 ret = -ENODEV; 168 return -ENODEV;
170 goto err_free_clk;
171 } 169 }
172 170
173 r = request_mem_region(r->start, resource_size(r), pdev->name); 171 pwm->mmio_base = devm_request_and_ioremap(&pdev->dev, r);
174 if (r == NULL) { 172 if (pwm->mmio_base == NULL)
175 dev_err(&pdev->dev, "failed to request memory resource\n"); 173 return -EADDRNOTAVAIL;
176 ret = -EBUSY;
177 goto err_free_clk;
178 }
179 174
180 pwm->mmio_base = ioremap(r->start, resource_size(r));
181 if (pwm->mmio_base == NULL) {
182 dev_err(&pdev->dev, "failed to ioremap() registers\n");
183 ret = -ENODEV;
184 goto err_free_mem;
185 }
186
187 ret = pwmchip_add(&pwm->chip); 175 ret = pwmchip_add(&pwm->chip);
188 if (ret < 0) { 176 if (ret < 0) {
189 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret); 177 dev_err(&pdev->dev, "pwmchip_add() failed: %d\n", ret);
190 return ret; 178 return ret;
191 } 179 }
192 180
193 platform_set_drvdata(pdev, pwm); 181 platform_set_drvdata(pdev, pwm);
194 return 0; 182 return 0;
195
196 err_free_mem:
197 release_mem_region(r->start, resource_size(r));
198 err_free_clk:
199 clk_put(pwm->clk);
200 err_free:
201 kfree(pwm);
202 return ret;
203 } 183 }
204 184
205 static int __devexit pwm_remove(struct platform_device *pdev) 185 static int __devexit pwm_remove(struct platform_device *pdev)
206 { 186 {
207 struct pxa_pwm_chip *chip; 187 struct pxa_pwm_chip *chip;
208 struct resource *r;
209 188
210 chip = platform_get_drvdata(pdev); 189 chip = platform_get_drvdata(pdev);
211 if (chip == NULL) 190 if (chip == NULL)
212 return -ENODEV; 191 return -ENODEV;
213 192
214 pwmchip_remove(&chip->chip); 193 pwmchip_remove(&chip->chip);
215
216 iounmap(chip->mmio_base);
217
218 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
219 release_mem_region(r->start, resource_size(r));
220
221 clk_put(chip->clk);
222 kfree(chip);
223 return 0; 194 return 0;
224 } 195 }
225 196
226 static struct platform_driver pwm_driver = { 197 static struct platform_driver pwm_driver = {
227 .driver = { 198 .driver = {
228 .name = "pxa25x-pwm", 199 .name = "pxa25x-pwm",
229 .owner = THIS_MODULE, 200 .owner = THIS_MODULE,
230 }, 201 },
231 .probe = pwm_probe, 202 .probe = pwm_probe,
232 .remove = __devexit_p(pwm_remove), 203 .remove = __devexit_p(pwm_remove),
233 .id_table = pwm_id_table, 204 .id_table = pwm_id_table,
234 }; 205 };
235 206
236 static int __init pwm_init(void) 207 static int __init pwm_init(void)
237 { 208 {
238 return platform_driver_register(&pwm_driver); 209 return platform_driver_register(&pwm_driver);
239 } 210 }
240 arch_initcall(pwm_init); 211 arch_initcall(pwm_init);
241 212
242 static void __exit pwm_exit(void) 213 static void __exit pwm_exit(void)
243 { 214 {
244 platform_driver_unregister(&pwm_driver); 215 platform_driver_unregister(&pwm_driver);
245 } 216 }
246 module_exit(pwm_exit); 217 module_exit(pwm_exit);
247 218
248 MODULE_LICENSE("GPL v2"); 219 MODULE_LICENSE("GPL v2");
249 220