Doug / smarc-fsl-linux-kernel

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/*

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/*

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* Intel PXA25x and IXP4xx on-chip full speed USB device controllers

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* Intel PXA25x and IXP4xx on-chip full speed USB device controllers

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*

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*

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*

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*

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* This program is free software; you can redistribute it and/or modify

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* This program is free software; you can redistribute it and/or modify

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* it under the terms of the GNU General Public License as published by

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* it under the terms of the GNU General Public License as published by

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* the Free Software Foundation; either version 2 of the License, or

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* the Free Software Foundation; either version 2 of the License, or

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* (at your option) any later version.

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* (at your option) any later version.

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*/

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*/

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/* #define VERBOSE_DEBUG */

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/* #define VERBOSE_DEBUG */

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#include <linux/device.h>

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#include <linux/device.h>

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#include <linux/module.h>

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#include <linux/module.h>

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#include <linux/kernel.h>

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#include <linux/kernel.h>

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#include <linux/ioport.h>

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#include <linux/ioport.h>

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#include <linux/types.h>

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#include <linux/types.h>

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#include <linux/errno.h>

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#include <linux/errno.h>

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#include <linux/err.h>

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#include <linux/err.h>

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#include <linux/delay.h>

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#include <linux/delay.h>

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#include <linux/slab.h>

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#include <linux/slab.h>

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#include <linux/init.h>

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#include <linux/init.h>

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#include <linux/timer.h>

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#include <linux/timer.h>

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#include <linux/list.h>

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#include <linux/list.h>

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#include <linux/interrupt.h>

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#include <linux/interrupt.h>

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#include <linux/mm.h>

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#include <linux/mm.h>

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#include <linux/platform_data/pxa2xx_udc.h>

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#include <linux/platform_device.h>

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#include <linux/platform_device.h>

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#include <linux/dma-mapping.h>

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#include <linux/dma-mapping.h>

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#include <linux/irq.h>

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#include <linux/irq.h>

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#include <linux/clk.h>

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#include <linux/clk.h>

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#include <linux/seq_file.h>

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#include <linux/seq_file.h>

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#include <linux/debugfs.h>

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#include <linux/debugfs.h>

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#include <linux/io.h>

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#include <linux/io.h>

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#include <linux/prefetch.h>

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#include <linux/prefetch.h>

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#include <asm/byteorder.h>

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#include <asm/byteorder.h>

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#include <asm/dma.h>

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#include <asm/dma.h>

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#include <asm/gpio.h>

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#include <asm/gpio.h>

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#include <asm/mach-types.h>

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#include <asm/mach-types.h>

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#include <asm/unaligned.h>

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#include <asm/unaligned.h>

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#include <linux/usb/ch9.h>

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#include <linux/usb/ch9.h>

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#include <linux/usb/gadget.h>

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#include <linux/usb/gadget.h>

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#include <linux/usb/otg.h>

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#include <linux/usb/otg.h>

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/*

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/*

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* This driver is PXA25x only. Grab the right register definitions.

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* This driver is PXA25x only. Grab the right register definitions.

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*/

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*/

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#ifdef CONFIG_ARCH_PXA

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#ifdef CONFIG_ARCH_PXA

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#include <mach/pxa25x-udc.h>

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#include <mach/pxa25x-udc.h>

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#endif

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#endif

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#ifdef CONFIG_ARCH_LUBBOCK

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#ifdef CONFIG_ARCH_LUBBOCK

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#include <mach/lubbock.h>

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#include <mach/lubbock.h>

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#endif

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#endif

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#include <asm/mach/udc_pxa2xx.h>

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/*

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/*

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* This driver handles the USB Device Controller (UDC) in Intel's PXA 25x

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* This driver handles the USB Device Controller (UDC) in Intel's PXA 25x

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* series processors. The UDC for the IXP 4xx series is very similar.

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* series processors. The UDC for the IXP 4xx series is very similar.

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* There are fifteen endpoints, in addition to ep0.

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* There are fifteen endpoints, in addition to ep0.

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*

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*

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* Such controller drivers work with a gadget driver. The gadget driver

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* Such controller drivers work with a gadget driver. The gadget driver

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* returns descriptors, implements configuration and data protocols used

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* returns descriptors, implements configuration and data protocols used

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* by the host to interact with this device, and allocates endpoints to

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* by the host to interact with this device, and allocates endpoints to

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* the different protocol interfaces. The controller driver virtualizes

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* the different protocol interfaces. The controller driver virtualizes

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* usb hardware so that the gadget drivers will be more portable.

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* usb hardware so that the gadget drivers will be more portable.

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*

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*

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* This UDC hardware wants to implement a bit too much USB protocol, so

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* This UDC hardware wants to implement a bit too much USB protocol, so

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* it constrains the sorts of USB configuration change events that work.

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* it constrains the sorts of USB configuration change events that work.

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* The errata for these chips are misleading; some "fixed" bugs from

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* The errata for these chips are misleading; some "fixed" bugs from

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* pxa250 a0/a1 b0/b1/b2 sure act like they're still there.

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* pxa250 a0/a1 b0/b1/b2 sure act like they're still there.

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*

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*

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* Note that the UDC hardware supports DMA (except on IXP) but that's

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* Note that the UDC hardware supports DMA (except on IXP) but that's

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* not used here. IN-DMA (to host) is simple enough, when the data is

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* not used here. IN-DMA (to host) is simple enough, when the data is

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* suitably aligned (16 bytes) ... the network stack doesn't do that,

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* suitably aligned (16 bytes) ... the network stack doesn't do that,

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* other software can. OUT-DMA is buggy in most chip versions, as well

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* other software can. OUT-DMA is buggy in most chip versions, as well

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* as poorly designed (data toggle not automatic). So this driver won't

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* as poorly designed (data toggle not automatic). So this driver won't

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* bother using DMA. (Mostly-working IN-DMA support was available in

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* bother using DMA. (Mostly-working IN-DMA support was available in

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* kernels before 2.6.23, but was never enabled or well tested.)

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* kernels before 2.6.23, but was never enabled or well tested.)

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*/

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*/

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#define DRIVER_VERSION "30-June-2007"

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#define DRIVER_VERSION "30-June-2007"

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#define DRIVER_DESC "PXA 25x USB Device Controller driver"

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#define DRIVER_DESC "PXA 25x USB Device Controller driver"

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static const char driver_name [] = "pxa25x_udc";

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static const char driver_name [] = "pxa25x_udc";

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static const char ep0name [] = "ep0";

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static const char ep0name [] = "ep0";

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#ifdef CONFIG_ARCH_IXP4XX

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#ifdef CONFIG_ARCH_IXP4XX

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/* cpu-specific register addresses are compiled in to this code */

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/* cpu-specific register addresses are compiled in to this code */

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#ifdef CONFIG_ARCH_PXA

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#ifdef CONFIG_ARCH_PXA

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#error "Can't configure both IXP and PXA"

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#error "Can't configure both IXP and PXA"

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#endif

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#endif

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/* IXP doesn't yet support <linux/clk.h> */

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/* IXP doesn't yet support <linux/clk.h> */

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#define clk_get(dev,name) NULL

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#define clk_get(dev,name) NULL

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#define clk_enable(clk) do { } while (0)

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#define clk_enable(clk) do { } while (0)

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#define clk_disable(clk) do { } while (0)

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#define clk_disable(clk) do { } while (0)

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#define clk_put(clk) do { } while (0)

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#define clk_put(clk) do { } while (0)

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#endif

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#endif

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#include "pxa25x_udc.h"

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#include "pxa25x_udc.h"

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#ifdef CONFIG_USB_PXA25X_SMALL

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#ifdef CONFIG_USB_PXA25X_SMALL

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#define SIZE_STR " (small)"

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#define SIZE_STR " (small)"

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#else

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#else

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#define SIZE_STR ""

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#define SIZE_STR ""

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#endif

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#endif

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/* ---------------------------------------------------------------------------

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/* ---------------------------------------------------------------------------

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* endpoint related parts of the api to the usb controller hardware,

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* endpoint related parts of the api to the usb controller hardware,

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* used by gadget driver; and the inner talker-to-hardware core.

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* used by gadget driver; and the inner talker-to-hardware core.

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* ---------------------------------------------------------------------------

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* ---------------------------------------------------------------------------

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*/

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*/

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static void pxa25x_ep_fifo_flush (struct usb_ep *ep);

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static void pxa25x_ep_fifo_flush (struct usb_ep *ep);

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static void nuke (struct pxa25x_ep *, int status);

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static void nuke (struct pxa25x_ep *, int status);

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/* one GPIO should control a D+ pullup, so host sees this device (or not) */

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/* one GPIO should control a D+ pullup, so host sees this device (or not) */

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static void pullup_off(void)

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static void pullup_off(void)

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{

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{

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struct pxa2xx_udc_mach_info *mach = the_controller->mach;

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struct pxa2xx_udc_mach_info *mach = the_controller->mach;

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int off_level = mach->gpio_pullup_inverted;

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int off_level = mach->gpio_pullup_inverted;

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if (gpio_is_valid(mach->gpio_pullup))

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if (gpio_is_valid(mach->gpio_pullup))

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gpio_set_value(mach->gpio_pullup, off_level);

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gpio_set_value(mach->gpio_pullup, off_level);

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else if (mach->udc_command)

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else if (mach->udc_command)

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mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);

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mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);

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}

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}

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static void pullup_on(void)

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static void pullup_on(void)

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{

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{

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struct pxa2xx_udc_mach_info *mach = the_controller->mach;

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struct pxa2xx_udc_mach_info *mach = the_controller->mach;

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int on_level = !mach->gpio_pullup_inverted;

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int on_level = !mach->gpio_pullup_inverted;

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if (gpio_is_valid(mach->gpio_pullup))

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if (gpio_is_valid(mach->gpio_pullup))

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gpio_set_value(mach->gpio_pullup, on_level);

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gpio_set_value(mach->gpio_pullup, on_level);

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else if (mach->udc_command)

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else if (mach->udc_command)

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mach->udc_command(PXA2XX_UDC_CMD_CONNECT);

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mach->udc_command(PXA2XX_UDC_CMD_CONNECT);

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}

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}

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static void pio_irq_enable(int bEndpointAddress)

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static void pio_irq_enable(int bEndpointAddress)

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{

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{

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bEndpointAddress &= 0xf;

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bEndpointAddress &= 0xf;

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if (bEndpointAddress < 8)

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if (bEndpointAddress < 8)

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UICR0 &= ~(1 << bEndpointAddress);

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UICR0 &= ~(1 << bEndpointAddress);

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else {

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else {

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bEndpointAddress -= 8;

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bEndpointAddress -= 8;

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UICR1 &= ~(1 << bEndpointAddress);

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UICR1 &= ~(1 << bEndpointAddress);

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}

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}

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}

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}

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static void pio_irq_disable(int bEndpointAddress)

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static void pio_irq_disable(int bEndpointAddress)

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{

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{

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bEndpointAddress &= 0xf;

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bEndpointAddress &= 0xf;

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if (bEndpointAddress < 8)

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if (bEndpointAddress < 8)

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UICR0 |= 1 << bEndpointAddress;

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UICR0 |= 1 << bEndpointAddress;

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else {

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else {

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bEndpointAddress -= 8;

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bEndpointAddress -= 8;

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UICR1 |= 1 << bEndpointAddress;

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UICR1 |= 1 << bEndpointAddress;

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}

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}

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}

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}

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/* The UDCCR reg contains mask and interrupt status bits,

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/* The UDCCR reg contains mask and interrupt status bits,

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* so using '|=' isn't safe as it may ack an interrupt.

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* so using '|=' isn't safe as it may ack an interrupt.

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*/

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*/

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#define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)

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#define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)

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static inline void udc_set_mask_UDCCR(int mask)

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static inline void udc_set_mask_UDCCR(int mask)

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{

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{

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UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);

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UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);

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}

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}

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static inline void udc_clear_mask_UDCCR(int mask)

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static inline void udc_clear_mask_UDCCR(int mask)

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{

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{

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UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);

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UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);

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}

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}

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static inline void udc_ack_int_UDCCR(int mask)

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static inline void udc_ack_int_UDCCR(int mask)

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{

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{

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/* udccr contains the bits we dont want to change */

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/* udccr contains the bits we dont want to change */

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__u32 udccr = UDCCR & UDCCR_MASK_BITS;

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__u32 udccr = UDCCR & UDCCR_MASK_BITS;

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UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);

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UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);

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}

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}

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/*

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/*

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* endpoint enable/disable

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* endpoint enable/disable

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*

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*

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* we need to verify the descriptors used to enable endpoints. since pxa25x

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* we need to verify the descriptors used to enable endpoints. since pxa25x

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* endpoint configurations are fixed, and are pretty much always enabled,

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* endpoint configurations are fixed, and are pretty much always enabled,

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* there's not a lot to manage here.

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* there's not a lot to manage here.

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*

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*

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* because pxa25x can't selectively initialize bulk (or interrupt) endpoints,

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* because pxa25x can't selectively initialize bulk (or interrupt) endpoints,

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* (resetting endpoint halt and toggle), SET_INTERFACE is unusable except

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* (resetting endpoint halt and toggle), SET_INTERFACE is unusable except

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* for a single interface (with only the default altsetting) and for gadget

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* for a single interface (with only the default altsetting) and for gadget

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* drivers that don't halt endpoints (not reset by set_interface). that also

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* drivers that don't halt endpoints (not reset by set_interface). that also

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* means that if you use ISO, you must violate the USB spec rule that all

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* means that if you use ISO, you must violate the USB spec rule that all

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* iso endpoints must be in non-default altsettings.

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* iso endpoints must be in non-default altsettings.

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*/

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*/

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static int pxa25x_ep_enable (struct usb_ep *_ep,

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static int pxa25x_ep_enable (struct usb_ep *_ep,

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const struct usb_endpoint_descriptor *desc)

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const struct usb_endpoint_descriptor *desc)

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{

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{

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struct pxa25x_ep *ep;

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struct pxa25x_ep *ep;

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struct pxa25x_udc *dev;

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struct pxa25x_udc *dev;

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ep = container_of (_ep, struct pxa25x_ep, ep);

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ep = container_of (_ep, struct pxa25x_ep, ep);

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if (!_ep || !desc || _ep->name == ep0name

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if (!_ep || !desc || _ep->name == ep0name

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|| desc->bDescriptorType != USB_DT_ENDPOINT

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|| desc->bDescriptorType != USB_DT_ENDPOINT

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|| ep->bEndpointAddress != desc->bEndpointAddress

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|| ep->bEndpointAddress != desc->bEndpointAddress

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|| ep->fifo_size < usb_endpoint_maxp (desc)) {

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|| ep->fifo_size < usb_endpoint_maxp (desc)) {

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DMSG("%s, bad ep or descriptor\n", __func__);

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DMSG("%s, bad ep or descriptor\n", __func__);

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return -EINVAL;

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return -EINVAL;

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}

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}

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/* xfer types must match, except that interrupt ~= bulk */

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/* xfer types must match, except that interrupt ~= bulk */

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if (ep->bmAttributes != desc->bmAttributes

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if (ep->bmAttributes != desc->bmAttributes

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&& ep->bmAttributes != USB_ENDPOINT_XFER_BULK

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&& ep->bmAttributes != USB_ENDPOINT_XFER_BULK

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&& desc->bmAttributes != USB_ENDPOINT_XFER_INT) {

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&& desc->bmAttributes != USB_ENDPOINT_XFER_INT) {

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DMSG("%s, %s type mismatch\n", __func__, _ep->name);

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DMSG("%s, %s type mismatch\n", __func__, _ep->name);

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return -EINVAL;

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return -EINVAL;

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}

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}

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/* hardware _could_ do smaller, but driver doesn't */

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/* hardware _could_ do smaller, but driver doesn't */

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if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK

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if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK

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&& usb_endpoint_maxp (desc)

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&& usb_endpoint_maxp (desc)

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!= BULK_FIFO_SIZE)

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!= BULK_FIFO_SIZE)

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|| !desc->wMaxPacketSize) {

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|| !desc->wMaxPacketSize) {

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DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);

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DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);

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return -ERANGE;

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return -ERANGE;

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}

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}

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dev = ep->dev;

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dev = ep->dev;

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if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {

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if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {

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DMSG("%s, bogus device state\n", __func__);

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DMSG("%s, bogus device state\n", __func__);

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return -ESHUTDOWN;

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return -ESHUTDOWN;

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}

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}

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ep->ep.desc = desc;

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ep->ep.desc = desc;

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ep->stopped = 0;

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ep->stopped = 0;

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ep->pio_irqs = 0;

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ep->pio_irqs = 0;

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ep->ep.maxpacket = usb_endpoint_maxp (desc);

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ep->ep.maxpacket = usb_endpoint_maxp (desc);

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/* flush fifo (mostly for OUT buffers) */

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/* flush fifo (mostly for OUT buffers) */

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pxa25x_ep_fifo_flush (_ep);

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pxa25x_ep_fifo_flush (_ep);

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/* ... reset halt state too, if we could ... */

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/* ... reset halt state too, if we could ... */

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DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);

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DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);

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return 0;

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return 0;

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}

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}

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static int pxa25x_ep_disable (struct usb_ep *_ep)

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static int pxa25x_ep_disable (struct usb_ep *_ep)

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{

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{

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struct pxa25x_ep *ep;

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struct pxa25x_ep *ep;

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unsigned long flags;

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unsigned long flags;

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ep = container_of (_ep, struct pxa25x_ep, ep);

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ep = container_of (_ep, struct pxa25x_ep, ep);

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if (!_ep || !ep->ep.desc) {

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if (!_ep || !ep->ep.desc) {

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DMSG("%s, %s not enabled\n", __func__,

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DMSG("%s, %s not enabled\n", __func__,

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_ep ? ep->ep.name : NULL);

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_ep ? ep->ep.name : NULL);

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return -EINVAL;

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return -EINVAL;

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}

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}

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local_irq_save(flags);

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local_irq_save(flags);

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nuke (ep, -ESHUTDOWN);

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nuke (ep, -ESHUTDOWN);

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/* flush fifo (mostly for IN buffers) */

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/* flush fifo (mostly for IN buffers) */

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pxa25x_ep_fifo_flush (_ep);

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pxa25x_ep_fifo_flush (_ep);

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ep->ep.desc = NULL;

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ep->ep.desc = NULL;

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ep->stopped = 1;

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ep->stopped = 1;

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local_irq_restore(flags);

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local_irq_restore(flags);

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DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);

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DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);

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return 0;

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return 0;

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}

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}

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/*-------------------------------------------------------------------------*/

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/*-------------------------------------------------------------------------*/

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/* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers

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/* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers

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* must still pass correctly initialized endpoints, since other controller

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* must still pass correctly initialized endpoints, since other controller

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* drivers may care about how it's currently set up (dma issues etc).

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* drivers may care about how it's currently set up (dma issues etc).

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*/

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*/

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/*

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/*

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* pxa25x_ep_alloc_request - allocate a request data structure

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* pxa25x_ep_alloc_request - allocate a request data structure

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*/

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*/

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static struct usb_request *

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static struct usb_request *

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pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)

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pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)

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{

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{

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struct pxa25x_request *req;

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struct pxa25x_request *req;

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req = kzalloc(sizeof(*req), gfp_flags);

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req = kzalloc(sizeof(*req), gfp_flags);

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if (!req)

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if (!req)

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return NULL;

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return NULL;

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INIT_LIST_HEAD (&req->queue);

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INIT_LIST_HEAD (&req->queue);

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return &req->req;

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return &req->req;

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}

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}

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/*

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/*

317

* pxa25x_ep_free_request - deallocate a request data structure

315

* pxa25x_ep_free_request - deallocate a request data structure

318

*/

316

*/

319

static void

317

static void

320

pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)

318

pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)

321

{

319

{

322

struct pxa25x_request *req;

320

struct pxa25x_request *req;

323

321

324

req = container_of (_req, struct pxa25x_request, req);

322

req = container_of (_req, struct pxa25x_request, req);

325

WARN_ON(!list_empty (&req->queue));

323

WARN_ON(!list_empty (&req->queue));

326

kfree(req);

324

kfree(req);

327

}

325

}

328

326

329

/*-------------------------------------------------------------------------*/

327

/*-------------------------------------------------------------------------*/

330

328

331

/*

329

/*

332

* done - retire a request; caller blocked irqs

330

* done - retire a request; caller blocked irqs

333

*/

331

*/

334

static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)

332

static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)

335

{

333

{

336

unsigned stopped = ep->stopped;

334

unsigned stopped = ep->stopped;

337

335

338

list_del_init(&req->queue);

336

list_del_init(&req->queue);

339

337

340

if (likely (req->req.status == -EINPROGRESS))

338

if (likely (req->req.status == -EINPROGRESS))

341

req->req.status = status;

339

req->req.status = status;

342

else

340

else

343

status = req->req.status;

341

status = req->req.status;

344

342

345

if (status && status != -ESHUTDOWN)

343

if (status && status != -ESHUTDOWN)

346

DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",

344

DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",

347

ep->ep.name, &req->req, status,

345

ep->ep.name, &req->req, status,

348

req->req.actual, req->req.length);

346

req->req.actual, req->req.length);

349

347

350

/* don't modify queue heads during completion callback */

348

/* don't modify queue heads during completion callback */

351

ep->stopped = 1;

349

ep->stopped = 1;

352

req->req.complete(&ep->ep, &req->req);

350

req->req.complete(&ep->ep, &req->req);

353

ep->stopped = stopped;

351

ep->stopped = stopped;

354

}

352

}

355

353

356

354

357

static inline void ep0_idle (struct pxa25x_udc *dev)

355

static inline void ep0_idle (struct pxa25x_udc *dev)

358

{

356

{

359

dev->ep0state = EP0_IDLE;

357

dev->ep0state = EP0_IDLE;

360

}

358

}

361

359

362

static int

360

static int

363

write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)

361

write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)

364

{

362

{

365

u8 *buf;

363

u8 *buf;

366

unsigned length, count;

364

unsigned length, count;

367

365

368

buf = req->req.buf + req->req.actual;

366

buf = req->req.buf + req->req.actual;

369

prefetch(buf);

367

prefetch(buf);

370

368

371

/* how big will this packet be? */

369

/* how big will this packet be? */

372

length = min(req->req.length - req->req.actual, max);

370

length = min(req->req.length - req->req.actual, max);

373

req->req.actual += length;

371

req->req.actual += length;

374

372

375

count = length;

373

count = length;

376

while (likely(count--))

374

while (likely(count--))

377

*uddr = *buf++;

375

*uddr = *buf++;

378

376

379

return length;

377

return length;

380

}

378

}

381

379

382

/*

380

/*

383

* write to an IN endpoint fifo, as many packets as possible.

381

* write to an IN endpoint fifo, as many packets as possible.

384

* irqs will use this to write the rest later.

382

* irqs will use this to write the rest later.

385

* caller guarantees at least one packet buffer is ready (or a zlp).

383

* caller guarantees at least one packet buffer is ready (or a zlp).

386

*/

384

*/

387

static int

385

static int

388

write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)

386

write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)

389

{

387

{

390

unsigned max;

388

unsigned max;

391

389

392

max = usb_endpoint_maxp(ep->ep.desc);

390

max = usb_endpoint_maxp(ep->ep.desc);

393

do {

391

do {

394

unsigned count;

392

unsigned count;

395

int is_last, is_short;

393

int is_last, is_short;

396

394

397

count = write_packet(ep->reg_uddr, req, max);

395

count = write_packet(ep->reg_uddr, req, max);

398

396

399

/* last packet is usually short (or a zlp) */

397

/* last packet is usually short (or a zlp) */

400

if (unlikely (count != max))

398

if (unlikely (count != max))

401

is_last = is_short = 1;

399

is_last = is_short = 1;

402

else {

400

else {

403

if (likely(req->req.length != req->req.actual)

401

if (likely(req->req.length != req->req.actual)

404

|| req->req.zero)

402

|| req->req.zero)

405

is_last = 0;

403

is_last = 0;

406

else

404

else

407

is_last = 1;

405

is_last = 1;

408

/* interrupt/iso maxpacket may not fill the fifo */

406

/* interrupt/iso maxpacket may not fill the fifo */

409

is_short = unlikely (max < ep->fifo_size);

407

is_short = unlikely (max < ep->fifo_size);

410

}

408

}

411

409

412

DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",

410

DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",

413

ep->ep.name, count,

411

ep->ep.name, count,

414

is_last ? "/L" : "", is_short ? "/S" : "",

412

is_last ? "/L" : "", is_short ? "/S" : "",

415

req->req.length - req->req.actual, req);

413

req->req.length - req->req.actual, req);

416

414

417

/* let loose that packet. maybe try writing another one,

415

/* let loose that packet. maybe try writing another one,

418

* double buffering might work. TSP, TPC, and TFS

416

* double buffering might work. TSP, TPC, and TFS

419

* bit values are the same for all normal IN endpoints.

417

* bit values are the same for all normal IN endpoints.

420

*/

418

*/

421

*ep->reg_udccs = UDCCS_BI_TPC;

419

*ep->reg_udccs = UDCCS_BI_TPC;

422

if (is_short)

420

if (is_short)

423

*ep->reg_udccs = UDCCS_BI_TSP;

421

*ep->reg_udccs = UDCCS_BI_TSP;

424

422

425

/* requests complete when all IN data is in the FIFO */

423

/* requests complete when all IN data is in the FIFO */

426

if (is_last) {

424

if (is_last) {

427

done (ep, req, 0);

425

done (ep, req, 0);

428

if (list_empty(&ep->queue))

426

if (list_empty(&ep->queue))

429

pio_irq_disable (ep->bEndpointAddress);

427

pio_irq_disable (ep->bEndpointAddress);

430

return 1;

428

return 1;

431

}

429

}

432

430

433

// TODO experiment: how robust can fifo mode tweaking be?

431

// TODO experiment: how robust can fifo mode tweaking be?

434

// double buffering is off in the default fifo mode, which

432

// double buffering is off in the default fifo mode, which

435

// prevents TFS from being set here.

433

// prevents TFS from being set here.

436

434

437

} while (*ep->reg_udccs & UDCCS_BI_TFS);

435

} while (*ep->reg_udccs & UDCCS_BI_TFS);

438

return 0;

436

return 0;

439

}

437

}

440

438

441

/* caller asserts req->pending (ep0 irq status nyet cleared); starts

439

/* caller asserts req->pending (ep0 irq status nyet cleared); starts

442

* ep0 data stage. these chips want very simple state transitions.

440

* ep0 data stage. these chips want very simple state transitions.

443

*/

441

*/

444

static inline

442

static inline

445

void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)

443

void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)

446

{

444

{

447

UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;

445

UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;

448

USIR0 = USIR0_IR0;

446

USIR0 = USIR0_IR0;

449

dev->req_pending = 0;

447

dev->req_pending = 0;

450

DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",

448

DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",

451

__func__, tag, UDCCS0, flags);

449

__func__, tag, UDCCS0, flags);

452

}

450

}

453

451

454

static int

452

static int

455

write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)

453

write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)

456

{

454

{

457

unsigned count;

455

unsigned count;

458

int is_short;

456

int is_short;

459

457

460

count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);

458

count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);

461

ep->dev->stats.write.bytes += count;

459

ep->dev->stats.write.bytes += count;

462

460

463

/* last packet "must be" short (or a zlp) */

461

/* last packet "must be" short (or a zlp) */

464

is_short = (count != EP0_FIFO_SIZE);

462

is_short = (count != EP0_FIFO_SIZE);

465

463

466

DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,

464

DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,

467

req->req.length - req->req.actual, req);

465

req->req.length - req->req.actual, req);

468

466

469

if (unlikely (is_short)) {

467

if (unlikely (is_short)) {

470

if (ep->dev->req_pending)

468

if (ep->dev->req_pending)

471

ep0start(ep->dev, UDCCS0_IPR, "short IN");

469

ep0start(ep->dev, UDCCS0_IPR, "short IN");

472

else

470

else

473

UDCCS0 = UDCCS0_IPR;

471

UDCCS0 = UDCCS0_IPR;

474

472

475

count = req->req.length;

473

count = req->req.length;

476

done (ep, req, 0);

474

done (ep, req, 0);

477

ep0_idle(ep->dev);

475

ep0_idle(ep->dev);

478

#ifndef CONFIG_ARCH_IXP4XX

476

#ifndef CONFIG_ARCH_IXP4XX

479

#if 1

477

#if 1

480

/* This seems to get rid of lost status irqs in some cases:

478

/* This seems to get rid of lost status irqs in some cases:

481

* host responds quickly, or next request involves config

479

* host responds quickly, or next request involves config

482

* change automagic, or should have been hidden, or ...

480

* change automagic, or should have been hidden, or ...

483

*

481

*

484

* FIXME get rid of all udelays possible...

482

* FIXME get rid of all udelays possible...

485

*/

483

*/

486

if (count >= EP0_FIFO_SIZE) {

484

if (count >= EP0_FIFO_SIZE) {

487

count = 100;

485

count = 100;

488

do {

486

do {

489

if ((UDCCS0 & UDCCS0_OPR) != 0) {

487

if ((UDCCS0 & UDCCS0_OPR) != 0) {

490

/* clear OPR, generate ack */

488

/* clear OPR, generate ack */

491

UDCCS0 = UDCCS0_OPR;

489

UDCCS0 = UDCCS0_OPR;

492

break;

490

break;

493

}

491

}

494

count--;

492

count--;

495

udelay(1);

493

udelay(1);

496

} while (count);

494

} while (count);

497

}

495

}

498

#endif

496

#endif

499

#endif

497

#endif

500

} else if (ep->dev->req_pending)

498

} else if (ep->dev->req_pending)

501

ep0start(ep->dev, 0, "IN");

499

ep0start(ep->dev, 0, "IN");

502

return is_short;

500

return is_short;

503

}

501

}

504

502

505

503

506

/*

504

/*

507

* read_fifo - unload packet(s) from the fifo we use for usb OUT

505

* read_fifo - unload packet(s) from the fifo we use for usb OUT

508

* transfers and put them into the request. caller should have made

506

* transfers and put them into the request. caller should have made

509

* sure there's at least one packet ready.

507

* sure there's at least one packet ready.

510

*

508

*

511

* returns true if the request completed because of short packet or the

509

* returns true if the request completed because of short packet or the

512

* request buffer having filled (and maybe overran till end-of-packet).

510

* request buffer having filled (and maybe overran till end-of-packet).

513

*/

511

*/

514

static int

512

static int

515

read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)

513

read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)

516

{

514

{

517

for (;;) {

515

for (;;) {

518

u32 udccs;

516

u32 udccs;

519

u8 *buf;

517

u8 *buf;

520

unsigned bufferspace, count, is_short;

518

unsigned bufferspace, count, is_short;

521

519

522

/* make sure there's a packet in the FIFO.

520

/* make sure there's a packet in the FIFO.

523

* UDCCS_{BO,IO}_RPC are all the same bit value.

521

* UDCCS_{BO,IO}_RPC are all the same bit value.

524

* UDCCS_{BO,IO}_RNE are all the same bit value.

522

* UDCCS_{BO,IO}_RNE are all the same bit value.

525

*/

523

*/

526

udccs = *ep->reg_udccs;

524

udccs = *ep->reg_udccs;

527

if (unlikely ((udccs & UDCCS_BO_RPC) == 0))

525

if (unlikely ((udccs & UDCCS_BO_RPC) == 0))

528

break;

526

break;

529

buf = req->req.buf + req->req.actual;

527

buf = req->req.buf + req->req.actual;

530

prefetchw(buf);

528

prefetchw(buf);

531

bufferspace = req->req.length - req->req.actual;

529

bufferspace = req->req.length - req->req.actual;

532

530

533

/* read all bytes from this packet */

531

/* read all bytes from this packet */

534

if (likely (udccs & UDCCS_BO_RNE)) {

532

if (likely (udccs & UDCCS_BO_RNE)) {

535

count = 1 + (0x0ff & *ep->reg_ubcr);

533

count = 1 + (0x0ff & *ep->reg_ubcr);

536

req->req.actual += min (count, bufferspace);

534

req->req.actual += min (count, bufferspace);

537

} else /* zlp */

535

} else /* zlp */

538

count = 0;

536

count = 0;

539

is_short = (count < ep->ep.maxpacket);

537

is_short = (count < ep->ep.maxpacket);

540

DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",

538

DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",

541

ep->ep.name, udccs, count,

539

ep->ep.name, udccs, count,

542

is_short ? "/S" : "",

540

is_short ? "/S" : "",

543

req, req->req.actual, req->req.length);

541

req, req->req.actual, req->req.length);

544

while (likely (count-- != 0)) {

542

while (likely (count-- != 0)) {

545

u8 byte = (u8) *ep->reg_uddr;

543

u8 byte = (u8) *ep->reg_uddr;

546

544

547

if (unlikely (bufferspace == 0)) {

545

if (unlikely (bufferspace == 0)) {

548

/* this happens when the driver's buffer

546

/* this happens when the driver's buffer

549

* is smaller than what the host sent.

547

* is smaller than what the host sent.

550

* discard the extra data.

548

* discard the extra data.

551

*/

549

*/

552

if (req->req.status != -EOVERFLOW)

550

if (req->req.status != -EOVERFLOW)

553

DMSG("%s overflow %d\n",

551

DMSG("%s overflow %d\n",

554

ep->ep.name, count);

552

ep->ep.name, count);

555

req->req.status = -EOVERFLOW;

553

req->req.status = -EOVERFLOW;

556

} else {

554

} else {

557

*buf++ = byte;

555

*buf++ = byte;

558

bufferspace--;

556

bufferspace--;

559

}

557

}

560

}

558

}

561

*ep->reg_udccs = UDCCS_BO_RPC;

559

*ep->reg_udccs = UDCCS_BO_RPC;

562

/* RPC/RSP/RNE could now reflect the other packet buffer */

560

/* RPC/RSP/RNE could now reflect the other packet buffer */

563

561

564

/* iso is one request per packet */

562

/* iso is one request per packet */

565

if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {

563

if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {

566

if (udccs & UDCCS_IO_ROF)

564

if (udccs & UDCCS_IO_ROF)

567

req->req.status = -EHOSTUNREACH;

565

req->req.status = -EHOSTUNREACH;

568

/* more like "is_done" */

566

/* more like "is_done" */

569

is_short = 1;

567

is_short = 1;

570

}

568

}

571

569

572

/* completion */

570

/* completion */

573

if (is_short || req->req.actual == req->req.length) {

571

if (is_short || req->req.actual == req->req.length) {

574

done (ep, req, 0);

572

done (ep, req, 0);

575

if (list_empty(&ep->queue))

573

if (list_empty(&ep->queue))

576

pio_irq_disable (ep->bEndpointAddress);

574

pio_irq_disable (ep->bEndpointAddress);

577

return 1;

575

return 1;

578

}

576

}

579

577

580

/* finished that packet. the next one may be waiting... */

578

/* finished that packet. the next one may be waiting... */

581

}

579

}

582

return 0;

580

return 0;

583

}

581

}

584

582

585

/*

583

/*

586

* special ep0 version of the above. no UBCR0 or double buffering; status

584

* special ep0 version of the above. no UBCR0 or double buffering; status

587

* handshaking is magic. most device protocols don't need control-OUT.

585

* handshaking is magic. most device protocols don't need control-OUT.

588

* CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other

586

* CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other

589

* protocols do use them.

587

* protocols do use them.

590

*/

588

*/

591

static int

589

static int

592

read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)

590

read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)

593

{

591

{

594

u8 *buf, byte;

592

u8 *buf, byte;

595

unsigned bufferspace;

593

unsigned bufferspace;

596

594

597

buf = req->req.buf + req->req.actual;

595

buf = req->req.buf + req->req.actual;

598

bufferspace = req->req.length - req->req.actual;

596

bufferspace = req->req.length - req->req.actual;

599

597

600

while (UDCCS0 & UDCCS0_RNE) {

598

while (UDCCS0 & UDCCS0_RNE) {

601

byte = (u8) UDDR0;

599

byte = (u8) UDDR0;

602

600

603

if (unlikely (bufferspace == 0)) {

601

if (unlikely (bufferspace == 0)) {

604

/* this happens when the driver's buffer

602

/* this happens when the driver's buffer

605

* is smaller than what the host sent.

603

* is smaller than what the host sent.

606

* discard the extra data.

604

* discard the extra data.

607

*/

605

*/

608

if (req->req.status != -EOVERFLOW)

606

if (req->req.status != -EOVERFLOW)

609

DMSG("%s overflow\n", ep->ep.name);

607

DMSG("%s overflow\n", ep->ep.name);

610

req->req.status = -EOVERFLOW;

608

req->req.status = -EOVERFLOW;

611

} else {

609

} else {

612

*buf++ = byte;

610

*buf++ = byte;

613

req->req.actual++;

611

req->req.actual++;

614

bufferspace--;

612

bufferspace--;

615

}

613

}

616

}

614

}

617

615

618

UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;

616

UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;

619

617

620

/* completion */

618

/* completion */

621

if (req->req.actual >= req->req.length)

619

if (req->req.actual >= req->req.length)

622

return 1;

620

return 1;

623

621

624

/* finished that packet. the next one may be waiting... */

622

/* finished that packet. the next one may be waiting... */

625

return 0;

623

return 0;

626

}

624

}

627

625

628

/*-------------------------------------------------------------------------*/

626

/*-------------------------------------------------------------------------*/

629

627

630

static int

628

static int

631

pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)

629

pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)

632

{

630

{

633

struct pxa25x_request *req;

631

struct pxa25x_request *req;

634

struct pxa25x_ep *ep;

632

struct pxa25x_ep *ep;

635

struct pxa25x_udc *dev;

633

struct pxa25x_udc *dev;

636

unsigned long flags;

634

unsigned long flags;

637

635

638

req = container_of(_req, struct pxa25x_request, req);

636

req = container_of(_req, struct pxa25x_request, req);

639

if (unlikely (!_req || !_req->complete || !_req->buf

637

if (unlikely (!_req || !_req->complete || !_req->buf

640

|| !list_empty(&req->queue))) {

638

|| !list_empty(&req->queue))) {

641

DMSG("%s, bad params\n", __func__);

639

DMSG("%s, bad params\n", __func__);

642

return -EINVAL;

640

return -EINVAL;

643

}

641

}

644

642

645

ep = container_of(_ep, struct pxa25x_ep, ep);

643

ep = container_of(_ep, struct pxa25x_ep, ep);

646

if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {

644

if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {

647

DMSG("%s, bad ep\n", __func__);

645

DMSG("%s, bad ep\n", __func__);

648

return -EINVAL;

646

return -EINVAL;

649

}

647

}

650

648

651

dev = ep->dev;

649

dev = ep->dev;

652

if (unlikely (!dev->driver

650

if (unlikely (!dev->driver

653

|| dev->gadget.speed == USB_SPEED_UNKNOWN)) {

651

|| dev->gadget.speed == USB_SPEED_UNKNOWN)) {

654

DMSG("%s, bogus device state\n", __func__);

652

DMSG("%s, bogus device state\n", __func__);

655

return -ESHUTDOWN;

653

return -ESHUTDOWN;

656

}

654

}

657

655

658

/* iso is always one packet per request, that's the only way

656

/* iso is always one packet per request, that's the only way

659

* we can report per-packet status. that also helps with dma.

657

* we can report per-packet status. that also helps with dma.

660

*/

658

*/

661

if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC

659

if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC

662

&& req->req.length > usb_endpoint_maxp(ep->ep.desc)))

660

&& req->req.length > usb_endpoint_maxp(ep->ep.desc)))

663

return -EMSGSIZE;

661

return -EMSGSIZE;

664

662

665

DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",

663

DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",

666

_ep->name, _req, _req->length, _req->buf);

664

_ep->name, _req, _req->length, _req->buf);

667

665

668

local_irq_save(flags);

666

local_irq_save(flags);

669

667

670

_req->status = -EINPROGRESS;

668

_req->status = -EINPROGRESS;

671

_req->actual = 0;

669

_req->actual = 0;

672

670

673

/* kickstart this i/o queue? */

671

/* kickstart this i/o queue? */

674

if (list_empty(&ep->queue) && !ep->stopped) {

672

if (list_empty(&ep->queue) && !ep->stopped) {

675

if (ep->ep.desc == NULL/* ep0 */) {

673

if (ep->ep.desc == NULL/* ep0 */) {

676

unsigned length = _req->length;

674

unsigned length = _req->length;

677

675

678

switch (dev->ep0state) {

676

switch (dev->ep0state) {

679

case EP0_IN_DATA_PHASE:

677

case EP0_IN_DATA_PHASE:

680

dev->stats.write.ops++;

678

dev->stats.write.ops++;

681

if (write_ep0_fifo(ep, req))

679

if (write_ep0_fifo(ep, req))

682

req = NULL;

680

req = NULL;

683

break;

681

break;

684

682

685

case EP0_OUT_DATA_PHASE:

683

case EP0_OUT_DATA_PHASE:

686

dev->stats.read.ops++;

684

dev->stats.read.ops++;

687

/* messy ... */

685

/* messy ... */

688

if (dev->req_config) {

686

if (dev->req_config) {

689

DBG(DBG_VERBOSE, "ep0 config ack%s\n",

687

DBG(DBG_VERBOSE, "ep0 config ack%s\n",

690

dev->has_cfr ? "" : " raced");

688

dev->has_cfr ? "" : " raced");

691

if (dev->has_cfr)

689

if (dev->has_cfr)

692

UDCCFR = UDCCFR_AREN|UDCCFR_ACM

690

UDCCFR = UDCCFR_AREN|UDCCFR_ACM

693

|UDCCFR_MB1;

691

|UDCCFR_MB1;

694

done(ep, req, 0);

692

done(ep, req, 0);

695

dev->ep0state = EP0_END_XFER;

693

dev->ep0state = EP0_END_XFER;

696

local_irq_restore (flags);

694

local_irq_restore (flags);

697

return 0;

695

return 0;

698

}

696

}

699

if (dev->req_pending)

697

if (dev->req_pending)

700

ep0start(dev, UDCCS0_IPR, "OUT");

698

ep0start(dev, UDCCS0_IPR, "OUT");

701

if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0

699

if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0

702

&& read_ep0_fifo(ep, req))) {

700

&& read_ep0_fifo(ep, req))) {

703

ep0_idle(dev);

701

ep0_idle(dev);

704

done(ep, req, 0);

702

done(ep, req, 0);

705

req = NULL;

703

req = NULL;

706

}

704

}

707

break;

705

break;

708

706

709

default:

707

default:

710

DMSG("ep0 i/o, odd state %d\n", dev->ep0state);

708

DMSG("ep0 i/o, odd state %d\n", dev->ep0state);

711

local_irq_restore (flags);

709

local_irq_restore (flags);

712

return -EL2HLT;

710

return -EL2HLT;

713

}

711

}

714

/* can the FIFO can satisfy the request immediately? */

712

/* can the FIFO can satisfy the request immediately? */

715

} else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {

713

} else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {

716

if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0

714

if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0

717

&& write_fifo(ep, req))

715

&& write_fifo(ep, req))

718

req = NULL;

716

req = NULL;

719

} else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0

717

} else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0

720

&& read_fifo(ep, req)) {

718

&& read_fifo(ep, req)) {

721

req = NULL;

719

req = NULL;

722

}

720

}

723

721

724

if (likely(req && ep->ep.desc))

722

if (likely(req && ep->ep.desc))

725

pio_irq_enable(ep->bEndpointAddress);

723

pio_irq_enable(ep->bEndpointAddress);

726

}

724

}

727

725

728

/* pio or dma irq handler advances the queue. */

726

/* pio or dma irq handler advances the queue. */

729

if (likely(req != NULL))

727

if (likely(req != NULL))

730

list_add_tail(&req->queue, &ep->queue);

728

list_add_tail(&req->queue, &ep->queue);

731

local_irq_restore(flags);

729

local_irq_restore(flags);

732

730

733

return 0;

731

return 0;

734

}

732

}

735

733

736

734

737

/*

735

/*

738

* nuke - dequeue ALL requests

736

* nuke - dequeue ALL requests

739

*/

737

*/

740

static void nuke(struct pxa25x_ep *ep, int status)

738

static void nuke(struct pxa25x_ep *ep, int status)

741

{

739

{

742

struct pxa25x_request *req;

740

struct pxa25x_request *req;

743

741

744

/* called with irqs blocked */

742

/* called with irqs blocked */

745

while (!list_empty(&ep->queue)) {

743

while (!list_empty(&ep->queue)) {

746

req = list_entry(ep->queue.next,

744

req = list_entry(ep->queue.next,

747

struct pxa25x_request,

745

struct pxa25x_request,

748

queue);

746

queue);

749

done(ep, req, status);

747

done(ep, req, status);

750

}

748

}

751

if (ep->ep.desc)

749

if (ep->ep.desc)

752

pio_irq_disable (ep->bEndpointAddress);

750

pio_irq_disable (ep->bEndpointAddress);

753

}

751

}

754

752

755

753

756

/* dequeue JUST ONE request */

754

/* dequeue JUST ONE request */

757

static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)

755

static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)

758

{

756

{

759

struct pxa25x_ep *ep;

757

struct pxa25x_ep *ep;

760

struct pxa25x_request *req;

758

struct pxa25x_request *req;

761

unsigned long flags;

759

unsigned long flags;

762

760

763

ep = container_of(_ep, struct pxa25x_ep, ep);

761

ep = container_of(_ep, struct pxa25x_ep, ep);

764

if (!_ep || ep->ep.name == ep0name)

762

if (!_ep || ep->ep.name == ep0name)

765

return -EINVAL;

763

return -EINVAL;

766

764

767

local_irq_save(flags);

765

local_irq_save(flags);

768

766

769

/* make sure it's actually queued on this endpoint */

767

/* make sure it's actually queued on this endpoint */

770

list_for_each_entry (req, &ep->queue, queue) {

768

list_for_each_entry (req, &ep->queue, queue) {

771

if (&req->req == _req)

769

if (&req->req == _req)

772

break;

770

break;

773

}

771

}

774

if (&req->req != _req) {

772

if (&req->req != _req) {

775

local_irq_restore(flags);

773

local_irq_restore(flags);

776

return -EINVAL;

774

return -EINVAL;

777

}

775

}

778

776

779

done(ep, req, -ECONNRESET);

777

done(ep, req, -ECONNRESET);

780

778

781

local_irq_restore(flags);

779

local_irq_restore(flags);

782

return 0;

780

return 0;

783

}

781

}

784

782

785

/*-------------------------------------------------------------------------*/

783

/*-------------------------------------------------------------------------*/

786

784

787

static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)

785

static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)

788

{

786

{

789

struct pxa25x_ep *ep;

787

struct pxa25x_ep *ep;

790

unsigned long flags;

788

unsigned long flags;

791

789

792

ep = container_of(_ep, struct pxa25x_ep, ep);

790

ep = container_of(_ep, struct pxa25x_ep, ep);

793

if (unlikely (!_ep

791

if (unlikely (!_ep

794

|| (!ep->ep.desc && ep->ep.name != ep0name))

792

|| (!ep->ep.desc && ep->ep.name != ep0name))

795

|| ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {

793

|| ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {

796

DMSG("%s, bad ep\n", __func__);

794

DMSG("%s, bad ep\n", __func__);

797

return -EINVAL;

795

return -EINVAL;

798

}

796

}

799

if (value == 0) {

797

if (value == 0) {

800

/* this path (reset toggle+halt) is needed to implement

798

/* this path (reset toggle+halt) is needed to implement

801

* SET_INTERFACE on normal hardware. but it can't be

799

* SET_INTERFACE on normal hardware. but it can't be

802

* done from software on the PXA UDC, and the hardware

800

* done from software on the PXA UDC, and the hardware

803

* forgets to do it as part of SET_INTERFACE automagic.

801

* forgets to do it as part of SET_INTERFACE automagic.

804

*/

802

*/

805

DMSG("only host can clear %s halt\n", _ep->name);

803

DMSG("only host can clear %s halt\n", _ep->name);

806

return -EROFS;

804

return -EROFS;

807

}

805

}

808

806

809

local_irq_save(flags);

807

local_irq_save(flags);

810

808

811

if ((ep->bEndpointAddress & USB_DIR_IN) != 0

809

if ((ep->bEndpointAddress & USB_DIR_IN) != 0

812

&& ((*ep->reg_udccs & UDCCS_BI_TFS) == 0

810

&& ((*ep->reg_udccs & UDCCS_BI_TFS) == 0

813

|| !list_empty(&ep->queue))) {

811

|| !list_empty(&ep->queue))) {

814

local_irq_restore(flags);

812

local_irq_restore(flags);

815

return -EAGAIN;

813

return -EAGAIN;

816

}

814

}

817

815

818

/* FST bit is the same for control, bulk in, bulk out, interrupt in */

816

/* FST bit is the same for control, bulk in, bulk out, interrupt in */

819

*ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;

817

*ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;

820

818

821

/* ep0 needs special care */

819

/* ep0 needs special care */

822

if (!ep->ep.desc) {

820

if (!ep->ep.desc) {

823

start_watchdog(ep->dev);

821

start_watchdog(ep->dev);

824

ep->dev->req_pending = 0;

822

ep->dev->req_pending = 0;

825

ep->dev->ep0state = EP0_STALL;

823

ep->dev->ep0state = EP0_STALL;

826

824

827

/* and bulk/intr endpoints like dropping stalls too */

825

/* and bulk/intr endpoints like dropping stalls too */

828

} else {

826

} else {

829

unsigned i;

827

unsigned i;

830

for (i = 0; i < 1000; i += 20) {

828

for (i = 0; i < 1000; i += 20) {

831

if (*ep->reg_udccs & UDCCS_BI_SST)

829

if (*ep->reg_udccs & UDCCS_BI_SST)

832

break;

830

break;

833

udelay(20);

831

udelay(20);

834

}

832

}

835

}

833

}

836

local_irq_restore(flags);

834

local_irq_restore(flags);

837

835

838

DBG(DBG_VERBOSE, "%s halt\n", _ep->name);

836

DBG(DBG_VERBOSE, "%s halt\n", _ep->name);

839

return 0;

837

return 0;

840

}

838

}

841

839

842

static int pxa25x_ep_fifo_status(struct usb_ep *_ep)

840

static int pxa25x_ep_fifo_status(struct usb_ep *_ep)

843

{

841

{

844

struct pxa25x_ep *ep;

842

struct pxa25x_ep *ep;

845

843

846

ep = container_of(_ep, struct pxa25x_ep, ep);

844

ep = container_of(_ep, struct pxa25x_ep, ep);

847

if (!_ep) {

845

if (!_ep) {

848

DMSG("%s, bad ep\n", __func__);

846

DMSG("%s, bad ep\n", __func__);

849

return -ENODEV;

847

return -ENODEV;

850

}

848

}

851

/* pxa can't report unclaimed bytes from IN fifos */

849

/* pxa can't report unclaimed bytes from IN fifos */

852

if ((ep->bEndpointAddress & USB_DIR_IN) != 0)

850

if ((ep->bEndpointAddress & USB_DIR_IN) != 0)

853

return -EOPNOTSUPP;

851

return -EOPNOTSUPP;

854

if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN

852

if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN

855

|| (*ep->reg_udccs & UDCCS_BO_RFS) == 0)

853

|| (*ep->reg_udccs & UDCCS_BO_RFS) == 0)

856

return 0;

854

return 0;

857

else

855

else

858

return (*ep->reg_ubcr & 0xfff) + 1;

856

return (*ep->reg_ubcr & 0xfff) + 1;

859

}

857

}

860

858

861

static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)

859

static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)

862

{

860

{

863

struct pxa25x_ep *ep;

861

struct pxa25x_ep *ep;

864

862

865

ep = container_of(_ep, struct pxa25x_ep, ep);

863

ep = container_of(_ep, struct pxa25x_ep, ep);

866

if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {

864

if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {

867

DMSG("%s, bad ep\n", __func__);

865

DMSG("%s, bad ep\n", __func__);

868

return;

866

return;

869

}

867

}

870

868

871

/* toggle and halt bits stay unchanged */

869

/* toggle and halt bits stay unchanged */

872

870

873

/* for OUT, just read and discard the FIFO contents. */

871

/* for OUT, just read and discard the FIFO contents. */

874

if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {

872

if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {

875

while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)

873

while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)

876

(void) *ep->reg_uddr;

874

(void) *ep->reg_uddr;

877

return;

875

return;

878

}

876

}

879

877

880

/* most IN status is the same, but ISO can't stall */

878

/* most IN status is the same, but ISO can't stall */

881

*ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR

879

*ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR

882

| (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC

880

| (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC

883

? 0 : UDCCS_BI_SST);

881

? 0 : UDCCS_BI_SST);

884

}

882

}

885

883

886

884

887

static struct usb_ep_ops pxa25x_ep_ops = {

885

static struct usb_ep_ops pxa25x_ep_ops = {

888

.enable = pxa25x_ep_enable,

886

.enable = pxa25x_ep_enable,

889

.disable = pxa25x_ep_disable,

887

.disable = pxa25x_ep_disable,

890

888

891

.alloc_request = pxa25x_ep_alloc_request,

889

.alloc_request = pxa25x_ep_alloc_request,

892

.free_request = pxa25x_ep_free_request,

890

.free_request = pxa25x_ep_free_request,

893

891

894

.queue = pxa25x_ep_queue,

892

.queue = pxa25x_ep_queue,

895

.dequeue = pxa25x_ep_dequeue,

893

.dequeue = pxa25x_ep_dequeue,

896

894

897

.set_halt = pxa25x_ep_set_halt,

895

.set_halt = pxa25x_ep_set_halt,

898

.fifo_status = pxa25x_ep_fifo_status,

896

.fifo_status = pxa25x_ep_fifo_status,

899

.fifo_flush = pxa25x_ep_fifo_flush,

897

.fifo_flush = pxa25x_ep_fifo_flush,

900

};

898

};

901

899

902

900

903

/* ---------------------------------------------------------------------------

901

/* ---------------------------------------------------------------------------

904

* device-scoped parts of the api to the usb controller hardware

902

* device-scoped parts of the api to the usb controller hardware

905

* ---------------------------------------------------------------------------

903

* ---------------------------------------------------------------------------

906

*/

904

*/

907

905

908

static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)

906

static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)

909

{

907

{

910

return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);

908

return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);

911

}

909

}

912

910

913

static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)

911

static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)

914

{

912

{

915

/* host may not have enabled remote wakeup */

913

/* host may not have enabled remote wakeup */

916

if ((UDCCS0 & UDCCS0_DRWF) == 0)

914

if ((UDCCS0 & UDCCS0_DRWF) == 0)

917

return -EHOSTUNREACH;

915

return -EHOSTUNREACH;

918

udc_set_mask_UDCCR(UDCCR_RSM);

916

udc_set_mask_UDCCR(UDCCR_RSM);

919

return 0;

917

return 0;

920

}

918

}

921

919

922

static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);

920

static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);

923

static void udc_enable (struct pxa25x_udc *);

921

static void udc_enable (struct pxa25x_udc *);

924

static void udc_disable(struct pxa25x_udc *);

922

static void udc_disable(struct pxa25x_udc *);

925

923

926

/* We disable the UDC -- and its 48 MHz clock -- whenever it's not

924

/* We disable the UDC -- and its 48 MHz clock -- whenever it's not

927

* in active use.

925

* in active use.

928

*/

926

*/

929

static int pullup(struct pxa25x_udc *udc)

927

static int pullup(struct pxa25x_udc *udc)

930

{

928

{

931

int is_active = udc->vbus && udc->pullup && !udc->suspended;

929

int is_active = udc->vbus && udc->pullup && !udc->suspended;

932

DMSG("%s\n", is_active ? "active" : "inactive");

930

DMSG("%s\n", is_active ? "active" : "inactive");

933

if (is_active) {

931

if (is_active) {

934

if (!udc->active) {

932

if (!udc->active) {

935

udc->active = 1;

933

udc->active = 1;

936

/* Enable clock for USB device */

934

/* Enable clock for USB device */

937

clk_enable(udc->clk);

935

clk_enable(udc->clk);

938

udc_enable(udc);

936

udc_enable(udc);

939

}

937

}

940

} else {

938

} else {

941

if (udc->active) {

939

if (udc->active) {

942

if (udc->gadget.speed != USB_SPEED_UNKNOWN) {

940

if (udc->gadget.speed != USB_SPEED_UNKNOWN) {

943

DMSG("disconnect %s\n", udc->driver

941

DMSG("disconnect %s\n", udc->driver

944

? udc->driver->driver.name

942

? udc->driver->driver.name

945

: "(no driver)");

943

: "(no driver)");

946

stop_activity(udc, udc->driver);

944

stop_activity(udc, udc->driver);

947

}

945

}

948

udc_disable(udc);

946

udc_disable(udc);

949

/* Disable clock for USB device */

947

/* Disable clock for USB device */

950

clk_disable(udc->clk);

948

clk_disable(udc->clk);

951

udc->active = 0;

949

udc->active = 0;

952

}

950

}

953

951

954

}

952

}

955

return 0;

953

return 0;

956

}

954

}

957

955

958

/* VBUS reporting logically comes from a transceiver */

956

/* VBUS reporting logically comes from a transceiver */

959

static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)

957

static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)

960

{

958

{

961

struct pxa25x_udc *udc;

959

struct pxa25x_udc *udc;

962

960

963

udc = container_of(_gadget, struct pxa25x_udc, gadget);

961

udc = container_of(_gadget, struct pxa25x_udc, gadget);

964

udc->vbus = is_active;

962

udc->vbus = is_active;

965

DMSG("vbus %s\n", is_active ? "supplied" : "inactive");

963

DMSG("vbus %s\n", is_active ? "supplied" : "inactive");

966

pullup(udc);

964

pullup(udc);

967

return 0;

965

return 0;

968

}

966

}

969

967

970

/* drivers may have software control over D+ pullup */

968

/* drivers may have software control over D+ pullup */

971

static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)

969

static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)

972

{

970

{

973

struct pxa25x_udc *udc;

971

struct pxa25x_udc *udc;

974

972

975

udc = container_of(_gadget, struct pxa25x_udc, gadget);

973

udc = container_of(_gadget, struct pxa25x_udc, gadget);

976

974

977

/* not all boards support pullup control */

975

/* not all boards support pullup control */

978

if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)

976

if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)

979

return -EOPNOTSUPP;

977

return -EOPNOTSUPP;

980

978

981

udc->pullup = (is_active != 0);

979

udc->pullup = (is_active != 0);

982

pullup(udc);

980

pullup(udc);

983

return 0;

981

return 0;

984

}

982

}

985

983

986

/* boards may consume current from VBUS, up to 100-500mA based on config.

984

/* boards may consume current from VBUS, up to 100-500mA based on config.

987

* the 500uA suspend ceiling means that exclusively vbus-powered PXA designs

985

* the 500uA suspend ceiling means that exclusively vbus-powered PXA designs

988

* violate USB specs.

986

* violate USB specs.

989

*/

987

*/

990

static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)

988

static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)

991

{

989

{

992

struct pxa25x_udc *udc;

990

struct pxa25x_udc *udc;

993

991

994

udc = container_of(_gadget, struct pxa25x_udc, gadget);

992

udc = container_of(_gadget, struct pxa25x_udc, gadget);

995

993

996

if (!IS_ERR_OR_NULL(udc->transceiver))

994

if (!IS_ERR_OR_NULL(udc->transceiver))

997

return usb_phy_set_power(udc->transceiver, mA);

995

return usb_phy_set_power(udc->transceiver, mA);

998

return -EOPNOTSUPP;

996

return -EOPNOTSUPP;

999

}

997

}

1000

998

1001

static int pxa25x_start(struct usb_gadget_driver *driver,

999

static int pxa25x_start(struct usb_gadget_driver *driver,

1002

int (*bind)(struct usb_gadget *, struct usb_gadget_driver *));

1000

int (*bind)(struct usb_gadget *, struct usb_gadget_driver *));

1003

static int pxa25x_stop(struct usb_gadget_driver *driver);

1001

static int pxa25x_stop(struct usb_gadget_driver *driver);

1004

1002

1005

static const struct usb_gadget_ops pxa25x_udc_ops = {

1003

static const struct usb_gadget_ops pxa25x_udc_ops = {

1006

.get_frame = pxa25x_udc_get_frame,

1004

.get_frame = pxa25x_udc_get_frame,

1007

.wakeup = pxa25x_udc_wakeup,

1005

.wakeup = pxa25x_udc_wakeup,

1008

.vbus_session = pxa25x_udc_vbus_session,

1006

.vbus_session = pxa25x_udc_vbus_session,

1009

.pullup = pxa25x_udc_pullup,

1007

.pullup = pxa25x_udc_pullup,

1010

.vbus_draw = pxa25x_udc_vbus_draw,

1008

.vbus_draw = pxa25x_udc_vbus_draw,

1011

.start = pxa25x_start,

1009

.start = pxa25x_start,

1012

.stop = pxa25x_stop,

1010

.stop = pxa25x_stop,

1013

};

1011

};

1014

1012

1015

/*-------------------------------------------------------------------------*/

1013

/*-------------------------------------------------------------------------*/

1016

1014

1017

#ifdef CONFIG_USB_GADGET_DEBUG_FS

1015

#ifdef CONFIG_USB_GADGET_DEBUG_FS

1018

1016

1019

static int

1017

static int

1020

udc_seq_show(struct seq_file *m, void *_d)

1018

udc_seq_show(struct seq_file *m, void *_d)

1021

{

1019

{

1022

struct pxa25x_udc *dev = m->private;

1020

struct pxa25x_udc *dev = m->private;

1023

unsigned long flags;

1021

unsigned long flags;

1024

int i;

1022

int i;

1025

u32 tmp;

1023

u32 tmp;

1026

1024

1027

local_irq_save(flags);

1025

local_irq_save(flags);

1028

1026

1029

/* basic device status */

1027

/* basic device status */

1030

seq_printf(m, DRIVER_DESC "\n"

1028

seq_printf(m, DRIVER_DESC "\n"

1031

"%s version: %s\nGadget driver: %s\nHost %s\n\n",

1029

"%s version: %s\nGadget driver: %s\nHost %s\n\n",

1032

driver_name, DRIVER_VERSION SIZE_STR "(pio)",

1030

driver_name, DRIVER_VERSION SIZE_STR "(pio)",

1033

dev->driver ? dev->driver->driver.name : "(none)",

1031

dev->driver ? dev->driver->driver.name : "(none)",

1034

dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");

1032

dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");

1035

1033

1036

/* registers for device and ep0 */

1034

/* registers for device and ep0 */

1037

seq_printf(m,

1035

seq_printf(m,

1038

"uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",

1036

"uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",

1039

UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);

1037

UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);

1040

1038

1041

tmp = UDCCR;

1039

tmp = UDCCR;

1042

seq_printf(m,

1040

seq_printf(m,

1043

"udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,

1041

"udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,

1044

(tmp & UDCCR_REM) ? " rem" : "",

1042

(tmp & UDCCR_REM) ? " rem" : "",

1045

(tmp & UDCCR_RSTIR) ? " rstir" : "",

1043

(tmp & UDCCR_RSTIR) ? " rstir" : "",

1046

(tmp & UDCCR_SRM) ? " srm" : "",

1044

(tmp & UDCCR_SRM) ? " srm" : "",

1047

(tmp & UDCCR_SUSIR) ? " susir" : "",

1045

(tmp & UDCCR_SUSIR) ? " susir" : "",

1048

(tmp & UDCCR_RESIR) ? " resir" : "",

1046

(tmp & UDCCR_RESIR) ? " resir" : "",

1049

(tmp & UDCCR_RSM) ? " rsm" : "",

1047

(tmp & UDCCR_RSM) ? " rsm" : "",

1050

(tmp & UDCCR_UDA) ? " uda" : "",

1048

(tmp & UDCCR_UDA) ? " uda" : "",

1051

(tmp & UDCCR_UDE) ? " ude" : "");

1049

(tmp & UDCCR_UDE) ? " ude" : "");

1052

1050

1053

tmp = UDCCS0;

1051

tmp = UDCCS0;

1054

seq_printf(m,

1052

seq_printf(m,

1055

"udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,

1053

"udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,

1056

(tmp & UDCCS0_SA) ? " sa" : "",

1054

(tmp & UDCCS0_SA) ? " sa" : "",

1057

(tmp & UDCCS0_RNE) ? " rne" : "",

1055

(tmp & UDCCS0_RNE) ? " rne" : "",

1058

(tmp & UDCCS0_FST) ? " fst" : "",

1056

(tmp & UDCCS0_FST) ? " fst" : "",

1059

(tmp & UDCCS0_SST) ? " sst" : "",

1057

(tmp & UDCCS0_SST) ? " sst" : "",

1060

(tmp & UDCCS0_DRWF) ? " dwrf" : "",

1058

(tmp & UDCCS0_DRWF) ? " dwrf" : "",

1061

(tmp & UDCCS0_FTF) ? " ftf" : "",

1059

(tmp & UDCCS0_FTF) ? " ftf" : "",

1062

(tmp & UDCCS0_IPR) ? " ipr" : "",

1060

(tmp & UDCCS0_IPR) ? " ipr" : "",

1063

(tmp & UDCCS0_OPR) ? " opr" : "");

1061

(tmp & UDCCS0_OPR) ? " opr" : "");

1064

1062

1065

if (dev->has_cfr) {

1063

if (dev->has_cfr) {

1066

tmp = UDCCFR;

1064

tmp = UDCCFR;

1067

seq_printf(m,

1065

seq_printf(m,

1068

"udccfr %02X =%s%s\n", tmp,

1066

"udccfr %02X =%s%s\n", tmp,

1069

(tmp & UDCCFR_AREN) ? " aren" : "",

1067

(tmp & UDCCFR_AREN) ? " aren" : "",

1070

(tmp & UDCCFR_ACM) ? " acm" : "");

1068

(tmp & UDCCFR_ACM) ? " acm" : "");

1071

}

1069

}

1072

1070

1073

if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)

1071

if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)

1074

goto done;

1072

goto done;

1075

1073

1076

seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",

1074

seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",

1077

dev->stats.write.bytes, dev->stats.write.ops,

1075

dev->stats.write.bytes, dev->stats.write.ops,

1078

dev->stats.read.bytes, dev->stats.read.ops,

1076

dev->stats.read.bytes, dev->stats.read.ops,

1079

dev->stats.irqs);

1077

dev->stats.irqs);

1080

1078

1081

/* dump endpoint queues */

1079

/* dump endpoint queues */

1082

for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {

1080

for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {

1083

struct pxa25x_ep *ep = &dev->ep [i];

1081

struct pxa25x_ep *ep = &dev->ep [i];

1084

struct pxa25x_request *req;

1082

struct pxa25x_request *req;

1085

1083

1086

if (i != 0) {

1084

if (i != 0) {

1087

const struct usb_endpoint_descriptor *desc;

1085

const struct usb_endpoint_descriptor *desc;

1088

1086

1089

desc = ep->ep.desc;

1087

desc = ep->ep.desc;

1090

if (!desc)

1088

if (!desc)

1091

continue;

1089

continue;

1092

tmp = *dev->ep [i].reg_udccs;

1090

tmp = *dev->ep [i].reg_udccs;

1093

seq_printf(m,

1091

seq_printf(m,

1094

"%s max %d %s udccs %02x irqs %lu\n",

1092

"%s max %d %s udccs %02x irqs %lu\n",

1095

ep->ep.name, usb_endpoint_maxp(desc),

1093

ep->ep.name, usb_endpoint_maxp(desc),

1096

"pio", tmp, ep->pio_irqs);

1094

"pio", tmp, ep->pio_irqs);

1097

/* TODO translate all five groups of udccs bits! */

1095

/* TODO translate all five groups of udccs bits! */

1098

1096

1099

} else /* ep0 should only have one transfer queued */

1097

} else /* ep0 should only have one transfer queued */

1100

seq_printf(m, "ep0 max 16 pio irqs %lu\n",

1098

seq_printf(m, "ep0 max 16 pio irqs %lu\n",

1101

ep->pio_irqs);

1099

ep->pio_irqs);

1102

1100

1103

if (list_empty(&ep->queue)) {

1101

if (list_empty(&ep->queue)) {

1104

seq_printf(m, "\t(nothing queued)\n");

1102

seq_printf(m, "\t(nothing queued)\n");

1105

continue;

1103

continue;

1106

}

1104

}

1107

list_for_each_entry(req, &ep->queue, queue) {

1105

list_for_each_entry(req, &ep->queue, queue) {

1108

seq_printf(m,

1106

seq_printf(m,

1109

"\treq %p len %d/%d buf %p\n",

1107

"\treq %p len %d/%d buf %p\n",

1110

&req->req, req->req.actual,

1108

&req->req, req->req.actual,

1111

req->req.length, req->req.buf);

1109

req->req.length, req->req.buf);

1112

}

1110

}

1113

}

1111

}

1114

1112

1115

done:

1113

done:

1116

local_irq_restore(flags);

1114

local_irq_restore(flags);

1117

return 0;

1115

return 0;

1118

}

1116

}

1119

1117

1120

static int

1118

static int

1121

udc_debugfs_open(struct inode *inode, struct file *file)

1119

udc_debugfs_open(struct inode *inode, struct file *file)

1122

{

1120

{

1123

return single_open(file, udc_seq_show, inode->i_private);

1121

return single_open(file, udc_seq_show, inode->i_private);

1124

}

1122

}

1125

1123

1126

static const struct file_operations debug_fops = {

1124

static const struct file_operations debug_fops = {

1127

.open = udc_debugfs_open,

1125

.open = udc_debugfs_open,

1128

.read = seq_read,

1126

.read = seq_read,

1129

.llseek = seq_lseek,

1127

.llseek = seq_lseek,

1130

.release = single_release,

1128

.release = single_release,

1131

.owner = THIS_MODULE,

1129

.owner = THIS_MODULE,

1132

};

1130

};

1133

1131

1134

#define create_debug_files(dev) \

1132

#define create_debug_files(dev) \

1135

do { \

1133

do { \

1136

dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \

1134

dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \

1137

S_IRUGO, NULL, dev, &debug_fops); \

1135

S_IRUGO, NULL, dev, &debug_fops); \

1138

} while (0)

1136

} while (0)

1139

#define remove_debug_files(dev) \

1137

#define remove_debug_files(dev) \

1140

do { \

1138

do { \

1141

if (dev->debugfs_udc) \

1139

if (dev->debugfs_udc) \

1142

debugfs_remove(dev->debugfs_udc); \

1140

debugfs_remove(dev->debugfs_udc); \

1143

} while (0)

1141

} while (0)

1144

1142

1145

#else /* !CONFIG_USB_GADGET_DEBUG_FILES */

1143

#else /* !CONFIG_USB_GADGET_DEBUG_FILES */

1146

1144

1147

#define create_debug_files(dev) do {} while (0)

1145

#define create_debug_files(dev) do {} while (0)

1148

#define remove_debug_files(dev) do {} while (0)

1146

#define remove_debug_files(dev) do {} while (0)

1149

1147

1150

#endif /* CONFIG_USB_GADGET_DEBUG_FILES */

1148

#endif /* CONFIG_USB_GADGET_DEBUG_FILES */

1151

1149

1152

/*-------------------------------------------------------------------------*/

1150

/*-------------------------------------------------------------------------*/

1153

1151

1154

/*

1152

/*

1155

* udc_disable - disable USB device controller

1153

* udc_disable - disable USB device controller

1156

*/

1154

*/

1157

static void udc_disable(struct pxa25x_udc *dev)

1155

static void udc_disable(struct pxa25x_udc *dev)

1158

{

1156

{

1159

/* block all irqs */

1157

/* block all irqs */

1160

udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);

1158

udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);

1161

UICR0 = UICR1 = 0xff;

1159

UICR0 = UICR1 = 0xff;

1162

UFNRH = UFNRH_SIM;

1160

UFNRH = UFNRH_SIM;

1163

1161

1164

/* if hardware supports it, disconnect from usb */

1162

/* if hardware supports it, disconnect from usb */

1165

pullup_off();

1163

pullup_off();

1166

1164

1167

udc_clear_mask_UDCCR(UDCCR_UDE);

1165

udc_clear_mask_UDCCR(UDCCR_UDE);

1168

1166

1169

ep0_idle (dev);

1167

ep0_idle (dev);

1170

dev->gadget.speed = USB_SPEED_UNKNOWN;

1168

dev->gadget.speed = USB_SPEED_UNKNOWN;

1171

}

1169

}

1172

1170

1173

1171

1174

/*

1172

/*

1175

* udc_reinit - initialize software state

1173

* udc_reinit - initialize software state

1176

*/

1174

*/

1177

static void udc_reinit(struct pxa25x_udc *dev)

1175

static void udc_reinit(struct pxa25x_udc *dev)

1178

{

1176

{

1179

u32 i;

1177

u32 i;

1180

1178

1181

/* device/ep0 records init */

1179

/* device/ep0 records init */

1182

INIT_LIST_HEAD (&dev->gadget.ep_list);

1180

INIT_LIST_HEAD (&dev->gadget.ep_list);

1183

INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);

1181

INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);

1184

dev->ep0state = EP0_IDLE;

1182

dev->ep0state = EP0_IDLE;

1185

1183

1186

/* basic endpoint records init */

1184

/* basic endpoint records init */

1187

for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {

1185

for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {

1188

struct pxa25x_ep *ep = &dev->ep[i];

1186

struct pxa25x_ep *ep = &dev->ep[i];

1189

1187

1190

if (i != 0)

1188

if (i != 0)

1191

list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);

1189

list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);

1192

1190

1193

ep->ep.desc = NULL;

1191

ep->ep.desc = NULL;

1194

ep->stopped = 0;

1192

ep->stopped = 0;

1195

INIT_LIST_HEAD (&ep->queue);

1193

INIT_LIST_HEAD (&ep->queue);

1196

ep->pio_irqs = 0;

1194

ep->pio_irqs = 0;

1197

}

1195

}

1198

1196

1199

/* the rest was statically initialized, and is read-only */

1197

/* the rest was statically initialized, and is read-only */

1200

}

1198

}

1201

1199

1202

/* until it's enabled, this UDC should be completely invisible

1200

/* until it's enabled, this UDC should be completely invisible

1203

* to any USB host.

1201

* to any USB host.

1204

*/

1202

*/

1205

static void udc_enable (struct pxa25x_udc *dev)

1203

static void udc_enable (struct pxa25x_udc *dev)

1206

{

1204

{

1207

udc_clear_mask_UDCCR(UDCCR_UDE);

1205

udc_clear_mask_UDCCR(UDCCR_UDE);

1208

1206

1209

/* try to clear these bits before we enable the udc */

1207

/* try to clear these bits before we enable the udc */

1210

udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);

1208

udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);

1211

1209

1212

ep0_idle(dev);

1210

ep0_idle(dev);

1213

dev->gadget.speed = USB_SPEED_UNKNOWN;

1211

dev->gadget.speed = USB_SPEED_UNKNOWN;

1214

dev->stats.irqs = 0;

1212

dev->stats.irqs = 0;

1215

1213

1216

/*

1214

/*

1217

* sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:

1215

* sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:

1218

* - enable UDC

1216

* - enable UDC

1219

* - if RESET is already in progress, ack interrupt

1217

* - if RESET is already in progress, ack interrupt

1220

* - unmask reset interrupt

1218

* - unmask reset interrupt

1221

*/

1219

*/

1222

udc_set_mask_UDCCR(UDCCR_UDE);

1220

udc_set_mask_UDCCR(UDCCR_UDE);

1223

if (!(UDCCR & UDCCR_UDA))

1221

if (!(UDCCR & UDCCR_UDA))

1224

udc_ack_int_UDCCR(UDCCR_RSTIR);

1222

udc_ack_int_UDCCR(UDCCR_RSTIR);

1225

1223

1226

if (dev->has_cfr /* UDC_RES2 is defined */) {

1224

if (dev->has_cfr /* UDC_RES2 is defined */) {

1227

/* pxa255 (a0+) can avoid a set_config race that could

1225

/* pxa255 (a0+) can avoid a set_config race that could

1228

* prevent gadget drivers from configuring correctly

1226

* prevent gadget drivers from configuring correctly

1229

*/

1227

*/

1230

UDCCFR = UDCCFR_ACM | UDCCFR_MB1;

1228

UDCCFR = UDCCFR_ACM | UDCCFR_MB1;

1231

} else {

1229

} else {

1232

/* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)

1230

/* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)

1233

* which could result in missing packets and interrupts.

1231

* which could result in missing packets and interrupts.

1234

* supposedly one bit per endpoint, controlling whether it

1232

* supposedly one bit per endpoint, controlling whether it

1235

* double buffers or not; ACM/AREN bits fit into the holes.

1233

* double buffers or not; ACM/AREN bits fit into the holes.

1236

* zero bits (like USIR0_IRx) disable double buffering.

1234

* zero bits (like USIR0_IRx) disable double buffering.

1237

*/

1235

*/

1238

UDC_RES1 = 0x00;

1236

UDC_RES1 = 0x00;

1239

UDC_RES2 = 0x00;

1237

UDC_RES2 = 0x00;

1240

}

1238

}

1241

1239

1242

/* enable suspend/resume and reset irqs */

1240

/* enable suspend/resume and reset irqs */

1243

udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);

1241

udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);

1244

1242

1245

/* enable ep0 irqs */

1243

/* enable ep0 irqs */

1246

UICR0 &= ~UICR0_IM0;

1244

UICR0 &= ~UICR0_IM0;

1247

1245

1248

/* if hardware supports it, pullup D+ and wait for reset */

1246

/* if hardware supports it, pullup D+ and wait for reset */

1249

pullup_on();

1247

pullup_on();

1250

}

1248

}

1251

1249

1252

1250

1253

/* when a driver is successfully registered, it will receive

1251

/* when a driver is successfully registered, it will receive

1254

* control requests including set_configuration(), which enables

1252

* control requests including set_configuration(), which enables

1255

* non-control requests. then usb traffic follows until a

1253

* non-control requests. then usb traffic follows until a

1256

* disconnect is reported. then a host may connect again, or

1254

* disconnect is reported. then a host may connect again, or

1257

* the driver might get unbound.

1255

* the driver might get unbound.

1258

*/

1256

*/

1259

static int pxa25x_start(struct usb_gadget_driver *driver,

1257

static int pxa25x_start(struct usb_gadget_driver *driver,

1260

int (*bind)(struct usb_gadget *, struct usb_gadget_driver *))

1258

int (*bind)(struct usb_gadget *, struct usb_gadget_driver *))

1261

{

1259

{

1262

struct pxa25x_udc *dev = the_controller;

1260

struct pxa25x_udc *dev = the_controller;

1263

int retval;

1261

int retval;

1264

1262

1265

if (!driver

1263

if (!driver

1266

|| driver->max_speed < USB_SPEED_FULL

1264

|| driver->max_speed < USB_SPEED_FULL

1267

|| !bind

1265

|| !bind

1268

|| !driver->disconnect

1266

|| !driver->disconnect

1269

|| !driver->setup)

1267

|| !driver->setup)

1270

return -EINVAL;

1268

return -EINVAL;

1271

if (!dev)

1269

if (!dev)

1272

return -ENODEV;

1270

return -ENODEV;

1273

if (dev->driver)

1271

if (dev->driver)

1274

return -EBUSY;

1272

return -EBUSY;

1275

1273

1276

/* first hook up the driver ... */

1274

/* first hook up the driver ... */

1277

dev->driver = driver;

1275

dev->driver = driver;

1278

dev->gadget.dev.driver = &driver->driver;

1276

dev->gadget.dev.driver = &driver->driver;

1279

dev->pullup = 1;

1277

dev->pullup = 1;

1280

1278

1281

retval = device_add (&dev->gadget.dev);

1279

retval = device_add (&dev->gadget.dev);

1282

if (retval) {

1280

if (retval) {

1283

fail:

1281

fail:

1284

dev->driver = NULL;

1282

dev->driver = NULL;

1285

dev->gadget.dev.driver = NULL;

1283

dev->gadget.dev.driver = NULL;

1286

return retval;

1284

return retval;

1287

}

1285

}

1288

retval = bind(&dev->gadget, driver);

1286

retval = bind(&dev->gadget, driver);

1289

if (retval) {

1287

if (retval) {

1290

DMSG("bind to driver %s --> error %d\n",

1288

DMSG("bind to driver %s --> error %d\n",

1291

driver->driver.name, retval);

1289

driver->driver.name, retval);

1292

device_del (&dev->gadget.dev);

1290

device_del (&dev->gadget.dev);

1293

goto fail;

1291

goto fail;

1294

}

1292

}

1295

1293

1296

/* ... then enable host detection and ep0; and we're ready

1294

/* ... then enable host detection and ep0; and we're ready

1297

* for set_configuration as well as eventual disconnect.

1295

* for set_configuration as well as eventual disconnect.

1298

*/

1296

*/

1299

DMSG("registered gadget driver '%s'\n", driver->driver.name);

1297

DMSG("registered gadget driver '%s'\n", driver->driver.name);

1300

1298

1301

/* connect to bus through transceiver */

1299

/* connect to bus through transceiver */

1302

if (!IS_ERR_OR_NULL(dev->transceiver)) {

1300

if (!IS_ERR_OR_NULL(dev->transceiver)) {

1303

retval = otg_set_peripheral(dev->transceiver->otg,

1301

retval = otg_set_peripheral(dev->transceiver->otg,

1304

&dev->gadget);

1302

&dev->gadget);

1305

if (retval) {

1303

if (retval) {

1306

DMSG("can't bind to transceiver\n");

1304

DMSG("can't bind to transceiver\n");

1307

if (driver->unbind)

1305

if (driver->unbind)

1308

driver->unbind(&dev->gadget);

1306

driver->unbind(&dev->gadget);

1309

goto bind_fail;

1307

goto bind_fail;

1310

}

1308

}

1311

}

1309

}

1312

1310

1313

pullup(dev);

1311

pullup(dev);

1314

dump_state(dev);

1312

dump_state(dev);

1315

return 0;

1313

return 0;

1316

bind_fail:

1314

bind_fail:

1317

return retval;

1315

return retval;

1318

}

1316

}

1319

1317

1320

static void

1318

static void

1321

stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)

1319

stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)

1322

{

1320

{

1323

int i;

1321

int i;

1324

1322

1325

/* don't disconnect drivers more than once */

1323

/* don't disconnect drivers more than once */

1326

if (dev->gadget.speed == USB_SPEED_UNKNOWN)

1324

if (dev->gadget.speed == USB_SPEED_UNKNOWN)

1327

driver = NULL;

1325

driver = NULL;

1328

dev->gadget.speed = USB_SPEED_UNKNOWN;

1326

dev->gadget.speed = USB_SPEED_UNKNOWN;

1329

1327

1330

/* prevent new request submissions, kill any outstanding requests */

1328

/* prevent new request submissions, kill any outstanding requests */

1331

for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {

1329

for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {

1332

struct pxa25x_ep *ep = &dev->ep[i];

1330

struct pxa25x_ep *ep = &dev->ep[i];

1333

1331

1334

ep->stopped = 1;

1332

ep->stopped = 1;

1335

nuke(ep, -ESHUTDOWN);

1333

nuke(ep, -ESHUTDOWN);

1336

}

1334

}

1337

del_timer_sync(&dev->timer);

1335

del_timer_sync(&dev->timer);

1338

1336

1339

/* report disconnect; the driver is already quiesced */

1337

/* report disconnect; the driver is already quiesced */

1340

if (driver)

1338

if (driver)

1341

driver->disconnect(&dev->gadget);

1339

driver->disconnect(&dev->gadget);

1342

1340

1343

/* re-init driver-visible data structures */

1341

/* re-init driver-visible data structures */

1344

udc_reinit(dev);

1342

udc_reinit(dev);

1345

}

1343

}

1346

1344

1347

static int pxa25x_stop(struct usb_gadget_driver *driver)

1345

static int pxa25x_stop(struct usb_gadget_driver *driver)

1348

{

1346

{

1349

struct pxa25x_udc *dev = the_controller;

1347

struct pxa25x_udc *dev = the_controller;

1350

1348

1351

if (!dev)

1349

if (!dev)

1352

return -ENODEV;

1350

return -ENODEV;

1353

if (!driver || driver != dev->driver || !driver->unbind)

1351

if (!driver || driver != dev->driver || !driver->unbind)

1354

return -EINVAL;

1352

return -EINVAL;

1355

1353

1356

local_irq_disable();

1354

local_irq_disable();

1357

dev->pullup = 0;

1355

dev->pullup = 0;

1358

pullup(dev);

1356

pullup(dev);

1359

stop_activity(dev, driver);

1357

stop_activity(dev, driver);

1360

local_irq_enable();

1358

local_irq_enable();

1361

1359

1362

if (!IS_ERR_OR_NULL(dev->transceiver))

1360

if (!IS_ERR_OR_NULL(dev->transceiver))

1363

(void) otg_set_peripheral(dev->transceiver->otg, NULL);

1361

(void) otg_set_peripheral(dev->transceiver->otg, NULL);

1364

1362

1365

driver->unbind(&dev->gadget);

1363

driver->unbind(&dev->gadget);

1366

dev->gadget.dev.driver = NULL;

1364

dev->gadget.dev.driver = NULL;

1367

dev->driver = NULL;

1365

dev->driver = NULL;

1368

1366

1369

device_del (&dev->gadget.dev);

1367

device_del (&dev->gadget.dev);

1370

1368

1371

DMSG("unregistered gadget driver '%s'\n", driver->driver.name);

1369

DMSG("unregistered gadget driver '%s'\n", driver->driver.name);

1372

dump_state(dev);

1370

dump_state(dev);

1373

return 0;

1371

return 0;

1374

}

1372

}

1375

1373

1376

/*-------------------------------------------------------------------------*/

1374

/*-------------------------------------------------------------------------*/

1377

1375

1378

#ifdef CONFIG_ARCH_LUBBOCK

1376

#ifdef CONFIG_ARCH_LUBBOCK

1379

1377

1380

/* Lubbock has separate connect and disconnect irqs. More typical designs

1378

/* Lubbock has separate connect and disconnect irqs. More typical designs

1381

* use one GPIO as the VBUS IRQ, and another to control the D+ pullup.

1379

* use one GPIO as the VBUS IRQ, and another to control the D+ pullup.

1382

*/

1380

*/

1383

1381

1384

static irqreturn_t

1382

static irqreturn_t

1385

lubbock_vbus_irq(int irq, void *_dev)

1383

lubbock_vbus_irq(int irq, void *_dev)

1386

{

1384

{

1387

struct pxa25x_udc *dev = _dev;

1385

struct pxa25x_udc *dev = _dev;

1388

int vbus;

1386

int vbus;

1389

1387

1390

dev->stats.irqs++;

1388

dev->stats.irqs++;

1391

switch (irq) {

1389

switch (irq) {

1392

case LUBBOCK_USB_IRQ:

1390

case LUBBOCK_USB_IRQ:

1393

vbus = 1;

1391

vbus = 1;

1394

disable_irq(LUBBOCK_USB_IRQ);

1392

disable_irq(LUBBOCK_USB_IRQ);

1395

enable_irq(LUBBOCK_USB_DISC_IRQ);

1393

enable_irq(LUBBOCK_USB_DISC_IRQ);

1396

break;

1394

break;

1397

case LUBBOCK_USB_DISC_IRQ:

1395

case LUBBOCK_USB_DISC_IRQ:

1398

vbus = 0;

1396

vbus = 0;

1399

disable_irq(LUBBOCK_USB_DISC_IRQ);

1397

disable_irq(LUBBOCK_USB_DISC_IRQ);

1400

enable_irq(LUBBOCK_USB_IRQ);

1398

enable_irq(LUBBOCK_USB_IRQ);

1401

break;

1399

break;

1402

default:

1400

default:

1403

return IRQ_NONE;

1401

return IRQ_NONE;

1404

}

1402

}

1405

1403

1406

pxa25x_udc_vbus_session(&dev->gadget, vbus);

1404

pxa25x_udc_vbus_session(&dev->gadget, vbus);

1407

return IRQ_HANDLED;

1405

return IRQ_HANDLED;

1408

}

1406

}

1409

1407

1410

#endif

1408

#endif

1411

1409

1412

1410

1413

/*-------------------------------------------------------------------------*/

1411

/*-------------------------------------------------------------------------*/

1414

1412

1415

static inline void clear_ep_state (struct pxa25x_udc *dev)

1413

static inline void clear_ep_state (struct pxa25x_udc *dev)

1416

{

1414

{

1417

unsigned i;

1415

unsigned i;

1418

1416

1419

/* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint

1417

/* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint

1420

* fifos, and pending transactions mustn't be continued in any case.

1418

* fifos, and pending transactions mustn't be continued in any case.

1421

*/

1419

*/

1422

for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)

1420

for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)

1423

nuke(&dev->ep[i], -ECONNABORTED);

1421

nuke(&dev->ep[i], -ECONNABORTED);

1424

}

1422

}

1425

1423

1426

static void udc_watchdog(unsigned long _dev)

1424

static void udc_watchdog(unsigned long _dev)

1427

{

1425

{

1428

struct pxa25x_udc *dev = (void *)_dev;

1426

struct pxa25x_udc *dev = (void *)_dev;

1429

1427

1430

local_irq_disable();

1428

local_irq_disable();

1431

if (dev->ep0state == EP0_STALL

1429

if (dev->ep0state == EP0_STALL

1432

&& (UDCCS0 & UDCCS0_FST) == 0

1430

&& (UDCCS0 & UDCCS0_FST) == 0

1433

&& (UDCCS0 & UDCCS0_SST) == 0) {

1431

&& (UDCCS0 & UDCCS0_SST) == 0) {

1434

UDCCS0 = UDCCS0_FST|UDCCS0_FTF;

1432

UDCCS0 = UDCCS0_FST|UDCCS0_FTF;

1435

DBG(DBG_VERBOSE, "ep0 re-stall\n");

1433

DBG(DBG_VERBOSE, "ep0 re-stall\n");

1436

start_watchdog(dev);

1434

start_watchdog(dev);

1437

}

1435

}

1438

local_irq_enable();

1436

local_irq_enable();

1439

}

1437

}

1440

1438

1441

static void handle_ep0 (struct pxa25x_udc *dev)

1439

static void handle_ep0 (struct pxa25x_udc *dev)

1442

{

1440

{

1443

u32 udccs0 = UDCCS0;

1441

u32 udccs0 = UDCCS0;

1444

struct pxa25x_ep *ep = &dev->ep [0];

1442

struct pxa25x_ep *ep = &dev->ep [0];

1445

struct pxa25x_request *req;

1443

struct pxa25x_request *req;

1446

union {

1444

union {

1447

struct usb_ctrlrequest r;

1445

struct usb_ctrlrequest r;

1448

u8 raw [8];

1446

u8 raw [8];

1449

u32 word [2];

1447

u32 word [2];

1450

} u;

1448

} u;

1451

1449

1452

if (list_empty(&ep->queue))

1450

if (list_empty(&ep->queue))

1453

req = NULL;

1451

req = NULL;

1454

else

1452

else

1455

req = list_entry(ep->queue.next, struct pxa25x_request, queue);

1453

req = list_entry(ep->queue.next, struct pxa25x_request, queue);

1456

1454

1457

/* clear stall status */

1455

/* clear stall status */

1458

if (udccs0 & UDCCS0_SST) {

1456

if (udccs0 & UDCCS0_SST) {

1459

nuke(ep, -EPIPE);

1457

nuke(ep, -EPIPE);

1460

UDCCS0 = UDCCS0_SST;

1458

UDCCS0 = UDCCS0_SST;

1461

del_timer(&dev->timer);

1459

del_timer(&dev->timer);

1462

ep0_idle(dev);

1460

ep0_idle(dev);

1463

}

1461

}

1464

1462

1465

/* previous request unfinished? non-error iff back-to-back ... */

1463

/* previous request unfinished? non-error iff back-to-back ... */

1466

if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {

1464

if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {

1467

nuke(ep, 0);

1465

nuke(ep, 0);

1468

del_timer(&dev->timer);

1466

del_timer(&dev->timer);

1469

ep0_idle(dev);

1467

ep0_idle(dev);

1470

}

1468

}

1471

1469

1472

switch (dev->ep0state) {

1470

switch (dev->ep0state) {

1473

case EP0_IDLE:

1471

case EP0_IDLE:

1474

/* late-breaking status? */

1472

/* late-breaking status? */

1475

udccs0 = UDCCS0;

1473

udccs0 = UDCCS0;

1476

1474

1477

/* start control request? */

1475

/* start control request? */

1478

if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))

1476

if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))

1479

== (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {

1477

== (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {

1480

int i;

1478

int i;

1481

1479

1482

nuke (ep, -EPROTO);

1480

nuke (ep, -EPROTO);

1483

1481

1484

/* read SETUP packet */

1482

/* read SETUP packet */

1485

for (i = 0; i < 8; i++) {

1483

for (i = 0; i < 8; i++) {

1486

if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {

1484

if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {

1487

bad_setup:

1485

bad_setup:

1488

DMSG("SETUP %d!\n", i);

1486

DMSG("SETUP %d!\n", i);

1489

goto stall;

1487

goto stall;

1490

}

1488

}

1491

u.raw [i] = (u8) UDDR0;

1489

u.raw [i] = (u8) UDDR0;

1492

}

1490

}

1493

if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))

1491

if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))

1494

goto bad_setup;

1492

goto bad_setup;

1495

1493

1496

got_setup:

1494

got_setup:

1497

DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",

1495

DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",

1498

u.r.bRequestType, u.r.bRequest,

1496

u.r.bRequestType, u.r.bRequest,

1499

le16_to_cpu(u.r.wValue),

1497

le16_to_cpu(u.r.wValue),

1500

le16_to_cpu(u.r.wIndex),

1498

le16_to_cpu(u.r.wIndex),

1501

le16_to_cpu(u.r.wLength));

1499

le16_to_cpu(u.r.wLength));

1502

1500

1503

/* cope with automagic for some standard requests. */

1501

/* cope with automagic for some standard requests. */

1504

dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)

1502

dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)

1505

== USB_TYPE_STANDARD;

1503

== USB_TYPE_STANDARD;

1506

dev->req_config = 0;

1504

dev->req_config = 0;

1507

dev->req_pending = 1;

1505

dev->req_pending = 1;

1508

switch (u.r.bRequest) {

1506

switch (u.r.bRequest) {

1509

/* hardware restricts gadget drivers here! */

1507

/* hardware restricts gadget drivers here! */

1510

case USB_REQ_SET_CONFIGURATION:

1508

case USB_REQ_SET_CONFIGURATION:

1511

if (u.r.bRequestType == USB_RECIP_DEVICE) {

1509

if (u.r.bRequestType == USB_RECIP_DEVICE) {

1512

/* reflect hardware's automagic

1510

/* reflect hardware's automagic

1513

* up to the gadget driver.

1511

* up to the gadget driver.

1514

*/

1512

*/

1515

config_change:

1513

config_change:

1516

dev->req_config = 1;

1514

dev->req_config = 1;

1517

clear_ep_state(dev);

1515

clear_ep_state(dev);

1518

/* if !has_cfr, there's no synch

1516

/* if !has_cfr, there's no synch

1519

* else use AREN (later) not SA|OPR

1517

* else use AREN (later) not SA|OPR

1520

* USIR0_IR0 acts edge sensitive

1518

* USIR0_IR0 acts edge sensitive

1521

*/

1519

*/

1522

}

1520

}

1523

break;

1521

break;

1524

/* ... and here, even more ... */

1522

/* ... and here, even more ... */

1525

case USB_REQ_SET_INTERFACE:

1523

case USB_REQ_SET_INTERFACE:

1526

if (u.r.bRequestType == USB_RECIP_INTERFACE) {

1524

if (u.r.bRequestType == USB_RECIP_INTERFACE) {

1527

/* udc hardware is broken by design:

1525

/* udc hardware is broken by design:

1528

* - altsetting may only be zero;

1526

* - altsetting may only be zero;

1529

* - hw resets all interfaces' eps;

1527

* - hw resets all interfaces' eps;

1530

* - ep reset doesn't include halt(?).

1528

* - ep reset doesn't include halt(?).

1531

*/

1529

*/

1532

DMSG("broken set_interface (%d/%d)\n",

1530

DMSG("broken set_interface (%d/%d)\n",

1533

le16_to_cpu(u.r.wIndex),

1531

le16_to_cpu(u.r.wIndex),

1534

le16_to_cpu(u.r.wValue));

1532

le16_to_cpu(u.r.wValue));

1535

goto config_change;

1533

goto config_change;

1536

}

1534

}

1537

break;

1535

break;

1538

/* hardware was supposed to hide this */

1536

/* hardware was supposed to hide this */

1539

case USB_REQ_SET_ADDRESS:

1537

case USB_REQ_SET_ADDRESS:

1540

if (u.r.bRequestType == USB_RECIP_DEVICE) {

1538

if (u.r.bRequestType == USB_RECIP_DEVICE) {

1541

ep0start(dev, 0, "address");

1539

ep0start(dev, 0, "address");

1542

return;

1540

return;

1543

}

1541

}

1544

break;

1542

break;

1545

}

1543

}

1546

1544

1547

if (u.r.bRequestType & USB_DIR_IN)

1545

if (u.r.bRequestType & USB_DIR_IN)

1548

dev->ep0state = EP0_IN_DATA_PHASE;

1546

dev->ep0state = EP0_IN_DATA_PHASE;

1549

else

1547

else

1550

dev->ep0state = EP0_OUT_DATA_PHASE;

1548

dev->ep0state = EP0_OUT_DATA_PHASE;

1551

1549

1552

i = dev->driver->setup(&dev->gadget, &u.r);

1550

i = dev->driver->setup(&dev->gadget, &u.r);

1553

if (i < 0) {

1551

if (i < 0) {

1554

/* hardware automagic preventing STALL... */

1552

/* hardware automagic preventing STALL... */

1555

if (dev->req_config) {

1553

if (dev->req_config) {

1556

/* hardware sometimes neglects to tell

1554

/* hardware sometimes neglects to tell

1557

* tell us about config change events,

1555

* tell us about config change events,

1558

* so later ones may fail...

1556

* so later ones may fail...

1559

*/

1557

*/

1560

WARNING("config change %02x fail %d?\n",

1558

WARNING("config change %02x fail %d?\n",

1561

u.r.bRequest, i);

1559

u.r.bRequest, i);

1562

return;

1560

return;

1563

/* TODO experiment: if has_cfr,

1561

/* TODO experiment: if has_cfr,

1564

* hardware didn't ACK; maybe we

1562

* hardware didn't ACK; maybe we

1565

* could actually STALL!

1563

* could actually STALL!

1566

*/

1564

*/

1567

}

1565

}

1568

DBG(DBG_VERBOSE, "protocol STALL, "

1566

DBG(DBG_VERBOSE, "protocol STALL, "

1569

"%02x err %d\n", UDCCS0, i);

1567

"%02x err %d\n", UDCCS0, i);

1570

stall:

1568

stall:

1571

/* the watchdog timer helps deal with cases

1569

/* the watchdog timer helps deal with cases

1572

* where udc seems to clear FST wrongly, and

1570

* where udc seems to clear FST wrongly, and

1573

* then NAKs instead of STALLing.

1571

* then NAKs instead of STALLing.

1574

*/

1572

*/

1575

ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");

1573

ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");

1576

start_watchdog(dev);

1574

start_watchdog(dev);

1577

dev->ep0state = EP0_STALL;

1575

dev->ep0state = EP0_STALL;

1578

1576

1579

/* deferred i/o == no response yet */

1577

/* deferred i/o == no response yet */

1580

} else if (dev->req_pending) {

1578

} else if (dev->req_pending) {

1581

if (likely(dev->ep0state == EP0_IN_DATA_PHASE

1579

if (likely(dev->ep0state == EP0_IN_DATA_PHASE

1582

|| dev->req_std || u.r.wLength))

1580

|| dev->req_std || u.r.wLength))

1583

ep0start(dev, 0, "defer");

1581

ep0start(dev, 0, "defer");

1584

else

1582

else

1585

ep0start(dev, UDCCS0_IPR, "defer/IPR");

1583

ep0start(dev, UDCCS0_IPR, "defer/IPR");

1586

}

1584

}

1587

1585

1588

/* expect at least one data or status stage irq */

1586

/* expect at least one data or status stage irq */

1589

return;

1587

return;

1590

1588

1591

} else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))

1589

} else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))

1592

== (UDCCS0_OPR|UDCCS0_SA))) {

1590

== (UDCCS0_OPR|UDCCS0_SA))) {

1593

unsigned i;

1591

unsigned i;

1594

1592

1595

/* pxa210/250 erratum 131 for B0/B1 says RNE lies.

1593

/* pxa210/250 erratum 131 for B0/B1 says RNE lies.

1596

* still observed on a pxa255 a0.

1594

* still observed on a pxa255 a0.

1597

*/

1595

*/

1598

DBG(DBG_VERBOSE, "e131\n");

1596

DBG(DBG_VERBOSE, "e131\n");

1599

nuke(ep, -EPROTO);

1597

nuke(ep, -EPROTO);

1600

1598

1601

/* read SETUP data, but don't trust it too much */

1599

/* read SETUP data, but don't trust it too much */

1602

for (i = 0; i < 8; i++)

1600

for (i = 0; i < 8; i++)

1603

u.raw [i] = (u8) UDDR0;

1601

u.raw [i] = (u8) UDDR0;

1604

if ((u.r.bRequestType & USB_RECIP_MASK)

1602

if ((u.r.bRequestType & USB_RECIP_MASK)

1605

> USB_RECIP_OTHER)

1603

> USB_RECIP_OTHER)

1606

goto stall;

1604

goto stall;

1607

if (u.word [0] == 0 && u.word [1] == 0)

1605

if (u.word [0] == 0 && u.word [1] == 0)

1608

goto stall;

1606

goto stall;

1609

goto got_setup;

1607

goto got_setup;

1610

} else {

1608

} else {

1611

/* some random early IRQ:

1609

/* some random early IRQ:

1612

* - we acked FST

1610

* - we acked FST

1613

* - IPR cleared

1611

* - IPR cleared

1614

* - OPR got set, without SA (likely status stage)

1612

* - OPR got set, without SA (likely status stage)

1615

*/

1613

*/

1616

UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);

1614

UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);

1617

}

1615

}

1618

break;

1616

break;

1619

case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */

1617

case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */

1620

if (udccs0 & UDCCS0_OPR) {

1618

if (udccs0 & UDCCS0_OPR) {

1621

UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;

1619

UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;

1622

DBG(DBG_VERBOSE, "ep0in premature status\n");

1620

DBG(DBG_VERBOSE, "ep0in premature status\n");

1623

if (req)

1621

if (req)

1624

done(ep, req, 0);

1622

done(ep, req, 0);

1625

ep0_idle(dev);

1623

ep0_idle(dev);

1626

} else /* irq was IPR clearing */ {

1624

} else /* irq was IPR clearing */ {

1627

if (req) {

1625

if (req) {

1628

/* this IN packet might finish the request */

1626

/* this IN packet might finish the request */

1629

(void) write_ep0_fifo(ep, req);

1627

(void) write_ep0_fifo(ep, req);

1630

} /* else IN token before response was written */

1628

} /* else IN token before response was written */

1631

}

1629

}

1632

break;

1630

break;

1633

case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */

1631

case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */

1634

if (udccs0 & UDCCS0_OPR) {

1632

if (udccs0 & UDCCS0_OPR) {

1635

if (req) {

1633

if (req) {

1636

/* this OUT packet might finish the request */

1634

/* this OUT packet might finish the request */

1637

if (read_ep0_fifo(ep, req))

1635

if (read_ep0_fifo(ep, req))

1638

done(ep, req, 0);

1636

done(ep, req, 0);

1639

/* else more OUT packets expected */

1637

/* else more OUT packets expected */

1640

} /* else OUT token before read was issued */

1638

} /* else OUT token before read was issued */

1641

} else /* irq was IPR clearing */ {

1639

} else /* irq was IPR clearing */ {

1642

DBG(DBG_VERBOSE, "ep0out premature status\n");

1640

DBG(DBG_VERBOSE, "ep0out premature status\n");

1643

if (req)

1641

if (req)

1644

done(ep, req, 0);

1642

done(ep, req, 0);

1645

ep0_idle(dev);

1643

ep0_idle(dev);

1646

}

1644

}

1647

break;

1645

break;

1648

case EP0_END_XFER:

1646

case EP0_END_XFER:

1649

if (req)

1647

if (req)

1650

done(ep, req, 0);

1648

done(ep, req, 0);

1651

/* ack control-IN status (maybe in-zlp was skipped)

1649

/* ack control-IN status (maybe in-zlp was skipped)

1652

* also appears after some config change events.

1650

* also appears after some config change events.

1653

*/

1651

*/

1654

if (udccs0 & UDCCS0_OPR)

1652

if (udccs0 & UDCCS0_OPR)

1655

UDCCS0 = UDCCS0_OPR;

1653

UDCCS0 = UDCCS0_OPR;

1656

ep0_idle(dev);

1654

ep0_idle(dev);

1657

break;

1655

break;

1658

case EP0_STALL:

1656

case EP0_STALL:

1659

UDCCS0 = UDCCS0_FST;

1657

UDCCS0 = UDCCS0_FST;

1660

break;

1658

break;

1661

}

1659

}

1662

USIR0 = USIR0_IR0;

1660

USIR0 = USIR0_IR0;

1663

}

1661

}

1664

1662

1665

static void handle_ep(struct pxa25x_ep *ep)

1663

static void handle_ep(struct pxa25x_ep *ep)

1666

{

1664

{

1667

struct pxa25x_request *req;

1665

struct pxa25x_request *req;

1668

int is_in = ep->bEndpointAddress & USB_DIR_IN;

1666

int is_in = ep->bEndpointAddress & USB_DIR_IN;

1669

int completed;

1667

int completed;

1670

u32 udccs, tmp;

1668

u32 udccs, tmp;

1671

1669

1672

do {

1670

do {

1673

completed = 0;

1671

completed = 0;

1674

if (likely (!list_empty(&ep->queue)))

1672

if (likely (!list_empty(&ep->queue)))

1675

req = list_entry(ep->queue.next,

1673

req = list_entry(ep->queue.next,

1676

struct pxa25x_request, queue);

1674

struct pxa25x_request, queue);

1677

else

1675

else

1678

req = NULL;

1676

req = NULL;

1679

1677

1680

// TODO check FST handling

1678

// TODO check FST handling

1681

1679

1682

udccs = *ep->reg_udccs;

1680

udccs = *ep->reg_udccs;

1683

if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */

1681

if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */

1684

tmp = UDCCS_BI_TUR;

1682

tmp = UDCCS_BI_TUR;

1685

if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))

1683

if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))

1686

tmp |= UDCCS_BI_SST;

1684

tmp |= UDCCS_BI_SST;

1687

tmp &= udccs;

1685

tmp &= udccs;

1688

if (likely (tmp))

1686

if (likely (tmp))

1689

*ep->reg_udccs = tmp;

1687

*ep->reg_udccs = tmp;

1690

if (req && likely ((udccs & UDCCS_BI_TFS) != 0))

1688

if (req && likely ((udccs & UDCCS_BI_TFS) != 0))

1691

completed = write_fifo(ep, req);

1689

completed = write_fifo(ep, req);

1692

1690

1693

} else { /* irq from RPC (or for ISO, ROF) */

1691

} else { /* irq from RPC (or for ISO, ROF) */

1694

if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))

1692

if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))

1695

tmp = UDCCS_BO_SST | UDCCS_BO_DME;

1693

tmp = UDCCS_BO_SST | UDCCS_BO_DME;

1696

else

1694

else

1697

tmp = UDCCS_IO_ROF | UDCCS_IO_DME;

1695

tmp = UDCCS_IO_ROF | UDCCS_IO_DME;

1698

tmp &= udccs;

1696

tmp &= udccs;

1699

if (likely(tmp))

1697

if (likely(tmp))

1700

*ep->reg_udccs = tmp;

1698

*ep->reg_udccs = tmp;

1701

1699

1702

/* fifos can hold packets, ready for reading... */

1700

/* fifos can hold packets, ready for reading... */

1703

if (likely(req)) {

1701

if (likely(req)) {

1704

completed = read_fifo(ep, req);

1702

completed = read_fifo(ep, req);

1705

} else

1703

} else

1706

pio_irq_disable (ep->bEndpointAddress);

1704

pio_irq_disable (ep->bEndpointAddress);

1707

}

1705

}

1708

ep->pio_irqs++;

1706

ep->pio_irqs++;

1709

} while (completed);

1707

} while (completed);

1710

}

1708

}

1711

1709

1712

/*

1710

/*

1713

* pxa25x_udc_irq - interrupt handler

1711

* pxa25x_udc_irq - interrupt handler

1714

*

1712

*

1715

* avoid delays in ep0 processing. the control handshaking isn't always

1713

* avoid delays in ep0 processing. the control handshaking isn't always

1716

* under software control (pxa250c0 and the pxa255 are better), and delays

1714

* under software control (pxa250c0 and the pxa255 are better), and delays

1717

* could cause usb protocol errors.

1715

* could cause usb protocol errors.

1718

*/

1716

*/

1719

static irqreturn_t

1717

static irqreturn_t

1720

pxa25x_udc_irq(int irq, void *_dev)

1718

pxa25x_udc_irq(int irq, void *_dev)

1721

{

1719

{

1722

struct pxa25x_udc *dev = _dev;

1720

struct pxa25x_udc *dev = _dev;

1723

int handled;

1721

int handled;

1724

1722

1725

dev->stats.irqs++;

1723

dev->stats.irqs++;

1726

do {

1724

do {

1727

u32 udccr = UDCCR;

1725

u32 udccr = UDCCR;

1728

1726

1729

handled = 0;

1727

handled = 0;

1730

1728

1731

/* SUSpend Interrupt Request */

1729

/* SUSpend Interrupt Request */

1732

if (unlikely(udccr & UDCCR_SUSIR)) {

1730

if (unlikely(udccr & UDCCR_SUSIR)) {

1733

udc_ack_int_UDCCR(UDCCR_SUSIR);

1731

udc_ack_int_UDCCR(UDCCR_SUSIR);

1734

handled = 1;

1732

handled = 1;

1735

DBG(DBG_VERBOSE, "USB suspend\n");

1733

DBG(DBG_VERBOSE, "USB suspend\n");

1736

1734

1737

if (dev->gadget.speed != USB_SPEED_UNKNOWN

1735

if (dev->gadget.speed != USB_SPEED_UNKNOWN

1738

&& dev->driver

1736

&& dev->driver

1739

&& dev->driver->suspend)

1737

&& dev->driver->suspend)

1740

dev->driver->suspend(&dev->gadget);

1738

dev->driver->suspend(&dev->gadget);

1741

ep0_idle (dev);

1739

ep0_idle (dev);

1742

}

1740

}

1743

1741

1744

/* RESume Interrupt Request */

1742

/* RESume Interrupt Request */

1745

if (unlikely(udccr & UDCCR_RESIR)) {

1743

if (unlikely(udccr & UDCCR_RESIR)) {

1746

udc_ack_int_UDCCR(UDCCR_RESIR);

1744

udc_ack_int_UDCCR(UDCCR_RESIR);

1747

handled = 1;

1745

handled = 1;

1748

DBG(DBG_VERBOSE, "USB resume\n");

1746

DBG(DBG_VERBOSE, "USB resume\n");

1749

1747

1750

if (dev->gadget.speed != USB_SPEED_UNKNOWN

1748

if (dev->gadget.speed != USB_SPEED_UNKNOWN

1751

&& dev->driver

1749

&& dev->driver

1752

&& dev->driver->resume)

1750

&& dev->driver->resume)

1753

dev->driver->resume(&dev->gadget);

1751

dev->driver->resume(&dev->gadget);

1754

}

1752

}

1755

1753

1756

/* ReSeT Interrupt Request - USB reset */

1754

/* ReSeT Interrupt Request - USB reset */

1757

if (unlikely(udccr & UDCCR_RSTIR)) {

1755

if (unlikely(udccr & UDCCR_RSTIR)) {

1758

udc_ack_int_UDCCR(UDCCR_RSTIR);

1756

udc_ack_int_UDCCR(UDCCR_RSTIR);

1759

handled = 1;

1757

handled = 1;

1760

1758

1761

if ((UDCCR & UDCCR_UDA) == 0) {

1759

if ((UDCCR & UDCCR_UDA) == 0) {

1762

DBG(DBG_VERBOSE, "USB reset start\n");

1760

DBG(DBG_VERBOSE, "USB reset start\n");

1763

1761

1764

/* reset driver and endpoints,

1762

/* reset driver and endpoints,

1765

* in case that's not yet done

1763

* in case that's not yet done

1766

*/

1764

*/

1767

stop_activity (dev, dev->driver);

1765

stop_activity (dev, dev->driver);

1768

1766

1769

} else {

1767

} else {

1770

DBG(DBG_VERBOSE, "USB reset end\n");

1768

DBG(DBG_VERBOSE, "USB reset end\n");

1771

dev->gadget.speed = USB_SPEED_FULL;

1769

dev->gadget.speed = USB_SPEED_FULL;

1772

memset(&dev->stats, 0, sizeof dev->stats);

1770

memset(&dev->stats, 0, sizeof dev->stats);

1773

/* driver and endpoints are still reset */

1771

/* driver and endpoints are still reset */

1774

}

1772

}

1775

1773

1776

} else {

1774

} else {

1777

u32 usir0 = USIR0 & ~UICR0;

1775

u32 usir0 = USIR0 & ~UICR0;

1778

u32 usir1 = USIR1 & ~UICR1;

1776

u32 usir1 = USIR1 & ~UICR1;

1779

int i;

1777

int i;

1780

1778

1781

if (unlikely (!usir0 && !usir1))

1779

if (unlikely (!usir0 && !usir1))

1782

continue;

1780

continue;

1783

1781

1784

DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);

1782

DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);

1785

1783

1786

/* control traffic */

1784

/* control traffic */

1787

if (usir0 & USIR0_IR0) {

1785

if (usir0 & USIR0_IR0) {

1788

dev->ep[0].pio_irqs++;

1786

dev->ep[0].pio_irqs++;

1789

handle_ep0(dev);

1787

handle_ep0(dev);

1790

handled = 1;

1788

handled = 1;

1791

}

1789

}

1792

1790

1793

/* endpoint data transfers */

1791

/* endpoint data transfers */

1794

for (i = 0; i < 8; i++) {

1792

for (i = 0; i < 8; i++) {

1795

u32 tmp = 1 << i;

1793

u32 tmp = 1 << i;

1796

1794

1797

if (i && (usir0 & tmp)) {

1795

if (i && (usir0 & tmp)) {

1798

handle_ep(&dev->ep[i]);

1796

handle_ep(&dev->ep[i]);

1799

USIR0 |= tmp;

1797

USIR0 |= tmp;

1800

handled = 1;

1798

handled = 1;

1801

}

1799

}

1802

#ifndef CONFIG_USB_PXA25X_SMALL

1800

#ifndef CONFIG_USB_PXA25X_SMALL

1803

if (usir1 & tmp) {

1801

if (usir1 & tmp) {

1804

handle_ep(&dev->ep[i+8]);

1802

handle_ep(&dev->ep[i+8]);

1805

USIR1 |= tmp;

1803

USIR1 |= tmp;

1806

handled = 1;

1804

handled = 1;

1807

}

1805

}

1808

#endif

1806

#endif

1809

}

1807

}

1810

}

1808

}

1811

1809

1812

/* we could also ask for 1 msec SOF (SIR) interrupts */

1810

/* we could also ask for 1 msec SOF (SIR) interrupts */

1813

1811

1814

} while (handled);

1812

} while (handled);

1815

return IRQ_HANDLED;

1813

return IRQ_HANDLED;

1816

}

1814

}

1817

1815

1818

/*-------------------------------------------------------------------------*/

1816

/*-------------------------------------------------------------------------*/

1819

1817

1820

static void nop_release (struct device *dev)

1818

static void nop_release (struct device *dev)

1821

{

1819

{

1822

DMSG("%s %s\n", __func__, dev_name(dev));

1820

DMSG("%s %s\n", __func__, dev_name(dev));

1823

}

1821

}

1824

1822

1825

/* this uses load-time allocation and initialization (instead of

1823

/* this uses load-time allocation and initialization (instead of

1826

* doing it at run-time) to save code, eliminate fault paths, and

1824

* doing it at run-time) to save code, eliminate fault paths, and

1827

* be more obviously correct.

1825

* be more obviously correct.

1828

*/

1826

*/

1829

static struct pxa25x_udc memory = {

1827

static struct pxa25x_udc memory = {

1830

.gadget = {

1828

.gadget = {

1831

.ops = &pxa25x_udc_ops,

1829

.ops = &pxa25x_udc_ops,

1832

.ep0 = &memory.ep[0].ep,

1830

.ep0 = &memory.ep[0].ep,

1833

.name = driver_name,

1831

.name = driver_name,

1834

.dev = {

1832

.dev = {

1835

.init_name = "gadget",

1833

.init_name = "gadget",

1836

.release = nop_release,

1834

.release = nop_release,

1837

},

1835

},

1838

},

1836

},

1839

1837

1840

/* control endpoint */

1838

/* control endpoint */

1841

.ep[0] = {

1839

.ep[0] = {

1842

.ep = {

1840

.ep = {

1843

.name = ep0name,

1841

.name = ep0name,

1844

.ops = &pxa25x_ep_ops,

1842

.ops = &pxa25x_ep_ops,

1845

.maxpacket = EP0_FIFO_SIZE,

1843

.maxpacket = EP0_FIFO_SIZE,

1846

},

1844

},

1847

.dev = &memory,

1845

.dev = &memory,

1848

.reg_udccs = &UDCCS0,

1846

.reg_udccs = &UDCCS0,

1849

.reg_uddr = &UDDR0,

1847

.reg_uddr = &UDDR0,

1850

},

1848

},

1851

1849

1852

/* first group of endpoints */

1850

/* first group of endpoints */

1853

.ep[1] = {

1851

.ep[1] = {

1854

.ep = {

1852

.ep = {

1855

.name = "ep1in-bulk",

1853

.name = "ep1in-bulk",

1856

.ops = &pxa25x_ep_ops,

1854

.ops = &pxa25x_ep_ops,

1857

.maxpacket = BULK_FIFO_SIZE,

1855

.maxpacket = BULK_FIFO_SIZE,

1858

},

1856

},

1859

.dev = &memory,

1857

.dev = &memory,

1860

.fifo_size = BULK_FIFO_SIZE,

1858

.fifo_size = BULK_FIFO_SIZE,

1861

.bEndpointAddress = USB_DIR_IN | 1,

1859

.bEndpointAddress = USB_DIR_IN | 1,

1862

.bmAttributes = USB_ENDPOINT_XFER_BULK,

1860

.bmAttributes = USB_ENDPOINT_XFER_BULK,

1863

.reg_udccs = &UDCCS1,

1861

.reg_udccs = &UDCCS1,

1864

.reg_uddr = &UDDR1,

1862

.reg_uddr = &UDDR1,

1865

},

1863

},

1866

.ep[2] = {

1864

.ep[2] = {

1867

.ep = {

1865

.ep = {

1868

.name = "ep2out-bulk",

1866

.name = "ep2out-bulk",

1869

.ops = &pxa25x_ep_ops,

1867

.ops = &pxa25x_ep_ops,

1870

.maxpacket = BULK_FIFO_SIZE,

1868

.maxpacket = BULK_FIFO_SIZE,

1871

},

1869

},

1872

.dev = &memory,

1870

.dev = &memory,

1873

.fifo_size = BULK_FIFO_SIZE,

1871

.fifo_size = BULK_FIFO_SIZE,

1874

.bEndpointAddress = 2,

1872

.bEndpointAddress = 2,

1875

.bmAttributes = USB_ENDPOINT_XFER_BULK,

1873

.bmAttributes = USB_ENDPOINT_XFER_BULK,

1876

.reg_udccs = &UDCCS2,

1874

.reg_udccs = &UDCCS2,

1877

.reg_ubcr = &UBCR2,

1875

.reg_ubcr = &UBCR2,

1878

.reg_uddr = &UDDR2,

1876

.reg_uddr = &UDDR2,

1879

},

1877

},

1880

#ifndef CONFIG_USB_PXA25X_SMALL

1878

#ifndef CONFIG_USB_PXA25X_SMALL

1881

.ep[3] = {

1879

.ep[3] = {

1882

.ep = {

1880

.ep = {

1883

.name = "ep3in-iso",

1881

.name = "ep3in-iso",

1884

.ops = &pxa25x_ep_ops,

1882

.ops = &pxa25x_ep_ops,

1885

.maxpacket = ISO_FIFO_SIZE,

1883

.maxpacket = ISO_FIFO_SIZE,

1886

},

1884

},

1887

.dev = &memory,

1885

.dev = &memory,

1888

.fifo_size = ISO_FIFO_SIZE,

1886

.fifo_size = ISO_FIFO_SIZE,

1889

.bEndpointAddress = USB_DIR_IN | 3,

1887

.bEndpointAddress = USB_DIR_IN | 3,

1890

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

1888

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

1891

.reg_udccs = &UDCCS3,

1889

.reg_udccs = &UDCCS3,

1892

.reg_uddr = &UDDR3,

1890

.reg_uddr = &UDDR3,

1893

},

1891

},

1894

.ep[4] = {

1892

.ep[4] = {

1895

.ep = {

1893

.ep = {

1896

.name = "ep4out-iso",

1894

.name = "ep4out-iso",

1897

.ops = &pxa25x_ep_ops,

1895

.ops = &pxa25x_ep_ops,

1898

.maxpacket = ISO_FIFO_SIZE,

1896

.maxpacket = ISO_FIFO_SIZE,

1899

},

1897

},

1900

.dev = &memory,

1898

.dev = &memory,

1901

.fifo_size = ISO_FIFO_SIZE,

1899

.fifo_size = ISO_FIFO_SIZE,

1902

.bEndpointAddress = 4,

1900

.bEndpointAddress = 4,

1903

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

1901

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

1904

.reg_udccs = &UDCCS4,

1902

.reg_udccs = &UDCCS4,

1905

.reg_ubcr = &UBCR4,

1903

.reg_ubcr = &UBCR4,

1906

.reg_uddr = &UDDR4,

1904

.reg_uddr = &UDDR4,

1907

},

1905

},

1908

.ep[5] = {

1906

.ep[5] = {

1909

.ep = {

1907

.ep = {

1910

.name = "ep5in-int",

1908

.name = "ep5in-int",

1911

.ops = &pxa25x_ep_ops,

1909

.ops = &pxa25x_ep_ops,

1912

.maxpacket = INT_FIFO_SIZE,

1910

.maxpacket = INT_FIFO_SIZE,

1913

},

1911

},

1914

.dev = &memory,

1912

.dev = &memory,

1915

.fifo_size = INT_FIFO_SIZE,

1913

.fifo_size = INT_FIFO_SIZE,

1916

.bEndpointAddress = USB_DIR_IN | 5,

1914

.bEndpointAddress = USB_DIR_IN | 5,

1917

.bmAttributes = USB_ENDPOINT_XFER_INT,

1915

.bmAttributes = USB_ENDPOINT_XFER_INT,

1918

.reg_udccs = &UDCCS5,

1916

.reg_udccs = &UDCCS5,

1919

.reg_uddr = &UDDR5,

1917

.reg_uddr = &UDDR5,

1920

},

1918

},

1921

1919

1922

/* second group of endpoints */

1920

/* second group of endpoints */

1923

.ep[6] = {

1921

.ep[6] = {

1924

.ep = {

1922

.ep = {

1925

.name = "ep6in-bulk",

1923

.name = "ep6in-bulk",

1926

.ops = &pxa25x_ep_ops,

1924

.ops = &pxa25x_ep_ops,

1927

.maxpacket = BULK_FIFO_SIZE,

1925

.maxpacket = BULK_FIFO_SIZE,

1928

},

1926

},

1929

.dev = &memory,

1927

.dev = &memory,

1930

.fifo_size = BULK_FIFO_SIZE,

1928

.fifo_size = BULK_FIFO_SIZE,

1931

.bEndpointAddress = USB_DIR_IN | 6,

1929

.bEndpointAddress = USB_DIR_IN | 6,

1932

.bmAttributes = USB_ENDPOINT_XFER_BULK,

1930

.bmAttributes = USB_ENDPOINT_XFER_BULK,

1933

.reg_udccs = &UDCCS6,

1931

.reg_udccs = &UDCCS6,

1934

.reg_uddr = &UDDR6,

1932

.reg_uddr = &UDDR6,

1935

},

1933

},

1936

.ep[7] = {

1934

.ep[7] = {

1937

.ep = {

1935

.ep = {

1938

.name = "ep7out-bulk",

1936

.name = "ep7out-bulk",

1939

.ops = &pxa25x_ep_ops,

1937

.ops = &pxa25x_ep_ops,

1940

.maxpacket = BULK_FIFO_SIZE,

1938

.maxpacket = BULK_FIFO_SIZE,

1941

},

1939

},

1942

.dev = &memory,

1940

.dev = &memory,

1943

.fifo_size = BULK_FIFO_SIZE,

1941

.fifo_size = BULK_FIFO_SIZE,

1944

.bEndpointAddress = 7,

1942

.bEndpointAddress = 7,

1945

.bmAttributes = USB_ENDPOINT_XFER_BULK,

1943

.bmAttributes = USB_ENDPOINT_XFER_BULK,

1946

.reg_udccs = &UDCCS7,

1944

.reg_udccs = &UDCCS7,

1947

.reg_ubcr = &UBCR7,

1945

.reg_ubcr = &UBCR7,

1948

.reg_uddr = &UDDR7,

1946

.reg_uddr = &UDDR7,

1949

},

1947

},

1950

.ep[8] = {

1948

.ep[8] = {

1951

.ep = {

1949

.ep = {

1952

.name = "ep8in-iso",

1950

.name = "ep8in-iso",

1953

.ops = &pxa25x_ep_ops,

1951

.ops = &pxa25x_ep_ops,

1954

.maxpacket = ISO_FIFO_SIZE,

1952

.maxpacket = ISO_FIFO_SIZE,

1955

},

1953

},

1956

.dev = &memory,

1954

.dev = &memory,

1957

.fifo_size = ISO_FIFO_SIZE,

1955

.fifo_size = ISO_FIFO_SIZE,

1958

.bEndpointAddress = USB_DIR_IN | 8,

1956

.bEndpointAddress = USB_DIR_IN | 8,

1959

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

1957

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

1960

.reg_udccs = &UDCCS8,

1958

.reg_udccs = &UDCCS8,

1961

.reg_uddr = &UDDR8,

1959

.reg_uddr = &UDDR8,

1962

},

1960

},

1963

.ep[9] = {

1961

.ep[9] = {

1964

.ep = {

1962

.ep = {

1965

.name = "ep9out-iso",

1963

.name = "ep9out-iso",

1966

.ops = &pxa25x_ep_ops,

1964

.ops = &pxa25x_ep_ops,

1967

.maxpacket = ISO_FIFO_SIZE,

1965

.maxpacket = ISO_FIFO_SIZE,

1968

},

1966

},

1969

.dev = &memory,

1967

.dev = &memory,

1970

.fifo_size = ISO_FIFO_SIZE,

1968

.fifo_size = ISO_FIFO_SIZE,

1971

.bEndpointAddress = 9,

1969

.bEndpointAddress = 9,

1972

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

1970

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

1973

.reg_udccs = &UDCCS9,

1971

.reg_udccs = &UDCCS9,

1974

.reg_ubcr = &UBCR9,

1972

.reg_ubcr = &UBCR9,

1975

.reg_uddr = &UDDR9,

1973

.reg_uddr = &UDDR9,

1976

},

1974

},

1977

.ep[10] = {

1975

.ep[10] = {

1978

.ep = {

1976

.ep = {

1979

.name = "ep10in-int",

1977

.name = "ep10in-int",

1980

.ops = &pxa25x_ep_ops,

1978

.ops = &pxa25x_ep_ops,

1981

.maxpacket = INT_FIFO_SIZE,

1979

.maxpacket = INT_FIFO_SIZE,

1982

},

1980

},

1983

.dev = &memory,

1981

.dev = &memory,

1984

.fifo_size = INT_FIFO_SIZE,

1982

.fifo_size = INT_FIFO_SIZE,

1985

.bEndpointAddress = USB_DIR_IN | 10,

1983

.bEndpointAddress = USB_DIR_IN | 10,

1986

.bmAttributes = USB_ENDPOINT_XFER_INT,

1984

.bmAttributes = USB_ENDPOINT_XFER_INT,

1987

.reg_udccs = &UDCCS10,

1985

.reg_udccs = &UDCCS10,

1988

.reg_uddr = &UDDR10,

1986

.reg_uddr = &UDDR10,

1989

},

1987

},

1990

1988

1991

/* third group of endpoints */

1989

/* third group of endpoints */

1992

.ep[11] = {

1990

.ep[11] = {

1993

.ep = {

1991

.ep = {

1994

.name = "ep11in-bulk",

1992

.name = "ep11in-bulk",

1995

.ops = &pxa25x_ep_ops,

1993

.ops = &pxa25x_ep_ops,

1996

.maxpacket = BULK_FIFO_SIZE,

1994

.maxpacket = BULK_FIFO_SIZE,

1997

},

1995

},

1998

.dev = &memory,

1996

.dev = &memory,

1999

.fifo_size = BULK_FIFO_SIZE,

1997

.fifo_size = BULK_FIFO_SIZE,

2000

.bEndpointAddress = USB_DIR_IN | 11,

1998

.bEndpointAddress = USB_DIR_IN | 11,

2001

.bmAttributes = USB_ENDPOINT_XFER_BULK,

1999

.bmAttributes = USB_ENDPOINT_XFER_BULK,

2002

.reg_udccs = &UDCCS11,

2000

.reg_udccs = &UDCCS11,

2003

.reg_uddr = &UDDR11,

2001

.reg_uddr = &UDDR11,

2004

},

2002

},

2005

.ep[12] = {

2003

.ep[12] = {

2006

.ep = {

2004

.ep = {

2007

.name = "ep12out-bulk",

2005

.name = "ep12out-bulk",

2008

.ops = &pxa25x_ep_ops,

2006

.ops = &pxa25x_ep_ops,

2009

.maxpacket = BULK_FIFO_SIZE,

2007

.maxpacket = BULK_FIFO_SIZE,

2010

},

2008

},

2011

.dev = &memory,

2009

.dev = &memory,

2012

.fifo_size = BULK_FIFO_SIZE,

2010

.fifo_size = BULK_FIFO_SIZE,

2013

.bEndpointAddress = 12,

2011

.bEndpointAddress = 12,

2014

.bmAttributes = USB_ENDPOINT_XFER_BULK,

2012

.bmAttributes = USB_ENDPOINT_XFER_BULK,

2015

.reg_udccs = &UDCCS12,

2013

.reg_udccs = &UDCCS12,

2016

.reg_ubcr = &UBCR12,

2014

.reg_ubcr = &UBCR12,

2017

.reg_uddr = &UDDR12,

2015

.reg_uddr = &UDDR12,

2018

},

2016

},

2019

.ep[13] = {

2017

.ep[13] = {

2020

.ep = {

2018

.ep = {

2021

.name = "ep13in-iso",

2019

.name = "ep13in-iso",

2022

.ops = &pxa25x_ep_ops,

2020

.ops = &pxa25x_ep_ops,

2023

.maxpacket = ISO_FIFO_SIZE,

2021

.maxpacket = ISO_FIFO_SIZE,

2024

},

2022

},

2025

.dev = &memory,

2023

.dev = &memory,

2026

.fifo_size = ISO_FIFO_SIZE,

2024

.fifo_size = ISO_FIFO_SIZE,

2027

.bEndpointAddress = USB_DIR_IN | 13,

2025

.bEndpointAddress = USB_DIR_IN | 13,

2028

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

2026

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

2029

.reg_udccs = &UDCCS13,

2027

.reg_udccs = &UDCCS13,

2030

.reg_uddr = &UDDR13,

2028

.reg_uddr = &UDDR13,

2031

},

2029

},

2032

.ep[14] = {

2030

.ep[14] = {

2033

.ep = {

2031

.ep = {

2034

.name = "ep14out-iso",

2032

.name = "ep14out-iso",

2035

.ops = &pxa25x_ep_ops,

2033

.ops = &pxa25x_ep_ops,

2036

.maxpacket = ISO_FIFO_SIZE,

2034

.maxpacket = ISO_FIFO_SIZE,

2037

},

2035

},

2038

.dev = &memory,

2036

.dev = &memory,

2039

.fifo_size = ISO_FIFO_SIZE,

2037

.fifo_size = ISO_FIFO_SIZE,

2040

.bEndpointAddress = 14,

2038

.bEndpointAddress = 14,

2041

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

2039

.bmAttributes = USB_ENDPOINT_XFER_ISOC,

2042

.reg_udccs = &UDCCS14,

2040

.reg_udccs = &UDCCS14,

2043

.reg_ubcr = &UBCR14,

2041

.reg_ubcr = &UBCR14,

2044

.reg_uddr = &UDDR14,

2042

.reg_uddr = &UDDR14,

2045

},

2043

},

2046

.ep[15] = {

2044

.ep[15] = {

2047

.ep = {

2045

.ep = {

2048

.name = "ep15in-int",

2046

.name = "ep15in-int",

2049

.ops = &pxa25x_ep_ops,

2047

.ops = &pxa25x_ep_ops,

2050

.maxpacket = INT_FIFO_SIZE,

2048

.maxpacket = INT_FIFO_SIZE,

2051

},

2049

},

2052

.dev = &memory,

2050

.dev = &memory,

2053

.fifo_size = INT_FIFO_SIZE,

2051

.fifo_size = INT_FIFO_SIZE,

2054

.bEndpointAddress = USB_DIR_IN | 15,

2052

.bEndpointAddress = USB_DIR_IN | 15,

2055

.bmAttributes = USB_ENDPOINT_XFER_INT,

2053

.bmAttributes = USB_ENDPOINT_XFER_INT,

2056

.reg_udccs = &UDCCS15,

2054

.reg_udccs = &UDCCS15,

2057

.reg_uddr = &UDDR15,

2055

.reg_uddr = &UDDR15,

2058

},

2056

},

2059

#endif /* !CONFIG_USB_PXA25X_SMALL */

2057

#endif /* !CONFIG_USB_PXA25X_SMALL */

2060

};

2058

};

2061

2059

2062

#define CP15R0_VENDOR_MASK 0xffffe000

2060

#define CP15R0_VENDOR_MASK 0xffffe000

2063

2061

2064

#if defined(CONFIG_ARCH_PXA)

2062

#if defined(CONFIG_ARCH_PXA)

2065

#define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */

2063

#define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */

2066

2064

2067

#elif defined(CONFIG_ARCH_IXP4XX)

2065

#elif defined(CONFIG_ARCH_IXP4XX)

2068

#define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */

2066

#define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */

2069

2067

2070

#endif

2068

#endif

2071

2069

2072

#define CP15R0_PROD_MASK 0x000003f0

2070

#define CP15R0_PROD_MASK 0x000003f0

2073

#define PXA25x 0x00000100 /* and PXA26x */

2071

#define PXA25x 0x00000100 /* and PXA26x */

2074

#define PXA210 0x00000120

2072

#define PXA210 0x00000120

2075

2073

2076

#define CP15R0_REV_MASK 0x0000000f

2074

#define CP15R0_REV_MASK 0x0000000f

2077

2075

2078

#define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)

2076

#define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)

2079

2077

2080

#define PXA255_A0 0x00000106 /* or PXA260_B1 */

2078

#define PXA255_A0 0x00000106 /* or PXA260_B1 */

2081

#define PXA250_C0 0x00000105 /* or PXA26x_B0 */

2079

#define PXA250_C0 0x00000105 /* or PXA26x_B0 */

2082

#define PXA250_B2 0x00000104

2080

#define PXA250_B2 0x00000104

2083

#define PXA250_B1 0x00000103 /* or PXA260_A0 */

2081

#define PXA250_B1 0x00000103 /* or PXA260_A0 */

2084

#define PXA250_B0 0x00000102

2082

#define PXA250_B0 0x00000102

2085

#define PXA250_A1 0x00000101

2083

#define PXA250_A1 0x00000101

2086

#define PXA250_A0 0x00000100

2084

#define PXA250_A0 0x00000100

2087

2085

2088

#define PXA210_C0 0x00000125

2086

#define PXA210_C0 0x00000125

2089

#define PXA210_B2 0x00000124

2087

#define PXA210_B2 0x00000124

2090

#define PXA210_B1 0x00000123

2088

#define PXA210_B1 0x00000123

2091

#define PXA210_B0 0x00000122

2089

#define PXA210_B0 0x00000122

2092

#define IXP425_A0 0x000001c1

2090

#define IXP425_A0 0x000001c1

2093

#define IXP425_B0 0x000001f1

2091

#define IXP425_B0 0x000001f1

2094

#define IXP465_AD 0x00000200

2092

#define IXP465_AD 0x00000200

2095

2093

2096

/*

2094

/*

2097

* probe - binds to the platform device

2095

* probe - binds to the platform device

2098

*/

2096

*/

2099

static int __init pxa25x_udc_probe(struct platform_device *pdev)

2097

static int __init pxa25x_udc_probe(struct platform_device *pdev)

2100

{

2098

{

2101

struct pxa25x_udc *dev = &memory;

2099

struct pxa25x_udc *dev = &memory;

2102

int retval, irq;

2100

int retval, irq;

2103

u32 chiprev;

2101

u32 chiprev;

2104

2102

2105

/* insist on Intel/ARM/XScale */

2103

/* insist on Intel/ARM/XScale */

2106

asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));

2104

asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));

2107

if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {

2105

if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {

2108

pr_err("%s: not XScale!\n", driver_name);

2106

pr_err("%s: not XScale!\n", driver_name);

2109

return -ENODEV;

2107

return -ENODEV;

2110

}

2108

}

2111

2109

2112

/* trigger chiprev-specific logic */

2110

/* trigger chiprev-specific logic */

2113

switch (chiprev & CP15R0_PRODREV_MASK) {

2111

switch (chiprev & CP15R0_PRODREV_MASK) {

2114

#if defined(CONFIG_ARCH_PXA)

2112

#if defined(CONFIG_ARCH_PXA)

2115

case PXA255_A0:

2113

case PXA255_A0:

2116

dev->has_cfr = 1;

2114

dev->has_cfr = 1;

2117

break;

2115

break;

2118

case PXA250_A0:

2116

case PXA250_A0:

2119

case PXA250_A1:

2117

case PXA250_A1:

2120

/* A0/A1 "not released"; ep 13, 15 unusable */

2118

/* A0/A1 "not released"; ep 13, 15 unusable */

2121

/* fall through */

2119

/* fall through */

2122

case PXA250_B2: case PXA210_B2:

2120

case PXA250_B2: case PXA210_B2:

2123

case PXA250_B1: case PXA210_B1:

2121

case PXA250_B1: case PXA210_B1:

2124

case PXA250_B0: case PXA210_B0:

2122

case PXA250_B0: case PXA210_B0:

2125

/* OUT-DMA is broken ... */

2123

/* OUT-DMA is broken ... */

2126

/* fall through */

2124

/* fall through */

2127

case PXA250_C0: case PXA210_C0:

2125

case PXA250_C0: case PXA210_C0:

2128

break;

2126

break;

2129

#elif defined(CONFIG_ARCH_IXP4XX)

2127

#elif defined(CONFIG_ARCH_IXP4XX)

2130

case IXP425_A0:

2128

case IXP425_A0:

2131

case IXP425_B0:

2129

case IXP425_B0:

2132

case IXP465_AD:

2130

case IXP465_AD:

2133

dev->has_cfr = 1;

2131

dev->has_cfr = 1;

2134

break;

2132

break;

2135

#endif

2133

#endif

2136

default:

2134

default:

2137

pr_err("%s: unrecognized processor: %08x\n",

2135

pr_err("%s: unrecognized processor: %08x\n",

2138

driver_name, chiprev);

2136

driver_name, chiprev);

2139

/* iop3xx, ixp4xx, ... */

2137

/* iop3xx, ixp4xx, ... */

2140

return -ENODEV;

2138

return -ENODEV;

2141

}

2139

}

2142

2140

2143

irq = platform_get_irq(pdev, 0);

2141

irq = platform_get_irq(pdev, 0);

2144

if (irq < 0)

2142

if (irq < 0)

2145

return -ENODEV;

2143

return -ENODEV;

2146

2144

2147

dev->clk = clk_get(&pdev->dev, NULL);

2145

dev->clk = clk_get(&pdev->dev, NULL);

2148

if (IS_ERR(dev->clk)) {

2146

if (IS_ERR(dev->clk)) {

2149

retval = PTR_ERR(dev->clk);

2147

retval = PTR_ERR(dev->clk);

2150

goto err_clk;

2148

goto err_clk;

2151

}

2149

}

2152

2150

2153

pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,

2151

pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,

2154

dev->has_cfr ? "" : " (!cfr)",

2152

dev->has_cfr ? "" : " (!cfr)",

2155

SIZE_STR "(pio)"

2153

SIZE_STR "(pio)"

2156

);

2154

);

2157

2155

2158

/* other non-static parts of init */

2156

/* other non-static parts of init */

2159

dev->dev = &pdev->dev;

2157

dev->dev = &pdev->dev;

2160

dev->mach = pdev->dev.platform_data;

2158

dev->mach = pdev->dev.platform_data;

2161

2159

2162

dev->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);

2160

dev->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);

2163

2161

2164

if (gpio_is_valid(dev->mach->gpio_pullup)) {

2162

if (gpio_is_valid(dev->mach->gpio_pullup)) {

2165

if ((retval = gpio_request(dev->mach->gpio_pullup,

2163

if ((retval = gpio_request(dev->mach->gpio_pullup,

2166

"pca25x_udc GPIO PULLUP"))) {

2164

"pca25x_udc GPIO PULLUP"))) {

2167

dev_dbg(&pdev->dev,

2165

dev_dbg(&pdev->dev,

2168

"can't get pullup gpio %d, err: %d\n",

2166

"can't get pullup gpio %d, err: %d\n",

2169

dev->mach->gpio_pullup, retval);

2167

dev->mach->gpio_pullup, retval);

2170

goto err_gpio_pullup;

2168

goto err_gpio_pullup;

2171

}

2169

}

2172

gpio_direction_output(dev->mach->gpio_pullup, 0);

2170

gpio_direction_output(dev->mach->gpio_pullup, 0);

2173

}

2171

}

2174

2172

2175

init_timer(&dev->timer);

2173

init_timer(&dev->timer);

2176

dev->timer.function = udc_watchdog;

2174

dev->timer.function = udc_watchdog;

2177

dev->timer.data = (unsigned long) dev;

2175

dev->timer.data = (unsigned long) dev;

2178

2176

2179

device_initialize(&dev->gadget.dev);

2177

device_initialize(&dev->gadget.dev);

2180

dev->gadget.dev.parent = &pdev->dev;

2178

dev->gadget.dev.parent = &pdev->dev;

2181

dev->gadget.dev.dma_mask = pdev->dev.dma_mask;

2179

dev->gadget.dev.dma_mask = pdev->dev.dma_mask;

2182

2180

2183

the_controller = dev;

2181

the_controller = dev;

2184

platform_set_drvdata(pdev, dev);

2182

platform_set_drvdata(pdev, dev);

2185

2183

2186

udc_disable(dev);

2184

udc_disable(dev);

2187

udc_reinit(dev);

2185

udc_reinit(dev);

2188

2186

2189

dev->vbus = 0;

2187

dev->vbus = 0;

2190

2188

2191

/* irq setup after old hardware state is cleaned up */

2189

/* irq setup after old hardware state is cleaned up */

2192

retval = request_irq(irq, pxa25x_udc_irq,

2190

retval = request_irq(irq, pxa25x_udc_irq,

2193

0, driver_name, dev);

2191

0, driver_name, dev);

2194

if (retval != 0) {

2192

if (retval != 0) {

2195

pr_err("%s: can't get irq %d, err %d\n",

2193

pr_err("%s: can't get irq %d, err %d\n",

2196

driver_name, irq, retval);

2194

driver_name, irq, retval);

2197

goto err_irq1;

2195

goto err_irq1;

2198

}

2196

}

2199

dev->got_irq = 1;

2197

dev->got_irq = 1;

2200

2198

2201

#ifdef CONFIG_ARCH_LUBBOCK

2199

#ifdef CONFIG_ARCH_LUBBOCK

2202

if (machine_is_lubbock()) {

2200

if (machine_is_lubbock()) {

2203

retval = request_irq(LUBBOCK_USB_DISC_IRQ, lubbock_vbus_irq,

2201

retval = request_irq(LUBBOCK_USB_DISC_IRQ, lubbock_vbus_irq,

2204

0, driver_name, dev);

2202

0, driver_name, dev);

2205

if (retval != 0) {

2203

if (retval != 0) {

2206

pr_err("%s: can't get irq %i, err %d\n",

2204

pr_err("%s: can't get irq %i, err %d\n",

2207

driver_name, LUBBOCK_USB_DISC_IRQ, retval);

2205

driver_name, LUBBOCK_USB_DISC_IRQ, retval);

2208

goto err_irq_lub;

2206

goto err_irq_lub;

2209

}

2207

}

2210

retval = request_irq(LUBBOCK_USB_IRQ, lubbock_vbus_irq,

2208

retval = request_irq(LUBBOCK_USB_IRQ, lubbock_vbus_irq,

2211

0, driver_name, dev);

2209

0, driver_name, dev);

2212

if (retval != 0) {

2210

if (retval != 0) {

2213

pr_err("%s: can't get irq %i, err %d\n",

2211

pr_err("%s: can't get irq %i, err %d\n",

2214

driver_name, LUBBOCK_USB_IRQ, retval);

2212

driver_name, LUBBOCK_USB_IRQ, retval);

2215

goto lubbock_fail0;

2213

goto lubbock_fail0;

2216

}

2214

}

2217

} else

2215

} else

2218

#endif

2216

#endif

2219

create_debug_files(dev);

2217

create_debug_files(dev);

2220

2218

2221

retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);

2219

retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);

2222

if (!retval)

2220

if (!retval)

2223

return retval;

2221

return retval;

2224

2222

2225

remove_debug_files(dev);

2223

remove_debug_files(dev);

2226

#ifdef CONFIG_ARCH_LUBBOCK

2224

#ifdef CONFIG_ARCH_LUBBOCK

2227

lubbock_fail0:

2225

lubbock_fail0:

2228

free_irq(LUBBOCK_USB_DISC_IRQ, dev);

2226

free_irq(LUBBOCK_USB_DISC_IRQ, dev);

2229

err_irq_lub:

2227

err_irq_lub:

2230

free_irq(irq, dev);

2228

free_irq(irq, dev);

2231

#endif

2229

#endif

2232

err_irq1:

2230

err_irq1:

2233

if (gpio_is_valid(dev->mach->gpio_pullup))

2231

if (gpio_is_valid(dev->mach->gpio_pullup))

2234

gpio_free(dev->mach->gpio_pullup);

2232

gpio_free(dev->mach->gpio_pullup);

2235

err_gpio_pullup:

2233

err_gpio_pullup:

2236

if (!IS_ERR_OR_NULL(dev->transceiver)) {

2234

if (!IS_ERR_OR_NULL(dev->transceiver)) {

2237

usb_put_phy(dev->transceiver);

2235

usb_put_phy(dev->transceiver);

2238

dev->transceiver = NULL;

2236

dev->transceiver = NULL;

2239

}

2237

}

2240

clk_put(dev->clk);

2238

clk_put(dev->clk);

2241

err_clk:

2239

err_clk:

2242

return retval;

2240

return retval;

2243

}

2241

}

2244

2242

2245

static void pxa25x_udc_shutdown(struct platform_device *_dev)

2243

static void pxa25x_udc_shutdown(struct platform_device *_dev)

2246

{

2244

{

2247

pullup_off();

2245

pullup_off();

2248

}

2246

}

2249

2247

2250

static int __exit pxa25x_udc_remove(struct platform_device *pdev)

2248

static int __exit pxa25x_udc_remove(struct platform_device *pdev)

2251

{

2249

{

2252

struct pxa25x_udc *dev = platform_get_drvdata(pdev);

2250

struct pxa25x_udc *dev = platform_get_drvdata(pdev);

2253

2251

2254

usb_del_gadget_udc(&dev->gadget);

2252

usb_del_gadget_udc(&dev->gadget);

2255

if (dev->driver)

2253

if (dev->driver)

2256

return -EBUSY;

2254

return -EBUSY;

2257

2255

2258

dev->pullup = 0;

2256

dev->pullup = 0;

2259

pullup(dev);

2257

pullup(dev);

2260

2258

2261

remove_debug_files(dev);

2259

remove_debug_files(dev);

2262

2260

2263

if (dev->got_irq) {

2261

if (dev->got_irq) {

2264

free_irq(platform_get_irq(pdev, 0), dev);

2262

free_irq(platform_get_irq(pdev, 0), dev);

2265

dev->got_irq = 0;

2263

dev->got_irq = 0;

2266

}

2264

}

2267

#ifdef CONFIG_ARCH_LUBBOCK

2265

#ifdef CONFIG_ARCH_LUBBOCK

2268

if (machine_is_lubbock()) {

2266

if (machine_is_lubbock()) {

2269

free_irq(LUBBOCK_USB_DISC_IRQ, dev);

2267

free_irq(LUBBOCK_USB_DISC_IRQ, dev);

2270

free_irq(LUBBOCK_USB_IRQ, dev);

2268

free_irq(LUBBOCK_USB_IRQ, dev);

2271

}

2269

}

2272

#endif

2270

#endif

2273

if (gpio_is_valid(dev->mach->gpio_pullup))

2271

if (gpio_is_valid(dev->mach->gpio_pullup))

2274

gpio_free(dev->mach->gpio_pullup);

2272

gpio_free(dev->mach->gpio_pullup);

2275

2273

2276

clk_put(dev->clk);

2274

clk_put(dev->clk);

2277

2275

2278

if (!IS_ERR_OR_NULL(dev->transceiver)) {

2276

if (!IS_ERR_OR_NULL(dev->transceiver)) {

2279

usb_put_phy(dev->transceiver);

2277

usb_put_phy(dev->transceiver);

2280

dev->transceiver = NULL;

2278

dev->transceiver = NULL;

2281

}

2279

}

2282

2280

2283

platform_set_drvdata(pdev, NULL);

2281

platform_set_drvdata(pdev, NULL);

2284

the_controller = NULL;

2282

the_controller = NULL;

2285

return 0;

2283

return 0;

2286

}

2284

}

2287

2285

2288

/*-------------------------------------------------------------------------*/

2286

/*-------------------------------------------------------------------------*/

2289

2287

2290

#ifdef CONFIG_PM

2288

#ifdef CONFIG_PM

2291

2289

2292

/* USB suspend (controlled by the host) and system suspend (controlled

2290

/* USB suspend (controlled by the host) and system suspend (controlled

2293

* by the PXA) don't necessarily work well together. If USB is active,

2291

* by the PXA) don't necessarily work well together. If USB is active,

2294

* the 48 MHz clock is required; so the system can't enter 33 MHz idle

2292

* the 48 MHz clock is required; so the system can't enter 33 MHz idle

2295

* mode, or any deeper PM saving state.

2293

* mode, or any deeper PM saving state.

2296

*

2294

*

2297

* For now, we punt and forcibly disconnect from the USB host when PXA

2295

* For now, we punt and forcibly disconnect from the USB host when PXA

2298

* enters any suspend state. While we're disconnected, we always disable

2296

* enters any suspend state. While we're disconnected, we always disable

2299

* the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.

2297

* the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.

2300

* Boards without software pullup control shouldn't use those states.

2298

* Boards without software pullup control shouldn't use those states.

2301

* VBUS IRQs should probably be ignored so that the PXA device just acts

2299

* VBUS IRQs should probably be ignored so that the PXA device just acts

2302

* "dead" to USB hosts until system resume.

2300

* "dead" to USB hosts until system resume.

2303

*/

2301

*/

2304

static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)

2302

static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)

2305

{

2303

{

2306

struct pxa25x_udc *udc = platform_get_drvdata(dev);

2304

struct pxa25x_udc *udc = platform_get_drvdata(dev);

2307

unsigned long flags;

2305

unsigned long flags;

2308

2306

2309

if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)

2307

if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)

2310

WARNING("USB host won't detect disconnect!\n");

2308

WARNING("USB host won't detect disconnect!\n");

2311

udc->suspended = 1;

2309

udc->suspended = 1;

2312

2310

2313

local_irq_save(flags);

2311

local_irq_save(flags);

2314

pullup(udc);

2312

pullup(udc);

2315

local_irq_restore(flags);

2313

local_irq_restore(flags);

2316

2314

2317

return 0;

2315

return 0;

2318

}

2316

}

2319

2317

2320

static int pxa25x_udc_resume(struct platform_device *dev)

2318

static int pxa25x_udc_resume(struct platform_device *dev)

2321

{

2319

{

2322

struct pxa25x_udc *udc = platform_get_drvdata(dev);

2320

struct pxa25x_udc *udc = platform_get_drvdata(dev);

2323

unsigned long flags;

2321

unsigned long flags;

2324

2322

2325

udc->suspended = 0;

2323

udc->suspended = 0;

2326

local_irq_save(flags);

2324

local_irq_save(flags);

2327

pullup(udc);

2325

pullup(udc);

2328

local_irq_restore(flags);

2326

local_irq_restore(flags);

2329

2327

2330

return 0;

2328

return 0;

2331

}

2329

}

2332

2330

2333

#else

2331

#else

2334

#define pxa25x_udc_suspend NULL

2332

#define pxa25x_udc_suspend NULL

2335

#define pxa25x_udc_resume NULL

2333

#define pxa25x_udc_resume NULL

2336

#endif

2334

#endif

2337

2335

2338

/*-------------------------------------------------------------------------*/

2336

/*-------------------------------------------------------------------------*/

2339

2337

2340

static struct platform_driver udc_driver = {

2338

static struct platform_driver udc_driver = {

2341

.shutdown = pxa25x_udc_shutdown,

2339

.shutdown = pxa25x_udc_shutdown,

2342

.remove = __exit_p(pxa25x_udc_remove),

2340

.remove = __exit_p(pxa25x_udc_remove),

2343

.suspend = pxa25x_udc_suspend,

2341

.suspend = pxa25x_udc_suspend,

2344

.resume = pxa25x_udc_resume,

2342

.resume = pxa25x_udc_resume,

2345

.driver = {

2343

.driver = {

2346

.owner = THIS_MODULE,

2344

.owner = THIS_MODULE,

2347

.name = "pxa25x-udc",

2345

.name = "pxa25x-udc",

2348

},

2346

},

2349

};

2347

};

2350

2348

2351

static int __init udc_init(void)

2349

static int __init udc_init(void)

2352

{

2350

{

2353

pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);

2351

pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);

2354

return platform_driver_probe(&udc_driver, pxa25x_udc_probe);

2352

return platform_driver_probe(&udc_driver, pxa25x_udc_probe);

2355

}

2353

}

2356

module_init(udc_init);

2354

module_init(udc_init);

2357

2355

2358

static void __exit udc_exit(void)

2356

static void __exit udc_exit(void)

2359

{

2357

{

2360

platform_driver_unregister(&udc_driver);

2358

platform_driver_unregister(&udc_driver);

2361

}

2359

}

2362

module_exit(udc_exit);

2360

module_exit(udc_exit);

2363

2361

2364

MODULE_DESCRIPTION(DRIVER_DESC);

2362

MODULE_DESCRIPTION(DRIVER_DESC);

2365

MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");

2363

MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");

2366

MODULE_LICENSE("GPL");

2364

MODULE_LICENSE("GPL");

2367

MODULE_ALIAS("platform:pxa25x-udc");

2365

MODULE_ALIAS("platform:pxa25x-udc");

GITLAB

ARM: move udc_pxa2xx.h to linux/platform_data

1	/*		File was deleted
2	* arch/arm/include/asm/mach/udc_pxa2xx.h
3	*
4	* This supports machine-specific differences in how the PXA2xx
5	* USB Device Controller (UDC) is wired.
6	*
7	* It is set in linux/arch/arm/mach-pxa/<machine>.c or in
8	* linux/arch/mach-ixp4xx/<machine>.c and used in
9	* the probe routine of linux/drivers/usb/gadget/pxa2xx_udc.c
10	*/
11
12	struct pxa2xx_udc_mach_info {
13	int (udc_is_connected)(void); / do we see host? */
14	void (*udc_command)(int cmd);
15	#define PXA2XX_UDC_CMD_CONNECT 0 /* let host see us */
16	#define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */
17
18	/* Boards following the design guidelines in the developer's manual,
19	* with on-chip GPIOs not Lubbock's weird hardware, can have a sane
20	* VBUS IRQ and omit the methods above. Store the GPIO number
21	* here. Note that sometimes the signals go through inverters...
22	*/
23	bool gpio_pullup_inverted;
24	int gpio_pullup; /* high == pullup activated */
25	};
26		1	/*
27		2	* arch/arm/include/asm/mach/udc_pxa2xx.h

1	/*	1	/*
2	* arch/arm/mach-ixp4xx/include/mach/udc.h	2	* arch/arm/mach-ixp4xx/include/mach/udc.h
3	*	3	*
4	*/	4	*/
5	#include <asm/mach/udc_pxa2xx.h>	5	#include <linux/platform_data/pxa2xx_udc.h>
6		6
7	extern void ixp4xx_set_udc_info(struct pxa2xx_udc_mach_info *info);	7	extern void ixp4xx_set_udc_info(struct pxa2xx_udc_mach_info *info);
8		8
9		9

1	/*	1	/*
2	* arch/arm/mach-pxa/include/mach/udc.h	2	* arch/arm/mach-pxa/include/mach/udc.h
3	*	3	*
4	*/	4	*/
5	#include <asm/mach/udc_pxa2xx.h>	5	#include <linux/platform_data/pxa2xx_udc.h>
6		6
7	extern void pxa_set_udc_info(struct pxa2xx_udc_mach_info *info);	7	extern void pxa_set_udc_info(struct pxa2xx_udc_mach_info *info);
8		8
9		9

 /*
  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
  *
  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
  * Copyright (C) 2003 Robert Schwebel, Pengutronix
  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
  * Copyright (C) 2003 David Brownell
  * Copyright (C) 2003 Joshua Wise
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  */
 /* #define VERBOSE_DEBUG */
 #include <linux/device.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/ioport.h>
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/delay.h>
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/timer.h>
 #include <linux/list.h>
 #include <linux/interrupt.h>
 #include <linux/mm.h>
+#include <linux/platform_data/pxa2xx_udc.h>
 #include <linux/platform_device.h>
 #include <linux/dma-mapping.h>
 #include <linux/irq.h>
 #include <linux/clk.h>
 #include <linux/seq_file.h>
 #include <linux/debugfs.h>
 #include <linux/io.h>
 #include <linux/prefetch.h>
 #include <asm/byteorder.h>
 #include <asm/dma.h>
 #include <asm/gpio.h>
 #include <asm/mach-types.h>
 #include <asm/unaligned.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <linux/usb/otg.h>
 /*
  * This driver is PXA25x only.  Grab the right register definitions.
  */
 #ifdef CONFIG_ARCH_PXA
 #include <mach/pxa25x-udc.h>
 #endif
 #ifdef CONFIG_ARCH_LUBBOCK
 #include <mach/lubbock.h>
 #endif
-#include <asm/mach/udc_pxa2xx.h>
 /*
  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
  * series processors.  The UDC for the IXP 4xx series is very similar.
  * There are fifteen endpoints, in addition to ep0.
  *
  * Such controller drivers work with a gadget driver.  The gadget driver
  * returns descriptors, implements configuration and data protocols used
  * by the host to interact with this device, and allocates endpoints to
  * the different protocol interfaces.  The controller driver virtualizes
  * usb hardware so that the gadget drivers will be more portable.
  *
  * This UDC hardware wants to implement a bit too much USB protocol, so
  * it constrains the sorts of USB configuration change events that work.
  * The errata for these chips are misleading; some "fixed" bugs from
  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
  *
  * Note that the UDC hardware supports DMA (except on IXP) but that's
  * not used here.  IN-DMA (to host) is simple enough, when the data is
  * suitably aligned (16 bytes) ... the network stack doesn't do that,
  * other software can.  OUT-DMA is buggy in most chip versions, as well
  * as poorly designed (data toggle not automatic).  So this driver won't
  * bother using DMA.  (Mostly-working IN-DMA support was available in
  * kernels before 2.6.23, but was never enabled or well tested.)
  */
 #define	DRIVER_VERSION	"30-June-2007"
 #define	DRIVER_DESC	"PXA 25x USB Device Controller driver"
 static const char driver_name [] = "pxa25x_udc";
 static const char ep0name [] = "ep0";
 #ifdef CONFIG_ARCH_IXP4XX
 /* cpu-specific register addresses are compiled in to this code */
 #ifdef CONFIG_ARCH_PXA
 #error "Can't configure both IXP and PXA"
 #endif
 /* IXP doesn't yet support <linux/clk.h> */
 #define clk_get(dev,name)	NULL
 #define clk_enable(clk)		do { } while (0)
 #define clk_disable(clk)	do { } while (0)
 #define clk_put(clk)		do { } while (0)
 #endif
 #include "pxa25x_udc.h"
 #ifdef	CONFIG_USB_PXA25X_SMALL
 #define SIZE_STR	" (small)"
 #else
 #define SIZE_STR	""
 #endif
 /* ---------------------------------------------------------------------------
  *	endpoint related parts of the api to the usb controller hardware,
  *	used by gadget driver; and the inner talker-to-hardware core.
  * ---------------------------------------------------------------------------
  */
 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
 static void nuke (struct pxa25x_ep *, int status);
 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
 static void pullup_off(void)
 {
 	struct pxa2xx_udc_mach_info		*mach = the_controller->mach;
 	int off_level = mach->gpio_pullup_inverted;
 	if (gpio_is_valid(mach->gpio_pullup))
 		gpio_set_value(mach->gpio_pullup, off_level);
 	else if (mach->udc_command)
 		mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
 }
 static void pullup_on(void)
 {
 	struct pxa2xx_udc_mach_info		*mach = the_controller->mach;
 	int on_level = !mach->gpio_pullup_inverted;
 	if (gpio_is_valid(mach->gpio_pullup))
 		gpio_set_value(mach->gpio_pullup, on_level);
 	else if (mach->udc_command)
 		mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
 }
 static void pio_irq_enable(int bEndpointAddress)
 {
         bEndpointAddress &= 0xf;
         if (bEndpointAddress < 8)
                 UICR0 &= ~(1 << bEndpointAddress);
         else {
                 bEndpointAddress -= 8;
                 UICR1 &= ~(1 << bEndpointAddress);
 	}
 }
 static void pio_irq_disable(int bEndpointAddress)
 {
         bEndpointAddress &= 0xf;
         if (bEndpointAddress < 8)
                 UICR0 |= 1 << bEndpointAddress;
         else {
                 bEndpointAddress -= 8;
                 UICR1 |= 1 << bEndpointAddress;
         }
 }
 /* The UDCCR reg contains mask and interrupt status bits,
  * so using '|=' isn't safe as it may ack an interrupt.
  */
 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
 static inline void udc_set_mask_UDCCR(int mask)
 {
 	UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
 }
 static inline void udc_clear_mask_UDCCR(int mask)
 {
 	UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
 }
 static inline void udc_ack_int_UDCCR(int mask)
 {
 	/* udccr contains the bits we dont want to change */
 	__u32 udccr = UDCCR & UDCCR_MASK_BITS;
 	UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
 }
 /*
  * endpoint enable/disable
  *
  * we need to verify the descriptors used to enable endpoints.  since pxa25x
  * endpoint configurations are fixed, and are pretty much always enabled,
  * there's not a lot to manage here.
  *
  * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
  * for a single interface (with only the default altsetting) and for gadget
  * drivers that don't halt endpoints (not reset by set_interface).  that also
  * means that if you use ISO, you must violate the USB spec rule that all
  * iso endpoints must be in non-default altsettings.
  */
 static int pxa25x_ep_enable (struct usb_ep *_ep,
 		const struct usb_endpoint_descriptor *desc)
 {
 	struct pxa25x_ep        *ep;
 	struct pxa25x_udc       *dev;
 	ep = container_of (_ep, struct pxa25x_ep, ep);
 	if (!_ep || !desc || _ep->name == ep0name
 			|| desc->bDescriptorType != USB_DT_ENDPOINT
 			|| ep->bEndpointAddress != desc->bEndpointAddress
 			|| ep->fifo_size < usb_endpoint_maxp (desc)) {
 		DMSG("%s, bad ep or descriptor\n", __func__);
 		return -EINVAL;
 	}
 	/* xfer types must match, except that interrupt ~= bulk */
 	if (ep->bmAttributes != desc->bmAttributes
 			&& ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 			&& desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 		DMSG("%s, %s type mismatch\n", __func__, _ep->name);
 		return -EINVAL;
 	}
 	/* hardware _could_ do smaller, but driver doesn't */
 	if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 				&& usb_endpoint_maxp (desc)
 						!= BULK_FIFO_SIZE)
 			|| !desc->wMaxPacketSize) {
 		DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
 		return -ERANGE;
 	}
 	dev = ep->dev;
 	if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
 		DMSG("%s, bogus device state\n", __func__);
 		return -ESHUTDOWN;
 	}
 	ep->ep.desc = desc;
 	ep->stopped = 0;
 	ep->pio_irqs = 0;
 	ep->ep.maxpacket = usb_endpoint_maxp (desc);
 	/* flush fifo (mostly for OUT buffers) */
 	pxa25x_ep_fifo_flush (_ep);
 	/* ... reset halt state too, if we could ... */
 	DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
 	return 0;
 }
 static int pxa25x_ep_disable (struct usb_ep *_ep)
 {
 	struct pxa25x_ep	*ep;
 	unsigned long		flags;
 	ep = container_of (_ep, struct pxa25x_ep, ep);
 	if (!_ep || !ep->ep.desc) {
 		DMSG("%s, %s not enabled\n", __func__,
 			_ep ? ep->ep.name : NULL);
 		return -EINVAL;
 	}
 	local_irq_save(flags);
 	nuke (ep, -ESHUTDOWN);
 	/* flush fifo (mostly for IN buffers) */
 	pxa25x_ep_fifo_flush (_ep);
 	ep->ep.desc = NULL;
 	ep->stopped = 1;
 	local_irq_restore(flags);
 	DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
 	return 0;
 }
 /*-------------------------------------------------------------------------*/
 /* for the pxa25x, these can just wrap kmalloc/kfree.  gadget drivers
  * must still pass correctly initialized endpoints, since other controller
  * drivers may care about how it's currently set up (dma issues etc).
  */
 /*
  *	pxa25x_ep_alloc_request - allocate a request data structure
  */
 static struct usb_request *
 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
 {
 	struct pxa25x_request *req;
 	req = kzalloc(sizeof(*req), gfp_flags);
 	if (!req)
 		return NULL;
 	INIT_LIST_HEAD (&req->queue);
 	return &req->req;
 }
 /*
  *	pxa25x_ep_free_request - deallocate a request data structure
  */
 static void
 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
 {
 	struct pxa25x_request	*req;
 	req = container_of (_req, struct pxa25x_request, req);
 	WARN_ON(!list_empty (&req->queue));
 	kfree(req);
 }
 /*-------------------------------------------------------------------------*/
 /*
  *	done - retire a request; caller blocked irqs
  */
 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
 {
 	unsigned		stopped = ep->stopped;
 	list_del_init(&req->queue);
 	if (likely (req->req.status == -EINPROGRESS))
 		req->req.status = status;
 	else
 		status = req->req.status;
 	if (status && status != -ESHUTDOWN)
 		DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
 			ep->ep.name, &req->req, status,
 			req->req.actual, req->req.length);
 	/* don't modify queue heads during completion callback */
 	ep->stopped = 1;
 	req->req.complete(&ep->ep, &req->req);
 	ep->stopped = stopped;
 }
 static inline void ep0_idle (struct pxa25x_udc *dev)
 {
 	dev->ep0state = EP0_IDLE;
 }
 static int
 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
 {
 	u8		*buf;
 	unsigned	length, count;
 	buf = req->req.buf + req->req.actual;
 	prefetch(buf);
 	/* how big will this packet be? */
 	length = min(req->req.length - req->req.actual, max);
 	req->req.actual += length;
 	count = length;
 	while (likely(count--))
 		*uddr = *buf++;
 	return length;
 }
 /*
  * write to an IN endpoint fifo, as many packets as possible.
  * irqs will use this to write the rest later.
  * caller guarantees at least one packet buffer is ready (or a zlp).
  */
 static int
 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 {
 	unsigned		max;
 	max = usb_endpoint_maxp(ep->ep.desc);
 	do {
 		unsigned	count;
 		int		is_last, is_short;
 		count = write_packet(ep->reg_uddr, req, max);
 		/* last packet is usually short (or a zlp) */
 		if (unlikely (count != max))
 			is_last = is_short = 1;
 		else {
 			if (likely(req->req.length != req->req.actual)
 					|| req->req.zero)
 				is_last = 0;
 			else
 				is_last = 1;
 			/* interrupt/iso maxpacket may not fill the fifo */
 			is_short = unlikely (max < ep->fifo_size);
 		}
 		DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
 			ep->ep.name, count,
 			is_last ? "/L" : "", is_short ? "/S" : "",
 			req->req.length - req->req.actual, req);
 		/* let loose that packet. maybe try writing another one,
 		 * double buffering might work.  TSP, TPC, and TFS
 		 * bit values are the same for all normal IN endpoints.
 		 */
 		*ep->reg_udccs = UDCCS_BI_TPC;
 		if (is_short)
 			*ep->reg_udccs = UDCCS_BI_TSP;
 		/* requests complete when all IN data is in the FIFO */
 		if (is_last) {
 			done (ep, req, 0);
 			if (list_empty(&ep->queue))
 				pio_irq_disable (ep->bEndpointAddress);
 			return 1;
 		}
 		// TODO experiment: how robust can fifo mode tweaking be?
 		// double buffering is off in the default fifo mode, which
 		// prevents TFS from being set here.
 	} while (*ep->reg_udccs & UDCCS_BI_TFS);
 	return 0;
 }
 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
  * ep0 data stage.  these chips want very simple state transitions.
  */
 static inline
 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
 {
 	UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
 	USIR0 = USIR0_IR0;
 	dev->req_pending = 0;
 	DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
 		__func__, tag, UDCCS0, flags);
 }
 static int
 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 {
 	unsigned	count;
 	int		is_short;
 	count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
 	ep->dev->stats.write.bytes += count;
 	/* last packet "must be" short (or a zlp) */
 	is_short = (count != EP0_FIFO_SIZE);
 	DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
 		req->req.length - req->req.actual, req);
 	if (unlikely (is_short)) {
 		if (ep->dev->req_pending)
 			ep0start(ep->dev, UDCCS0_IPR, "short IN");
 		else
 			UDCCS0 = UDCCS0_IPR;
 		count = req->req.length;
 		done (ep, req, 0);
 		ep0_idle(ep->dev);
 #ifndef CONFIG_ARCH_IXP4XX
 #if 1
 		/* This seems to get rid of lost status irqs in some cases:
 		 * host responds quickly, or next request involves config
 		 * change automagic, or should have been hidden, or ...
 		 *
 		 * FIXME get rid of all udelays possible...
 		 */
 		if (count >= EP0_FIFO_SIZE) {
 			count = 100;
 			do {
 				if ((UDCCS0 & UDCCS0_OPR) != 0) {
 					/* clear OPR, generate ack */
 					UDCCS0 = UDCCS0_OPR;
 					break;
 				}
 				count--;
 				udelay(1);
 			} while (count);
 		}
 #endif
 #endif
 	} else if (ep->dev->req_pending)
 		ep0start(ep->dev, 0, "IN");
 	return is_short;
 }
 /*
  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
  * transfers and put them into the request.  caller should have made
  * sure there's at least one packet ready.
  *
  * returns true if the request completed because of short packet or the
  * request buffer having filled (and maybe overran till end-of-packet).
  */
 static int
 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 {
 	for (;;) {
 		u32		udccs;
 		u8		*buf;
 		unsigned	bufferspace, count, is_short;
 		/* make sure there's a packet in the FIFO.
 		 * UDCCS_{BO,IO}_RPC are all the same bit value.
 		 * UDCCS_{BO,IO}_RNE are all the same bit value.
 		 */
 		udccs = *ep->reg_udccs;
 		if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
 			break;
 		buf = req->req.buf + req->req.actual;
 		prefetchw(buf);
 		bufferspace = req->req.length - req->req.actual;
 		/* read all bytes from this packet */
 		if (likely (udccs & UDCCS_BO_RNE)) {
 			count = 1 + (0x0ff & *ep->reg_ubcr);
 			req->req.actual += min (count, bufferspace);
 		} else /* zlp */
 			count = 0;
 		is_short = (count < ep->ep.maxpacket);
 		DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
 			ep->ep.name, udccs, count,
 			is_short ? "/S" : "",
 			req, req->req.actual, req->req.length);
 		while (likely (count-- != 0)) {
 			u8	byte = (u8) *ep->reg_uddr;
 			if (unlikely (bufferspace == 0)) {
 				/* this happens when the driver's buffer
 				 * is smaller than what the host sent.
 				 * discard the extra data.
 				 */
 				if (req->req.status != -EOVERFLOW)
 					DMSG("%s overflow %d\n",
 						ep->ep.name, count);
 				req->req.status = -EOVERFLOW;
 			} else {
 				*buf++ = byte;
 				bufferspace--;
 			}
 		}
 		*ep->reg_udccs =  UDCCS_BO_RPC;
 		/* RPC/RSP/RNE could now reflect the other packet buffer */
 		/* iso is one request per packet */
 		if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 			if (udccs & UDCCS_IO_ROF)
 				req->req.status = -EHOSTUNREACH;
 			/* more like "is_done" */
 			is_short = 1;
 		}
 		/* completion */
 		if (is_short || req->req.actual == req->req.length) {
 			done (ep, req, 0);
 			if (list_empty(&ep->queue))
 				pio_irq_disable (ep->bEndpointAddress);
 			return 1;
 		}
 		/* finished that packet.  the next one may be waiting... */
 	}
 	return 0;
 }
 /*
  * special ep0 version of the above.  no UBCR0 or double buffering; status
  * handshaking is magic.  most device protocols don't need control-OUT.
  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
  * protocols do use them.
  */
 static int
 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
 {
 	u8		*buf, byte;
 	unsigned	bufferspace;
 	buf = req->req.buf + req->req.actual;
 	bufferspace = req->req.length - req->req.actual;
 	while (UDCCS0 & UDCCS0_RNE) {
 		byte = (u8) UDDR0;
 		if (unlikely (bufferspace == 0)) {
 			/* this happens when the driver's buffer
 			 * is smaller than what the host sent.
 			 * discard the extra data.
 			 */
 			if (req->req.status != -EOVERFLOW)
 				DMSG("%s overflow\n", ep->ep.name);
 			req->req.status = -EOVERFLOW;
 		} else {
 			*buf++ = byte;
 			req->req.actual++;
 			bufferspace--;
 		}
 	}
 	UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
 	/* completion */
 	if (req->req.actual >= req->req.length)
 		return 1;
 	/* finished that packet.  the next one may be waiting... */
 	return 0;
 }
 /*-------------------------------------------------------------------------*/
 static int
 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
 {
 	struct pxa25x_request	*req;
 	struct pxa25x_ep	*ep;
 	struct pxa25x_udc	*dev;
 	unsigned long		flags;
 	req = container_of(_req, struct pxa25x_request, req);
 	if (unlikely (!_req || !_req->complete || !_req->buf
 			|| !list_empty(&req->queue))) {
 		DMSG("%s, bad params\n", __func__);
 		return -EINVAL;
 	}
 	ep = container_of(_ep, struct pxa25x_ep, ep);
 	if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
 		DMSG("%s, bad ep\n", __func__);
 		return -EINVAL;
 	}
 	dev = ep->dev;
 	if (unlikely (!dev->driver
 			|| dev->gadget.speed == USB_SPEED_UNKNOWN)) {
 		DMSG("%s, bogus device state\n", __func__);
 		return -ESHUTDOWN;
 	}
 	/* iso is always one packet per request, that's the only way
 	 * we can report per-packet status.  that also helps with dma.
 	 */
 	if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 			&& req->req.length > usb_endpoint_maxp(ep->ep.desc)))
 		return -EMSGSIZE;
 	DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
 		_ep->name, _req, _req->length, _req->buf);
 	local_irq_save(flags);
 	_req->status = -EINPROGRESS;
 	_req->actual = 0;
 	/* kickstart this i/o queue? */
 	if (list_empty(&ep->queue) && !ep->stopped) {
 		if (ep->ep.desc == NULL/* ep0 */) {
 			unsigned	length = _req->length;
 			switch (dev->ep0state) {
 			case EP0_IN_DATA_PHASE:
 				dev->stats.write.ops++;
 				if (write_ep0_fifo(ep, req))
 					req = NULL;
 				break;
 			case EP0_OUT_DATA_PHASE:
 				dev->stats.read.ops++;
 				/* messy ... */
 				if (dev->req_config) {
 					DBG(DBG_VERBOSE, "ep0 config ack%s\n",
 						dev->has_cfr ?  "" : " raced");
 					if (dev->has_cfr)
 						UDCCFR = UDCCFR_AREN|UDCCFR_ACM
 							|UDCCFR_MB1;
 					done(ep, req, 0);
 					dev->ep0state = EP0_END_XFER;
 					local_irq_restore (flags);
 					return 0;
 				}
 				if (dev->req_pending)
 					ep0start(dev, UDCCS0_IPR, "OUT");
 				if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
 						&& read_ep0_fifo(ep, req))) {
 					ep0_idle(dev);
 					done(ep, req, 0);
 					req = NULL;
 				}
 				break;
 			default:
 				DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
 				local_irq_restore (flags);
 				return -EL2HLT;
 			}
 		/* can the FIFO can satisfy the request immediately? */
 		} else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
 			if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
 					&& write_fifo(ep, req))
 				req = NULL;
 		} else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
 				&& read_fifo(ep, req)) {
 			req = NULL;
 		}
 		if (likely(req && ep->ep.desc))
 			pio_irq_enable(ep->bEndpointAddress);
 	}
 	/* pio or dma irq handler advances the queue. */
 	if (likely(req != NULL))
 		list_add_tail(&req->queue, &ep->queue);
 	local_irq_restore(flags);
 	return 0;
 }
 /*
  *	nuke - dequeue ALL requests
  */
 static void nuke(struct pxa25x_ep *ep, int status)
 {
 	struct pxa25x_request *req;
 	/* called with irqs blocked */
 	while (!list_empty(&ep->queue)) {
 		req = list_entry(ep->queue.next,
 				struct pxa25x_request,
 				queue);
 		done(ep, req, status);
 	}
 	if (ep->ep.desc)
 		pio_irq_disable (ep->bEndpointAddress);
 }
 /* dequeue JUST ONE request */
 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
 {
 	struct pxa25x_ep	*ep;
 	struct pxa25x_request	*req;
 	unsigned long		flags;
 	ep = container_of(_ep, struct pxa25x_ep, ep);
 	if (!_ep || ep->ep.name == ep0name)
 		return -EINVAL;
 	local_irq_save(flags);
 	/* make sure it's actually queued on this endpoint */
 	list_for_each_entry (req, &ep->queue, queue) {
 		if (&req->req == _req)
 			break;
 	}
 	if (&req->req != _req) {
 		local_irq_restore(flags);
 		return -EINVAL;
 	}
 	done(ep, req, -ECONNRESET);
 	local_irq_restore(flags);
 	return 0;
 }
 /*-------------------------------------------------------------------------*/
 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
 {
 	struct pxa25x_ep	*ep;
 	unsigned long		flags;
 	ep = container_of(_ep, struct pxa25x_ep, ep);
 	if (unlikely (!_ep
 			|| (!ep->ep.desc && ep->ep.name != ep0name))
 			|| ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 		DMSG("%s, bad ep\n", __func__);
 		return -EINVAL;
 	}
 	if (value == 0) {
 		/* this path (reset toggle+halt) is needed to implement
 		 * SET_INTERFACE on normal hardware.  but it can't be
 		 * done from software on the PXA UDC, and the hardware
 		 * forgets to do it as part of SET_INTERFACE automagic.
 		 */
 		DMSG("only host can clear %s halt\n", _ep->name);
 		return -EROFS;
 	}
 	local_irq_save(flags);
 	if ((ep->bEndpointAddress & USB_DIR_IN) != 0
 			&& ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
 			   || !list_empty(&ep->queue))) {
 		local_irq_restore(flags);
 		return -EAGAIN;
 	}
 	/* FST bit is the same for control, bulk in, bulk out, interrupt in */
 	*ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
 	/* ep0 needs special care */
 	if (!ep->ep.desc) {
 		start_watchdog(ep->dev);
 		ep->dev->req_pending = 0;
 		ep->dev->ep0state = EP0_STALL;
 	/* and bulk/intr endpoints like dropping stalls too */
 	} else {
 		unsigned i;
 		for (i = 0; i < 1000; i += 20) {
 			if (*ep->reg_udccs & UDCCS_BI_SST)
 				break;
 			udelay(20);
 		}
 	}
 	local_irq_restore(flags);
 	DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
 	return 0;
 }
 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
 {
 	struct pxa25x_ep        *ep;
 	ep = container_of(_ep, struct pxa25x_ep, ep);
 	if (!_ep) {
 		DMSG("%s, bad ep\n", __func__);
 		return -ENODEV;
 	}
 	/* pxa can't report unclaimed bytes from IN fifos */
 	if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
 		return -EOPNOTSUPP;
 	if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
 			|| (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
 		return 0;
 	else
 		return (*ep->reg_ubcr & 0xfff) + 1;
 }
 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
 {
 	struct pxa25x_ep        *ep;
 	ep = container_of(_ep, struct pxa25x_ep, ep);
 	if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
 		DMSG("%s, bad ep\n", __func__);
 		return;
 	}
 	/* toggle and halt bits stay unchanged */
 	/* for OUT, just read and discard the FIFO contents. */
 	if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
 		while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
 			(void) *ep->reg_uddr;
 		return;
 	}
 	/* most IN status is the same, but ISO can't stall */
 	*ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
 		| (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
 			? 0 : UDCCS_BI_SST);
 }
 static struct usb_ep_ops pxa25x_ep_ops = {
 	.enable		= pxa25x_ep_enable,
 	.disable	= pxa25x_ep_disable,
 	.alloc_request	= pxa25x_ep_alloc_request,
 	.free_request	= pxa25x_ep_free_request,
 	.queue		= pxa25x_ep_queue,
 	.dequeue	= pxa25x_ep_dequeue,
 	.set_halt	= pxa25x_ep_set_halt,
 	.fifo_status	= pxa25x_ep_fifo_status,
 	.fifo_flush	= pxa25x_ep_fifo_flush,
 };
 /* ---------------------------------------------------------------------------
  *	device-scoped parts of the api to the usb controller hardware
  * ---------------------------------------------------------------------------
  */
 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
 {
 	return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
 }
 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
 {
 	/* host may not have enabled remote wakeup */
 	if ((UDCCS0 & UDCCS0_DRWF) == 0)
 		return -EHOSTUNREACH;
 	udc_set_mask_UDCCR(UDCCR_RSM);
 	return 0;
 }
 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
 static void udc_enable (struct pxa25x_udc *);
 static void udc_disable(struct pxa25x_udc *);
 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
  * in active use.
  */
 static int pullup(struct pxa25x_udc *udc)
 {
 	int is_active = udc->vbus && udc->pullup && !udc->suspended;
 	DMSG("%s\n", is_active ? "active" : "inactive");
 	if (is_active) {
 		if (!udc->active) {
 			udc->active = 1;
 			/* Enable clock for USB device */
 			clk_enable(udc->clk);
 			udc_enable(udc);
 		}
 	} else {
 		if (udc->active) {
 			if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
 				DMSG("disconnect %s\n", udc->driver
 					? udc->driver->driver.name
 					: "(no driver)");
 				stop_activity(udc, udc->driver);
 			}
 			udc_disable(udc);
 			/* Disable clock for USB device */
 			clk_disable(udc->clk);
 			udc->active = 0;
 		}
 	}
 	return 0;
 }
 /* VBUS reporting logically comes from a transceiver */
 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
 {
 	struct pxa25x_udc	*udc;
 	udc = container_of(_gadget, struct pxa25x_udc, gadget);
 	udc->vbus = is_active;
 	DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
 	pullup(udc);
 	return 0;
 }
 /* drivers may have software control over D+ pullup */
 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
 {
 	struct pxa25x_udc	*udc;
 	udc = container_of(_gadget, struct pxa25x_udc, gadget);
 	/* not all boards support pullup control */
 	if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
 		return -EOPNOTSUPP;
 	udc->pullup = (is_active != 0);
 	pullup(udc);
 	return 0;
 }
 /* boards may consume current from VBUS, up to 100-500mA based on config.
  * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
  * violate USB specs.
  */
 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
 {
 	struct pxa25x_udc	*udc;
 	udc = container_of(_gadget, struct pxa25x_udc, gadget);
 	if (!IS_ERR_OR_NULL(udc->transceiver))
 		return usb_phy_set_power(udc->transceiver, mA);
 	return -EOPNOTSUPP;
 }
 static int pxa25x_start(struct usb_gadget_driver *driver,
 		int (*bind)(struct usb_gadget *, struct usb_gadget_driver *));
 static int pxa25x_stop(struct usb_gadget_driver *driver);
 static const struct usb_gadget_ops pxa25x_udc_ops = {
 	.get_frame	= pxa25x_udc_get_frame,
 	.wakeup		= pxa25x_udc_wakeup,
 	.vbus_session	= pxa25x_udc_vbus_session,
 	.pullup		= pxa25x_udc_pullup,
 	.vbus_draw	= pxa25x_udc_vbus_draw,
 	.start		= pxa25x_start,
 	.stop		= pxa25x_stop,
 };
 /*-------------------------------------------------------------------------*/
 #ifdef CONFIG_USB_GADGET_DEBUG_FS
 static int
 udc_seq_show(struct seq_file *m, void *_d)
 {
 	struct pxa25x_udc	*dev = m->private;
 	unsigned long		flags;
 	int			i;
 	u32			tmp;
 	local_irq_save(flags);
 	/* basic device status */
 	seq_printf(m, DRIVER_DESC "\n"
 		"%s version: %s\nGadget driver: %s\nHost %s\n\n",
 		driver_name, DRIVER_VERSION SIZE_STR "(pio)",
 		dev->driver ? dev->driver->driver.name : "(none)",
 		dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");
 	/* registers for device and ep0 */
 	seq_printf(m,
 		"uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
 		UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
 	tmp = UDCCR;
 	seq_printf(m,
 		"udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
 		(tmp & UDCCR_REM) ? " rem" : "",
 		(tmp & UDCCR_RSTIR) ? " rstir" : "",
 		(tmp & UDCCR_SRM) ? " srm" : "",
 		(tmp & UDCCR_SUSIR) ? " susir" : "",
 		(tmp & UDCCR_RESIR) ? " resir" : "",
 		(tmp & UDCCR_RSM) ? " rsm" : "",
 		(tmp & UDCCR_UDA) ? " uda" : "",
 		(tmp & UDCCR_UDE) ? " ude" : "");
 	tmp = UDCCS0;
 	seq_printf(m,
 		"udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
 		(tmp & UDCCS0_SA) ? " sa" : "",
 		(tmp & UDCCS0_RNE) ? " rne" : "",
 		(tmp & UDCCS0_FST) ? " fst" : "",
 		(tmp & UDCCS0_SST) ? " sst" : "",
 		(tmp & UDCCS0_DRWF) ? " dwrf" : "",
 		(tmp & UDCCS0_FTF) ? " ftf" : "",
 		(tmp & UDCCS0_IPR) ? " ipr" : "",
 		(tmp & UDCCS0_OPR) ? " opr" : "");
 	if (dev->has_cfr) {
 		tmp = UDCCFR;
 		seq_printf(m,
 			"udccfr %02X =%s%s\n", tmp,
 			(tmp & UDCCFR_AREN) ? " aren" : "",
 			(tmp & UDCCFR_ACM) ? " acm" : "");
 	}
 	if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)
 		goto done;
 	seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
 		dev->stats.write.bytes, dev->stats.write.ops,
 		dev->stats.read.bytes, dev->stats.read.ops,
 		dev->stats.irqs);
 	/* dump endpoint queues */
 	for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
 		struct pxa25x_ep	*ep = &dev->ep [i];
 		struct pxa25x_request	*req;
 		if (i != 0) {
 			const struct usb_endpoint_descriptor	*desc;
 			desc = ep->ep.desc;
 			if (!desc)
 				continue;
 			tmp = *dev->ep [i].reg_udccs;
 			seq_printf(m,
 				"%s max %d %s udccs %02x irqs %lu\n",
 				ep->ep.name, usb_endpoint_maxp(desc),
 				"pio", tmp, ep->pio_irqs);
 			/* TODO translate all five groups of udccs bits! */
 		} else /* ep0 should only have one transfer queued */
 			seq_printf(m, "ep0 max 16 pio irqs %lu\n",
 				ep->pio_irqs);
 		if (list_empty(&ep->queue)) {
 			seq_printf(m, "\t(nothing queued)\n");
 			continue;
 		}
 		list_for_each_entry(req, &ep->queue, queue) {
 			seq_printf(m,
 					"\treq %p len %d/%d buf %p\n",
 					&req->req, req->req.actual,
 					req->req.length, req->req.buf);
 		}
 	}
 done:
 	local_irq_restore(flags);
 	return 0;
 }
 static int
 udc_debugfs_open(struct inode *inode, struct file *file)
 {
 	return single_open(file, udc_seq_show, inode->i_private);
 }
 static const struct file_operations debug_fops = {
 	.open		= udc_debugfs_open,
 	.read		= seq_read,
 	.llseek		= seq_lseek,
 	.release	= single_release,
 	.owner		= THIS_MODULE,
 };
 #define create_debug_files(dev) \
 	do { \
 		dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
 			S_IRUGO, NULL, dev, &debug_fops); \
 	} while (0)
 #define remove_debug_files(dev) \
 	do { \
 		if (dev->debugfs_udc) \
 			debugfs_remove(dev->debugfs_udc); \
 	} while (0)
 #else	/* !CONFIG_USB_GADGET_DEBUG_FILES */
 #define create_debug_files(dev) do {} while (0)
 #define remove_debug_files(dev) do {} while (0)
 #endif	/* CONFIG_USB_GADGET_DEBUG_FILES */
 /*-------------------------------------------------------------------------*/
 /*
  *	udc_disable - disable USB device controller
  */
 static void udc_disable(struct pxa25x_udc *dev)
 {
 	/* block all irqs */
 	udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
 	UICR0 = UICR1 = 0xff;
 	UFNRH = UFNRH_SIM;
 	/* if hardware supports it, disconnect from usb */
 	pullup_off();
 	udc_clear_mask_UDCCR(UDCCR_UDE);
 	ep0_idle (dev);
 	dev->gadget.speed = USB_SPEED_UNKNOWN;
 }
 /*
  *	udc_reinit - initialize software state
  */
 static void udc_reinit(struct pxa25x_udc *dev)
 {
 	u32	i;
 	/* device/ep0 records init */
 	INIT_LIST_HEAD (&dev->gadget.ep_list);
 	INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
 	dev->ep0state = EP0_IDLE;
 	/* basic endpoint records init */
 	for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
 		struct pxa25x_ep *ep = &dev->ep[i];
 		if (i != 0)
 			list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
 		ep->ep.desc = NULL;
 		ep->stopped = 0;
 		INIT_LIST_HEAD (&ep->queue);
 		ep->pio_irqs = 0;
 	}
 	/* the rest was statically initialized, and is read-only */
 }
 /* until it's enabled, this UDC should be completely invisible
  * to any USB host.
  */
 static void udc_enable (struct pxa25x_udc *dev)
 {
 	udc_clear_mask_UDCCR(UDCCR_UDE);
 	/* try to clear these bits before we enable the udc */
 	udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
 	ep0_idle(dev);
 	dev->gadget.speed = USB_SPEED_UNKNOWN;
 	dev->stats.irqs = 0;
 	/*
 	 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
 	 * - enable UDC
 	 * - if RESET is already in progress, ack interrupt
 	 * - unmask reset interrupt
 	 */
 	udc_set_mask_UDCCR(UDCCR_UDE);
 	if (!(UDCCR & UDCCR_UDA))
 		udc_ack_int_UDCCR(UDCCR_RSTIR);
 	if (dev->has_cfr /* UDC_RES2 is defined */) {
 		/* pxa255 (a0+) can avoid a set_config race that could
 		 * prevent gadget drivers from configuring correctly
 		 */
 		UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
 	} else {
 		/* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
 		 * which could result in missing packets and interrupts.
 		 * supposedly one bit per endpoint, controlling whether it
 		 * double buffers or not; ACM/AREN bits fit into the holes.
 		 * zero bits (like USIR0_IRx) disable double buffering.
 		 */
 		UDC_RES1 = 0x00;
 		UDC_RES2 = 0x00;
 	}
 	/* enable suspend/resume and reset irqs */
 	udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
 	/* enable ep0 irqs */
 	UICR0 &= ~UICR0_IM0;
 	/* if hardware supports it, pullup D+ and wait for reset */
 	pullup_on();
 }
 /* when a driver is successfully registered, it will receive
  * control requests including set_configuration(), which enables
  * non-control requests.  then usb traffic follows until a
  * disconnect is reported.  then a host may connect again, or
  * the driver might get unbound.
  */
 static int pxa25x_start(struct usb_gadget_driver *driver,
 		int (*bind)(struct usb_gadget *, struct usb_gadget_driver *))
 {
 	struct pxa25x_udc	*dev = the_controller;
 	int			retval;
 	if (!driver
 			|| driver->max_speed < USB_SPEED_FULL
 			|| !bind
 			|| !driver->disconnect
 			|| !driver->setup)
 		return -EINVAL;
 	if (!dev)
 		return -ENODEV;
 	if (dev->driver)
 		return -EBUSY;
 	/* first hook up the driver ... */
 	dev->driver = driver;
 	dev->gadget.dev.driver = &driver->driver;
 	dev->pullup = 1;
 	retval = device_add (&dev->gadget.dev);
 	if (retval) {
 fail:
 		dev->driver = NULL;
 		dev->gadget.dev.driver = NULL;
 		return retval;
 	}
 	retval = bind(&dev->gadget, driver);
 	if (retval) {
 		DMSG("bind to driver %s --> error %d\n",
 				driver->driver.name, retval);
 		device_del (&dev->gadget.dev);
 		goto fail;
 	}
 	/* ... then enable host detection and ep0; and we're ready
 	 * for set_configuration as well as eventual disconnect.
 	 */
 	DMSG("registered gadget driver '%s'\n", driver->driver.name);
 	/* connect to bus through transceiver */
 	if (!IS_ERR_OR_NULL(dev->transceiver)) {
 		retval = otg_set_peripheral(dev->transceiver->otg,
 						&dev->gadget);
 		if (retval) {
 			DMSG("can't bind to transceiver\n");
 			if (driver->unbind)
 				driver->unbind(&dev->gadget);
 			goto bind_fail;
 		}
 	}
 	pullup(dev);
 	dump_state(dev);
 	return 0;
 bind_fail:
 	return retval;
 }
 static void
 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
 {
 	int i;
 	/* don't disconnect drivers more than once */
 	if (dev->gadget.speed == USB_SPEED_UNKNOWN)
 		driver = NULL;
 	dev->gadget.speed = USB_SPEED_UNKNOWN;
 	/* prevent new request submissions, kill any outstanding requests  */
 	for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
 		struct pxa25x_ep *ep = &dev->ep[i];
 		ep->stopped = 1;
 		nuke(ep, -ESHUTDOWN);
 	}
 	del_timer_sync(&dev->timer);
 	/* report disconnect; the driver is already quiesced */
 	if (driver)
 		driver->disconnect(&dev->gadget);
 	/* re-init driver-visible data structures */
 	udc_reinit(dev);
 }
 static int pxa25x_stop(struct usb_gadget_driver *driver)
 {
 	struct pxa25x_udc	*dev = the_controller;
 	if (!dev)
 		return -ENODEV;
 	if (!driver || driver != dev->driver || !driver->unbind)
 		return -EINVAL;
 	local_irq_disable();
 	dev->pullup = 0;
 	pullup(dev);
 	stop_activity(dev, driver);
 	local_irq_enable();
 	if (!IS_ERR_OR_NULL(dev->transceiver))
 		(void) otg_set_peripheral(dev->transceiver->otg, NULL);
 	driver->unbind(&dev->gadget);
 	dev->gadget.dev.driver = NULL;
 	dev->driver = NULL;
 	device_del (&dev->gadget.dev);
 	DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
 	dump_state(dev);
 	return 0;
 }
 /*-------------------------------------------------------------------------*/
 #ifdef CONFIG_ARCH_LUBBOCK
 /* Lubbock has separate connect and disconnect irqs.  More typical designs
  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
  */
 static irqreturn_t
 lubbock_vbus_irq(int irq, void *_dev)
 {
 	struct pxa25x_udc	*dev = _dev;
 	int			vbus;
 	dev->stats.irqs++;
 	switch (irq) {
 	case LUBBOCK_USB_IRQ:
 		vbus = 1;
 		disable_irq(LUBBOCK_USB_IRQ);
 		enable_irq(LUBBOCK_USB_DISC_IRQ);
 		break;
 	case LUBBOCK_USB_DISC_IRQ:
 		vbus = 0;
 		disable_irq(LUBBOCK_USB_DISC_IRQ);
 		enable_irq(LUBBOCK_USB_IRQ);
 		break;
 	default:
 		return IRQ_NONE;
 	}
 	pxa25x_udc_vbus_session(&dev->gadget, vbus);
 	return IRQ_HANDLED;
 }
 #endif
 /*-------------------------------------------------------------------------*/
 static inline void clear_ep_state (struct pxa25x_udc *dev)
 {
 	unsigned i;
 	/* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
 	 * fifos, and pending transactions mustn't be continued in any case.
 	 */
 	for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
 		nuke(&dev->ep[i], -ECONNABORTED);
 }
 static void udc_watchdog(unsigned long _dev)
 {
 	struct pxa25x_udc	*dev = (void *)_dev;
 	local_irq_disable();
 	if (dev->ep0state == EP0_STALL
 			&& (UDCCS0 & UDCCS0_FST) == 0
 			&& (UDCCS0 & UDCCS0_SST) == 0) {
 		UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
 		DBG(DBG_VERBOSE, "ep0 re-stall\n");
 		start_watchdog(dev);
 	}
 	local_irq_enable();
 }
 static void handle_ep0 (struct pxa25x_udc *dev)
 {
 	u32			udccs0 = UDCCS0;
 	struct pxa25x_ep	*ep = &dev->ep [0];
 	struct pxa25x_request	*req;
 	union {
 		struct usb_ctrlrequest	r;
 		u8			raw [8];
 		u32			word [2];
 	} u;
 	if (list_empty(&ep->queue))
 		req = NULL;
 	else
 		req = list_entry(ep->queue.next, struct pxa25x_request, queue);
 	/* clear stall status */
 	if (udccs0 & UDCCS0_SST) {
 		nuke(ep, -EPIPE);
 		UDCCS0 = UDCCS0_SST;
 		del_timer(&dev->timer);
 		ep0_idle(dev);
 	}
 	/* previous request unfinished?  non-error iff back-to-back ... */
 	if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
 		nuke(ep, 0);
 		del_timer(&dev->timer);
 		ep0_idle(dev);
 	}
 	switch (dev->ep0state) {
 	case EP0_IDLE:
 		/* late-breaking status? */
 		udccs0 = UDCCS0;
 		/* start control request? */
 		if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
 				== (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
 			int i;
 			nuke (ep, -EPROTO);
 			/* read SETUP packet */
 			for (i = 0; i < 8; i++) {
 				if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
 bad_setup:
 					DMSG("SETUP %d!\n", i);
 					goto stall;
 				}
 				u.raw [i] = (u8) UDDR0;
 			}
 			if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
 				goto bad_setup;
 got_setup:
 			DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
 				u.r.bRequestType, u.r.bRequest,
 				le16_to_cpu(u.r.wValue),
 				le16_to_cpu(u.r.wIndex),
 				le16_to_cpu(u.r.wLength));
 			/* cope with automagic for some standard requests. */
 			dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
 						== USB_TYPE_STANDARD;
 			dev->req_config = 0;
 			dev->req_pending = 1;
 			switch (u.r.bRequest) {
 			/* hardware restricts gadget drivers here! */
 			case USB_REQ_SET_CONFIGURATION:
 				if (u.r.bRequestType == USB_RECIP_DEVICE) {
 					/* reflect hardware's automagic
 					 * up to the gadget driver.
 					 */
 config_change:
 					dev->req_config = 1;
 					clear_ep_state(dev);
 					/* if !has_cfr, there's no synch
 					 * else use AREN (later) not SA|OPR
 					 * USIR0_IR0 acts edge sensitive
 					 */
 				}
 				break;
 			/* ... and here, even more ... */
 			case USB_REQ_SET_INTERFACE:
 				if (u.r.bRequestType == USB_RECIP_INTERFACE) {
 					/* udc hardware is broken by design:
 					 *  - altsetting may only be zero;
 					 *  - hw resets all interfaces' eps;
 					 *  - ep reset doesn't include halt(?).
 					 */
 					DMSG("broken set_interface (%d/%d)\n",
 						le16_to_cpu(u.r.wIndex),
 						le16_to_cpu(u.r.wValue));
 					goto config_change;
 				}
 				break;
 			/* hardware was supposed to hide this */
 			case USB_REQ_SET_ADDRESS:
 				if (u.r.bRequestType == USB_RECIP_DEVICE) {
 					ep0start(dev, 0, "address");
 					return;
 				}
 				break;
 			}
 			if (u.r.bRequestType & USB_DIR_IN)
 				dev->ep0state = EP0_IN_DATA_PHASE;
 			else
 				dev->ep0state = EP0_OUT_DATA_PHASE;
 			i = dev->driver->setup(&dev->gadget, &u.r);
 			if (i < 0) {
 				/* hardware automagic preventing STALL... */
 				if (dev->req_config) {
 					/* hardware sometimes neglects to tell
 					 * tell us about config change events,
 					 * so later ones may fail...
 					 */
 					WARNING("config change %02x fail %d?\n",
 						u.r.bRequest, i);
 					return;
 					/* TODO experiment:  if has_cfr,
 					 * hardware didn't ACK; maybe we
 					 * could actually STALL!
 					 */
 				}
 				DBG(DBG_VERBOSE, "protocol STALL, "
 					"%02x err %d\n", UDCCS0, i);
 stall:
 				/* the watchdog timer helps deal with cases
 				 * where udc seems to clear FST wrongly, and
 				 * then NAKs instead of STALLing.
 				 */
 				ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
 				start_watchdog(dev);
 				dev->ep0state = EP0_STALL;
 			/* deferred i/o == no response yet */
 			} else if (dev->req_pending) {
 				if (likely(dev->ep0state == EP0_IN_DATA_PHASE
 						|| dev->req_std || u.r.wLength))
 					ep0start(dev, 0, "defer");
 				else
 					ep0start(dev, UDCCS0_IPR, "defer/IPR");
 			}
 			/* expect at least one data or status stage irq */
 			return;
 		} else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
 				== (UDCCS0_OPR|UDCCS0_SA))) {
 			unsigned i;
 			/* pxa210/250 erratum 131 for B0/B1 says RNE lies.
 			 * still observed on a pxa255 a0.
 			 */
 			DBG(DBG_VERBOSE, "e131\n");
 			nuke(ep, -EPROTO);
 			/* read SETUP data, but don't trust it too much */
 			for (i = 0; i < 8; i++)
 				u.raw [i] = (u8) UDDR0;
 			if ((u.r.bRequestType & USB_RECIP_MASK)
 					> USB_RECIP_OTHER)
 				goto stall;
 			if (u.word [0] == 0 && u.word [1] == 0)
 				goto stall;
 			goto got_setup;
 		} else {
 			/* some random early IRQ:
 			 * - we acked FST
 			 * - IPR cleared
 			 * - OPR got set, without SA (likely status stage)
 			 */
 			UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
 		}
 		break;
 	case EP0_IN_DATA_PHASE:			/* GET_DESCRIPTOR etc */
 		if (udccs0 & UDCCS0_OPR) {
 			UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
 			DBG(DBG_VERBOSE, "ep0in premature status\n");
 			if (req)
 				done(ep, req, 0);
 			ep0_idle(dev);
 		} else /* irq was IPR clearing */ {
 			if (req) {
 				/* this IN packet might finish the request */
 				(void) write_ep0_fifo(ep, req);
 			} /* else IN token before response was written */
 		}
 		break;
 	case EP0_OUT_DATA_PHASE:		/* SET_DESCRIPTOR etc */
 		if (udccs0 & UDCCS0_OPR) {
 			if (req) {
 				/* this OUT packet might finish the request */
 				if (read_ep0_fifo(ep, req))
 					done(ep, req, 0);
 				/* else more OUT packets expected */
 			} /* else OUT token before read was issued */
 		} else /* irq was IPR clearing */ {
 			DBG(DBG_VERBOSE, "ep0out premature status\n");
 			if (req)
 				done(ep, req, 0);
 			ep0_idle(dev);
 		}
 		break;
 	case EP0_END_XFER:
 		if (req)
 			done(ep, req, 0);
 		/* ack control-IN status (maybe in-zlp was skipped)
 		 * also appears after some config change events.
 		 */
 		if (udccs0 & UDCCS0_OPR)
 			UDCCS0 = UDCCS0_OPR;
 		ep0_idle(dev);
 		break;
 	case EP0_STALL:
 		UDCCS0 = UDCCS0_FST;
 		break;
 	}
 	USIR0 = USIR0_IR0;
 }
 static void handle_ep(struct pxa25x_ep *ep)
 {
 	struct pxa25x_request	*req;
 	int			is_in = ep->bEndpointAddress & USB_DIR_IN;
 	int			completed;
 	u32			udccs, tmp;
 	do {
 		completed = 0;
 		if (likely (!list_empty(&ep->queue)))
 			req = list_entry(ep->queue.next,
 					struct pxa25x_request, queue);
 		else
 			req = NULL;
 		// TODO check FST handling
 		udccs = *ep->reg_udccs;
 		if (unlikely(is_in)) {	/* irq from TPC, SST, or (ISO) TUR */
 			tmp = UDCCS_BI_TUR;
 			if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
 				tmp |= UDCCS_BI_SST;
 			tmp &= udccs;
 			if (likely (tmp))
 				*ep->reg_udccs = tmp;
 			if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
 				completed = write_fifo(ep, req);
 		} else {	/* irq from RPC (or for ISO, ROF) */
 			if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
 				tmp = UDCCS_BO_SST | UDCCS_BO_DME;
 			else
 				tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
 			tmp &= udccs;
 			if (likely(tmp))
 				*ep->reg_udccs = tmp;
 			/* fifos can hold packets, ready for reading... */
 			if (likely(req)) {
 				completed = read_fifo(ep, req);
 			} else
 				pio_irq_disable (ep->bEndpointAddress);
 		}
 		ep->pio_irqs++;
 	} while (completed);
 }
 /*
  *	pxa25x_udc_irq - interrupt handler
  *
  * avoid delays in ep0 processing. the control handshaking isn't always
  * under software control (pxa250c0 and the pxa255 are better), and delays
  * could cause usb protocol errors.
  */
 static irqreturn_t
 pxa25x_udc_irq(int irq, void *_dev)
 {
 	struct pxa25x_udc	*dev = _dev;
 	int			handled;
 	dev->stats.irqs++;
 	do {
 		u32		udccr = UDCCR;
 		handled = 0;
 		/* SUSpend Interrupt Request */
 		if (unlikely(udccr & UDCCR_SUSIR)) {
 			udc_ack_int_UDCCR(UDCCR_SUSIR);
 			handled = 1;
 			DBG(DBG_VERBOSE, "USB suspend\n");
 			if (dev->gadget.speed != USB_SPEED_UNKNOWN
 					&& dev->driver
 					&& dev->driver->suspend)
 				dev->driver->suspend(&dev->gadget);
 			ep0_idle (dev);
 		}
 		/* RESume Interrupt Request */
 		if (unlikely(udccr & UDCCR_RESIR)) {
 			udc_ack_int_UDCCR(UDCCR_RESIR);
 			handled = 1;
 			DBG(DBG_VERBOSE, "USB resume\n");
 			if (dev->gadget.speed != USB_SPEED_UNKNOWN
 					&& dev->driver
 					&& dev->driver->resume)
 				dev->driver->resume(&dev->gadget);
 		}
 		/* ReSeT Interrupt Request - USB reset */
 		if (unlikely(udccr & UDCCR_RSTIR)) {
 			udc_ack_int_UDCCR(UDCCR_RSTIR);
 			handled = 1;
 			if ((UDCCR & UDCCR_UDA) == 0) {
 				DBG(DBG_VERBOSE, "USB reset start\n");
 				/* reset driver and endpoints,
 				 * in case that's not yet done
 				 */
 				stop_activity (dev, dev->driver);
 			} else {
 				DBG(DBG_VERBOSE, "USB reset end\n");
 				dev->gadget.speed = USB_SPEED_FULL;
 				memset(&dev->stats, 0, sizeof dev->stats);
 				/* driver and endpoints are still reset */
 			}
 		} else {
 			u32	usir0 = USIR0 & ~UICR0;
 			u32	usir1 = USIR1 & ~UICR1;
 			int	i;
 			if (unlikely (!usir0 && !usir1))
 				continue;
 			DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
 			/* control traffic */
 			if (usir0 & USIR0_IR0) {
 				dev->ep[0].pio_irqs++;
 				handle_ep0(dev);
 				handled = 1;
 			}
 			/* endpoint data transfers */
 			for (i = 0; i < 8; i++) {
 				u32	tmp = 1 << i;
 				if (i && (usir0 & tmp)) {
 					handle_ep(&dev->ep[i]);
 					USIR0 |= tmp;
 					handled = 1;
 				}
 #ifndef	CONFIG_USB_PXA25X_SMALL
 				if (usir1 & tmp) {
 					handle_ep(&dev->ep[i+8]);
 					USIR1 |= tmp;
 					handled = 1;
 				}
 #endif
 			}
 		}
 		/* we could also ask for 1 msec SOF (SIR) interrupts */
 	} while (handled);
 	return IRQ_HANDLED;
 }
 /*-------------------------------------------------------------------------*/
 static void nop_release (struct device *dev)
 {
 	DMSG("%s %s\n", __func__, dev_name(dev));
 }
 /* this uses load-time allocation and initialization (instead of
  * doing it at run-time) to save code, eliminate fault paths, and
  * be more obviously correct.
  */
 static struct pxa25x_udc memory = {
 	.gadget = {
 		.ops		= &pxa25x_udc_ops,
 		.ep0		= &memory.ep[0].ep,
 		.name		= driver_name,
 		.dev = {
 			.init_name	= "gadget",
 			.release	= nop_release,
 		},
 	},
 	/* control endpoint */
 	.ep[0] = {
 		.ep = {
 			.name		= ep0name,
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= EP0_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.reg_udccs	= &UDCCS0,
 		.reg_uddr	= &UDDR0,
 	},
 	/* first group of endpoints */
 	.ep[1] = {
 		.ep = {
 			.name		= "ep1in-bulk",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= BULK_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= BULK_FIFO_SIZE,
 		.bEndpointAddress = USB_DIR_IN | 1,
 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
 		.reg_udccs	= &UDCCS1,
 		.reg_uddr	= &UDDR1,
 	},
 	.ep[2] = {
 		.ep = {
 			.name		= "ep2out-bulk",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= BULK_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= BULK_FIFO_SIZE,
 		.bEndpointAddress = 2,
 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
 		.reg_udccs	= &UDCCS2,
 		.reg_ubcr	= &UBCR2,
 		.reg_uddr	= &UDDR2,
 	},
 #ifndef CONFIG_USB_PXA25X_SMALL
 	.ep[3] = {
 		.ep = {
 			.name		= "ep3in-iso",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= ISO_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= ISO_FIFO_SIZE,
 		.bEndpointAddress = USB_DIR_IN | 3,
 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
 		.reg_udccs	= &UDCCS3,
 		.reg_uddr	= &UDDR3,
 	},
 	.ep[4] = {
 		.ep = {
 			.name		= "ep4out-iso",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= ISO_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= ISO_FIFO_SIZE,
 		.bEndpointAddress = 4,
 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
 		.reg_udccs	= &UDCCS4,
 		.reg_ubcr	= &UBCR4,
 		.reg_uddr	= &UDDR4,
 	},
 	.ep[5] = {
 		.ep = {
 			.name		= "ep5in-int",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= INT_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= INT_FIFO_SIZE,
 		.bEndpointAddress = USB_DIR_IN | 5,
 		.bmAttributes	= USB_ENDPOINT_XFER_INT,
 		.reg_udccs	= &UDCCS5,
 		.reg_uddr	= &UDDR5,
 	},
 	/* second group of endpoints */
 	.ep[6] = {
 		.ep = {
 			.name		= "ep6in-bulk",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= BULK_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= BULK_FIFO_SIZE,
 		.bEndpointAddress = USB_DIR_IN | 6,
 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
 		.reg_udccs	= &UDCCS6,
 		.reg_uddr	= &UDDR6,
 	},
 	.ep[7] = {
 		.ep = {
 			.name		= "ep7out-bulk",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= BULK_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= BULK_FIFO_SIZE,
 		.bEndpointAddress = 7,
 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
 		.reg_udccs	= &UDCCS7,
 		.reg_ubcr	= &UBCR7,
 		.reg_uddr	= &UDDR7,
 	},
 	.ep[8] = {
 		.ep = {
 			.name		= "ep8in-iso",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= ISO_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= ISO_FIFO_SIZE,
 		.bEndpointAddress = USB_DIR_IN | 8,
 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
 		.reg_udccs	= &UDCCS8,
 		.reg_uddr	= &UDDR8,
 	},
 	.ep[9] = {
 		.ep = {
 			.name		= "ep9out-iso",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= ISO_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= ISO_FIFO_SIZE,
 		.bEndpointAddress = 9,
 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
 		.reg_udccs	= &UDCCS9,
 		.reg_ubcr	= &UBCR9,
 		.reg_uddr	= &UDDR9,
 	},
 	.ep[10] = {
 		.ep = {
 			.name		= "ep10in-int",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= INT_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= INT_FIFO_SIZE,
 		.bEndpointAddress = USB_DIR_IN | 10,
 		.bmAttributes	= USB_ENDPOINT_XFER_INT,
 		.reg_udccs	= &UDCCS10,
 		.reg_uddr	= &UDDR10,
 	},
 	/* third group of endpoints */
 	.ep[11] = {
 		.ep = {
 			.name		= "ep11in-bulk",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= BULK_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= BULK_FIFO_SIZE,
 		.bEndpointAddress = USB_DIR_IN | 11,
 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
 		.reg_udccs	= &UDCCS11,
 		.reg_uddr	= &UDDR11,
 	},
 	.ep[12] = {
 		.ep = {
 			.name		= "ep12out-bulk",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= BULK_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= BULK_FIFO_SIZE,
 		.bEndpointAddress = 12,
 		.bmAttributes	= USB_ENDPOINT_XFER_BULK,
 		.reg_udccs	= &UDCCS12,
 		.reg_ubcr	= &UBCR12,
 		.reg_uddr	= &UDDR12,
 	},
 	.ep[13] = {
 		.ep = {
 			.name		= "ep13in-iso",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= ISO_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= ISO_FIFO_SIZE,
 		.bEndpointAddress = USB_DIR_IN | 13,
 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
 		.reg_udccs	= &UDCCS13,
 		.reg_uddr	= &UDDR13,
 	},
 	.ep[14] = {
 		.ep = {
 			.name		= "ep14out-iso",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= ISO_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= ISO_FIFO_SIZE,
 		.bEndpointAddress = 14,
 		.bmAttributes	= USB_ENDPOINT_XFER_ISOC,
 		.reg_udccs	= &UDCCS14,
 		.reg_ubcr	= &UBCR14,
 		.reg_uddr	= &UDDR14,
 	},
 	.ep[15] = {
 		.ep = {
 			.name		= "ep15in-int",
 			.ops		= &pxa25x_ep_ops,
 			.maxpacket	= INT_FIFO_SIZE,
 		},
 		.dev		= &memory,
 		.fifo_size	= INT_FIFO_SIZE,
 		.bEndpointAddress = USB_DIR_IN | 15,
 		.bmAttributes	= USB_ENDPOINT_XFER_INT,
 		.reg_udccs	= &UDCCS15,
 		.reg_uddr	= &UDDR15,
 	},
 #endif /* !CONFIG_USB_PXA25X_SMALL */
 };
 #define CP15R0_VENDOR_MASK	0xffffe000
 #if	defined(CONFIG_ARCH_PXA)
 #define CP15R0_XSCALE_VALUE	0x69052000	/* intel/arm/xscale */
 #elif	defined(CONFIG_ARCH_IXP4XX)
 #define CP15R0_XSCALE_VALUE	0x69054000	/* intel/arm/ixp4xx */
 #endif
 #define CP15R0_PROD_MASK	0x000003f0
 #define PXA25x			0x00000100	/* and PXA26x */
 #define PXA210			0x00000120
 #define CP15R0_REV_MASK		0x0000000f
 #define CP15R0_PRODREV_MASK	(CP15R0_PROD_MASK | CP15R0_REV_MASK)
 #define PXA255_A0		0x00000106	/* or PXA260_B1 */
 #define PXA250_C0		0x00000105	/* or PXA26x_B0 */
 #define PXA250_B2		0x00000104
 #define PXA250_B1		0x00000103	/* or PXA260_A0 */
 #define PXA250_B0		0x00000102
 #define PXA250_A1		0x00000101
 #define PXA250_A0		0x00000100
 #define PXA210_C0		0x00000125
 #define PXA210_B2		0x00000124
 #define PXA210_B1		0x00000123
 #define PXA210_B0		0x00000122
 #define IXP425_A0		0x000001c1
 #define IXP425_B0		0x000001f1
 #define IXP465_AD		0x00000200
 /*
  *	probe - binds to the platform device
  */
 static int __init pxa25x_udc_probe(struct platform_device *pdev)
 {
 	struct pxa25x_udc *dev = &memory;
 	int retval, irq;
 	u32 chiprev;
 	/* insist on Intel/ARM/XScale */
 	asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
 	if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
 		pr_err("%s: not XScale!\n", driver_name);
 		return -ENODEV;
 	}
 	/* trigger chiprev-specific logic */
 	switch (chiprev & CP15R0_PRODREV_MASK) {
 #if	defined(CONFIG_ARCH_PXA)
 	case PXA255_A0:
 		dev->has_cfr = 1;
 		break;
 	case PXA250_A0:
 	case PXA250_A1:
 		/* A0/A1 "not released"; ep 13, 15 unusable */
 		/* fall through */
 	case PXA250_B2: case PXA210_B2:
 	case PXA250_B1: case PXA210_B1:
 	case PXA250_B0: case PXA210_B0:
 		/* OUT-DMA is broken ... */
 		/* fall through */
 	case PXA250_C0: case PXA210_C0:
 		break;
 #elif	defined(CONFIG_ARCH_IXP4XX)
 	case IXP425_A0:
 	case IXP425_B0:
 	case IXP465_AD:
 		dev->has_cfr = 1;
 		break;
 #endif
 	default:
 		pr_err("%s: unrecognized processor: %08x\n",
 			driver_name, chiprev);
 		/* iop3xx, ixp4xx, ... */
 		return -ENODEV;
 	}
 	irq = platform_get_irq(pdev, 0);
 	if (irq < 0)
 		return -ENODEV;
 	dev->clk = clk_get(&pdev->dev, NULL);
 	if (IS_ERR(dev->clk)) {
 		retval = PTR_ERR(dev->clk);
 		goto err_clk;
 	}
 	pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
 		dev->has_cfr ? "" : " (!cfr)",
 		SIZE_STR "(pio)"
 		);
 	/* other non-static parts of init */
 	dev->dev = &pdev->dev;
 	dev->mach = pdev->dev.platform_data;
 	dev->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
 	if (gpio_is_valid(dev->mach->gpio_pullup)) {
 		if ((retval = gpio_request(dev->mach->gpio_pullup,
 				"pca25x_udc GPIO PULLUP"))) {
 			dev_dbg(&pdev->dev,
 				"can't get pullup gpio %d, err: %d\n",
 				dev->mach->gpio_pullup, retval);
 			goto err_gpio_pullup;
 		}
 		gpio_direction_output(dev->mach->gpio_pullup, 0);
 	}
 	init_timer(&dev->timer);
 	dev->timer.function = udc_watchdog;
 	dev->timer.data = (unsigned long) dev;
 	device_initialize(&dev->gadget.dev);
 	dev->gadget.dev.parent = &pdev->dev;
 	dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
 	the_controller = dev;
 	platform_set_drvdata(pdev, dev);
 	udc_disable(dev);
 	udc_reinit(dev);
 	dev->vbus = 0;
 	/* irq setup after old hardware state is cleaned up */
 	retval = request_irq(irq, pxa25x_udc_irq,
 			0, driver_name, dev);
 	if (retval != 0) {
 		pr_err("%s: can't get irq %d, err %d\n",
 			driver_name, irq, retval);
 		goto err_irq1;
 	}
 	dev->got_irq = 1;
 #ifdef CONFIG_ARCH_LUBBOCK
 	if (machine_is_lubbock()) {
 		retval = request_irq(LUBBOCK_USB_DISC_IRQ, lubbock_vbus_irq,
 				     0, driver_name, dev);
 		if (retval != 0) {
 			pr_err("%s: can't get irq %i, err %d\n",
 				driver_name, LUBBOCK_USB_DISC_IRQ, retval);
 			goto err_irq_lub;
 		}
 		retval = request_irq(LUBBOCK_USB_IRQ, lubbock_vbus_irq,
 				     0, driver_name, dev);
 		if (retval != 0) {
 			pr_err("%s: can't get irq %i, err %d\n",
 				driver_name, LUBBOCK_USB_IRQ, retval);
 			goto lubbock_fail0;
 		}
 	} else
 #endif
 	create_debug_files(dev);
 	retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
 	if (!retval)
 		return retval;
 	remove_debug_files(dev);
 #ifdef	CONFIG_ARCH_LUBBOCK
 lubbock_fail0:
 	free_irq(LUBBOCK_USB_DISC_IRQ, dev);
  err_irq_lub:
 	free_irq(irq, dev);
 #endif
  err_irq1:
 	if (gpio_is_valid(dev->mach->gpio_pullup))
 		gpio_free(dev->mach->gpio_pullup);
  err_gpio_pullup:
 	if (!IS_ERR_OR_NULL(dev->transceiver)) {
 		usb_put_phy(dev->transceiver);
 		dev->transceiver = NULL;
 	}
 	clk_put(dev->clk);
  err_clk:
 	return retval;
 }
 static void pxa25x_udc_shutdown(struct platform_device *_dev)
 {
 	pullup_off();
 }
 static int __exit pxa25x_udc_remove(struct platform_device *pdev)
 {
 	struct pxa25x_udc *dev = platform_get_drvdata(pdev);
 	usb_del_gadget_udc(&dev->gadget);
 	if (dev->driver)
 		return -EBUSY;
 	dev->pullup = 0;
 	pullup(dev);
 	remove_debug_files(dev);
 	if (dev->got_irq) {
 		free_irq(platform_get_irq(pdev, 0), dev);
 		dev->got_irq = 0;
 	}
 #ifdef CONFIG_ARCH_LUBBOCK
 	if (machine_is_lubbock()) {
 		free_irq(LUBBOCK_USB_DISC_IRQ, dev);
 		free_irq(LUBBOCK_USB_IRQ, dev);
 	}
 #endif
 	if (gpio_is_valid(dev->mach->gpio_pullup))
 		gpio_free(dev->mach->gpio_pullup);
 	clk_put(dev->clk);
 	if (!IS_ERR_OR_NULL(dev->transceiver)) {
 		usb_put_phy(dev->transceiver);
 		dev->transceiver = NULL;
 	}
 	platform_set_drvdata(pdev, NULL);
 	the_controller = NULL;
 	return 0;
 }
 /*-------------------------------------------------------------------------*/
 #ifdef	CONFIG_PM
 /* USB suspend (controlled by the host) and system suspend (controlled
  * by the PXA) don't necessarily work well together.  If USB is active,
  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
  * mode, or any deeper PM saving state.
  *
  * For now, we punt and forcibly disconnect from the USB host when PXA
  * enters any suspend state.  While we're disconnected, we always disable
  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
  * Boards without software pullup control shouldn't use those states.
  * VBUS IRQs should probably be ignored so that the PXA device just acts
  * "dead" to USB hosts until system resume.
  */
 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
 {
 	struct pxa25x_udc	*udc = platform_get_drvdata(dev);
 	unsigned long flags;
 	if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
 		WARNING("USB host won't detect disconnect!\n");
 	udc->suspended = 1;
 	local_irq_save(flags);
 	pullup(udc);
 	local_irq_restore(flags);
 	return 0;
 }
 static int pxa25x_udc_resume(struct platform_device *dev)
 {
 	struct pxa25x_udc	*udc = platform_get_drvdata(dev);
 	unsigned long flags;
 	udc->suspended = 0;
 	local_irq_save(flags);
 	pullup(udc);
 	local_irq_restore(flags);
 	return 0;
 }
 #else
 #define	pxa25x_udc_suspend	NULL
 #define	pxa25x_udc_resume	NULL
 #endif
 /*-------------------------------------------------------------------------*/
 static struct platform_driver udc_driver = {
 	.shutdown	= pxa25x_udc_shutdown,
 	.remove		= __exit_p(pxa25x_udc_remove),
 	.suspend	= pxa25x_udc_suspend,
 	.resume		= pxa25x_udc_resume,
 	.driver		= {
 		.owner	= THIS_MODULE,
 		.name	= "pxa25x-udc",
 	},
 };
 static int __init udc_init(void)
 {
 	pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
 	return platform_driver_probe(&udc_driver, pxa25x_udc_probe);
 }
 module_init(udc_init);
 static void __exit udc_exit(void)
 {
 	platform_driver_unregister(&udc_driver);
 }
 module_exit(udc_exit);
 MODULE_DESCRIPTION(DRIVER_DESC);
 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
 MODULE_LICENSE("GPL");
 MODULE_ALIAS("platform:pxa25x-udc");

File was created	1	/*
	2	* This supports machine-specific differences in how the PXA2xx
	3	* USB Device Controller (UDC) is wired.
	4	*
	5	* It is set in linux/arch/arm/mach-pxa/<machine>.c or in
	6	* linux/arch/mach-ixp4xx/<machine>.c and used in
	7	* the probe routine of linux/drivers/usb/gadget/pxa2xx_udc.c
	8	*/
	9	#ifndef PXA2XX_UDC_H
	10	#define PXA2XX_UDC_H
	11
	12	struct pxa2xx_udc_mach_info {
	13	int (udc_is_connected)(void); / do we see host? */
	14	void (*udc_command)(int cmd);
	15	#define PXA2XX_UDC_CMD_CONNECT 0 /* let host see us */
	16	#define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */
	17
	18	/* Boards following the design guidelines in the developer's manual,
	19	* with on-chip GPIOs not Lubbock's weird hardware, can have a sane
	20	* VBUS IRQ and omit the methods above. Store the GPIO number
	21	* here. Note that sometimes the signals go through inverters...
	22	*/
	23	bool gpio_pullup_inverted;
	24	int gpio_pullup; /* high == pullup activated */
	25	};
	26
	27	#endif
	28