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Commit 482982062f1bc25ffb5383ab724d73d1a7af07cf

Authored by Kuninori Morimoto
Committed by Felipe Balbi
1 parent 034d7c13a7
Exists in master and in 6 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

usb: gadget: renesas_usbhs: bugfix: don't modify platform data 

renesas_usbhs has default callback functions and settings.
And it tried overwrite to platform private data
if platform doesn't have them.
So, if renesas_usbhs was compiled as module,
it will be hung-up on 2nd insmod.
This patch fixup it.
Special thanks to Bastian

Reported-by: Bastian Hecht <hechtb@googlemail.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

Showing 3 changed files with 18 additions and 14 deletions Inline Diff

drivers/usb/renesas_usbhs/common.c
Diff comments   View file @ 4829820
1 /* 1 /*
2 * Renesas USB driver 2 * Renesas USB driver
3 * 3 *
4 * Copyright (C) 2011 Renesas Solutions Corp. 4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 * 6 *
7 * This program is distributed in the hope that it will be useful, 7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details. 10 * GNU General Public License for more details.
11 * 11 *
12 * You should have received a copy of the GNU General Public License 12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software 13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 * 15 *
16 */ 16 */
17 #include <linux/io.h> 17 #include <linux/io.h>
18 #include <linux/module.h> 18 #include <linux/module.h>
19 #include <linux/pm_runtime.h> 19 #include <linux/pm_runtime.h>
20 #include <linux/slab.h> 20 #include <linux/slab.h>
21 #include <linux/sysfs.h> 21 #include <linux/sysfs.h>
22 #include "./common.h" 22 #include "./common.h"
23 23
24 /* 24 /*
25 * image of renesas_usbhs 25 * image of renesas_usbhs
26 * 26 *
27 * ex) gadget case 27 * ex) gadget case
28 28
29 * mod.c 29 * mod.c
30 * mod_gadget.c 30 * mod_gadget.c
31 * mod_host.c pipe.c fifo.c 31 * mod_host.c pipe.c fifo.c
32 * 32 *
33 * +-------+ +-----------+ 33 * +-------+ +-----------+
34 * | pipe0 |------>| fifo pio | 34 * | pipe0 |------>| fifo pio |
35 * +------------+ +-------+ +-----------+ 35 * +------------+ +-------+ +-----------+
36 * | mod_gadget |=====> | pipe1 |--+ 36 * | mod_gadget |=====> | pipe1 |--+
37 * +------------+ +-------+ | +-----------+ 37 * +------------+ +-------+ | +-----------+
38 * | pipe2 | | +-| fifo dma0 | 38 * | pipe2 | | +-| fifo dma0 |
39 * +------------+ +-------+ | | +-----------+ 39 * +------------+ +-------+ | | +-----------+
40 * | mod_host | | pipe3 |<-|--+ 40 * | mod_host | | pipe3 |<-|--+
41 * +------------+ +-------+ | +-----------+ 41 * +------------+ +-------+ | +-----------+
42 * | .... | +--->| fifo dma1 | 42 * | .... | +--->| fifo dma1 |
43 * | .... | +-----------+ 43 * | .... | +-----------+
44 */ 44 */
45 45
46 46
47 #define USBHSF_RUNTIME_PWCTRL (1 << 0) 47 #define USBHSF_RUNTIME_PWCTRL (1 << 0)
48 48
49 /* status */ 49 /* status */
50 #define usbhsc_flags_init(p) do {(p)->flags = 0; } while (0) 50 #define usbhsc_flags_init(p) do {(p)->flags = 0; } while (0)
51 #define usbhsc_flags_set(p, b) ((p)->flags |= (b)) 51 #define usbhsc_flags_set(p, b) ((p)->flags |= (b))
52 #define usbhsc_flags_clr(p, b) ((p)->flags &= ~(b)) 52 #define usbhsc_flags_clr(p, b) ((p)->flags &= ~(b))
53 #define usbhsc_flags_has(p, b) ((p)->flags & (b)) 53 #define usbhsc_flags_has(p, b) ((p)->flags & (b))
54 54
55 /* 55 /*
56 * platform call back 56 * platform call back
57 * 57 *
58 * renesas usb support platform callback function. 58 * renesas usb support platform callback function.
59 * Below macro call it. 59 * Below macro call it.
60 * if platform doesn't have callback, it return 0 (no error) 60 * if platform doesn't have callback, it return 0 (no error)
61 */ 61 */
62 #define usbhs_platform_call(priv, func, args...)\ 62 #define usbhs_platform_call(priv, func, args...)\
63 (!(priv) ? -ENODEV : \ 63 (!(priv) ? -ENODEV : \
64 !((priv)->pfunc->func) ? 0 : \ 64 !((priv)->pfunc.func) ? 0 : \
65 (priv)->pfunc->func(args)) 65 (priv)->pfunc.func(args))
66 66
67 /* 67 /*
68 * common functions 68 * common functions
69 */ 69 */
70 u16 usbhs_read(struct usbhs_priv *priv, u32 reg) 70 u16 usbhs_read(struct usbhs_priv *priv, u32 reg)
71 { 71 {
72 return ioread16(priv->base + reg); 72 return ioread16(priv->base + reg);
73 } 73 }
74 74
75 void usbhs_write(struct usbhs_priv *priv, u32 reg, u16 data) 75 void usbhs_write(struct usbhs_priv *priv, u32 reg, u16 data)
76 { 76 {
77 iowrite16(data, priv->base + reg); 77 iowrite16(data, priv->base + reg);
78 } 78 }
79 79
80 void usbhs_bset(struct usbhs_priv *priv, u32 reg, u16 mask, u16 data) 80 void usbhs_bset(struct usbhs_priv *priv, u32 reg, u16 mask, u16 data)
81 { 81 {
82 u16 val = usbhs_read(priv, reg); 82 u16 val = usbhs_read(priv, reg);
83 83
84 val &= ~mask; 84 val &= ~mask;
85 val |= data & mask; 85 val |= data & mask;
86 86
87 usbhs_write(priv, reg, val); 87 usbhs_write(priv, reg, val);
88 } 88 }
89 89
90 struct usbhs_priv *usbhs_pdev_to_priv(struct platform_device *pdev) 90 struct usbhs_priv *usbhs_pdev_to_priv(struct platform_device *pdev)
91 { 91 {
92 return dev_get_drvdata(&pdev->dev); 92 return dev_get_drvdata(&pdev->dev);
93 } 93 }
94 94
95 /* 95 /*
96 * syscfg functions 96 * syscfg functions
97 */ 97 */
98 void usbhs_sys_clock_ctrl(struct usbhs_priv *priv, int enable) 98 void usbhs_sys_clock_ctrl(struct usbhs_priv *priv, int enable)
99 { 99 {
100 usbhs_bset(priv, SYSCFG, SCKE, enable ? SCKE : 0); 100 usbhs_bset(priv, SYSCFG, SCKE, enable ? SCKE : 0);
101 } 101 }
102 102
103 void usbhs_sys_hispeed_ctrl(struct usbhs_priv *priv, int enable) 103 void usbhs_sys_hispeed_ctrl(struct usbhs_priv *priv, int enable)
104 { 104 {
105 usbhs_bset(priv, SYSCFG, HSE, enable ? HSE : 0); 105 usbhs_bset(priv, SYSCFG, HSE, enable ? HSE : 0);
106 } 106 }
107 107
108 void usbhs_sys_usb_ctrl(struct usbhs_priv *priv, int enable) 108 void usbhs_sys_usb_ctrl(struct usbhs_priv *priv, int enable)
109 { 109 {
110 usbhs_bset(priv, SYSCFG, USBE, enable ? USBE : 0); 110 usbhs_bset(priv, SYSCFG, USBE, enable ? USBE : 0);
111 } 111 }
112 112
113 void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable) 113 void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable)
114 { 114 {
115 u16 mask = DCFM | DRPD | DPRPU; 115 u16 mask = DCFM | DRPD | DPRPU;
116 u16 val = DCFM | DRPD; 116 u16 val = DCFM | DRPD;
117 int has_otg = usbhs_get_dparam(priv, has_otg); 117 int has_otg = usbhs_get_dparam(priv, has_otg);
118 118
119 if (has_otg) 119 if (has_otg)
120 usbhs_bset(priv, DVSTCTR, (EXTLP | PWEN), (EXTLP | PWEN)); 120 usbhs_bset(priv, DVSTCTR, (EXTLP | PWEN), (EXTLP | PWEN));
121 121
122 /* 122 /*
123 * if enable 123 * if enable
124 * 124 *
125 * - select Host mode 125 * - select Host mode
126 * - D+ Line/D- Line Pull-down 126 * - D+ Line/D- Line Pull-down
127 */ 127 */
128 usbhs_bset(priv, SYSCFG, mask, enable ? val : 0); 128 usbhs_bset(priv, SYSCFG, mask, enable ? val : 0);
129 } 129 }
130 130
131 void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable) 131 void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable)
132 { 132 {
133 u16 mask = DCFM | DRPD | DPRPU; 133 u16 mask = DCFM | DRPD | DPRPU;
134 u16 val = DPRPU; 134 u16 val = DPRPU;
135 135
136 /* 136 /*
137 * if enable 137 * if enable
138 * 138 *
139 * - select Function mode 139 * - select Function mode
140 * - D+ Line Pull-up 140 * - D+ Line Pull-up
141 */ 141 */
142 usbhs_bset(priv, SYSCFG, mask, enable ? val : 0); 142 usbhs_bset(priv, SYSCFG, mask, enable ? val : 0);
143 } 143 }
144 144
145 /* 145 /*
146 * frame functions 146 * frame functions
147 */ 147 */
148 int usbhs_frame_get_num(struct usbhs_priv *priv) 148 int usbhs_frame_get_num(struct usbhs_priv *priv)
149 { 149 {
150 return usbhs_read(priv, FRMNUM) & FRNM_MASK; 150 return usbhs_read(priv, FRMNUM) & FRNM_MASK;
151 } 151 }
152 152
153 /* 153 /*
154 * usb request functions 154 * usb request functions
155 */ 155 */
156 void usbhs_usbreq_get_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req) 156 void usbhs_usbreq_get_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req)
157 { 157 {
158 u16 val; 158 u16 val;
159 159
160 val = usbhs_read(priv, USBREQ); 160 val = usbhs_read(priv, USBREQ);
161 req->bRequest = (val >> 8) & 0xFF; 161 req->bRequest = (val >> 8) & 0xFF;
162 req->bRequestType = (val >> 0) & 0xFF; 162 req->bRequestType = (val >> 0) & 0xFF;
163 163
164 req->wValue = usbhs_read(priv, USBVAL); 164 req->wValue = usbhs_read(priv, USBVAL);
165 req->wIndex = usbhs_read(priv, USBINDX); 165 req->wIndex = usbhs_read(priv, USBINDX);
166 req->wLength = usbhs_read(priv, USBLENG); 166 req->wLength = usbhs_read(priv, USBLENG);
167 } 167 }
168 168
169 void usbhs_usbreq_set_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req) 169 void usbhs_usbreq_set_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req)
170 { 170 {
171 usbhs_write(priv, USBREQ, (req->bRequest << 8) | req->bRequestType); 171 usbhs_write(priv, USBREQ, (req->bRequest << 8) | req->bRequestType);
172 usbhs_write(priv, USBVAL, req->wValue); 172 usbhs_write(priv, USBVAL, req->wValue);
173 usbhs_write(priv, USBINDX, req->wIndex); 173 usbhs_write(priv, USBINDX, req->wIndex);
174 usbhs_write(priv, USBLENG, req->wLength); 174 usbhs_write(priv, USBLENG, req->wLength);
175 175
176 usbhs_bset(priv, DCPCTR, SUREQ, SUREQ); 176 usbhs_bset(priv, DCPCTR, SUREQ, SUREQ);
177 } 177 }
178 178
179 /* 179 /*
180 * bus/vbus functions 180 * bus/vbus functions
181 */ 181 */
182 void usbhs_bus_send_sof_enable(struct usbhs_priv *priv) 182 void usbhs_bus_send_sof_enable(struct usbhs_priv *priv)
183 { 183 {
184 u16 status = usbhs_read(priv, DVSTCTR) & (USBRST | UACT); 184 u16 status = usbhs_read(priv, DVSTCTR) & (USBRST | UACT);
185 185
186 if (status != USBRST) { 186 if (status != USBRST) {
187 struct device *dev = usbhs_priv_to_dev(priv); 187 struct device *dev = usbhs_priv_to_dev(priv);
188 dev_err(dev, "usbhs should be reset\n"); 188 dev_err(dev, "usbhs should be reset\n");
189 } 189 }
190 190
191 usbhs_bset(priv, DVSTCTR, (USBRST | UACT), UACT); 191 usbhs_bset(priv, DVSTCTR, (USBRST | UACT), UACT);
192 } 192 }
193 193
194 void usbhs_bus_send_reset(struct usbhs_priv *priv) 194 void usbhs_bus_send_reset(struct usbhs_priv *priv)
195 { 195 {
196 usbhs_bset(priv, DVSTCTR, (USBRST | UACT), USBRST); 196 usbhs_bset(priv, DVSTCTR, (USBRST | UACT), USBRST);
197 } 197 }
198 198
199 int usbhs_bus_get_speed(struct usbhs_priv *priv) 199 int usbhs_bus_get_speed(struct usbhs_priv *priv)
200 { 200 {
201 u16 dvstctr = usbhs_read(priv, DVSTCTR); 201 u16 dvstctr = usbhs_read(priv, DVSTCTR);
202 202
203 switch (RHST & dvstctr) { 203 switch (RHST & dvstctr) {
204 case RHST_LOW_SPEED: 204 case RHST_LOW_SPEED:
205 return USB_SPEED_LOW; 205 return USB_SPEED_LOW;
206 case RHST_FULL_SPEED: 206 case RHST_FULL_SPEED:
207 return USB_SPEED_FULL; 207 return USB_SPEED_FULL;
208 case RHST_HIGH_SPEED: 208 case RHST_HIGH_SPEED:
209 return USB_SPEED_HIGH; 209 return USB_SPEED_HIGH;
210 } 210 }
211 211
212 return USB_SPEED_UNKNOWN; 212 return USB_SPEED_UNKNOWN;
213 } 213 }
214 214
215 int usbhs_vbus_ctrl(struct usbhs_priv *priv, int enable) 215 int usbhs_vbus_ctrl(struct usbhs_priv *priv, int enable)
216 { 216 {
217 struct platform_device *pdev = usbhs_priv_to_pdev(priv); 217 struct platform_device *pdev = usbhs_priv_to_pdev(priv);
218 218
219 return usbhs_platform_call(priv, set_vbus, pdev, enable); 219 return usbhs_platform_call(priv, set_vbus, pdev, enable);
220 } 220 }
221 221
222 static void usbhsc_bus_init(struct usbhs_priv *priv) 222 static void usbhsc_bus_init(struct usbhs_priv *priv)
223 { 223 {
224 usbhs_write(priv, DVSTCTR, 0); 224 usbhs_write(priv, DVSTCTR, 0);
225 225
226 usbhs_vbus_ctrl(priv, 0); 226 usbhs_vbus_ctrl(priv, 0);
227 } 227 }
228 228
229 /* 229 /*
230 * device configuration 230 * device configuration
231 */ 231 */
232 int usbhs_set_device_speed(struct usbhs_priv *priv, int devnum, 232 int usbhs_set_device_speed(struct usbhs_priv *priv, int devnum,
233 u16 upphub, u16 hubport, u16 speed) 233 u16 upphub, u16 hubport, u16 speed)
234 { 234 {
235 struct device *dev = usbhs_priv_to_dev(priv); 235 struct device *dev = usbhs_priv_to_dev(priv);
236 u16 usbspd = 0; 236 u16 usbspd = 0;
237 u32 reg = DEVADD0 + (2 * devnum); 237 u32 reg = DEVADD0 + (2 * devnum);
238 238
239 if (devnum > 10) { 239 if (devnum > 10) {
240 dev_err(dev, "cannot set speed to unknown device %d\n", devnum); 240 dev_err(dev, "cannot set speed to unknown device %d\n", devnum);
241 return -EIO; 241 return -EIO;
242 } 242 }
243 243
244 if (upphub > 0xA) { 244 if (upphub > 0xA) {
245 dev_err(dev, "unsupported hub number %d\n", upphub); 245 dev_err(dev, "unsupported hub number %d\n", upphub);
246 return -EIO; 246 return -EIO;
247 } 247 }
248 248
249 switch (speed) { 249 switch (speed) {
250 case USB_SPEED_LOW: 250 case USB_SPEED_LOW:
251 usbspd = USBSPD_SPEED_LOW; 251 usbspd = USBSPD_SPEED_LOW;
252 break; 252 break;
253 case USB_SPEED_FULL: 253 case USB_SPEED_FULL:
254 usbspd = USBSPD_SPEED_FULL; 254 usbspd = USBSPD_SPEED_FULL;
255 break; 255 break;
256 case USB_SPEED_HIGH: 256 case USB_SPEED_HIGH:
257 usbspd = USBSPD_SPEED_HIGH; 257 usbspd = USBSPD_SPEED_HIGH;
258 break; 258 break;
259 default: 259 default:
260 dev_err(dev, "unsupported speed %d\n", speed); 260 dev_err(dev, "unsupported speed %d\n", speed);
261 return -EIO; 261 return -EIO;
262 } 262 }
263 263
264 usbhs_write(priv, reg, UPPHUB(upphub) | 264 usbhs_write(priv, reg, UPPHUB(upphub) |
265 HUBPORT(hubport)| 265 HUBPORT(hubport)|
266 USBSPD(usbspd)); 266 USBSPD(usbspd));
267 267
268 return 0; 268 return 0;
269 } 269 }
270 270
271 /* 271 /*
272 * local functions 272 * local functions
273 */ 273 */
274 static void usbhsc_set_buswait(struct usbhs_priv *priv) 274 static void usbhsc_set_buswait(struct usbhs_priv *priv)
275 { 275 {
276 int wait = usbhs_get_dparam(priv, buswait_bwait); 276 int wait = usbhs_get_dparam(priv, buswait_bwait);
277 277
278 /* set bus wait if platform have */ 278 /* set bus wait if platform have */
279 if (wait) 279 if (wait)
280 usbhs_bset(priv, BUSWAIT, 0x000F, wait); 280 usbhs_bset(priv, BUSWAIT, 0x000F, wait);
281 } 281 }
282 282
283 /* 283 /*
284 * platform default param 284 * platform default param
285 */ 285 */
286 static u32 usbhsc_default_pipe_type[] = { 286 static u32 usbhsc_default_pipe_type[] = {
287 USB_ENDPOINT_XFER_CONTROL, 287 USB_ENDPOINT_XFER_CONTROL,
288 USB_ENDPOINT_XFER_ISOC, 288 USB_ENDPOINT_XFER_ISOC,
289 USB_ENDPOINT_XFER_ISOC, 289 USB_ENDPOINT_XFER_ISOC,
290 USB_ENDPOINT_XFER_BULK, 290 USB_ENDPOINT_XFER_BULK,
291 USB_ENDPOINT_XFER_BULK, 291 USB_ENDPOINT_XFER_BULK,
292 USB_ENDPOINT_XFER_BULK, 292 USB_ENDPOINT_XFER_BULK,
293 USB_ENDPOINT_XFER_INT, 293 USB_ENDPOINT_XFER_INT,
294 USB_ENDPOINT_XFER_INT, 294 USB_ENDPOINT_XFER_INT,
295 USB_ENDPOINT_XFER_INT, 295 USB_ENDPOINT_XFER_INT,
296 USB_ENDPOINT_XFER_INT, 296 USB_ENDPOINT_XFER_INT,
297 }; 297 };
298 298
299 /* 299 /*
300 * power control 300 * power control
301 */ 301 */
302 static void usbhsc_power_ctrl(struct usbhs_priv *priv, int enable) 302 static void usbhsc_power_ctrl(struct usbhs_priv *priv, int enable)
303 { 303 {
304 struct device *dev = usbhs_priv_to_dev(priv); 304 struct device *dev = usbhs_priv_to_dev(priv);
305 305
306 if (enable) { 306 if (enable) {
307 /* enable PM */ 307 /* enable PM */
308 pm_runtime_get_sync(dev); 308 pm_runtime_get_sync(dev);
309 309
310 /* USB on */ 310 /* USB on */
311 usbhs_sys_clock_ctrl(priv, enable); 311 usbhs_sys_clock_ctrl(priv, enable);
312 } else { 312 } else {
313 /* USB off */ 313 /* USB off */
314 usbhs_sys_clock_ctrl(priv, enable); 314 usbhs_sys_clock_ctrl(priv, enable);
315 315
316 /* disable PM */ 316 /* disable PM */
317 pm_runtime_put_sync(dev); 317 pm_runtime_put_sync(dev);
318 } 318 }
319 } 319 }
320 320
321 /* 321 /*
322 * hotplug 322 * hotplug
323 */ 323 */
324 static void usbhsc_hotplug(struct usbhs_priv *priv) 324 static void usbhsc_hotplug(struct usbhs_priv *priv)
325 { 325 {
326 struct platform_device *pdev = usbhs_priv_to_pdev(priv); 326 struct platform_device *pdev = usbhs_priv_to_pdev(priv);
327 struct usbhs_mod *mod = usbhs_mod_get_current(priv); 327 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
328 int id; 328 int id;
329 int enable; 329 int enable;
330 int ret; 330 int ret;
331 331
332 /* 332 /*
333 * get vbus status from platform 333 * get vbus status from platform
334 */ 334 */
335 enable = usbhs_platform_call(priv, get_vbus, pdev); 335 enable = usbhs_platform_call(priv, get_vbus, pdev);
336 336
337 /* 337 /*
338 * get id from platform 338 * get id from platform
339 */ 339 */
340 id = usbhs_platform_call(priv, get_id, pdev); 340 id = usbhs_platform_call(priv, get_id, pdev);
341 341
342 if (enable && !mod) { 342 if (enable && !mod) {
343 ret = usbhs_mod_change(priv, id); 343 ret = usbhs_mod_change(priv, id);
344 if (ret < 0) 344 if (ret < 0)
345 return; 345 return;
346 346
347 dev_dbg(&pdev->dev, "%s enable\n", __func__); 347 dev_dbg(&pdev->dev, "%s enable\n", __func__);
348 348
349 /* power on */ 349 /* power on */
350 if (usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL)) 350 if (usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL))
351 usbhsc_power_ctrl(priv, enable); 351 usbhsc_power_ctrl(priv, enable);
352 352
353 /* bus init */ 353 /* bus init */
354 usbhsc_set_buswait(priv); 354 usbhsc_set_buswait(priv);
355 usbhsc_bus_init(priv); 355 usbhsc_bus_init(priv);
356 356
357 /* module start */ 357 /* module start */
358 usbhs_mod_call(priv, start, priv); 358 usbhs_mod_call(priv, start, priv);
359 359
360 } else if (!enable && mod) { 360 } else if (!enable && mod) {
361 dev_dbg(&pdev->dev, "%s disable\n", __func__); 361 dev_dbg(&pdev->dev, "%s disable\n", __func__);
362 362
363 /* module stop */ 363 /* module stop */
364 usbhs_mod_call(priv, stop, priv); 364 usbhs_mod_call(priv, stop, priv);
365 365
366 /* bus init */ 366 /* bus init */
367 usbhsc_bus_init(priv); 367 usbhsc_bus_init(priv);
368 368
369 /* power off */ 369 /* power off */
370 if (usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL)) 370 if (usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL))
371 usbhsc_power_ctrl(priv, enable); 371 usbhsc_power_ctrl(priv, enable);
372 372
373 usbhs_mod_change(priv, -1); 373 usbhs_mod_change(priv, -1);
374 374
375 /* reset phy for next connection */ 375 /* reset phy for next connection */
376 usbhs_platform_call(priv, phy_reset, pdev); 376 usbhs_platform_call(priv, phy_reset, pdev);
377 } 377 }
378 } 378 }
379 379
380 /* 380 /*
381 * notify hotplug 381 * notify hotplug
382 */ 382 */
383 static void usbhsc_notify_hotplug(struct work_struct *work) 383 static void usbhsc_notify_hotplug(struct work_struct *work)
384 { 384 {
385 struct usbhs_priv *priv = container_of(work, 385 struct usbhs_priv *priv = container_of(work,
386 struct usbhs_priv, 386 struct usbhs_priv,
387 notify_hotplug_work.work); 387 notify_hotplug_work.work);
388 usbhsc_hotplug(priv); 388 usbhsc_hotplug(priv);
389 } 389 }
390 390
391 int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev) 391 int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev)
392 { 392 {
393 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev); 393 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
394 int delay = usbhs_get_dparam(priv, detection_delay); 394 int delay = usbhs_get_dparam(priv, detection_delay);
395 395
396 /* 396 /*
397 * This functions will be called in interrupt. 397 * This functions will be called in interrupt.
398 * To make sure safety context, 398 * To make sure safety context,
399 * use workqueue for usbhs_notify_hotplug 399 * use workqueue for usbhs_notify_hotplug
400 */ 400 */
401 schedule_delayed_work(&priv->notify_hotplug_work, delay); 401 schedule_delayed_work(&priv->notify_hotplug_work, delay);
402 return 0; 402 return 0;
403 } 403 }
404 404
405 /* 405 /*
406 * platform functions 406 * platform functions
407 */ 407 */
408 static int __devinit usbhs_probe(struct platform_device *pdev) 408 static int __devinit usbhs_probe(struct platform_device *pdev)
409 { 409 {
410 struct renesas_usbhs_platform_info *info = pdev->dev.platform_data; 410 struct renesas_usbhs_platform_info *info = pdev->dev.platform_data;
411 struct renesas_usbhs_driver_callback *dfunc; 411 struct renesas_usbhs_driver_callback *dfunc;
412 struct usbhs_priv *priv; 412 struct usbhs_priv *priv;
413 struct resource *res; 413 struct resource *res;
414 unsigned int irq; 414 unsigned int irq;
415 int ret; 415 int ret;
416 416
417 /* check platform information */ 417 /* check platform information */
418 if (!info || 418 if (!info ||
419 !info->platform_callback.get_id) { 419 !info->platform_callback.get_id) {
420 dev_err(&pdev->dev, "no platform information\n"); 420 dev_err(&pdev->dev, "no platform information\n");
421 return -EINVAL; 421 return -EINVAL;
422 } 422 }
423 423
424 /* platform data */ 424 /* platform data */
425 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 425 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
426 irq = platform_get_irq(pdev, 0); 426 irq = platform_get_irq(pdev, 0);
427 if (!res || (int)irq <= 0) { 427 if (!res || (int)irq <= 0) {
428 dev_err(&pdev->dev, "Not enough Renesas USB platform resources.\n"); 428 dev_err(&pdev->dev, "Not enough Renesas USB platform resources.\n");
429 return -ENODEV; 429 return -ENODEV;
430 } 430 }
431 431
432 /* usb private data */ 432 /* usb private data */
433 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 433 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
434 if (!priv) { 434 if (!priv) {
435 dev_err(&pdev->dev, "Could not allocate priv\n"); 435 dev_err(&pdev->dev, "Could not allocate priv\n");
436 return -ENOMEM; 436 return -ENOMEM;
437 } 437 }
438 438
439 priv->base = ioremap_nocache(res->start, resource_size(res)); 439 priv->base = ioremap_nocache(res->start, resource_size(res));
440 if (!priv->base) { 440 if (!priv->base) {
441 dev_err(&pdev->dev, "ioremap error.\n"); 441 dev_err(&pdev->dev, "ioremap error.\n");
442 ret = -ENOMEM; 442 ret = -ENOMEM;
443 goto probe_end_kfree; 443 goto probe_end_kfree;
444 } 444 }
445 445
446 /* 446 /*
447 * care platform info 447 * care platform info
448 */ 448 */
449 priv->pfunc = &info->platform_callback; 449 memcpy(&priv->pfunc,
450 priv->dparam = &info->driver_param; 450 &info->platform_callback,
451 sizeof(struct renesas_usbhs_platform_callback));
452 memcpy(&priv->dparam,
453 &info->driver_param,
454 sizeof(struct renesas_usbhs_driver_param));
451 455
452 /* set driver callback functions for platform */ 456 /* set driver callback functions for platform */
453 dfunc = &info->driver_callback; 457 dfunc = &info->driver_callback;
454 dfunc->notify_hotplug = usbhsc_drvcllbck_notify_hotplug; 458 dfunc->notify_hotplug = usbhsc_drvcllbck_notify_hotplug;
455 459
456 /* set default param if platform doesn't have */ 460 /* set default param if platform doesn't have */
457 if (!priv->dparam->pipe_type) { 461 if (!priv->dparam.pipe_type) {
458 priv->dparam->pipe_type = usbhsc_default_pipe_type; 462 priv->dparam.pipe_type = usbhsc_default_pipe_type;
459 priv->dparam->pipe_size = ARRAY_SIZE(usbhsc_default_pipe_type); 463 priv->dparam.pipe_size = ARRAY_SIZE(usbhsc_default_pipe_type);
460 } 464 }
461 if (!priv->dparam->pio_dma_border) 465 if (!priv->dparam.pio_dma_border)
462 priv->dparam->pio_dma_border = 64; /* 64byte */ 466 priv->dparam.pio_dma_border = 64; /* 64byte */
463 467
464 /* FIXME */ 468 /* FIXME */
465 /* runtime power control ? */ 469 /* runtime power control ? */
466 if (priv->pfunc->get_vbus) 470 if (priv->pfunc.get_vbus)
467 usbhsc_flags_set(priv, USBHSF_RUNTIME_PWCTRL); 471 usbhsc_flags_set(priv, USBHSF_RUNTIME_PWCTRL);
468 472
469 /* 473 /*
470 * priv settings 474 * priv settings
471 */ 475 */
472 priv->irq = irq; 476 priv->irq = irq;
473 priv->pdev = pdev; 477 priv->pdev = pdev;
474 INIT_DELAYED_WORK(&priv->notify_hotplug_work, usbhsc_notify_hotplug); 478 INIT_DELAYED_WORK(&priv->notify_hotplug_work, usbhsc_notify_hotplug);
475 spin_lock_init(usbhs_priv_to_lock(priv)); 479 spin_lock_init(usbhs_priv_to_lock(priv));
476 480
477 /* call pipe and module init */ 481 /* call pipe and module init */
478 ret = usbhs_pipe_probe(priv); 482 ret = usbhs_pipe_probe(priv);
479 if (ret < 0) 483 if (ret < 0)
480 goto probe_end_iounmap; 484 goto probe_end_iounmap;
481 485
482 ret = usbhs_fifo_probe(priv); 486 ret = usbhs_fifo_probe(priv);
483 if (ret < 0) 487 if (ret < 0)
484 goto probe_end_pipe_exit; 488 goto probe_end_pipe_exit;
485 489
486 ret = usbhs_mod_probe(priv); 490 ret = usbhs_mod_probe(priv);
487 if (ret < 0) 491 if (ret < 0)
488 goto probe_end_fifo_exit; 492 goto probe_end_fifo_exit;
489 493
490 /* dev_set_drvdata should be called after usbhs_mod_init */ 494 /* dev_set_drvdata should be called after usbhs_mod_init */
491 dev_set_drvdata(&pdev->dev, priv); 495 dev_set_drvdata(&pdev->dev, priv);
492 496
493 /* 497 /*
494 * deviece reset here because 498 * deviece reset here because
495 * USB device might be used in boot loader. 499 * USB device might be used in boot loader.
496 */ 500 */
497 usbhs_sys_clock_ctrl(priv, 0); 501 usbhs_sys_clock_ctrl(priv, 0);
498 502
499 /* 503 /*
500 * platform call 504 * platform call
501 * 505 *
502 * USB phy setup might depend on CPU/Board. 506 * USB phy setup might depend on CPU/Board.
503 * If platform has its callback functions, 507 * If platform has its callback functions,
504 * call it here. 508 * call it here.
505 */ 509 */
506 ret = usbhs_platform_call(priv, hardware_init, pdev); 510 ret = usbhs_platform_call(priv, hardware_init, pdev);
507 if (ret < 0) { 511 if (ret < 0) {
508 dev_err(&pdev->dev, "platform prove failed.\n"); 512 dev_err(&pdev->dev, "platform prove failed.\n");
509 goto probe_end_mod_exit; 513 goto probe_end_mod_exit;
510 } 514 }
511 515
512 /* reset phy for connection */ 516 /* reset phy for connection */
513 usbhs_platform_call(priv, phy_reset, pdev); 517 usbhs_platform_call(priv, phy_reset, pdev);
514 518
515 /* power control */ 519 /* power control */
516 pm_runtime_enable(&pdev->dev); 520 pm_runtime_enable(&pdev->dev);
517 if (!usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL)) { 521 if (!usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL)) {
518 usbhsc_power_ctrl(priv, 1); 522 usbhsc_power_ctrl(priv, 1);
519 usbhs_mod_autonomy_mode(priv); 523 usbhs_mod_autonomy_mode(priv);
520 } 524 }
521 525
522 /* 526 /*
523 * manual call notify_hotplug for cold plug 527 * manual call notify_hotplug for cold plug
524 */ 528 */
525 ret = usbhsc_drvcllbck_notify_hotplug(pdev); 529 ret = usbhsc_drvcllbck_notify_hotplug(pdev);
526 if (ret < 0) 530 if (ret < 0)
527 goto probe_end_call_remove; 531 goto probe_end_call_remove;
528 532
529 dev_info(&pdev->dev, "probed\n"); 533 dev_info(&pdev->dev, "probed\n");
530 534
531 return ret; 535 return ret;
532 536
533 probe_end_call_remove: 537 probe_end_call_remove:
534 usbhs_platform_call(priv, hardware_exit, pdev); 538 usbhs_platform_call(priv, hardware_exit, pdev);
535 probe_end_mod_exit: 539 probe_end_mod_exit:
536 usbhs_mod_remove(priv); 540 usbhs_mod_remove(priv);
537 probe_end_fifo_exit: 541 probe_end_fifo_exit:
538 usbhs_fifo_remove(priv); 542 usbhs_fifo_remove(priv);
539 probe_end_pipe_exit: 543 probe_end_pipe_exit:
540 usbhs_pipe_remove(priv); 544 usbhs_pipe_remove(priv);
541 probe_end_iounmap: 545 probe_end_iounmap:
542 iounmap(priv->base); 546 iounmap(priv->base);
543 probe_end_kfree: 547 probe_end_kfree:
544 kfree(priv); 548 kfree(priv);
545 549
546 dev_info(&pdev->dev, "probe failed\n"); 550 dev_info(&pdev->dev, "probe failed\n");
547 551
548 return ret; 552 return ret;
549 } 553 }
550 554
551 static int __devexit usbhs_remove(struct platform_device *pdev) 555 static int __devexit usbhs_remove(struct platform_device *pdev)
552 { 556 {
553 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev); 557 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
554 struct renesas_usbhs_platform_info *info = pdev->dev.platform_data; 558 struct renesas_usbhs_platform_info *info = pdev->dev.platform_data;
555 struct renesas_usbhs_driver_callback *dfunc = &info->driver_callback; 559 struct renesas_usbhs_driver_callback *dfunc = &info->driver_callback;
556 560
557 dev_dbg(&pdev->dev, "usb remove\n"); 561 dev_dbg(&pdev->dev, "usb remove\n");
558 562
559 dfunc->notify_hotplug = NULL; 563 dfunc->notify_hotplug = NULL;
560 564
561 /* power off */ 565 /* power off */
562 if (!usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL)) 566 if (!usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL))
563 usbhsc_power_ctrl(priv, 0); 567 usbhsc_power_ctrl(priv, 0);
564 568
565 pm_runtime_disable(&pdev->dev); 569 pm_runtime_disable(&pdev->dev);
566 570
567 usbhs_platform_call(priv, hardware_exit, pdev); 571 usbhs_platform_call(priv, hardware_exit, pdev);
568 usbhs_mod_remove(priv); 572 usbhs_mod_remove(priv);
569 usbhs_fifo_remove(priv); 573 usbhs_fifo_remove(priv);
570 usbhs_pipe_remove(priv); 574 usbhs_pipe_remove(priv);
571 iounmap(priv->base); 575 iounmap(priv->base);
572 kfree(priv); 576 kfree(priv);
573 577
574 return 0; 578 return 0;
575 } 579 }
576 580
577 static int usbhsc_suspend(struct device *dev) 581 static int usbhsc_suspend(struct device *dev)
578 { 582 {
579 struct usbhs_priv *priv = dev_get_drvdata(dev); 583 struct usbhs_priv *priv = dev_get_drvdata(dev);
580 struct usbhs_mod *mod = usbhs_mod_get_current(priv); 584 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
581 585
582 if (mod) { 586 if (mod) {
583 usbhs_mod_call(priv, stop, priv); 587 usbhs_mod_call(priv, stop, priv);
584 usbhs_mod_change(priv, -1); 588 usbhs_mod_change(priv, -1);
585 } 589 }
586 590
587 if (mod || !usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL)) 591 if (mod || !usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL))
588 usbhsc_power_ctrl(priv, 0); 592 usbhsc_power_ctrl(priv, 0);
589 593
590 return 0; 594 return 0;
591 } 595 }
592 596
593 static int usbhsc_resume(struct device *dev) 597 static int usbhsc_resume(struct device *dev)
594 { 598 {
595 struct usbhs_priv *priv = dev_get_drvdata(dev); 599 struct usbhs_priv *priv = dev_get_drvdata(dev);
596 struct platform_device *pdev = usbhs_priv_to_pdev(priv); 600 struct platform_device *pdev = usbhs_priv_to_pdev(priv);
597 601
598 usbhs_platform_call(priv, phy_reset, pdev); 602 usbhs_platform_call(priv, phy_reset, pdev);
599 603
600 if (!usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL)) 604 if (!usbhsc_flags_has(priv, USBHSF_RUNTIME_PWCTRL))
601 usbhsc_power_ctrl(priv, 1); 605 usbhsc_power_ctrl(priv, 1);
602 606
603 usbhsc_hotplug(priv); 607 usbhsc_hotplug(priv);
604 608
605 return 0; 609 return 0;
606 } 610 }
607 611
608 static int usbhsc_runtime_nop(struct device *dev) 612 static int usbhsc_runtime_nop(struct device *dev)
609 { 613 {
610 /* Runtime PM callback shared between ->runtime_suspend() 614 /* Runtime PM callback shared between ->runtime_suspend()
611 * and ->runtime_resume(). Simply returns success. 615 * and ->runtime_resume(). Simply returns success.
612 * 616 *
613 * This driver re-initializes all registers after 617 * This driver re-initializes all registers after
614 * pm_runtime_get_sync() anyway so there is no need 618 * pm_runtime_get_sync() anyway so there is no need
615 * to save and restore registers here. 619 * to save and restore registers here.
616 */ 620 */
617 return 0; 621 return 0;
618 } 622 }
619 623
620 static const struct dev_pm_ops usbhsc_pm_ops = { 624 static const struct dev_pm_ops usbhsc_pm_ops = {
621 .suspend = usbhsc_suspend, 625 .suspend = usbhsc_suspend,
622 .resume = usbhsc_resume, 626 .resume = usbhsc_resume,
623 .runtime_suspend = usbhsc_runtime_nop, 627 .runtime_suspend = usbhsc_runtime_nop,
624 .runtime_resume = usbhsc_runtime_nop, 628 .runtime_resume = usbhsc_runtime_nop,
625 }; 629 };
626 630
627 static struct platform_driver renesas_usbhs_driver = { 631 static struct platform_driver renesas_usbhs_driver = {
628 .driver = { 632 .driver = {
629 .name = "renesas_usbhs", 633 .name = "renesas_usbhs",
630 .pm = &usbhsc_pm_ops, 634 .pm = &usbhsc_pm_ops,
631 }, 635 },
632 .probe = usbhs_probe, 636 .probe = usbhs_probe,
633 .remove = __devexit_p(usbhs_remove), 637 .remove = __devexit_p(usbhs_remove),
634 }; 638 };
635 639
636 static int __init usbhs_init(void) 640 static int __init usbhs_init(void)
637 { 641 {
638 return platform_driver_register(&renesas_usbhs_driver); 642 return platform_driver_register(&renesas_usbhs_driver);
639 } 643 }
640 644
641 static void __exit usbhs_exit(void) 645 static void __exit usbhs_exit(void)
642 { 646 {
643 platform_driver_unregister(&renesas_usbhs_driver); 647 platform_driver_unregister(&renesas_usbhs_driver);
644 } 648 }
645 649
646 module_init(usbhs_init); 650 module_init(usbhs_init);
647 module_exit(usbhs_exit); 651 module_exit(usbhs_exit);
648 652
649 MODULE_LICENSE("GPL"); 653 MODULE_LICENSE("GPL");
650 MODULE_DESCRIPTION("Renesas USB driver"); 654 MODULE_DESCRIPTION("Renesas USB driver");
651 MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>"); 655 MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
652 656
drivers/usb/renesas_usbhs/common.h
Diff comments   View file @ 4829820
1 /* 1 /*
2 * Renesas USB driver 2 * Renesas USB driver
3 * 3 *
4 * Copyright (C) 2011 Renesas Solutions Corp. 4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 * 6 *
7 * This program is distributed in the hope that it will be useful, 7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details. 10 * GNU General Public License for more details.
11 * 11 *
12 * You should have received a copy of the GNU General Public License 12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software 13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 * 15 *
16 */ 16 */
17 #ifndef RENESAS_USB_DRIVER_H 17 #ifndef RENESAS_USB_DRIVER_H
18 #define RENESAS_USB_DRIVER_H 18 #define RENESAS_USB_DRIVER_H
19 19
20 #include <linux/platform_device.h> 20 #include <linux/platform_device.h>
21 #include <linux/usb/renesas_usbhs.h> 21 #include <linux/usb/renesas_usbhs.h>
22 22
23 struct usbhs_priv; 23 struct usbhs_priv;
24 24
25 #include "./mod.h" 25 #include "./mod.h"
26 #include "./pipe.h" 26 #include "./pipe.h"
27 27
28 /* 28 /*
29 * 29 *
30 * register define 30 * register define
31 * 31 *
32 */ 32 */
33 #define SYSCFG 0x0000 33 #define SYSCFG 0x0000
34 #define BUSWAIT 0x0002 34 #define BUSWAIT 0x0002
35 #define DVSTCTR 0x0008 35 #define DVSTCTR 0x0008
36 #define CFIFO 0x0014 36 #define CFIFO 0x0014
37 #define CFIFOSEL 0x0020 37 #define CFIFOSEL 0x0020
38 #define CFIFOCTR 0x0022 38 #define CFIFOCTR 0x0022
39 #define D0FIFO 0x0100 39 #define D0FIFO 0x0100
40 #define D0FIFOSEL 0x0028 40 #define D0FIFOSEL 0x0028
41 #define D0FIFOCTR 0x002A 41 #define D0FIFOCTR 0x002A
42 #define D1FIFO 0x0120 42 #define D1FIFO 0x0120
43 #define D1FIFOSEL 0x002C 43 #define D1FIFOSEL 0x002C
44 #define D1FIFOCTR 0x002E 44 #define D1FIFOCTR 0x002E
45 #define INTENB0 0x0030 45 #define INTENB0 0x0030
46 #define INTENB1 0x0032 46 #define INTENB1 0x0032
47 #define BRDYENB 0x0036 47 #define BRDYENB 0x0036
48 #define NRDYENB 0x0038 48 #define NRDYENB 0x0038
49 #define BEMPENB 0x003A 49 #define BEMPENB 0x003A
50 #define INTSTS0 0x0040 50 #define INTSTS0 0x0040
51 #define INTSTS1 0x0042 51 #define INTSTS1 0x0042
52 #define BRDYSTS 0x0046 52 #define BRDYSTS 0x0046
53 #define NRDYSTS 0x0048 53 #define NRDYSTS 0x0048
54 #define BEMPSTS 0x004A 54 #define BEMPSTS 0x004A
55 #define FRMNUM 0x004C 55 #define FRMNUM 0x004C
56 #define USBREQ 0x0054 /* USB request type register */ 56 #define USBREQ 0x0054 /* USB request type register */
57 #define USBVAL 0x0056 /* USB request value register */ 57 #define USBVAL 0x0056 /* USB request value register */
58 #define USBINDX 0x0058 /* USB request index register */ 58 #define USBINDX 0x0058 /* USB request index register */
59 #define USBLENG 0x005A /* USB request length register */ 59 #define USBLENG 0x005A /* USB request length register */
60 #define DCPCFG 0x005C 60 #define DCPCFG 0x005C
61 #define DCPMAXP 0x005E 61 #define DCPMAXP 0x005E
62 #define DCPCTR 0x0060 62 #define DCPCTR 0x0060
63 #define PIPESEL 0x0064 63 #define PIPESEL 0x0064
64 #define PIPECFG 0x0068 64 #define PIPECFG 0x0068
65 #define PIPEBUF 0x006A 65 #define PIPEBUF 0x006A
66 #define PIPEMAXP 0x006C 66 #define PIPEMAXP 0x006C
67 #define PIPEPERI 0x006E 67 #define PIPEPERI 0x006E
68 #define PIPEnCTR 0x0070 68 #define PIPEnCTR 0x0070
69 #define PIPE1TRE 0x0090 69 #define PIPE1TRE 0x0090
70 #define PIPE1TRN 0x0092 70 #define PIPE1TRN 0x0092
71 #define PIPE2TRE 0x0094 71 #define PIPE2TRE 0x0094
72 #define PIPE2TRN 0x0096 72 #define PIPE2TRN 0x0096
73 #define PIPE3TRE 0x0098 73 #define PIPE3TRE 0x0098
74 #define PIPE3TRN 0x009A 74 #define PIPE3TRN 0x009A
75 #define PIPE4TRE 0x009C 75 #define PIPE4TRE 0x009C
76 #define PIPE4TRN 0x009E 76 #define PIPE4TRN 0x009E
77 #define PIPE5TRE 0x00A0 77 #define PIPE5TRE 0x00A0
78 #define PIPE5TRN 0x00A2 78 #define PIPE5TRN 0x00A2
79 #define PIPEBTRE 0x00A4 79 #define PIPEBTRE 0x00A4
80 #define PIPEBTRN 0x00A6 80 #define PIPEBTRN 0x00A6
81 #define PIPECTRE 0x00A8 81 #define PIPECTRE 0x00A8
82 #define PIPECTRN 0x00AA 82 #define PIPECTRN 0x00AA
83 #define PIPEDTRE 0x00AC 83 #define PIPEDTRE 0x00AC
84 #define PIPEDTRN 0x00AE 84 #define PIPEDTRN 0x00AE
85 #define PIPEETRE 0x00B0 85 #define PIPEETRE 0x00B0
86 #define PIPEETRN 0x00B2 86 #define PIPEETRN 0x00B2
87 #define PIPEFTRE 0x00B4 87 #define PIPEFTRE 0x00B4
88 #define PIPEFTRN 0x00B6 88 #define PIPEFTRN 0x00B6
89 #define PIPE9TRE 0x00B8 89 #define PIPE9TRE 0x00B8
90 #define PIPE9TRN 0x00BA 90 #define PIPE9TRN 0x00BA
91 #define PIPEATRE 0x00BC 91 #define PIPEATRE 0x00BC
92 #define PIPEATRN 0x00BE 92 #define PIPEATRN 0x00BE
93 #define DEVADD0 0x00D0 /* Device address n configuration */ 93 #define DEVADD0 0x00D0 /* Device address n configuration */
94 #define DEVADD1 0x00D2 94 #define DEVADD1 0x00D2
95 #define DEVADD2 0x00D4 95 #define DEVADD2 0x00D4
96 #define DEVADD3 0x00D6 96 #define DEVADD3 0x00D6
97 #define DEVADD4 0x00D8 97 #define DEVADD4 0x00D8
98 #define DEVADD5 0x00DA 98 #define DEVADD5 0x00DA
99 #define DEVADD6 0x00DC 99 #define DEVADD6 0x00DC
100 #define DEVADD7 0x00DE 100 #define DEVADD7 0x00DE
101 #define DEVADD8 0x00E0 101 #define DEVADD8 0x00E0
102 #define DEVADD9 0x00E2 102 #define DEVADD9 0x00E2
103 #define DEVADDA 0x00E4 103 #define DEVADDA 0x00E4
104 104
105 /* SYSCFG */ 105 /* SYSCFG */
106 #define SCKE (1 << 10) /* USB Module Clock Enable */ 106 #define SCKE (1 << 10) /* USB Module Clock Enable */
107 #define HSE (1 << 7) /* High-Speed Operation Enable */ 107 #define HSE (1 << 7) /* High-Speed Operation Enable */
108 #define DCFM (1 << 6) /* Controller Function Select */ 108 #define DCFM (1 << 6) /* Controller Function Select */
109 #define DRPD (1 << 5) /* D+ Line/D- Line Resistance Control */ 109 #define DRPD (1 << 5) /* D+ Line/D- Line Resistance Control */
110 #define DPRPU (1 << 4) /* D+ Line Resistance Control */ 110 #define DPRPU (1 << 4) /* D+ Line Resistance Control */
111 #define USBE (1 << 0) /* USB Module Operation Enable */ 111 #define USBE (1 << 0) /* USB Module Operation Enable */
112 112
113 /* DVSTCTR */ 113 /* DVSTCTR */
114 #define EXTLP (1 << 10) /* Controls the EXTLP pin output state */ 114 #define EXTLP (1 << 10) /* Controls the EXTLP pin output state */
115 #define PWEN (1 << 9) /* Controls the PWEN pin output state */ 115 #define PWEN (1 << 9) /* Controls the PWEN pin output state */
116 #define USBRST (1 << 6) /* Bus Reset Output */ 116 #define USBRST (1 << 6) /* Bus Reset Output */
117 #define UACT (1 << 4) /* USB Bus Enable */ 117 #define UACT (1 << 4) /* USB Bus Enable */
118 #define RHST (0x7) /* Reset Handshake */ 118 #define RHST (0x7) /* Reset Handshake */
119 #define RHST_LOW_SPEED 1 /* Low-speed connection */ 119 #define RHST_LOW_SPEED 1 /* Low-speed connection */
120 #define RHST_FULL_SPEED 2 /* Full-speed connection */ 120 #define RHST_FULL_SPEED 2 /* Full-speed connection */
121 #define RHST_HIGH_SPEED 3 /* High-speed connection */ 121 #define RHST_HIGH_SPEED 3 /* High-speed connection */
122 122
123 /* CFIFOSEL */ 123 /* CFIFOSEL */
124 #define DREQE (1 << 12) /* DMA Transfer Request Enable */ 124 #define DREQE (1 << 12) /* DMA Transfer Request Enable */
125 #define MBW_32 (0x2 << 10) /* CFIFO Port Access Bit Width */ 125 #define MBW_32 (0x2 << 10) /* CFIFO Port Access Bit Width */
126 126
127 /* CFIFOCTR */ 127 /* CFIFOCTR */
128 #define BVAL (1 << 15) /* Buffer Memory Enable Flag */ 128 #define BVAL (1 << 15) /* Buffer Memory Enable Flag */
129 #define BCLR (1 << 14) /* CPU buffer clear */ 129 #define BCLR (1 << 14) /* CPU buffer clear */
130 #define FRDY (1 << 13) /* FIFO Port Ready */ 130 #define FRDY (1 << 13) /* FIFO Port Ready */
131 #define DTLN_MASK (0x0FFF) /* Receive Data Length */ 131 #define DTLN_MASK (0x0FFF) /* Receive Data Length */
132 132
133 /* INTENB0 */ 133 /* INTENB0 */
134 #define VBSE (1 << 15) /* Enable IRQ VBUS_0 and VBUSIN_0 */ 134 #define VBSE (1 << 15) /* Enable IRQ VBUS_0 and VBUSIN_0 */
135 #define RSME (1 << 14) /* Enable IRQ Resume */ 135 #define RSME (1 << 14) /* Enable IRQ Resume */
136 #define SOFE (1 << 13) /* Enable IRQ Frame Number Update */ 136 #define SOFE (1 << 13) /* Enable IRQ Frame Number Update */
137 #define DVSE (1 << 12) /* Enable IRQ Device State Transition */ 137 #define DVSE (1 << 12) /* Enable IRQ Device State Transition */
138 #define CTRE (1 << 11) /* Enable IRQ Control Stage Transition */ 138 #define CTRE (1 << 11) /* Enable IRQ Control Stage Transition */
139 #define BEMPE (1 << 10) /* Enable IRQ Buffer Empty */ 139 #define BEMPE (1 << 10) /* Enable IRQ Buffer Empty */
140 #define NRDYE (1 << 9) /* Enable IRQ Buffer Not Ready Response */ 140 #define NRDYE (1 << 9) /* Enable IRQ Buffer Not Ready Response */
141 #define BRDYE (1 << 8) /* Enable IRQ Buffer Ready */ 141 #define BRDYE (1 << 8) /* Enable IRQ Buffer Ready */
142 142
143 /* INTENB1 */ 143 /* INTENB1 */
144 #define BCHGE (1 << 14) /* USB Bus Change Interrupt Enable */ 144 #define BCHGE (1 << 14) /* USB Bus Change Interrupt Enable */
145 #define DTCHE (1 << 12) /* Disconnection Detect Interrupt Enable */ 145 #define DTCHE (1 << 12) /* Disconnection Detect Interrupt Enable */
146 #define ATTCHE (1 << 11) /* Connection Detect Interrupt Enable */ 146 #define ATTCHE (1 << 11) /* Connection Detect Interrupt Enable */
147 #define EOFERRE (1 << 6) /* EOF Error Detect Interrupt Enable */ 147 #define EOFERRE (1 << 6) /* EOF Error Detect Interrupt Enable */
148 #define SIGNE (1 << 5) /* Setup Transaction Error Interrupt Enable */ 148 #define SIGNE (1 << 5) /* Setup Transaction Error Interrupt Enable */
149 #define SACKE (1 << 4) /* Setup Transaction ACK Interrupt Enable */ 149 #define SACKE (1 << 4) /* Setup Transaction ACK Interrupt Enable */
150 150
151 /* INTSTS0 */ 151 /* INTSTS0 */
152 #define VBINT (1 << 15) /* VBUS0_0 and VBUS1_0 Interrupt Status */ 152 #define VBINT (1 << 15) /* VBUS0_0 and VBUS1_0 Interrupt Status */
153 #define DVST (1 << 12) /* Device State Transition Interrupt Status */ 153 #define DVST (1 << 12) /* Device State Transition Interrupt Status */
154 #define CTRT (1 << 11) /* Control Stage Interrupt Status */ 154 #define CTRT (1 << 11) /* Control Stage Interrupt Status */
155 #define BEMP (1 << 10) /* Buffer Empty Interrupt Status */ 155 #define BEMP (1 << 10) /* Buffer Empty Interrupt Status */
156 #define BRDY (1 << 8) /* Buffer Ready Interrupt Status */ 156 #define BRDY (1 << 8) /* Buffer Ready Interrupt Status */
157 #define VBSTS (1 << 7) /* VBUS_0 and VBUSIN_0 Input Status */ 157 #define VBSTS (1 << 7) /* VBUS_0 and VBUSIN_0 Input Status */
158 #define VALID (1 << 3) /* USB Request Receive */ 158 #define VALID (1 << 3) /* USB Request Receive */
159 159
160 #define DVSQ_MASK (0x3 << 4) /* Device State */ 160 #define DVSQ_MASK (0x3 << 4) /* Device State */
161 #define POWER_STATE (0 << 4) 161 #define POWER_STATE (0 << 4)
162 #define DEFAULT_STATE (1 << 4) 162 #define DEFAULT_STATE (1 << 4)
163 #define ADDRESS_STATE (2 << 4) 163 #define ADDRESS_STATE (2 << 4)
164 #define CONFIGURATION_STATE (3 << 4) 164 #define CONFIGURATION_STATE (3 << 4)
165 165
166 #define CTSQ_MASK (0x7) /* Control Transfer Stage */ 166 #define CTSQ_MASK (0x7) /* Control Transfer Stage */
167 #define IDLE_SETUP_STAGE 0 /* Idle stage or setup stage */ 167 #define IDLE_SETUP_STAGE 0 /* Idle stage or setup stage */
168 #define READ_DATA_STAGE 1 /* Control read data stage */ 168 #define READ_DATA_STAGE 1 /* Control read data stage */
169 #define READ_STATUS_STAGE 2 /* Control read status stage */ 169 #define READ_STATUS_STAGE 2 /* Control read status stage */
170 #define WRITE_DATA_STAGE 3 /* Control write data stage */ 170 #define WRITE_DATA_STAGE 3 /* Control write data stage */
171 #define WRITE_STATUS_STAGE 4 /* Control write status stage */ 171 #define WRITE_STATUS_STAGE 4 /* Control write status stage */
172 #define NODATA_STATUS_STAGE 5 /* Control write NoData status stage */ 172 #define NODATA_STATUS_STAGE 5 /* Control write NoData status stage */
173 #define SEQUENCE_ERROR 6 /* Control transfer sequence error */ 173 #define SEQUENCE_ERROR 6 /* Control transfer sequence error */
174 174
175 /* INTSTS1 */ 175 /* INTSTS1 */
176 #define OVRCR (1 << 15) /* OVRCR Interrupt Status */ 176 #define OVRCR (1 << 15) /* OVRCR Interrupt Status */
177 #define BCHG (1 << 14) /* USB Bus Change Interrupt Status */ 177 #define BCHG (1 << 14) /* USB Bus Change Interrupt Status */
178 #define DTCH (1 << 12) /* USB Disconnection Detect Interrupt Status */ 178 #define DTCH (1 << 12) /* USB Disconnection Detect Interrupt Status */
179 #define ATTCH (1 << 11) /* ATTCH Interrupt Status */ 179 #define ATTCH (1 << 11) /* ATTCH Interrupt Status */
180 #define EOFERR (1 << 6) /* EOF Error Detect Interrupt Status */ 180 #define EOFERR (1 << 6) /* EOF Error Detect Interrupt Status */
181 #define SIGN (1 << 5) /* Setup Transaction Error Interrupt Status */ 181 #define SIGN (1 << 5) /* Setup Transaction Error Interrupt Status */
182 #define SACK (1 << 4) /* Setup Transaction ACK Response Interrupt Status */ 182 #define SACK (1 << 4) /* Setup Transaction ACK Response Interrupt Status */
183 183
184 /* PIPECFG */ 184 /* PIPECFG */
185 /* DCPCFG */ 185 /* DCPCFG */
186 #define TYPE_NONE (0 << 14) /* Transfer Type */ 186 #define TYPE_NONE (0 << 14) /* Transfer Type */
187 #define TYPE_BULK (1 << 14) 187 #define TYPE_BULK (1 << 14)
188 #define TYPE_INT (2 << 14) 188 #define TYPE_INT (2 << 14)
189 #define TYPE_ISO (3 << 14) 189 #define TYPE_ISO (3 << 14)
190 #define DBLB (1 << 9) /* Double Buffer Mode */ 190 #define DBLB (1 << 9) /* Double Buffer Mode */
191 #define SHTNAK (1 << 7) /* Pipe Disable in Transfer End */ 191 #define SHTNAK (1 << 7) /* Pipe Disable in Transfer End */
192 #define DIR_OUT (1 << 4) /* Transfer Direction */ 192 #define DIR_OUT (1 << 4) /* Transfer Direction */
193 193
194 /* PIPEMAXP */ 194 /* PIPEMAXP */
195 /* DCPMAXP */ 195 /* DCPMAXP */
196 #define DEVSEL_MASK (0xF << 12) /* Device Select */ 196 #define DEVSEL_MASK (0xF << 12) /* Device Select */
197 #define DCP_MAXP_MASK (0x7F) 197 #define DCP_MAXP_MASK (0x7F)
198 #define PIPE_MAXP_MASK (0x7FF) 198 #define PIPE_MAXP_MASK (0x7FF)
199 199
200 /* PIPEBUF */ 200 /* PIPEBUF */
201 #define BUFSIZE_SHIFT 10 201 #define BUFSIZE_SHIFT 10
202 #define BUFSIZE_MASK (0x1F << BUFSIZE_SHIFT) 202 #define BUFSIZE_MASK (0x1F << BUFSIZE_SHIFT)
203 #define BUFNMB_MASK (0xFF) 203 #define BUFNMB_MASK (0xFF)
204 204
205 /* PIPEnCTR */ 205 /* PIPEnCTR */
206 /* DCPCTR */ 206 /* DCPCTR */
207 #define BSTS (1 << 15) /* Buffer Status */ 207 #define BSTS (1 << 15) /* Buffer Status */
208 #define SUREQ (1 << 14) /* Sending SETUP Token */ 208 #define SUREQ (1 << 14) /* Sending SETUP Token */
209 #define CSSTS (1 << 12) /* CSSTS Status */ 209 #define CSSTS (1 << 12) /* CSSTS Status */
210 #define ACLRM (1 << 9) /* Buffer Auto-Clear Mode */ 210 #define ACLRM (1 << 9) /* Buffer Auto-Clear Mode */
211 #define SQCLR (1 << 8) /* Toggle Bit Clear */ 211 #define SQCLR (1 << 8) /* Toggle Bit Clear */
212 #define SQSET (1 << 7) /* Toggle Bit Set */ 212 #define SQSET (1 << 7) /* Toggle Bit Set */
213 #define PBUSY (1 << 5) /* Pipe Busy */ 213 #define PBUSY (1 << 5) /* Pipe Busy */
214 #define PID_MASK (0x3) /* Response PID */ 214 #define PID_MASK (0x3) /* Response PID */
215 #define PID_NAK 0 215 #define PID_NAK 0
216 #define PID_BUF 1 216 #define PID_BUF 1
217 #define PID_STALL10 2 217 #define PID_STALL10 2
218 #define PID_STALL11 3 218 #define PID_STALL11 3
219 219
220 #define CCPL (1 << 2) /* Control Transfer End Enable */ 220 #define CCPL (1 << 2) /* Control Transfer End Enable */
221 221
222 /* PIPEnTRE */ 222 /* PIPEnTRE */
223 #define TRENB (1 << 9) /* Transaction Counter Enable */ 223 #define TRENB (1 << 9) /* Transaction Counter Enable */
224 #define TRCLR (1 << 8) /* Transaction Counter Clear */ 224 #define TRCLR (1 << 8) /* Transaction Counter Clear */
225 225
226 /* FRMNUM */ 226 /* FRMNUM */
227 #define FRNM_MASK (0x7FF) 227 #define FRNM_MASK (0x7FF)
228 228
229 /* DEVADDn */ 229 /* DEVADDn */
230 #define UPPHUB(x) (((x) & 0xF) << 11) /* HUB Register */ 230 #define UPPHUB(x) (((x) & 0xF) << 11) /* HUB Register */
231 #define HUBPORT(x) (((x) & 0x7) << 8) /* HUB Port for Target Device */ 231 #define HUBPORT(x) (((x) & 0x7) << 8) /* HUB Port for Target Device */
232 #define USBSPD(x) (((x) & 0x3) << 6) /* Device Transfer Rate */ 232 #define USBSPD(x) (((x) & 0x3) << 6) /* Device Transfer Rate */
233 #define USBSPD_SPEED_LOW 0x1 233 #define USBSPD_SPEED_LOW 0x1
234 #define USBSPD_SPEED_FULL 0x2 234 #define USBSPD_SPEED_FULL 0x2
235 #define USBSPD_SPEED_HIGH 0x3 235 #define USBSPD_SPEED_HIGH 0x3
236 236
237 /* 237 /*
238 * struct 238 * struct
239 */ 239 */
240 struct usbhs_priv { 240 struct usbhs_priv {
241 241
242 void __iomem *base; 242 void __iomem *base;
243 unsigned int irq; 243 unsigned int irq;
244 244
245 struct renesas_usbhs_platform_callback *pfunc; 245 struct renesas_usbhs_platform_callback pfunc;
246 struct renesas_usbhs_driver_param *dparam; 246 struct renesas_usbhs_driver_param dparam;
247 247
248 struct delayed_work notify_hotplug_work; 248 struct delayed_work notify_hotplug_work;
249 struct platform_device *pdev; 249 struct platform_device *pdev;
250 250
251 spinlock_t lock; 251 spinlock_t lock;
252 252
253 u32 flags; 253 u32 flags;
254 254
255 /* 255 /*
256 * module control 256 * module control
257 */ 257 */
258 struct usbhs_mod_info mod_info; 258 struct usbhs_mod_info mod_info;
259 259
260 /* 260 /*
261 * pipe control 261 * pipe control
262 */ 262 */
263 struct usbhs_pipe_info pipe_info; 263 struct usbhs_pipe_info pipe_info;
264 264
265 /* 265 /*
266 * fifo control 266 * fifo control
267 */ 267 */
268 struct usbhs_fifo_info fifo_info; 268 struct usbhs_fifo_info fifo_info;
269 }; 269 };
270 270
271 /* 271 /*
272 * common 272 * common
273 */ 273 */
274 u16 usbhs_read(struct usbhs_priv *priv, u32 reg); 274 u16 usbhs_read(struct usbhs_priv *priv, u32 reg);
275 void usbhs_write(struct usbhs_priv *priv, u32 reg, u16 data); 275 void usbhs_write(struct usbhs_priv *priv, u32 reg, u16 data);
276 void usbhs_bset(struct usbhs_priv *priv, u32 reg, u16 mask, u16 data); 276 void usbhs_bset(struct usbhs_priv *priv, u32 reg, u16 mask, u16 data);
277 277
278 int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev); 278 int usbhsc_drvcllbck_notify_hotplug(struct platform_device *pdev);
279 279
280 #define usbhs_lock(p, f) spin_lock_irqsave(usbhs_priv_to_lock(p), f) 280 #define usbhs_lock(p, f) spin_lock_irqsave(usbhs_priv_to_lock(p), f)
281 #define usbhs_unlock(p, f) spin_unlock_irqrestore(usbhs_priv_to_lock(p), f) 281 #define usbhs_unlock(p, f) spin_unlock_irqrestore(usbhs_priv_to_lock(p), f)
282 282
283 /* 283 /*
284 * sysconfig 284 * sysconfig
285 */ 285 */
286 void usbhs_sys_clock_ctrl(struct usbhs_priv *priv, int enable); 286 void usbhs_sys_clock_ctrl(struct usbhs_priv *priv, int enable);
287 void usbhs_sys_hispeed_ctrl(struct usbhs_priv *priv, int enable); 287 void usbhs_sys_hispeed_ctrl(struct usbhs_priv *priv, int enable);
288 void usbhs_sys_usb_ctrl(struct usbhs_priv *priv, int enable); 288 void usbhs_sys_usb_ctrl(struct usbhs_priv *priv, int enable);
289 void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable); 289 void usbhs_sys_host_ctrl(struct usbhs_priv *priv, int enable);
290 void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable); 290 void usbhs_sys_function_ctrl(struct usbhs_priv *priv, int enable);
291 291
292 /* 292 /*
293 * usb request 293 * usb request
294 */ 294 */
295 void usbhs_usbreq_get_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req); 295 void usbhs_usbreq_get_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req);
296 void usbhs_usbreq_set_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req); 296 void usbhs_usbreq_set_val(struct usbhs_priv *priv, struct usb_ctrlrequest *req);
297 297
298 /* 298 /*
299 * bus 299 * bus
300 */ 300 */
301 void usbhs_bus_send_sof_enable(struct usbhs_priv *priv); 301 void usbhs_bus_send_sof_enable(struct usbhs_priv *priv);
302 void usbhs_bus_send_reset(struct usbhs_priv *priv); 302 void usbhs_bus_send_reset(struct usbhs_priv *priv);
303 int usbhs_bus_get_speed(struct usbhs_priv *priv); 303 int usbhs_bus_get_speed(struct usbhs_priv *priv);
304 int usbhs_vbus_ctrl(struct usbhs_priv *priv, int enable); 304 int usbhs_vbus_ctrl(struct usbhs_priv *priv, int enable);
305 305
306 /* 306 /*
307 * frame 307 * frame
308 */ 308 */
309 int usbhs_frame_get_num(struct usbhs_priv *priv); 309 int usbhs_frame_get_num(struct usbhs_priv *priv);
310 310
311 /* 311 /*
312 * device config 312 * device config
313 */ 313 */
314 int usbhs_set_device_speed(struct usbhs_priv *priv, int devnum, u16 upphub, 314 int usbhs_set_device_speed(struct usbhs_priv *priv, int devnum, u16 upphub,
315 u16 hubport, u16 speed); 315 u16 hubport, u16 speed);
316 316
317 /* 317 /*
318 * data 318 * data
319 */ 319 */
320 struct usbhs_priv *usbhs_pdev_to_priv(struct platform_device *pdev); 320 struct usbhs_priv *usbhs_pdev_to_priv(struct platform_device *pdev);
321 #define usbhs_get_dparam(priv, param) (priv->dparam->param) 321 #define usbhs_get_dparam(priv, param) (priv->dparam.param)
322 #define usbhs_priv_to_pdev(priv) (priv->pdev) 322 #define usbhs_priv_to_pdev(priv) (priv->pdev)
323 #define usbhs_priv_to_dev(priv) (&priv->pdev->dev) 323 #define usbhs_priv_to_dev(priv) (&priv->pdev->dev)
324 #define usbhs_priv_to_lock(priv) (&priv->lock) 324 #define usbhs_priv_to_lock(priv) (&priv->lock)
325 325
326 #endif /* RENESAS_USB_DRIVER_H */ 326 #endif /* RENESAS_USB_DRIVER_H */
327 327
drivers/usb/renesas_usbhs/mod.c
Diff comments   View file @ 4829820
1 /* 1 /*
2 * Renesas USB driver 2 * Renesas USB driver
3 * 3 *
4 * Copyright (C) 2011 Renesas Solutions Corp. 4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 * 6 *
7 * This program is distributed in the hope that it will be useful, 7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details. 10 * GNU General Public License for more details.
11 * 11 *
12 * You should have received a copy of the GNU General Public License 12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software 13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 * 15 *
16 */ 16 */
17 #include <linux/interrupt.h> 17 #include <linux/interrupt.h>
18 18
19 #include "./common.h" 19 #include "./common.h"
20 #include "./mod.h" 20 #include "./mod.h"
21 21
22 #define usbhs_priv_to_modinfo(priv) (&priv->mod_info) 22 #define usbhs_priv_to_modinfo(priv) (&priv->mod_info)
23 #define usbhs_mod_info_call(priv, func, param...) \ 23 #define usbhs_mod_info_call(priv, func, param...) \
24 ({ \ 24 ({ \
25 struct usbhs_mod_info *info; \ 25 struct usbhs_mod_info *info; \
26 info = usbhs_priv_to_modinfo(priv); \ 26 info = usbhs_priv_to_modinfo(priv); \
27 !info->func ? 0 : \ 27 !info->func ? 0 : \
28 info->func(param); \ 28 info->func(param); \
29 }) 29 })
30 30
31 /* 31 /*
32 * autonomy 32 * autonomy
33 * 33 *
34 * these functions are used if platform doesn't have external phy. 34 * these functions are used if platform doesn't have external phy.
35 * -> there is no "notify_hotplug" callback from platform 35 * -> there is no "notify_hotplug" callback from platform
36 * -> call "notify_hotplug" by itself 36 * -> call "notify_hotplug" by itself
37 * -> use own interrupt to connect/disconnect 37 * -> use own interrupt to connect/disconnect
38 * -> it mean module clock is always ON 38 * -> it mean module clock is always ON
39 * ~~~~~~~~~~~~~~~~~~~~~~~~~ 39 * ~~~~~~~~~~~~~~~~~~~~~~~~~
40 */ 40 */
41 static int usbhsm_autonomy_get_vbus(struct platform_device *pdev) 41 static int usbhsm_autonomy_get_vbus(struct platform_device *pdev)
42 { 42 {
43 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev); 43 struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
44 44
45 return VBSTS & usbhs_read(priv, INTSTS0); 45 return VBSTS & usbhs_read(priv, INTSTS0);
46 } 46 }
47 47
48 static int usbhsm_autonomy_irq_vbus(struct usbhs_priv *priv, 48 static int usbhsm_autonomy_irq_vbus(struct usbhs_priv *priv,
49 struct usbhs_irq_state *irq_state) 49 struct usbhs_irq_state *irq_state)
50 { 50 {
51 struct platform_device *pdev = usbhs_priv_to_pdev(priv); 51 struct platform_device *pdev = usbhs_priv_to_pdev(priv);
52 52
53 return usbhsc_drvcllbck_notify_hotplug(pdev); 53 return usbhsc_drvcllbck_notify_hotplug(pdev);
54 } 54 }
55 55
56 void usbhs_mod_autonomy_mode(struct usbhs_priv *priv) 56 void usbhs_mod_autonomy_mode(struct usbhs_priv *priv)
57 { 57 {
58 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv); 58 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
59 59
60 info->irq_vbus = usbhsm_autonomy_irq_vbus; 60 info->irq_vbus = usbhsm_autonomy_irq_vbus;
61 priv->pfunc->get_vbus = usbhsm_autonomy_get_vbus; 61 priv->pfunc.get_vbus = usbhsm_autonomy_get_vbus;
62 62
63 usbhs_irq_callback_update(priv, NULL); 63 usbhs_irq_callback_update(priv, NULL);
64 } 64 }
65 65
66 /* 66 /*
67 * host / gadget functions 67 * host / gadget functions
68 * 68 *
69 * renesas_usbhs host/gadget can register itself by below functions. 69 * renesas_usbhs host/gadget can register itself by below functions.
70 * these functions are called when probe 70 * these functions are called when probe
71 * 71 *
72 */ 72 */
73 void usbhs_mod_register(struct usbhs_priv *priv, struct usbhs_mod *mod, int id) 73 void usbhs_mod_register(struct usbhs_priv *priv, struct usbhs_mod *mod, int id)
74 { 74 {
75 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv); 75 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
76 76
77 info->mod[id] = mod; 77 info->mod[id] = mod;
78 mod->priv = priv; 78 mod->priv = priv;
79 } 79 }
80 80
81 struct usbhs_mod *usbhs_mod_get(struct usbhs_priv *priv, int id) 81 struct usbhs_mod *usbhs_mod_get(struct usbhs_priv *priv, int id)
82 { 82 {
83 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv); 83 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
84 struct usbhs_mod *ret = NULL; 84 struct usbhs_mod *ret = NULL;
85 85
86 switch (id) { 86 switch (id) {
87 case USBHS_HOST: 87 case USBHS_HOST:
88 case USBHS_GADGET: 88 case USBHS_GADGET:
89 ret = info->mod[id]; 89 ret = info->mod[id];
90 break; 90 break;
91 } 91 }
92 92
93 return ret; 93 return ret;
94 } 94 }
95 95
96 int usbhs_mod_is_host(struct usbhs_priv *priv) 96 int usbhs_mod_is_host(struct usbhs_priv *priv)
97 { 97 {
98 struct usbhs_mod *mod = usbhs_mod_get_current(priv); 98 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
99 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv); 99 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
100 100
101 if (!mod) 101 if (!mod)
102 return -EINVAL; 102 return -EINVAL;
103 103
104 return info->mod[USBHS_HOST] == mod; 104 return info->mod[USBHS_HOST] == mod;
105 } 105 }
106 106
107 struct usbhs_mod *usbhs_mod_get_current(struct usbhs_priv *priv) 107 struct usbhs_mod *usbhs_mod_get_current(struct usbhs_priv *priv)
108 { 108 {
109 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv); 109 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
110 110
111 return info->curt; 111 return info->curt;
112 } 112 }
113 113
114 int usbhs_mod_change(struct usbhs_priv *priv, int id) 114 int usbhs_mod_change(struct usbhs_priv *priv, int id)
115 { 115 {
116 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv); 116 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
117 struct usbhs_mod *mod = NULL; 117 struct usbhs_mod *mod = NULL;
118 int ret = 0; 118 int ret = 0;
119 119
120 /* id < 0 mean no current */ 120 /* id < 0 mean no current */
121 switch (id) { 121 switch (id) {
122 case USBHS_HOST: 122 case USBHS_HOST:
123 case USBHS_GADGET: 123 case USBHS_GADGET:
124 mod = info->mod[id]; 124 mod = info->mod[id];
125 break; 125 break;
126 default: 126 default:
127 ret = -EINVAL; 127 ret = -EINVAL;
128 } 128 }
129 info->curt = mod; 129 info->curt = mod;
130 130
131 return ret; 131 return ret;
132 } 132 }
133 133
134 static irqreturn_t usbhs_interrupt(int irq, void *data); 134 static irqreturn_t usbhs_interrupt(int irq, void *data);
135 int usbhs_mod_probe(struct usbhs_priv *priv) 135 int usbhs_mod_probe(struct usbhs_priv *priv)
136 { 136 {
137 struct device *dev = usbhs_priv_to_dev(priv); 137 struct device *dev = usbhs_priv_to_dev(priv);
138 int ret; 138 int ret;
139 139
140 /* 140 /*
141 * install host/gadget driver 141 * install host/gadget driver
142 */ 142 */
143 ret = usbhs_mod_host_probe(priv); 143 ret = usbhs_mod_host_probe(priv);
144 if (ret < 0) 144 if (ret < 0)
145 return ret; 145 return ret;
146 146
147 ret = usbhs_mod_gadget_probe(priv); 147 ret = usbhs_mod_gadget_probe(priv);
148 if (ret < 0) 148 if (ret < 0)
149 goto mod_init_host_err; 149 goto mod_init_host_err;
150 150
151 /* irq settings */ 151 /* irq settings */
152 ret = request_irq(priv->irq, usbhs_interrupt, 152 ret = request_irq(priv->irq, usbhs_interrupt,
153 0, dev_name(dev), priv); 153 0, dev_name(dev), priv);
154 if (ret) { 154 if (ret) {
155 dev_err(dev, "irq request err\n"); 155 dev_err(dev, "irq request err\n");
156 goto mod_init_gadget_err; 156 goto mod_init_gadget_err;
157 } 157 }
158 158
159 return ret; 159 return ret;
160 160
161 mod_init_gadget_err: 161 mod_init_gadget_err:
162 usbhs_mod_gadget_remove(priv); 162 usbhs_mod_gadget_remove(priv);
163 mod_init_host_err: 163 mod_init_host_err:
164 usbhs_mod_host_remove(priv); 164 usbhs_mod_host_remove(priv);
165 165
166 return ret; 166 return ret;
167 } 167 }
168 168
169 void usbhs_mod_remove(struct usbhs_priv *priv) 169 void usbhs_mod_remove(struct usbhs_priv *priv)
170 { 170 {
171 usbhs_mod_host_remove(priv); 171 usbhs_mod_host_remove(priv);
172 usbhs_mod_gadget_remove(priv); 172 usbhs_mod_gadget_remove(priv);
173 free_irq(priv->irq, priv); 173 free_irq(priv->irq, priv);
174 } 174 }
175 175
176 /* 176 /*
177 * status functions 177 * status functions
178 */ 178 */
179 int usbhs_status_get_device_state(struct usbhs_irq_state *irq_state) 179 int usbhs_status_get_device_state(struct usbhs_irq_state *irq_state)
180 { 180 {
181 int state = irq_state->intsts0 & DVSQ_MASK; 181 int state = irq_state->intsts0 & DVSQ_MASK;
182 182
183 switch (state) { 183 switch (state) {
184 case POWER_STATE: 184 case POWER_STATE:
185 case DEFAULT_STATE: 185 case DEFAULT_STATE:
186 case ADDRESS_STATE: 186 case ADDRESS_STATE:
187 case CONFIGURATION_STATE: 187 case CONFIGURATION_STATE:
188 return state; 188 return state;
189 } 189 }
190 190
191 return -EIO; 191 return -EIO;
192 } 192 }
193 193
194 int usbhs_status_get_ctrl_stage(struct usbhs_irq_state *irq_state) 194 int usbhs_status_get_ctrl_stage(struct usbhs_irq_state *irq_state)
195 { 195 {
196 /* 196 /*
197 * return value 197 * return value
198 * 198 *
199 * IDLE_SETUP_STAGE 199 * IDLE_SETUP_STAGE
200 * READ_DATA_STAGE 200 * READ_DATA_STAGE
201 * READ_STATUS_STAGE 201 * READ_STATUS_STAGE
202 * WRITE_DATA_STAGE 202 * WRITE_DATA_STAGE
203 * WRITE_STATUS_STAGE 203 * WRITE_STATUS_STAGE
204 * NODATA_STATUS_STAGE 204 * NODATA_STATUS_STAGE
205 * SEQUENCE_ERROR 205 * SEQUENCE_ERROR
206 */ 206 */
207 return (int)irq_state->intsts0 & CTSQ_MASK; 207 return (int)irq_state->intsts0 & CTSQ_MASK;
208 } 208 }
209 209
210 static void usbhs_status_get_each_irq(struct usbhs_priv *priv, 210 static void usbhs_status_get_each_irq(struct usbhs_priv *priv,
211 struct usbhs_irq_state *state) 211 struct usbhs_irq_state *state)
212 { 212 {
213 struct usbhs_mod *mod = usbhs_mod_get_current(priv); 213 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
214 214
215 state->intsts0 = usbhs_read(priv, INTSTS0); 215 state->intsts0 = usbhs_read(priv, INTSTS0);
216 state->intsts1 = usbhs_read(priv, INTSTS1); 216 state->intsts1 = usbhs_read(priv, INTSTS1);
217 217
218 /* mask */ 218 /* mask */
219 if (mod) { 219 if (mod) {
220 state->brdysts = usbhs_read(priv, BRDYSTS); 220 state->brdysts = usbhs_read(priv, BRDYSTS);
221 state->nrdysts = usbhs_read(priv, NRDYSTS); 221 state->nrdysts = usbhs_read(priv, NRDYSTS);
222 state->bempsts = usbhs_read(priv, BEMPSTS); 222 state->bempsts = usbhs_read(priv, BEMPSTS);
223 223
224 state->bempsts &= mod->irq_bempsts; 224 state->bempsts &= mod->irq_bempsts;
225 state->brdysts &= mod->irq_brdysts; 225 state->brdysts &= mod->irq_brdysts;
226 } 226 }
227 } 227 }
228 228
229 /* 229 /*
230 * interrupt 230 * interrupt
231 */ 231 */
232 #define INTSTS0_MAGIC 0xF800 /* acknowledge magical interrupt sources */ 232 #define INTSTS0_MAGIC 0xF800 /* acknowledge magical interrupt sources */
233 #define INTSTS1_MAGIC 0xA870 /* acknowledge magical interrupt sources */ 233 #define INTSTS1_MAGIC 0xA870 /* acknowledge magical interrupt sources */
234 static irqreturn_t usbhs_interrupt(int irq, void *data) 234 static irqreturn_t usbhs_interrupt(int irq, void *data)
235 { 235 {
236 struct usbhs_priv *priv = data; 236 struct usbhs_priv *priv = data;
237 struct usbhs_irq_state irq_state; 237 struct usbhs_irq_state irq_state;
238 238
239 usbhs_status_get_each_irq(priv, &irq_state); 239 usbhs_status_get_each_irq(priv, &irq_state);
240 240
241 /* 241 /*
242 * clear interrupt 242 * clear interrupt
243 * 243 *
244 * The hardware is _very_ picky to clear interrupt bit. 244 * The hardware is _very_ picky to clear interrupt bit.
245 * Especially INTSTS0_MAGIC, INTSTS1_MAGIC value. 245 * Especially INTSTS0_MAGIC, INTSTS1_MAGIC value.
246 * 246 *
247 * see 247 * see
248 * "Operation" 248 * "Operation"
249 * - "Control Transfer (DCP)" 249 * - "Control Transfer (DCP)"
250 * - Function :: VALID bit should 0 250 * - Function :: VALID bit should 0
251 */ 251 */
252 usbhs_write(priv, INTSTS0, ~irq_state.intsts0 & INTSTS0_MAGIC); 252 usbhs_write(priv, INTSTS0, ~irq_state.intsts0 & INTSTS0_MAGIC);
253 usbhs_write(priv, INTSTS1, ~irq_state.intsts1 & INTSTS1_MAGIC); 253 usbhs_write(priv, INTSTS1, ~irq_state.intsts1 & INTSTS1_MAGIC);
254 254
255 usbhs_write(priv, BRDYSTS, 0); 255 usbhs_write(priv, BRDYSTS, 0);
256 usbhs_write(priv, NRDYSTS, 0); 256 usbhs_write(priv, NRDYSTS, 0);
257 usbhs_write(priv, BEMPSTS, 0); 257 usbhs_write(priv, BEMPSTS, 0);
258 258
259 /* 259 /*
260 * call irq callback functions 260 * call irq callback functions
261 * see also 261 * see also
262 * usbhs_irq_setting_update 262 * usbhs_irq_setting_update
263 */ 263 */
264 264
265 /* INTSTS0 */ 265 /* INTSTS0 */
266 if (irq_state.intsts0 & VBINT) 266 if (irq_state.intsts0 & VBINT)
267 usbhs_mod_info_call(priv, irq_vbus, priv, &irq_state); 267 usbhs_mod_info_call(priv, irq_vbus, priv, &irq_state);
268 268
269 if (irq_state.intsts0 & DVST) 269 if (irq_state.intsts0 & DVST)
270 usbhs_mod_call(priv, irq_dev_state, priv, &irq_state); 270 usbhs_mod_call(priv, irq_dev_state, priv, &irq_state);
271 271
272 if (irq_state.intsts0 & CTRT) 272 if (irq_state.intsts0 & CTRT)
273 usbhs_mod_call(priv, irq_ctrl_stage, priv, &irq_state); 273 usbhs_mod_call(priv, irq_ctrl_stage, priv, &irq_state);
274 274
275 if (irq_state.intsts0 & BEMP) 275 if (irq_state.intsts0 & BEMP)
276 usbhs_mod_call(priv, irq_empty, priv, &irq_state); 276 usbhs_mod_call(priv, irq_empty, priv, &irq_state);
277 277
278 if (irq_state.intsts0 & BRDY) 278 if (irq_state.intsts0 & BRDY)
279 usbhs_mod_call(priv, irq_ready, priv, &irq_state); 279 usbhs_mod_call(priv, irq_ready, priv, &irq_state);
280 280
281 /* INTSTS1 */ 281 /* INTSTS1 */
282 if (irq_state.intsts1 & ATTCH) 282 if (irq_state.intsts1 & ATTCH)
283 usbhs_mod_call(priv, irq_attch, priv, &irq_state); 283 usbhs_mod_call(priv, irq_attch, priv, &irq_state);
284 284
285 if (irq_state.intsts1 & DTCH) 285 if (irq_state.intsts1 & DTCH)
286 usbhs_mod_call(priv, irq_dtch, priv, &irq_state); 286 usbhs_mod_call(priv, irq_dtch, priv, &irq_state);
287 287
288 if (irq_state.intsts1 & SIGN) 288 if (irq_state.intsts1 & SIGN)
289 usbhs_mod_call(priv, irq_sign, priv, &irq_state); 289 usbhs_mod_call(priv, irq_sign, priv, &irq_state);
290 290
291 if (irq_state.intsts1 & SACK) 291 if (irq_state.intsts1 & SACK)
292 usbhs_mod_call(priv, irq_sack, priv, &irq_state); 292 usbhs_mod_call(priv, irq_sack, priv, &irq_state);
293 293
294 return IRQ_HANDLED; 294 return IRQ_HANDLED;
295 } 295 }
296 296
297 void usbhs_irq_callback_update(struct usbhs_priv *priv, struct usbhs_mod *mod) 297 void usbhs_irq_callback_update(struct usbhs_priv *priv, struct usbhs_mod *mod)
298 { 298 {
299 u16 intenb0 = 0; 299 u16 intenb0 = 0;
300 u16 intenb1 = 0; 300 u16 intenb1 = 0;
301 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv); 301 struct usbhs_mod_info *info = usbhs_priv_to_modinfo(priv);
302 302
303 /* 303 /*
304 * BEMPENB/BRDYENB are picky. 304 * BEMPENB/BRDYENB are picky.
305 * below method is required 305 * below method is required
306 * 306 *
307 * - clear INTSTS0 307 * - clear INTSTS0
308 * - update BEMPENB/BRDYENB 308 * - update BEMPENB/BRDYENB
309 * - update INTSTS0 309 * - update INTSTS0
310 */ 310 */
311 usbhs_write(priv, INTENB0, 0); 311 usbhs_write(priv, INTENB0, 0);
312 usbhs_write(priv, INTENB1, 0); 312 usbhs_write(priv, INTENB1, 0);
313 313
314 usbhs_write(priv, BEMPENB, 0); 314 usbhs_write(priv, BEMPENB, 0);
315 usbhs_write(priv, BRDYENB, 0); 315 usbhs_write(priv, BRDYENB, 0);
316 316
317 /* 317 /*
318 * see also 318 * see also
319 * usbhs_interrupt 319 * usbhs_interrupt
320 */ 320 */
321 321
322 /* 322 /*
323 * it don't enable DVSE (intenb0) here 323 * it don't enable DVSE (intenb0) here
324 * but "mod->irq_dev_state" will be called. 324 * but "mod->irq_dev_state" will be called.
325 */ 325 */
326 if (info->irq_vbus) 326 if (info->irq_vbus)
327 intenb0 |= VBSE; 327 intenb0 |= VBSE;
328 328
329 if (mod) { 329 if (mod) {
330 /* 330 /*
331 * INTSTS0 331 * INTSTS0
332 */ 332 */
333 if (mod->irq_ctrl_stage) 333 if (mod->irq_ctrl_stage)
334 intenb0 |= CTRE; 334 intenb0 |= CTRE;
335 335
336 if (mod->irq_empty && mod->irq_bempsts) { 336 if (mod->irq_empty && mod->irq_bempsts) {
337 usbhs_write(priv, BEMPENB, mod->irq_bempsts); 337 usbhs_write(priv, BEMPENB, mod->irq_bempsts);
338 intenb0 |= BEMPE; 338 intenb0 |= BEMPE;
339 } 339 }
340 340
341 if (mod->irq_ready && mod->irq_brdysts) { 341 if (mod->irq_ready && mod->irq_brdysts) {
342 usbhs_write(priv, BRDYENB, mod->irq_brdysts); 342 usbhs_write(priv, BRDYENB, mod->irq_brdysts);
343 intenb0 |= BRDYE; 343 intenb0 |= BRDYE;
344 } 344 }
345 345
346 /* 346 /*
347 * INTSTS1 347 * INTSTS1
348 */ 348 */
349 if (mod->irq_attch) 349 if (mod->irq_attch)
350 intenb1 |= ATTCHE; 350 intenb1 |= ATTCHE;
351 351
352 if (mod->irq_attch) 352 if (mod->irq_attch)
353 intenb1 |= DTCHE; 353 intenb1 |= DTCHE;
354 354
355 if (mod->irq_sign) 355 if (mod->irq_sign)
356 intenb1 |= SIGNE; 356 intenb1 |= SIGNE;
357 357
358 if (mod->irq_sack) 358 if (mod->irq_sack)
359 intenb1 |= SACKE; 359 intenb1 |= SACKE;
360 } 360 }
361 361
362 if (intenb0) 362 if (intenb0)
363 usbhs_write(priv, INTENB0, intenb0); 363 usbhs_write(priv, INTENB0, intenb0);
364 364
365 if (intenb1) 365 if (intenb1)
366 usbhs_write(priv, INTENB1, intenb1); 366 usbhs_write(priv, INTENB1, intenb1);
367 } 367 }
368 368