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Commit 5b1d221e6292f9fcf9f12d6c9e94ee9470ee2a24

Authored by Ralf Baechle
1 parent 3263263f70
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[MIPS] Fix build of several IDE drivers by providing pci_get_legacy_ide_irq 

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Showing 1 changed file with 6 additions and 0 deletions Inline Diff

include/asm-mips/pci.h
Diff comments   View file @ 5b1d221
1 /* 1 /*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 */ 5 */
6 #ifndef _ASM_PCI_H 6 #ifndef _ASM_PCI_H
7 #define _ASM_PCI_H 7 #define _ASM_PCI_H
8 8
9 #include <linux/mm.h> 9 #include <linux/mm.h>
10 10
11 #ifdef __KERNEL__ 11 #ifdef __KERNEL__
12 12
13 /* 13 /*
14 * This file essentially defines the interface between board 14 * This file essentially defines the interface between board
15 * specific PCI code and MIPS common PCI code. Should potentially put 15 * specific PCI code and MIPS common PCI code. Should potentially put
16 * into include/asm/pci.h file. 16 * into include/asm/pci.h file.
17 */ 17 */
18 18
19 #include <linux/ioport.h> 19 #include <linux/ioport.h>
20 20
21 /* 21 /*
22 * Each pci channel is a top-level PCI bus seem by CPU. A machine with 22 * Each pci channel is a top-level PCI bus seem by CPU. A machine with
23 * multiple PCI channels may have multiple PCI host controllers or a 23 * multiple PCI channels may have multiple PCI host controllers or a
24 * single controller supporting multiple channels. 24 * single controller supporting multiple channels.
25 */ 25 */
26 struct pci_controller { 26 struct pci_controller {
27 struct pci_controller *next; 27 struct pci_controller *next;
28 struct pci_bus *bus; 28 struct pci_bus *bus;
29 29
30 struct pci_ops *pci_ops; 30 struct pci_ops *pci_ops;
31 struct resource *mem_resource; 31 struct resource *mem_resource;
32 unsigned long mem_offset; 32 unsigned long mem_offset;
33 struct resource *io_resource; 33 struct resource *io_resource;
34 unsigned long io_offset; 34 unsigned long io_offset;
35 35
36 unsigned int index; 36 unsigned int index;
37 /* For compatibility with current (as of July 2003) pciutils 37 /* For compatibility with current (as of July 2003) pciutils
38 and XFree86. Eventually will be removed. */ 38 and XFree86. Eventually will be removed. */
39 unsigned int need_domain_info; 39 unsigned int need_domain_info;
40 40
41 int iommu; 41 int iommu;
42 42
43 /* Optional access methods for reading/writing the bus number 43 /* Optional access methods for reading/writing the bus number
44 of the PCI controller */ 44 of the PCI controller */
45 int (*get_busno)(void); 45 int (*get_busno)(void);
46 void (*set_busno)(int busno); 46 void (*set_busno)(int busno);
47 }; 47 };
48 48
49 /* 49 /*
50 * Used by boards to register their PCI busses before the actual scanning. 50 * Used by boards to register their PCI busses before the actual scanning.
51 */ 51 */
52 extern struct pci_controller * alloc_pci_controller(void); 52 extern struct pci_controller * alloc_pci_controller(void);
53 extern void register_pci_controller(struct pci_controller *hose); 53 extern void register_pci_controller(struct pci_controller *hose);
54 54
55 /* 55 /*
56 * board supplied pci irq fixup routine 56 * board supplied pci irq fixup routine
57 */ 57 */
58 extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin); 58 extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin);
59 59
60 60
61 /* Can be used to override the logic in pci_scan_bus for skipping 61 /* Can be used to override the logic in pci_scan_bus for skipping
62 already-configured bus numbers - to be used for buggy BIOSes 62 already-configured bus numbers - to be used for buggy BIOSes
63 or architectures with incomplete PCI setup by the loader */ 63 or architectures with incomplete PCI setup by the loader */
64 64
65 extern unsigned int pcibios_assign_all_busses(void); 65 extern unsigned int pcibios_assign_all_busses(void);
66 66
67 #define pcibios_scan_all_fns(a, b) 0 67 #define pcibios_scan_all_fns(a, b) 0
68 68
69 extern unsigned long PCIBIOS_MIN_IO; 69 extern unsigned long PCIBIOS_MIN_IO;
70 extern unsigned long PCIBIOS_MIN_MEM; 70 extern unsigned long PCIBIOS_MIN_MEM;
71 71
72 #define PCIBIOS_MIN_CARDBUS_IO 0x4000 72 #define PCIBIOS_MIN_CARDBUS_IO 0x4000
73 73
74 extern void pcibios_set_master(struct pci_dev *dev); 74 extern void pcibios_set_master(struct pci_dev *dev);
75 75
76 static inline void pcibios_penalize_isa_irq(int irq, int active) 76 static inline void pcibios_penalize_isa_irq(int irq, int active)
77 { 77 {
78 /* We don't do dynamic PCI IRQ allocation */ 78 /* We don't do dynamic PCI IRQ allocation */
79 } 79 }
80 80
81 /* 81 /*
82 * Dynamic DMA mapping stuff. 82 * Dynamic DMA mapping stuff.
83 * MIPS has everything mapped statically. 83 * MIPS has everything mapped statically.
84 */ 84 */
85 85
86 #include <linux/types.h> 86 #include <linux/types.h>
87 #include <linux/slab.h> 87 #include <linux/slab.h>
88 #include <asm/scatterlist.h> 88 #include <asm/scatterlist.h>
89 #include <linux/string.h> 89 #include <linux/string.h>
90 #include <asm/io.h> 90 #include <asm/io.h>
91 91
92 struct pci_dev; 92 struct pci_dev;
93 93
94 /* 94 /*
95 * The PCI address space does equal the physical memory address space. The 95 * The PCI address space does equal the physical memory address space. The
96 * networking and block device layers use this boolean for bounce buffer 96 * networking and block device layers use this boolean for bounce buffer
97 * decisions. This is set if any hose does not have an IOMMU. 97 * decisions. This is set if any hose does not have an IOMMU.
98 */ 98 */
99 extern unsigned int PCI_DMA_BUS_IS_PHYS; 99 extern unsigned int PCI_DMA_BUS_IS_PHYS;
100 100
101 #ifdef CONFIG_DMA_NEED_PCI_MAP_STATE 101 #ifdef CONFIG_DMA_NEED_PCI_MAP_STATE
102 102
103 /* pci_unmap_{single,page} is not a nop, thus... */ 103 /* pci_unmap_{single,page} is not a nop, thus... */
104 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; 104 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME;
105 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME; 105 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME;
106 #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 106 #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
107 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 107 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
108 #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 108 #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
109 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 109 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
110 110
111 #else /* CONFIG_DMA_NEED_PCI_MAP_STATE */ 111 #else /* CONFIG_DMA_NEED_PCI_MAP_STATE */
112 112
113 /* pci_unmap_{page,single} is a nop so... */ 113 /* pci_unmap_{page,single} is a nop so... */
114 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) 114 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
115 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) 115 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
116 #define pci_unmap_addr(PTR, ADDR_NAME) (0) 116 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
117 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 117 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
118 #define pci_unmap_len(PTR, LEN_NAME) (0) 118 #define pci_unmap_len(PTR, LEN_NAME) (0)
119 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 119 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
120 120
121 #endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */ 121 #endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */
122 122
123 /* This is always fine. */ 123 /* This is always fine. */
124 #define pci_dac_dma_supported(pci_dev, mask) (1) 124 #define pci_dac_dma_supported(pci_dev, mask) (1)
125 125
126 extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev, 126 extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
127 struct page *page, unsigned long offset, int direction); 127 struct page *page, unsigned long offset, int direction);
128 extern struct page *pci_dac_dma_to_page(struct pci_dev *pdev, 128 extern struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
129 dma64_addr_t dma_addr); 129 dma64_addr_t dma_addr);
130 extern unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev, 130 extern unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
131 dma64_addr_t dma_addr); 131 dma64_addr_t dma_addr);
132 extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, 132 extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
133 dma64_addr_t dma_addr, size_t len, int direction); 133 dma64_addr_t dma_addr, size_t len, int direction);
134 extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, 134 extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
135 dma64_addr_t dma_addr, size_t len, int direction); 135 dma64_addr_t dma_addr, size_t len, int direction);
136 136
137 #ifdef CONFIG_PCI 137 #ifdef CONFIG_PCI
138 static inline void pci_dma_burst_advice(struct pci_dev *pdev, 138 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
139 enum pci_dma_burst_strategy *strat, 139 enum pci_dma_burst_strategy *strat,
140 unsigned long *strategy_parameter) 140 unsigned long *strategy_parameter)
141 { 141 {
142 *strat = PCI_DMA_BURST_INFINITY; 142 *strat = PCI_DMA_BURST_INFINITY;
143 *strategy_parameter = ~0UL; 143 *strategy_parameter = ~0UL;
144 } 144 }
145 #endif 145 #endif
146 146
147 extern void pcibios_resource_to_bus(struct pci_dev *dev, 147 extern void pcibios_resource_to_bus(struct pci_dev *dev,
148 struct pci_bus_region *region, struct resource *res); 148 struct pci_bus_region *region, struct resource *res);
149 149
150 extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, 150 extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
151 struct pci_bus_region *region); 151 struct pci_bus_region *region);
152 152
153 static inline struct resource * 153 static inline struct resource *
154 pcibios_select_root(struct pci_dev *pdev, struct resource *res) 154 pcibios_select_root(struct pci_dev *pdev, struct resource *res)
155 { 155 {
156 struct resource *root = NULL; 156 struct resource *root = NULL;
157 157
158 if (res->flags & IORESOURCE_IO) 158 if (res->flags & IORESOURCE_IO)
159 root = &ioport_resource; 159 root = &ioport_resource;
160 if (res->flags & IORESOURCE_MEM) 160 if (res->flags & IORESOURCE_MEM)
161 root = &iomem_resource; 161 root = &iomem_resource;
162 162
163 return root; 163 return root;
164 } 164 }
165 165
166 #ifdef CONFIG_PCI_DOMAINS 166 #ifdef CONFIG_PCI_DOMAINS
167 167
168 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 168 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
169 169
170 static inline int pci_proc_domain(struct pci_bus *bus) 170 static inline int pci_proc_domain(struct pci_bus *bus)
171 { 171 {
172 struct pci_controller *hose = bus->sysdata; 172 struct pci_controller *hose = bus->sysdata;
173 return hose->need_domain_info; 173 return hose->need_domain_info;
174 } 174 }
175 175
176 #endif /* CONFIG_PCI_DOMAINS */ 176 #endif /* CONFIG_PCI_DOMAINS */
177 177
178 #endif /* __KERNEL__ */ 178 #endif /* __KERNEL__ */
179 179
180 /* implement the pci_ DMA API in terms of the generic device dma_ one */ 180 /* implement the pci_ DMA API in terms of the generic device dma_ one */
181 #include <asm-generic/pci-dma-compat.h> 181 #include <asm-generic/pci-dma-compat.h>
182 182
183 static inline void pcibios_add_platform_entries(struct pci_dev *dev) 183 static inline void pcibios_add_platform_entries(struct pci_dev *dev)
184 { 184 {
185 } 185 }
186 186
187 /* Do platform specific device initialization at pci_enable_device() time */ 187 /* Do platform specific device initialization at pci_enable_device() time */
188 extern int pcibios_plat_dev_init(struct pci_dev *dev); 188 extern int pcibios_plat_dev_init(struct pci_dev *dev);
189 189
190 /* Chances are this interrupt is wired PC-style ... */
191 static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
192 {
193 return channel ? 15 : 14;
194 }
195
190 #endif /* _ASM_PCI_H */ 196 #endif /* _ASM_PCI_H */
191 197