Commit 62fad39be0662a924b60e4354b802525ceda0bb1
1 parent
2f3ed17e01
Exists in
master
and in
7 other branches
sh: Add a NR_IRQS_LEGACY for external IRQ0-7.
This adds a NR_IRQS_LEGACY definition, which will be used by sparse irq. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Showing 1 changed file with 2 additions and 1 deletions Inline Diff
arch/sh/include/asm/irq.h
1 | #ifndef __ASM_SH_IRQ_H | 1 | #ifndef __ASM_SH_IRQ_H |
2 | #define __ASM_SH_IRQ_H | 2 | #define __ASM_SH_IRQ_H |
3 | 3 | ||
4 | #include <asm/machvec.h> | 4 | #include <asm/machvec.h> |
5 | 5 | ||
6 | /* | 6 | /* |
7 | * A sane default based on a reasonable vector table size, platforms are | 7 | * A sane default based on a reasonable vector table size, platforms are |
8 | * advised to cap this at the hard limit that they're interested in | 8 | * advised to cap this at the hard limit that they're interested in |
9 | * through the machvec. | 9 | * through the machvec. |
10 | */ | 10 | */ |
11 | #define NR_IRQS 256 | 11 | #define NR_IRQS 256 |
12 | #define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */ | ||
12 | 13 | ||
13 | /* | 14 | /* |
14 | * Convert back and forth between INTEVT and IRQ values. | 15 | * Convert back and forth between INTEVT and IRQ values. |
15 | */ | 16 | */ |
16 | #ifdef CONFIG_CPU_HAS_INTEVT | 17 | #ifdef CONFIG_CPU_HAS_INTEVT |
17 | #define evt2irq(evt) (((evt) >> 5) - 16) | 18 | #define evt2irq(evt) (((evt) >> 5) - 16) |
18 | #define irq2evt(irq) (((irq) + 16) << 5) | 19 | #define irq2evt(irq) (((irq) + 16) << 5) |
19 | #else | 20 | #else |
20 | #define evt2irq(evt) (evt) | 21 | #define evt2irq(evt) (evt) |
21 | #define irq2evt(irq) (irq) | 22 | #define irq2evt(irq) (irq) |
22 | #endif | 23 | #endif |
23 | 24 | ||
24 | /* | 25 | /* |
25 | * Simple Mask Register Support | 26 | * Simple Mask Register Support |
26 | */ | 27 | */ |
27 | extern void make_maskreg_irq(unsigned int irq); | 28 | extern void make_maskreg_irq(unsigned int irq); |
28 | extern unsigned short *irq_mask_register; | 29 | extern unsigned short *irq_mask_register; |
29 | 30 | ||
30 | /* | 31 | /* |
31 | * PINT IRQs | 32 | * PINT IRQs |
32 | */ | 33 | */ |
33 | void init_IRQ_pint(void); | 34 | void init_IRQ_pint(void); |
34 | void make_imask_irq(unsigned int irq); | 35 | void make_imask_irq(unsigned int irq); |
35 | 36 | ||
36 | static inline int generic_irq_demux(int irq) | 37 | static inline int generic_irq_demux(int irq) |
37 | { | 38 | { |
38 | return irq; | 39 | return irq; |
39 | } | 40 | } |
40 | 41 | ||
41 | #define irq_canonicalize(irq) (irq) | 42 | #define irq_canonicalize(irq) (irq) |
42 | #define irq_demux(irq) sh_mv.mv_irq_demux(irq) | 43 | #define irq_demux(irq) sh_mv.mv_irq_demux(irq) |
43 | 44 | ||
44 | void init_IRQ(void); | 45 | void init_IRQ(void); |
45 | asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs); | 46 | asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs); |
46 | 47 | ||
47 | #ifdef CONFIG_IRQSTACKS | 48 | #ifdef CONFIG_IRQSTACKS |
48 | extern void irq_ctx_init(int cpu); | 49 | extern void irq_ctx_init(int cpu); |
49 | extern void irq_ctx_exit(int cpu); | 50 | extern void irq_ctx_exit(int cpu); |
50 | # define __ARCH_HAS_DO_SOFTIRQ | 51 | # define __ARCH_HAS_DO_SOFTIRQ |
51 | #else | 52 | #else |
52 | # define irq_ctx_init(cpu) do { } while (0) | 53 | # define irq_ctx_init(cpu) do { } while (0) |
53 | # define irq_ctx_exit(cpu) do { } while (0) | 54 | # define irq_ctx_exit(cpu) do { } while (0) |
54 | #endif | 55 | #endif |
55 | 56 | ||
56 | #ifdef CONFIG_CPU_SH5 | 57 | #ifdef CONFIG_CPU_SH5 |
57 | #include <cpu/irq.h> | 58 | #include <cpu/irq.h> |
58 | #endif | 59 | #endif |
59 | 60 | ||
60 | #endif /* __ASM_SH_IRQ_H */ | 61 | #endif /* __ASM_SH_IRQ_H */ |
61 | 62 |