Commit 74ec71e16189717d3f33ec7e5d22021480f4173b
Committed by
Russell King
1 parent
7866f64928
Exists in
master
and in
7 other branches
[ARM] 3087/1: PXA2xx flash platform device conversion
Patch from Todd Poynor Add platform devices for flash to Lubbock and Mainstone board files. Once in place, the two existing mtd map drivers for the boards will be converted to use a single pxa2xx map driver in the linux-mtd tree. Take 4: flash_platform_data .map_name vs. .name cleaned up, resync with merged irda patch context. Signed-off-by: Todd Poynor <tpoynor@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Showing 2 changed files with 168 additions and 2 deletions Inline Diff
arch/arm/mach-pxa/lubbock.c
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-pxa/lubbock.c | 2 | * linux/arch/arm/mach-pxa/lubbock.c |
3 | * | 3 | * |
4 | * Support for the Intel DBPXA250 Development Platform. | 4 | * Support for the Intel DBPXA250 Development Platform. |
5 | * | 5 | * |
6 | * Author: Nicolas Pitre | 6 | * Author: Nicolas Pitre |
7 | * Created: Jun 15, 2001 | 7 | * Created: Jun 15, 2001 |
8 | * Copyright: MontaVista Software Inc. | 8 | * Copyright: MontaVista Software Inc. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License version 2 as | 11 | * it under the terms of the GNU General Public License version 2 as |
12 | * published by the Free Software Foundation. | 12 | * published by the Free Software Foundation. |
13 | */ | 13 | */ |
14 | #include <linux/module.h> | 14 | #include <linux/module.h> |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/sysdev.h> | 18 | #include <linux/sysdev.h> |
19 | #include <linux/major.h> | 19 | #include <linux/major.h> |
20 | #include <linux/fb.h> | 20 | #include <linux/fb.h> |
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/mtd/mtd.h> | ||
23 | #include <linux/mtd/partitions.h> | ||
22 | 24 | ||
23 | #include <asm/setup.h> | 25 | #include <asm/setup.h> |
24 | #include <asm/memory.h> | 26 | #include <asm/memory.h> |
25 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
26 | #include <asm/hardware.h> | 28 | #include <asm/hardware.h> |
27 | #include <asm/irq.h> | 29 | #include <asm/irq.h> |
30 | #include <asm/sizes.h> | ||
28 | 31 | ||
29 | #include <asm/mach/arch.h> | 32 | #include <asm/mach/arch.h> |
30 | #include <asm/mach/map.h> | 33 | #include <asm/mach/map.h> |
31 | #include <asm/mach/irq.h> | 34 | #include <asm/mach/irq.h> |
35 | #include <asm/mach/flash.h> | ||
32 | 36 | ||
33 | #include <asm/hardware/sa1111.h> | 37 | #include <asm/hardware/sa1111.h> |
34 | 38 | ||
35 | #include <asm/arch/pxa-regs.h> | 39 | #include <asm/arch/pxa-regs.h> |
36 | #include <asm/arch/lubbock.h> | 40 | #include <asm/arch/lubbock.h> |
37 | #include <asm/arch/udc.h> | 41 | #include <asm/arch/udc.h> |
38 | #include <asm/arch/irda.h> | 42 | #include <asm/arch/irda.h> |
39 | #include <asm/arch/pxafb.h> | 43 | #include <asm/arch/pxafb.h> |
40 | #include <asm/arch/mmc.h> | 44 | #include <asm/arch/mmc.h> |
41 | 45 | ||
42 | #include "generic.h" | 46 | #include "generic.h" |
43 | 47 | ||
44 | 48 | ||
45 | #define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080) | 49 | #define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080) |
46 | 50 | ||
47 | void lubbock_set_misc_wr(unsigned int mask, unsigned int set) | 51 | void lubbock_set_misc_wr(unsigned int mask, unsigned int set) |
48 | { | 52 | { |
49 | unsigned long flags; | 53 | unsigned long flags; |
50 | 54 | ||
51 | local_irq_save(flags); | 55 | local_irq_save(flags); |
52 | LUB_MISC_WR = (LUB_MISC_WR & ~mask) | (set & mask); | 56 | LUB_MISC_WR = (LUB_MISC_WR & ~mask) | (set & mask); |
53 | local_irq_restore(flags); | 57 | local_irq_restore(flags); |
54 | } | 58 | } |
55 | EXPORT_SYMBOL(lubbock_set_misc_wr); | 59 | EXPORT_SYMBOL(lubbock_set_misc_wr); |
56 | 60 | ||
57 | static unsigned long lubbock_irq_enabled; | 61 | static unsigned long lubbock_irq_enabled; |
58 | 62 | ||
59 | static void lubbock_mask_irq(unsigned int irq) | 63 | static void lubbock_mask_irq(unsigned int irq) |
60 | { | 64 | { |
61 | int lubbock_irq = (irq - LUBBOCK_IRQ(0)); | 65 | int lubbock_irq = (irq - LUBBOCK_IRQ(0)); |
62 | LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq)); | 66 | LUB_IRQ_MASK_EN = (lubbock_irq_enabled &= ~(1 << lubbock_irq)); |
63 | } | 67 | } |
64 | 68 | ||
65 | static void lubbock_unmask_irq(unsigned int irq) | 69 | static void lubbock_unmask_irq(unsigned int irq) |
66 | { | 70 | { |
67 | int lubbock_irq = (irq - LUBBOCK_IRQ(0)); | 71 | int lubbock_irq = (irq - LUBBOCK_IRQ(0)); |
68 | /* the irq can be acknowledged only if deasserted, so it's done here */ | 72 | /* the irq can be acknowledged only if deasserted, so it's done here */ |
69 | LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq); | 73 | LUB_IRQ_SET_CLR &= ~(1 << lubbock_irq); |
70 | LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq)); | 74 | LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq)); |
71 | } | 75 | } |
72 | 76 | ||
73 | static struct irqchip lubbock_irq_chip = { | 77 | static struct irqchip lubbock_irq_chip = { |
74 | .ack = lubbock_mask_irq, | 78 | .ack = lubbock_mask_irq, |
75 | .mask = lubbock_mask_irq, | 79 | .mask = lubbock_mask_irq, |
76 | .unmask = lubbock_unmask_irq, | 80 | .unmask = lubbock_unmask_irq, |
77 | }; | 81 | }; |
78 | 82 | ||
79 | static void lubbock_irq_handler(unsigned int irq, struct irqdesc *desc, | 83 | static void lubbock_irq_handler(unsigned int irq, struct irqdesc *desc, |
80 | struct pt_regs *regs) | 84 | struct pt_regs *regs) |
81 | { | 85 | { |
82 | unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; | 86 | unsigned long pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; |
83 | do { | 87 | do { |
84 | GEDR(0) = GPIO_bit(0); /* clear our parent irq */ | 88 | GEDR(0) = GPIO_bit(0); /* clear our parent irq */ |
85 | if (likely(pending)) { | 89 | if (likely(pending)) { |
86 | irq = LUBBOCK_IRQ(0) + __ffs(pending); | 90 | irq = LUBBOCK_IRQ(0) + __ffs(pending); |
87 | desc = irq_desc + irq; | 91 | desc = irq_desc + irq; |
88 | desc_handle_irq(irq, desc, regs); | 92 | desc_handle_irq(irq, desc, regs); |
89 | } | 93 | } |
90 | pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; | 94 | pending = LUB_IRQ_SET_CLR & lubbock_irq_enabled; |
91 | } while (pending); | 95 | } while (pending); |
92 | } | 96 | } |
93 | 97 | ||
94 | static void __init lubbock_init_irq(void) | 98 | static void __init lubbock_init_irq(void) |
95 | { | 99 | { |
96 | int irq; | 100 | int irq; |
97 | 101 | ||
98 | pxa_init_irq(); | 102 | pxa_init_irq(); |
99 | 103 | ||
100 | /* setup extra lubbock irqs */ | 104 | /* setup extra lubbock irqs */ |
101 | for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) { | 105 | for (irq = LUBBOCK_IRQ(0); irq <= LUBBOCK_LAST_IRQ; irq++) { |
102 | set_irq_chip(irq, &lubbock_irq_chip); | 106 | set_irq_chip(irq, &lubbock_irq_chip); |
103 | set_irq_handler(irq, do_level_IRQ); | 107 | set_irq_handler(irq, do_level_IRQ); |
104 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 108 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
105 | } | 109 | } |
106 | 110 | ||
107 | set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); | 111 | set_irq_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); |
108 | set_irq_type(IRQ_GPIO(0), IRQT_FALLING); | 112 | set_irq_type(IRQ_GPIO(0), IRQT_FALLING); |
109 | } | 113 | } |
110 | 114 | ||
111 | #ifdef CONFIG_PM | 115 | #ifdef CONFIG_PM |
112 | 116 | ||
113 | static int lubbock_irq_resume(struct sys_device *dev) | 117 | static int lubbock_irq_resume(struct sys_device *dev) |
114 | { | 118 | { |
115 | LUB_IRQ_MASK_EN = lubbock_irq_enabled; | 119 | LUB_IRQ_MASK_EN = lubbock_irq_enabled; |
116 | return 0; | 120 | return 0; |
117 | } | 121 | } |
118 | 122 | ||
119 | static struct sysdev_class lubbock_irq_sysclass = { | 123 | static struct sysdev_class lubbock_irq_sysclass = { |
120 | set_kset_name("cpld_irq"), | 124 | set_kset_name("cpld_irq"), |
121 | .resume = lubbock_irq_resume, | 125 | .resume = lubbock_irq_resume, |
122 | }; | 126 | }; |
123 | 127 | ||
124 | static struct sys_device lubbock_irq_device = { | 128 | static struct sys_device lubbock_irq_device = { |
125 | .cls = &lubbock_irq_sysclass, | 129 | .cls = &lubbock_irq_sysclass, |
126 | }; | 130 | }; |
127 | 131 | ||
128 | static int __init lubbock_irq_device_init(void) | 132 | static int __init lubbock_irq_device_init(void) |
129 | { | 133 | { |
130 | int ret = sysdev_class_register(&lubbock_irq_sysclass); | 134 | int ret = sysdev_class_register(&lubbock_irq_sysclass); |
131 | if (ret == 0) | 135 | if (ret == 0) |
132 | ret = sysdev_register(&lubbock_irq_device); | 136 | ret = sysdev_register(&lubbock_irq_device); |
133 | return ret; | 137 | return ret; |
134 | } | 138 | } |
135 | 139 | ||
136 | device_initcall(lubbock_irq_device_init); | 140 | device_initcall(lubbock_irq_device_init); |
137 | 141 | ||
138 | #endif | 142 | #endif |
139 | 143 | ||
140 | static int lubbock_udc_is_connected(void) | 144 | static int lubbock_udc_is_connected(void) |
141 | { | 145 | { |
142 | return (LUB_MISC_RD & (1 << 9)) == 0; | 146 | return (LUB_MISC_RD & (1 << 9)) == 0; |
143 | } | 147 | } |
144 | 148 | ||
145 | static struct pxa2xx_udc_mach_info udc_info __initdata = { | 149 | static struct pxa2xx_udc_mach_info udc_info __initdata = { |
146 | .udc_is_connected = lubbock_udc_is_connected, | 150 | .udc_is_connected = lubbock_udc_is_connected, |
147 | // no D+ pullup; lubbock can't connect/disconnect in software | 151 | // no D+ pullup; lubbock can't connect/disconnect in software |
148 | }; | 152 | }; |
149 | 153 | ||
150 | static struct platform_device lub_audio_device = { | 154 | static struct platform_device lub_audio_device = { |
151 | .name = "pxa2xx-ac97", | 155 | .name = "pxa2xx-ac97", |
152 | .id = -1, | 156 | .id = -1, |
153 | }; | 157 | }; |
154 | 158 | ||
155 | static struct resource sa1111_resources[] = { | 159 | static struct resource sa1111_resources[] = { |
156 | [0] = { | 160 | [0] = { |
157 | .start = 0x10000000, | 161 | .start = 0x10000000, |
158 | .end = 0x10001fff, | 162 | .end = 0x10001fff, |
159 | .flags = IORESOURCE_MEM, | 163 | .flags = IORESOURCE_MEM, |
160 | }, | 164 | }, |
161 | [1] = { | 165 | [1] = { |
162 | .start = LUBBOCK_SA1111_IRQ, | 166 | .start = LUBBOCK_SA1111_IRQ, |
163 | .end = LUBBOCK_SA1111_IRQ, | 167 | .end = LUBBOCK_SA1111_IRQ, |
164 | .flags = IORESOURCE_IRQ, | 168 | .flags = IORESOURCE_IRQ, |
165 | }, | 169 | }, |
166 | }; | 170 | }; |
167 | 171 | ||
168 | static struct platform_device sa1111_device = { | 172 | static struct platform_device sa1111_device = { |
169 | .name = "sa1111", | 173 | .name = "sa1111", |
170 | .id = -1, | 174 | .id = -1, |
171 | .num_resources = ARRAY_SIZE(sa1111_resources), | 175 | .num_resources = ARRAY_SIZE(sa1111_resources), |
172 | .resource = sa1111_resources, | 176 | .resource = sa1111_resources, |
173 | }; | 177 | }; |
174 | 178 | ||
175 | static struct resource smc91x_resources[] = { | 179 | static struct resource smc91x_resources[] = { |
176 | [0] = { | 180 | [0] = { |
177 | .name = "smc91x-regs", | 181 | .name = "smc91x-regs", |
178 | .start = 0x0c000c00, | 182 | .start = 0x0c000c00, |
179 | .end = 0x0c0fffff, | 183 | .end = 0x0c0fffff, |
180 | .flags = IORESOURCE_MEM, | 184 | .flags = IORESOURCE_MEM, |
181 | }, | 185 | }, |
182 | [1] = { | 186 | [1] = { |
183 | .start = LUBBOCK_ETH_IRQ, | 187 | .start = LUBBOCK_ETH_IRQ, |
184 | .end = LUBBOCK_ETH_IRQ, | 188 | .end = LUBBOCK_ETH_IRQ, |
185 | .flags = IORESOURCE_IRQ, | 189 | .flags = IORESOURCE_IRQ, |
186 | }, | 190 | }, |
187 | [2] = { | 191 | [2] = { |
188 | .name = "smc91x-attrib", | 192 | .name = "smc91x-attrib", |
189 | .start = 0x0e000000, | 193 | .start = 0x0e000000, |
190 | .end = 0x0e0fffff, | 194 | .end = 0x0e0fffff, |
191 | .flags = IORESOURCE_MEM, | 195 | .flags = IORESOURCE_MEM, |
192 | }, | 196 | }, |
193 | }; | 197 | }; |
194 | 198 | ||
195 | static struct platform_device smc91x_device = { | 199 | static struct platform_device smc91x_device = { |
196 | .name = "smc91x", | 200 | .name = "smc91x", |
197 | .id = -1, | 201 | .id = -1, |
198 | .num_resources = ARRAY_SIZE(smc91x_resources), | 202 | .num_resources = ARRAY_SIZE(smc91x_resources), |
199 | .resource = smc91x_resources, | 203 | .resource = smc91x_resources, |
200 | }; | 204 | }; |
201 | 205 | ||
206 | static struct resource flash_resources[] = { | ||
207 | [0] = { | ||
208 | .start = 0x00000000, | ||
209 | .end = SZ_64M - 1, | ||
210 | .flags = IORESOURCE_MEM, | ||
211 | }, | ||
212 | [1] = { | ||
213 | .start = 0x04000000, | ||
214 | .end = 0x04000000 + SZ_64M - 1, | ||
215 | .flags = IORESOURCE_MEM, | ||
216 | }, | ||
217 | }; | ||
218 | |||
219 | static struct mtd_partition lubbock_partitions[] = { | ||
220 | { | ||
221 | .name = "Bootloader", | ||
222 | .size = 0x00040000, | ||
223 | .offset = 0, | ||
224 | .mask_flags = MTD_WRITEABLE /* force read-only */ | ||
225 | },{ | ||
226 | .name = "Kernel", | ||
227 | .size = 0x00100000, | ||
228 | .offset = 0x00040000, | ||
229 | },{ | ||
230 | .name = "Filesystem", | ||
231 | .size = MTDPART_SIZ_FULL, | ||
232 | .offset = 0x00140000 | ||
233 | } | ||
234 | }; | ||
235 | |||
236 | static struct flash_platform_data lubbock_flash_data[2] = { | ||
237 | { | ||
238 | .map_name = "cfi_probe", | ||
239 | .parts = lubbock_partitions, | ||
240 | .nr_parts = ARRAY_SIZE(lubbock_partitions), | ||
241 | }, { | ||
242 | .map_name = "cfi_probe", | ||
243 | .parts = NULL, | ||
244 | .nr_parts = 0, | ||
245 | } | ||
246 | }; | ||
247 | |||
248 | static struct platform_device lubbock_flash_device[2] = { | ||
249 | { | ||
250 | .name = "pxa2xx-flash", | ||
251 | .id = 0, | ||
252 | .dev = { | ||
253 | .platform_data = &lubbock_flash_data[0], | ||
254 | }, | ||
255 | .resource = &flash_resources[0], | ||
256 | .num_resources = 1, | ||
257 | }, | ||
258 | { | ||
259 | .name = "pxa2xx-flash", | ||
260 | .id = 1, | ||
261 | .dev = { | ||
262 | .platform_data = &lubbock_flash_data[1], | ||
263 | }, | ||
264 | .resource = &flash_resources[1], | ||
265 | .num_resources = 1, | ||
266 | }, | ||
267 | }; | ||
268 | |||
202 | static struct platform_device *devices[] __initdata = { | 269 | static struct platform_device *devices[] __initdata = { |
203 | &sa1111_device, | 270 | &sa1111_device, |
204 | &lub_audio_device, | 271 | &lub_audio_device, |
205 | &smc91x_device, | 272 | &smc91x_device, |
273 | &lubbock_flash_device[0], | ||
274 | &lubbock_flash_device[1], | ||
206 | }; | 275 | }; |
207 | 276 | ||
208 | static struct pxafb_mach_info sharp_lm8v31 __initdata = { | 277 | static struct pxafb_mach_info sharp_lm8v31 __initdata = { |
209 | .pixclock = 270000, | 278 | .pixclock = 270000, |
210 | .xres = 640, | 279 | .xres = 640, |
211 | .yres = 480, | 280 | .yres = 480, |
212 | .bpp = 16, | 281 | .bpp = 16, |
213 | .hsync_len = 1, | 282 | .hsync_len = 1, |
214 | .left_margin = 3, | 283 | .left_margin = 3, |
215 | .right_margin = 3, | 284 | .right_margin = 3, |
216 | .vsync_len = 1, | 285 | .vsync_len = 1, |
217 | .upper_margin = 0, | 286 | .upper_margin = 0, |
218 | .lower_margin = 0, | 287 | .lower_margin = 0, |
219 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | 288 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
220 | .cmap_greyscale = 0, | 289 | .cmap_greyscale = 0, |
221 | .cmap_inverse = 0, | 290 | .cmap_inverse = 0, |
222 | .cmap_static = 0, | 291 | .cmap_static = 0, |
223 | .lccr0 = LCCR0_SDS, | 292 | .lccr0 = LCCR0_SDS, |
224 | .lccr3 = LCCR3_PCP | LCCR3_Acb(255), | 293 | .lccr3 = LCCR3_PCP | LCCR3_Acb(255), |
225 | }; | 294 | }; |
226 | 295 | ||
227 | #define MMC_POLL_RATE msecs_to_jiffies(1000) | 296 | #define MMC_POLL_RATE msecs_to_jiffies(1000) |
228 | 297 | ||
229 | static void lubbock_mmc_poll(unsigned long); | 298 | static void lubbock_mmc_poll(unsigned long); |
230 | static irqreturn_t (*mmc_detect_int)(int, void *, struct pt_regs *); | 299 | static irqreturn_t (*mmc_detect_int)(int, void *, struct pt_regs *); |
231 | 300 | ||
232 | static struct timer_list mmc_timer = { | 301 | static struct timer_list mmc_timer = { |
233 | .function = lubbock_mmc_poll, | 302 | .function = lubbock_mmc_poll, |
234 | }; | 303 | }; |
235 | 304 | ||
236 | static void lubbock_mmc_poll(unsigned long data) | 305 | static void lubbock_mmc_poll(unsigned long data) |
237 | { | 306 | { |
238 | unsigned long flags; | 307 | unsigned long flags; |
239 | 308 | ||
240 | /* clear any previous irq state, then ... */ | 309 | /* clear any previous irq state, then ... */ |
241 | local_irq_save(flags); | 310 | local_irq_save(flags); |
242 | LUB_IRQ_SET_CLR &= ~(1 << 0); | 311 | LUB_IRQ_SET_CLR &= ~(1 << 0); |
243 | local_irq_restore(flags); | 312 | local_irq_restore(flags); |
244 | 313 | ||
245 | /* poll until mmc/sd card is removed */ | 314 | /* poll until mmc/sd card is removed */ |
246 | if (LUB_IRQ_SET_CLR & (1 << 0)) | 315 | if (LUB_IRQ_SET_CLR & (1 << 0)) |
247 | mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE); | 316 | mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE); |
248 | else { | 317 | else { |
249 | (void) mmc_detect_int(LUBBOCK_SD_IRQ, (void *)data, NULL); | 318 | (void) mmc_detect_int(LUBBOCK_SD_IRQ, (void *)data, NULL); |
250 | enable_irq(LUBBOCK_SD_IRQ); | 319 | enable_irq(LUBBOCK_SD_IRQ); |
251 | } | 320 | } |
252 | } | 321 | } |
253 | 322 | ||
254 | static irqreturn_t lubbock_detect_int(int irq, void *data, struct pt_regs *regs) | 323 | static irqreturn_t lubbock_detect_int(int irq, void *data, struct pt_regs *regs) |
255 | { | 324 | { |
256 | /* IRQ is level triggered; disable, and poll for removal */ | 325 | /* IRQ is level triggered; disable, and poll for removal */ |
257 | disable_irq(irq); | 326 | disable_irq(irq); |
258 | mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE); | 327 | mod_timer(&mmc_timer, jiffies + MMC_POLL_RATE); |
259 | 328 | ||
260 | return mmc_detect_int(irq, data, regs); | 329 | return mmc_detect_int(irq, data, regs); |
261 | } | 330 | } |
262 | 331 | ||
263 | static int lubbock_mci_init(struct device *dev, | 332 | static int lubbock_mci_init(struct device *dev, |
264 | irqreturn_t (*detect_int)(int, void *, struct pt_regs *), | 333 | irqreturn_t (*detect_int)(int, void *, struct pt_regs *), |
265 | void *data) | 334 | void *data) |
266 | { | 335 | { |
267 | /* setup GPIO for PXA25x MMC controller */ | 336 | /* setup GPIO for PXA25x MMC controller */ |
268 | pxa_gpio_mode(GPIO6_MMCCLK_MD); | 337 | pxa_gpio_mode(GPIO6_MMCCLK_MD); |
269 | pxa_gpio_mode(GPIO8_MMCCS0_MD); | 338 | pxa_gpio_mode(GPIO8_MMCCS0_MD); |
270 | 339 | ||
271 | /* detect card insert/eject */ | 340 | /* detect card insert/eject */ |
272 | mmc_detect_int = detect_int; | 341 | mmc_detect_int = detect_int; |
273 | init_timer(&mmc_timer); | 342 | init_timer(&mmc_timer); |
274 | mmc_timer.data = (unsigned long) data; | 343 | mmc_timer.data = (unsigned long) data; |
275 | return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int, | 344 | return request_irq(LUBBOCK_SD_IRQ, lubbock_detect_int, |
276 | SA_SAMPLE_RANDOM, "lubbock-sd-detect", data); | 345 | SA_SAMPLE_RANDOM, "lubbock-sd-detect", data); |
277 | } | 346 | } |
278 | 347 | ||
279 | static int lubbock_mci_get_ro(struct device *dev) | 348 | static int lubbock_mci_get_ro(struct device *dev) |
280 | { | 349 | { |
281 | return (LUB_MISC_RD & (1 << 2)) != 0; | 350 | return (LUB_MISC_RD & (1 << 2)) != 0; |
282 | } | 351 | } |
283 | 352 | ||
284 | static void lubbock_mci_exit(struct device *dev, void *data) | 353 | static void lubbock_mci_exit(struct device *dev, void *data) |
285 | { | 354 | { |
286 | free_irq(LUBBOCK_SD_IRQ, data); | 355 | free_irq(LUBBOCK_SD_IRQ, data); |
287 | del_timer_sync(&mmc_timer); | 356 | del_timer_sync(&mmc_timer); |
288 | } | 357 | } |
289 | 358 | ||
290 | static struct pxamci_platform_data lubbock_mci_platform_data = { | 359 | static struct pxamci_platform_data lubbock_mci_platform_data = { |
291 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 360 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
292 | .detect_delay = 1, | 361 | .detect_delay = 1, |
293 | .init = lubbock_mci_init, | 362 | .init = lubbock_mci_init, |
294 | .get_ro = lubbock_mci_get_ro, | 363 | .get_ro = lubbock_mci_get_ro, |
295 | .exit = lubbock_mci_exit, | 364 | .exit = lubbock_mci_exit, |
296 | }; | 365 | }; |
297 | 366 | ||
298 | static void lubbock_irda_transceiver_mode(struct device *dev, int mode) | 367 | static void lubbock_irda_transceiver_mode(struct device *dev, int mode) |
299 | { | 368 | { |
300 | unsigned long flags; | 369 | unsigned long flags; |
301 | 370 | ||
302 | local_irq_save(flags); | 371 | local_irq_save(flags); |
303 | if (mode & IR_SIRMODE) { | 372 | if (mode & IR_SIRMODE) { |
304 | LUB_MISC_WR &= ~(1 << 4); | 373 | LUB_MISC_WR &= ~(1 << 4); |
305 | } else if (mode & IR_FIRMODE) { | 374 | } else if (mode & IR_FIRMODE) { |
306 | LUB_MISC_WR |= 1 << 4; | 375 | LUB_MISC_WR |= 1 << 4; |
307 | } | 376 | } |
308 | local_irq_restore(flags); | 377 | local_irq_restore(flags); |
309 | } | 378 | } |
310 | 379 | ||
311 | static struct pxaficp_platform_data lubbock_ficp_platform_data = { | 380 | static struct pxaficp_platform_data lubbock_ficp_platform_data = { |
312 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE, | 381 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE, |
313 | .transceiver_mode = lubbock_irda_transceiver_mode, | 382 | .transceiver_mode = lubbock_irda_transceiver_mode, |
314 | }; | 383 | }; |
315 | 384 | ||
316 | static void __init lubbock_init(void) | 385 | static void __init lubbock_init(void) |
317 | { | 386 | { |
387 | int flashboot = (LUB_CONF_SWITCHES & 1); | ||
388 | |||
318 | pxa_set_udc_info(&udc_info); | 389 | pxa_set_udc_info(&udc_info); |
319 | set_pxa_fb_info(&sharp_lm8v31); | 390 | set_pxa_fb_info(&sharp_lm8v31); |
320 | pxa_set_mci_info(&lubbock_mci_platform_data); | 391 | pxa_set_mci_info(&lubbock_mci_platform_data); |
321 | pxa_set_ficp_info(&lubbock_ficp_platform_data); | 392 | pxa_set_ficp_info(&lubbock_ficp_platform_data); |
393 | |||
394 | lubbock_flash_data[0].width = lubbock_flash_data[1].width = | ||
395 | (BOOT_DEF & 1) ? 2 : 4; | ||
396 | /* Compensate for the nROMBT switch which swaps the flash banks */ | ||
397 | printk(KERN_NOTICE "Lubbock configured to boot from %s (bank %d)\n", | ||
398 | flashboot?"Flash":"ROM", flashboot); | ||
399 | |||
400 | lubbock_flash_data[flashboot^1].name = "application-flash"; | ||
401 | lubbock_flash_data[flashboot].name = "boot-rom"; | ||
322 | (void) platform_add_devices(devices, ARRAY_SIZE(devices)); | 402 | (void) platform_add_devices(devices, ARRAY_SIZE(devices)); |
323 | } | 403 | } |
324 | 404 | ||
325 | static struct map_desc lubbock_io_desc[] __initdata = { | 405 | static struct map_desc lubbock_io_desc[] __initdata = { |
326 | { /* CPLD */ | 406 | { /* CPLD */ |
327 | .virtual = LUBBOCK_FPGA_VIRT, | 407 | .virtual = LUBBOCK_FPGA_VIRT, |
328 | .pfn = __phys_to_pfn(LUBBOCK_FPGA_PHYS), | 408 | .pfn = __phys_to_pfn(LUBBOCK_FPGA_PHYS), |
329 | .length = 0x00100000, | 409 | .length = 0x00100000, |
330 | .type = MT_DEVICE | 410 | .type = MT_DEVICE |
331 | } | 411 | } |
332 | }; | 412 | }; |
333 | 413 | ||
334 | static void __init lubbock_map_io(void) | 414 | static void __init lubbock_map_io(void) |
335 | { | 415 | { |
336 | pxa_map_io(); | 416 | pxa_map_io(); |
337 | iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc)); | 417 | iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc)); |
338 | 418 | ||
339 | /* This enables the BTUART */ | 419 | /* This enables the BTUART */ |
340 | pxa_gpio_mode(GPIO42_BTRXD_MD); | 420 | pxa_gpio_mode(GPIO42_BTRXD_MD); |
341 | pxa_gpio_mode(GPIO43_BTTXD_MD); | 421 | pxa_gpio_mode(GPIO43_BTTXD_MD); |
342 | pxa_gpio_mode(GPIO44_BTCTS_MD); | 422 | pxa_gpio_mode(GPIO44_BTCTS_MD); |
343 | pxa_gpio_mode(GPIO45_BTRTS_MD); | 423 | pxa_gpio_mode(GPIO45_BTRTS_MD); |
344 | 424 | ||
345 | /* This is for the SMC chip select */ | 425 | /* This is for the SMC chip select */ |
346 | pxa_gpio_mode(GPIO79_nCS_3_MD); | 426 | pxa_gpio_mode(GPIO79_nCS_3_MD); |
347 | 427 | ||
348 | /* setup sleep mode values */ | 428 | /* setup sleep mode values */ |
349 | PWER = 0x00000002; | 429 | PWER = 0x00000002; |
350 | PFER = 0x00000000; | 430 | PFER = 0x00000000; |
351 | PRER = 0x00000002; | 431 | PRER = 0x00000002; |
352 | PGSR0 = 0x00008000; | 432 | PGSR0 = 0x00008000; |
353 | PGSR1 = 0x003F0202; | 433 | PGSR1 = 0x003F0202; |
354 | PGSR2 = 0x0001C000; | 434 | PGSR2 = 0x0001C000; |
355 | PCFR |= PCFR_OPDE; | 435 | PCFR |= PCFR_OPDE; |
356 | } | 436 | } |
357 | 437 | ||
358 | MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)") | 438 | MACHINE_START(LUBBOCK, "Intel DBPXA250 Development Platform (aka Lubbock)") |
359 | /* Maintainer: MontaVista Software Inc. */ | 439 | /* Maintainer: MontaVista Software Inc. */ |
360 | .phys_ram = 0xa0000000, | 440 | .phys_ram = 0xa0000000, |
361 | .phys_io = 0x40000000, | 441 | .phys_io = 0x40000000, |
362 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | 442 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, |
363 | .map_io = lubbock_map_io, | 443 | .map_io = lubbock_map_io, |
364 | .init_irq = lubbock_init_irq, | 444 | .init_irq = lubbock_init_irq, |
365 | .timer = &pxa_timer, | 445 | .timer = &pxa_timer, |
366 | .init_machine = lubbock_init, | 446 | .init_machine = lubbock_init, |
367 | MACHINE_END | 447 | MACHINE_END |
368 | 448 |
arch/arm/mach-pxa/mainstone.c
1 | /* | 1 | /* |
2 | * linux/arch/arm/mach-pxa/mainstone.c | 2 | * linux/arch/arm/mach-pxa/mainstone.c |
3 | * | 3 | * |
4 | * Support for the Intel HCDDBBVA0 Development Platform. | 4 | * Support for the Intel HCDDBBVA0 Development Platform. |
5 | * (go figure how they came up with such name...) | 5 | * (go figure how they came up with such name...) |
6 | * | 6 | * |
7 | * Author: Nicolas Pitre | 7 | * Author: Nicolas Pitre |
8 | * Created: Nov 05, 2002 | 8 | * Created: Nov 05, 2002 |
9 | * Copyright: MontaVista Software Inc. | 9 | * Copyright: MontaVista Software Inc. |
10 | * | 10 | * |
11 | * This program is free software; you can redistribute it and/or modify | 11 | * This program is free software; you can redistribute it and/or modify |
12 | * it under the terms of the GNU General Public License version 2 as | 12 | * it under the terms of the GNU General Public License version 2 as |
13 | * published by the Free Software Foundation. | 13 | * published by the Free Software Foundation. |
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/sysdev.h> | 18 | #include <linux/sysdev.h> |
19 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
20 | #include <linux/sched.h> | 20 | #include <linux/sched.h> |
21 | #include <linux/bitops.h> | 21 | #include <linux/bitops.h> |
22 | #include <linux/fb.h> | 22 | #include <linux/fb.h> |
23 | #include <linux/ioport.h> | ||
24 | #include <linux/mtd/mtd.h> | ||
25 | #include <linux/mtd/partitions.h> | ||
23 | 26 | ||
24 | #include <asm/types.h> | 27 | #include <asm/types.h> |
25 | #include <asm/setup.h> | 28 | #include <asm/setup.h> |
26 | #include <asm/memory.h> | 29 | #include <asm/memory.h> |
27 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
28 | #include <asm/hardware.h> | 31 | #include <asm/hardware.h> |
29 | #include <asm/irq.h> | 32 | #include <asm/irq.h> |
33 | #include <asm/sizes.h> | ||
30 | 34 | ||
31 | #include <asm/mach/arch.h> | 35 | #include <asm/mach/arch.h> |
32 | #include <asm/mach/map.h> | 36 | #include <asm/mach/map.h> |
33 | #include <asm/mach/irq.h> | 37 | #include <asm/mach/irq.h> |
38 | #include <asm/mach/flash.h> | ||
34 | 39 | ||
35 | #include <asm/arch/pxa-regs.h> | 40 | #include <asm/arch/pxa-regs.h> |
36 | #include <asm/arch/mainstone.h> | 41 | #include <asm/arch/mainstone.h> |
37 | #include <asm/arch/audio.h> | 42 | #include <asm/arch/audio.h> |
38 | #include <asm/arch/pxafb.h> | 43 | #include <asm/arch/pxafb.h> |
39 | #include <asm/arch/mmc.h> | 44 | #include <asm/arch/mmc.h> |
40 | #include <asm/arch/irda.h> | 45 | #include <asm/arch/irda.h> |
41 | 46 | ||
42 | #include "generic.h" | 47 | #include "generic.h" |
43 | 48 | ||
44 | 49 | ||
45 | static unsigned long mainstone_irq_enabled; | 50 | static unsigned long mainstone_irq_enabled; |
46 | 51 | ||
47 | static void mainstone_mask_irq(unsigned int irq) | 52 | static void mainstone_mask_irq(unsigned int irq) |
48 | { | 53 | { |
49 | int mainstone_irq = (irq - MAINSTONE_IRQ(0)); | 54 | int mainstone_irq = (irq - MAINSTONE_IRQ(0)); |
50 | MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); | 55 | MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq)); |
51 | } | 56 | } |
52 | 57 | ||
53 | static void mainstone_unmask_irq(unsigned int irq) | 58 | static void mainstone_unmask_irq(unsigned int irq) |
54 | { | 59 | { |
55 | int mainstone_irq = (irq - MAINSTONE_IRQ(0)); | 60 | int mainstone_irq = (irq - MAINSTONE_IRQ(0)); |
56 | /* the irq can be acknowledged only if deasserted, so it's done here */ | 61 | /* the irq can be acknowledged only if deasserted, so it's done here */ |
57 | MST_INTSETCLR &= ~(1 << mainstone_irq); | 62 | MST_INTSETCLR &= ~(1 << mainstone_irq); |
58 | MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); | 63 | MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); |
59 | } | 64 | } |
60 | 65 | ||
61 | static struct irqchip mainstone_irq_chip = { | 66 | static struct irqchip mainstone_irq_chip = { |
62 | .ack = mainstone_mask_irq, | 67 | .ack = mainstone_mask_irq, |
63 | .mask = mainstone_mask_irq, | 68 | .mask = mainstone_mask_irq, |
64 | .unmask = mainstone_unmask_irq, | 69 | .unmask = mainstone_unmask_irq, |
65 | }; | 70 | }; |
66 | 71 | ||
67 | static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc, | 72 | static void mainstone_irq_handler(unsigned int irq, struct irqdesc *desc, |
68 | struct pt_regs *regs) | 73 | struct pt_regs *regs) |
69 | { | 74 | { |
70 | unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; | 75 | unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled; |
71 | do { | 76 | do { |
72 | GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ | 77 | GEDR(0) = GPIO_bit(0); /* clear useless edge notification */ |
73 | if (likely(pending)) { | 78 | if (likely(pending)) { |
74 | irq = MAINSTONE_IRQ(0) + __ffs(pending); | 79 | irq = MAINSTONE_IRQ(0) + __ffs(pending); |
75 | desc = irq_desc + irq; | 80 | desc = irq_desc + irq; |
76 | desc_handle_irq(irq, desc, regs); | 81 | desc_handle_irq(irq, desc, regs); |
77 | } | 82 | } |
78 | pending = MST_INTSETCLR & mainstone_irq_enabled; | 83 | pending = MST_INTSETCLR & mainstone_irq_enabled; |
79 | } while (pending); | 84 | } while (pending); |
80 | } | 85 | } |
81 | 86 | ||
82 | static void __init mainstone_init_irq(void) | 87 | static void __init mainstone_init_irq(void) |
83 | { | 88 | { |
84 | int irq; | 89 | int irq; |
85 | 90 | ||
86 | pxa_init_irq(); | 91 | pxa_init_irq(); |
87 | 92 | ||
88 | /* setup extra Mainstone irqs */ | 93 | /* setup extra Mainstone irqs */ |
89 | for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { | 94 | for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) { |
90 | set_irq_chip(irq, &mainstone_irq_chip); | 95 | set_irq_chip(irq, &mainstone_irq_chip); |
91 | set_irq_handler(irq, do_level_IRQ); | 96 | set_irq_handler(irq, do_level_IRQ); |
92 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | 97 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
93 | } | 98 | } |
94 | set_irq_flags(MAINSTONE_IRQ(8), 0); | 99 | set_irq_flags(MAINSTONE_IRQ(8), 0); |
95 | set_irq_flags(MAINSTONE_IRQ(12), 0); | 100 | set_irq_flags(MAINSTONE_IRQ(12), 0); |
96 | 101 | ||
97 | MST_INTMSKENA = 0; | 102 | MST_INTMSKENA = 0; |
98 | MST_INTSETCLR = 0; | 103 | MST_INTSETCLR = 0; |
99 | 104 | ||
100 | set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); | 105 | set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); |
101 | set_irq_type(IRQ_GPIO(0), IRQT_FALLING); | 106 | set_irq_type(IRQ_GPIO(0), IRQT_FALLING); |
102 | } | 107 | } |
103 | 108 | ||
104 | #ifdef CONFIG_PM | 109 | #ifdef CONFIG_PM |
105 | 110 | ||
106 | static int mainstone_irq_resume(struct sys_device *dev) | 111 | static int mainstone_irq_resume(struct sys_device *dev) |
107 | { | 112 | { |
108 | MST_INTMSKENA = mainstone_irq_enabled; | 113 | MST_INTMSKENA = mainstone_irq_enabled; |
109 | return 0; | 114 | return 0; |
110 | } | 115 | } |
111 | 116 | ||
112 | static struct sysdev_class mainstone_irq_sysclass = { | 117 | static struct sysdev_class mainstone_irq_sysclass = { |
113 | set_kset_name("cpld_irq"), | 118 | set_kset_name("cpld_irq"), |
114 | .resume = mainstone_irq_resume, | 119 | .resume = mainstone_irq_resume, |
115 | }; | 120 | }; |
116 | 121 | ||
117 | static struct sys_device mainstone_irq_device = { | 122 | static struct sys_device mainstone_irq_device = { |
118 | .cls = &mainstone_irq_sysclass, | 123 | .cls = &mainstone_irq_sysclass, |
119 | }; | 124 | }; |
120 | 125 | ||
121 | static int __init mainstone_irq_device_init(void) | 126 | static int __init mainstone_irq_device_init(void) |
122 | { | 127 | { |
123 | int ret = sysdev_class_register(&mainstone_irq_sysclass); | 128 | int ret = sysdev_class_register(&mainstone_irq_sysclass); |
124 | if (ret == 0) | 129 | if (ret == 0) |
125 | ret = sysdev_register(&mainstone_irq_device); | 130 | ret = sysdev_register(&mainstone_irq_device); |
126 | return ret; | 131 | return ret; |
127 | } | 132 | } |
128 | 133 | ||
129 | device_initcall(mainstone_irq_device_init); | 134 | device_initcall(mainstone_irq_device_init); |
130 | 135 | ||
131 | #endif | 136 | #endif |
132 | 137 | ||
133 | 138 | ||
134 | static struct resource smc91x_resources[] = { | 139 | static struct resource smc91x_resources[] = { |
135 | [0] = { | 140 | [0] = { |
136 | .start = (MST_ETH_PHYS + 0x300), | 141 | .start = (MST_ETH_PHYS + 0x300), |
137 | .end = (MST_ETH_PHYS + 0xfffff), | 142 | .end = (MST_ETH_PHYS + 0xfffff), |
138 | .flags = IORESOURCE_MEM, | 143 | .flags = IORESOURCE_MEM, |
139 | }, | 144 | }, |
140 | [1] = { | 145 | [1] = { |
141 | .start = MAINSTONE_IRQ(3), | 146 | .start = MAINSTONE_IRQ(3), |
142 | .end = MAINSTONE_IRQ(3), | 147 | .end = MAINSTONE_IRQ(3), |
143 | .flags = IORESOURCE_IRQ, | 148 | .flags = IORESOURCE_IRQ, |
144 | } | 149 | } |
145 | }; | 150 | }; |
146 | 151 | ||
147 | static struct platform_device smc91x_device = { | 152 | static struct platform_device smc91x_device = { |
148 | .name = "smc91x", | 153 | .name = "smc91x", |
149 | .id = 0, | 154 | .id = 0, |
150 | .num_resources = ARRAY_SIZE(smc91x_resources), | 155 | .num_resources = ARRAY_SIZE(smc91x_resources), |
151 | .resource = smc91x_resources, | 156 | .resource = smc91x_resources, |
152 | }; | 157 | }; |
153 | 158 | ||
154 | static int mst_audio_startup(snd_pcm_substream_t *substream, void *priv) | 159 | static int mst_audio_startup(snd_pcm_substream_t *substream, void *priv) |
155 | { | 160 | { |
156 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 161 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
157 | MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; | 162 | MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; |
158 | return 0; | 163 | return 0; |
159 | } | 164 | } |
160 | 165 | ||
161 | static void mst_audio_shutdown(snd_pcm_substream_t *substream, void *priv) | 166 | static void mst_audio_shutdown(snd_pcm_substream_t *substream, void *priv) |
162 | { | 167 | { |
163 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 168 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
164 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; | 169 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; |
165 | } | 170 | } |
166 | 171 | ||
167 | static long mst_audio_suspend_mask; | 172 | static long mst_audio_suspend_mask; |
168 | 173 | ||
169 | static void mst_audio_suspend(void *priv) | 174 | static void mst_audio_suspend(void *priv) |
170 | { | 175 | { |
171 | mst_audio_suspend_mask = MST_MSCWR2; | 176 | mst_audio_suspend_mask = MST_MSCWR2; |
172 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; | 177 | MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; |
173 | } | 178 | } |
174 | 179 | ||
175 | static void mst_audio_resume(void *priv) | 180 | static void mst_audio_resume(void *priv) |
176 | { | 181 | { |
177 | MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; | 182 | MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; |
178 | } | 183 | } |
179 | 184 | ||
180 | static pxa2xx_audio_ops_t mst_audio_ops = { | 185 | static pxa2xx_audio_ops_t mst_audio_ops = { |
181 | .startup = mst_audio_startup, | 186 | .startup = mst_audio_startup, |
182 | .shutdown = mst_audio_shutdown, | 187 | .shutdown = mst_audio_shutdown, |
183 | .suspend = mst_audio_suspend, | 188 | .suspend = mst_audio_suspend, |
184 | .resume = mst_audio_resume, | 189 | .resume = mst_audio_resume, |
185 | }; | 190 | }; |
186 | 191 | ||
187 | static struct platform_device mst_audio_device = { | 192 | static struct platform_device mst_audio_device = { |
188 | .name = "pxa2xx-ac97", | 193 | .name = "pxa2xx-ac97", |
189 | .id = -1, | 194 | .id = -1, |
190 | .dev = { .platform_data = &mst_audio_ops }, | 195 | .dev = { .platform_data = &mst_audio_ops }, |
191 | }; | 196 | }; |
192 | 197 | ||
198 | static struct resource flash_resources[] = { | ||
199 | [0] = { | ||
200 | .start = PXA_CS0_PHYS, | ||
201 | .end = PXA_CS0_PHYS + SZ_64M - 1, | ||
202 | .flags = IORESOURCE_MEM, | ||
203 | }, | ||
204 | [1] = { | ||
205 | .start = PXA_CS1_PHYS, | ||
206 | .end = PXA_CS1_PHYS + SZ_64M - 1, | ||
207 | .flags = IORESOURCE_MEM, | ||
208 | }, | ||
209 | }; | ||
210 | |||
211 | static struct mtd_partition mainstoneflash0_partitions[] = { | ||
212 | { | ||
213 | .name = "Bootloader", | ||
214 | .size = 0x00040000, | ||
215 | .offset = 0, | ||
216 | .mask_flags = MTD_WRITEABLE /* force read-only */ | ||
217 | },{ | ||
218 | .name = "Kernel", | ||
219 | .size = 0x00400000, | ||
220 | .offset = 0x00040000, | ||
221 | },{ | ||
222 | .name = "Filesystem", | ||
223 | .size = MTDPART_SIZ_FULL, | ||
224 | .offset = 0x00440000 | ||
225 | } | ||
226 | }; | ||
227 | |||
228 | static struct flash_platform_data mst_flash_data[2] = { | ||
229 | { | ||
230 | .map_name = "cfi_probe", | ||
231 | .parts = mainstoneflash0_partitions, | ||
232 | .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions), | ||
233 | }, { | ||
234 | .map_name = "cfi_probe", | ||
235 | .parts = NULL, | ||
236 | .nr_parts = 0, | ||
237 | } | ||
238 | }; | ||
239 | |||
240 | static struct platform_device mst_flash_device[2] = { | ||
241 | { | ||
242 | .name = "pxa2xx-flash", | ||
243 | .id = 0, | ||
244 | .dev = { | ||
245 | .platform_data = &mst_flash_data[0], | ||
246 | }, | ||
247 | .resource = &flash_resources[0], | ||
248 | .num_resources = 1, | ||
249 | }, | ||
250 | { | ||
251 | .name = "pxa2xx-flash", | ||
252 | .id = 1, | ||
253 | .dev = { | ||
254 | .platform_data = &mst_flash_data[1], | ||
255 | }, | ||
256 | .resource = &flash_resources[1], | ||
257 | .num_resources = 1, | ||
258 | }, | ||
259 | }; | ||
260 | |||
193 | static void mainstone_backlight_power(int on) | 261 | static void mainstone_backlight_power(int on) |
194 | { | 262 | { |
195 | if (on) { | 263 | if (on) { |
196 | pxa_gpio_mode(GPIO16_PWM0_MD); | 264 | pxa_gpio_mode(GPIO16_PWM0_MD); |
197 | pxa_set_cken(CKEN0_PWM0, 1); | 265 | pxa_set_cken(CKEN0_PWM0, 1); |
198 | PWM_CTRL0 = 0; | 266 | PWM_CTRL0 = 0; |
199 | PWM_PWDUTY0 = 0x3ff; | 267 | PWM_PWDUTY0 = 0x3ff; |
200 | PWM_PERVAL0 = 0x3ff; | 268 | PWM_PERVAL0 = 0x3ff; |
201 | } else { | 269 | } else { |
202 | PWM_CTRL0 = 0; | 270 | PWM_CTRL0 = 0; |
203 | PWM_PWDUTY0 = 0x0; | 271 | PWM_PWDUTY0 = 0x0; |
204 | PWM_PERVAL0 = 0x3FF; | 272 | PWM_PERVAL0 = 0x3FF; |
205 | pxa_set_cken(CKEN0_PWM0, 0); | 273 | pxa_set_cken(CKEN0_PWM0, 0); |
206 | } | 274 | } |
207 | } | 275 | } |
208 | 276 | ||
209 | static struct pxafb_mach_info toshiba_ltm04c380k __initdata = { | 277 | static struct pxafb_mach_info toshiba_ltm04c380k __initdata = { |
210 | .pixclock = 50000, | 278 | .pixclock = 50000, |
211 | .xres = 640, | 279 | .xres = 640, |
212 | .yres = 480, | 280 | .yres = 480, |
213 | .bpp = 16, | 281 | .bpp = 16, |
214 | .hsync_len = 1, | 282 | .hsync_len = 1, |
215 | .left_margin = 0x9f, | 283 | .left_margin = 0x9f, |
216 | .right_margin = 1, | 284 | .right_margin = 1, |
217 | .vsync_len = 44, | 285 | .vsync_len = 44, |
218 | .upper_margin = 0, | 286 | .upper_margin = 0, |
219 | .lower_margin = 0, | 287 | .lower_margin = 0, |
220 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | 288 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, |
221 | .lccr0 = LCCR0_Act, | 289 | .lccr0 = LCCR0_Act, |
222 | .lccr3 = LCCR3_PCP, | 290 | .lccr3 = LCCR3_PCP, |
223 | .pxafb_backlight_power = mainstone_backlight_power, | 291 | .pxafb_backlight_power = mainstone_backlight_power, |
224 | }; | 292 | }; |
225 | 293 | ||
226 | static struct pxafb_mach_info toshiba_ltm035a776c __initdata = { | 294 | static struct pxafb_mach_info toshiba_ltm035a776c __initdata = { |
227 | .pixclock = 110000, | 295 | .pixclock = 110000, |
228 | .xres = 240, | 296 | .xres = 240, |
229 | .yres = 320, | 297 | .yres = 320, |
230 | .bpp = 16, | 298 | .bpp = 16, |
231 | .hsync_len = 4, | 299 | .hsync_len = 4, |
232 | .left_margin = 8, | 300 | .left_margin = 8, |
233 | .right_margin = 20, | 301 | .right_margin = 20, |
234 | .vsync_len = 3, | 302 | .vsync_len = 3, |
235 | .upper_margin = 1, | 303 | .upper_margin = 1, |
236 | .lower_margin = 10, | 304 | .lower_margin = 10, |
237 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | 305 | .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, |
238 | .lccr0 = LCCR0_Act, | 306 | .lccr0 = LCCR0_Act, |
239 | .lccr3 = LCCR3_PCP, | 307 | .lccr3 = LCCR3_PCP, |
240 | .pxafb_backlight_power = mainstone_backlight_power, | 308 | .pxafb_backlight_power = mainstone_backlight_power, |
241 | }; | 309 | }; |
242 | 310 | ||
243 | static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_int)(int, void *, struct pt_regs *), void *data) | 311 | static int mainstone_mci_init(struct device *dev, irqreturn_t (*mstone_detect_int)(int, void *, struct pt_regs *), void *data) |
244 | { | 312 | { |
245 | int err; | 313 | int err; |
246 | 314 | ||
247 | /* | 315 | /* |
248 | * setup GPIO for PXA27x MMC controller | 316 | * setup GPIO for PXA27x MMC controller |
249 | */ | 317 | */ |
250 | pxa_gpio_mode(GPIO32_MMCCLK_MD); | 318 | pxa_gpio_mode(GPIO32_MMCCLK_MD); |
251 | pxa_gpio_mode(GPIO112_MMCCMD_MD); | 319 | pxa_gpio_mode(GPIO112_MMCCMD_MD); |
252 | pxa_gpio_mode(GPIO92_MMCDAT0_MD); | 320 | pxa_gpio_mode(GPIO92_MMCDAT0_MD); |
253 | pxa_gpio_mode(GPIO109_MMCDAT1_MD); | 321 | pxa_gpio_mode(GPIO109_MMCDAT1_MD); |
254 | pxa_gpio_mode(GPIO110_MMCDAT2_MD); | 322 | pxa_gpio_mode(GPIO110_MMCDAT2_MD); |
255 | pxa_gpio_mode(GPIO111_MMCDAT3_MD); | 323 | pxa_gpio_mode(GPIO111_MMCDAT3_MD); |
256 | 324 | ||
257 | /* make sure SD/Memory Stick multiplexer's signals | 325 | /* make sure SD/Memory Stick multiplexer's signals |
258 | * are routed to MMC controller | 326 | * are routed to MMC controller |
259 | */ | 327 | */ |
260 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; | 328 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; |
261 | 329 | ||
262 | err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, SA_INTERRUPT, | 330 | err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, SA_INTERRUPT, |
263 | "MMC card detect", data); | 331 | "MMC card detect", data); |
264 | if (err) { | 332 | if (err) { |
265 | printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 333 | printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
266 | return -1; | 334 | return -1; |
267 | } | 335 | } |
268 | 336 | ||
269 | return 0; | 337 | return 0; |
270 | } | 338 | } |
271 | 339 | ||
272 | static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) | 340 | static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) |
273 | { | 341 | { |
274 | struct pxamci_platform_data* p_d = dev->platform_data; | 342 | struct pxamci_platform_data* p_d = dev->platform_data; |
275 | 343 | ||
276 | if (( 1 << vdd) & p_d->ocr_mask) { | 344 | if (( 1 << vdd) & p_d->ocr_mask) { |
277 | printk(KERN_DEBUG "%s: on\n", __FUNCTION__); | 345 | printk(KERN_DEBUG "%s: on\n", __FUNCTION__); |
278 | MST_MSCWR1 |= MST_MSCWR1_MMC_ON; | 346 | MST_MSCWR1 |= MST_MSCWR1_MMC_ON; |
279 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; | 347 | MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; |
280 | } else { | 348 | } else { |
281 | printk(KERN_DEBUG "%s: off\n", __FUNCTION__); | 349 | printk(KERN_DEBUG "%s: off\n", __FUNCTION__); |
282 | MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; | 350 | MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; |
283 | } | 351 | } |
284 | } | 352 | } |
285 | 353 | ||
286 | static void mainstone_mci_exit(struct device *dev, void *data) | 354 | static void mainstone_mci_exit(struct device *dev, void *data) |
287 | { | 355 | { |
288 | free_irq(MAINSTONE_MMC_IRQ, data); | 356 | free_irq(MAINSTONE_MMC_IRQ, data); |
289 | } | 357 | } |
290 | 358 | ||
291 | static struct pxamci_platform_data mainstone_mci_platform_data = { | 359 | static struct pxamci_platform_data mainstone_mci_platform_data = { |
292 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | 360 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
293 | .init = mainstone_mci_init, | 361 | .init = mainstone_mci_init, |
294 | .setpower = mainstone_mci_setpower, | 362 | .setpower = mainstone_mci_setpower, |
295 | .exit = mainstone_mci_exit, | 363 | .exit = mainstone_mci_exit, |
296 | }; | 364 | }; |
297 | 365 | ||
298 | static void mainstone_irda_transceiver_mode(struct device *dev, int mode) | 366 | static void mainstone_irda_transceiver_mode(struct device *dev, int mode) |
299 | { | 367 | { |
300 | unsigned long flags; | 368 | unsigned long flags; |
301 | 369 | ||
302 | local_irq_save(flags); | 370 | local_irq_save(flags); |
303 | if (mode & IR_SIRMODE) { | 371 | if (mode & IR_SIRMODE) { |
304 | MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; | 372 | MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; |
305 | } else if (mode & IR_FIRMODE) { | 373 | } else if (mode & IR_FIRMODE) { |
306 | MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; | 374 | MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; |
307 | } | 375 | } |
308 | if (mode & IR_OFF) { | 376 | if (mode & IR_OFF) { |
309 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; | 377 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; |
310 | } else { | 378 | } else { |
311 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; | 379 | MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; |
312 | } | 380 | } |
313 | local_irq_restore(flags); | 381 | local_irq_restore(flags); |
314 | } | 382 | } |
315 | 383 | ||
316 | static struct pxaficp_platform_data mainstone_ficp_platform_data = { | 384 | static struct pxaficp_platform_data mainstone_ficp_platform_data = { |
317 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, | 385 | .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, |
318 | .transceiver_mode = mainstone_irda_transceiver_mode, | 386 | .transceiver_mode = mainstone_irda_transceiver_mode, |
319 | }; | 387 | }; |
320 | 388 | ||
389 | static struct platform_device *platform_devices[] __initdata = { | ||
390 | &smc91x_device, | ||
391 | &mst_audio_device, | ||
392 | &mst_flash_device[0], | ||
393 | &mst_flash_device[1], | ||
394 | }; | ||
395 | |||
321 | static void __init mainstone_init(void) | 396 | static void __init mainstone_init(void) |
322 | { | 397 | { |
398 | int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */ | ||
399 | |||
400 | mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4; | ||
401 | mst_flash_data[1].width = 4; | ||
402 | |||
403 | /* Compensate for SW7 which swaps the flash banks */ | ||
404 | mst_flash_data[SW7].name = "processor-flash"; | ||
405 | mst_flash_data[SW7 ^ 1].name = "mainboard-flash"; | ||
406 | |||
407 | printk(KERN_NOTICE "Mainstone configured to boot from %s\n", | ||
408 | mst_flash_data[0].name); | ||
409 | |||
323 | /* | 410 | /* |
324 | * On Mainstone, we route AC97_SYSCLK via GPIO45 to | 411 | * On Mainstone, we route AC97_SYSCLK via GPIO45 to |
325 | * the audio daughter card | 412 | * the audio daughter card |
326 | */ | 413 | */ |
327 | pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD); | 414 | pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD); |
328 | 415 | ||
329 | platform_device_register(&smc91x_device); | 416 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
330 | platform_device_register(&mst_audio_device); | ||
331 | 417 | ||
332 | /* reading Mainstone's "Virtual Configuration Register" | 418 | /* reading Mainstone's "Virtual Configuration Register" |
333 | might be handy to select LCD type here */ | 419 | might be handy to select LCD type here */ |
334 | if (0) | 420 | if (0) |
335 | set_pxa_fb_info(&toshiba_ltm04c380k); | 421 | set_pxa_fb_info(&toshiba_ltm04c380k); |
336 | else | 422 | else |
337 | set_pxa_fb_info(&toshiba_ltm035a776c); | 423 | set_pxa_fb_info(&toshiba_ltm035a776c); |
338 | 424 | ||
339 | pxa_set_mci_info(&mainstone_mci_platform_data); | 425 | pxa_set_mci_info(&mainstone_mci_platform_data); |
340 | pxa_set_ficp_info(&mainstone_ficp_platform_data); | 426 | pxa_set_ficp_info(&mainstone_ficp_platform_data); |
341 | } | 427 | } |
342 | 428 | ||
343 | 429 | ||
344 | static struct map_desc mainstone_io_desc[] __initdata = { | 430 | static struct map_desc mainstone_io_desc[] __initdata = { |
345 | { /* CPLD */ | 431 | { /* CPLD */ |
346 | .virtual = MST_FPGA_VIRT, | 432 | .virtual = MST_FPGA_VIRT, |
347 | .pfn = __phys_to_pfn(MST_FPGA_PHYS), | 433 | .pfn = __phys_to_pfn(MST_FPGA_PHYS), |
348 | .length = 0x00100000, | 434 | .length = 0x00100000, |
349 | .type = MT_DEVICE | 435 | .type = MT_DEVICE |
350 | } | 436 | } |
351 | }; | 437 | }; |
352 | 438 | ||
353 | static void __init mainstone_map_io(void) | 439 | static void __init mainstone_map_io(void) |
354 | { | 440 | { |
355 | pxa_map_io(); | 441 | pxa_map_io(); |
356 | iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); | 442 | iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); |
357 | 443 | ||
358 | /* initialize sleep mode regs (wake-up sources, etc) */ | 444 | /* initialize sleep mode regs (wake-up sources, etc) */ |
359 | PGSR0 = 0x00008800; | 445 | PGSR0 = 0x00008800; |
360 | PGSR1 = 0x00000002; | 446 | PGSR1 = 0x00000002; |
361 | PGSR2 = 0x0001FC00; | 447 | PGSR2 = 0x0001FC00; |
362 | PGSR3 = 0x00001F81; | 448 | PGSR3 = 0x00001F81; |
363 | PWER = 0xC0000002; | 449 | PWER = 0xC0000002; |
364 | PRER = 0x00000002; | 450 | PRER = 0x00000002; |
365 | PFER = 0x00000002; | 451 | PFER = 0x00000002; |
366 | /* for use I SRAM as framebuffer. */ | 452 | /* for use I SRAM as framebuffer. */ |
367 | PSLR |= 0xF04; | 453 | PSLR |= 0xF04; |
368 | PCFR = 0x66; | 454 | PCFR = 0x66; |
369 | /* For Keypad wakeup. */ | 455 | /* For Keypad wakeup. */ |
370 | KPC &=~KPC_ASACT; | 456 | KPC &=~KPC_ASACT; |
371 | KPC |=KPC_AS; | 457 | KPC |=KPC_AS; |
372 | PKWR = 0x000FD000; | 458 | PKWR = 0x000FD000; |
373 | /* Need read PKWR back after set it. */ | 459 | /* Need read PKWR back after set it. */ |
374 | PKWR; | 460 | PKWR; |
375 | } | 461 | } |
376 | 462 | ||
377 | MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") | 463 | MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") |
378 | /* Maintainer: MontaVista Software Inc. */ | 464 | /* Maintainer: MontaVista Software Inc. */ |
379 | .phys_ram = 0xa0000000, | 465 | .phys_ram = 0xa0000000, |
380 | .phys_io = 0x40000000, | 466 | .phys_io = 0x40000000, |
381 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | 467 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, |
382 | .map_io = mainstone_map_io, | 468 | .map_io = mainstone_map_io, |
383 | .init_irq = mainstone_init_irq, | 469 | .init_irq = mainstone_init_irq, |
384 | .timer = &pxa_timer, | 470 | .timer = &pxa_timer, |
385 | .init_machine = mainstone_init, | 471 | .init_machine = mainstone_init, |
386 | MACHINE_END | 472 | MACHINE_END |