Commit 76832c28de4fabbf32fe1e5a25194724a3430070
Committed by
Linus Torvalds
1 parent
c0e7dcc8bc
Exists in
master
and in
7 other branches
[PATCH] shrink mmtimer memory size
This greatly reduces the amount of memory used by mmtimer on smaller machines with large values of MAX_COMPACT_NODES. Signed-off-by: Dimitri Sivanich <sivanich@sgi.com> Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Showing 1 changed file with 57 additions and 33 deletions Inline Diff
drivers/char/mmtimer.c
1 | /* | 1 | /* |
2 | * Intel Multimedia Timer device implementation for SGI SN platforms. | 2 | * Timer device implementation for SGI SN platforms. |
3 | * | 3 | * |
4 | * This file is subject to the terms and conditions of the GNU General Public | 4 | * This file is subject to the terms and conditions of the GNU General Public |
5 | * License. See the file "COPYING" in the main directory of this archive | 5 | * License. See the file "COPYING" in the main directory of this archive |
6 | * for more details. | 6 | * for more details. |
7 | * | 7 | * |
8 | * Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved. | 8 | * Copyright (c) 2001-2006 Silicon Graphics, Inc. All rights reserved. |
9 | * | 9 | * |
10 | * This driver exports an API that should be supportable by any HPET or IA-PC | 10 | * This driver exports an API that should be supportable by any HPET or IA-PC |
11 | * multimedia timer. The code below is currently specific to the SGI Altix | 11 | * multimedia timer. The code below is currently specific to the SGI Altix |
12 | * SHub RTC, however. | 12 | * SHub RTC, however. |
13 | * | 13 | * |
14 | * 11/01/01 - jbarnes - initial revision | 14 | * 11/01/01 - jbarnes - initial revision |
15 | * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion | 15 | * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion |
16 | * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE | 16 | * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE |
17 | * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt | 17 | * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt |
18 | * support via the posix timer interface | 18 | * support via the posix timer interface |
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <linux/types.h> | 21 | #include <linux/types.h> |
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/ioctl.h> | 23 | #include <linux/ioctl.h> |
24 | #include <linux/module.h> | 24 | #include <linux/module.h> |
25 | #include <linux/init.h> | 25 | #include <linux/init.h> |
26 | #include <linux/errno.h> | 26 | #include <linux/errno.h> |
27 | #include <linux/mm.h> | 27 | #include <linux/mm.h> |
28 | #include <linux/devfs_fs_kernel.h> | 28 | #include <linux/devfs_fs_kernel.h> |
29 | #include <linux/mmtimer.h> | 29 | #include <linux/mmtimer.h> |
30 | #include <linux/miscdevice.h> | 30 | #include <linux/miscdevice.h> |
31 | #include <linux/posix-timers.h> | 31 | #include <linux/posix-timers.h> |
32 | #include <linux/interrupt.h> | 32 | #include <linux/interrupt.h> |
33 | 33 | ||
34 | #include <asm/uaccess.h> | 34 | #include <asm/uaccess.h> |
35 | #include <asm/sn/addrs.h> | 35 | #include <asm/sn/addrs.h> |
36 | #include <asm/sn/intr.h> | 36 | #include <asm/sn/intr.h> |
37 | #include <asm/sn/shub_mmr.h> | 37 | #include <asm/sn/shub_mmr.h> |
38 | #include <asm/sn/nodepda.h> | 38 | #include <asm/sn/nodepda.h> |
39 | #include <asm/sn/shubio.h> | 39 | #include <asm/sn/shubio.h> |
40 | 40 | ||
41 | MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>"); | 41 | MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>"); |
42 | MODULE_DESCRIPTION("SGI Altix RTC Timer"); | 42 | MODULE_DESCRIPTION("SGI Altix RTC Timer"); |
43 | MODULE_LICENSE("GPL"); | 43 | MODULE_LICENSE("GPL"); |
44 | 44 | ||
45 | /* name of the device, usually in /dev */ | 45 | /* name of the device, usually in /dev */ |
46 | #define MMTIMER_NAME "mmtimer" | 46 | #define MMTIMER_NAME "mmtimer" |
47 | #define MMTIMER_DESC "SGI Altix RTC Timer" | 47 | #define MMTIMER_DESC "SGI Altix RTC Timer" |
48 | #define MMTIMER_VERSION "2.0" | 48 | #define MMTIMER_VERSION "2.1" |
49 | 49 | ||
50 | #define RTC_BITS 55 /* 55 bits for this implementation */ | 50 | #define RTC_BITS 55 /* 55 bits for this implementation */ |
51 | 51 | ||
52 | extern unsigned long sn_rtc_cycles_per_second; | 52 | extern unsigned long sn_rtc_cycles_per_second; |
53 | 53 | ||
54 | #define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC)) | 54 | #define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC)) |
55 | 55 | ||
56 | #define rtc_time() (*RTC_COUNTER_ADDR) | 56 | #define rtc_time() (*RTC_COUNTER_ADDR) |
57 | 57 | ||
58 | static int mmtimer_ioctl(struct inode *inode, struct file *file, | 58 | static int mmtimer_ioctl(struct inode *inode, struct file *file, |
59 | unsigned int cmd, unsigned long arg); | 59 | unsigned int cmd, unsigned long arg); |
60 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma); | 60 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma); |
61 | 61 | ||
62 | /* | 62 | /* |
63 | * Period in femtoseconds (10^-15 s) | 63 | * Period in femtoseconds (10^-15 s) |
64 | */ | 64 | */ |
65 | static unsigned long mmtimer_femtoperiod = 0; | 65 | static unsigned long mmtimer_femtoperiod = 0; |
66 | 66 | ||
67 | static struct file_operations mmtimer_fops = { | 67 | static struct file_operations mmtimer_fops = { |
68 | .owner = THIS_MODULE, | 68 | .owner = THIS_MODULE, |
69 | .mmap = mmtimer_mmap, | 69 | .mmap = mmtimer_mmap, |
70 | .ioctl = mmtimer_ioctl, | 70 | .ioctl = mmtimer_ioctl, |
71 | }; | 71 | }; |
72 | 72 | ||
73 | /* | 73 | /* |
74 | * We only have comparison registers RTC1-4 currently available per | 74 | * We only have comparison registers RTC1-4 currently available per |
75 | * node. RTC0 is used by SAL. | 75 | * node. RTC0 is used by SAL. |
76 | */ | 76 | */ |
77 | #define NUM_COMPARATORS 3 | 77 | #define NUM_COMPARATORS 3 |
78 | /* Check for an RTC interrupt pending */ | 78 | /* Check for an RTC interrupt pending */ |
79 | static int inline mmtimer_int_pending(int comparator) | 79 | static int inline mmtimer_int_pending(int comparator) |
80 | { | 80 | { |
81 | if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) & | 81 | if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) & |
82 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator) | 82 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator) |
83 | return 1; | 83 | return 1; |
84 | else | 84 | else |
85 | return 0; | 85 | return 0; |
86 | } | 86 | } |
87 | /* Clear the RTC interrupt pending bit */ | 87 | /* Clear the RTC interrupt pending bit */ |
88 | static void inline mmtimer_clr_int_pending(int comparator) | 88 | static void inline mmtimer_clr_int_pending(int comparator) |
89 | { | 89 | { |
90 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), | 90 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), |
91 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator); | 91 | SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator); |
92 | } | 92 | } |
93 | 93 | ||
94 | /* Setup timer on comparator RTC1 */ | 94 | /* Setup timer on comparator RTC1 */ |
95 | static void inline mmtimer_setup_int_0(u64 expires) | 95 | static void inline mmtimer_setup_int_0(u64 expires) |
96 | { | 96 | { |
97 | u64 val; | 97 | u64 val; |
98 | 98 | ||
99 | /* Disable interrupt */ | 99 | /* Disable interrupt */ |
100 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL); | 100 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL); |
101 | 101 | ||
102 | /* Initialize comparator value */ | 102 | /* Initialize comparator value */ |
103 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L); | 103 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L); |
104 | 104 | ||
105 | /* Clear pending bit */ | 105 | /* Clear pending bit */ |
106 | mmtimer_clr_int_pending(0); | 106 | mmtimer_clr_int_pending(0); |
107 | 107 | ||
108 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) | | 108 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) | |
109 | ((u64)cpu_physical_id(smp_processor_id()) << | 109 | ((u64)cpu_physical_id(smp_processor_id()) << |
110 | SH_RTC1_INT_CONFIG_PID_SHFT); | 110 | SH_RTC1_INT_CONFIG_PID_SHFT); |
111 | 111 | ||
112 | /* Set configuration */ | 112 | /* Set configuration */ |
113 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val); | 113 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val); |
114 | 114 | ||
115 | /* Enable RTC interrupts */ | 115 | /* Enable RTC interrupts */ |
116 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL); | 116 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL); |
117 | 117 | ||
118 | /* Initialize comparator value */ | 118 | /* Initialize comparator value */ |
119 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires); | 119 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires); |
120 | 120 | ||
121 | 121 | ||
122 | } | 122 | } |
123 | 123 | ||
124 | /* Setup timer on comparator RTC2 */ | 124 | /* Setup timer on comparator RTC2 */ |
125 | static void inline mmtimer_setup_int_1(u64 expires) | 125 | static void inline mmtimer_setup_int_1(u64 expires) |
126 | { | 126 | { |
127 | u64 val; | 127 | u64 val; |
128 | 128 | ||
129 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL); | 129 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL); |
130 | 130 | ||
131 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L); | 131 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L); |
132 | 132 | ||
133 | mmtimer_clr_int_pending(1); | 133 | mmtimer_clr_int_pending(1); |
134 | 134 | ||
135 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) | | 135 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) | |
136 | ((u64)cpu_physical_id(smp_processor_id()) << | 136 | ((u64)cpu_physical_id(smp_processor_id()) << |
137 | SH_RTC2_INT_CONFIG_PID_SHFT); | 137 | SH_RTC2_INT_CONFIG_PID_SHFT); |
138 | 138 | ||
139 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val); | 139 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val); |
140 | 140 | ||
141 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL); | 141 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL); |
142 | 142 | ||
143 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires); | 143 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires); |
144 | } | 144 | } |
145 | 145 | ||
146 | /* Setup timer on comparator RTC3 */ | 146 | /* Setup timer on comparator RTC3 */ |
147 | static void inline mmtimer_setup_int_2(u64 expires) | 147 | static void inline mmtimer_setup_int_2(u64 expires) |
148 | { | 148 | { |
149 | u64 val; | 149 | u64 val; |
150 | 150 | ||
151 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL); | 151 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL); |
152 | 152 | ||
153 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L); | 153 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L); |
154 | 154 | ||
155 | mmtimer_clr_int_pending(2); | 155 | mmtimer_clr_int_pending(2); |
156 | 156 | ||
157 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) | | 157 | val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) | |
158 | ((u64)cpu_physical_id(smp_processor_id()) << | 158 | ((u64)cpu_physical_id(smp_processor_id()) << |
159 | SH_RTC3_INT_CONFIG_PID_SHFT); | 159 | SH_RTC3_INT_CONFIG_PID_SHFT); |
160 | 160 | ||
161 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val); | 161 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val); |
162 | 162 | ||
163 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL); | 163 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL); |
164 | 164 | ||
165 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires); | 165 | HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires); |
166 | } | 166 | } |
167 | 167 | ||
168 | /* | 168 | /* |
169 | * This function must be called with interrupts disabled and preemption off | 169 | * This function must be called with interrupts disabled and preemption off |
170 | * in order to insure that the setup succeeds in a deterministic time frame. | 170 | * in order to insure that the setup succeeds in a deterministic time frame. |
171 | * It will check if the interrupt setup succeeded. | 171 | * It will check if the interrupt setup succeeded. |
172 | */ | 172 | */ |
173 | static int inline mmtimer_setup(int comparator, unsigned long expires) | 173 | static int inline mmtimer_setup(int comparator, unsigned long expires) |
174 | { | 174 | { |
175 | 175 | ||
176 | switch (comparator) { | 176 | switch (comparator) { |
177 | case 0: | 177 | case 0: |
178 | mmtimer_setup_int_0(expires); | 178 | mmtimer_setup_int_0(expires); |
179 | break; | 179 | break; |
180 | case 1: | 180 | case 1: |
181 | mmtimer_setup_int_1(expires); | 181 | mmtimer_setup_int_1(expires); |
182 | break; | 182 | break; |
183 | case 2: | 183 | case 2: |
184 | mmtimer_setup_int_2(expires); | 184 | mmtimer_setup_int_2(expires); |
185 | break; | 185 | break; |
186 | } | 186 | } |
187 | /* We might've missed our expiration time */ | 187 | /* We might've missed our expiration time */ |
188 | if (rtc_time() < expires) | 188 | if (rtc_time() < expires) |
189 | return 1; | 189 | return 1; |
190 | 190 | ||
191 | /* | 191 | /* |
192 | * If an interrupt is already pending then its okay | 192 | * If an interrupt is already pending then its okay |
193 | * if not then we failed | 193 | * if not then we failed |
194 | */ | 194 | */ |
195 | return mmtimer_int_pending(comparator); | 195 | return mmtimer_int_pending(comparator); |
196 | } | 196 | } |
197 | 197 | ||
198 | static int inline mmtimer_disable_int(long nasid, int comparator) | 198 | static int inline mmtimer_disable_int(long nasid, int comparator) |
199 | { | 199 | { |
200 | switch (comparator) { | 200 | switch (comparator) { |
201 | case 0: | 201 | case 0: |
202 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), | 202 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), |
203 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL); | 203 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL); |
204 | break; | 204 | break; |
205 | case 1: | 205 | case 1: |
206 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), | 206 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), |
207 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL); | 207 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL); |
208 | break; | 208 | break; |
209 | case 2: | 209 | case 2: |
210 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), | 210 | nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), |
211 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL); | 211 | 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL); |
212 | break; | 212 | break; |
213 | default: | 213 | default: |
214 | return -EFAULT; | 214 | return -EFAULT; |
215 | } | 215 | } |
216 | return 0; | 216 | return 0; |
217 | } | 217 | } |
218 | 218 | ||
219 | #define TIMER_OFF 0xbadcabLL | 219 | #define TIMER_OFF 0xbadcabLL |
220 | 220 | ||
221 | /* There is one of these for each comparator */ | 221 | /* There is one of these for each comparator */ |
222 | typedef struct mmtimer { | 222 | typedef struct mmtimer { |
223 | spinlock_t lock ____cacheline_aligned; | 223 | spinlock_t lock ____cacheline_aligned; |
224 | struct k_itimer *timer; | 224 | struct k_itimer *timer; |
225 | int i; | 225 | int i; |
226 | int cpu; | 226 | int cpu; |
227 | struct tasklet_struct tasklet; | 227 | struct tasklet_struct tasklet; |
228 | } mmtimer_t; | 228 | } mmtimer_t; |
229 | 229 | ||
230 | /* | 230 | static mmtimer_t ** timers; |
231 | * Total number of comparators is comparators/node * MAX nodes/running kernel | ||
232 | */ | ||
233 | static mmtimer_t timers[NUM_COMPARATORS*MAX_COMPACT_NODES]; | ||
234 | 231 | ||
235 | /** | 232 | /** |
236 | * mmtimer_ioctl - ioctl interface for /dev/mmtimer | 233 | * mmtimer_ioctl - ioctl interface for /dev/mmtimer |
237 | * @inode: inode of the device | 234 | * @inode: inode of the device |
238 | * @file: file structure for the device | 235 | * @file: file structure for the device |
239 | * @cmd: command to execute | 236 | * @cmd: command to execute |
240 | * @arg: optional argument to command | 237 | * @arg: optional argument to command |
241 | * | 238 | * |
242 | * Executes the command specified by @cmd. Returns 0 for success, < 0 for | 239 | * Executes the command specified by @cmd. Returns 0 for success, < 0 for |
243 | * failure. | 240 | * failure. |
244 | * | 241 | * |
245 | * Valid commands: | 242 | * Valid commands: |
246 | * | 243 | * |
247 | * %MMTIMER_GETOFFSET - Should return the offset (relative to the start | 244 | * %MMTIMER_GETOFFSET - Should return the offset (relative to the start |
248 | * of the page where the registers are mapped) for the counter in question. | 245 | * of the page where the registers are mapped) for the counter in question. |
249 | * | 246 | * |
250 | * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15) | 247 | * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15) |
251 | * seconds | 248 | * seconds |
252 | * | 249 | * |
253 | * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address | 250 | * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address |
254 | * specified by @arg | 251 | * specified by @arg |
255 | * | 252 | * |
256 | * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter | 253 | * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter |
257 | * | 254 | * |
258 | * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace | 255 | * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace |
259 | * | 256 | * |
260 | * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it | 257 | * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it |
261 | * in the address specified by @arg. | 258 | * in the address specified by @arg. |
262 | */ | 259 | */ |
263 | static int mmtimer_ioctl(struct inode *inode, struct file *file, | 260 | static int mmtimer_ioctl(struct inode *inode, struct file *file, |
264 | unsigned int cmd, unsigned long arg) | 261 | unsigned int cmd, unsigned long arg) |
265 | { | 262 | { |
266 | int ret = 0; | 263 | int ret = 0; |
267 | 264 | ||
268 | switch (cmd) { | 265 | switch (cmd) { |
269 | case MMTIMER_GETOFFSET: /* offset of the counter */ | 266 | case MMTIMER_GETOFFSET: /* offset of the counter */ |
270 | /* | 267 | /* |
271 | * SN RTC registers are on their own 64k page | 268 | * SN RTC registers are on their own 64k page |
272 | */ | 269 | */ |
273 | if(PAGE_SIZE <= (1 << 16)) | 270 | if(PAGE_SIZE <= (1 << 16)) |
274 | ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8; | 271 | ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8; |
275 | else | 272 | else |
276 | ret = -ENOSYS; | 273 | ret = -ENOSYS; |
277 | break; | 274 | break; |
278 | 275 | ||
279 | case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */ | 276 | case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */ |
280 | if(copy_to_user((unsigned long __user *)arg, | 277 | if(copy_to_user((unsigned long __user *)arg, |
281 | &mmtimer_femtoperiod, sizeof(unsigned long))) | 278 | &mmtimer_femtoperiod, sizeof(unsigned long))) |
282 | return -EFAULT; | 279 | return -EFAULT; |
283 | break; | 280 | break; |
284 | 281 | ||
285 | case MMTIMER_GETFREQ: /* frequency in Hz */ | 282 | case MMTIMER_GETFREQ: /* frequency in Hz */ |
286 | if(copy_to_user((unsigned long __user *)arg, | 283 | if(copy_to_user((unsigned long __user *)arg, |
287 | &sn_rtc_cycles_per_second, | 284 | &sn_rtc_cycles_per_second, |
288 | sizeof(unsigned long))) | 285 | sizeof(unsigned long))) |
289 | return -EFAULT; | 286 | return -EFAULT; |
290 | ret = 0; | 287 | ret = 0; |
291 | break; | 288 | break; |
292 | 289 | ||
293 | case MMTIMER_GETBITS: /* number of bits in the clock */ | 290 | case MMTIMER_GETBITS: /* number of bits in the clock */ |
294 | ret = RTC_BITS; | 291 | ret = RTC_BITS; |
295 | break; | 292 | break; |
296 | 293 | ||
297 | case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */ | 294 | case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */ |
298 | ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0; | 295 | ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0; |
299 | break; | 296 | break; |
300 | 297 | ||
301 | case MMTIMER_GETCOUNTER: | 298 | case MMTIMER_GETCOUNTER: |
302 | if(copy_to_user((unsigned long __user *)arg, | 299 | if(copy_to_user((unsigned long __user *)arg, |
303 | RTC_COUNTER_ADDR, sizeof(unsigned long))) | 300 | RTC_COUNTER_ADDR, sizeof(unsigned long))) |
304 | return -EFAULT; | 301 | return -EFAULT; |
305 | break; | 302 | break; |
306 | default: | 303 | default: |
307 | ret = -ENOSYS; | 304 | ret = -ENOSYS; |
308 | break; | 305 | break; |
309 | } | 306 | } |
310 | 307 | ||
311 | return ret; | 308 | return ret; |
312 | } | 309 | } |
313 | 310 | ||
314 | /** | 311 | /** |
315 | * mmtimer_mmap - maps the clock's registers into userspace | 312 | * mmtimer_mmap - maps the clock's registers into userspace |
316 | * @file: file structure for the device | 313 | * @file: file structure for the device |
317 | * @vma: VMA to map the registers into | 314 | * @vma: VMA to map the registers into |
318 | * | 315 | * |
319 | * Calls remap_pfn_range() to map the clock's registers into | 316 | * Calls remap_pfn_range() to map the clock's registers into |
320 | * the calling process' address space. | 317 | * the calling process' address space. |
321 | */ | 318 | */ |
322 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma) | 319 | static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma) |
323 | { | 320 | { |
324 | unsigned long mmtimer_addr; | 321 | unsigned long mmtimer_addr; |
325 | 322 | ||
326 | if (vma->vm_end - vma->vm_start != PAGE_SIZE) | 323 | if (vma->vm_end - vma->vm_start != PAGE_SIZE) |
327 | return -EINVAL; | 324 | return -EINVAL; |
328 | 325 | ||
329 | if (vma->vm_flags & VM_WRITE) | 326 | if (vma->vm_flags & VM_WRITE) |
330 | return -EPERM; | 327 | return -EPERM; |
331 | 328 | ||
332 | if (PAGE_SIZE > (1 << 16)) | 329 | if (PAGE_SIZE > (1 << 16)) |
333 | return -ENOSYS; | 330 | return -ENOSYS; |
334 | 331 | ||
335 | vma->vm_flags |= (VM_IO | VM_SHM | VM_LOCKED ); | 332 | vma->vm_flags |= (VM_IO | VM_SHM | VM_LOCKED ); |
336 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | 333 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
337 | 334 | ||
338 | mmtimer_addr = __pa(RTC_COUNTER_ADDR); | 335 | mmtimer_addr = __pa(RTC_COUNTER_ADDR); |
339 | mmtimer_addr &= ~(PAGE_SIZE - 1); | 336 | mmtimer_addr &= ~(PAGE_SIZE - 1); |
340 | mmtimer_addr &= 0xfffffffffffffffUL; | 337 | mmtimer_addr &= 0xfffffffffffffffUL; |
341 | 338 | ||
342 | if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT, | 339 | if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT, |
343 | PAGE_SIZE, vma->vm_page_prot)) { | 340 | PAGE_SIZE, vma->vm_page_prot)) { |
344 | printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n"); | 341 | printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n"); |
345 | return -EAGAIN; | 342 | return -EAGAIN; |
346 | } | 343 | } |
347 | 344 | ||
348 | return 0; | 345 | return 0; |
349 | } | 346 | } |
350 | 347 | ||
351 | static struct miscdevice mmtimer_miscdev = { | 348 | static struct miscdevice mmtimer_miscdev = { |
352 | SGI_MMTIMER, | 349 | SGI_MMTIMER, |
353 | MMTIMER_NAME, | 350 | MMTIMER_NAME, |
354 | &mmtimer_fops | 351 | &mmtimer_fops |
355 | }; | 352 | }; |
356 | 353 | ||
357 | static struct timespec sgi_clock_offset; | 354 | static struct timespec sgi_clock_offset; |
358 | static int sgi_clock_period; | 355 | static int sgi_clock_period; |
359 | 356 | ||
360 | /* | 357 | /* |
361 | * Posix Timer Interface | 358 | * Posix Timer Interface |
362 | */ | 359 | */ |
363 | 360 | ||
364 | static struct timespec sgi_clock_offset; | 361 | static struct timespec sgi_clock_offset; |
365 | static int sgi_clock_period; | 362 | static int sgi_clock_period; |
366 | 363 | ||
367 | static int sgi_clock_get(clockid_t clockid, struct timespec *tp) | 364 | static int sgi_clock_get(clockid_t clockid, struct timespec *tp) |
368 | { | 365 | { |
369 | u64 nsec; | 366 | u64 nsec; |
370 | 367 | ||
371 | nsec = rtc_time() * sgi_clock_period | 368 | nsec = rtc_time() * sgi_clock_period |
372 | + sgi_clock_offset.tv_nsec; | 369 | + sgi_clock_offset.tv_nsec; |
373 | tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec) | 370 | tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec) |
374 | + sgi_clock_offset.tv_sec; | 371 | + sgi_clock_offset.tv_sec; |
375 | return 0; | 372 | return 0; |
376 | }; | 373 | }; |
377 | 374 | ||
378 | static int sgi_clock_set(clockid_t clockid, struct timespec *tp) | 375 | static int sgi_clock_set(clockid_t clockid, struct timespec *tp) |
379 | { | 376 | { |
380 | 377 | ||
381 | u64 nsec; | 378 | u64 nsec; |
382 | u64 rem; | 379 | u64 rem; |
383 | 380 | ||
384 | nsec = rtc_time() * sgi_clock_period; | 381 | nsec = rtc_time() * sgi_clock_period; |
385 | 382 | ||
386 | sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem); | 383 | sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem); |
387 | 384 | ||
388 | if (rem <= tp->tv_nsec) | 385 | if (rem <= tp->tv_nsec) |
389 | sgi_clock_offset.tv_nsec = tp->tv_sec - rem; | 386 | sgi_clock_offset.tv_nsec = tp->tv_sec - rem; |
390 | else { | 387 | else { |
391 | sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem; | 388 | sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem; |
392 | sgi_clock_offset.tv_sec--; | 389 | sgi_clock_offset.tv_sec--; |
393 | } | 390 | } |
394 | return 0; | 391 | return 0; |
395 | } | 392 | } |
396 | 393 | ||
397 | /* | 394 | /* |
398 | * Schedule the next periodic interrupt. This function will attempt | 395 | * Schedule the next periodic interrupt. This function will attempt |
399 | * to schedule a periodic interrupt later if necessary. If the scheduling | 396 | * to schedule a periodic interrupt later if necessary. If the scheduling |
400 | * of an interrupt fails then the time to skip is lengthened | 397 | * of an interrupt fails then the time to skip is lengthened |
401 | * exponentially in order to ensure that the next interrupt | 398 | * exponentially in order to ensure that the next interrupt |
402 | * can be properly scheduled.. | 399 | * can be properly scheduled.. |
403 | */ | 400 | */ |
404 | static int inline reschedule_periodic_timer(mmtimer_t *x) | 401 | static int inline reschedule_periodic_timer(mmtimer_t *x) |
405 | { | 402 | { |
406 | int n; | 403 | int n; |
407 | struct k_itimer *t = x->timer; | 404 | struct k_itimer *t = x->timer; |
408 | 405 | ||
409 | t->it.mmtimer.clock = x->i; | 406 | t->it.mmtimer.clock = x->i; |
410 | t->it_overrun--; | 407 | t->it_overrun--; |
411 | 408 | ||
412 | n = 0; | 409 | n = 0; |
413 | do { | 410 | do { |
414 | 411 | ||
415 | t->it.mmtimer.expires += t->it.mmtimer.incr << n; | 412 | t->it.mmtimer.expires += t->it.mmtimer.incr << n; |
416 | t->it_overrun += 1 << n; | 413 | t->it_overrun += 1 << n; |
417 | n++; | 414 | n++; |
418 | if (n > 20) | 415 | if (n > 20) |
419 | return 1; | 416 | return 1; |
420 | 417 | ||
421 | } while (!mmtimer_setup(x->i, t->it.mmtimer.expires)); | 418 | } while (!mmtimer_setup(x->i, t->it.mmtimer.expires)); |
422 | 419 | ||
423 | return 0; | 420 | return 0; |
424 | } | 421 | } |
425 | 422 | ||
426 | /** | 423 | /** |
427 | * mmtimer_interrupt - timer interrupt handler | 424 | * mmtimer_interrupt - timer interrupt handler |
428 | * @irq: irq received | 425 | * @irq: irq received |
429 | * @dev_id: device the irq came from | 426 | * @dev_id: device the irq came from |
430 | * @regs: register state upon receipt of the interrupt | 427 | * @regs: register state upon receipt of the interrupt |
431 | * | 428 | * |
432 | * Called when one of the comarators matches the counter, This | 429 | * Called when one of the comarators matches the counter, This |
433 | * routine will send signals to processes that have requested | 430 | * routine will send signals to processes that have requested |
434 | * them. | 431 | * them. |
435 | * | 432 | * |
436 | * This interrupt is run in an interrupt context | 433 | * This interrupt is run in an interrupt context |
437 | * by the SHUB. It is therefore safe to locally access SHub | 434 | * by the SHUB. It is therefore safe to locally access SHub |
438 | * registers. | 435 | * registers. |
439 | */ | 436 | */ |
440 | static irqreturn_t | 437 | static irqreturn_t |
441 | mmtimer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 438 | mmtimer_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
442 | { | 439 | { |
443 | int i; | 440 | int i; |
444 | mmtimer_t *base = timers + cpu_to_node(smp_processor_id()) * | ||
445 | NUM_COMPARATORS; | ||
446 | unsigned long expires = 0; | 441 | unsigned long expires = 0; |
447 | int result = IRQ_NONE; | 442 | int result = IRQ_NONE; |
443 | unsigned indx = cpu_to_node(smp_processor_id()); | ||
448 | 444 | ||
449 | /* | 445 | /* |
450 | * Do this once for each comparison register | 446 | * Do this once for each comparison register |
451 | */ | 447 | */ |
452 | for (i = 0; i < NUM_COMPARATORS; i++) { | 448 | for (i = 0; i < NUM_COMPARATORS; i++) { |
449 | mmtimer_t *base = timers[indx] + i; | ||
453 | /* Make sure this doesn't get reused before tasklet_sched */ | 450 | /* Make sure this doesn't get reused before tasklet_sched */ |
454 | spin_lock(&base[i].lock); | 451 | spin_lock(&base->lock); |
455 | if (base[i].cpu == smp_processor_id()) { | 452 | if (base->cpu == smp_processor_id()) { |
456 | if (base[i].timer) | 453 | if (base->timer) |
457 | expires = base[i].timer->it.mmtimer.expires; | 454 | expires = base->timer->it.mmtimer.expires; |
458 | /* expires test won't work with shared irqs */ | 455 | /* expires test won't work with shared irqs */ |
459 | if ((mmtimer_int_pending(i) > 0) || | 456 | if ((mmtimer_int_pending(i) > 0) || |
460 | (expires && (expires < rtc_time()))) { | 457 | (expires && (expires < rtc_time()))) { |
461 | mmtimer_clr_int_pending(i); | 458 | mmtimer_clr_int_pending(i); |
462 | tasklet_schedule(&base[i].tasklet); | 459 | tasklet_schedule(&base->tasklet); |
463 | result = IRQ_HANDLED; | 460 | result = IRQ_HANDLED; |
464 | } | 461 | } |
465 | } | 462 | } |
466 | spin_unlock(&base[i].lock); | 463 | spin_unlock(&base->lock); |
467 | expires = 0; | 464 | expires = 0; |
468 | } | 465 | } |
469 | return result; | 466 | return result; |
470 | } | 467 | } |
471 | 468 | ||
472 | void mmtimer_tasklet(unsigned long data) { | 469 | void mmtimer_tasklet(unsigned long data) { |
473 | mmtimer_t *x = (mmtimer_t *)data; | 470 | mmtimer_t *x = (mmtimer_t *)data; |
474 | struct k_itimer *t = x->timer; | 471 | struct k_itimer *t = x->timer; |
475 | unsigned long flags; | 472 | unsigned long flags; |
476 | 473 | ||
477 | if (t == NULL) | 474 | if (t == NULL) |
478 | return; | 475 | return; |
479 | 476 | ||
480 | /* Send signal and deal with periodic signals */ | 477 | /* Send signal and deal with periodic signals */ |
481 | spin_lock_irqsave(&t->it_lock, flags); | 478 | spin_lock_irqsave(&t->it_lock, flags); |
482 | spin_lock(&x->lock); | 479 | spin_lock(&x->lock); |
483 | /* If timer was deleted between interrupt and here, leave */ | 480 | /* If timer was deleted between interrupt and here, leave */ |
484 | if (t != x->timer) | 481 | if (t != x->timer) |
485 | goto out; | 482 | goto out; |
486 | t->it_overrun = 0; | 483 | t->it_overrun = 0; |
487 | 484 | ||
488 | if (posix_timer_event(t, 0) != 0) { | 485 | if (posix_timer_event(t, 0) != 0) { |
489 | 486 | ||
490 | // printk(KERN_WARNING "mmtimer: cannot deliver signal.\n"); | 487 | // printk(KERN_WARNING "mmtimer: cannot deliver signal.\n"); |
491 | 488 | ||
492 | t->it_overrun++; | 489 | t->it_overrun++; |
493 | } | 490 | } |
494 | if(t->it.mmtimer.incr) { | 491 | if(t->it.mmtimer.incr) { |
495 | /* Periodic timer */ | 492 | /* Periodic timer */ |
496 | if (reschedule_periodic_timer(x)) { | 493 | if (reschedule_periodic_timer(x)) { |
497 | printk(KERN_WARNING "mmtimer: unable to reschedule\n"); | 494 | printk(KERN_WARNING "mmtimer: unable to reschedule\n"); |
498 | x->timer = NULL; | 495 | x->timer = NULL; |
499 | } | 496 | } |
500 | } else { | 497 | } else { |
501 | /* Ensure we don't false trigger in mmtimer_interrupt */ | 498 | /* Ensure we don't false trigger in mmtimer_interrupt */ |
502 | t->it.mmtimer.expires = 0; | 499 | t->it.mmtimer.expires = 0; |
503 | } | 500 | } |
504 | t->it_overrun_last = t->it_overrun; | 501 | t->it_overrun_last = t->it_overrun; |
505 | out: | 502 | out: |
506 | spin_unlock(&x->lock); | 503 | spin_unlock(&x->lock); |
507 | spin_unlock_irqrestore(&t->it_lock, flags); | 504 | spin_unlock_irqrestore(&t->it_lock, flags); |
508 | } | 505 | } |
509 | 506 | ||
510 | static int sgi_timer_create(struct k_itimer *timer) | 507 | static int sgi_timer_create(struct k_itimer *timer) |
511 | { | 508 | { |
512 | /* Insure that a newly created timer is off */ | 509 | /* Insure that a newly created timer is off */ |
513 | timer->it.mmtimer.clock = TIMER_OFF; | 510 | timer->it.mmtimer.clock = TIMER_OFF; |
514 | return 0; | 511 | return 0; |
515 | } | 512 | } |
516 | 513 | ||
517 | /* This does not really delete a timer. It just insures | 514 | /* This does not really delete a timer. It just insures |
518 | * that the timer is not active | 515 | * that the timer is not active |
519 | * | 516 | * |
520 | * Assumption: it_lock is already held with irq's disabled | 517 | * Assumption: it_lock is already held with irq's disabled |
521 | */ | 518 | */ |
522 | static int sgi_timer_del(struct k_itimer *timr) | 519 | static int sgi_timer_del(struct k_itimer *timr) |
523 | { | 520 | { |
524 | int i = timr->it.mmtimer.clock; | 521 | int i = timr->it.mmtimer.clock; |
525 | cnodeid_t nodeid = timr->it.mmtimer.node; | 522 | cnodeid_t nodeid = timr->it.mmtimer.node; |
526 | mmtimer_t *t = timers + nodeid * NUM_COMPARATORS +i; | 523 | mmtimer_t *t = timers[nodeid] + i; |
527 | unsigned long irqflags; | 524 | unsigned long irqflags; |
528 | 525 | ||
529 | if (i != TIMER_OFF) { | 526 | if (i != TIMER_OFF) { |
530 | spin_lock_irqsave(&t->lock, irqflags); | 527 | spin_lock_irqsave(&t->lock, irqflags); |
531 | mmtimer_disable_int(cnodeid_to_nasid(nodeid),i); | 528 | mmtimer_disable_int(cnodeid_to_nasid(nodeid),i); |
532 | t->timer = NULL; | 529 | t->timer = NULL; |
533 | timr->it.mmtimer.clock = TIMER_OFF; | 530 | timr->it.mmtimer.clock = TIMER_OFF; |
534 | timr->it.mmtimer.expires = 0; | 531 | timr->it.mmtimer.expires = 0; |
535 | spin_unlock_irqrestore(&t->lock, irqflags); | 532 | spin_unlock_irqrestore(&t->lock, irqflags); |
536 | } | 533 | } |
537 | return 0; | 534 | return 0; |
538 | } | 535 | } |
539 | 536 | ||
540 | #define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC) | 537 | #define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC) |
541 | #define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec) | 538 | #define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec) |
542 | 539 | ||
543 | /* Assumption: it_lock is already held with irq's disabled */ | 540 | /* Assumption: it_lock is already held with irq's disabled */ |
544 | static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting) | 541 | static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting) |
545 | { | 542 | { |
546 | 543 | ||
547 | if (timr->it.mmtimer.clock == TIMER_OFF) { | 544 | if (timr->it.mmtimer.clock == TIMER_OFF) { |
548 | cur_setting->it_interval.tv_nsec = 0; | 545 | cur_setting->it_interval.tv_nsec = 0; |
549 | cur_setting->it_interval.tv_sec = 0; | 546 | cur_setting->it_interval.tv_sec = 0; |
550 | cur_setting->it_value.tv_nsec = 0; | 547 | cur_setting->it_value.tv_nsec = 0; |
551 | cur_setting->it_value.tv_sec =0; | 548 | cur_setting->it_value.tv_sec =0; |
552 | return; | 549 | return; |
553 | } | 550 | } |
554 | 551 | ||
555 | ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period); | 552 | ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period); |
556 | ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period); | 553 | ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period); |
557 | return; | 554 | return; |
558 | } | 555 | } |
559 | 556 | ||
560 | 557 | ||
561 | static int sgi_timer_set(struct k_itimer *timr, int flags, | 558 | static int sgi_timer_set(struct k_itimer *timr, int flags, |
562 | struct itimerspec * new_setting, | 559 | struct itimerspec * new_setting, |
563 | struct itimerspec * old_setting) | 560 | struct itimerspec * old_setting) |
564 | { | 561 | { |
565 | 562 | ||
566 | int i; | 563 | int i; |
567 | unsigned long when, period, irqflags; | 564 | unsigned long when, period, irqflags; |
568 | int err = 0; | 565 | int err = 0; |
569 | cnodeid_t nodeid; | 566 | cnodeid_t nodeid; |
570 | mmtimer_t *base; | 567 | mmtimer_t *base; |
571 | 568 | ||
572 | if (old_setting) | 569 | if (old_setting) |
573 | sgi_timer_get(timr, old_setting); | 570 | sgi_timer_get(timr, old_setting); |
574 | 571 | ||
575 | sgi_timer_del(timr); | 572 | sgi_timer_del(timr); |
576 | when = timespec_to_ns(new_setting->it_value); | 573 | when = timespec_to_ns(new_setting->it_value); |
577 | period = timespec_to_ns(new_setting->it_interval); | 574 | period = timespec_to_ns(new_setting->it_interval); |
578 | 575 | ||
579 | if (when == 0) | 576 | if (when == 0) |
580 | /* Clear timer */ | 577 | /* Clear timer */ |
581 | return 0; | 578 | return 0; |
582 | 579 | ||
583 | if (flags & TIMER_ABSTIME) { | 580 | if (flags & TIMER_ABSTIME) { |
584 | struct timespec n; | 581 | struct timespec n; |
585 | unsigned long now; | 582 | unsigned long now; |
586 | 583 | ||
587 | getnstimeofday(&n); | 584 | getnstimeofday(&n); |
588 | now = timespec_to_ns(n); | 585 | now = timespec_to_ns(n); |
589 | if (when > now) | 586 | if (when > now) |
590 | when -= now; | 587 | when -= now; |
591 | else | 588 | else |
592 | /* Fire the timer immediately */ | 589 | /* Fire the timer immediately */ |
593 | when = 0; | 590 | when = 0; |
594 | } | 591 | } |
595 | 592 | ||
596 | /* | 593 | /* |
597 | * Convert to sgi clock period. Need to keep rtc_time() as near as possible | 594 | * Convert to sgi clock period. Need to keep rtc_time() as near as possible |
598 | * to getnstimeofday() in order to be as faithful as possible to the time | 595 | * to getnstimeofday() in order to be as faithful as possible to the time |
599 | * specified. | 596 | * specified. |
600 | */ | 597 | */ |
601 | when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time(); | 598 | when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time(); |
602 | period = (period + sgi_clock_period - 1) / sgi_clock_period; | 599 | period = (period + sgi_clock_period - 1) / sgi_clock_period; |
603 | 600 | ||
604 | /* | 601 | /* |
605 | * We are allocating a local SHub comparator. If we would be moved to another | 602 | * We are allocating a local SHub comparator. If we would be moved to another |
606 | * cpu then another SHub may be local to us. Prohibit that by switching off | 603 | * cpu then another SHub may be local to us. Prohibit that by switching off |
607 | * preemption. | 604 | * preemption. |
608 | */ | 605 | */ |
609 | preempt_disable(); | 606 | preempt_disable(); |
610 | 607 | ||
611 | nodeid = cpu_to_node(smp_processor_id()); | 608 | nodeid = cpu_to_node(smp_processor_id()); |
612 | base = timers + nodeid * NUM_COMPARATORS; | ||
613 | retry: | 609 | retry: |
614 | /* Don't use an allocated timer, or a deleted one that's pending */ | 610 | /* Don't use an allocated timer, or a deleted one that's pending */ |
615 | for(i = 0; i< NUM_COMPARATORS; i++) { | 611 | for(i = 0; i< NUM_COMPARATORS; i++) { |
616 | if (!base[i].timer && !base[i].tasklet.state) { | 612 | base = timers[nodeid] + i; |
613 | if (!base->timer && !base->tasklet.state) { | ||
617 | break; | 614 | break; |
618 | } | 615 | } |
619 | } | 616 | } |
620 | 617 | ||
621 | if (i == NUM_COMPARATORS) { | 618 | if (i == NUM_COMPARATORS) { |
622 | preempt_enable(); | 619 | preempt_enable(); |
623 | return -EBUSY; | 620 | return -EBUSY; |
624 | } | 621 | } |
625 | 622 | ||
626 | spin_lock_irqsave(&base[i].lock, irqflags); | 623 | spin_lock_irqsave(&base->lock, irqflags); |
627 | 624 | ||
628 | if (base[i].timer || base[i].tasklet.state != 0) { | 625 | if (base->timer || base->tasklet.state != 0) { |
629 | spin_unlock_irqrestore(&base[i].lock, irqflags); | 626 | spin_unlock_irqrestore(&base->lock, irqflags); |
630 | goto retry; | 627 | goto retry; |
631 | } | 628 | } |
632 | base[i].timer = timr; | 629 | base->timer = timr; |
633 | base[i].cpu = smp_processor_id(); | 630 | base->cpu = smp_processor_id(); |
634 | 631 | ||
635 | timr->it.mmtimer.clock = i; | 632 | timr->it.mmtimer.clock = i; |
636 | timr->it.mmtimer.node = nodeid; | 633 | timr->it.mmtimer.node = nodeid; |
637 | timr->it.mmtimer.incr = period; | 634 | timr->it.mmtimer.incr = period; |
638 | timr->it.mmtimer.expires = when; | 635 | timr->it.mmtimer.expires = when; |
639 | 636 | ||
640 | if (period == 0) { | 637 | if (period == 0) { |
641 | if (!mmtimer_setup(i, when)) { | 638 | if (!mmtimer_setup(i, when)) { |
642 | mmtimer_disable_int(-1, i); | 639 | mmtimer_disable_int(-1, i); |
643 | posix_timer_event(timr, 0); | 640 | posix_timer_event(timr, 0); |
644 | timr->it.mmtimer.expires = 0; | 641 | timr->it.mmtimer.expires = 0; |
645 | } | 642 | } |
646 | } else { | 643 | } else { |
647 | timr->it.mmtimer.expires -= period; | 644 | timr->it.mmtimer.expires -= period; |
648 | if (reschedule_periodic_timer(base+i)) | 645 | if (reschedule_periodic_timer(base)) |
649 | err = -EINVAL; | 646 | err = -EINVAL; |
650 | } | 647 | } |
651 | 648 | ||
652 | spin_unlock_irqrestore(&base[i].lock, irqflags); | 649 | spin_unlock_irqrestore(&base->lock, irqflags); |
653 | 650 | ||
654 | preempt_enable(); | 651 | preempt_enable(); |
655 | 652 | ||
656 | return err; | 653 | return err; |
657 | } | 654 | } |
658 | 655 | ||
659 | static struct k_clock sgi_clock = { | 656 | static struct k_clock sgi_clock = { |
660 | .res = 0, | 657 | .res = 0, |
661 | .clock_set = sgi_clock_set, | 658 | .clock_set = sgi_clock_set, |
662 | .clock_get = sgi_clock_get, | 659 | .clock_get = sgi_clock_get, |
663 | .timer_create = sgi_timer_create, | 660 | .timer_create = sgi_timer_create, |
664 | .nsleep = do_posix_clock_nonanosleep, | 661 | .nsleep = do_posix_clock_nonanosleep, |
665 | .timer_set = sgi_timer_set, | 662 | .timer_set = sgi_timer_set, |
666 | .timer_del = sgi_timer_del, | 663 | .timer_del = sgi_timer_del, |
667 | .timer_get = sgi_timer_get | 664 | .timer_get = sgi_timer_get |
668 | }; | 665 | }; |
669 | 666 | ||
670 | /** | 667 | /** |
671 | * mmtimer_init - device initialization routine | 668 | * mmtimer_init - device initialization routine |
672 | * | 669 | * |
673 | * Does initial setup for the mmtimer device. | 670 | * Does initial setup for the mmtimer device. |
674 | */ | 671 | */ |
675 | static int __init mmtimer_init(void) | 672 | static int __init mmtimer_init(void) |
676 | { | 673 | { |
677 | unsigned i; | 674 | unsigned i; |
675 | cnodeid_t node, maxn = -1; | ||
678 | 676 | ||
679 | if (!ia64_platform_is("sn2")) | 677 | if (!ia64_platform_is("sn2")) |
680 | return -1; | 678 | return -1; |
681 | 679 | ||
682 | /* | 680 | /* |
683 | * Sanity check the cycles/sec variable | 681 | * Sanity check the cycles/sec variable |
684 | */ | 682 | */ |
685 | if (sn_rtc_cycles_per_second < 100000) { | 683 | if (sn_rtc_cycles_per_second < 100000) { |
686 | printk(KERN_ERR "%s: unable to determine clock frequency\n", | 684 | printk(KERN_ERR "%s: unable to determine clock frequency\n", |
687 | MMTIMER_NAME); | 685 | MMTIMER_NAME); |
688 | return -1; | 686 | return -1; |
689 | } | 687 | } |
690 | 688 | ||
691 | mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second / | 689 | mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second / |
692 | 2) / sn_rtc_cycles_per_second; | 690 | 2) / sn_rtc_cycles_per_second; |
693 | 691 | ||
694 | for (i=0; i< NUM_COMPARATORS*MAX_COMPACT_NODES; i++) { | ||
695 | spin_lock_init(&timers[i].lock); | ||
696 | timers[i].timer = NULL; | ||
697 | timers[i].cpu = 0; | ||
698 | timers[i].i = i % NUM_COMPARATORS; | ||
699 | tasklet_init(&timers[i].tasklet, mmtimer_tasklet, (unsigned long) (timers+i)); | ||
700 | } | ||
701 | |||
702 | if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, SA_PERCPU_IRQ, MMTIMER_NAME, NULL)) { | 692 | if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, SA_PERCPU_IRQ, MMTIMER_NAME, NULL)) { |
703 | printk(KERN_WARNING "%s: unable to allocate interrupt.", | 693 | printk(KERN_WARNING "%s: unable to allocate interrupt.", |
704 | MMTIMER_NAME); | 694 | MMTIMER_NAME); |
705 | return -1; | 695 | return -1; |
706 | } | 696 | } |
707 | 697 | ||
708 | strcpy(mmtimer_miscdev.devfs_name, MMTIMER_NAME); | 698 | strcpy(mmtimer_miscdev.devfs_name, MMTIMER_NAME); |
709 | if (misc_register(&mmtimer_miscdev)) { | 699 | if (misc_register(&mmtimer_miscdev)) { |
710 | printk(KERN_ERR "%s: failed to register device\n", | 700 | printk(KERN_ERR "%s: failed to register device\n", |
711 | MMTIMER_NAME); | 701 | MMTIMER_NAME); |
712 | return -1; | 702 | return -1; |
703 | } | ||
704 | |||
705 | /* Get max numbered node, calculate slots needed */ | ||
706 | for_each_online_node(node) { | ||
707 | maxn = node; | ||
708 | } | ||
709 | maxn++; | ||
710 | |||
711 | /* Allocate list of node ptrs to mmtimer_t's */ | ||
712 | timers = kmalloc(sizeof(mmtimer_t *)*maxn, GFP_KERNEL); | ||
713 | if (timers == NULL) { | ||
714 | printk(KERN_ERR "%s: failed to allocate memory for device\n", | ||
715 | MMTIMER_NAME); | ||
716 | return -1; | ||
717 | } | ||
718 | |||
719 | /* Allocate mmtimer_t's for each online node */ | ||
720 | for_each_online_node(node) { | ||
721 | timers[node] = kmalloc_node(sizeof(mmtimer_t)*NUM_COMPARATORS, GFP_KERNEL, node); | ||
722 | if (timers[node] == NULL) { | ||
723 | printk(KERN_ERR "%s: failed to allocate memory for device\n", | ||
724 | MMTIMER_NAME); | ||
725 | return -1; | ||
726 | } | ||
727 | for (i=0; i< NUM_COMPARATORS; i++) { | ||
728 | mmtimer_t * base = timers[node] + i; | ||
729 | |||
730 | spin_lock_init(&base->lock); | ||
731 | base->timer = NULL; | ||
732 | base->cpu = 0; | ||
733 | base->i = i; | ||
734 | tasklet_init(&base->tasklet, mmtimer_tasklet, | ||
735 | (unsigned long) (base)); | ||
736 | } |