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Commit 771669349e6cec0e29a18dc0b5a108e81b85d58c

Authored by Richard Röjfors
Committed by Grant Likely
1 parent c9da2e1255
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

xilinx_spi: add a platform driver using the xilinx_spi common module. 

This patch adds in a platform device driver using the xilinx_spi common module.

Tested-by: John Linn <John.Linn@xilinx.com>
Signed-off-by: Richard Röjfors <richard.rojfors@mocean-labs.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

Showing 3 changed files with 110 additions and 0 deletions Inline Diff

1 # 1 #
2 # SPI driver configuration 2 # SPI driver configuration
3 # 3 #
4 # NOTE: the reason this doesn't show SPI slave support is mostly that 4 # NOTE: the reason this doesn't show SPI slave support is mostly that
5 # nobody's needed a slave side API yet. The master-role API is not 5 # nobody's needed a slave side API yet. The master-role API is not
6 # fully appropriate there, so it'd need some thought to do well. 6 # fully appropriate there, so it'd need some thought to do well.
7 # 7 #
8 menuconfig SPI 8 menuconfig SPI
9 bool "SPI support" 9 bool "SPI support"
10 depends on HAS_IOMEM 10 depends on HAS_IOMEM
11 help 11 help
12 The "Serial Peripheral Interface" is a low level synchronous 12 The "Serial Peripheral Interface" is a low level synchronous
13 protocol. Chips that support SPI can have data transfer rates 13 protocol. Chips that support SPI can have data transfer rates
14 up to several tens of Mbit/sec. Chips are addressed with a 14 up to several tens of Mbit/sec. Chips are addressed with a
15 controller and a chipselect. Most SPI slaves don't support 15 controller and a chipselect. Most SPI slaves don't support
16 dynamic device discovery; some are even write-only or read-only. 16 dynamic device discovery; some are even write-only or read-only.
17 17
18 SPI is widely used by microcontrollers to talk with sensors, 18 SPI is widely used by microcontrollers to talk with sensors,
19 eeprom and flash memory, codecs and various other controller 19 eeprom and flash memory, codecs and various other controller
20 chips, analog to digital (and d-to-a) converters, and more. 20 chips, analog to digital (and d-to-a) converters, and more.
21 MMC and SD cards can be accessed using SPI protocol; and for 21 MMC and SD cards can be accessed using SPI protocol; and for
22 DataFlash cards used in MMC sockets, SPI must always be used. 22 DataFlash cards used in MMC sockets, SPI must always be used.
23 23
24 SPI is one of a family of similar protocols using a four wire 24 SPI is one of a family of similar protocols using a four wire
25 interface (select, clock, data in, data out) including Microwire 25 interface (select, clock, data in, data out) including Microwire
26 (half duplex), SSP, SSI, and PSP. This driver framework should 26 (half duplex), SSP, SSI, and PSP. This driver framework should
27 work with most such devices and controllers. 27 work with most such devices and controllers.
28 28
29 if SPI 29 if SPI
30 30
31 config SPI_DEBUG 31 config SPI_DEBUG
32 boolean "Debug support for SPI drivers" 32 boolean "Debug support for SPI drivers"
33 depends on DEBUG_KERNEL 33 depends on DEBUG_KERNEL
34 help 34 help
35 Say "yes" to enable debug messaging (like dev_dbg and pr_debug), 35 Say "yes" to enable debug messaging (like dev_dbg and pr_debug),
36 sysfs, and debugfs support in SPI controller and protocol drivers. 36 sysfs, and debugfs support in SPI controller and protocol drivers.
37 37
38 # 38 #
39 # MASTER side ... talking to discrete SPI slave chips including microcontrollers 39 # MASTER side ... talking to discrete SPI slave chips including microcontrollers
40 # 40 #
41 41
42 config SPI_MASTER 42 config SPI_MASTER
43 # boolean "SPI Master Support" 43 # boolean "SPI Master Support"
44 boolean 44 boolean
45 default SPI 45 default SPI
46 help 46 help
47 If your system has an master-capable SPI controller (which 47 If your system has an master-capable SPI controller (which
48 provides the clock and chipselect), you can enable that 48 provides the clock and chipselect), you can enable that
49 controller and the protocol drivers for the SPI slave chips 49 controller and the protocol drivers for the SPI slave chips
50 that are connected. 50 that are connected.
51 51
52 if SPI_MASTER 52 if SPI_MASTER
53 53
54 comment "SPI Master Controller Drivers" 54 comment "SPI Master Controller Drivers"
55 55
56 config SPI_ATMEL 56 config SPI_ATMEL
57 tristate "Atmel SPI Controller" 57 tristate "Atmel SPI Controller"
58 depends on (ARCH_AT91 || AVR32) 58 depends on (ARCH_AT91 || AVR32)
59 help 59 help
60 This selects a driver for the Atmel SPI Controller, present on 60 This selects a driver for the Atmel SPI Controller, present on
61 many AT32 (AVR32) and AT91 (ARM) chips. 61 many AT32 (AVR32) and AT91 (ARM) chips.
62 62
63 config SPI_BFIN 63 config SPI_BFIN
64 tristate "SPI controller driver for ADI Blackfin5xx" 64 tristate "SPI controller driver for ADI Blackfin5xx"
65 depends on BLACKFIN 65 depends on BLACKFIN
66 help 66 help
67 This is the SPI controller master driver for Blackfin 5xx processor. 67 This is the SPI controller master driver for Blackfin 5xx processor.
68 68
69 config SPI_AU1550 69 config SPI_AU1550
70 tristate "Au1550/Au12x0 SPI Controller" 70 tristate "Au1550/Au12x0 SPI Controller"
71 depends on (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL 71 depends on (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL
72 select SPI_BITBANG 72 select SPI_BITBANG
73 help 73 help
74 If you say yes to this option, support will be included for the 74 If you say yes to this option, support will be included for the
75 Au1550 SPI controller (may also work with Au1200,Au1210,Au1250). 75 Au1550 SPI controller (may also work with Au1200,Au1210,Au1250).
76 76
77 This driver can also be built as a module. If so, the module 77 This driver can also be built as a module. If so, the module
78 will be called au1550_spi. 78 will be called au1550_spi.
79 79
80 config SPI_BITBANG 80 config SPI_BITBANG
81 tristate "Utilities for Bitbanging SPI masters" 81 tristate "Utilities for Bitbanging SPI masters"
82 help 82 help
83 With a few GPIO pins, your system can bitbang the SPI protocol. 83 With a few GPIO pins, your system can bitbang the SPI protocol.
84 Select this to get SPI support through I/O pins (GPIO, parallel 84 Select this to get SPI support through I/O pins (GPIO, parallel
85 port, etc). Or, some systems' SPI master controller drivers use 85 port, etc). Or, some systems' SPI master controller drivers use
86 this code to manage the per-word or per-transfer accesses to the 86 this code to manage the per-word or per-transfer accesses to the
87 hardware shift registers. 87 hardware shift registers.
88 88
89 This is library code, and is automatically selected by drivers that 89 This is library code, and is automatically selected by drivers that
90 need it. You only need to select this explicitly to support driver 90 need it. You only need to select this explicitly to support driver
91 modules that aren't part of this kernel tree. 91 modules that aren't part of this kernel tree.
92 92
93 config SPI_BUTTERFLY 93 config SPI_BUTTERFLY
94 tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)" 94 tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)"
95 depends on PARPORT 95 depends on PARPORT
96 select SPI_BITBANG 96 select SPI_BITBANG
97 help 97 help
98 This uses a custom parallel port cable to connect to an AVR 98 This uses a custom parallel port cable to connect to an AVR
99 Butterfly <http://www.atmel.com/products/avr/butterfly>, an 99 Butterfly <http://www.atmel.com/products/avr/butterfly>, an
100 inexpensive battery powered microcontroller evaluation board. 100 inexpensive battery powered microcontroller evaluation board.
101 This same cable can be used to flash new firmware. 101 This same cable can be used to flash new firmware.
102 102
103 config SPI_GPIO 103 config SPI_GPIO
104 tristate "GPIO-based bitbanging SPI Master" 104 tristate "GPIO-based bitbanging SPI Master"
105 depends on GENERIC_GPIO 105 depends on GENERIC_GPIO
106 select SPI_BITBANG 106 select SPI_BITBANG
107 help 107 help
108 This simple GPIO bitbanging SPI master uses the arch-neutral GPIO 108 This simple GPIO bitbanging SPI master uses the arch-neutral GPIO
109 interface to manage MOSI, MISO, SCK, and chipselect signals. SPI 109 interface to manage MOSI, MISO, SCK, and chipselect signals. SPI
110 slaves connected to a bus using this driver are configured as usual, 110 slaves connected to a bus using this driver are configured as usual,
111 except that the spi_board_info.controller_data holds the GPIO number 111 except that the spi_board_info.controller_data holds the GPIO number
112 for the chipselect used by this controller driver. 112 for the chipselect used by this controller driver.
113 113
114 Note that this driver often won't achieve even 1 Mbit/sec speeds, 114 Note that this driver often won't achieve even 1 Mbit/sec speeds,
115 making it unusually slow for SPI. If your platform can inline 115 making it unusually slow for SPI. If your platform can inline
116 GPIO operations, you should be able to leverage that for better 116 GPIO operations, you should be able to leverage that for better
117 speed with a custom version of this driver; see the source code. 117 speed with a custom version of this driver; see the source code.
118 118
119 config SPI_IMX 119 config SPI_IMX
120 tristate "Freescale i.MX SPI controllers" 120 tristate "Freescale i.MX SPI controllers"
121 depends on ARCH_MXC 121 depends on ARCH_MXC
122 select SPI_BITBANG 122 select SPI_BITBANG
123 help 123 help
124 This enables using the Freescale i.MX SPI controllers in master 124 This enables using the Freescale i.MX SPI controllers in master
125 mode. 125 mode.
126 126
127 config SPI_LM70_LLP 127 config SPI_LM70_LLP
128 tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)" 128 tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)"
129 depends on PARPORT && EXPERIMENTAL 129 depends on PARPORT && EXPERIMENTAL
130 select SPI_BITBANG 130 select SPI_BITBANG
131 help 131 help
132 This driver supports the NS LM70 LLP Evaluation Board, 132 This driver supports the NS LM70 LLP Evaluation Board,
133 which interfaces to an LM70 temperature sensor using 133 which interfaces to an LM70 temperature sensor using
134 a parallel port. 134 a parallel port.
135 135
136 config SPI_MPC52xx 136 config SPI_MPC52xx
137 tristate "Freescale MPC52xx SPI (non-PSC) controller support" 137 tristate "Freescale MPC52xx SPI (non-PSC) controller support"
138 depends on PPC_MPC52xx && SPI 138 depends on PPC_MPC52xx && SPI
139 select SPI_MASTER_OF 139 select SPI_MASTER_OF
140 help 140 help
141 This drivers supports the MPC52xx SPI controller in master SPI 141 This drivers supports the MPC52xx SPI controller in master SPI
142 mode. 142 mode.
143 143
144 config SPI_MPC52xx_PSC 144 config SPI_MPC52xx_PSC
145 tristate "Freescale MPC52xx PSC SPI controller" 145 tristate "Freescale MPC52xx PSC SPI controller"
146 depends on PPC_MPC52xx && EXPERIMENTAL 146 depends on PPC_MPC52xx && EXPERIMENTAL
147 help 147 help
148 This enables using the Freescale MPC52xx Programmable Serial 148 This enables using the Freescale MPC52xx Programmable Serial
149 Controller in master SPI mode. 149 Controller in master SPI mode.
150 150
151 config SPI_MPC8xxx 151 config SPI_MPC8xxx
152 tristate "Freescale MPC8xxx SPI controller" 152 tristate "Freescale MPC8xxx SPI controller"
153 depends on FSL_SOC 153 depends on FSL_SOC
154 help 154 help
155 This enables using the Freescale MPC8xxx SPI controllers in master 155 This enables using the Freescale MPC8xxx SPI controllers in master
156 mode. 156 mode.
157 157
158 This driver uses a simple set of shift registers for data (opposed 158 This driver uses a simple set of shift registers for data (opposed
159 to the CPM based descriptor model). 159 to the CPM based descriptor model).
160 160
161 config SPI_OMAP_UWIRE 161 config SPI_OMAP_UWIRE
162 tristate "OMAP1 MicroWire" 162 tristate "OMAP1 MicroWire"
163 depends on ARCH_OMAP1 163 depends on ARCH_OMAP1
164 select SPI_BITBANG 164 select SPI_BITBANG
165 help 165 help
166 This hooks up to the MicroWire controller on OMAP1 chips. 166 This hooks up to the MicroWire controller on OMAP1 chips.
167 167
168 config SPI_OMAP24XX 168 config SPI_OMAP24XX
169 tristate "McSPI driver for OMAP24xx/OMAP34xx" 169 tristate "McSPI driver for OMAP24xx/OMAP34xx"
170 depends on ARCH_OMAP24XX || ARCH_OMAP34XX 170 depends on ARCH_OMAP24XX || ARCH_OMAP34XX
171 help 171 help
172 SPI master controller for OMAP24xx/OMAP34xx Multichannel SPI 172 SPI master controller for OMAP24xx/OMAP34xx Multichannel SPI
173 (McSPI) modules. 173 (McSPI) modules.
174 174
175 config SPI_ORION 175 config SPI_ORION
176 tristate "Orion SPI master (EXPERIMENTAL)" 176 tristate "Orion SPI master (EXPERIMENTAL)"
177 depends on PLAT_ORION && EXPERIMENTAL 177 depends on PLAT_ORION && EXPERIMENTAL
178 help 178 help
179 This enables using the SPI master controller on the Orion chips. 179 This enables using the SPI master controller on the Orion chips.
180 180
181 config SPI_PL022 181 config SPI_PL022
182 tristate "ARM AMBA PL022 SSP controller (EXPERIMENTAL)" 182 tristate "ARM AMBA PL022 SSP controller (EXPERIMENTAL)"
183 depends on ARM_AMBA && EXPERIMENTAL 183 depends on ARM_AMBA && EXPERIMENTAL
184 default y if MACH_U300 184 default y if MACH_U300
185 default y if ARCH_REALVIEW 185 default y if ARCH_REALVIEW
186 default y if INTEGRATOR_IMPD1 186 default y if INTEGRATOR_IMPD1
187 default y if ARCH_VERSATILE 187 default y if ARCH_VERSATILE
188 help 188 help
189 This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP 189 This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP
190 controller. If you have an embedded system with an AMBA(R) 190 controller. If you have an embedded system with an AMBA(R)
191 bus and a PL022 controller, say Y or M here. 191 bus and a PL022 controller, say Y or M here.
192 192
193 config SPI_PPC4xx 193 config SPI_PPC4xx
194 tristate "PPC4xx SPI Controller" 194 tristate "PPC4xx SPI Controller"
195 depends on PPC32 && 4xx && SPI_MASTER 195 depends on PPC32 && 4xx && SPI_MASTER
196 select SPI_BITBANG 196 select SPI_BITBANG
197 help 197 help
198 This selects a driver for the PPC4xx SPI Controller. 198 This selects a driver for the PPC4xx SPI Controller.
199 199
200 config SPI_PXA2XX 200 config SPI_PXA2XX
201 tristate "PXA2xx SSP SPI master" 201 tristate "PXA2xx SSP SPI master"
202 depends on ARCH_PXA && EXPERIMENTAL 202 depends on ARCH_PXA && EXPERIMENTAL
203 select PXA_SSP 203 select PXA_SSP
204 help 204 help
205 This enables using a PXA2xx SSP port as a SPI master controller. 205 This enables using a PXA2xx SSP port as a SPI master controller.
206 The driver can be configured to use any SSP port and additional 206 The driver can be configured to use any SSP port and additional
207 documentation can be found a Documentation/spi/pxa2xx. 207 documentation can be found a Documentation/spi/pxa2xx.
208 208
209 config SPI_S3C24XX 209 config SPI_S3C24XX
210 tristate "Samsung S3C24XX series SPI" 210 tristate "Samsung S3C24XX series SPI"
211 depends on ARCH_S3C2410 && EXPERIMENTAL 211 depends on ARCH_S3C2410 && EXPERIMENTAL
212 select SPI_BITBANG 212 select SPI_BITBANG
213 help 213 help
214 SPI driver for Samsung S3C24XX series ARM SoCs 214 SPI driver for Samsung S3C24XX series ARM SoCs
215 215
216 config SPI_S3C24XX_GPIO 216 config SPI_S3C24XX_GPIO
217 tristate "Samsung S3C24XX series SPI by GPIO" 217 tristate "Samsung S3C24XX series SPI by GPIO"
218 depends on ARCH_S3C2410 && EXPERIMENTAL 218 depends on ARCH_S3C2410 && EXPERIMENTAL
219 select SPI_BITBANG 219 select SPI_BITBANG
220 help 220 help
221 SPI driver for Samsung S3C24XX series ARM SoCs using 221 SPI driver for Samsung S3C24XX series ARM SoCs using
222 GPIO lines to provide the SPI bus. This can be used where 222 GPIO lines to provide the SPI bus. This can be used where
223 the inbuilt hardware cannot provide the transfer mode, or 223 the inbuilt hardware cannot provide the transfer mode, or
224 where the board is using non hardware connected pins. 224 where the board is using non hardware connected pins.
225 225
226 config SPI_SH_SCI 226 config SPI_SH_SCI
227 tristate "SuperH SCI SPI controller" 227 tristate "SuperH SCI SPI controller"
228 depends on SUPERH 228 depends on SUPERH
229 select SPI_BITBANG 229 select SPI_BITBANG
230 help 230 help
231 SPI driver for SuperH SCI blocks. 231 SPI driver for SuperH SCI blocks.
232 232
233 config SPI_STMP3XXX 233 config SPI_STMP3XXX
234 tristate "Freescale STMP37xx/378x SPI/SSP controller" 234 tristate "Freescale STMP37xx/378x SPI/SSP controller"
235 depends on ARCH_STMP3XXX && SPI_MASTER 235 depends on ARCH_STMP3XXX && SPI_MASTER
236 help 236 help
237 SPI driver for Freescale STMP37xx/378x SoC SSP interface 237 SPI driver for Freescale STMP37xx/378x SoC SSP interface
238 238
239 config SPI_TXX9 239 config SPI_TXX9
240 tristate "Toshiba TXx9 SPI controller" 240 tristate "Toshiba TXx9 SPI controller"
241 depends on GENERIC_GPIO && CPU_TX49XX 241 depends on GENERIC_GPIO && CPU_TX49XX
242 help 242 help
243 SPI driver for Toshiba TXx9 MIPS SoCs 243 SPI driver for Toshiba TXx9 MIPS SoCs
244 244
245 config SPI_XILINX 245 config SPI_XILINX
246 tristate "Xilinx SPI controller common module" 246 tristate "Xilinx SPI controller common module"
247 depends on HAS_IOMEM && EXPERIMENTAL 247 depends on HAS_IOMEM && EXPERIMENTAL
248 select SPI_BITBANG 248 select SPI_BITBANG
249 select SPI_XILINX_OF if (XILINX_VIRTEX || MICROBLAZE) 249 select SPI_XILINX_OF if (XILINX_VIRTEX || MICROBLAZE)
250 help 250 help
251 This exposes the SPI controller IP from the Xilinx EDK. 251 This exposes the SPI controller IP from the Xilinx EDK.
252 252
253 See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" 253 See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
254 Product Specification document (DS464) for hardware details. 254 Product Specification document (DS464) for hardware details.
255 255
256 Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)" 256 Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)"
257 257
258 config SPI_XILINX_OF 258 config SPI_XILINX_OF
259 tristate "Xilinx SPI controller OF device" 259 tristate "Xilinx SPI controller OF device"
260 depends on SPI_XILINX && (XILINX_VIRTEX || MICROBLAZE) 260 depends on SPI_XILINX && (XILINX_VIRTEX || MICROBLAZE)
261 help 261 help
262 This is the OF driver for the SPI controller IP from the Xilinx EDK. 262 This is the OF driver for the SPI controller IP from the Xilinx EDK.
263 263
264 config SPI_XILINX_PLTFM
265 tristate "Xilinx SPI controller platform device"
266 depends on SPI_XILINX
267 help
268 This is the platform driver for the SPI controller IP
269 from the Xilinx EDK.
270
264 # 271 #
265 # Add new SPI master controllers in alphabetical order above this line 272 # Add new SPI master controllers in alphabetical order above this line
266 # 273 #
267 274
268 # 275 #
269 # There are lots of SPI device types, with sensors and memory 276 # There are lots of SPI device types, with sensors and memory
270 # being probably the most widely used ones. 277 # being probably the most widely used ones.
271 # 278 #
272 comment "SPI Protocol Masters" 279 comment "SPI Protocol Masters"
273 280
274 config SPI_SPIDEV 281 config SPI_SPIDEV
275 tristate "User mode SPI device driver support" 282 tristate "User mode SPI device driver support"
276 depends on EXPERIMENTAL 283 depends on EXPERIMENTAL
277 help 284 help
278 This supports user mode SPI protocol drivers. 285 This supports user mode SPI protocol drivers.
279 286
280 Note that this application programming interface is EXPERIMENTAL 287 Note that this application programming interface is EXPERIMENTAL
281 and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes. 288 and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes.
282 289
283 config SPI_TLE62X0 290 config SPI_TLE62X0
284 tristate "Infineon TLE62X0 (for power switching)" 291 tristate "Infineon TLE62X0 (for power switching)"
285 depends on SYSFS 292 depends on SYSFS
286 help 293 help
287 SPI driver for Infineon TLE62X0 series line driver chips, 294 SPI driver for Infineon TLE62X0 series line driver chips,
288 such as the TLE6220, TLE6230 and TLE6240. This provides a 295 such as the TLE6220, TLE6230 and TLE6240. This provides a
289 sysfs interface, with each line presented as a kind of GPIO 296 sysfs interface, with each line presented as a kind of GPIO
290 exposing both switch control and diagnostic feedback. 297 exposing both switch control and diagnostic feedback.
291 298
292 # 299 #
293 # Add new SPI protocol masters in alphabetical order above this line 300 # Add new SPI protocol masters in alphabetical order above this line
294 # 301 #
295 302
296 endif # SPI_MASTER 303 endif # SPI_MASTER
297 304
298 # (slave support would go here) 305 # (slave support would go here)
299 306
300 endif # SPI 307 endif # SPI
301 308
drivers/spi/Makefile
Diff comments   View file @ 7716693
1 # 1 #
2 # Makefile for kernel SPI drivers. 2 # Makefile for kernel SPI drivers.
3 # 3 #
4 4
5 ifeq ($(CONFIG_SPI_DEBUG),y) 5 ifeq ($(CONFIG_SPI_DEBUG),y)
6 EXTRA_CFLAGS += -DDEBUG 6 EXTRA_CFLAGS += -DDEBUG
7 endif 7 endif
8 8
9 # small core, mostly translating board-specific 9 # small core, mostly translating board-specific
10 # config declarations into driver model code 10 # config declarations into driver model code
11 obj-$(CONFIG_SPI_MASTER) += spi.o 11 obj-$(CONFIG_SPI_MASTER) += spi.o
12 12
13 # SPI master controller drivers (bus) 13 # SPI master controller drivers (bus)
14 obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o 14 obj-$(CONFIG_SPI_ATMEL) += atmel_spi.o
15 obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o 15 obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o
16 obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o 16 obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o
17 obj-$(CONFIG_SPI_AU1550) += au1550_spi.o 17 obj-$(CONFIG_SPI_AU1550) += au1550_spi.o
18 obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o 18 obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o
19 obj-$(CONFIG_SPI_GPIO) += spi_gpio.o 19 obj-$(CONFIG_SPI_GPIO) += spi_gpio.o
20 obj-$(CONFIG_SPI_IMX) += spi_imx.o 20 obj-$(CONFIG_SPI_IMX) += spi_imx.o
21 obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o 21 obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o
22 obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o 22 obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o
23 obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o 23 obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o
24 obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o 24 obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
25 obj-$(CONFIG_SPI_ORION) += orion_spi.o 25 obj-$(CONFIG_SPI_ORION) += orion_spi.o
26 obj-$(CONFIG_SPI_PL022) += amba-pl022.o 26 obj-$(CONFIG_SPI_PL022) += amba-pl022.o
27 obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o 27 obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o
28 obj-$(CONFIG_SPI_MPC52xx) += mpc52xx_spi.o 28 obj-$(CONFIG_SPI_MPC52xx) += mpc52xx_spi.o
29 obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o 29 obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o
30 obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o 30 obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o
31 obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o 31 obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
32 obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o 32 obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o
33 obj-$(CONFIG_SPI_TXX9) += spi_txx9.o 33 obj-$(CONFIG_SPI_TXX9) += spi_txx9.o
34 obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o 34 obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o
35 obj-$(CONFIG_SPI_XILINX_OF) += xilinx_spi_of.o 35 obj-$(CONFIG_SPI_XILINX_OF) += xilinx_spi_of.o
36 obj-$(CONFIG_SPI_XILINX_PLTFM) += xilinx_spi_pltfm.o
36 obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o 37 obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o
37 obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o 38 obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o
38 # ... add above this line ... 39 # ... add above this line ...
39 40
40 # SPI protocol drivers (device/link on bus) 41 # SPI protocol drivers (device/link on bus)
41 obj-$(CONFIG_SPI_SPIDEV) += spidev.o 42 obj-$(CONFIG_SPI_SPIDEV) += spidev.o
42 obj-$(CONFIG_SPI_TLE62X0) += tle62x0.o 43 obj-$(CONFIG_SPI_TLE62X0) += tle62x0.o
43 # ... add above this line ... 44 # ... add above this line ...
44 45
45 # SPI slave controller drivers (upstream link) 46 # SPI slave controller drivers (upstream link)
46 # ... add above this line ... 47 # ... add above this line ...
47 48
48 # SPI slave drivers (protocol for that link) 49 # SPI slave drivers (protocol for that link)
49 # ... add above this line ... 50 # ... add above this line ...
50 51
drivers/spi/xilinx_spi_pltfm.c
Diff comments   View file @ 7716693
File was created 1 /*
2 * Support for Xilinx SPI platform devices
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19 /* Supports:
20 * Xilinx SPI devices as platform devices
21 *
22 * Inspired by xilinx_spi.c, 2002-2007 (c) MontaVista Software, Inc.
23 */
24
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/io.h>
29 #include <linux/platform_device.h>
30
31 #include <linux/spi/spi.h>
32 #include <linux/spi/spi_bitbang.h>
33 #include <linux/spi/xilinx_spi.h>
34
35 #include "xilinx_spi.h"
36
37 static int __devinit xilinx_spi_probe(struct platform_device *dev)
38 {
39 struct xspi_platform_data *pdata;
40 struct resource *r;
41 int irq;
42 struct spi_master *master;
43 u8 i;
44
45 pdata = dev->dev.platform_data;
46 if (!pdata)
47 return -ENODEV;
48
49 r = platform_get_resource(dev, IORESOURCE_MEM, 0);
50 if (!r)
51 return -ENODEV;
52
53 irq = platform_get_irq(dev, 0);
54 if (irq < 0)
55 return -ENXIO;
56
57 master = xilinx_spi_init(&dev->dev, r, irq, dev->id);
58 if (!master)
59 return -ENODEV;
60
61 for (i = 0; i < pdata->num_devices; i++)
62 spi_new_device(master, pdata->devices + i);
63
64 platform_set_drvdata(dev, master);
65 return 0;
66 }
67
68 static int __devexit xilinx_spi_remove(struct platform_device *dev)
69 {
70 xilinx_spi_deinit(platform_get_drvdata(dev));
71 platform_set_drvdata(dev, 0);
72
73 return 0;
74 }
75
76 /* work with hotplug and coldplug */
77 MODULE_ALIAS("platform:" XILINX_SPI_NAME);
78
79 static struct platform_driver xilinx_spi_driver = {
80 .probe = xilinx_spi_probe,
81 .remove = __devexit_p(xilinx_spi_remove),
82 .driver = {
83 .name = XILINX_SPI_NAME,
84 .owner = THIS_MODULE,
85 },
86 };
87
88 static int __init xilinx_spi_pltfm_init(void)
89 {
90 return platform_driver_register(&xilinx_spi_driver);
91 }
92 module_init(xilinx_spi_pltfm_init);
93
94 static void __exit xilinx_spi_pltfm_exit(void)
95 {
96 platform_driver_unregister(&xilinx_spi_driver);
97 }
98 module_exit(xilinx_spi_pltfm_exit);
99
100 MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
101 MODULE_DESCRIPTION("Xilinx SPI platform driver");
102 MODULE_LICENSE("GPL v2");
103