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Commit 792a6c51875c9d3b4a7b9af553b7fd18e8d84684

Authored by Takashi Iwai
Committed by Jaroslav Kysela
1 parent 5e12bea083
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[ALSA] Fix PM support 

Modules: ARM AACI PL041 driver,ARM PXA2XX driver

Fix PM support of aaci and pxa2xx drivers.

Signed-off-by: Takashi Iwai <tiwai@suse.de>

Showing 2 changed files with 19 additions and 29 deletions Inline Diff

1 /* 1 /*
2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver 2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
3 * 3 *
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved. 4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify 6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as 7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 * 9 *
10 * Documentation: ARM DDI 0173B 10 * Documentation: ARM DDI 0173B
11 */ 11 */
12 #include <linux/module.h> 12 #include <linux/module.h>
13 #include <linux/delay.h> 13 #include <linux/delay.h>
14 #include <linux/init.h> 14 #include <linux/init.h>
15 #include <linux/ioport.h> 15 #include <linux/ioport.h>
16 #include <linux/device.h> 16 #include <linux/device.h>
17 #include <linux/spinlock.h> 17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h> 18 #include <linux/interrupt.h>
19 #include <linux/err.h> 19 #include <linux/err.h>
20 20
21 #include <asm/io.h> 21 #include <asm/io.h>
22 #include <asm/irq.h> 22 #include <asm/irq.h>
23 #include <asm/sizes.h> 23 #include <asm/sizes.h>
24 #include <asm/hardware/amba.h> 24 #include <asm/hardware/amba.h>
25 25
26 #include <sound/driver.h> 26 #include <sound/driver.h>
27 #include <sound/core.h> 27 #include <sound/core.h>
28 #include <sound/initval.h> 28 #include <sound/initval.h>
29 #include <sound/ac97_codec.h> 29 #include <sound/ac97_codec.h>
30 #include <sound/pcm.h> 30 #include <sound/pcm.h>
31 #include <sound/pcm_params.h> 31 #include <sound/pcm_params.h>
32 32
33 #include "aaci.h" 33 #include "aaci.h"
34 #include "devdma.h" 34 #include "devdma.h"
35 35
36 #define DRIVER_NAME "aaci-pl041" 36 #define DRIVER_NAME "aaci-pl041"
37 37
38 /* 38 /*
39 * PM support is not complete. Turn it off. 39 * PM support is not complete. Turn it off.
40 */ 40 */
41 #undef CONFIG_PM 41 #undef CONFIG_PM
42 42
43 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97) 43 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
44 { 44 {
45 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num); 45 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
46 46
47 /* 47 /*
48 * Ensure that the slot 1/2 RX registers are empty. 48 * Ensure that the slot 1/2 RX registers are empty.
49 */ 49 */
50 v = readl(aaci->base + AACI_SLFR); 50 v = readl(aaci->base + AACI_SLFR);
51 if (v & SLFR_2RXV) 51 if (v & SLFR_2RXV)
52 readl(aaci->base + AACI_SL2RX); 52 readl(aaci->base + AACI_SL2RX);
53 if (v & SLFR_1RXV) 53 if (v & SLFR_1RXV)
54 readl(aaci->base + AACI_SL1RX); 54 readl(aaci->base + AACI_SL1RX);
55 55
56 writel(maincr, aaci->base + AACI_MAINCR); 56 writel(maincr, aaci->base + AACI_MAINCR);
57 } 57 }
58 58
59 /* 59 /*
60 * P29: 60 * P29:
61 * The recommended use of programming the external codec through slot 1 61 * The recommended use of programming the external codec through slot 1
62 * and slot 2 data is to use the channels during setup routines and the 62 * and slot 2 data is to use the channels during setup routines and the
63 * slot register at any other time. The data written into slot 1, slot 2 63 * slot register at any other time. The data written into slot 1, slot 2
64 * and slot 12 registers is transmitted only when their corresponding 64 * and slot 12 registers is transmitted only when their corresponding
65 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR 65 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
66 * register. 66 * register.
67 */ 67 */
68 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) 68 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
69 { 69 {
70 struct aaci *aaci = ac97->private_data; 70 struct aaci *aaci = ac97->private_data;
71 u32 v; 71 u32 v;
72 72
73 if (ac97->num >= 4) 73 if (ac97->num >= 4)
74 return; 74 return;
75 75
76 down(&aaci->ac97_sem); 76 down(&aaci->ac97_sem);
77 77
78 aaci_ac97_select_codec(aaci, ac97); 78 aaci_ac97_select_codec(aaci, ac97);
79 79
80 /* 80 /*
81 * P54: You must ensure that AACI_SL2TX is always written 81 * P54: You must ensure that AACI_SL2TX is always written
82 * to, if required, before data is written to AACI_SL1TX. 82 * to, if required, before data is written to AACI_SL1TX.
83 */ 83 */
84 writel(val << 4, aaci->base + AACI_SL2TX); 84 writel(val << 4, aaci->base + AACI_SL2TX);
85 writel(reg << 12, aaci->base + AACI_SL1TX); 85 writel(reg << 12, aaci->base + AACI_SL1TX);
86 86
87 /* 87 /*
88 * Wait for the transmission of both slots to complete. 88 * Wait for the transmission of both slots to complete.
89 */ 89 */
90 do { 90 do {
91 v = readl(aaci->base + AACI_SLFR); 91 v = readl(aaci->base + AACI_SLFR);
92 } while (v & (SLFR_1TXB|SLFR_2TXB)); 92 } while (v & (SLFR_1TXB|SLFR_2TXB));
93 93
94 up(&aaci->ac97_sem); 94 up(&aaci->ac97_sem);
95 } 95 }
96 96
97 /* 97 /*
98 * Read an AC'97 register. 98 * Read an AC'97 register.
99 */ 99 */
100 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 100 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
101 { 101 {
102 struct aaci *aaci = ac97->private_data; 102 struct aaci *aaci = ac97->private_data;
103 u32 v; 103 u32 v;
104 104
105 if (ac97->num >= 4) 105 if (ac97->num >= 4)
106 return ~0; 106 return ~0;
107 107
108 down(&aaci->ac97_sem); 108 down(&aaci->ac97_sem);
109 109
110 aaci_ac97_select_codec(aaci, ac97); 110 aaci_ac97_select_codec(aaci, ac97);
111 111
112 /* 112 /*
113 * Write the register address to slot 1. 113 * Write the register address to slot 1.
114 */ 114 */
115 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX); 115 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
116 116
117 /* 117 /*
118 * Wait for the transmission to complete. 118 * Wait for the transmission to complete.
119 */ 119 */
120 do { 120 do {
121 v = readl(aaci->base + AACI_SLFR); 121 v = readl(aaci->base + AACI_SLFR);
122 } while (v & SLFR_1TXB); 122 } while (v & SLFR_1TXB);
123 123
124 /* 124 /*
125 * Give the AC'97 codec more than enough time 125 * Give the AC'97 codec more than enough time
126 * to respond. (42us = ~2 frames at 48kHz.) 126 * to respond. (42us = ~2 frames at 48kHz.)
127 */ 127 */
128 udelay(42); 128 udelay(42);
129 129
130 /* 130 /*
131 * Wait for slot 2 to indicate data. 131 * Wait for slot 2 to indicate data.
132 */ 132 */
133 do { 133 do {
134 cond_resched(); 134 cond_resched();
135 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV); 135 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
136 } while (v != (SLFR_1RXV|SLFR_2RXV)); 136 } while (v != (SLFR_1RXV|SLFR_2RXV));
137 137
138 v = readl(aaci->base + AACI_SL1RX) >> 12; 138 v = readl(aaci->base + AACI_SL1RX) >> 12;
139 if (v == reg) { 139 if (v == reg) {
140 v = readl(aaci->base + AACI_SL2RX) >> 4; 140 v = readl(aaci->base + AACI_SL2RX) >> 4;
141 } else { 141 } else {
142 dev_err(&aaci->dev->dev, 142 dev_err(&aaci->dev->dev,
143 "wrong ac97 register read back (%x != %x)\n", 143 "wrong ac97 register read back (%x != %x)\n",
144 v, reg); 144 v, reg);
145 v = ~0; 145 v = ~0;
146 } 146 }
147 147
148 up(&aaci->ac97_sem); 148 up(&aaci->ac97_sem);
149 return v; 149 return v;
150 } 150 }
151 151
152 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun) 152 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
153 { 153 {
154 u32 val; 154 u32 val;
155 int timeout = 5000; 155 int timeout = 5000;
156 156
157 do { 157 do {
158 val = readl(aacirun->base + AACI_SR); 158 val = readl(aacirun->base + AACI_SR);
159 } while (val & (SR_TXB|SR_RXB) && timeout--); 159 } while (val & (SR_TXB|SR_RXB) && timeout--);
160 } 160 }
161 161
162 162
163 163
164 /* 164 /*
165 * Interrupt support. 165 * Interrupt support.
166 */ 166 */
167 static void aaci_fifo_irq(struct aaci *aaci, u32 mask) 167 static void aaci_fifo_irq(struct aaci *aaci, u32 mask)
168 { 168 {
169 if (mask & ISR_URINTR) { 169 if (mask & ISR_URINTR) {
170 writel(ICLR_TXUEC1, aaci->base + AACI_INTCLR); 170 writel(ICLR_TXUEC1, aaci->base + AACI_INTCLR);
171 } 171 }
172 172
173 if (mask & ISR_TXINTR) { 173 if (mask & ISR_TXINTR) {
174 struct aaci_runtime *aacirun = &aaci->playback; 174 struct aaci_runtime *aacirun = &aaci->playback;
175 void *ptr; 175 void *ptr;
176 176
177 if (!aacirun->substream || !aacirun->start) { 177 if (!aacirun->substream || !aacirun->start) {
178 dev_warn(&aaci->dev->dev, "TX interrupt???"); 178 dev_warn(&aaci->dev->dev, "TX interrupt???");
179 writel(0, aacirun->base + AACI_IE); 179 writel(0, aacirun->base + AACI_IE);
180 return; 180 return;
181 } 181 }
182 182
183 ptr = aacirun->ptr; 183 ptr = aacirun->ptr;
184 do { 184 do {
185 unsigned int len = aacirun->fifosz; 185 unsigned int len = aacirun->fifosz;
186 u32 val; 186 u32 val;
187 187
188 if (aacirun->bytes <= 0) { 188 if (aacirun->bytes <= 0) {
189 aacirun->bytes += aacirun->period; 189 aacirun->bytes += aacirun->period;
190 aacirun->ptr = ptr; 190 aacirun->ptr = ptr;
191 spin_unlock(&aaci->lock); 191 spin_unlock(&aaci->lock);
192 snd_pcm_period_elapsed(aacirun->substream); 192 snd_pcm_period_elapsed(aacirun->substream);
193 spin_lock(&aaci->lock); 193 spin_lock(&aaci->lock);
194 } 194 }
195 if (!(aacirun->cr & TXCR_TXEN)) 195 if (!(aacirun->cr & TXCR_TXEN))
196 break; 196 break;
197 197
198 val = readl(aacirun->base + AACI_SR); 198 val = readl(aacirun->base + AACI_SR);
199 if (!(val & SR_TXHE)) 199 if (!(val & SR_TXHE))
200 break; 200 break;
201 if (!(val & SR_TXFE)) 201 if (!(val & SR_TXFE))
202 len >>= 1; 202 len >>= 1;
203 203
204 aacirun->bytes -= len; 204 aacirun->bytes -= len;
205 205
206 /* writing 16 bytes at a time */ 206 /* writing 16 bytes at a time */
207 for ( ; len > 0; len -= 16) { 207 for ( ; len > 0; len -= 16) {
208 asm( 208 asm(
209 "ldmia %0!, {r0, r1, r2, r3}\n\t" 209 "ldmia %0!, {r0, r1, r2, r3}\n\t"
210 "stmia %1, {r0, r1, r2, r3}" 210 "stmia %1, {r0, r1, r2, r3}"
211 : "+r" (ptr) 211 : "+r" (ptr)
212 : "r" (aacirun->fifo) 212 : "r" (aacirun->fifo)
213 : "r0", "r1", "r2", "r3", "cc"); 213 : "r0", "r1", "r2", "r3", "cc");
214 214
215 if (ptr >= aacirun->end) 215 if (ptr >= aacirun->end)
216 ptr = aacirun->start; 216 ptr = aacirun->start;
217 } 217 }
218 } while (1); 218 } while (1);
219 219
220 aacirun->ptr = ptr; 220 aacirun->ptr = ptr;
221 } 221 }
222 } 222 }
223 223
224 static irqreturn_t aaci_irq(int irq, void *devid, struct pt_regs *regs) 224 static irqreturn_t aaci_irq(int irq, void *devid, struct pt_regs *regs)
225 { 225 {
226 struct aaci *aaci = devid; 226 struct aaci *aaci = devid;
227 u32 mask; 227 u32 mask;
228 int i; 228 int i;
229 229
230 spin_lock(&aaci->lock); 230 spin_lock(&aaci->lock);
231 mask = readl(aaci->base + AACI_ALLINTS); 231 mask = readl(aaci->base + AACI_ALLINTS);
232 if (mask) { 232 if (mask) {
233 u32 m = mask; 233 u32 m = mask;
234 for (i = 0; i < 4; i++, m >>= 7) { 234 for (i = 0; i < 4; i++, m >>= 7) {
235 if (m & 0x7f) { 235 if (m & 0x7f) {
236 aaci_fifo_irq(aaci, m); 236 aaci_fifo_irq(aaci, m);
237 } 237 }
238 } 238 }
239 } 239 }
240 spin_unlock(&aaci->lock); 240 spin_unlock(&aaci->lock);
241 241
242 return mask ? IRQ_HANDLED : IRQ_NONE; 242 return mask ? IRQ_HANDLED : IRQ_NONE;
243 } 243 }
244 244
245 245
246 246
247 /* 247 /*
248 * ALSA support. 248 * ALSA support.
249 */ 249 */
250 250
251 struct aaci_stream { 251 struct aaci_stream {
252 unsigned char codec_idx; 252 unsigned char codec_idx;
253 unsigned char rate_idx; 253 unsigned char rate_idx;
254 }; 254 };
255 255
256 static struct aaci_stream aaci_streams[] = { 256 static struct aaci_stream aaci_streams[] = {
257 [ACSTREAM_FRONT] = { 257 [ACSTREAM_FRONT] = {
258 .codec_idx = 0, 258 .codec_idx = 0,
259 .rate_idx = AC97_RATES_FRONT_DAC, 259 .rate_idx = AC97_RATES_FRONT_DAC,
260 }, 260 },
261 [ACSTREAM_SURROUND] = { 261 [ACSTREAM_SURROUND] = {
262 .codec_idx = 0, 262 .codec_idx = 0,
263 .rate_idx = AC97_RATES_SURR_DAC, 263 .rate_idx = AC97_RATES_SURR_DAC,
264 }, 264 },
265 [ACSTREAM_LFE] = { 265 [ACSTREAM_LFE] = {
266 .codec_idx = 0, 266 .codec_idx = 0,
267 .rate_idx = AC97_RATES_LFE_DAC, 267 .rate_idx = AC97_RATES_LFE_DAC,
268 }, 268 },
269 }; 269 };
270 270
271 static inline unsigned int aaci_rate_mask(struct aaci *aaci, int streamid) 271 static inline unsigned int aaci_rate_mask(struct aaci *aaci, int streamid)
272 { 272 {
273 struct aaci_stream *s = aaci_streams + streamid; 273 struct aaci_stream *s = aaci_streams + streamid;
274 return aaci->ac97_bus->codec[s->codec_idx]->rates[s->rate_idx]; 274 return aaci->ac97_bus->codec[s->codec_idx]->rates[s->rate_idx];
275 } 275 }
276 276
277 static unsigned int rate_list[] = { 277 static unsigned int rate_list[] = {
278 5512, 8000, 11025, 16000, 22050, 32000, 44100, 278 5512, 8000, 11025, 16000, 22050, 32000, 44100,
279 48000, 64000, 88200, 96000, 176400, 192000 279 48000, 64000, 88200, 96000, 176400, 192000
280 }; 280 };
281 281
282 /* 282 /*
283 * Double-rate rule: we can support double rate iff channels == 2 283 * Double-rate rule: we can support double rate iff channels == 2
284 * (unimplemented) 284 * (unimplemented)
285 */ 285 */
286 static int 286 static int
287 aaci_rule_rate_by_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule) 287 aaci_rule_rate_by_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
288 { 288 {
289 struct aaci *aaci = rule->private; 289 struct aaci *aaci = rule->private;
290 unsigned int rate_mask = SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_5512; 290 unsigned int rate_mask = SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_5512;
291 struct snd_interval *c = hw_param_interval(p, SNDRV_PCM_HW_PARAM_CHANNELS); 291 struct snd_interval *c = hw_param_interval(p, SNDRV_PCM_HW_PARAM_CHANNELS);
292 292
293 switch (c->max) { 293 switch (c->max) {
294 case 6: 294 case 6:
295 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_LFE); 295 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_LFE);
296 case 4: 296 case 4:
297 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_SURROUND); 297 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_SURROUND);
298 case 2: 298 case 2:
299 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_FRONT); 299 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_FRONT);
300 } 300 }
301 301
302 return snd_interval_list(hw_param_interval(p, rule->var), 302 return snd_interval_list(hw_param_interval(p, rule->var),
303 ARRAY_SIZE(rate_list), rate_list, 303 ARRAY_SIZE(rate_list), rate_list,
304 rate_mask); 304 rate_mask);
305 } 305 }
306 306
307 static struct snd_pcm_hardware aaci_hw_info = { 307 static struct snd_pcm_hardware aaci_hw_info = {
308 .info = SNDRV_PCM_INFO_MMAP | 308 .info = SNDRV_PCM_INFO_MMAP |
309 SNDRV_PCM_INFO_MMAP_VALID | 309 SNDRV_PCM_INFO_MMAP_VALID |
310 SNDRV_PCM_INFO_INTERLEAVED | 310 SNDRV_PCM_INFO_INTERLEAVED |
311 SNDRV_PCM_INFO_BLOCK_TRANSFER | 311 SNDRV_PCM_INFO_BLOCK_TRANSFER |
312 SNDRV_PCM_INFO_RESUME, 312 SNDRV_PCM_INFO_RESUME,
313 313
314 /* 314 /*
315 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit 315 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
316 * words. It also doesn't support 12-bit at all. 316 * words. It also doesn't support 12-bit at all.
317 */ 317 */
318 .formats = SNDRV_PCM_FMTBIT_S16_LE, 318 .formats = SNDRV_PCM_FMTBIT_S16_LE,
319 319
320 /* should this be continuous or knot? */ 320 /* should this be continuous or knot? */
321 .rates = SNDRV_PCM_RATE_CONTINUOUS, 321 .rates = SNDRV_PCM_RATE_CONTINUOUS,
322 .rate_max = 48000, 322 .rate_max = 48000,
323 .rate_min = 4000, 323 .rate_min = 4000,
324 .channels_min = 2, 324 .channels_min = 2,
325 .channels_max = 6, 325 .channels_max = 6,
326 .buffer_bytes_max = 64 * 1024, 326 .buffer_bytes_max = 64 * 1024,
327 .period_bytes_min = 256, 327 .period_bytes_min = 256,
328 .period_bytes_max = PAGE_SIZE, 328 .period_bytes_max = PAGE_SIZE,
329 .periods_min = 4, 329 .periods_min = 4,
330 .periods_max = PAGE_SIZE / 16, 330 .periods_max = PAGE_SIZE / 16,
331 }; 331 };
332 332
333 static int aaci_pcm_open(struct aaci *aaci, struct snd_pcm_substream *substream, 333 static int aaci_pcm_open(struct aaci *aaci, struct snd_pcm_substream *substream,
334 struct aaci_runtime *aacirun) 334 struct aaci_runtime *aacirun)
335 { 335 {
336 struct snd_pcm_runtime *runtime = substream->runtime; 336 struct snd_pcm_runtime *runtime = substream->runtime;
337 int ret; 337 int ret;
338 338
339 aacirun->substream = substream; 339 aacirun->substream = substream;
340 runtime->private_data = aacirun; 340 runtime->private_data = aacirun;
341 runtime->hw = aaci_hw_info; 341 runtime->hw = aaci_hw_info;
342 342
343 /* 343 /*
344 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal 344 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
345 * mode, each 32-bit word contains one sample. If we're in 345 * mode, each 32-bit word contains one sample. If we're in
346 * compact mode, each 32-bit word contains two samples, effectively 346 * compact mode, each 32-bit word contains two samples, effectively
347 * halving the FIFO size. However, we don't know for sure which 347 * halving the FIFO size. However, we don't know for sure which
348 * we'll be using at this point. We set this to the lower limit. 348 * we'll be using at this point. We set this to the lower limit.
349 */ 349 */
350 runtime->hw.fifo_size = aaci->fifosize * 2; 350 runtime->hw.fifo_size = aaci->fifosize * 2;
351 351
352 /* 352 /*
353 * Add rule describing hardware rate dependency 353 * Add rule describing hardware rate dependency
354 * on the number of channels. 354 * on the number of channels.
355 */ 355 */
356 ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 356 ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
357 aaci_rule_rate_by_channels, aaci, 357 aaci_rule_rate_by_channels, aaci,
358 SNDRV_PCM_HW_PARAM_CHANNELS, 358 SNDRV_PCM_HW_PARAM_CHANNELS,
359 SNDRV_PCM_HW_PARAM_RATE, -1); 359 SNDRV_PCM_HW_PARAM_RATE, -1);
360 if (ret) 360 if (ret)
361 goto out; 361 goto out;
362 362
363 ret = request_irq(aaci->dev->irq[0], aaci_irq, SA_SHIRQ|SA_INTERRUPT, 363 ret = request_irq(aaci->dev->irq[0], aaci_irq, SA_SHIRQ|SA_INTERRUPT,
364 DRIVER_NAME, aaci); 364 DRIVER_NAME, aaci);
365 if (ret) 365 if (ret)
366 goto out; 366 goto out;
367 367
368 return 0; 368 return 0;
369 369
370 out: 370 out:
371 return ret; 371 return ret;
372 } 372 }
373 373
374 374
375 /* 375 /*
376 * Common ALSA stuff 376 * Common ALSA stuff
377 */ 377 */
378 static int aaci_pcm_close(struct snd_pcm_substream *substream) 378 static int aaci_pcm_close(struct snd_pcm_substream *substream)
379 { 379 {
380 struct aaci *aaci = substream->private_data; 380 struct aaci *aaci = substream->private_data;
381 struct aaci_runtime *aacirun = substream->runtime->private_data; 381 struct aaci_runtime *aacirun = substream->runtime->private_data;
382 382
383 WARN_ON(aacirun->cr & TXCR_TXEN); 383 WARN_ON(aacirun->cr & TXCR_TXEN);
384 384
385 aacirun->substream = NULL; 385 aacirun->substream = NULL;
386 free_irq(aaci->dev->irq[0], aaci); 386 free_irq(aaci->dev->irq[0], aaci);
387 387
388 return 0; 388 return 0;
389 } 389 }
390 390
391 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream) 391 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
392 { 392 {
393 struct aaci_runtime *aacirun = substream->runtime->private_data; 393 struct aaci_runtime *aacirun = substream->runtime->private_data;
394 394
395 /* 395 /*
396 * This must not be called with the device enabled. 396 * This must not be called with the device enabled.
397 */ 397 */
398 WARN_ON(aacirun->cr & TXCR_TXEN); 398 WARN_ON(aacirun->cr & TXCR_TXEN);
399 399
400 if (aacirun->pcm_open) 400 if (aacirun->pcm_open)
401 snd_ac97_pcm_close(aacirun->pcm); 401 snd_ac97_pcm_close(aacirun->pcm);
402 aacirun->pcm_open = 0; 402 aacirun->pcm_open = 0;
403 403
404 /* 404 /*
405 * Clear out the DMA and any allocated buffers. 405 * Clear out the DMA and any allocated buffers.
406 */ 406 */
407 devdma_hw_free(NULL, substream); 407 devdma_hw_free(NULL, substream);
408 408
409 return 0; 409 return 0;
410 } 410 }
411 411
412 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream, 412 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
413 struct aaci_runtime *aacirun, 413 struct aaci_runtime *aacirun,
414 struct snd_pcm_hw_params *params) 414 struct snd_pcm_hw_params *params)
415 { 415 {
416 int err; 416 int err;
417 417
418 aaci_pcm_hw_free(substream); 418 aaci_pcm_hw_free(substream);
419 419
420 err = devdma_hw_alloc(NULL, substream, 420 err = devdma_hw_alloc(NULL, substream,
421 params_buffer_bytes(params)); 421 params_buffer_bytes(params));
422 if (err < 0) 422 if (err < 0)
423 goto out; 423 goto out;
424 424
425 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params), 425 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
426 params_channels(params), 426 params_channels(params),
427 aacirun->pcm->r[0].slots); 427 aacirun->pcm->r[0].slots);
428 if (err) 428 if (err)
429 goto out; 429 goto out;
430 430
431 aacirun->pcm_open = 1; 431 aacirun->pcm_open = 1;
432 432
433 out: 433 out:
434 return err; 434 return err;
435 } 435 }
436 436
437 static int aaci_pcm_prepare(struct snd_pcm_substream *substream) 437 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
438 { 438 {
439 struct snd_pcm_runtime *runtime = substream->runtime; 439 struct snd_pcm_runtime *runtime = substream->runtime;
440 struct aaci_runtime *aacirun = runtime->private_data; 440 struct aaci_runtime *aacirun = runtime->private_data;
441 441
442 aacirun->start = (void *)runtime->dma_area; 442 aacirun->start = (void *)runtime->dma_area;
443 aacirun->end = aacirun->start + runtime->dma_bytes; 443 aacirun->end = aacirun->start + runtime->dma_bytes;
444 aacirun->ptr = aacirun->start; 444 aacirun->ptr = aacirun->start;
445 aacirun->period = 445 aacirun->period =
446 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size); 446 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
447 447
448 return 0; 448 return 0;
449 } 449 }
450 450
451 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream) 451 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
452 { 452 {
453 struct snd_pcm_runtime *runtime = substream->runtime; 453 struct snd_pcm_runtime *runtime = substream->runtime;
454 struct aaci_runtime *aacirun = runtime->private_data; 454 struct aaci_runtime *aacirun = runtime->private_data;
455 ssize_t bytes = aacirun->ptr - aacirun->start; 455 ssize_t bytes = aacirun->ptr - aacirun->start;
456 456
457 return bytes_to_frames(runtime, bytes); 457 return bytes_to_frames(runtime, bytes);
458 } 458 }
459 459
460 static int aaci_pcm_mmap(struct snd_pcm_substream *substream, struct vm_area_struct *vma) 460 static int aaci_pcm_mmap(struct snd_pcm_substream *substream, struct vm_area_struct *vma)
461 { 461 {
462 return devdma_mmap(NULL, substream, vma); 462 return devdma_mmap(NULL, substream, vma);
463 } 463 }
464 464
465 465
466 /* 466 /*
467 * Playback specific ALSA stuff 467 * Playback specific ALSA stuff
468 */ 468 */
469 static const u32 channels_to_txmask[] = { 469 static const u32 channels_to_txmask[] = {
470 [2] = TXCR_TX3 | TXCR_TX4, 470 [2] = TXCR_TX3 | TXCR_TX4,
471 [4] = TXCR_TX3 | TXCR_TX4 | TXCR_TX7 | TXCR_TX8, 471 [4] = TXCR_TX3 | TXCR_TX4 | TXCR_TX7 | TXCR_TX8,
472 [6] = TXCR_TX3 | TXCR_TX4 | TXCR_TX7 | TXCR_TX8 | TXCR_TX6 | TXCR_TX9, 472 [6] = TXCR_TX3 | TXCR_TX4 | TXCR_TX7 | TXCR_TX8 | TXCR_TX6 | TXCR_TX9,
473 }; 473 };
474 474
475 /* 475 /*
476 * We can support two and four channel audio. Unfortunately 476 * We can support two and four channel audio. Unfortunately
477 * six channel audio requires a non-standard channel ordering: 477 * six channel audio requires a non-standard channel ordering:
478 * 2 -> FL(3), FR(4) 478 * 2 -> FL(3), FR(4)
479 * 4 -> FL(3), FR(4), SL(7), SR(8) 479 * 4 -> FL(3), FR(4), SL(7), SR(8)
480 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required) 480 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
481 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual) 481 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
482 * This requires an ALSA configuration file to correct. 482 * This requires an ALSA configuration file to correct.
483 */ 483 */
484 static unsigned int channel_list[] = { 2, 4, 6 }; 484 static unsigned int channel_list[] = { 2, 4, 6 };
485 485
486 static int 486 static int
487 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule) 487 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
488 { 488 {
489 struct aaci *aaci = rule->private; 489 struct aaci *aaci = rule->private;
490 unsigned int chan_mask = 1 << 0, slots; 490 unsigned int chan_mask = 1 << 0, slots;
491 491
492 /* 492 /*
493 * pcms[0] is the our 5.1 PCM instance. 493 * pcms[0] is the our 5.1 PCM instance.
494 */ 494 */
495 slots = aaci->ac97_bus->pcms[0].r[0].slots; 495 slots = aaci->ac97_bus->pcms[0].r[0].slots;
496 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) { 496 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
497 chan_mask |= 1 << 1; 497 chan_mask |= 1 << 1;
498 if (slots & (1 << AC97_SLOT_LFE)) 498 if (slots & (1 << AC97_SLOT_LFE))
499 chan_mask |= 1 << 2; 499 chan_mask |= 1 << 2;
500 } 500 }
501 501
502 return snd_interval_list(hw_param_interval(p, rule->var), 502 return snd_interval_list(hw_param_interval(p, rule->var),
503 ARRAY_SIZE(channel_list), channel_list, 503 ARRAY_SIZE(channel_list), channel_list,
504 chan_mask); 504 chan_mask);
505 } 505 }
506 506
507 static int aaci_pcm_playback_open(struct snd_pcm_substream *substream) 507 static int aaci_pcm_playback_open(struct snd_pcm_substream *substream)
508 { 508 {
509 struct aaci *aaci = substream->private_data; 509 struct aaci *aaci = substream->private_data;
510 int ret; 510 int ret;
511 511
512 /* 512 /*
513 * Add rule describing channel dependency. 513 * Add rule describing channel dependency.
514 */ 514 */
515 ret = snd_pcm_hw_rule_add(substream->runtime, 0, 515 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
516 SNDRV_PCM_HW_PARAM_CHANNELS, 516 SNDRV_PCM_HW_PARAM_CHANNELS,
517 aaci_rule_channels, aaci, 517 aaci_rule_channels, aaci,
518 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 518 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
519 if (ret) 519 if (ret)
520 return ret; 520 return ret;
521 521
522 return aaci_pcm_open(aaci, substream, &aaci->playback); 522 return aaci_pcm_open(aaci, substream, &aaci->playback);
523 } 523 }
524 524
525 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream, 525 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
526 struct snd_pcm_hw_params *params) 526 struct snd_pcm_hw_params *params)
527 { 527 {
528 struct aaci *aaci = substream->private_data; 528 struct aaci *aaci = substream->private_data;
529 struct aaci_runtime *aacirun = substream->runtime->private_data; 529 struct aaci_runtime *aacirun = substream->runtime->private_data;
530 unsigned int channels = params_channels(params); 530 unsigned int channels = params_channels(params);
531 int ret; 531 int ret;
532 532
533 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) || 533 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
534 !channels_to_txmask[channels]); 534 !channels_to_txmask[channels]);
535 535
536 ret = aaci_pcm_hw_params(substream, aacirun, params); 536 ret = aaci_pcm_hw_params(substream, aacirun, params);
537 537
538 /* 538 /*
539 * Enable FIFO, compact mode, 16 bits per sample. 539 * Enable FIFO, compact mode, 16 bits per sample.
540 * FIXME: double rate slots? 540 * FIXME: double rate slots?
541 */ 541 */
542 if (ret >= 0) { 542 if (ret >= 0) {
543 aacirun->cr = TXCR_FEN | TXCR_COMPACT | TXCR_TSZ16; 543 aacirun->cr = TXCR_FEN | TXCR_COMPACT | TXCR_TSZ16;
544 aacirun->cr |= channels_to_txmask[channels]; 544 aacirun->cr |= channels_to_txmask[channels];
545 545
546 aacirun->fifosz = aaci->fifosize * 4; 546 aacirun->fifosz = aaci->fifosize * 4;
547 if (aacirun->cr & TXCR_COMPACT) 547 if (aacirun->cr & TXCR_COMPACT)
548 aacirun->fifosz >>= 1; 548 aacirun->fifosz >>= 1;
549 } 549 }
550 return ret; 550 return ret;
551 } 551 }
552 552
553 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun) 553 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
554 { 554 {
555 u32 ie; 555 u32 ie;
556 556
557 ie = readl(aacirun->base + AACI_IE); 557 ie = readl(aacirun->base + AACI_IE);
558 ie &= ~(IE_URIE|IE_TXIE); 558 ie &= ~(IE_URIE|IE_TXIE);
559 writel(ie, aacirun->base + AACI_IE); 559 writel(ie, aacirun->base + AACI_IE);
560 aacirun->cr &= ~TXCR_TXEN; 560 aacirun->cr &= ~TXCR_TXEN;
561 aaci_chan_wait_ready(aacirun); 561 aaci_chan_wait_ready(aacirun);
562 writel(aacirun->cr, aacirun->base + AACI_TXCR); 562 writel(aacirun->cr, aacirun->base + AACI_TXCR);
563 } 563 }
564 564
565 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun) 565 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
566 { 566 {
567 u32 ie; 567 u32 ie;
568 568
569 aaci_chan_wait_ready(aacirun); 569 aaci_chan_wait_ready(aacirun);
570 aacirun->cr |= TXCR_TXEN; 570 aacirun->cr |= TXCR_TXEN;
571 571
572 ie = readl(aacirun->base + AACI_IE); 572 ie = readl(aacirun->base + AACI_IE);
573 ie |= IE_URIE | IE_TXIE; 573 ie |= IE_URIE | IE_TXIE;
574 writel(ie, aacirun->base + AACI_IE); 574 writel(ie, aacirun->base + AACI_IE);
575 writel(aacirun->cr, aacirun->base + AACI_TXCR); 575 writel(aacirun->cr, aacirun->base + AACI_TXCR);
576 } 576 }
577 577
578 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd) 578 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
579 { 579 {
580 struct aaci *aaci = substream->private_data; 580 struct aaci *aaci = substream->private_data;
581 struct aaci_runtime *aacirun = substream->runtime->private_data; 581 struct aaci_runtime *aacirun = substream->runtime->private_data;
582 unsigned long flags; 582 unsigned long flags;
583 int ret = 0; 583 int ret = 0;
584 584
585 spin_lock_irqsave(&aaci->lock, flags); 585 spin_lock_irqsave(&aaci->lock, flags);
586 switch (cmd) { 586 switch (cmd) {
587 case SNDRV_PCM_TRIGGER_START: 587 case SNDRV_PCM_TRIGGER_START:
588 aaci_pcm_playback_start(aacirun); 588 aaci_pcm_playback_start(aacirun);
589 break; 589 break;
590 590
591 case SNDRV_PCM_TRIGGER_RESUME: 591 case SNDRV_PCM_TRIGGER_RESUME:
592 aaci_pcm_playback_start(aacirun); 592 aaci_pcm_playback_start(aacirun);
593 break; 593 break;
594 594
595 case SNDRV_PCM_TRIGGER_STOP: 595 case SNDRV_PCM_TRIGGER_STOP:
596 aaci_pcm_playback_stop(aacirun); 596 aaci_pcm_playback_stop(aacirun);
597 break; 597 break;
598 598
599 case SNDRV_PCM_TRIGGER_SUSPEND: 599 case SNDRV_PCM_TRIGGER_SUSPEND:
600 aaci_pcm_playback_stop(aacirun); 600 aaci_pcm_playback_stop(aacirun);
601 break; 601 break;
602 602
603 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 603 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
604 break; 604 break;
605 605
606 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 606 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
607 break; 607 break;
608 608
609 default: 609 default:
610 ret = -EINVAL; 610 ret = -EINVAL;
611 } 611 }
612 spin_unlock_irqrestore(&aaci->lock, flags); 612 spin_unlock_irqrestore(&aaci->lock, flags);
613 613
614 return ret; 614 return ret;
615 } 615 }
616 616
617 static struct snd_pcm_ops aaci_playback_ops = { 617 static struct snd_pcm_ops aaci_playback_ops = {
618 .open = aaci_pcm_playback_open, 618 .open = aaci_pcm_playback_open,
619 .close = aaci_pcm_close, 619 .close = aaci_pcm_close,
620 .ioctl = snd_pcm_lib_ioctl, 620 .ioctl = snd_pcm_lib_ioctl,
621 .hw_params = aaci_pcm_playback_hw_params, 621 .hw_params = aaci_pcm_playback_hw_params,
622 .hw_free = aaci_pcm_hw_free, 622 .hw_free = aaci_pcm_hw_free,
623 .prepare = aaci_pcm_prepare, 623 .prepare = aaci_pcm_prepare,
624 .trigger = aaci_pcm_playback_trigger, 624 .trigger = aaci_pcm_playback_trigger,
625 .pointer = aaci_pcm_pointer, 625 .pointer = aaci_pcm_pointer,
626 .mmap = aaci_pcm_mmap, 626 .mmap = aaci_pcm_mmap,
627 }; 627 };
628 628
629 629
630 630
631 /* 631 /*
632 * Power Management. 632 * Power Management.
633 */ 633 */
634 #ifdef CONFIG_PM 634 #ifdef CONFIG_PM
635 static int aaci_do_suspend(struct snd_card *card, unsigned int state) 635 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
636 { 636 {
637 struct aaci *aaci = card->private_data; 637 struct aaci *aaci = card->private_data;
638 if (aaci->card->power_state != SNDRV_CTL_POWER_D3cold) { 638 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
639 snd_pcm_suspend_all(aaci->pcm); 639 snd_pcm_suspend_all(aaci->pcm);
640 snd_power_change_state(aaci->card, SNDRV_CTL_POWER_D3cold);
641 }
642 return 0; 640 return 0;
643 } 641 }
644 642
645 static int aaci_do_resume(struct snd_card *card, unsigned int state) 643 static int aaci_do_resume(struct snd_card *card, unsigned int state)
646 { 644 {
647 struct aaci *aaci = card->private_data; 645 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
648 if (aaci->card->power_state != SNDRV_CTL_POWER_D0) {
649 snd_power_change_state(aaci->card, SNDRV_CTL_POWER_D0);
650 }
651 return 0; 646 return 0;
652 } 647 }
653 648
654 static int aaci_suspend(struct amba_device *dev, pm_message_t state) 649 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
655 { 650 {
656 struct snd_card *card = amba_get_drvdata(dev); 651 struct snd_card *card = amba_get_drvdata(dev);
657 return card ? aaci_do_suspend(card) : 0; 652 return card ? aaci_do_suspend(card) : 0;
658 } 653 }
659 654
660 static int aaci_resume(struct amba_device *dev) 655 static int aaci_resume(struct amba_device *dev)
661 { 656 {
662 struct snd_card *card = amba_get_drvdata(dev); 657 struct snd_card *card = amba_get_drvdata(dev);
663 return card ? aaci_do_resume(card) : 0; 658 return card ? aaci_do_resume(card) : 0;
664 } 659 }
665 #else 660 #else
666 #define aaci_do_suspend NULL 661 #define aaci_do_suspend NULL
667 #define aaci_do_resume NULL 662 #define aaci_do_resume NULL
668 #define aaci_suspend NULL 663 #define aaci_suspend NULL
669 #define aaci_resume NULL 664 #define aaci_resume NULL
670 #endif 665 #endif
671 666
672 667
673 static struct ac97_pcm ac97_defs[] __devinitdata = { 668 static struct ac97_pcm ac97_defs[] __devinitdata = {
674 [0] = { /* Front PCM */ 669 [0] = { /* Front PCM */
675 .exclusive = 1, 670 .exclusive = 1,
676 .r = { 671 .r = {
677 [0] = { 672 [0] = {
678 .slots = (1 << AC97_SLOT_PCM_LEFT) | 673 .slots = (1 << AC97_SLOT_PCM_LEFT) |
679 (1 << AC97_SLOT_PCM_RIGHT) | 674 (1 << AC97_SLOT_PCM_RIGHT) |
680 (1 << AC97_SLOT_PCM_CENTER) | 675 (1 << AC97_SLOT_PCM_CENTER) |
681 (1 << AC97_SLOT_PCM_SLEFT) | 676 (1 << AC97_SLOT_PCM_SLEFT) |
682 (1 << AC97_SLOT_PCM_SRIGHT) | 677 (1 << AC97_SLOT_PCM_SRIGHT) |
683 (1 << AC97_SLOT_LFE), 678 (1 << AC97_SLOT_LFE),
684 }, 679 },
685 }, 680 },
686 }, 681 },
687 [1] = { /* PCM in */ 682 [1] = { /* PCM in */
688 .stream = 1, 683 .stream = 1,
689 .exclusive = 1, 684 .exclusive = 1,
690 .r = { 685 .r = {
691 [0] = { 686 [0] = {
692 .slots = (1 << AC97_SLOT_PCM_LEFT) | 687 .slots = (1 << AC97_SLOT_PCM_LEFT) |
693 (1 << AC97_SLOT_PCM_RIGHT), 688 (1 << AC97_SLOT_PCM_RIGHT),
694 }, 689 },
695 }, 690 },
696 }, 691 },
697 [2] = { /* Mic in */ 692 [2] = { /* Mic in */
698 .stream = 1, 693 .stream = 1,
699 .exclusive = 1, 694 .exclusive = 1,
700 .r = { 695 .r = {
701 [0] = { 696 [0] = {
702 .slots = (1 << AC97_SLOT_MIC), 697 .slots = (1 << AC97_SLOT_MIC),
703 }, 698 },
704 }, 699 },
705 } 700 }
706 }; 701 };
707 702
708 static struct snd_ac97_bus_ops aaci_bus_ops = { 703 static struct snd_ac97_bus_ops aaci_bus_ops = {
709 .write = aaci_ac97_write, 704 .write = aaci_ac97_write,
710 .read = aaci_ac97_read, 705 .read = aaci_ac97_read,
711 }; 706 };
712 707
713 static int __devinit aaci_probe_ac97(struct aaci *aaci) 708 static int __devinit aaci_probe_ac97(struct aaci *aaci)
714 { 709 {
715 struct snd_ac97_template ac97_template; 710 struct snd_ac97_template ac97_template;
716 struct snd_ac97_bus *ac97_bus; 711 struct snd_ac97_bus *ac97_bus;
717 struct snd_ac97 *ac97; 712 struct snd_ac97 *ac97;
718 int ret; 713 int ret;
719 714
720 /* 715 /*
721 * Assert AACIRESET for 2us 716 * Assert AACIRESET for 2us
722 */ 717 */
723 writel(0, aaci->base + AACI_RESET); 718 writel(0, aaci->base + AACI_RESET);
724 udelay(2); 719 udelay(2);
725 writel(RESET_NRST, aaci->base + AACI_RESET); 720 writel(RESET_NRST, aaci->base + AACI_RESET);
726 721
727 /* 722 /*
728 * Give the AC'97 codec more than enough time 723 * Give the AC'97 codec more than enough time
729 * to wake up. (42us = ~2 frames at 48kHz.) 724 * to wake up. (42us = ~2 frames at 48kHz.)
730 */ 725 */
731 udelay(42); 726 udelay(42);
732 727
733 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus); 728 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
734 if (ret) 729 if (ret)
735 goto out; 730 goto out;
736 731
737 ac97_bus->clock = 48000; 732 ac97_bus->clock = 48000;
738 aaci->ac97_bus = ac97_bus; 733 aaci->ac97_bus = ac97_bus;
739 734
740 memset(&ac97_template, 0, sizeof(struct snd_ac97_template)); 735 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
741 ac97_template.private_data = aaci; 736 ac97_template.private_data = aaci;
742 ac97_template.num = 0; 737 ac97_template.num = 0;
743 ac97_template.scaps = AC97_SCAP_SKIP_MODEM; 738 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
744 739
745 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97); 740 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
746 if (ret) 741 if (ret)
747 goto out; 742 goto out;
748 743
749 /* 744 /*
750 * Disable AC97 PC Beep input on audio codecs. 745 * Disable AC97 PC Beep input on audio codecs.
751 */ 746 */
752 if (ac97_is_audio(ac97)) 747 if (ac97_is_audio(ac97))
753 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e); 748 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
754 749
755 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs); 750 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
756 if (ret) 751 if (ret)
757 goto out; 752 goto out;
758 753
759 aaci->playback.pcm = &ac97_bus->pcms[0]; 754 aaci->playback.pcm = &ac97_bus->pcms[0];
760 755
761 out: 756 out:
762 return ret; 757 return ret;
763 } 758 }
764 759
765 static void aaci_free_card(struct snd_card *card) 760 static void aaci_free_card(struct snd_card *card)
766 { 761 {
767 struct aaci *aaci = card->private_data; 762 struct aaci *aaci = card->private_data;
768 if (aaci->base) 763 if (aaci->base)
769 iounmap(aaci->base); 764 iounmap(aaci->base);
770 } 765 }
771 766
772 static struct aaci * __devinit aaci_init_card(struct amba_device *dev) 767 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
773 { 768 {
774 struct aaci *aaci; 769 struct aaci *aaci;
775 struct snd_card *card; 770 struct snd_card *card;
776 771
777 card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, 772 card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
778 THIS_MODULE, sizeof(struct aaci)); 773 THIS_MODULE, sizeof(struct aaci));
779 if (card == NULL) 774 if (card == NULL)
780 return ERR_PTR(-ENOMEM); 775 return ERR_PTR(-ENOMEM);
781 776
782 card->private_free = aaci_free_card; 777 card->private_free = aaci_free_card;
783 snd_card_set_pm_callback(card, aaci_do_suspend, aaci_do_resume, NULL);
784 778
785 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver)); 779 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
786 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname)); 780 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
787 snprintf(card->longname, sizeof(card->longname), 781 snprintf(card->longname, sizeof(card->longname),
788 "%s at 0x%08lx, irq %d", 782 "%s at 0x%08lx, irq %d",
789 card->shortname, dev->res.start, dev->irq[0]); 783 card->shortname, dev->res.start, dev->irq[0]);
790 784
791 aaci = card->private_data; 785 aaci = card->private_data;
792 init_MUTEX(&aaci->ac97_sem); 786 init_MUTEX(&aaci->ac97_sem);
793 spin_lock_init(&aaci->lock); 787 spin_lock_init(&aaci->lock);
794 aaci->card = card; 788 aaci->card = card;
795 aaci->dev = dev; 789 aaci->dev = dev;
796 790
797 /* Set MAINCR to allow slot 1 and 2 data IO */ 791 /* Set MAINCR to allow slot 1 and 2 data IO */
798 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN | 792 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
799 MAINCR_SL2RXEN | MAINCR_SL2TXEN; 793 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
800 794
801 return aaci; 795 return aaci;
802 } 796 }
803 797
804 static int __devinit aaci_init_pcm(struct aaci *aaci) 798 static int __devinit aaci_init_pcm(struct aaci *aaci)
805 { 799 {
806 struct snd_pcm *pcm; 800 struct snd_pcm *pcm;
807 int ret; 801 int ret;
808 802
809 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 0, &pcm); 803 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 0, &pcm);
810 if (ret == 0) { 804 if (ret == 0) {
811 aaci->pcm = pcm; 805 aaci->pcm = pcm;
812 pcm->private_data = aaci; 806 pcm->private_data = aaci;
813 pcm->info_flags = 0; 807 pcm->info_flags = 0;
814 808
815 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name)); 809 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
816 810
817 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops); 811 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
818 } 812 }
819 813
820 return ret; 814 return ret;
821 } 815 }
822 816
823 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci) 817 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
824 { 818 {
825 void __iomem *base = aaci->base + AACI_CSCH1; 819 void __iomem *base = aaci->base + AACI_CSCH1;
826 int i; 820 int i;
827 821
828 writel(TXCR_FEN | TXCR_TSZ16 | TXCR_TXEN, base + AACI_TXCR); 822 writel(TXCR_FEN | TXCR_TSZ16 | TXCR_TXEN, base + AACI_TXCR);
829 823
830 for (i = 0; !(readl(base + AACI_SR) & SR_TXFF) && i < 4096; i++) 824 for (i = 0; !(readl(base + AACI_SR) & SR_TXFF) && i < 4096; i++)
831 writel(0, aaci->base + AACI_DR1); 825 writel(0, aaci->base + AACI_DR1);
832 826
833 writel(0, base + AACI_TXCR); 827 writel(0, base + AACI_TXCR);
834 828
835 /* 829 /*
836 * Re-initialise the AACI after the FIFO depth test, to 830 * Re-initialise the AACI after the FIFO depth test, to
837 * ensure that the FIFOs are empty. Unfortunately, merely 831 * ensure that the FIFOs are empty. Unfortunately, merely
838 * disabling the channel doesn't clear the FIFO. 832 * disabling the channel doesn't clear the FIFO.
839 */ 833 */
840 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR); 834 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
841 writel(aaci->maincr, aaci->base + AACI_MAINCR); 835 writel(aaci->maincr, aaci->base + AACI_MAINCR);
842 836
843 /* 837 /*
844 * If we hit 4096, we failed. Go back to the specified 838 * If we hit 4096, we failed. Go back to the specified
845 * fifo depth. 839 * fifo depth.
846 */ 840 */
847 if (i == 4096) 841 if (i == 4096)
848 i = 8; 842 i = 8;
849 843
850 return i; 844 return i;
851 } 845 }
852 846
853 static int __devinit aaci_probe(struct amba_device *dev, void *id) 847 static int __devinit aaci_probe(struct amba_device *dev, void *id)
854 { 848 {
855 struct aaci *aaci; 849 struct aaci *aaci;
856 int ret, i; 850 int ret, i;
857 851
858 ret = amba_request_regions(dev, NULL); 852 ret = amba_request_regions(dev, NULL);
859 if (ret) 853 if (ret)
860 return ret; 854 return ret;
861 855
862 aaci = aaci_init_card(dev); 856 aaci = aaci_init_card(dev);
863 if (IS_ERR(aaci)) { 857 if (IS_ERR(aaci)) {
864 ret = PTR_ERR(aaci); 858 ret = PTR_ERR(aaci);
865 goto out; 859 goto out;
866 } 860 }
867 861
868 aaci->base = ioremap(dev->res.start, SZ_4K); 862 aaci->base = ioremap(dev->res.start, SZ_4K);
869 if (!aaci->base) { 863 if (!aaci->base) {
870 ret = -ENOMEM; 864 ret = -ENOMEM;
871 goto out; 865 goto out;
872 } 866 }
873 867
874 /* 868 /*
875 * Playback uses AACI channel 0 869 * Playback uses AACI channel 0
876 */ 870 */
877 aaci->playback.base = aaci->base + AACI_CSCH1; 871 aaci->playback.base = aaci->base + AACI_CSCH1;
878 aaci->playback.fifo = aaci->base + AACI_DR1; 872 aaci->playback.fifo = aaci->base + AACI_DR1;
879 873
880 for (i = 0; i < 4; i++) { 874 for (i = 0; i < 4; i++) {
881 void __iomem *base = aaci->base + i * 0x14; 875 void __iomem *base = aaci->base + i * 0x14;
882 876
883 writel(0, base + AACI_IE); 877 writel(0, base + AACI_IE);
884 writel(0, base + AACI_TXCR); 878 writel(0, base + AACI_TXCR);
885 writel(0, base + AACI_RXCR); 879 writel(0, base + AACI_RXCR);
886 } 880 }
887 881
888 writel(0x1fff, aaci->base + AACI_INTCLR); 882 writel(0x1fff, aaci->base + AACI_INTCLR);
889 writel(aaci->maincr, aaci->base + AACI_MAINCR); 883 writel(aaci->maincr, aaci->base + AACI_MAINCR);
890 884
891 /* 885 /*
892 * Size the FIFOs. 886 * Size the FIFOs.
893 */ 887 */
894 aaci->fifosize = aaci_size_fifo(aaci); 888 aaci->fifosize = aaci_size_fifo(aaci);
895 889
896 ret = aaci_probe_ac97(aaci); 890 ret = aaci_probe_ac97(aaci);
897 if (ret) 891 if (ret)
898 goto out; 892 goto out;
899 893
900 ret = aaci_init_pcm(aaci); 894 ret = aaci_init_pcm(aaci);
901 if (ret) 895 if (ret)
902 goto out; 896 goto out;
903 897
904 snd_card_set_dev(aaci->card, &dev->dev); 898 snd_card_set_dev(aaci->card, &dev->dev);
905 899
906 ret = snd_card_register(aaci->card); 900 ret = snd_card_register(aaci->card);
907 if (ret == 0) { 901 if (ret == 0) {
908 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname, 902 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
909 aaci->fifosize); 903 aaci->fifosize);
910 amba_set_drvdata(dev, aaci->card); 904 amba_set_drvdata(dev, aaci->card);
911 return ret; 905 return ret;
912 } 906 }
913 907
914 out: 908 out:
915 if (aaci) 909 if (aaci)
916 snd_card_free(aaci->card); 910 snd_card_free(aaci->card);
917 amba_release_regions(dev); 911 amba_release_regions(dev);
918 return ret; 912 return ret;
919 } 913 }
920 914
921 static int __devexit aaci_remove(struct amba_device *dev) 915 static int __devexit aaci_remove(struct amba_device *dev)
922 { 916 {
923 struct snd_card *card = amba_get_drvdata(dev); 917 struct snd_card *card = amba_get_drvdata(dev);
924 918
925 amba_set_drvdata(dev, NULL); 919 amba_set_drvdata(dev, NULL);
926 920
927 if (card) { 921 if (card) {
928 struct aaci *aaci = card->private_data; 922 struct aaci *aaci = card->private_data;
929 writel(0, aaci->base + AACI_MAINCR); 923 writel(0, aaci->base + AACI_MAINCR);
930 924
931 snd_card_free(card); 925 snd_card_free(card);
932 amba_release_regions(dev); 926 amba_release_regions(dev);
933 } 927 }
934 928
935 return 0; 929 return 0;
936 } 930 }
937 931
938 static struct amba_id aaci_ids[] = { 932 static struct amba_id aaci_ids[] = {
939 { 933 {
940 .id = 0x00041041, 934 .id = 0x00041041,
941 .mask = 0x000fffff, 935 .mask = 0x000fffff,
942 }, 936 },
943 { 0, 0 }, 937 { 0, 0 },
944 }; 938 };
945 939
946 static struct amba_driver aaci_driver = { 940 static struct amba_driver aaci_driver = {
947 .drv = { 941 .drv = {
948 .name = DRIVER_NAME, 942 .name = DRIVER_NAME,
949 }, 943 },
950 .probe = aaci_probe, 944 .probe = aaci_probe,
951 .remove = __devexit_p(aaci_remove), 945 .remove = __devexit_p(aaci_remove),
952 .suspend = aaci_suspend, 946 .suspend = aaci_suspend,
953 .resume = aaci_resume, 947 .resume = aaci_resume,
954 .id_table = aaci_ids, 948 .id_table = aaci_ids,
955 }; 949 };
956 950
957 static int __init aaci_init(void) 951 static int __init aaci_init(void)
958 { 952 {
959 return amba_driver_register(&aaci_driver); 953 return amba_driver_register(&aaci_driver);
960 } 954 }
961 955
962 static void __exit aaci_exit(void) 956 static void __exit aaci_exit(void)
963 { 957 {
964 amba_driver_unregister(&aaci_driver); 958 amba_driver_unregister(&aaci_driver);
965 } 959 }
966 960
967 module_init(aaci_init); 961 module_init(aaci_init);
968 module_exit(aaci_exit); 962 module_exit(aaci_exit);
969 963
970 MODULE_LICENSE("GPL"); 964 MODULE_LICENSE("GPL");
971 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver"); 965 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");
972 966
sound/arm/pxa2xx-ac97.c
Diff comments   View file @ 792a6c5
1 /* 1 /*
2 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip. 2 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
3 * 3 *
4 * Author: Nicolas Pitre 4 * Author: Nicolas Pitre
5 * Created: Dec 02, 2004 5 * Created: Dec 02, 2004
6 * Copyright: MontaVista Software Inc. 6 * Copyright: MontaVista Software Inc.
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12 12
13 #include <linux/init.h> 13 #include <linux/init.h>
14 #include <linux/module.h> 14 #include <linux/module.h>
15 #include <linux/kernel.h> 15 #include <linux/kernel.h>
16 #include <linux/platform_device.h> 16 #include <linux/platform_device.h>
17 #include <linux/interrupt.h> 17 #include <linux/interrupt.h>
18 #include <linux/wait.h> 18 #include <linux/wait.h>
19 #include <linux/delay.h> 19 #include <linux/delay.h>
20 20
21 #include <sound/driver.h> 21 #include <sound/driver.h>
22 #include <sound/core.h> 22 #include <sound/core.h>
23 #include <sound/pcm.h> 23 #include <sound/pcm.h>
24 #include <sound/ac97_codec.h> 24 #include <sound/ac97_codec.h>
25 #include <sound/initval.h> 25 #include <sound/initval.h>
26 26
27 #include <asm/irq.h> 27 #include <asm/irq.h>
28 #include <asm/semaphore.h> 28 #include <asm/semaphore.h>
29 #include <asm/hardware.h> 29 #include <asm/hardware.h>
30 #include <asm/arch/pxa-regs.h> 30 #include <asm/arch/pxa-regs.h>
31 #include <asm/arch/audio.h> 31 #include <asm/arch/audio.h>
32 32
33 #include "pxa2xx-pcm.h" 33 #include "pxa2xx-pcm.h"
34 34
35 35
36 static DECLARE_MUTEX(car_mutex); 36 static DECLARE_MUTEX(car_mutex);
37 static DECLARE_WAIT_QUEUE_HEAD(gsr_wq); 37 static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
38 static volatile long gsr_bits; 38 static volatile long gsr_bits;
39 39
40 static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 40 static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
41 { 41 {
42 unsigned short val = -1; 42 unsigned short val = -1;
43 volatile u32 *reg_addr; 43 volatile u32 *reg_addr;
44 44
45 down(&car_mutex); 45 down(&car_mutex);
46 if (CAR & CAR_CAIP) { 46 if (CAR & CAR_CAIP) {
47 printk(KERN_CRIT"%s: CAR_CAIP already set\n", __FUNCTION__); 47 printk(KERN_CRIT"%s: CAR_CAIP already set\n", __FUNCTION__);
48 goto out; 48 goto out;
49 } 49 }
50 50
51 /* set up primary or secondary codec space */ 51 /* set up primary or secondary codec space */
52 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE; 52 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
53 reg_addr += (reg >> 1); 53 reg_addr += (reg >> 1);
54 54
55 /* start read access across the ac97 link */ 55 /* start read access across the ac97 link */
56 gsr_bits = 0; 56 gsr_bits = 0;
57 val = *reg_addr; 57 val = *reg_addr;
58 if (reg == AC97_GPIO_STATUS) 58 if (reg == AC97_GPIO_STATUS)
59 goto out; 59 goto out;
60 wait_event_timeout(gsr_wq, gsr_bits & GSR_SDONE, 1); 60 wait_event_timeout(gsr_wq, gsr_bits & GSR_SDONE, 1);
61 if (!gsr_bits & GSR_SDONE) { 61 if (!gsr_bits & GSR_SDONE) {
62 printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n", 62 printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
63 __FUNCTION__, reg, gsr_bits); 63 __FUNCTION__, reg, gsr_bits);
64 val = -1; 64 val = -1;
65 goto out; 65 goto out;
66 } 66 }
67 67
68 /* valid data now */ 68 /* valid data now */
69 gsr_bits = 0; 69 gsr_bits = 0;
70 val = *reg_addr; 70 val = *reg_addr;
71 /* but we've just started another cycle... */ 71 /* but we've just started another cycle... */
72 wait_event_timeout(gsr_wq, gsr_bits & GSR_SDONE, 1); 72 wait_event_timeout(gsr_wq, gsr_bits & GSR_SDONE, 1);
73 73
74 out: up(&car_mutex); 74 out: up(&car_mutex);
75 return val; 75 return val;
76 } 76 }
77 77
78 static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val) 78 static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
79 { 79 {
80 volatile u32 *reg_addr; 80 volatile u32 *reg_addr;
81 81
82 down(&car_mutex); 82 down(&car_mutex);
83 83
84 if (CAR & CAR_CAIP) { 84 if (CAR & CAR_CAIP) {
85 printk(KERN_CRIT "%s: CAR_CAIP already set\n", __FUNCTION__); 85 printk(KERN_CRIT "%s: CAR_CAIP already set\n", __FUNCTION__);
86 goto out; 86 goto out;
87 } 87 }
88 88
89 /* set up primary or secondary codec space */ 89 /* set up primary or secondary codec space */
90 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE; 90 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
91 reg_addr += (reg >> 1); 91 reg_addr += (reg >> 1);
92 gsr_bits = 0; 92 gsr_bits = 0;
93 *reg_addr = val; 93 *reg_addr = val;
94 wait_event_timeout(gsr_wq, gsr_bits & GSR_CDONE, 1); 94 wait_event_timeout(gsr_wq, gsr_bits & GSR_CDONE, 1);
95 if (!gsr_bits & GSR_SDONE) 95 if (!gsr_bits & GSR_SDONE)
96 printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n", 96 printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
97 __FUNCTION__, reg, gsr_bits); 97 __FUNCTION__, reg, gsr_bits);
98 98
99 out: up(&car_mutex); 99 out: up(&car_mutex);
100 } 100 }
101 101
102 static void pxa2xx_ac97_reset(struct snd_ac97 *ac97) 102 static void pxa2xx_ac97_reset(struct snd_ac97 *ac97)
103 { 103 {
104 /* First, try cold reset */ 104 /* First, try cold reset */
105 GCR &= GCR_COLD_RST; /* clear everything but nCRST */ 105 GCR &= GCR_COLD_RST; /* clear everything but nCRST */
106 GCR &= ~GCR_COLD_RST; /* then assert nCRST */ 106 GCR &= ~GCR_COLD_RST; /* then assert nCRST */
107 107
108 gsr_bits = 0; 108 gsr_bits = 0;
109 #ifdef CONFIG_PXA27x 109 #ifdef CONFIG_PXA27x
110 /* PXA27x Developers Manual section 13.5.2.2.1 */ 110 /* PXA27x Developers Manual section 13.5.2.2.1 */
111 pxa_set_cken(1 << 31, 1); 111 pxa_set_cken(1 << 31, 1);
112 udelay(5); 112 udelay(5);
113 pxa_set_cken(1 << 31, 0); 113 pxa_set_cken(1 << 31, 0);
114 GCR = GCR_COLD_RST; 114 GCR = GCR_COLD_RST;
115 udelay(50); 115 udelay(50);
116 #else 116 #else
117 GCR = GCR_COLD_RST; 117 GCR = GCR_COLD_RST;
118 GCR |= GCR_CDONE_IE|GCR_SDONE_IE; 118 GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
119 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); 119 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
120 #endif 120 #endif
121 121
122 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) { 122 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) {
123 printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n", 123 printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
124 __FUNCTION__, gsr_bits); 124 __FUNCTION__, gsr_bits);
125 125
126 /* let's try warm reset */ 126 /* let's try warm reset */
127 gsr_bits = 0; 127 gsr_bits = 0;
128 #ifdef CONFIG_PXA27x 128 #ifdef CONFIG_PXA27x
129 /* warm reset broken on Bulverde, 129 /* warm reset broken on Bulverde,
130 so manually keep AC97 reset high */ 130 so manually keep AC97 reset high */
131 pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH); 131 pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH);
132 udelay(10); 132 udelay(10);
133 GCR |= GCR_WARM_RST; 133 GCR |= GCR_WARM_RST;
134 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); 134 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
135 udelay(500); 135 udelay(500);
136 #else 136 #else
137 GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN; 137 GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
138 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); 138 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
139 #endif 139 #endif
140 140
141 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) 141 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
142 printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n", 142 printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
143 __FUNCTION__, gsr_bits); 143 __FUNCTION__, gsr_bits);
144 } 144 }
145 145
146 GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN); 146 GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
147 GCR |= GCR_SDONE_IE|GCR_CDONE_IE; 147 GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
148 } 148 }
149 149
150 static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id, struct pt_regs *regs) 150 static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id, struct pt_regs *regs)
151 { 151 {
152 long status; 152 long status;
153 153
154 status = GSR; 154 status = GSR;
155 if (status) { 155 if (status) {
156 GSR = status; 156 GSR = status;
157 gsr_bits |= status; 157 gsr_bits |= status;
158 wake_up(&gsr_wq); 158 wake_up(&gsr_wq);
159 159
160 #ifdef CONFIG_PXA27x 160 #ifdef CONFIG_PXA27x
161 /* Although we don't use those we still need to clear them 161 /* Although we don't use those we still need to clear them
162 since they tend to spuriously trigger when MMC is used 162 since they tend to spuriously trigger when MMC is used
163 (hardware bug? go figure)... */ 163 (hardware bug? go figure)... */
164 MISR = MISR_EOC; 164 MISR = MISR_EOC;
165 PISR = PISR_EOC; 165 PISR = PISR_EOC;
166 MCSR = MCSR_EOC; 166 MCSR = MCSR_EOC;
167 #endif 167 #endif
168 168
169 return IRQ_HANDLED; 169 return IRQ_HANDLED;
170 } 170 }
171 171
172 return IRQ_NONE; 172 return IRQ_NONE;
173 } 173 }
174 174
175 static struct snd_ac97_bus_ops pxa2xx_ac97_ops = { 175 static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
176 .read = pxa2xx_ac97_read, 176 .read = pxa2xx_ac97_read,
177 .write = pxa2xx_ac97_write, 177 .write = pxa2xx_ac97_write,
178 .reset = pxa2xx_ac97_reset, 178 .reset = pxa2xx_ac97_reset,
179 }; 179 };
180 180
181 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out = { 181 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out = {
182 .name = "AC97 PCM out", 182 .name = "AC97 PCM out",
183 .dev_addr = __PREG(PCDR), 183 .dev_addr = __PREG(PCDR),
184 .drcmr = &DRCMRTXPCDR, 184 .drcmr = &DRCMRTXPCDR,
185 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG | 185 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
186 DCMD_BURST32 | DCMD_WIDTH4, 186 DCMD_BURST32 | DCMD_WIDTH4,
187 }; 187 };
188 188
189 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in = { 189 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in = {
190 .name = "AC97 PCM in", 190 .name = "AC97 PCM in",
191 .dev_addr = __PREG(PCDR), 191 .dev_addr = __PREG(PCDR),
192 .drcmr = &DRCMRRXPCDR, 192 .drcmr = &DRCMRRXPCDR,
193 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC | 193 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
194 DCMD_BURST32 | DCMD_WIDTH4, 194 DCMD_BURST32 | DCMD_WIDTH4,
195 }; 195 };
196 196
197 static struct snd_pcm *pxa2xx_ac97_pcm; 197 static struct snd_pcm *pxa2xx_ac97_pcm;
198 static struct snd_ac97 *pxa2xx_ac97_ac97; 198 static struct snd_ac97 *pxa2xx_ac97_ac97;
199 199
200 static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream) 200 static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream)
201 { 201 {
202 struct snd_pcm_runtime *runtime = substream->runtime; 202 struct snd_pcm_runtime *runtime = substream->runtime;
203 pxa2xx_audio_ops_t *platform_ops; 203 pxa2xx_audio_ops_t *platform_ops;
204 int r; 204 int r;
205 205
206 runtime->hw.channels_min = 2; 206 runtime->hw.channels_min = 2;
207 runtime->hw.channels_max = 2; 207 runtime->hw.channels_max = 2;
208 208
209 r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? 209 r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
210 AC97_RATES_FRONT_DAC : AC97_RATES_ADC; 210 AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
211 runtime->hw.rates = pxa2xx_ac97_ac97->rates[r]; 211 runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
212 snd_pcm_limit_hw_rates(runtime); 212 snd_pcm_limit_hw_rates(runtime);
213 213
214 platform_ops = substream->pcm->card->dev->platform_data; 214 platform_ops = substream->pcm->card->dev->platform_data;
215 if (platform_ops && platform_ops->startup) 215 if (platform_ops && platform_ops->startup)
216 return platform_ops->startup(substream, platform_ops->priv); 216 return platform_ops->startup(substream, platform_ops->priv);
217 else 217 else
218 return 0; 218 return 0;
219 } 219 }
220 220
221 static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream) 221 static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream)
222 { 222 {
223 pxa2xx_audio_ops_t *platform_ops; 223 pxa2xx_audio_ops_t *platform_ops;
224 224
225 platform_ops = substream->pcm->card->dev->platform_data; 225 platform_ops = substream->pcm->card->dev->platform_data;
226 if (platform_ops && platform_ops->shutdown) 226 if (platform_ops && platform_ops->shutdown)
227 platform_ops->shutdown(substream, platform_ops->priv); 227 platform_ops->shutdown(substream, platform_ops->priv);
228 } 228 }
229 229
230 static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream) 230 static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream)
231 { 231 {
232 struct snd_pcm_runtime *runtime = substream->runtime; 232 struct snd_pcm_runtime *runtime = substream->runtime;
233 int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? 233 int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
234 AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE; 234 AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
235 return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate); 235 return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
236 } 236 }
237 237
238 static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = { 238 static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = {
239 .playback_params = &pxa2xx_ac97_pcm_out, 239 .playback_params = &pxa2xx_ac97_pcm_out,
240 .capture_params = &pxa2xx_ac97_pcm_in, 240 .capture_params = &pxa2xx_ac97_pcm_in,
241 .startup = pxa2xx_ac97_pcm_startup, 241 .startup = pxa2xx_ac97_pcm_startup,
242 .shutdown = pxa2xx_ac97_pcm_shutdown, 242 .shutdown = pxa2xx_ac97_pcm_shutdown,
243 .prepare = pxa2xx_ac97_pcm_prepare, 243 .prepare = pxa2xx_ac97_pcm_prepare,
244 }; 244 };
245 245
246 #ifdef CONFIG_PM 246 #ifdef CONFIG_PM
247 247
248 static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state) 248 static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
249 { 249 {
250 if (card->power_state != SNDRV_CTL_POWER_D3cold) { 250 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
251 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
252 snd_pcm_suspend_all(pxa2xx_ac97_pcm);
253 snd_ac97_suspend(pxa2xx_ac97_ac97);
254 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
255 if (platform_ops && platform_ops->suspend)
256 platform_ops->suspend(platform_ops->priv);
257 GCR |= GCR_ACLINK_OFF;
258 pxa_set_cken(CKEN2_AC97, 0);
259 }
260 251
252 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
253 snd_pcm_suspend_all(pxa2xx_ac97_pcm);
254 snd_ac97_suspend(pxa2xx_ac97_ac97);
255 if (platform_ops && platform_ops->suspend)
256 platform_ops->suspend(platform_ops->priv);
257 GCR |= GCR_ACLINK_OFF;
258 pxa_set_cken(CKEN2_AC97, 0);
259
261 return 0; 260 return 0;
262 } 261 }
263 262
264 static int pxa2xx_ac97_do_resume(struct snd_card *card) 263 static int pxa2xx_ac97_do_resume(struct snd_card *card)
265 { 264 {
266 if (card->power_state != SNDRV_CTL_POWER_D0) { 265 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
267 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
268 pxa_set_cken(CKEN2_AC97, 1);
269 if (platform_ops && platform_ops->resume)
270 platform_ops->resume(platform_ops->priv);
271 snd_ac97_resume(pxa2xx_ac97_ac97);
272 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
273 }
274 266
267 pxa_set_cken(CKEN2_AC97, 1);
268 if (platform_ops && platform_ops->resume)
269 platform_ops->resume(platform_ops->priv);
270 snd_ac97_resume(pxa2xx_ac97_ac97);
271 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
272
275 return 0; 273 return 0;
276 } 274 }
277 275
278 static int pxa2xx_ac97_suspend(struct platform_device *dev, pm_message_t state) 276 static int pxa2xx_ac97_suspend(struct platform_device *dev, pm_message_t state)
279 { 277 {
280 struct snd_card *card = platform_get_drvdata(dev); 278 struct snd_card *card = platform_get_drvdata(dev);
281 int ret = 0; 279 int ret = 0;
282 280
283 if (card) 281 if (card)
284 ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND); 282 ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);
285 283
286 return ret; 284 return ret;
287 } 285 }
288 286
289 static int pxa2xx_ac97_resume(struct platform_device *dev) 287 static int pxa2xx_ac97_resume(struct platform_device *dev)
290 { 288 {
291 struct snd_card *card = platform_get_drvdata(dev); 289 struct snd_card *card = platform_get_drvdata(dev);
292 int ret = 0; 290 int ret = 0;
293 291
294 if (card) 292 if (card)
295 ret = pxa2xx_ac97_do_resume(card); 293 ret = pxa2xx_ac97_do_resume(card);
296 294
297 return ret; 295 return ret;
298 } 296 }
299 297
300 #else 298 #else
301 #define pxa2xx_ac97_suspend NULL 299 #define pxa2xx_ac97_suspend NULL
302 #define pxa2xx_ac97_resume NULL 300 #define pxa2xx_ac97_resume NULL
303 #endif 301 #endif
304 302
305 static int pxa2xx_ac97_probe(struct platform_device *dev) 303 static int pxa2xx_ac97_probe(struct platform_device *dev)
306 { 304 {
307 struct snd_card *card; 305 struct snd_card *card;
308 struct snd_ac97_bus *ac97_bus; 306 struct snd_ac97_bus *ac97_bus;
309 struct snd_ac97_template ac97_template; 307 struct snd_ac97_template ac97_template;
310 int ret; 308 int ret;
311 309
312 ret = -ENOMEM; 310 ret = -ENOMEM;
313 card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, 311 card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
314 THIS_MODULE, 0); 312 THIS_MODULE, 0);
315 if (!card) 313 if (!card)
316 goto err; 314 goto err;
317 315
318 card->dev = &dev->dev; 316 card->dev = &dev->dev;
319 strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver)); 317 strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));
320 318
321 ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm); 319 ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
322 if (ret) 320 if (ret)
323 goto err; 321 goto err;
324 322
325 ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL); 323 ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
326 if (ret < 0) 324 if (ret < 0)
327 goto err; 325 goto err;
328 326
329 pxa_gpio_mode(GPIO31_SYNC_AC97_MD); 327 pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
330 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD); 328 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
331 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD); 329 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
332 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD); 330 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
333 #ifdef CONFIG_PXA27x 331 #ifdef CONFIG_PXA27x
334 /* Use GPIO 113 as AC97 Reset on Bulverde */ 332 /* Use GPIO 113 as AC97 Reset on Bulverde */
335 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); 333 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
336 #endif 334 #endif
337 pxa_set_cken(CKEN2_AC97, 1); 335 pxa_set_cken(CKEN2_AC97, 1);
338 336
339 ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus); 337 ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
340 if (ret) 338 if (ret)
341 goto err; 339 goto err;
342 memset(&ac97_template, 0, sizeof(ac97_template)); 340 memset(&ac97_template, 0, sizeof(ac97_template));
343 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97); 341 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
344 if (ret) 342 if (ret)
345 goto err; 343 goto err;
346 344
347 snprintf(card->shortname, sizeof(card->shortname), 345 snprintf(card->shortname, sizeof(card->shortname),
348 "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97)); 346 "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
349 snprintf(card->longname, sizeof(card->longname), 347 snprintf(card->longname, sizeof(card->longname),
350 "%s (%s)", dev->dev.driver->name, card->mixername); 348 "%s (%s)", dev->dev.driver->name, card->mixername);
351 349
352 snd_card_set_pm_callback(card, pxa2xx_ac97_do_suspend,
353 pxa2xx_ac97_do_resume, NULL);
354 ret = snd_card_register(card); 350 ret = snd_card_register(card);
355 if (ret == 0) { 351 if (ret == 0) {
356 platform_set_drvdata(dev, card); 352 platform_set_drvdata(dev, card);
357 return 0; 353 return 0;
358 } 354 }
359 355
360 err: 356 err:
361 if (card) 357 if (card)
362 snd_card_free(card); 358 snd_card_free(card);
363 if (CKEN & CKEN2_AC97) { 359 if (CKEN & CKEN2_AC97) {
364 GCR |= GCR_ACLINK_OFF; 360 GCR |= GCR_ACLINK_OFF;
365 free_irq(IRQ_AC97, NULL); 361 free_irq(IRQ_AC97, NULL);
366 pxa_set_cken(CKEN2_AC97, 0); 362 pxa_set_cken(CKEN2_AC97, 0);
367 } 363 }
368 return ret; 364 return ret;
369 } 365 }
370 366
371 static int pxa2xx_ac97_remove(struct platform_device *dev) 367 static int pxa2xx_ac97_remove(struct platform_device *dev)
372 { 368 {
373 struct snd_card *card = platform_get_drvdata(dev); 369 struct snd_card *card = platform_get_drvdata(dev);
374 370
375 if (card) { 371 if (card) {
376 snd_card_free(card); 372 snd_card_free(card);
377 platform_set_drvdata(dev, NULL); 373 platform_set_drvdata(dev, NULL);
378 GCR |= GCR_ACLINK_OFF; 374 GCR |= GCR_ACLINK_OFF;
379 free_irq(IRQ_AC97, NULL); 375 free_irq(IRQ_AC97, NULL);
380 pxa_set_cken(CKEN2_AC97, 0); 376 pxa_set_cken(CKEN2_AC97, 0);
381 } 377 }
382 378
383 return 0; 379 return 0;
384 } 380 }
385 381
386 static struct platform_driver pxa2xx_ac97_driver = { 382 static struct platform_driver pxa2xx_ac97_driver = {
387 .probe = pxa2xx_ac97_probe, 383 .probe = pxa2xx_ac97_probe,
388 .remove = pxa2xx_ac97_remove, 384 .remove = pxa2xx_ac97_remove,
389 .suspend = pxa2xx_ac97_suspend, 385 .suspend = pxa2xx_ac97_suspend,
390 .resume = pxa2xx_ac97_resume, 386 .resume = pxa2xx_ac97_resume,
391 .driver = { 387 .driver = {
392 .name = "pxa2xx-ac97", 388 .name = "pxa2xx-ac97",
393 }, 389 },
394 }; 390 };
395 391
396 static int __init pxa2xx_ac97_init(void) 392 static int __init pxa2xx_ac97_init(void)
397 { 393 {
398 return platform_driver_register(&pxa2xx_ac97_driver); 394 return platform_driver_register(&pxa2xx_ac97_driver);