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Commit 8eb4da28b2544d0fed55a811515dfeb6c07a0447

Authored by Dave Jiang
Committed by Vinod Koul
1 parent b707c65865
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

ioat: Adding Ivy Bridge IOATDMA PCI device IDs 

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Dan Williams <djbw@db.com>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>

Showing 1 changed file with 22 additions and 0 deletions Inline Diff

drivers/dma/ioat/pci.c
Diff comments   View file @ 8eb4da2
1 /* 1 /*
2 * Intel I/OAT DMA Linux driver 2 * Intel I/OAT DMA Linux driver
3 * Copyright(c) 2007 - 2009 Intel Corporation. 3 * Copyright(c) 2007 - 2009 Intel Corporation.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License, 6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation. 7 * version 2, as published by the Free Software Foundation.
8 * 8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT 9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details. 12 * more details.
13 * 13 *
14 * You should have received a copy of the GNU General Public License along with 14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17 * 17 *
18 * The full GNU General Public License is included in this distribution in 18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING". 19 * the file called "COPYING".
20 * 20 *
21 */ 21 */
22 22
23 /* 23 /*
24 * This driver supports an Intel I/OAT DMA engine, which does asynchronous 24 * This driver supports an Intel I/OAT DMA engine, which does asynchronous
25 * copy operations. 25 * copy operations.
26 */ 26 */
27 27
28 #include <linux/init.h> 28 #include <linux/init.h>
29 #include <linux/module.h> 29 #include <linux/module.h>
30 #include <linux/pci.h> 30 #include <linux/pci.h>
31 #include <linux/interrupt.h> 31 #include <linux/interrupt.h>
32 #include <linux/dca.h> 32 #include <linux/dca.h>
33 #include <linux/slab.h> 33 #include <linux/slab.h>
34 #include "dma.h" 34 #include "dma.h"
35 #include "dma_v2.h" 35 #include "dma_v2.h"
36 #include "registers.h" 36 #include "registers.h"
37 #include "hw.h" 37 #include "hw.h"
38 38
39 MODULE_VERSION(IOAT_DMA_VERSION); 39 MODULE_VERSION(IOAT_DMA_VERSION);
40 MODULE_LICENSE("Dual BSD/GPL"); 40 MODULE_LICENSE("Dual BSD/GPL");
41 MODULE_AUTHOR("Intel Corporation"); 41 MODULE_AUTHOR("Intel Corporation");
42 42
43 #define PCI_DEVICE_ID_INTEL_IOAT_IVB0 0x0e20
44 #define PCI_DEVICE_ID_INTEL_IOAT_IVB1 0x0e21
45 #define PCI_DEVICE_ID_INTEL_IOAT_IVB2 0x0e22
46 #define PCI_DEVICE_ID_INTEL_IOAT_IVB3 0x0e23
47 #define PCI_DEVICE_ID_INTEL_IOAT_IVB4 0x0e24
48 #define PCI_DEVICE_ID_INTEL_IOAT_IVB5 0x0e25
49 #define PCI_DEVICE_ID_INTEL_IOAT_IVB6 0x0e26
50 #define PCI_DEVICE_ID_INTEL_IOAT_IVB7 0x0e27
51 #define PCI_DEVICE_ID_INTEL_IOAT_IVB8 0x0e2e
52 #define PCI_DEVICE_ID_INTEL_IOAT_IVB9 0x0e2f
53
43 static struct pci_device_id ioat_pci_tbl[] = { 54 static struct pci_device_id ioat_pci_tbl[] = {
44 /* I/OAT v1 platforms */ 55 /* I/OAT v1 platforms */
45 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT) }, 56 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT) },
46 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_CNB) }, 57 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_CNB) },
47 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SCNB) }, 58 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SCNB) },
48 { PCI_VDEVICE(UNISYS, PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR) }, 59 { PCI_VDEVICE(UNISYS, PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR) },
49 60
50 /* I/OAT v2 platforms */ 61 /* I/OAT v2 platforms */
51 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB) }, 62 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB) },
52 63
53 /* I/OAT v3 platforms */ 64 /* I/OAT v3 platforms */
54 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG0) }, 65 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG0) },
55 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG1) }, 66 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG1) },
56 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG2) }, 67 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG2) },
57 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG3) }, 68 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG3) },
58 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG4) }, 69 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG4) },
59 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG5) }, 70 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG5) },
60 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG6) }, 71 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG6) },
61 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG7) }, 72 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG7) },
62 73
63 /* I/OAT v3.2 platforms */ 74 /* I/OAT v3.2 platforms */
64 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF0) }, 75 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF0) },
65 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF1) }, 76 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF1) },
66 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF2) }, 77 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF2) },
67 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF3) }, 78 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF3) },
68 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF4) }, 79 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF4) },
69 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF5) }, 80 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF5) },
70 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF6) }, 81 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF6) },
71 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF7) }, 82 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF7) },
72 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF8) }, 83 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF8) },
73 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF9) }, 84 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF9) },
74 85
75 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB0) }, 86 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB0) },
76 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB1) }, 87 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB1) },
77 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB2) }, 88 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB2) },
78 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB3) }, 89 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB3) },
79 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB4) }, 90 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB4) },
80 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB5) }, 91 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB5) },
81 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB6) }, 92 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB6) },
82 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB7) }, 93 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB7) },
83 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB8) }, 94 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB8) },
84 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB9) }, 95 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB9) },
96
97 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB0) },
98 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB1) },
99 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB2) },
100 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB3) },
101 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB4) },
102 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB5) },
103 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB6) },
104 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB7) },
105 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB8) },
106 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB9) },
85 107
86 { 0, } 108 { 0, }
87 }; 109 };
88 MODULE_DEVICE_TABLE(pci, ioat_pci_tbl); 110 MODULE_DEVICE_TABLE(pci, ioat_pci_tbl);
89 111
90 static int __devinit ioat_pci_probe(struct pci_dev *pdev, 112 static int __devinit ioat_pci_probe(struct pci_dev *pdev,
91 const struct pci_device_id *id); 113 const struct pci_device_id *id);
92 static void __devexit ioat_remove(struct pci_dev *pdev); 114 static void __devexit ioat_remove(struct pci_dev *pdev);
93 115
94 static int ioat_dca_enabled = 1; 116 static int ioat_dca_enabled = 1;
95 module_param(ioat_dca_enabled, int, 0644); 117 module_param(ioat_dca_enabled, int, 0644);
96 MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)"); 118 MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)");
97 119
98 struct kmem_cache *ioat2_cache; 120 struct kmem_cache *ioat2_cache;
99 121
100 #define DRV_NAME "ioatdma" 122 #define DRV_NAME "ioatdma"
101 123
102 static struct pci_driver ioat_pci_driver = { 124 static struct pci_driver ioat_pci_driver = {
103 .name = DRV_NAME, 125 .name = DRV_NAME,
104 .id_table = ioat_pci_tbl, 126 .id_table = ioat_pci_tbl,
105 .probe = ioat_pci_probe, 127 .probe = ioat_pci_probe,
106 .remove = __devexit_p(ioat_remove), 128 .remove = __devexit_p(ioat_remove),
107 }; 129 };
108 130
109 static struct ioatdma_device * 131 static struct ioatdma_device *
110 alloc_ioatdma(struct pci_dev *pdev, void __iomem *iobase) 132 alloc_ioatdma(struct pci_dev *pdev, void __iomem *iobase)
111 { 133 {
112 struct device *dev = &pdev->dev; 134 struct device *dev = &pdev->dev;
113 struct ioatdma_device *d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL); 135 struct ioatdma_device *d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
114 136
115 if (!d) 137 if (!d)
116 return NULL; 138 return NULL;
117 d->pdev = pdev; 139 d->pdev = pdev;
118 d->reg_base = iobase; 140 d->reg_base = iobase;
119 return d; 141 return d;
120 } 142 }
121 143
122 static int __devinit ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) 144 static int __devinit ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
123 { 145 {
124 void __iomem * const *iomap; 146 void __iomem * const *iomap;
125 struct device *dev = &pdev->dev; 147 struct device *dev = &pdev->dev;
126 struct ioatdma_device *device; 148 struct ioatdma_device *device;
127 int err; 149 int err;
128 150
129 err = pcim_enable_device(pdev); 151 err = pcim_enable_device(pdev);
130 if (err) 152 if (err)
131 return err; 153 return err;
132 154
133 err = pcim_iomap_regions(pdev, 1 << IOAT_MMIO_BAR, DRV_NAME); 155 err = pcim_iomap_regions(pdev, 1 << IOAT_MMIO_BAR, DRV_NAME);
134 if (err) 156 if (err)
135 return err; 157 return err;
136 iomap = pcim_iomap_table(pdev); 158 iomap = pcim_iomap_table(pdev);
137 if (!iomap) 159 if (!iomap)
138 return -ENOMEM; 160 return -ENOMEM;
139 161
140 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 162 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
141 if (err) 163 if (err)
142 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 164 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
143 if (err) 165 if (err)
144 return err; 166 return err;
145 167
146 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 168 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
147 if (err) 169 if (err)
148 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 170 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
149 if (err) 171 if (err)
150 return err; 172 return err;
151 173
152 device = alloc_ioatdma(pdev, iomap[IOAT_MMIO_BAR]); 174 device = alloc_ioatdma(pdev, iomap[IOAT_MMIO_BAR]);
153 if (!device) 175 if (!device)
154 return -ENOMEM; 176 return -ENOMEM;
155 pci_set_master(pdev); 177 pci_set_master(pdev);
156 pci_set_drvdata(pdev, device); 178 pci_set_drvdata(pdev, device);
157 179
158 device->version = readb(device->reg_base + IOAT_VER_OFFSET); 180 device->version = readb(device->reg_base + IOAT_VER_OFFSET);
159 if (device->version == IOAT_VER_1_2) 181 if (device->version == IOAT_VER_1_2)
160 err = ioat1_dma_probe(device, ioat_dca_enabled); 182 err = ioat1_dma_probe(device, ioat_dca_enabled);
161 else if (device->version == IOAT_VER_2_0) 183 else if (device->version == IOAT_VER_2_0)
162 err = ioat2_dma_probe(device, ioat_dca_enabled); 184 err = ioat2_dma_probe(device, ioat_dca_enabled);
163 else if (device->version >= IOAT_VER_3_0) 185 else if (device->version >= IOAT_VER_3_0)
164 err = ioat3_dma_probe(device, ioat_dca_enabled); 186 err = ioat3_dma_probe(device, ioat_dca_enabled);
165 else 187 else
166 return -ENODEV; 188 return -ENODEV;
167 189
168 if (err) { 190 if (err) {
169 dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n"); 191 dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n");
170 return -ENODEV; 192 return -ENODEV;
171 } 193 }
172 194
173 return 0; 195 return 0;
174 } 196 }
175 197
176 static void __devexit ioat_remove(struct pci_dev *pdev) 198 static void __devexit ioat_remove(struct pci_dev *pdev)
177 { 199 {
178 struct ioatdma_device *device = pci_get_drvdata(pdev); 200 struct ioatdma_device *device = pci_get_drvdata(pdev);
179 201
180 if (!device) 202 if (!device)
181 return; 203 return;
182 204
183 dev_err(&pdev->dev, "Removing dma and dca services\n"); 205 dev_err(&pdev->dev, "Removing dma and dca services\n");
184 if (device->dca) { 206 if (device->dca) {
185 unregister_dca_provider(device->dca, &pdev->dev); 207 unregister_dca_provider(device->dca, &pdev->dev);
186 free_dca_provider(device->dca); 208 free_dca_provider(device->dca);
187 device->dca = NULL; 209 device->dca = NULL;
188 } 210 }
189 ioat_dma_remove(device); 211 ioat_dma_remove(device);
190 } 212 }
191 213
192 static int __init ioat_init_module(void) 214 static int __init ioat_init_module(void)
193 { 215 {
194 int err; 216 int err;
195 217
196 pr_info("%s: Intel(R) QuickData Technology Driver %s\n", 218 pr_info("%s: Intel(R) QuickData Technology Driver %s\n",
197 DRV_NAME, IOAT_DMA_VERSION); 219 DRV_NAME, IOAT_DMA_VERSION);
198 220
199 ioat2_cache = kmem_cache_create("ioat2", sizeof(struct ioat_ring_ent), 221 ioat2_cache = kmem_cache_create("ioat2", sizeof(struct ioat_ring_ent),
200 0, SLAB_HWCACHE_ALIGN, NULL); 222 0, SLAB_HWCACHE_ALIGN, NULL);
201 if (!ioat2_cache) 223 if (!ioat2_cache)
202 return -ENOMEM; 224 return -ENOMEM;
203 225
204 err = pci_register_driver(&ioat_pci_driver); 226 err = pci_register_driver(&ioat_pci_driver);
205 if (err) 227 if (err)
206 kmem_cache_destroy(ioat2_cache); 228 kmem_cache_destroy(ioat2_cache);
207 229
208 return err; 230 return err;
209 } 231 }
210 module_init(ioat_init_module); 232 module_init(ioat_init_module);
211 233
212 static void __exit ioat_exit_module(void) 234 static void __exit ioat_exit_module(void)
213 { 235 {
214 pci_unregister_driver(&ioat_pci_driver); 236 pci_unregister_driver(&ioat_pci_driver);
215 kmem_cache_destroy(ioat2_cache); 237 kmem_cache_destroy(ioat2_cache);
216 } 238 }
217 module_exit(ioat_exit_module); 239 module_exit(ioat_exit_module);
218 240