diff --git a/Documentation/devicetree/bindings/power/bq2477x-charger.txt b/Documentation/devicetree/bindings/power/bq2477x-charger.txt new file mode 100644 index 0000000..8d2e4b8 --- /dev/null +++ b/Documentation/devicetree/bindings/power/bq2477x-charger.txt @@ -0,0 +1,27 @@ +bq2477x charger +~~~~~~~~~~~~~~~ + +Required properties : + - compatible : should contain "ti,bq2477x". + - ti,dac-ichg : Charge current that must be programmed + - ti,dac-v : The maximum charge voltage that must be programmed + - ti,dac-minsv : The minimum System voltage that must be programmed + - ti,dac-iin : The input current that must be programmed + - ti,wdt-refresh-timeout : watch dog timer that must be programmed + - ti,charger-detect-gpio : a GPIO spec for AC adapter detection. The flag + that determines if AC adapter presence is indicated by active low. + Set this to GPIO_ACTIVE_LOW if active low indicates adapter is present, + else GPIO_ACTIVE_HIGH. + +Example: + + bq2477x@6a { + compatible = "ti,bq2477x"; + reg = <0x6a>; + ti,dac-ichg = <2240>; + ti,dac-v = <9008>; + ti,dac-minsv = <4608>; + ti,dac-iin = <4992>; + ti,wdt-refresh-timeout = <40>; + ti,charger-detect-gpio = <&gpio TEGRA_GPIO(J, 0) GPIO_ACTIVE_LOW>; + }; diff --git a/arch/arm/boot/dts/imx6dl-smarcfimx6-1080p.dts b/arch/arm/boot/dts/imx6dl-smarcfimx6-1080p.dts new file mode 100644 index 0000000..c577897 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-smarcfimx6-1080p.dts @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2015 Embedian, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6dl-smarcfimx6.dts" + +/* Dual-Channel LVDS Panel for AUO G240HW01 V0 24-inch Color TFT 1920x1080 Panel Settings */ +&ldb { + status = "okay"; + split-mode; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + primary; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: g24hw01 { + clock-frequency = <130005200>; + hactive = <1920>; + vactive = <1080>; + hback-porch = <100>; + hfront-porch = <40>; + vback-porch = <30>; + vfront-porch = <3>; + hsync-len = <10>; + vsync-len = <2>; + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + display-timings { + native-mode = <&timing1>; + timing1: g24hw01 { + clock-frequency = <130005200>; + hactive = <1920>; + vactive = <1080>; + hback-porch = <100>; + hfront-porch = <40>; + vback-porch = <30>; + vfront-porch = <3>; + hsync-len = <10>; + vsync-len = <2>; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx6dl-smarcfimx6-wvga.dts b/arch/arm/boot/dts/imx6dl-smarcfimx6-wvga.dts new file mode 100644 index 0000000..204b60d --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-smarcfimx6-wvga.dts @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2015 Embedian, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6dl-smarcfimx6.dts" + +/* LVDS Panel for AUO G070VW01 V0 7-inch Color TFT 800x480 Panel Settings */ +&ldb { + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + primary; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: g070vw01 { + clock-frequency = <33300000>; + hactive = <800>; + vactive = <480>; + hback-porch = <64>; + hfront-porch = <64>; + vback-porch = <12>; + vfront-porch = <4>; + hsync-len = <128>; + vsync-len = <12>; + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + display-timings { + native-mode = <&timing1>; + timing1: g070vw01 { + clock-frequency = <33300000>; + hactive = <800>; + vactive = <480>; + hback-porch = <64>; + hfront-porch = <64>; + vback-porch = <12>; + vfront-porch = <4>; + hsync-len = <128>; + vsync-len = <12>; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx6dl-smarcfimx6-wxga.dts b/arch/arm/boot/dts/imx6dl-smarcfimx6-wxga.dts new file mode 100644 index 0000000..9d7fe55 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-smarcfimx6-wxga.dts @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2015 Embedian, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6dl-smarcfimx6.dts" + +/* LVDS Panel for AUO G185XW01 V2 18.5-inch Color TFT 1360x768 Panel Settings */ +&ldb { + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + primary; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: g185xw01 { + clock-frequency = <78000000>; + hactive = <1360>; + vactive = <768>; + hback-porch = <60>; + hfront-porch = <60>; + vback-porch = <18>; + vfront-porch = <4>; + hsync-len = <120>; + vsync-len = <18>; + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + display-timings { + native-mode = <&timing1>; + timing1: g185xw01 { + clock-frequency = <78000000>; + hactive = <1360>; + vactive = <768>; + hback-porch = <60>; + hfront-porch = <60>; + vback-porch = <18>; + vfront-porch = <4>; + hsync-len = <120>; + vsync-len = <18>; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx6dl-smarcfimx6-xga.dts b/arch/arm/boot/dts/imx6dl-smarcfimx6-xga.dts new file mode 100644 index 0000000..14949e2 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-smarcfimx6-xga.dts @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2015 Embedian, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6dl-smarcfimx6.dts" + +&ldb { + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + primary; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: hsd100pxn1 { + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hback-porch = <220>; + hfront-porch = <40>; + vback-porch = <21>; + vfront-porch = <7>; + hsync-len = <60>; + vsync-len = <10>; + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + display-timings { + native-mode = <&timing1>; + timing1: hsd100pxn1 { + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hback-porch = <220>; + hfront-porch = <40>; + vback-porch = <21>; + vfront-porch = <7>; + hsync-len = <60>; + vsync-len = <10>; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx6dl-smarcfimx6.dts b/arch/arm/boot/dts/imx6dl-smarcfimx6.dts index 3ea301a..c1164eda 100644 --- a/arch/arm/boot/dts/imx6dl-smarcfimx6.dts +++ b/arch/arm/boot/dts/imx6dl-smarcfimx6.dts @@ -17,20 +17,26 @@ compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl", "fsl, imx6dl-smarcfimx6"; }; -&cpu0 { - arm-supply = <®_arm>; - soc-supply = <®_soc>; - pu-supply = <®_pu>; /* use pu_dummy if VDDSOC share with VDDPU */ +&ldb { + lvds-channel@0 { + crtc = "ipu1-di0"; + }; + + lvds-channel@1 { + crtc = "ipu1-di1"; + }; }; -&gpc { - fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ - fsl,wdog-reset = <1>; /* watchdog select of reset source */ - pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ +&mxcfb1 { + status = "okay"; }; -&gpu { - pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ +&mxcfb2 { + status = "okay"; +}; + +&pxp { + status = "okay"; }; &vpu { diff --git a/arch/arm/boot/dts/imx6q-smarcfimx6-1080p.dts b/arch/arm/boot/dts/imx6q-smarcfimx6-1080p.dts new file mode 100644 index 0000000..e4257d1 --- /dev/null +++ b/arch/arm/boot/dts/imx6q-smarcfimx6-1080p.dts @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2015 Embedian, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6q-smarcfimx6.dts" + +/* Dual-Channel LVDS Panel for AUO G240HW01 V0 24-inch Color TFT 1920x1080 Panel Settings */ +&ldb { + status = "okay"; + split-mode; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + primary; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: g24hw01 { + clock-frequency = <130005200>; + hactive = <1920>; + vactive = <1080>; + hback-porch = <100>; + hfront-porch = <40>; + vback-porch = <30>; + vfront-porch = <3>; + hsync-len = <10>; + vsync-len = <2>; + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + display-timings { + native-mode = <&timing1>; + timing1: g24hw01 { + clock-frequency = <130005200>; + hactive = <1920>; + vactive = <1080>; + hback-porch = <100>; + hfront-porch = <40>; + vback-porch = <30>; + vfront-porch = <3>; + hsync-len = <10>; + vsync-len = <2>; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx6q-smarcfimx6-wvga.dts b/arch/arm/boot/dts/imx6q-smarcfimx6-wvga.dts new file mode 100644 index 0000000..29ddb8f --- /dev/null +++ b/arch/arm/boot/dts/imx6q-smarcfimx6-wvga.dts @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2015 Embedian, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6q-smarcfimx6.dts" + +/* LVDS Panel for AUO G070VW01 V0 7-inch Color TFT 800x480 Panel Settings */ +&ldb { + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + primary; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: g070vw01 { + clock-frequency = <33300000>; + hactive = <800>; + vactive = <480>; + hback-porch = <64>; + hfront-porch = <64>; + vback-porch = <12>; + vfront-porch = <4>; + hsync-len = <128>; + vsync-len = <12>; + /*hsync-active = <0>; + vsync-active = <0>;*/ + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + display-timings { + native-mode = <&timing1>; + timing1: g070vw01 { + clock-frequency = <33300000>; + hactive = <800>; + vactive = <480>; + hback-porch = <64>; + hfront-porch = <64>; + vback-porch = <12>; + vfront-porch = <4>; + hsync-len = <128>; + vsync-len = <12>; + /*hsync-active = <0>; + vsync-active = <0>;*/ + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx6q-smarcfimx6-wxga.dts b/arch/arm/boot/dts/imx6q-smarcfimx6-wxga.dts new file mode 100644 index 0000000..5d836f7 --- /dev/null +++ b/arch/arm/boot/dts/imx6q-smarcfimx6-wxga.dts @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2015 Embedian, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6q-smarcfimx6.dts" + +/* LVDS Panel for AUO G185XW01 V2 18.5-inch Color TFT 1360x768 Panel Settings */ +&ldb { + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + primary; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: g185xw01 { + clock-frequency = <78000000>; + hactive = <1360>; + vactive = <768>; + hback-porch = <60>; + hfront-porch = <60>; + vback-porch = <18>; + vfront-porch = <4>; + hsync-len = <120>; + vsync-len = <18>; + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + display-timings { + native-mode = <&timing1>; + timing1: g185xw01 { + clock-frequency = <78000000>; + hactive = <1360>; + vactive = <768>; + hback-porch = <60>; + hfront-porch = <60>; + vback-porch = <18>; + vfront-porch = <4>; + hsync-len = <120>; + vsync-len = <18>; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx6q-smarcfimx6-xga.dts b/arch/arm/boot/dts/imx6q-smarcfimx6-xga.dts new file mode 100644 index 0000000..3e1a50e --- /dev/null +++ b/arch/arm/boot/dts/imx6q-smarcfimx6-xga.dts @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2015 Embedian, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx6q-smarcfimx6.dts" + +&ldb { + status = "okay"; + + lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + primary; + status = "okay"; + + display-timings { + native-mode = <&timing0>; + timing0: hsd100pxn1 { + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hback-porch = <220>; + hfront-porch = <40>; + vback-porch = <21>; + vfront-porch = <7>; + hsync-len = <60>; + vsync-len = <10>; + }; + }; + }; + + lvds-channel@1 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + display-timings { + native-mode = <&timing1>; + timing1: hsd100pxn1 { + clock-frequency = <65000000>; + hactive = <1024>; + vactive = <768>; + hback-porch = <220>; + hfront-porch = <40>; + vback-porch = <21>; + vfront-porch = <7>; + hsync-len = <60>; + vsync-len = <10>; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx6q-smarcfimx6.dts b/arch/arm/boot/dts/imx6q-smarcfimx6.dts index cc6c7ad..5e6d2e1 100644 --- a/arch/arm/boot/dts/imx6q-smarcfimx6.dts +++ b/arch/arm/boot/dts/imx6q-smarcfimx6.dts @@ -20,12 +20,6 @@ compatible = "fsl,imx6q-sabresd", "fsl,imx6q", "fsl,imx6q-smarcfimx6"; }; -&battery { - offset-charger = <1900>; - offset-discharger = <1694>; - offset-usb-charger = <1685>; -}; - &ldb { lvds-channel@0 { crtc = "ipu2-di0"; @@ -56,18 +50,6 @@ status = "okay"; }; -&cpu0 { - arm-supply = <®_arm>; - soc-supply = <®_soc>; - pu-supply = <®_pu>; /* use pu_dummy if VDDSOC share with VDDPU */ -}; - -&gpc { - fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */ - fsl,wdog-reset = <1>; /* watchdog select of reset source */ - pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ -}; - &gpu { pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ }; diff --git a/arch/arm/boot/dts/imx6qdl-smarc.dtsi b/arch/arm/boot/dts/imx6qdl-smarc.dtsi index 2dafbb1..bed10d2 100644 --- a/arch/arm/boot/dts/imx6qdl-smarc.dtsi +++ b/arch/arm/boot/dts/imx6qdl-smarc.dtsi @@ -39,8 +39,8 @@ intc: interrupt-controller@00a01000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; - #address-cells = <1>; - #size-cells = <1>; + /*#address-cells = <1>; + #size-cells = <1>;*/ interrupt-controller; reg = <0x00a01000 0x1000>, <0x00a00100 0x100>; @@ -1069,10 +1069,10 @@ pinctrl_audmux_2: audmux-2 { fsl,pins = < - MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 - MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 - MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 - MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 >; }; @@ -1093,8 +1093,8 @@ }; pinctrl_ecspi1_cs_2: ecspi1_cs_grp-2 { fsl,pins = < - MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x80000000 - MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 + MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0 0x80000000 + MX6QDL_PAD_KEY_COL2__ECSPI1_SS1 0x80000000 >; }; @@ -1119,8 +1119,8 @@ pinctrl_ecspi2_cs_1: ecspi2_cs_grp-1 { fsl,pins = < MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x80000000 - MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x80000000 - MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000 + MX6QDL_PAD_EIM_D24__ECSPI2_SS2 0x80000000 + MX6QDL_PAD_EIM_D25__ECSPI2_SS3 0x80000000 >; }; @@ -1163,9 +1163,6 @@ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 - /*MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8*/ - /* AR8035 interrupt */ - /*MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x80000000*/ >; }; @@ -1213,6 +1210,7 @@ pinctrl_enet_irq: enetirqgrp { fsl,pins = < + /* AR8035 interrupt */ MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x000b1 >; }; @@ -1266,8 +1264,8 @@ pinctrl_flexcan1_3: flexcan1grp-3 { fsl,pins = < - MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000 - MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x80000000 + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000 + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x80000000 >; }; }; @@ -1275,8 +1273,8 @@ flexcan2 { pinctrl_flexcan2_1: flexcan2grp-1 { fsl,pins = < - MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000 - MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000 + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000 + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000 >; }; }; @@ -1414,35 +1412,35 @@ ipu1 { pinctrl_ipu1_1: ipu1grp-1 { fsl,pins = < - MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 - MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 - MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 - MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xe1 + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xe1 + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0xe1 + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0xe1 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000 - MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 - MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 - MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 - MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 - MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 - MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 - MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 - MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 - MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 - MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 - MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 - MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 - MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 - MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 - MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 - MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 - MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 - MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 - MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 - MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 - MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 - MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 - MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 - MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xe1 + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xe1 + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xe1 + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xe1 + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xe1 + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xe1 + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xe1 + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xe1 + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xe1 + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xe1 + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xe1 + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xe1 + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xe1 + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xe1 + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xe1 + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xe1 + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xe1 + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xe1 + MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0xe1 + MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0xe1 + MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0xe1 + MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0xe1 + MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0xe1 + MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0xe1 >; }; @@ -1554,10 +1552,10 @@ }; pinctrl_uart1_2: uart1grp-2 { fsl,pins = < - MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 - MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1 - MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1 >; }; }; @@ -1565,17 +1563,17 @@ uart2 { pinctrl_uart2_1: uart2grp-1 { fsl,pins = < - MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 >; }; pinctrl_uart2_2: uart2grp-2 { /* DTE mode */ fsl,pins = < - MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1 - MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1 >; }; }; @@ -1610,10 +1608,10 @@ pinctrl_uart4_2: uart4grp-2 { fsl,pins = < - MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 - MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 - MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 - MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 + MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 + MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 >; }; }; @@ -1712,10 +1710,6 @@ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 - /*MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 - MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 - MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 - MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059*/ >; }; @@ -1734,17 +1728,13 @@ usdhc3 { pinctrl_usdhc3_1: usdhc3grp-1 { fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - /*MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059*/ - MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059 >; }; @@ -1793,16 +1783,16 @@ usdhc4 { pinctrl_usdhc4_1: usdhc4grp-1 { fsl,pins = < - MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 - MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 - MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 - MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 - MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 - MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 - MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 - MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 - MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 - MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 >; }; diff --git a/arch/arm/boot/dts/imx6qdl-smarcfimx6.dtsi b/arch/arm/boot/dts/imx6qdl-smarcfimx6.dtsi index 7c688c7..1103da2 100644 --- a/arch/arm/boot/dts/imx6qdl-smarcfimx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-smarcfimx6.dtsi @@ -22,40 +22,29 @@ reg = <0x10000000 0x40000000>; }; - battery: max8903@0 { - compatible = "fsl,max8903-charger"; - pinctrl-names = "default"; - dok_input = <&gpio2 24 1>; - uok_input = <&gpio1 27 1>; - chg_input = <&gpio3 23 1>; - flt_input = <&gpio5 2 1>; - fsl,dcm_always_high; - fsl,dc_valid; - fsl,usb_valid; - status = "okay"; - }; - hannstar_cabc { compatible = "hannstar,cabc"; lvds0 { - gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 00 GPIO_ACTIVE_HIGH>; }; lvds1 { - gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 00 GPIO_ACTIVE_HIGH>; }; }; regulators { compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; reg_usb_otg_vbus: usb_otg_vbus { compatible = "regulator-fixed"; regulator-name = "usb_otg_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&gpio3 22 0>; + gpio = <&gpio1 29 0>; enable-active-high; }; @@ -64,10 +53,18 @@ regulator-name = "usb_h1_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - gpio = <&gpio1 29 0>; + gpio = <&gpio1 26 0>; enable-active-high; }; + reg_1p8v: 1p8v { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + reg_2p5v: 2p5v { compatible = "regulator-fixed"; regulator-name = "2P5V"; @@ -84,13 +81,6 @@ regulator-always-on; }; - reg_mipi_dsi_pwr_on: mipi_dsi_pwr_on { - compatible = "regulator-fixed"; - regulator-name = "mipi_dsi_pwr_on"; - gpio = <&gpio6 14 0>; - enable-active-high; - }; - reg_sensor: sensor_supply { compatible = "regulator-fixed"; regulator-name = "sensor-supply"; @@ -116,6 +106,14 @@ mux-ext-port = <3>; }; + sound-spdif { + compatible = "fsl,imx-audio-spdif"; + model = "imx-spdif"; + spdif-controller = <&spdif>; + spdif-in; + spdif-out; + }; + sound-hdmi { compatible = "fsl,imx6q-audio-hdmi", "fsl,imx-audio-hdmi"; @@ -126,8 +124,8 @@ mxcfb1: fb@0 { compatible = "fsl,mxc_sdc_fb"; disp_dev = "ldb"; - interface_pix_fmt = "RGB666"; - default_bpp = <16>; + interface_pix_fmt = "RGB24"; + default_bpp = <24>; int_clk = <0>; late_init = <0>; status = "disabled"; @@ -147,7 +145,7 @@ mxcfb3: fb@2 { compatible = "fsl,mxc_sdc_fb"; disp_dev = "lcd"; - interface_pix_fmt = "RGB565"; + interface_pix_fmt = "RGB24"; mode_str ="CLAA-WVGA"; default_bpp = <16>; int_clk = <0>; @@ -158,8 +156,8 @@ mxcfb4: fb@3 { compatible = "fsl,mxc_sdc_fb"; disp_dev = "ldb"; - interface_pix_fmt = "RGB666"; - default_bpp = <16>; + interface_pix_fmt = "RGB24"; + default_bpp = <24>; int_clk = <0>; late_init = <0>; status = "disabled"; @@ -169,7 +167,7 @@ compatible = "fsl,lcd"; ipu_id = <0>; disp_id = <0>; - default_ifmt = "RGB565"; + default_ifmt = "RGB24"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu1_1>; status = "okay"; @@ -179,6 +177,7 @@ compatible = "pwm-backlight"; pwms = <&pwm2 0 5000000>; brightness-levels = <0 4 8 16 32 64 128 255>; + /*set default brightness level to 7, 7 is the brightest*/ default-brightness-level = <7>; }; @@ -187,7 +186,7 @@ ipu_id = <0>; csi_id = <0>; mclk_source = <0>; - status = "okay"; + status = "disabled"; }; v4l2_cap_1 { @@ -195,20 +194,20 @@ ipu_id = <0>; csi_id = <1>; mclk_source = <0>; - status = "okay"; + status = "disabled"; }; v4l2_out { compatible = "fsl,mxc_v4l2_output"; - status = "okay"; + status = "disabled"; }; - mipi_dsi_reset: mipi-dsi-reset { - compatible = "gpio-reset"; - reset-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; - reset-delay-us = <50>; - #reset-cells = <0>; - }; + mipi_csi_reset: mipi-csi-reset { + compatible = "gpio-reset"; + reset-gpios = <&gpio2 06 GPIO_ACTIVE_LOW>,<&gpio2 03 GPIO_ACTIVE_LOW>; /*GPIO2 and GPIO3*/ + reset-delay-us = <50>; + #reset-cells = <0>; + }; }; &audmux { @@ -218,16 +217,33 @@ }; &cpu0 { - arm-supply = <&sw1a_reg>; - soc-supply = <&sw1c_reg>; - pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */ + pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ +}; + +&ecspi1 { + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>, <&gpio4 10 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1_2 &pinctrl_ecspi1_cs_2>; + status = "okay"; + + spidev@0x00 { + compatible = "spidev"; + spi-max-frequency = <16000000>; + reg = <0>; + }; + spidev@0x01 { + compatible = "spidev"; + spi-max-frequency = <16000000>; + reg = <1>; + }; }; &ecspi2 { - fsl,spi-num-chipselects = <3>; - cs-gpios = <&gpio5 29 0>, <&gpio3 24 0>, <&gpio3 25 0>; + fsl,spi-num-chipselects = <4>; + cs-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>,<&gpio3 24 GPIO_ACTIVE_HIGH>,<&gpio3 25 GPIO_ACTIVE_HIGH>,<0>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi2_1>, <&pinctrl_ecspi2_cs_1>; + pinctrl-0 = <&pinctrl_ecspi2_1 &pinctrl_ecspi2_cs_1>; status = "okay"; flash: mx25u3235f0@0 { @@ -236,86 +252,73 @@ compatible = "macronix,mx25u3235f"; spi-max-frequency = <16000000>; reg = <0>; - partition@0 { - label = "U-Boot"; - reg = <0x0 0x100000>; - }; + partition@0 { + label = "U-Boot"; + reg = <0x0 0x100000>; + }; - partition@100000 { - label = "U-Boot Environment"; - reg = <0x100000 0x080000>; - }; + partition@100000 { + label = "U-Boot Environment"; + reg = <0x100000 0x080000>; + }; - partition@180000 { - label = "Flattened Device Tree"; - reg = <0x180000 0x200000>; - }; + partition@180000 { + label = "Flattened Device Tree"; + reg = <0x180000 0x200000>; + }; }; -}; -&ecspi1 { - fsl,spi-num-chipselects = <2>; - cs-gpios = <&gpio4 9 0>, <&gpio4 10 0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1_2>, <&pinctrl_ecspi1_cs_2>; - status = "okay"; - - spidev@0x00 { - compatible = "spidev"; - spi-max-frequency = <20000000>; - reg = <0>; - }; - spidev@0x01 { - compatible = "spidev"; - spi-max-frequency = <20000000>; - reg = <1>; - }; + spidev@0x02 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "spidev"; + reg = <2>; + spi-max-frequency = <16000000>; + }; + + spidev@0x03 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "spidev"; + reg = <3>; + spi-max-frequency = <16000000>; + }; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet_1>, <&pinctrl_enet_irq>; - /*interrupts-extended = <&gpio4 11 0x04>, <&intc 0 119 0x04>;*/ phy-mode = "rgmii"; + fsl,magic-packet; status = "okay"; }; &gpc { - fsl,cpu_pupscr_sw2iso = <0xf>; - fsl,cpu_pupscr_sw = <0xf>; - fsl,cpu_pdnscr_iso2sw = <0x1>; - fsl,cpu_pdnscr_iso = <0x1>; - fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */ - fsl,wdog-reset = <2>; /* watchdog select of reset source */ - pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ -}; - -/*&wdog1 { - status = "disabled"; + /* use ldo-enable, u-boot will check it and configure */ + fsl,ldo-bypass = <1>; + /* watchdog select of reset source */ + fsl,wdog-reset = <1>; + pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ }; -&wdog2 { - status = "okay"; -};*/ - &gpu { - pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ + pu-supply = <®_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ }; &hdmi_audio { status = "okay"; }; -/*&hdmi_cec { +&hdmi_cec { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hdmi_cec_2>; + /*pinctrl-0 = <&pinctrl_hdmi_cec_2>;*/ status = "okay"; -};*/ +}; &hdmi_core { ipu_id = <0>; - disp_id = <0>; + disp_id = <1>; status = "okay"; }; @@ -342,6 +345,7 @@ clocks = <&clks 201>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; + VDDD-supply = <®_1p8v>; }; s35390a: s35390a@30 { @@ -353,6 +357,17 @@ compatible = "at,24c256"; reg = <0x57>; }; + + bq2477x@09 { + compatible = "ti,bq2477x"; + reg = <0x09>; + ti,dac-ichg = <2240>; + ti,dac-v = <9008>; + ti,dac-minsv = <4608>; + ti,dac-iin = <4992>; + ti,wdt-refresh-timeout = <40>; + ti,charger-detect-gpio = <&gpio3 22 GPIO_ACTIVE_LOW>; + }; }; &i2c2 { @@ -374,49 +389,53 @@ status = "okay"; i2c-switch@70 { - compatible = "nxp,pca9545"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x70>; - - i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nxp,pca954x-bus"; - reg = <0>; - - /*eeprom@54 { - compatible = "at,24c08"; - reg = <0x54>; - };*/ - }; - - i2c@1 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nxp,pca954x-bus"; - reg = <1>; - - /* Example to add new i2c device */ - /*rtc@51 { - compatible = "nxp,pcf8563"; - reg = <0x51>; - };*/ - }; + compatible = "nxp,pca9545"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nxp,pca954x-bus"; + reg = <0>; + + /*eeprom@54 { + compatible = "at,24c08"; + reg = <0x54>; + };*/ + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nxp,pca954x-bus"; + reg = <1>; + + /* Example to add new i2c device */ + /*rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + };*/ + eeprom@76 { + compatible = "at,24c256"; + reg = <0x76>; + }; + }; i2c@2 { #address-cells = <1>; #size-cells = <0>; - compatible = "nxp,pca954x-bus"; + compatible = "nxp,pca954x-bus"; reg = <2>; - }; + }; i2c@3 { #address-cells = <1>; #size-cells = <0>; compatible = "nxp,pca954x-bus"; reg = <3>; }; - }; + }; }; &iomuxc { @@ -426,105 +445,44 @@ hog { pinctrl_hog_1: hoggrp-1 { fsl,pins = < - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 - MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 - MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 - MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 - MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 - MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x80000000 - MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x80000000 - MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 - MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000 - MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 - MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0 - MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 - MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 - MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 - MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 - MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 - MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 - MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 - MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000 - MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 - MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000 - MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 - MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 - MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 - MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 - MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x80000000 - MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x130b0 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x80000000 + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x80000000 + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x80000000 + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 + MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000 + MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000 + MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 + MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0 + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 + MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x80000000 + MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 + /*MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000*/ + MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 + MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000 + MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 + MX6QDL_PAD_GPIO_9__WDOG1_B 0x80000000 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 + MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x80000000 + MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x130b0 >; }; }; }; -&ldb { - status = "okay"; - - lvds-channel@0 { - fsl,data-mapping = "spwg"; - fsl,data-width = <18>; - status = "okay"; - - display-timings { - native-mode = <&timing0>; - timing0: hsd100pxn1 { - clock-frequency = <65000000>; - hactive = <1024>; - vactive = <768>; - hback-porch = <220>; - hfront-porch = <40>; - vback-porch = <21>; - vfront-porch = <7>; - hsync-len = <60>; - vsync-len = <10>; - }; - }; - }; - - lvds-channel@1 { - fsl,data-mapping = "spwg"; - fsl,data-width = <18>; - primary; - status = "okay"; - - display-timings { - native-mode = <&timing1>; - timing1: hsd100pxn1 { - clock-frequency = <65000000>; - hactive = <1024>; - vactive = <768>; - hback-porch = <220>; - hfront-porch = <40>; - vback-porch = <21>; - vfront-porch = <7>; - hsync-len = <60>; - vsync-len = <10>; - }; - }; - }; -}; - &mipi_csi { - status = "okay"; + status = "disabled"; ipu_id = <0>; csi_id = <1>; v_channel = <0>; - lanes = <2>; -}; - -&mipi_dsi { - dev_id = <0>; - disp_id = <1>; - lcd_panel = "TRULY-WVGA"; - disp-power-on-supply = <®_mipi_dsi_pwr_on>; - resets = <&mipi_dsi_reset>; - status = "okay"; + resets = <&mipi_csi_reset>; + lanes = <4>; }; &dcic1 { @@ -540,11 +498,23 @@ }; &pcie { - power-on-gpio = <&gpio3 19 0>; - reset-gpio = <&gpio7 12 0>; - status = "okay"; + /*power-on-gpio = <&gpio1 17 0>;*/ + reset-gpio = <&gpio1 20 0>; + reset-delay-us = <50>; + status = "okay"; }; +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spdif_2>; + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1_1>; + status = "okay"; +}; &pwm2 { pinctrl-names = "default"; @@ -583,17 +553,17 @@ &usbh1 { - gpios = <&gpio1 26 1>; - gpios = <&gpio1 27 2>; + vbus-supply = <®_usb_h1_vbus>; + gpios = <&gpio1 26 1>, <&gpio1 27 2>; status = "okay"; }; &usbotg { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg_2>; - gpios = <&gpio1 29 1>; - gpios = <&gpio1 30 2>; - /*disable-over-current;*/ + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg_2>; + gpios = <&gpio1 29 1>, <&gpio1 30 2>; + disable-over-current; status = "okay"; }; @@ -616,7 +586,7 @@ no-1-8-v; keep-power-in-suspend; enable-sdio-wakeup; - status = "okay"; + status = "disabled"; }; &usdhc4 { @@ -640,7 +610,3 @@ pinctrl-0 = <&pinctrl_flexcan2_1>; status = "okay"; }; - -&vpu { - pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */ -}; diff --git a/arch/arm/configs/smarcfimx6_defconfig b/arch/arm/configs/smarcfimx6_defconfig index 46f952c..d1ee554 100644 --- a/arch/arm/configs/smarcfimx6_defconfig +++ b/arch/arm/configs/smarcfimx6_defconfig @@ -144,6 +144,7 @@ CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y CONFIG_AIO=y +CONFIG_PCI_QUIRKS=y # CONFIG_EMBEDDED is not set CONFIG_HAVE_PERF_EVENTS=y CONFIG_PERF_USE_VMALLOC=y @@ -403,9 +404,37 @@ CONFIG_ARM_ERRATA_775420=y # # Bus support # -# CONFIG_PCI is not set -# CONFIG_PCI_SYSCALL is not set +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_SYSCALL=y CONFIG_ARCH_SUPPORTS_MSI=y +CONFIG_PCI_MSI=y +# CONFIG_PCI_DEBUG is not set +CONFIG_PCI_REALLOC_ENABLE_AUTO=y +CONFIG_PCI_STUB=y +CONFIG_PCI_ATS=y +CONFIG_PCI_IOV=y +CONFIG_PCI_PRI=y +CONFIG_PCI_PASID=y + +# +# PCI host controller drivers +# +CONFIG_PCIE_DW=y +CONFIG_PCI_IMX6=y +# CONFIG_PCI_IMX6SX_EXTREMELY_PWR_SAVE is not set +# CONFIG_EP_MODE_IN_EP_RC_SYS is not set +# CONFIG_RC_MODE_IN_EP_RC_SYS is not set +CONFIG_PCIEPORTBUS=y +CONFIG_PCIEAER=y +CONFIG_PCIE_ECRC=y +CONFIG_PCIEAER_INJECT=y +CONFIG_PCIEASPM=y +# CONFIG_PCIEASPM_DEBUG is not set +CONFIG_PCIEASPM_DEFAULT=y +# CONFIG_PCIEASPM_POWERSAVE is not set +# CONFIG_PCIEASPM_PERFORMANCE is not set +CONFIG_PCIE_PME=y # CONFIG_PCCARD is not set # @@ -696,6 +725,7 @@ CONFIG_CAN_CALC_BITTIMING=y # CONFIG_CAN_MCP251X is not set CONFIG_HAVE_CAN_FLEXCAN=y CONFIG_CAN_FLEXCAN=y +# CONFIG_PCH_CAN is not set # CONFIG_CAN_GRCAN is not set CONFIG_CAN_M_CAN=y # CONFIG_CAN_SJA1000 is not set @@ -713,7 +743,31 @@ CONFIG_CAN_M_CAN=y # CONFIG_CAN_SOFTING is not set # CONFIG_CAN_DEBUG_DEVICES is not set # CONFIG_IRDA is not set -# CONFIG_BT is not set +CONFIG_BT=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_HIDP=y + +# +# Bluetooth device drivers +# +CONFIG_BT_HCIBTUSB=y +CONFIG_BT_HCIBTSDIO=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +# CONFIG_BT_HCIUART_LL is not set +# CONFIG_BT_HCIUART_3WIRE is not set +CONFIG_BT_HCIBCM203X=y +# CONFIG_BT_HCIBPA10X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +CONFIG_BT_ATH3K=y # CONFIG_AF_RXRPC is not set CONFIG_WIRELESS=y CONFIG_WEXT_CORE=y @@ -736,7 +790,7 @@ CONFIG_MAC80211_RC_MINSTREL_HT=y CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y CONFIG_MAC80211_RC_DEFAULT="minstrel_ht" # CONFIG_MAC80211_MESH is not set -# CONFIG_MAC80211_LEDS is not set +CONFIG_MAC80211_LEDS=y # CONFIG_MAC80211_DEBUGFS is not set # CONFIG_MAC80211_MESSAGE_TRACING is not set # CONFIG_MAC80211_DEBUG_MENU is not set @@ -850,11 +904,13 @@ CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_PHYSMAP is not set CONFIG_MTD_PHYSMAP_OF=y # CONFIG_MTD_IMPA7 is not set +# CONFIG_MTD_INTEL_VR_NOR is not set # CONFIG_MTD_PLATRAM is not set # # Self-contained MTD device drivers # +# CONFIG_MTD_PMC551 is not set CONFIG_MTD_DATAFLASH=y # CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set # CONFIG_MTD_DATAFLASH_OTP is not set @@ -877,8 +933,10 @@ CONFIG_MTD_NAND=y # CONFIG_MTD_NAND_DENALI is not set # CONFIG_MTD_NAND_GPIO is not set CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_RICOH is not set # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_DOCG4 is not set +# CONFIG_MTD_NAND_CAFE is not set # CONFIG_MTD_NAND_NANDSIM is not set CONFIG_MTD_NAND_GPMI_NAND=y # CONFIG_MTD_NAND_PLATFORM is not set @@ -913,15 +971,23 @@ CONFIG_OF_DEVICE=y CONFIG_OF_I2C=y CONFIG_OF_NET=y CONFIG_OF_MDIO=y +CONFIG_OF_PCI=y +CONFIG_OF_PCI_IRQ=y CONFIG_OF_MTD=y # CONFIG_PARPORT is not set CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_DRBD is not set # CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_NVME is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=65536 @@ -930,6 +996,7 @@ CONFIG_BLK_DEV_RAM_SIZE=65536 # CONFIG_ATA_OVER_ETH is not set # CONFIG_MG_DISK is not set # CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_RSXX is not set # # Misc devices @@ -938,9 +1005,14 @@ CONFIG_BLK_DEV_RAM_SIZE=65536 # CONFIG_AD525X_DPOT is not set # CONFIG_ATMEL_PWM is not set # CONFIG_DUMMY_IRQ is not set +# CONFIG_PHANTOM is not set +# CONFIG_INTEL_MID_PTI is not set +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set # CONFIG_ICS932S401 is not set # CONFIG_ATMEL_SSC is not set # CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_HP_ILO is not set # CONFIG_APDS9802ALS is not set # CONFIG_ISL29003 is not set # CONFIG_ISL29020 is not set @@ -953,6 +1025,7 @@ CONFIG_BLK_DEV_RAM_SIZE=65536 # CONFIG_TI_DAC7512 is not set # CONFIG_BMP085_I2C is not set # CONFIG_BMP085_SPI is not set +# CONFIG_PCH_PHUB is not set # CONFIG_USB_SWITCH_FSA9480 is not set # CONFIG_LATTICE_ECP3_CONFIG is not set CONFIG_SRAM=y @@ -967,6 +1040,7 @@ CONFIG_EEPROM_AT24=y # CONFIG_EEPROM_MAX6875 is not set # CONFIG_EEPROM_93CX6 is not set # CONFIG_EEPROM_93XX46 is not set +# CONFIG_CB710_CORE is not set # # Texas Instruments shared transport line discipline @@ -979,6 +1053,8 @@ CONFIG_EEPROM_AT24=y # Altera FPGA firmware download module # # CONFIG_ALTERA_STAPL is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set # # SCSI device support @@ -1025,42 +1101,111 @@ CONFIG_SATA_PMP=y # # Controllers with non-SFF native interface # +# CONFIG_SATA_AHCI is not set CONFIG_SATA_AHCI_PLATFORM=y CONFIG_AHCI_IMX=y +# CONFIG_SATA_INIC162X is not set +# CONFIG_SATA_ACARD_AHCI is not set +# CONFIG_SATA_SIL24 is not set CONFIG_ATA_SFF=y # # SFF controllers with custom DMA interface # +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_SX4 is not set CONFIG_ATA_BMDMA=y # # SATA SFF controllers with BMDMA # +# CONFIG_ATA_PIIX is not set # CONFIG_SATA_HIGHBANK is not set # CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_SVW is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set # # PATA SFF controllers with BMDMA # +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set # CONFIG_PATA_ARASAN_CF is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_ATP867X is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CS5536 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set CONFIG_PATA_IMX=y +# CONFIG_PATA_IT8213 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_MARVELL is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NINJA32 is not set +# CONFIG_PATA_NS87415 is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RDC is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SCH is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_TOSHIBA is not set +# CONFIG_PATA_TRIFLEX is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set # # PIO-only SFF controllers # +# CONFIG_PATA_CMD640_PCI is not set +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set # CONFIG_PATA_PLATFORM is not set +# CONFIG_PATA_RZ1000 is not set # # Generic fallback / legacy drivers # +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_LEGACY is not set # CONFIG_MD is not set # CONFIG_TARGET_CORE is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_FIREWIRE is not set +# CONFIG_FIREWIRE_NOSY is not set +# CONFIG_I2O is not set CONFIG_NETDEVICES=y CONFIG_NET_CORE=y # CONFIG_BONDING is not set # CONFIG_DUMMY is not set # CONFIG_EQUALIZER is not set +# CONFIG_NET_FC is not set CONFIG_MII=y # CONFIG_NET_TEAM is not set # CONFIG_MACVLAN is not set @@ -1070,6 +1215,7 @@ CONFIG_MII=y # CONFIG_NET_POLL_CONTROLLER is not set # CONFIG_TUN is not set # CONFIG_VETH is not set +# CONFIG_ARCNET is not set # # CAIF transport drivers @@ -1084,27 +1230,114 @@ CONFIG_MII=y # CONFIG_NET_DSA_MV88E6131 is not set # CONFIG_NET_DSA_MV88E6123_61_65 is not set CONFIG_ETHERNET=y +CONFIG_NET_VENDOR_3COM=y +# CONFIG_VORTEX is not set +# CONFIG_TYPHOON is not set +CONFIG_NET_VENDOR_ADAPTEC=y +# CONFIG_ADAPTEC_STARFIRE is not set +CONFIG_NET_VENDOR_ALTEON=y +# CONFIG_ACENIC is not set +CONFIG_NET_VENDOR_AMD=y +# CONFIG_AMD8111_ETH is not set +# CONFIG_PCNET32 is not set +CONFIG_NET_VENDOR_ATHEROS=y +# CONFIG_ATL2 is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +# CONFIG_ATL1C is not set +# CONFIG_ALX is not set CONFIG_NET_CADENCE=y # CONFIG_ARM_AT91_ETHER is not set # CONFIG_MACB is not set # CONFIG_NET_VENDOR_BROADCOM is not set +CONFIG_NET_VENDOR_BROCADE=y +# CONFIG_BNA is not set # CONFIG_NET_CALXEDA_XGMAC is not set +CONFIG_NET_VENDOR_CHELSIO=y +# CONFIG_CHELSIO_T1 is not set +# CONFIG_CHELSIO_T3 is not set +# CONFIG_CHELSIO_T4 is not set +# CONFIG_CHELSIO_T4VF is not set # CONFIG_NET_VENDOR_CIRRUS is not set +CONFIG_NET_VENDOR_CISCO=y +# CONFIG_ENIC is not set # CONFIG_DM9000 is not set # CONFIG_DNET is not set +CONFIG_NET_VENDOR_DEC=y +# CONFIG_NET_TULIP is not set +CONFIG_NET_VENDOR_DLINK=y +# CONFIG_DL2K is not set +# CONFIG_SUNDANCE is not set +CONFIG_NET_VENDOR_EMULEX=y +# CONFIG_BE2NET is not set +CONFIG_NET_VENDOR_EXAR=y +# CONFIG_S2IO is not set +# CONFIG_VXGE is not set # CONFIG_NET_VENDOR_FARADAY is not set CONFIG_NET_VENDOR_FREESCALE=y CONFIG_FEC=y +CONFIG_NET_VENDOR_HP=y +# CONFIG_HP100 is not set # CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_IP1000 is not set +# CONFIG_JME is not set # CONFIG_NET_VENDOR_MARVELL is not set +CONFIG_NET_VENDOR_MELLANOX=y +# CONFIG_MLX4_EN is not set +# CONFIG_MLX4_CORE is not set # CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICROCHIP is not set +CONFIG_NET_VENDOR_MYRI=y +# CONFIG_MYRI10GE is not set +# CONFIG_FEALNX is not set # CONFIG_NET_VENDOR_NATSEMI is not set +CONFIG_NET_VENDOR_NVIDIA=y +# CONFIG_FORCEDETH is not set +CONFIG_NET_VENDOR_OKI=y +# CONFIG_PCH_GBE is not set # CONFIG_ETHOC is not set +CONFIG_NET_PACKET_ENGINE=y +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +CONFIG_NET_VENDOR_QLOGIC=y +# CONFIG_QLA3XXX is not set +# CONFIG_QLCNIC is not set +# CONFIG_QLGE is not set +# CONFIG_NETXEN_NIC is not set +CONFIG_NET_VENDOR_REALTEK=y +# CONFIG_8139CP is not set +CONFIG_8139TOO=y +CONFIG_8139TOO_PIO=y +# CONFIG_8139TOO_TUNE_TWISTER is not set +# CONFIG_8139TOO_8129 is not set +# CONFIG_8139_OLD_RX_RESET is not set +CONFIG_R8169=y +CONFIG_NET_VENDOR_RDC=y +# CONFIG_R6040 is not set # CONFIG_NET_VENDOR_SEEQ is not set +CONFIG_NET_VENDOR_SILAN=y +# CONFIG_SC92031 is not set +CONFIG_NET_VENDOR_SIS=y +# CONFIG_SIS900 is not set +# CONFIG_SIS190 is not set +# CONFIG_SFC is not set # CONFIG_NET_VENDOR_SMSC is not set # CONFIG_NET_VENDOR_STMICRO is not set +CONFIG_NET_VENDOR_SUN=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NIU is not set +CONFIG_NET_VENDOR_TEHUTI=y +# CONFIG_TEHUTI is not set +CONFIG_NET_VENDOR_TI=y +# CONFIG_TLAN is not set +CONFIG_NET_VENDOR_VIA=y +# CONFIG_VIA_RHINE is not set +# CONFIG_VIA_VELOCITY is not set # CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set CONFIG_PHYLIB=y # @@ -1175,26 +1408,45 @@ CONFIG_USB_NET_ZAURUS=m # CONFIG_USB_VL600 is not set CONFIG_WLAN=y # CONFIG_LIBERTAS_THINFIRM is not set +# CONFIG_ATMEL is not set # CONFIG_AT76C50X_USB is not set +# CONFIG_PRISM54 is not set # CONFIG_USB_ZD1201 is not set # CONFIG_USB_NET_RNDIS_WLAN is not set +# CONFIG_RTL8180 is not set # CONFIG_RTL8187 is not set +# CONFIG_ADM8211 is not set # CONFIG_MAC80211_HWSIM is not set +# CONFIG_MWL8K is not set +CONFIG_ATH_COMMON=m CONFIG_ATH_CARDS=y # CONFIG_ATH_DEBUG is not set -# CONFIG_ATH9K is not set +# CONFIG_ATH5K is not set +# CONFIG_ATH5K_PCI is not set +CONFIG_ATH9K_HW=m +CONFIG_ATH9K_COMMON=m +# CONFIG_ATH9K_BTCOEX_SUPPORT is not set +CONFIG_ATH9K=m +CONFIG_ATH9K_PCI=y +# CONFIG_ATH9K_AHB is not set +# CONFIG_ATH9K_DEBUGFS is not set +CONFIG_ATH9K_LEGACY_RATE_CONTROL=y # CONFIG_ATH9K_HTC is not set # CONFIG_CARL9170 is not set -CONFIG_ATH6KL=m -CONFIG_ATH6KL_SDIO=m -# CONFIG_ATH6KL_USB is not set -# CONFIG_ATH6KL_DEBUG is not set +# CONFIG_ATH6KL is not set # CONFIG_AR5523 is not set +# CONFIG_WIL6210 is not set # CONFIG_B43 is not set # CONFIG_B43LEGACY is not set # CONFIG_BRCMFMAC is not set # CONFIG_HOSTAP is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set +# CONFIG_IWLWIFI is not set +# CONFIG_IWL4965 is not set +# CONFIG_IWL3945 is not set # CONFIG_LIBERTAS is not set +# CONFIG_HERMES is not set # CONFIG_P54_COMMON is not set # CONFIG_RT2X00 is not set # CONFIG_RTLWIFI is not set @@ -1206,6 +1458,7 @@ CONFIG_ATH6KL_SDIO=m # Enable WiMAX (Networking options) to see the WiMAX drivers # # CONFIG_WAN is not set +# CONFIG_VMXNET3 is not set # CONFIG_ISDN is not set # @@ -1346,6 +1599,7 @@ CONFIG_INPUT_ISL29023=y # CONFIG_SERIO=y CONFIG_SERIO_SERPORT=m +# CONFIG_SERIO_PCIPS2 is not set CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_RAW is not set # CONFIG_SERIO_ALTERA_PS2 is not set @@ -1368,6 +1622,7 @@ CONFIG_UNIX98_PTYS=y # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set # CONFIG_LEGACY_PTYS is not set # CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set # CONFIG_N_GSM is not set # CONFIG_TRACE_SINK is not set # CONFIG_DEVKMEM is not set @@ -1382,17 +1637,21 @@ CONFIG_UNIX98_PTYS=y # # CONFIG_SERIAL_MAX3100 is not set # CONFIG_SERIAL_MAX310X is not set +# CONFIG_SERIAL_MFD_HSU is not set CONFIG_SERIAL_IMX=y CONFIG_SERIAL_IMX_CONSOLE=y CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set # CONFIG_SERIAL_SCCNXP is not set # CONFIG_SERIAL_TIMBERDALE is not set # CONFIG_SERIAL_ALTERA_JTAGUART is not set # CONFIG_SERIAL_ALTERA_UART is not set # CONFIG_SERIAL_IFX6X60 is not set +# CONFIG_SERIAL_PCH_UART is not set # CONFIG_SERIAL_XILINX_PS_UART is not set # CONFIG_SERIAL_ARC is not set +# CONFIG_SERIAL_RP2 is not set CONFIG_SERIAL_FSL_LPUART=y CONFIG_SERIAL_FSL_LPUART_CONSOLE=y # CONFIG_TTY_PRINTK is not set @@ -1405,8 +1664,10 @@ CONFIG_HW_RANDOM=y # CONFIG_HW_RANDOM_IMX_RNG is not set # CONFIG_HW_RANDOM_EXYNOS is not set # CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y CONFIG_MXS_VIIM=y # CONFIG_XILLYBUS is not set CONFIG_IMX_SEMA4=y @@ -1426,7 +1687,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y # CONFIG_I2C_MUX_PINCTRL is not set # CONFIG_I2C_HELPER_AUTO is not set -# CONFIG_I2C_SMBUS is not set +CONFIG_I2C_SMBUS=y # # I2C Algorithms @@ -1440,12 +1701,33 @@ CONFIG_I2C_ALGOPCA=m # # +# PC SMBus host controller drivers +# +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_ISCH is not set +# CONFIG_I2C_PIIX4 is not set +# CONFIG_I2C_NFORCE2 is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set + +# # I2C system bus drivers (mostly embedded / system-on-chip) # # CONFIG_I2C_CBUS_GPIO is not set # CONFIG_I2C_DESIGNWARE_PLATFORM is not set +# CONFIG_I2C_DESIGNWARE_PCI is not set +# CONFIG_I2C_EG20T is not set # CONFIG_I2C_GPIO is not set CONFIG_I2C_IMX=y +# CONFIG_I2C_INTEL_MID is not set # CONFIG_I2C_OCORES is not set # CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_PXA_PCI is not set @@ -1480,8 +1762,10 @@ CONFIG_SPI_BITBANG=y CONFIG_SPI_IMX=y # CONFIG_SPI_FSL_SPI is not set # CONFIG_SPI_OC_TINY is not set +# CONFIG_SPI_PXA2XX is not set # CONFIG_SPI_PXA2XX_PCI is not set # CONFIG_SPI_SC18IS602 is not set +# CONFIG_SPI_TOPCLIFF_PCH is not set # CONFIG_SPI_XCOMM is not set # CONFIG_SPI_XILINX is not set # CONFIG_SPI_DESIGNWARE is not set @@ -1560,6 +1844,7 @@ CONFIG_GPIO_GENERIC=y CONFIG_GPIO_MXC=y # CONFIG_GPIO_RCAR is not set # CONFIG_GPIO_TS5500 is not set +# CONFIG_GPIO_VX855 is not set # CONFIG_GPIO_GRGPIO is not set # @@ -1577,6 +1862,10 @@ CONFIG_GPIO_MAX732X=y # # PCI GPIO expanders: # +# CONFIG_GPIO_BT8XX is not set +# CONFIG_GPIO_AMD8111 is not set +# CONFIG_GPIO_ML_IOH is not set +# CONFIG_GPIO_RDC321X is not set # # SPI GPIO expanders: @@ -1618,6 +1907,7 @@ CONFIG_POWER_SUPPLY=y # CONFIG_CHARGER_GPIO is not set # CONFIG_CHARGER_MANAGER is not set # CONFIG_CHARGER_BQ2415X is not set +CONFIG_CHARGER_BQ2477X=y # CONFIG_CHARGER_SMB347 is not set # CONFIG_BATTERY_GOLDFISH is not set CONFIG_IMX6_USB_CHARGER=y @@ -1652,6 +1942,7 @@ CONFIG_HWMON=y # CONFIG_SENSORS_DS620 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_DA9052_ADC is not set +# CONFIG_SENSORS_I5K_AMB is not set # CONFIG_SENSORS_F71805F is not set # CONFIG_SENSORS_F71882FG is not set # CONFIG_SENSORS_F75375S is not set @@ -1703,6 +1994,7 @@ CONFIG_SENSORS_MAX17135=y # CONFIG_PMBUS is not set # CONFIG_SENSORS_SHT15 is not set # CONFIG_SENSORS_SHT21 is not set +# CONFIG_SENSORS_SIS5595 is not set # CONFIG_SENSORS_SMM665 is not set # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_EMC1403 is not set @@ -1724,7 +2016,9 @@ CONFIG_SENSORS_MAX17135=y # CONFIG_SENSORS_TMP102 is not set # CONFIG_SENSORS_TMP401 is not set # CONFIG_SENSORS_TMP421 is not set +# CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_VT1211 is not set +# CONFIG_SENSORS_VT8231 is not set # CONFIG_SENSORS_W83781D is not set # CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set @@ -1763,6 +2057,14 @@ CONFIG_WATCHDOG=y # CONFIG_MPCORE_WATCHDOG is not set # CONFIG_MAX63XX_WATCHDOG is not set CONFIG_IMX2_WDT=y +# CONFIG_ALIM7101_WDT is not set +# CONFIG_I6300ESB_WDT is not set + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set # # USB-based Watchdog Cards @@ -1803,6 +2105,9 @@ CONFIG_MFD_MC13XXX_I2C=y # CONFIG_HTC_EGPIO is not set # CONFIG_HTC_PASIC3 is not set # CONFIG_HTC_I2CPLD is not set +# CONFIG_LPC_ICH is not set +# CONFIG_LPC_SCH is not set +# CONFIG_MFD_JANZ_CMODIO is not set # CONFIG_MFD_88PM800 is not set # CONFIG_MFD_88PM805 is not set # CONFIG_MFD_88PM860X is not set @@ -1817,6 +2122,8 @@ CONFIG_MFD_MAX17135=y # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_RETU is not set # CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_RDC321X is not set +# CONFIG_MFD_RTSX_PCI is not set # CONFIG_MFD_RC5T583 is not set # CONFIG_MFD_SEC_CORE is not set CONFIG_MFD_SI476X_CORE=y @@ -1843,11 +2150,13 @@ CONFIG_MFD_SYSCON=y # CONFIG_TWL6040_CORE is not set # CONFIG_MFD_WL1273_CORE is not set # CONFIG_MFD_LM3533 is not set +# CONFIG_MFD_TIMBERDALE is not set # CONFIG_MFD_TC3589X is not set # CONFIG_MFD_TMIO is not set # CONFIG_MFD_T7L66XB is not set # CONFIG_MFD_TC6387XB is not set # CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_VX855 is not set # CONFIG_MFD_ARIZONA_I2C is not set # CONFIG_MFD_ARIZONA_SPI is not set # CONFIG_MFD_WM8400 is not set @@ -1978,7 +2287,9 @@ CONFIG_USB_GSPCA=m # Webcam, TV (analog/digital) USB devices # # CONFIG_VIDEO_EM28XX is not set +# CONFIG_MEDIA_PCI_SUPPORT is not set CONFIG_V4L_PLATFORM_DRIVERS=y +# CONFIG_VIDEO_CAFE_CCIC is not set # CONFIG_VIDEO_TIMBERDALE is not set CONFIG_VIDEO_MXC_OUTPUT=y CONFIG_VIDEO_MXC_CAPTURE=m @@ -2015,6 +2326,7 @@ CONFIG_RADIO_ADAPTERS=y CONFIG_RADIO_SI476X=y # CONFIG_USB_MR800 is not set # CONFIG_USB_DSBR is not set +# CONFIG_RADIO_MAXIRADIO is not set # CONFIG_RADIO_SHARK is not set # CONFIG_RADIO_SHARK2 is not set # CONFIG_I2C_SI4713 is not set @@ -2116,11 +2428,25 @@ CONFIG_MEDIA_TUNER_MC44S803=y # # Graphics support # +CONFIG_VGA_ARB=y +CONFIG_VGA_ARB_MAX_GPUS=16 CONFIG_DRM=y +# CONFIG_DRM_TDFX is not set +# CONFIG_DRM_R128 is not set +# CONFIG_DRM_RADEON is not set +# CONFIG_DRM_NOUVEAU is not set +# CONFIG_DRM_MGA is not set +# CONFIG_DRM_VIA is not set +# CONFIG_DRM_SAVAGE is not set CONFIG_DRM_VIVANTE=y # CONFIG_DRM_EXYNOS is not set +# CONFIG_DRM_VMWGFX is not set # CONFIG_DRM_UDL is not set +# CONFIG_DRM_AST is not set +# CONFIG_DRM_MGAG200 is not set +# CONFIG_DRM_CIRRUS_QEMU is not set # CONFIG_DRM_TILCDC is not set +# CONFIG_DRM_QXL is not set # CONFIG_TEGRA_HOST1X is not set # CONFIG_VGASTATE is not set # CONFIG_VIDEO_OUTPUT_CONTROL is not set @@ -2149,14 +2475,39 @@ CONFIG_FB_MODE_HELPERS=y # # Frame buffer hardware drivers # +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set # CONFIG_FB_UVESA is not set # CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set # CONFIG_FB_TMIO is not set # CONFIG_FB_SMSCUFX is not set # CONFIG_FB_UDL is not set # CONFIG_FB_GOLDFISH is not set # CONFIG_FB_VIRTUAL is not set # CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set CONFIG_FB_MX3=y # CONFIG_FB_BROADSHEET is not set # CONFIG_FB_AUO_K190X is not set @@ -2251,6 +2602,71 @@ CONFIG_SND_DRIVERS=y # CONFIG_SND_MTPAV is not set # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_MPU401 is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_CS5535AUDIO is not set +# CONFIG_SND_CTXFI is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_INDIGOIOX is not set +# CONFIG_SND_INDIGODJX is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_LOLA is not set +# CONFIG_SND_LX6464ES is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set CONFIG_SND_ARM=y # CONFIG_SND_SPI is not set # CONFIG_SND_USB is not set @@ -2375,9 +2791,9 @@ CONFIG_USB_HID=y # I2C HID support # # CONFIG_I2C_HID is not set -# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_OHCI=y CONFIG_USB_ARCH_HAS_EHCI=y -# CONFIG_USB_ARCH_HAS_XHCI is not set +CONFIG_USB_ARCH_HAS_XHCI=y CONFIG_USB_SUPPORT=y CONFIG_USB_COMMON=y CONFIG_USB_ARCH_HAS_HCD=y @@ -2401,15 +2817,19 @@ CONFIG_USB_DEFAULT_PERSIST=y # USB Host Controller Drivers # # CONFIG_USB_C67X00_HCD is not set +# CONFIG_USB_XHCI_HCD is not set CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y +CONFIG_USB_EHCI_PCI=y # CONFIG_USB_EHCI_MXC is not set # CONFIG_USB_EHCI_HCD_PLATFORM is not set # CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set # CONFIG_USB_ISP1362_HCD is not set +# CONFIG_USB_OHCI_HCD is not set +# CONFIG_USB_UHCI_HCD is not set # CONFIG_USB_SL811_HCD is not set # CONFIG_USB_R8A66597_HCD is not set # CONFIG_USB_IMX21_HCD is not set @@ -2523,7 +2943,11 @@ CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2 # CONFIG_USB_MV_UDC is not set # CONFIG_USB_MV_U3D is not set # CONFIG_USB_M66592 is not set +# CONFIG_USB_AMD5536UDC is not set # CONFIG_USB_NET2272 is not set +# CONFIG_USB_NET2280 is not set +# CONFIG_USB_GOKU is not set +# CONFIG_USB_EG20T is not set # CONFIG_USB_DUMMY_HCD is not set CONFIG_USB_LIBCOMPOSITE=m CONFIG_USB_F_ACM=m @@ -2550,6 +2974,7 @@ CONFIG_USB_G_SERIAL=m # CONFIG_USB_G_HID is not set # CONFIG_USB_G_DBGP is not set # CONFIG_USB_G_WEBCAM is not set +# CONFIG_UWB is not set CONFIG_MMC=y # CONFIG_MMC_DEBUG is not set CONFIG_MMC_UNSAFE_RESUME=y @@ -2569,11 +2994,15 @@ CONFIG_MMC_BLOCK_BOUNCE=y # CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_IO_ACCESSORS=y +# CONFIG_MMC_SDHCI_PCI is not set CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_ESDHC_IMX=y # CONFIG_MMC_SDHCI_PXAV3 is not set # CONFIG_MMC_SDHCI_PXAV2 is not set # CONFIG_MMC_MXC is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_CB710 is not set +# CONFIG_MMC_VIA_SDMMC is not set # CONFIG_MMC_DW is not set # CONFIG_MMC_VUB300 is not set # CONFIG_MMC_USHC is not set @@ -2665,6 +3094,7 @@ CONFIG_LEDS_TRIGGER_GPIO=y # CONFIG_LEDS_TRIGGER_TRANSIENT is not set # CONFIG_LEDS_TRIGGER_CAMERA is not set # CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set # CONFIG_EDAC is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y @@ -2781,24 +3211,31 @@ CONFIG_DMA_OF=y # # Virtio drivers # +# CONFIG_VIRTIO_PCI is not set # CONFIG_VIRTIO_MMIO is not set # # Microsoft Hyper-V guest support # CONFIG_STAGING=y +# CONFIG_ET131X is not set # CONFIG_USBIP_CORE is not set # CONFIG_W35UND is not set # CONFIG_PRISM2_USB is not set # CONFIG_ECHO is not set # CONFIG_COMEDI is not set # CONFIG_ASUS_OLED is not set +# CONFIG_R8187SE is not set +# CONFIG_RTL8192U is not set # CONFIG_RTLLIB is not set # CONFIG_R8712U is not set # CONFIG_RTS5139 is not set # CONFIG_TRANZPORT is not set +# CONFIG_IDE_PHISON is not set # CONFIG_LINE6_USB is not set +# CONFIG_VT6655 is not set # CONFIG_VT6656 is not set +# CONFIG_DX_SEP is not set # # IIO staging drivers @@ -2895,6 +3332,9 @@ CONFIG_STAGING=y # # CONFIG_IIO_SIMPLE_DUMMY is not set # CONFIG_ZSMALLOC is not set +# CONFIG_FB_SM7XX is not set +# CONFIG_CRYSTALHD is not set +# CONFIG_FB_XGI is not set # CONFIG_USB_ENESTORAGE is not set # CONFIG_BCM_WIMAX is not set # CONFIG_FT1000 is not set @@ -2914,6 +3354,9 @@ CONFIG_STAGING=y # CONFIG_USB_WPAN_HCD is not set # CONFIG_WIMAX_GDM72XX is not set # CONFIG_CSR_WIFI is not set +CONFIG_NET_VENDOR_SILICOM=y +# CONFIG_SBYPASS is not set +# CONFIG_BPCTL is not set # CONFIG_CED1401 is not set # CONFIG_DRM_IMX is not set # CONFIG_DGRP is not set @@ -3041,6 +3484,7 @@ CONFIG_VF610_ADC=y # # CONFIG_AK8975 is not set # CONFIG_IIO_ST_MAGN_3AXIS is not set +# CONFIG_VME_BUS is not set CONFIG_PWM=y CONFIG_PWM_IMX=y CONFIG_IRQCHIP=y @@ -3467,6 +3911,7 @@ CONFIG_CRYPTO_LZO=y # CONFIG_CRYPTO_USER_API_HASH is not set # CONFIG_CRYPTO_USER_API_SKCIPHER is not set CONFIG_CRYPTO_HW=y +# CONFIG_CRYPTO_DEV_HIFN_795X is not set CONFIG_CRYPTO_DEV_FSL_CAAM=y CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 59cda8b..eb797f8 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -711,6 +711,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) /* ipu clock initialization */ init_ldb_clks(); + imx_clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]); + imx_clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]); imx_clk_set_parent(clk[ipu1_di0_pre_sel], clk[pll5_video_div]); imx_clk_set_parent(clk[ipu1_di1_pre_sel], clk[pll5_video_div]); imx_clk_set_parent(clk[ipu2_di0_pre_sel], clk[pll5_video_div]); diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index c346fee..fe65afd 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -335,11 +335,11 @@ static int imx6_pcie_deassert_core_reset(struct pcie_port *pp) } /* allow the clocks to stabilize */ - udelay(200); + usleep_range(200, 500); if (gpio_is_valid(imx6_pcie->reset_gpio)) { gpio_set_value_cansleep(imx6_pcie->reset_gpio, 0); - mdelay(1); + msleep(100); gpio_set_value_cansleep(imx6_pcie->reset_gpio, 1); } @@ -574,6 +574,9 @@ static int imx6_add_pcie_port(struct pcie_port *pp, pp->ops = &imx6_pcie_host_ops; spin_lock_init(&pp->conf_lock); + + usleep_range(25000, 30000); + ret = dw_pcie_host_init(pp); if (ret) { dev_err(&pdev->dev, "failed to initialize host\n"); diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index de47f46..5a8b862 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -342,6 +342,15 @@ config CHARGER_BQ2415X You'll need this driver to charge batteries on e.g. Nokia RX-51/N900. +config CHARGER_BQ2477X + tristate "BQ24770/BQ24773 Charger driver support" + depends on I2C + help + BQ2477X is a companion pmic for smartphones and tablets + which supports battery charging feature. + Say Y here to enable driver support for TI BQ24770/ + BQ24773 Battery Charger. + config CHARGER_SMB347 tristate "Summit Microelectronics SMB347 Battery Charger" depends on I2C diff --git a/drivers/power/Makefile b/drivers/power/Makefile index 16746a5..0d09a96 100644 --- a/drivers/power/Makefile +++ b/drivers/power/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_CHARGER_MANAGER) += charger-manager.o obj-$(CONFIG_CHARGER_MAX8997) += max8997_charger.o obj-$(CONFIG_CHARGER_MAX8998) += max8998_charger.o obj-$(CONFIG_CHARGER_BQ2415X) += bq2415x_charger.o +obj-$(CONFIG_CHARGER_BQ2477X) += bq2477x-charger.o obj-$(CONFIG_POWER_AVS) += avs/ obj-$(CONFIG_CHARGER_SMB347) += smb347-charger.o obj-$(CONFIG_CHARGER_TPS65090) += tps65090-charger.o diff --git a/drivers/power/bq2477x-charger.c b/drivers/power/bq2477x-charger.c new file mode 100644 index 0000000..50c7c9e --- /dev/null +++ b/drivers/power/bq2477x-charger.c @@ -0,0 +1,463 @@ +/* + * bq2477x-charger.c -- BQ24770/3 Charger driver + * + * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved. + * + * Author: Andy Park + * Author: Syed Rafiuddin + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, + * whether express or implied; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +enum bq2477x_chip_id { BQ24770, BQ24773}; + +struct bq2477x_chip { + struct device *dev; + struct power_supply ac; + struct regmap *regmap; + struct regmap *regmap_word; + struct mutex mutex; + int irq; + int charger_detect_gpio; + int charger_detect_gpio_active_low; + int ac_online; + int dac_ichg; + int dac_v; + int dac_minsv; + int dac_iin; + int suspended; + int wdt_refresh_timeout; + struct kthread_worker bq_kworker; + struct task_struct *bq_kworker_task; + struct kthread_work bq_wdt_work; +}; + +/* Kthread scheduling parameters */ +struct sched_param bq2477x_param = { + .sched_priority = MAX_RT_PRIO - 1, +}; + +static const struct regmap_config bq2477x_regmap_config = { + .name = "bq2477x", + .reg_bits = 8, + .val_bits = 8, + .max_register = BQ2477X_MAX_REGS, +}; + +static const struct regmap_config bq2477x_regmap_word_config = { + .name = "bq2477x_word", + .reg_bits = 8, + .val_bits = 16, + .max_register = BQ2477X_MAX_REGS, +}; + +static int bq2477x_read(struct bq2477x_chip *bq2477x, + unsigned int reg, unsigned int *val) +{ + return regmap_read(bq2477x->regmap, reg, val); +} + +static int bq2477x_write(struct bq2477x_chip *bq2477x, + unsigned int reg, unsigned int val) +{ + return regmap_write(bq2477x->regmap, reg, val); +} + +static int bq2477x_write_word(struct bq2477x_chip *bq2477x, + unsigned int reg, unsigned int val) +{ + return regmap_write(bq2477x->regmap_word, reg, val); +} + +static int bq2477x_update_bits(struct bq2477x_chip *bq2477x, + unsigned int reg, unsigned int mask, unsigned int val) +{ + return regmap_update_bits(bq2477x->regmap, reg, mask, val); +} + +static enum power_supply_property bq2477x_psy_props[] = { + POWER_SUPPLY_PROP_ONLINE, +}; + +static int bq2477x_ac_get_property(struct power_supply *psy, + enum power_supply_property psp, union power_supply_propval *val) +{ + struct bq2477x_chip *bq2477x; + + bq2477x = container_of(psy, struct bq2477x_chip, ac); + if (psp == POWER_SUPPLY_PROP_ONLINE) + val->intval = bq2477x->ac_online; + else + return -EINVAL; + return 0; +} + +static int bq2477x_show_chip_version(struct bq2477x_chip *bq2477x) +{ + int ret; + unsigned int val; + + ret = bq2477x_read(bq2477x, BQ2477X_DEVICE_ID_REG, &val); + if (ret < 0) { + dev_err(bq2477x->dev, "DEVICE_ID_REG read failed: %d\n", ret); + return ret; + } + + if (val == BQ24770_DEVICE_ID) + dev_info(bq2477x->dev, "chip type BQ24770 detected\n"); + else if (val == BQ24773_DEVICE_ID) + dev_info(bq2477x->dev, "chip type BQ24773 detected\n"); + else { + dev_info(bq2477x->dev, "unrecognized chip type: 0x%4x\n", val); + return -EINVAL; + } + return 0; +} + +static int bq2477x_hw_init(struct bq2477x_chip *bq2477x) +{ + int ret = 0; + + /* Configure control */ + ret = bq2477x_write(bq2477x, BQ2477X_CHARGE_OPTION_0_MSB, + BQ2477X_CHARGE_OPTION_POR_MSB); + if (ret < 0) { + dev_err(bq2477x->dev, "CHARGE_OPTION_0 write failed %d\n", ret); + return ret; + } + ret = bq2477x_write(bq2477x, BQ2477X_CHARGE_OPTION_0_LSB, + BQ2477X_CHARGE_OPTION_POR_LSB); + if (ret < 0) { + dev_err(bq2477x->dev, "CHARGE_OPTION_0 write failed %d\n", ret); + return ret; + } + + ret = bq2477x_write_word(bq2477x, BQ2477X_MAX_CHARGE_VOLTAGE_LSB, + (bq2477x->dac_v >> 8) | (bq2477x->dac_v << 8)); + if (ret < 0) { + dev_err(bq2477x->dev, "CHARGE_VOLTAGE write failed %d\n", ret); + return ret; + } + + ret = bq2477x_write(bq2477x, BQ2477X_MIN_SYS_VOLTAGE, + bq2477x->dac_minsv >> BQ2477X_MIN_SYS_VOLTAGE_SHIFT); + if (ret < 0) { + dev_err(bq2477x->dev, "MIN_SYS_VOLTAGE write failed %d\n", ret); + return ret; + } + + /* Configure setting input current */ + ret = bq2477x_write(bq2477x, BQ2477X_INPUT_CURRENT, + bq2477x->dac_iin >> BQ2477X_INPUT_CURRENT_SHIFT); + if (ret < 0) { + dev_err(bq2477x->dev, "INPUT_CURRENT write failed %d\n", ret); + return ret; + } + + ret = bq2477x_write_word(bq2477x, BQ2477X_CHARGE_CURRENT_LSB, + (bq2477x->dac_ichg >> 8) | (bq2477x->dac_ichg << 8)); + if (ret < 0) { + dev_err(bq2477x->dev, "CHARGE_CURRENT write failed %d\n", ret); + return ret; + } + + return ret; +} + +static void bq2477x_work_thread(struct kthread_work *work) +{ + struct bq2477x_chip *bq2477x = container_of(work, + struct bq2477x_chip, bq_wdt_work); + int ret; + + for (;;) { + ret = bq2477x_hw_init(bq2477x); + if (ret < 0) { + dev_err(bq2477x->dev, "Hardware init failed %d\n", ret); + return; + } + + ret = bq2477x_update_bits(bq2477x, BQ2477X_CHARGE_OPTION_0_MSB, + BQ2477X_WATCHDOG_TIMER, 0x60); + if (ret < 0) { + dev_err(bq2477x->dev, + "CHARGE_OPTION write failed %d\n", ret); + return; + } + + msleep(bq2477x->wdt_refresh_timeout * 1000); + } +} + +static void of_bq2477x_parse_platform_data(struct i2c_client *client, + struct bq2477x_platform_data *pdata) +{ + struct device_node *np = client->dev.of_node; + enum of_gpio_flags flags; + u32 pval; + int ret; + + ret = of_property_read_u32(np, "ti,dac-ichg", &pval); + if (!ret) + pdata->dac_ichg = pval; + else + dev_warn(&client->dev, "dac-ichg not provided\n"); + + ret = of_property_read_u32(np, "ti,dac-v", &pval); + if (!ret) + pdata->dac_v = pval; + else + dev_warn(&client->dev, "dac-v not provided\n"); + + ret = of_property_read_u32(np, "ti,dac-minsv", &pval); + if (!ret) + pdata->dac_minsv = pval; + else + dev_warn(&client->dev, "dac-minsv not provided\n"); + + ret = of_property_read_u32(np, "ti,dac-iin", &pval); + if (!ret) + pdata->dac_iin = pval; + else + dev_warn(&client->dev, "dac-iin not provided\n"); + + ret = of_property_read_u32(np, "ti,wdt-refresh-timeout", &pval); + if (!ret) + pdata->wdt_refresh_timeout = pval; + else + dev_warn(&client->dev, "wdt-refresh-timeout not provided\n"); + + pdata->charger_detect_gpio = of_get_named_gpio_flags(np, + "ti,charger-detect-gpio", + 0, &flags); + if (pdata->charger_detect_gpio >= 0) + pdata->charger_detect_gpio_active_low = flags & + OF_GPIO_ACTIVE_LOW; + else + dev_warn(&client->dev, "invalid charger_detect_gpio\n"); +} + +static irqreturn_t bq2477x_charger_detect_irq(int irq, void *data) +{ + struct bq2477x_chip *bq2477x = data; + bq2477x->ac_online = + gpio_get_value_cansleep(bq2477x->charger_detect_gpio); + bq2477x->ac_online ^= bq2477x->charger_detect_gpio_active_low; + + if (bq2477x->ac_online == 1) + bq2477x_hw_init(bq2477x); + + power_supply_changed(&bq2477x->ac); + return IRQ_HANDLED; +} + +static int bq2477x_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct bq2477x_chip *bq2477x = NULL; + struct bq2477x_platform_data *pdata; + int ret = 0; + + if (client->dev.of_node) { + pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + of_bq2477x_parse_platform_data(client, pdata); + } else { + pdata = client->dev.platform_data; + } + + if (!pdata) { + dev_err(&client->dev, "No Platform data"); + return -EINVAL; + } + + bq2477x = devm_kzalloc(&client->dev, sizeof(*bq2477x), GFP_KERNEL); + if (!bq2477x) { + dev_err(&client->dev, "Memory allocation failed\n"); + ret = -ENOMEM; + return ret; + } + bq2477x->dev = &client->dev; + + bq2477x->dac_ichg = pdata->dac_ichg; + bq2477x->dac_v = pdata->dac_v; + bq2477x->dac_minsv = pdata->dac_minsv; + bq2477x->dac_iin = pdata->dac_iin; + bq2477x->wdt_refresh_timeout = pdata->wdt_refresh_timeout; + bq2477x->charger_detect_gpio = pdata->charger_detect_gpio; + bq2477x->charger_detect_gpio_active_low = + pdata->charger_detect_gpio_active_low; + + i2c_set_clientdata(client, bq2477x); + mutex_init(&bq2477x->mutex); + + bq2477x->ac_online = 0; + + bq2477x->regmap = devm_regmap_init_i2c(client, &bq2477x_regmap_config); + if (IS_ERR(bq2477x->regmap)) { + ret = PTR_ERR(bq2477x->regmap); + dev_err(&client->dev, "regmap init failed with err %d\n", ret); + return ret; + } + + bq2477x->regmap_word = devm_regmap_init_i2c(client, + &bq2477x_regmap_word_config); + if (IS_ERR(bq2477x->regmap_word)) { + ret = PTR_ERR(bq2477x->regmap_word); + dev_err(&client->dev, + "regmap_word init failed with err %d\n", ret); + return ret; + } + + ret = bq2477x_show_chip_version(bq2477x); + if (ret < 0) { + dev_err(bq2477x->dev, "version read failed %d\n", ret); + return ret; + } + + bq2477x->ac.name = "bq2477x-ac"; + bq2477x->ac.type = POWER_SUPPLY_TYPE_MAINS; + bq2477x->ac.get_property = bq2477x_ac_get_property; + bq2477x->ac.properties = bq2477x_psy_props; + bq2477x->ac.num_properties = ARRAY_SIZE(bq2477x_psy_props); + + ret = power_supply_register(bq2477x->dev, &bq2477x->ac); + if (ret < 0) { + dev_err(bq2477x->dev, + "AC power supply register failed %d\n", ret); + return ret; + } + + if (gpio_is_valid(bq2477x->charger_detect_gpio)) { + ret = devm_gpio_request_one(bq2477x->dev, + bq2477x->charger_detect_gpio, GPIOF_IN, + "bq2477x-charger-detect"); + if (ret) { + dev_err(bq2477x->dev, "gpio request failed %d\n", ret); + goto psy_err; + } + + bq2477x->irq = gpio_to_irq(bq2477x->charger_detect_gpio); + bq2477x->ac_online = + gpio_get_value_cansleep(bq2477x->charger_detect_gpio); + bq2477x->ac_online ^= bq2477x->charger_detect_gpio_active_low; + + ret = devm_request_threaded_irq(bq2477x->dev, bq2477x->irq, + NULL, bq2477x_charger_detect_irq, + IRQF_ONESHOT | IRQF_TRIGGER_RISING + | IRQF_TRIGGER_FALLING, dev_name(bq2477x->dev), + bq2477x); + if (ret < 0) { + dev_err(bq2477x->dev, + "Failed to request irq %d\n", ret); + goto psy_err; + } + } + + ret = bq2477x_hw_init(bq2477x); + if (ret < 0) { + dev_err(bq2477x->dev, "Hardware init failed %d\n", ret); + goto psy_err; + } + + init_kthread_worker(&bq2477x->bq_kworker); + bq2477x->bq_kworker_task = kthread_run(kthread_worker_fn, + &bq2477x->bq_kworker, + dev_name(bq2477x->dev)); + if (IS_ERR(bq2477x->bq_kworker_task)) { + ret = PTR_ERR(bq2477x->bq_kworker_task); + dev_err(&client->dev, "Kworker task creation failed %d\n", ret); + goto psy_err; + } + + init_kthread_work(&bq2477x->bq_wdt_work, bq2477x_work_thread); + sched_setscheduler(bq2477x->bq_kworker_task, + SCHED_FIFO, &bq2477x_param); + queue_kthread_work(&bq2477x->bq_kworker, &bq2477x->bq_wdt_work); + + dev_info(bq2477x->dev, "bq2477x charger registerd\n"); + + return ret; + +psy_err: + power_supply_unregister(&bq2477x->ac); + return ret; +} + +static int bq2477x_remove(struct i2c_client *client) +{ + struct bq2477x_chip *bq2477x = i2c_get_clientdata(client); + flush_kthread_worker(&bq2477x->bq_kworker); + kthread_stop(bq2477x->bq_kworker_task); + power_supply_unregister(&bq2477x->ac); + return 0; +} + +static const struct i2c_device_id bq2477x_id[] = { + { "bq24770", BQ24770 }, + { "bq24773", BQ24773 }, + {}, +}; +MODULE_DEVICE_TABLE(i2c, bq2477x_id); + +static struct i2c_driver bq2477x_i2c_driver = { + .driver = { + .name = "bq2477x-charger", + .owner = THIS_MODULE, + }, + .probe = bq2477x_probe, + .remove = bq2477x_remove, + .id_table = bq2477x_id, +}; + +static int __init bq2477x_module_init(void) +{ + return i2c_add_driver(&bq2477x_i2c_driver); +} +module_init(bq2477x_module_init); + +static void __exit bq2477x_cleanup(void) +{ + i2c_del_driver(&bq2477x_i2c_driver); +} +module_exit(bq2477x_cleanup); + +MODULE_DESCRIPTION("BQ24770/BQ24773 battery charger driver"); +MODULE_AUTHOR("Andy Park "); +MODULE_AUTHOR("Syed Rafiuddin + * Author: Syed Rafiuddin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + * + */ + +#ifndef __LINUX_POWER_BQ2477X_CHARGER_H +#define __LINUX_POWER_BQ2477X_CHARGER_H + +/* Register definitions */ +#define BQ2477X_CHARGE_OPTION_0_LSB 0x00 +#define BQ2477X_CHARGE_OPTION_0_MSB 0x01 +#define BQ2477X_CHARGE_OPTION_1_LSB 0x02 +#define BQ2477X_CHARGE_OPTION_1_MSB 0x03 +#define BQ2477X_PROCHOT_OPTION_0_LSB 0x04 +#define BQ2477X_PROCHOT_OPTION_0_MSB 0x05 +#define BQ2477X_PROCHOT_OPTION_1_LSB 0x06 +#define BQ2477X_PROCHOT_OPTION_1_MSB 0x07 +#define BQ2477X_DEVICE_ID_REG 0x09 +#define BQ2477X_CHARGE_CURRENT_LSB 0x0A +#define BQ2477X_CHARGE_CURRENT_MSB 0x0B +#define BQ2477X_MAX_CHARGE_VOLTAGE_LSB 0x0C +#define BQ2477X_MAX_CHARGE_VOLTAGE_MSB 0x0D +#define BQ2477X_MIN_SYS_VOLTAGE 0x0E +#define BQ2477X_INPUT_CURRENT 0x0F + +#define BQ24770_DEVICE_ID 0x14 +#define BQ24773_DEVICE_ID 0x41 + +#define BQ2477X_CHARGE_OPTION_POR_LSB 0x0E +#define BQ2477X_CHARGE_OPTION_POR_MSB 0x81 + +#define BQ2477X_CHARGE_CURRENT_SHIFT 6 +#define BQ2477X_MAX_CHARGE_VOLTAGE_SHIFT 4 +#define BQ2477X_MIN_SYS_VOLTAGE_SHIFT 8 +#define BQ2477X_INPUT_CURRENT_SHIFT 6 + +#define BQ2477X_ENABLE_CHARGE_MASK BIT(0) +#define BQ2477X_WATCHDOG_TIMER 0x60 + +#define BQ2477X_MAX_REGS (BQ2477X_INPUT_CURRENT + 1) + +struct bq2477x_platform_data { + int irq; + int dac_ctrl; + int dac_ichg; + int dac_v; + int dac_minsv; + int dac_iin; + int wdt_refresh_timeout; + int gpio; + int charger_detect_gpio; + int charger_detect_gpio_active_low; +}; +#endif /* __LINUX_POWER_BQ2477X_CHARGER_H */