Doug / smarc-fsl-linux-kernel

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/*

1

/*

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* su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI

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* su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI

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*

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*

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*

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*

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* This is mainly a variation of 8250.c, credits go to authors mentioned

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* This is mainly a variation of 8250.c, credits go to authors mentioned

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* therein. In fact this driver should be merged into the generic 8250.c

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* therein. In fact this driver should be merged into the generic 8250.c

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* infrastructure perhaps using a 8250_sparc.c module.

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* infrastructure perhaps using a 8250_sparc.c module.

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*

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*

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* Fixed to use tty_get_baud_rate().

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* Fixed to use tty_get_baud_rate().

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* Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12

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* Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12

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*

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*

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* Converted to new 2.5.x UART layer.

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* Converted to new 2.5.x UART layer.

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* David S. Miller (davem@davemloft.net), 2002-Jul-29

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* David S. Miller (davem@davemloft.net), 2002-Jul-29

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*/

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*/

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#include <linux/module.h>

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#include <linux/module.h>

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#include <linux/kernel.h>

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#include <linux/kernel.h>

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#include <linux/spinlock.h>

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#include <linux/spinlock.h>

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#include <linux/errno.h>

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#include <linux/errno.h>

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#include <linux/tty.h>

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#include <linux/tty.h>

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#include <linux/tty_flip.h>

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#include <linux/tty_flip.h>

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#include <linux/major.h>

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#include <linux/major.h>

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#include <linux/string.h>

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#include <linux/string.h>

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#include <linux/ptrace.h>

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#include <linux/ptrace.h>

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#include <linux/ioport.h>

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#include <linux/ioport.h>

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#include <linux/circ_buf.h>

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#include <linux/circ_buf.h>

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#include <linux/serial.h>

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#include <linux/serial.h>

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#include <linux/sysrq.h>

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#include <linux/sysrq.h>

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#include <linux/console.h>

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#include <linux/console.h>

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#include <linux/slab.h>

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#include <linux/slab.h>

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#ifdef CONFIG_SERIO

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#ifdef CONFIG_SERIO

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#include <linux/serio.h>

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#include <linux/serio.h>

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#endif

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#endif

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#include <linux/serial_reg.h>

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#include <linux/serial_reg.h>

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#include <linux/init.h>

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#include <linux/init.h>

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#include <linux/delay.h>

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#include <linux/delay.h>

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#include <linux/of_device.h>

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#include <linux/of_device.h>

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#include <asm/io.h>

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#include <asm/io.h>

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#include <asm/irq.h>

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#include <asm/irq.h>

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#include <asm/prom.h>

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#include <asm/prom.h>

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#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)

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#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)

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#define SUPPORT_SYSRQ

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#define SUPPORT_SYSRQ

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#endif

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#endif

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#include <linux/serial_core.h>

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#include <linux/serial_core.h>

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#include "suncore.h"

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#include "suncore.h"

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/* We are on a NS PC87303 clocked with 24.0 MHz, which results

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/* We are on a NS PC87303 clocked with 24.0 MHz, which results

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* in a UART clock of 1.8462 MHz.

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* in a UART clock of 1.8462 MHz.

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*/

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*/

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#define SU_BASE_BAUD (1846200 / 16)

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#define SU_BASE_BAUD (1846200 / 16)

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enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };

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enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };

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static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };

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static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };

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/*

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/*

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* Here we define the default xmit fifo size used for each type of UART.

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* Here we define the default xmit fifo size used for each type of UART.

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*/

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*/

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static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {

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static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {

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{ "unknown", 1, 0 },

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{ "unknown", 1, 0 },

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{ "8250", 1, 0 },

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{ "8250", 1, 0 },

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{ "16450", 1, 0 },

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{ "16450", 1, 0 },

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{ "16550", 1, 0 },

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{ "16550", 1, 0 },

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{ "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },

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{ "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },

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{ "Cirrus", 1, 0 },

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{ "Cirrus", 1, 0 },

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{ "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },

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{ "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },

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{ "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },

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{ "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },

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{ "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },

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{ "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },

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{ "Startech", 1, 0 },

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{ "Startech", 1, 0 },

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{ "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },

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{ "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },

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{ "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },

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{ "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },

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{ "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },

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{ "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },

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{ "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }

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{ "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }

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};

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};

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struct uart_sunsu_port {

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struct uart_sunsu_port {

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struct uart_port port;

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struct uart_port port;

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unsigned char acr;

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unsigned char acr;

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unsigned char ier;

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unsigned char ier;

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unsigned short rev;

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unsigned short rev;

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unsigned char lcr;

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unsigned char lcr;

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unsigned int lsr_break_flag;

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unsigned int lsr_break_flag;

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unsigned int cflag;

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unsigned int cflag;

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/* Probing information. */

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/* Probing information. */

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enum su_type su_type;

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enum su_type su_type;

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unsigned int type_probed; /* XXX Stupid */

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unsigned int type_probed; /* XXX Stupid */

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unsigned long reg_size;

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unsigned long reg_size;

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#ifdef CONFIG_SERIO

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#ifdef CONFIG_SERIO

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struct serio serio;

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struct serio serio;

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int serio_open;

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int serio_open;

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#endif

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#endif

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};

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};

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static unsigned int serial_in(struct uart_sunsu_port *up, int offset)

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static unsigned int serial_in(struct uart_sunsu_port *up, int offset)

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{

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{

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offset <<= up->port.regshift;

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offset <<= up->port.regshift;

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switch (up->port.iotype) {

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switch (up->port.iotype) {

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case UPIO_HUB6:

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case UPIO_HUB6:

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outb(up->port.hub6 - 1 + offset, up->port.iobase);

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outb(up->port.hub6 - 1 + offset, up->port.iobase);

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return inb(up->port.iobase + 1);

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return inb(up->port.iobase + 1);

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case UPIO_MEM:

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case UPIO_MEM:

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return readb(up->port.membase + offset);

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return readb(up->port.membase + offset);

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default:

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default:

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return inb(up->port.iobase + offset);

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return inb(up->port.iobase + offset);

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}

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}

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}

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}

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static void serial_out(struct uart_sunsu_port *up, int offset, int value)

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static void serial_out(struct uart_sunsu_port *up, int offset, int value)

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{

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{

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#ifndef CONFIG_SPARC64

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#ifndef CONFIG_SPARC64

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/*

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/*

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* MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are

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* MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are

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* connected with a gate then go to SlavIO. When IRQ4 goes tristated

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* connected with a gate then go to SlavIO. When IRQ4 goes tristated

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* gate outputs a logical one. Since we use level triggered interrupts

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* gate outputs a logical one. Since we use level triggered interrupts

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* we have lockup and watchdog reset. We cannot mask IRQ because

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* we have lockup and watchdog reset. We cannot mask IRQ because

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* keyboard shares IRQ with us (Word has it as Bob Smelik's design).

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* keyboard shares IRQ with us (Word has it as Bob Smelik's design).

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* This problem is similar to what Alpha people suffer, see serial.c.

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* This problem is similar to what Alpha people suffer, see serial.c.

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*/

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*/

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if (offset == UART_MCR)

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if (offset == UART_MCR)

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value |= UART_MCR_OUT2;

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value |= UART_MCR_OUT2;

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#endif

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#endif

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offset <<= up->port.regshift;

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offset <<= up->port.regshift;

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switch (up->port.iotype) {

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switch (up->port.iotype) {

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case UPIO_HUB6:

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case UPIO_HUB6:

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outb(up->port.hub6 - 1 + offset, up->port.iobase);

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outb(up->port.hub6 - 1 + offset, up->port.iobase);

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outb(value, up->port.iobase + 1);

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outb(value, up->port.iobase + 1);

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break;

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break;

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case UPIO_MEM:

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case UPIO_MEM:

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writeb(value, up->port.membase + offset);

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writeb(value, up->port.membase + offset);

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break;

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break;

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default:

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default:

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outb(value, up->port.iobase + offset);

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outb(value, up->port.iobase + offset);

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}

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}

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}

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}

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/*

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/*

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* We used to support using pause I/O for certain machines. We

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* We used to support using pause I/O for certain machines. We

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* haven't supported this for a while, but just in case it's badly

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* haven't supported this for a while, but just in case it's badly

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* needed for certain old 386 machines, I've left these #define's

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* needed for certain old 386 machines, I've left these #define's

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* in....

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* in....

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*/

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*/

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#define serial_inp(up, offset) serial_in(up, offset)

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#define serial_inp(up, offset) serial_in(up, offset)

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#define serial_outp(up, offset, value) serial_out(up, offset, value)

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#define serial_outp(up, offset, value) serial_out(up, offset, value)

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/*

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/*

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* For the 16C950

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* For the 16C950

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*/

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*/

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static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)

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static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)

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{

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{

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serial_out(up, UART_SCR, offset);

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serial_out(up, UART_SCR, offset);

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serial_out(up, UART_ICR, value);

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serial_out(up, UART_ICR, value);

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}

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}

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#if 0 /* Unused currently */

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#if 0 /* Unused currently */

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static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)

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static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)

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{

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{

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unsigned int value;

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unsigned int value;

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serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);

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serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);

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serial_out(up, UART_SCR, offset);

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serial_out(up, UART_SCR, offset);

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value = serial_in(up, UART_ICR);

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value = serial_in(up, UART_ICR);

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serial_icr_write(up, UART_ACR, up->acr);

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serial_icr_write(up, UART_ACR, up->acr);

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return value;

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return value;

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}

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}

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#endif

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#endif

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#ifdef CONFIG_SERIAL_8250_RSA

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#ifdef CONFIG_SERIAL_8250_RSA

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/*

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/*

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* Attempts to turn on the RSA FIFO. Returns zero on failure.

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* Attempts to turn on the RSA FIFO. Returns zero on failure.

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* We set the port uart clock rate if we succeed.

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* We set the port uart clock rate if we succeed.

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*/

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*/

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static int __enable_rsa(struct uart_sunsu_port *up)

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static int __enable_rsa(struct uart_sunsu_port *up)

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{

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{

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unsigned char mode;

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unsigned char mode;

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int result;

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int result;

191

192

mode = serial_inp(up, UART_RSA_MSR);

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mode = serial_inp(up, UART_RSA_MSR);

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result = mode & UART_RSA_MSR_FIFO;

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result = mode & UART_RSA_MSR_FIFO;

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195

if (!result) {

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if (!result) {

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serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);

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serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);

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mode = serial_inp(up, UART_RSA_MSR);

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mode = serial_inp(up, UART_RSA_MSR);

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result = mode & UART_RSA_MSR_FIFO;

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result = mode & UART_RSA_MSR_FIFO;

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}

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}

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if (result)

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if (result)

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up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;

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up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;

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return result;

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return result;

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}

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}

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static void enable_rsa(struct uart_sunsu_port *up)

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static void enable_rsa(struct uart_sunsu_port *up)

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{

208

{

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if (up->port.type == PORT_RSA) {

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if (up->port.type == PORT_RSA) {

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if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {

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if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {

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spin_lock_irq(&up->port.lock);

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spin_lock_irq(&up->port.lock);

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__enable_rsa(up);

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__enable_rsa(up);

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spin_unlock_irq(&up->port.lock);

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spin_unlock_irq(&up->port.lock);

214

}

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}

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if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)

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if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)

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serial_outp(up, UART_RSA_FRR, 0);

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serial_outp(up, UART_RSA_FRR, 0);

217

}

217

}

218

}

218

}

219

220

/*

220

/*

221

* Attempts to turn off the RSA FIFO. Returns zero on failure.

221

* Attempts to turn off the RSA FIFO. Returns zero on failure.

222

* It is unknown why interrupts were disabled in here. However,

222

* It is unknown why interrupts were disabled in here. However,

223

* the caller is expected to preserve this behaviour by grabbing

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* the caller is expected to preserve this behaviour by grabbing

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* the spinlock before calling this function.

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* the spinlock before calling this function.

225

*/

225

*/

226

static void disable_rsa(struct uart_sunsu_port *up)

226

static void disable_rsa(struct uart_sunsu_port *up)

227

{

227

{

228

unsigned char mode;

228

unsigned char mode;

229

int result;

229

int result;

230

231

if (up->port.type == PORT_RSA &&

231

if (up->port.type == PORT_RSA &&

232

up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {

232

up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {

233

spin_lock_irq(&up->port.lock);

233

spin_lock_irq(&up->port.lock);

234

235

mode = serial_inp(up, UART_RSA_MSR);

235

mode = serial_inp(up, UART_RSA_MSR);

236

result = !(mode & UART_RSA_MSR_FIFO);

236

result = !(mode & UART_RSA_MSR_FIFO);

237

238

if (!result) {

238

if (!result) {

239

serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);

239

serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);

240

mode = serial_inp(up, UART_RSA_MSR);

240

mode = serial_inp(up, UART_RSA_MSR);

241

result = !(mode & UART_RSA_MSR_FIFO);

241

result = !(mode & UART_RSA_MSR_FIFO);

242

}

242

}

243

244

if (result)

244

if (result)

245

up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;

245

up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;

246

spin_unlock_irq(&up->port.lock);

246

spin_unlock_irq(&up->port.lock);

247

}

247

}

248

}

248

}

249

#endif /* CONFIG_SERIAL_8250_RSA */

249

#endif /* CONFIG_SERIAL_8250_RSA */

250

251

static inline void __stop_tx(struct uart_sunsu_port *p)

251

static inline void __stop_tx(struct uart_sunsu_port *p)

252

{

252

{

253

if (p->ier & UART_IER_THRI) {

253

if (p->ier & UART_IER_THRI) {

254

p->ier &= ~UART_IER_THRI;

254

p->ier &= ~UART_IER_THRI;

255

serial_out(p, UART_IER, p->ier);

255

serial_out(p, UART_IER, p->ier);

256

}

256

}

257

}

257

}

258

259

static void sunsu_stop_tx(struct uart_port *port)

259

static void sunsu_stop_tx(struct uart_port *port)

260

{

260

{

261

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

261

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

262

263

__stop_tx(up);

263

__stop_tx(up);

264

265

/*

265

/*

266

* We really want to stop the transmitter from sending.

266

* We really want to stop the transmitter from sending.

267

*/

267

*/

268

if (up->port.type == PORT_16C950) {

268

if (up->port.type == PORT_16C950) {

269

up->acr |= UART_ACR_TXDIS;

269

up->acr |= UART_ACR_TXDIS;

270

serial_icr_write(up, UART_ACR, up->acr);

270

serial_icr_write(up, UART_ACR, up->acr);

271

}

271

}

272

}

272

}

273

274

static void sunsu_start_tx(struct uart_port *port)

274

static void sunsu_start_tx(struct uart_port *port)

275

{

275

{

276

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

276

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

277

278

if (!(up->ier & UART_IER_THRI)) {

278

if (!(up->ier & UART_IER_THRI)) {

279

up->ier |= UART_IER_THRI;

279

up->ier |= UART_IER_THRI;

280

serial_out(up, UART_IER, up->ier);

280

serial_out(up, UART_IER, up->ier);

281

}

281

}

282

283

/*

283

/*

284

* Re-enable the transmitter if we disabled it.

284

* Re-enable the transmitter if we disabled it.

285

*/

285

*/

286

if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {

286

if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {

287

up->acr &= ~UART_ACR_TXDIS;

287

up->acr &= ~UART_ACR_TXDIS;

288

serial_icr_write(up, UART_ACR, up->acr);

288

serial_icr_write(up, UART_ACR, up->acr);

289

}

289

}

290

}

290

}

291

292

static void sunsu_stop_rx(struct uart_port *port)

292

static void sunsu_stop_rx(struct uart_port *port)

293

{

293

{

294

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

294

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

295

296

up->ier &= ~UART_IER_RLSI;

296

up->ier &= ~UART_IER_RLSI;

297

up->port.read_status_mask &= ~UART_LSR_DR;

297

up->port.read_status_mask &= ~UART_LSR_DR;

298

serial_out(up, UART_IER, up->ier);

298

serial_out(up, UART_IER, up->ier);

299

}

299

}

300

301

static void sunsu_enable_ms(struct uart_port *port)

301

static void sunsu_enable_ms(struct uart_port *port)

302

{

302

{

303

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

303

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

304

unsigned long flags;

304

unsigned long flags;

305

306

spin_lock_irqsave(&up->port.lock, flags);

306

spin_lock_irqsave(&up->port.lock, flags);

307

up->ier |= UART_IER_MSI;

307

up->ier |= UART_IER_MSI;

308

serial_out(up, UART_IER, up->ier);

308

serial_out(up, UART_IER, up->ier);

309

spin_unlock_irqrestore(&up->port.lock, flags);

309

spin_unlock_irqrestore(&up->port.lock, flags);

310

}

310

}

311

312

static struct tty_struct *

312

static struct tty_struct *

313

receive_chars(struct uart_sunsu_port *up, unsigned char *status)

313

receive_chars(struct uart_sunsu_port *up, unsigned char *status)

314

{

314

{

315

struct tty_struct *tty = up->port.state->port.tty;

315

struct tty_struct *tty = up->port.state->port.tty;

316

unsigned char ch, flag;

316

unsigned char ch, flag;

317

int max_count = 256;

317

int max_count = 256;

318

int saw_console_brk = 0;

318

int saw_console_brk = 0;

319

320

do {

320

do {

321

ch = serial_inp(up, UART_RX);

321

ch = serial_inp(up, UART_RX);

322

flag = TTY_NORMAL;

322

flag = TTY_NORMAL;

323

up->port.icount.rx++;

323

up->port.icount.rx++;

324

325

if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |

325

if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |

326

UART_LSR_FE | UART_LSR_OE))) {

326

UART_LSR_FE | UART_LSR_OE))) {

327

/*

327

/*

328

* For statistics only

328

* For statistics only

329

*/

329

*/

330

if (*status & UART_LSR_BI) {

330

if (*status & UART_LSR_BI) {

331

*status &= ~(UART_LSR_FE | UART_LSR_PE);

331

*status &= ~(UART_LSR_FE | UART_LSR_PE);

332

up->port.icount.brk++;

332

up->port.icount.brk++;

333

if (up->port.cons != NULL &&

333

if (up->port.cons != NULL &&

334

up->port.line == up->port.cons->index)

334

up->port.line == up->port.cons->index)

335

saw_console_brk = 1;

335

saw_console_brk = 1;

336

/*

336

/*

337

* We do the SysRQ and SAK checking

337

* We do the SysRQ and SAK checking

338

* here because otherwise the break

338

* here because otherwise the break

339

* may get masked by ignore_status_mask

339

* may get masked by ignore_status_mask

340

* or read_status_mask.

340

* or read_status_mask.

341

*/

341

*/

342

if (uart_handle_break(&up->port))

342

if (uart_handle_break(&up->port))

343

goto ignore_char;

343

goto ignore_char;

344

} else if (*status & UART_LSR_PE)

344

} else if (*status & UART_LSR_PE)

345

up->port.icount.parity++;

345

up->port.icount.parity++;

346

else if (*status & UART_LSR_FE)

346

else if (*status & UART_LSR_FE)

347

up->port.icount.frame++;

347

up->port.icount.frame++;

348

if (*status & UART_LSR_OE)

348

if (*status & UART_LSR_OE)

349

up->port.icount.overrun++;

349

up->port.icount.overrun++;

350

351

/*

351

/*

352

* Mask off conditions which should be ingored.

352

* Mask off conditions which should be ingored.

353

*/

353

*/

354

*status &= up->port.read_status_mask;

354

*status &= up->port.read_status_mask;

355

356

if (up->port.cons != NULL &&

356

if (up->port.cons != NULL &&

357

up->port.line == up->port.cons->index) {

357

up->port.line == up->port.cons->index) {

358

/* Recover the break flag from console xmit */

358

/* Recover the break flag from console xmit */

359

*status |= up->lsr_break_flag;

359

*status |= up->lsr_break_flag;

360

up->lsr_break_flag = 0;

360

up->lsr_break_flag = 0;

361

}

361

}

362

363

if (*status & UART_LSR_BI) {

363

if (*status & UART_LSR_BI) {

364

flag = TTY_BREAK;

364

flag = TTY_BREAK;

365

} else if (*status & UART_LSR_PE)

365

} else if (*status & UART_LSR_PE)

366

flag = TTY_PARITY;

366

flag = TTY_PARITY;

367

else if (*status & UART_LSR_FE)

367

else if (*status & UART_LSR_FE)

368

flag = TTY_FRAME;

368

flag = TTY_FRAME;

369

}

369

}

370

if (uart_handle_sysrq_char(&up->port, ch))

370

if (uart_handle_sysrq_char(&up->port, ch))

371

goto ignore_char;

371

goto ignore_char;

372

if ((*status & up->port.ignore_status_mask) == 0)

372

if ((*status & up->port.ignore_status_mask) == 0)

373

tty_insert_flip_char(tty, ch, flag);

373

tty_insert_flip_char(tty, ch, flag);

374

if (*status & UART_LSR_OE)

374

if (*status & UART_LSR_OE)

375

/*

375

/*

376

* Overrun is special, since it's reported

376

* Overrun is special, since it's reported

377

* immediately, and doesn't affect the current

377

* immediately, and doesn't affect the current

378

* character.

378

* character.

379

*/

379

*/

380

tty_insert_flip_char(tty, 0, TTY_OVERRUN);

380

tty_insert_flip_char(tty, 0, TTY_OVERRUN);

381

ignore_char:

381

ignore_char:

382

*status = serial_inp(up, UART_LSR);

382

*status = serial_inp(up, UART_LSR);

383

} while ((*status & UART_LSR_DR) && (max_count-- > 0));

383

} while ((*status & UART_LSR_DR) && (max_count-- > 0));

384

385

if (saw_console_brk)

385

if (saw_console_brk)

386

sun_do_break();

386

sun_do_break();

387

388

return tty;

388

return tty;

389

}

389

}

390

391

static void transmit_chars(struct uart_sunsu_port *up)

391

static void transmit_chars(struct uart_sunsu_port *up)

392

{

392

{

393

struct circ_buf *xmit = &up->port.state->xmit;

393

struct circ_buf *xmit = &up->port.state->xmit;

394

int count;

394

int count;

395

396

if (up->port.x_char) {

396

if (up->port.x_char) {

397

serial_outp(up, UART_TX, up->port.x_char);

397

serial_outp(up, UART_TX, up->port.x_char);

398

up->port.icount.tx++;

398

up->port.icount.tx++;

399

up->port.x_char = 0;

399

up->port.x_char = 0;

400

return;

400

return;

401

}

401

}

402

if (uart_tx_stopped(&up->port)) {

402

if (uart_tx_stopped(&up->port)) {

403

sunsu_stop_tx(&up->port);

403

sunsu_stop_tx(&up->port);

404

return;

404

return;

405

}

405

}

406

if (uart_circ_empty(xmit)) {

406

if (uart_circ_empty(xmit)) {

407

__stop_tx(up);

407

__stop_tx(up);

408

return;

408

return;

409

}

409

}

410

411

count = up->port.fifosize;

411

count = up->port.fifosize;

412

do {

412

do {

413

serial_out(up, UART_TX, xmit->buf[xmit->tail]);

413

serial_out(up, UART_TX, xmit->buf[xmit->tail]);

414

xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);

414

xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);

415

up->port.icount.tx++;

415

up->port.icount.tx++;

416

if (uart_circ_empty(xmit))

416

if (uart_circ_empty(xmit))

417

break;

417

break;

418

} while (--count > 0);

418

} while (--count > 0);

419

420

if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)

420

if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)

421

uart_write_wakeup(&up->port);

421

uart_write_wakeup(&up->port);

422

423

if (uart_circ_empty(xmit))

423

if (uart_circ_empty(xmit))

424

__stop_tx(up);

424

__stop_tx(up);

425

}

425

}

426

427

static void check_modem_status(struct uart_sunsu_port *up)

427

static void check_modem_status(struct uart_sunsu_port *up)

428

{

428

{

429

int status;

429

int status;

430

431

status = serial_in(up, UART_MSR);

431

status = serial_in(up, UART_MSR);

432

433

if ((status & UART_MSR_ANY_DELTA) == 0)

433

if ((status & UART_MSR_ANY_DELTA) == 0)

434

return;

434

return;

435

436

if (status & UART_MSR_TERI)

436

if (status & UART_MSR_TERI)

437

up->port.icount.rng++;

437

up->port.icount.rng++;

438

if (status & UART_MSR_DDSR)

438

if (status & UART_MSR_DDSR)

439

up->port.icount.dsr++;

439

up->port.icount.dsr++;

440

if (status & UART_MSR_DDCD)

440

if (status & UART_MSR_DDCD)

441

uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);

441

uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);

442

if (status & UART_MSR_DCTS)

442

if (status & UART_MSR_DCTS)

443

uart_handle_cts_change(&up->port, status & UART_MSR_CTS);

443

uart_handle_cts_change(&up->port, status & UART_MSR_CTS);

444

445

wake_up_interruptible(&up->port.state->port.delta_msr_wait);

445

wake_up_interruptible(&up->port.state->port.delta_msr_wait);

446

}

446

}

447

448

static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)

448

static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)

449

{

449

{

450

struct uart_sunsu_port *up = dev_id;

450

struct uart_sunsu_port *up = dev_id;

451

unsigned long flags;

451

unsigned long flags;

452

unsigned char status;

452

unsigned char status;

453

454

spin_lock_irqsave(&up->port.lock, flags);

454

spin_lock_irqsave(&up->port.lock, flags);

455

456

do {

456

do {

457

struct tty_struct *tty;

457

struct tty_struct *tty;

458

459

status = serial_inp(up, UART_LSR);

459

status = serial_inp(up, UART_LSR);

460

tty = NULL;

460

tty = NULL;

461

if (status & UART_LSR_DR)

461

if (status & UART_LSR_DR)

462

tty = receive_chars(up, &status);

462

tty = receive_chars(up, &status);

463

check_modem_status(up);

463

check_modem_status(up);

464

if (status & UART_LSR_THRE)

464

if (status & UART_LSR_THRE)

465

transmit_chars(up);

465

transmit_chars(up);

466

467

spin_unlock_irqrestore(&up->port.lock, flags);

467

spin_unlock_irqrestore(&up->port.lock, flags);

468

469

if (tty)

469

if (tty)

470

tty_flip_buffer_push(tty);

470

tty_flip_buffer_push(tty);

471

472

spin_lock_irqsave(&up->port.lock, flags);

472

spin_lock_irqsave(&up->port.lock, flags);

473

474

} while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));

474

} while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));

475

476

spin_unlock_irqrestore(&up->port.lock, flags);

476

spin_unlock_irqrestore(&up->port.lock, flags);

477

478

return IRQ_HANDLED;

478

return IRQ_HANDLED;

479

}

479

}

480

481

/* Separate interrupt handling path for keyboard/mouse ports. */

481

/* Separate interrupt handling path for keyboard/mouse ports. */

482

483

static void

483

static void

484

sunsu_change_speed(struct uart_port *port, unsigned int cflag,

484

sunsu_change_speed(struct uart_port *port, unsigned int cflag,

485

unsigned int iflag, unsigned int quot);

485

unsigned int iflag, unsigned int quot);

486

487

static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)

487

static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)

488

{

488

{

489

unsigned int cur_cflag = up->cflag;

489

unsigned int cur_cflag = up->cflag;

490

int quot, new_baud;

490

int quot, new_baud;

491

492

up->cflag &= ~CBAUD;

492

up->cflag &= ~CBAUD;

493

up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);

493

up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);

494

495

quot = up->port.uartclk / (16 * new_baud);

495

quot = up->port.uartclk / (16 * new_baud);

496

497

sunsu_change_speed(&up->port, up->cflag, 0, quot);

497

sunsu_change_speed(&up->port, up->cflag, 0, quot);

498

}

498

}

499

500

static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)

500

static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)

501

{

501

{

502

do {

502

do {

503

unsigned char ch = serial_inp(up, UART_RX);

503

unsigned char ch = serial_inp(up, UART_RX);

504

505

/* Stop-A is handled by drivers/char/keyboard.c now. */

505

/* Stop-A is handled by drivers/char/keyboard.c now. */

506

if (up->su_type == SU_PORT_KBD) {

506

if (up->su_type == SU_PORT_KBD) {

507

#ifdef CONFIG_SERIO

507

#ifdef CONFIG_SERIO

508

serio_interrupt(&up->serio, ch, 0);

508

serio_interrupt(&up->serio, ch, 0);

509

#endif

509

#endif

510

} else if (up->su_type == SU_PORT_MS) {

510

} else if (up->su_type == SU_PORT_MS) {

511

int ret = suncore_mouse_baud_detection(ch, is_break);

511

int ret = suncore_mouse_baud_detection(ch, is_break);

512

513

switch (ret) {

513

switch (ret) {

514

case 2:

514

case 2:

515

sunsu_change_mouse_baud(up);

515

sunsu_change_mouse_baud(up);

516

/* fallthru */

516

/* fallthru */

517

case 1:

517

case 1:

518

break;

518

break;

519

520

case 0:

520

case 0:

521

#ifdef CONFIG_SERIO

521

#ifdef CONFIG_SERIO

522

serio_interrupt(&up->serio, ch, 0);

522

serio_interrupt(&up->serio, ch, 0);

523

#endif

523

#endif

524

break;

524

break;

525

};

525

};

526

}

526

}

527

} while (serial_in(up, UART_LSR) & UART_LSR_DR);

527

} while (serial_in(up, UART_LSR) & UART_LSR_DR);

528

}

528

}

529

530

static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)

530

static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)

531

{

531

{

532

struct uart_sunsu_port *up = dev_id;

532

struct uart_sunsu_port *up = dev_id;

533

534

if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {

534

if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {

535

unsigned char status = serial_inp(up, UART_LSR);

535

unsigned char status = serial_inp(up, UART_LSR);

536

537

if ((status & UART_LSR_DR) || (status & UART_LSR_BI))

537

if ((status & UART_LSR_DR) || (status & UART_LSR_BI))

538

receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);

538

receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);

539

}

539

}

540

541

return IRQ_HANDLED;

541

return IRQ_HANDLED;

542

}

542

}

543

544

static unsigned int sunsu_tx_empty(struct uart_port *port)

544

static unsigned int sunsu_tx_empty(struct uart_port *port)

545

{

545

{

546

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

546

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

547

unsigned long flags;

547

unsigned long flags;

548

unsigned int ret;

548

unsigned int ret;

549

550

spin_lock_irqsave(&up->port.lock, flags);

550

spin_lock_irqsave(&up->port.lock, flags);

551

ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;

551

ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;

552

spin_unlock_irqrestore(&up->port.lock, flags);

552

spin_unlock_irqrestore(&up->port.lock, flags);

553

554

return ret;

554

return ret;

555

}

555

}

556

557

static unsigned int sunsu_get_mctrl(struct uart_port *port)

557

static unsigned int sunsu_get_mctrl(struct uart_port *port)

558

{

558

{

559

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

559

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

560

unsigned char status;

560

unsigned char status;

561

unsigned int ret;

561

unsigned int ret;

562

563

status = serial_in(up, UART_MSR);

563

status = serial_in(up, UART_MSR);

564

565

ret = 0;

565

ret = 0;

566

if (status & UART_MSR_DCD)

566

if (status & UART_MSR_DCD)

567

ret |= TIOCM_CAR;

567

ret |= TIOCM_CAR;

568

if (status & UART_MSR_RI)

568

if (status & UART_MSR_RI)

569

ret |= TIOCM_RNG;

569

ret |= TIOCM_RNG;

570

if (status & UART_MSR_DSR)

570

if (status & UART_MSR_DSR)

571

ret |= TIOCM_DSR;

571

ret |= TIOCM_DSR;

572

if (status & UART_MSR_CTS)

572

if (status & UART_MSR_CTS)

573

ret |= TIOCM_CTS;

573

ret |= TIOCM_CTS;

574

return ret;

574

return ret;

575

}

575

}

576

577

static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)

577

static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)

578

{

578

{

579

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

579

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

580

unsigned char mcr = 0;

580

unsigned char mcr = 0;

581

582

if (mctrl & TIOCM_RTS)

582

if (mctrl & TIOCM_RTS)

583

mcr |= UART_MCR_RTS;

583

mcr |= UART_MCR_RTS;

584

if (mctrl & TIOCM_DTR)

584

if (mctrl & TIOCM_DTR)

585

mcr |= UART_MCR_DTR;

585

mcr |= UART_MCR_DTR;

586

if (mctrl & TIOCM_OUT1)

586

if (mctrl & TIOCM_OUT1)

587

mcr |= UART_MCR_OUT1;

587

mcr |= UART_MCR_OUT1;

588

if (mctrl & TIOCM_OUT2)

588

if (mctrl & TIOCM_OUT2)

589

mcr |= UART_MCR_OUT2;

589

mcr |= UART_MCR_OUT2;

590

if (mctrl & TIOCM_LOOP)

590

if (mctrl & TIOCM_LOOP)

591

mcr |= UART_MCR_LOOP;

591

mcr |= UART_MCR_LOOP;

592

593

serial_out(up, UART_MCR, mcr);

593

serial_out(up, UART_MCR, mcr);

594

}

594

}

595

596

static void sunsu_break_ctl(struct uart_port *port, int break_state)

596

static void sunsu_break_ctl(struct uart_port *port, int break_state)

597

{

597

{

598

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

598

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

599

unsigned long flags;

599

unsigned long flags;

600

601

spin_lock_irqsave(&up->port.lock, flags);

601

spin_lock_irqsave(&up->port.lock, flags);

602

if (break_state == -1)

602

if (break_state == -1)

603

up->lcr |= UART_LCR_SBC;

603

up->lcr |= UART_LCR_SBC;

604

else

604

else

605

up->lcr &= ~UART_LCR_SBC;

605

up->lcr &= ~UART_LCR_SBC;

606

serial_out(up, UART_LCR, up->lcr);

606

serial_out(up, UART_LCR, up->lcr);

607

spin_unlock_irqrestore(&up->port.lock, flags);

607

spin_unlock_irqrestore(&up->port.lock, flags);

608

}

608

}

609

610

static int sunsu_startup(struct uart_port *port)

610

static int sunsu_startup(struct uart_port *port)

611

{

611

{

612

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

612

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

613

unsigned long flags;

613

unsigned long flags;

614

int retval;

614

int retval;

615

616

if (up->port.type == PORT_16C950) {

616

if (up->port.type == PORT_16C950) {

617

/* Wake up and initialize UART */

617

/* Wake up and initialize UART */

618

up->acr = 0;

618

up->acr = 0;

619

serial_outp(up, UART_LCR, 0xBF);

619

serial_outp(up, UART_LCR, 0xBF);

620

serial_outp(up, UART_EFR, UART_EFR_ECB);

620

serial_outp(up, UART_EFR, UART_EFR_ECB);

621

serial_outp(up, UART_IER, 0);

621

serial_outp(up, UART_IER, 0);

622

serial_outp(up, UART_LCR, 0);

622

serial_outp(up, UART_LCR, 0);

623

serial_icr_write(up, UART_CSR, 0); /* Reset the UART */

623

serial_icr_write(up, UART_CSR, 0); /* Reset the UART */

624

serial_outp(up, UART_LCR, 0xBF);

624

serial_outp(up, UART_LCR, 0xBF);

625

serial_outp(up, UART_EFR, UART_EFR_ECB);

625

serial_outp(up, UART_EFR, UART_EFR_ECB);

626

serial_outp(up, UART_LCR, 0);

626

serial_outp(up, UART_LCR, 0);

627

}

627

}

628

629

#ifdef CONFIG_SERIAL_8250_RSA

629

#ifdef CONFIG_SERIAL_8250_RSA

630

/*

630

/*

631

* If this is an RSA port, see if we can kick it up to the

631

* If this is an RSA port, see if we can kick it up to the

632

* higher speed clock.

632

* higher speed clock.

633

*/

633

*/

634

enable_rsa(up);

634

enable_rsa(up);

635

#endif

635

#endif

636

637

/*

637

/*

638

* Clear the FIFO buffers and disable them.

638

* Clear the FIFO buffers and disable them.

639

* (they will be reenabled in set_termios())

639

* (they will be reenabled in set_termios())

640

*/

640

*/

641

if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {

641

if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {

642

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

642

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

643

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |

643

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |

644

UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);

644

UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);

645

serial_outp(up, UART_FCR, 0);

645

serial_outp(up, UART_FCR, 0);

646

}

646

}

647

648

/*

648

/*

649

* Clear the interrupt registers.

649

* Clear the interrupt registers.

650

*/

650

*/

651

(void) serial_inp(up, UART_LSR);

651

(void) serial_inp(up, UART_LSR);

652

(void) serial_inp(up, UART_RX);

652

(void) serial_inp(up, UART_RX);

653

(void) serial_inp(up, UART_IIR);

653

(void) serial_inp(up, UART_IIR);

654

(void) serial_inp(up, UART_MSR);

654

(void) serial_inp(up, UART_MSR);

655

656

/*

656

/*

657

* At this point, there's no way the LSR could still be 0xff;

657

* At this point, there's no way the LSR could still be 0xff;

658

* if it is, then bail out, because there's likely no UART

658

* if it is, then bail out, because there's likely no UART

659

* here.

659

* here.

660

*/

660

*/

661

if (!(up->port.flags & UPF_BUGGY_UART) &&

661

if (!(up->port.flags & UPF_BUGGY_UART) &&

662

(serial_inp(up, UART_LSR) == 0xff)) {

662

(serial_inp(up, UART_LSR) == 0xff)) {

663

printk("ttyS%d: LSR safety check engaged!\n", up->port.line);

663

printk("ttyS%d: LSR safety check engaged!\n", up->port.line);

664

return -ENODEV;

664

return -ENODEV;

665

}

665

}

666

667

if (up->su_type != SU_PORT_PORT) {

667

if (up->su_type != SU_PORT_PORT) {

668

retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,

668

retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,

669

IRQF_SHARED, su_typev[up->su_type], up);

669

IRQF_SHARED, su_typev[up->su_type], up);

670

} else {

670

} else {

671

retval = request_irq(up->port.irq, sunsu_serial_interrupt,

671

retval = request_irq(up->port.irq, sunsu_serial_interrupt,

672

IRQF_SHARED, su_typev[up->su_type], up);

672

IRQF_SHARED, su_typev[up->su_type], up);

673

}

673

}

674

if (retval) {

674

if (retval) {

675

printk("su: Cannot register IRQ %d\n", up->port.irq);

675

printk("su: Cannot register IRQ %d\n", up->port.irq);

676

return retval;

676

return retval;

677

}

677

}

678

679

/*

679

/*

680

* Now, initialize the UART

680

* Now, initialize the UART

681

*/

681

*/

682

serial_outp(up, UART_LCR, UART_LCR_WLEN8);

682

serial_outp(up, UART_LCR, UART_LCR_WLEN8);

683

684

spin_lock_irqsave(&up->port.lock, flags);

684

spin_lock_irqsave(&up->port.lock, flags);

685

686

up->port.mctrl |= TIOCM_OUT2;

686

up->port.mctrl |= TIOCM_OUT2;

687

688

sunsu_set_mctrl(&up->port, up->port.mctrl);

688

sunsu_set_mctrl(&up->port, up->port.mctrl);

689

spin_unlock_irqrestore(&up->port.lock, flags);

689

spin_unlock_irqrestore(&up->port.lock, flags);

690

691

/*

691

/*

692

* Finally, enable interrupts. Note: Modem status interrupts

692

* Finally, enable interrupts. Note: Modem status interrupts

693

* are set via set_termios(), which will be occurring imminently

693

* are set via set_termios(), which will be occurring imminently

694

* anyway, so we don't enable them here.

694

* anyway, so we don't enable them here.

695

*/

695

*/

696

up->ier = UART_IER_RLSI | UART_IER_RDI;

696

up->ier = UART_IER_RLSI | UART_IER_RDI;

697

serial_outp(up, UART_IER, up->ier);

697

serial_outp(up, UART_IER, up->ier);

698

699

if (up->port.flags & UPF_FOURPORT) {

699

if (up->port.flags & UPF_FOURPORT) {

700

unsigned int icp;

700

unsigned int icp;

701

/*

701

/*

702

* Enable interrupts on the AST Fourport board

702

* Enable interrupts on the AST Fourport board

703

*/

703

*/

704

icp = (up->port.iobase & 0xfe0) | 0x01f;

704

icp = (up->port.iobase & 0xfe0) | 0x01f;

705

outb_p(0x80, icp);

705

outb_p(0x80, icp);

706

(void) inb_p(icp);

706

(void) inb_p(icp);

707

}

707

}

708

709

/*

709

/*

710

* And clear the interrupt registers again for luck.

710

* And clear the interrupt registers again for luck.

711

*/

711

*/

712

(void) serial_inp(up, UART_LSR);

712

(void) serial_inp(up, UART_LSR);

713

(void) serial_inp(up, UART_RX);

713

(void) serial_inp(up, UART_RX);

714

(void) serial_inp(up, UART_IIR);

714

(void) serial_inp(up, UART_IIR);

715

(void) serial_inp(up, UART_MSR);

715

(void) serial_inp(up, UART_MSR);

716

717

return 0;

717

return 0;

718

}

718

}

719

720

static void sunsu_shutdown(struct uart_port *port)

720

static void sunsu_shutdown(struct uart_port *port)

721

{

721

{

722

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

722

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

723

unsigned long flags;

723

unsigned long flags;

724

725

/*

725

/*

726

* Disable interrupts from this port

726

* Disable interrupts from this port

727

*/

727

*/

728

up->ier = 0;

728

up->ier = 0;

729

serial_outp(up, UART_IER, 0);

729

serial_outp(up, UART_IER, 0);

730

731

spin_lock_irqsave(&up->port.lock, flags);

731

spin_lock_irqsave(&up->port.lock, flags);

732

if (up->port.flags & UPF_FOURPORT) {

732

if (up->port.flags & UPF_FOURPORT) {

733

/* reset interrupts on the AST Fourport board */

733

/* reset interrupts on the AST Fourport board */

734

inb((up->port.iobase & 0xfe0) | 0x1f);

734

inb((up->port.iobase & 0xfe0) | 0x1f);

735

up->port.mctrl |= TIOCM_OUT1;

735

up->port.mctrl |= TIOCM_OUT1;

736

} else

736

} else

737

up->port.mctrl &= ~TIOCM_OUT2;

737

up->port.mctrl &= ~TIOCM_OUT2;

738

739

sunsu_set_mctrl(&up->port, up->port.mctrl);

739

sunsu_set_mctrl(&up->port, up->port.mctrl);

740

spin_unlock_irqrestore(&up->port.lock, flags);

740

spin_unlock_irqrestore(&up->port.lock, flags);

741

742

/*

742

/*

743

* Disable break condition and FIFOs

743

* Disable break condition and FIFOs

744

*/

744

*/

745

serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);

745

serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);

746

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |

746

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |

747

UART_FCR_CLEAR_RCVR |

747

UART_FCR_CLEAR_RCVR |

748

UART_FCR_CLEAR_XMIT);

748

UART_FCR_CLEAR_XMIT);

749

serial_outp(up, UART_FCR, 0);

749

serial_outp(up, UART_FCR, 0);

750

751

#ifdef CONFIG_SERIAL_8250_RSA

751

#ifdef CONFIG_SERIAL_8250_RSA

752

/*

752

/*

753

* Reset the RSA board back to 115kbps compat mode.

753

* Reset the RSA board back to 115kbps compat mode.

754

*/

754

*/

755

disable_rsa(up);

755

disable_rsa(up);

756

#endif

756

#endif

757

758

/*

758

/*

759

* Read data port to reset things.

759

* Read data port to reset things.

760

*/

760

*/

761

(void) serial_in(up, UART_RX);

761

(void) serial_in(up, UART_RX);

762

763

free_irq(up->port.irq, up);

763

free_irq(up->port.irq, up);

764

}

764

}

765

766

static void

766

static void

767

sunsu_change_speed(struct uart_port *port, unsigned int cflag,

767

sunsu_change_speed(struct uart_port *port, unsigned int cflag,

768

unsigned int iflag, unsigned int quot)

768

unsigned int iflag, unsigned int quot)

769

{

769

{

770

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

770

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

771

unsigned char cval, fcr = 0;

771

unsigned char cval, fcr = 0;

772

unsigned long flags;

772

unsigned long flags;

773

774

switch (cflag & CSIZE) {

774

switch (cflag & CSIZE) {

775

case CS5:

775

case CS5:

776

cval = 0x00;

776

cval = 0x00;

777

break;

777

break;

778

case CS6:

778

case CS6:

779

cval = 0x01;

779

cval = 0x01;

780

break;

780

break;

781

case CS7:

781

case CS7:

782

cval = 0x02;

782

cval = 0x02;

783

break;

783

break;

784

default:

784

default:

785

case CS8:

785

case CS8:

786

cval = 0x03;

786

cval = 0x03;

787

break;

787

break;

788

}

788

}

789

790

if (cflag & CSTOPB)

790

if (cflag & CSTOPB)

791

cval |= 0x04;

791

cval |= 0x04;

792

if (cflag & PARENB)

792

if (cflag & PARENB)

793

cval |= UART_LCR_PARITY;

793

cval |= UART_LCR_PARITY;

794

if (!(cflag & PARODD))

794

if (!(cflag & PARODD))

795

cval |= UART_LCR_EPAR;

795

cval |= UART_LCR_EPAR;

796

#ifdef CMSPAR

796

#ifdef CMSPAR

797

if (cflag & CMSPAR)

797

if (cflag & CMSPAR)

798

cval |= UART_LCR_SPAR;

798

cval |= UART_LCR_SPAR;

799

#endif

799

#endif

800

801

/*

801

/*

802

* Work around a bug in the Oxford Semiconductor 952 rev B

802

* Work around a bug in the Oxford Semiconductor 952 rev B

803

* chip which causes it to seriously miscalculate baud rates

803

* chip which causes it to seriously miscalculate baud rates

804

* when DLL is 0.

804

* when DLL is 0.

805

*/

805

*/

806

if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&

806

if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&

807

up->rev == 0x5201)

807

up->rev == 0x5201)

808

quot ++;

808

quot ++;

809

810

if (uart_config[up->port.type].flags & UART_USE_FIFO) {

810

if (uart_config[up->port.type].flags & UART_USE_FIFO) {

811

if ((up->port.uartclk / quot) < (2400 * 16))

811

if ((up->port.uartclk / quot) < (2400 * 16))

812

fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;

812

fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;

813

#ifdef CONFIG_SERIAL_8250_RSA

813

#ifdef CONFIG_SERIAL_8250_RSA

814

else if (up->port.type == PORT_RSA)

814

else if (up->port.type == PORT_RSA)

815

fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;

815

fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;

816

#endif

816

#endif

817

else

817

else

818

fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;

818

fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;

819

}

819

}

820

if (up->port.type == PORT_16750)

820

if (up->port.type == PORT_16750)

821

fcr |= UART_FCR7_64BYTE;

821

fcr |= UART_FCR7_64BYTE;

822

823

/*

823

/*

824

* Ok, we're now changing the port state. Do it with

824

* Ok, we're now changing the port state. Do it with

825

* interrupts disabled.

825

* interrupts disabled.

826

*/

826

*/

827

spin_lock_irqsave(&up->port.lock, flags);

827

spin_lock_irqsave(&up->port.lock, flags);

828

829

/*

829

/*

830

* Update the per-port timeout.

830

* Update the per-port timeout.

831

*/

831

*/

832

uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));

832

uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));

833

834

up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;

834

up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;

835

if (iflag & INPCK)

835

if (iflag & INPCK)

836

up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;

836

up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;

837

if (iflag & (BRKINT | PARMRK))

837

if (iflag & (BRKINT | PARMRK))

838

up->port.read_status_mask |= UART_LSR_BI;

838

up->port.read_status_mask |= UART_LSR_BI;

839

840

/*

840

/*

841

* Characteres to ignore

841

* Characteres to ignore

842

*/

842

*/

843

up->port.ignore_status_mask = 0;

843

up->port.ignore_status_mask = 0;

844

if (iflag & IGNPAR)

844

if (iflag & IGNPAR)

845

up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;

845

up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;

846

if (iflag & IGNBRK) {

846

if (iflag & IGNBRK) {

847

up->port.ignore_status_mask |= UART_LSR_BI;

847

up->port.ignore_status_mask |= UART_LSR_BI;

848

/*

848

/*

849

* If we're ignoring parity and break indicators,

849

* If we're ignoring parity and break indicators,

850

* ignore overruns too (for real raw support).

850

* ignore overruns too (for real raw support).

851

*/

851

*/

852

if (iflag & IGNPAR)

852

if (iflag & IGNPAR)

853

up->port.ignore_status_mask |= UART_LSR_OE;

853

up->port.ignore_status_mask |= UART_LSR_OE;

854

}

854

}

855

856

/*

856

/*

857

* ignore all characters if CREAD is not set

857

* ignore all characters if CREAD is not set

858

*/

858

*/

859

if ((cflag & CREAD) == 0)

859

if ((cflag & CREAD) == 0)

860

up->port.ignore_status_mask |= UART_LSR_DR;

860

up->port.ignore_status_mask |= UART_LSR_DR;

861

862

/*

862

/*

863

* CTS flow control flag and modem status interrupts

863

* CTS flow control flag and modem status interrupts

864

*/

864

*/

865

up->ier &= ~UART_IER_MSI;

865

up->ier &= ~UART_IER_MSI;

866

if (UART_ENABLE_MS(&up->port, cflag))

866

if (UART_ENABLE_MS(&up->port, cflag))

867

up->ier |= UART_IER_MSI;

867

up->ier |= UART_IER_MSI;

868

869

serial_out(up, UART_IER, up->ier);

869

serial_out(up, UART_IER, up->ier);

870

871

if (uart_config[up->port.type].flags & UART_STARTECH) {

871

if (uart_config[up->port.type].flags & UART_STARTECH) {

872

serial_outp(up, UART_LCR, 0xBF);

872

serial_outp(up, UART_LCR, 0xBF);

873

serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);

873

serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);

874

}

874

}

875

serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */

875

serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */

876

serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */

876

serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */

877

serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */

877

serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */

878

if (up->port.type == PORT_16750)

878

if (up->port.type == PORT_16750)

879

serial_outp(up, UART_FCR, fcr); /* set fcr */

879

serial_outp(up, UART_FCR, fcr); /* set fcr */

880

serial_outp(up, UART_LCR, cval); /* reset DLAB */

880

serial_outp(up, UART_LCR, cval); /* reset DLAB */

881

up->lcr = cval; /* Save LCR */

881

up->lcr = cval; /* Save LCR */

882

if (up->port.type != PORT_16750) {

882

if (up->port.type != PORT_16750) {

883

if (fcr & UART_FCR_ENABLE_FIFO) {

883

if (fcr & UART_FCR_ENABLE_FIFO) {

884

/* emulated UARTs (Lucent Venus 167x) need two steps */

884

/* emulated UARTs (Lucent Venus 167x) need two steps */

885

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

885

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

886

}

886

}

887

serial_outp(up, UART_FCR, fcr); /* set fcr */

887

serial_outp(up, UART_FCR, fcr); /* set fcr */

888

}

888

}

889

890

up->cflag = cflag;

890

up->cflag = cflag;

891

892

spin_unlock_irqrestore(&up->port.lock, flags);

892

spin_unlock_irqrestore(&up->port.lock, flags);

893

}

893

}

894

895

static void

895

static void

896

sunsu_set_termios(struct uart_port *port, struct ktermios *termios,

896

sunsu_set_termios(struct uart_port *port, struct ktermios *termios,

897

struct ktermios *old)

897

struct ktermios *old)

898

{

898

{

899

unsigned int baud, quot;

899

unsigned int baud, quot;

900

901

/*

901

/*

902

* Ask the core to calculate the divisor for us.

902

* Ask the core to calculate the divisor for us.

903

*/

903

*/

904

baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);

904

baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);

905

quot = uart_get_divisor(port, baud);

905

quot = uart_get_divisor(port, baud);

906

907

sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);

907

sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);

908

}

908

}

909

910

static void sunsu_release_port(struct uart_port *port)

910

static void sunsu_release_port(struct uart_port *port)

911

{

911

{

912

}

912

}

913

914

static int sunsu_request_port(struct uart_port *port)

914

static int sunsu_request_port(struct uart_port *port)

915

{

915

{

916

return 0;

916

return 0;

917

}

917

}

918

919

static void sunsu_config_port(struct uart_port *port, int flags)

919

static void sunsu_config_port(struct uart_port *port, int flags)

920

{

920

{

921

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

921

struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;

922

923

if (flags & UART_CONFIG_TYPE) {

923

if (flags & UART_CONFIG_TYPE) {

924

/*

924

/*

925

* We are supposed to call autoconfig here, but this requires

925

* We are supposed to call autoconfig here, but this requires

926

* splitting all the OBP probing crap from the UART probing.

926

* splitting all the OBP probing crap from the UART probing.

927

* We'll do it when we kill sunsu.c altogether.

927

* We'll do it when we kill sunsu.c altogether.

928

*/

928

*/

929

port->type = up->type_probed; /* XXX */

929

port->type = up->type_probed; /* XXX */

930

}

930

}

931

}

931

}

932

933

static int

933

static int

934

sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)

934

sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)

935

{

935

{

936

return -EINVAL;

936

return -EINVAL;

937

}

937

}

938

939

static const char *

939

static const char *

940

sunsu_type(struct uart_port *port)

940

sunsu_type(struct uart_port *port)

941

{

941

{

942

int type = port->type;

942

int type = port->type;

943

944

if (type >= ARRAY_SIZE(uart_config))

944

if (type >= ARRAY_SIZE(uart_config))

945

type = 0;

945

type = 0;

946

return uart_config[type].name;

946

return uart_config[type].name;

947

}

947

}

948

949

static struct uart_ops sunsu_pops = {

949

static struct uart_ops sunsu_pops = {

950

.tx_empty = sunsu_tx_empty,

950

.tx_empty = sunsu_tx_empty,

951

.set_mctrl = sunsu_set_mctrl,

951

.set_mctrl = sunsu_set_mctrl,

952

.get_mctrl = sunsu_get_mctrl,

952

.get_mctrl = sunsu_get_mctrl,

953

.stop_tx = sunsu_stop_tx,

953

.stop_tx = sunsu_stop_tx,

954

.start_tx = sunsu_start_tx,

954

.start_tx = sunsu_start_tx,

955

.stop_rx = sunsu_stop_rx,

955

.stop_rx = sunsu_stop_rx,

956

.enable_ms = sunsu_enable_ms,

956

.enable_ms = sunsu_enable_ms,

957

.break_ctl = sunsu_break_ctl,

957

.break_ctl = sunsu_break_ctl,

958

.startup = sunsu_startup,

958

.startup = sunsu_startup,

959

.shutdown = sunsu_shutdown,

959

.shutdown = sunsu_shutdown,

960

.set_termios = sunsu_set_termios,

960

.set_termios = sunsu_set_termios,

961

.type = sunsu_type,

961

.type = sunsu_type,

962

.release_port = sunsu_release_port,

962

.release_port = sunsu_release_port,

963

.request_port = sunsu_request_port,

963

.request_port = sunsu_request_port,

964

.config_port = sunsu_config_port,

964

.config_port = sunsu_config_port,

965

.verify_port = sunsu_verify_port,

965

.verify_port = sunsu_verify_port,

966

};

966

};

967

968

#define UART_NR 4

968

#define UART_NR 4

969

970

static struct uart_sunsu_port sunsu_ports[UART_NR];

970

static struct uart_sunsu_port sunsu_ports[UART_NR];

971

972

#ifdef CONFIG_SERIO

972

#ifdef CONFIG_SERIO

973

974

static DEFINE_SPINLOCK(sunsu_serio_lock);

974

static DEFINE_SPINLOCK(sunsu_serio_lock);

975

976

static int sunsu_serio_write(struct serio *serio, unsigned char ch)

976

static int sunsu_serio_write(struct serio *serio, unsigned char ch)

977

{

977

{

978

struct uart_sunsu_port *up = serio->port_data;

978

struct uart_sunsu_port *up = serio->port_data;

979

unsigned long flags;

979

unsigned long flags;

980

int lsr;

980

int lsr;

981

982

spin_lock_irqsave(&sunsu_serio_lock, flags);

982

spin_lock_irqsave(&sunsu_serio_lock, flags);

983

984

do {

984

do {

985

lsr = serial_in(up, UART_LSR);

985

lsr = serial_in(up, UART_LSR);

986

} while (!(lsr & UART_LSR_THRE));

986

} while (!(lsr & UART_LSR_THRE));

987

988

/* Send the character out. */

988

/* Send the character out. */

989

serial_out(up, UART_TX, ch);

989

serial_out(up, UART_TX, ch);

990

991

spin_unlock_irqrestore(&sunsu_serio_lock, flags);

991

spin_unlock_irqrestore(&sunsu_serio_lock, flags);

992

993

return 0;

993

return 0;

994

}

994

}

995

996

static int sunsu_serio_open(struct serio *serio)

996

static int sunsu_serio_open(struct serio *serio)

997

{

997

{

998

struct uart_sunsu_port *up = serio->port_data;

998

struct uart_sunsu_port *up = serio->port_data;

999

unsigned long flags;

999

unsigned long flags;

1000

int ret;

1000

int ret;

1001

1002

spin_lock_irqsave(&sunsu_serio_lock, flags);

1002

spin_lock_irqsave(&sunsu_serio_lock, flags);

1003

if (!up->serio_open) {

1003

if (!up->serio_open) {

1004

up->serio_open = 1;

1004

up->serio_open = 1;

1005

ret = 0;

1005

ret = 0;

1006

} else

1006

} else

1007

ret = -EBUSY;

1007

ret = -EBUSY;

1008

spin_unlock_irqrestore(&sunsu_serio_lock, flags);

1008

spin_unlock_irqrestore(&sunsu_serio_lock, flags);

1009

1010

return ret;

1010

return ret;

1011

}

1011

}

1012

1013

static void sunsu_serio_close(struct serio *serio)

1013

static void sunsu_serio_close(struct serio *serio)

1014

{

1014

{

1015

struct uart_sunsu_port *up = serio->port_data;

1015

struct uart_sunsu_port *up = serio->port_data;

1016

unsigned long flags;

1016

unsigned long flags;

1017

1018

spin_lock_irqsave(&sunsu_serio_lock, flags);

1018

spin_lock_irqsave(&sunsu_serio_lock, flags);

1019

up->serio_open = 0;

1019

up->serio_open = 0;

1020

spin_unlock_irqrestore(&sunsu_serio_lock, flags);

1020

spin_unlock_irqrestore(&sunsu_serio_lock, flags);

1021

}

1021

}

1022

1023

#endif /* CONFIG_SERIO */

1023

#endif /* CONFIG_SERIO */

1024

1025

static void sunsu_autoconfig(struct uart_sunsu_port *up)

1025

static void sunsu_autoconfig(struct uart_sunsu_port *up)

1026

{

1026

{

1027

unsigned char status1, status2, scratch, scratch2, scratch3;

1027

unsigned char status1, status2, scratch, scratch2, scratch3;

1028

unsigned char save_lcr, save_mcr;

1028

unsigned char save_lcr, save_mcr;

1029

unsigned long flags;

1029

unsigned long flags;

1030

1031

if (up->su_type == SU_PORT_NONE)

1031

if (up->su_type == SU_PORT_NONE)

1032

return;

1032

return;

1033

1034

up->type_probed = PORT_UNKNOWN;

1034

up->type_probed = PORT_UNKNOWN;

1035

up->port.iotype = UPIO_MEM;

1035

up->port.iotype = UPIO_MEM;

1036

1037

spin_lock_irqsave(&up->port.lock, flags);

1037

spin_lock_irqsave(&up->port.lock, flags);

1038

1039

if (!(up->port.flags & UPF_BUGGY_UART)) {

1039

if (!(up->port.flags & UPF_BUGGY_UART)) {

1040

/*

1040

/*

1041

* Do a simple existence test first; if we fail this, there's

1041

* Do a simple existence test first; if we fail this, there's

1042

* no point trying anything else.

1042

* no point trying anything else.

1043

*

1043

*

1044

* 0x80 is used as a nonsense port to prevent against false

1044

* 0x80 is used as a nonsense port to prevent against false

1045

* positives due to ISA bus float. The assumption is that

1045

* positives due to ISA bus float. The assumption is that

1046

* 0x80 is a non-existent port; which should be safe since

1046

* 0x80 is a non-existent port; which should be safe since

1047

* include/asm/io.h also makes this assumption.

1047

* include/asm/io.h also makes this assumption.

1048

*/

1048

*/

1049

scratch = serial_inp(up, UART_IER);

1049

scratch = serial_inp(up, UART_IER);

1050

serial_outp(up, UART_IER, 0);

1050

serial_outp(up, UART_IER, 0);

1051

#ifdef __i386__

1051

#ifdef __i386__

1052

outb(0xff, 0x080);

1052

outb(0xff, 0x080);

1053

#endif

1053

#endif

1054

scratch2 = serial_inp(up, UART_IER);

1054

scratch2 = serial_inp(up, UART_IER);

1055

serial_outp(up, UART_IER, 0x0f);

1055

serial_outp(up, UART_IER, 0x0f);

1056

#ifdef __i386__

1056

#ifdef __i386__

1057

outb(0, 0x080);

1057

outb(0, 0x080);

1058

#endif

1058

#endif

1059

scratch3 = serial_inp(up, UART_IER);

1059

scratch3 = serial_inp(up, UART_IER);

1060

serial_outp(up, UART_IER, scratch);

1060

serial_outp(up, UART_IER, scratch);

1061

if (scratch2 != 0 || scratch3 != 0x0F)

1061

if (scratch2 != 0 || scratch3 != 0x0F)

1062

goto out; /* We failed; there's nothing here */

1062

goto out; /* We failed; there's nothing here */

1063

}

1063

}

1064

1065

save_mcr = serial_in(up, UART_MCR);

1065

save_mcr = serial_in(up, UART_MCR);

1066

save_lcr = serial_in(up, UART_LCR);

1066

save_lcr = serial_in(up, UART_LCR);

1067

1068

/*

1068

/*

1069

* Check to see if a UART is really there. Certain broken

1069

* Check to see if a UART is really there. Certain broken

1070

* internal modems based on the Rockwell chipset fail this

1070

* internal modems based on the Rockwell chipset fail this

1071

* test, because they apparently don't implement the loopback

1071

* test, because they apparently don't implement the loopback

1072

* test mode. So this test is skipped on the COM 1 through

1072

* test mode. So this test is skipped on the COM 1 through

1073

* COM 4 ports. This *should* be safe, since no board

1073

* COM 4 ports. This *should* be safe, since no board

1074

* manufacturer would be stupid enough to design a board

1074

* manufacturer would be stupid enough to design a board

1075

* that conflicts with COM 1-4 --- we hope!

1075

* that conflicts with COM 1-4 --- we hope!

1076

*/

1076

*/

1077

if (!(up->port.flags & UPF_SKIP_TEST)) {

1077

if (!(up->port.flags & UPF_SKIP_TEST)) {

1078

serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);

1078

serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);

1079

status1 = serial_inp(up, UART_MSR) & 0xF0;

1079

status1 = serial_inp(up, UART_MSR) & 0xF0;

1080

serial_outp(up, UART_MCR, save_mcr);

1080

serial_outp(up, UART_MCR, save_mcr);

1081

if (status1 != 0x90)

1081

if (status1 != 0x90)

1082

goto out; /* We failed loopback test */

1082

goto out; /* We failed loopback test */

1083

}

1083

}

1084

serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */

1084

serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */

1085

serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */

1085

serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */

1086

serial_outp(up, UART_LCR, 0);

1086

serial_outp(up, UART_LCR, 0);

1087

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1087

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1088

scratch = serial_in(up, UART_IIR) >> 6;

1088

scratch = serial_in(up, UART_IIR) >> 6;

1089

switch (scratch) {

1089

switch (scratch) {

1090

case 0:

1090

case 0:

1091

up->port.type = PORT_16450;

1091

up->port.type = PORT_16450;

1092

break;

1092

break;

1093

case 1:

1093

case 1:

1094

up->port.type = PORT_UNKNOWN;

1094

up->port.type = PORT_UNKNOWN;

1095

break;

1095

break;

1096

case 2:

1096

case 2:

1097

up->port.type = PORT_16550;

1097

up->port.type = PORT_16550;

1098

break;

1098

break;

1099

case 3:

1099

case 3:

1100

up->port.type = PORT_16550A;

1100

up->port.type = PORT_16550A;

1101

break;

1101

break;

1102

}

1102

}

1103

if (up->port.type == PORT_16550A) {

1103

if (up->port.type == PORT_16550A) {

1104

/* Check for Startech UART's */

1104

/* Check for Startech UART's */

1105

serial_outp(up, UART_LCR, UART_LCR_DLAB);

1105

serial_outp(up, UART_LCR, UART_LCR_DLAB);

1106

if (serial_in(up, UART_EFR) == 0) {

1106

if (serial_in(up, UART_EFR) == 0) {

1107

up->port.type = PORT_16650;

1107

up->port.type = PORT_16650;

1108

} else {

1108

} else {

1109

serial_outp(up, UART_LCR, 0xBF);

1109

serial_outp(up, UART_LCR, 0xBF);

1110

if (serial_in(up, UART_EFR) == 0)

1110

if (serial_in(up, UART_EFR) == 0)

1111

up->port.type = PORT_16650V2;

1111

up->port.type = PORT_16650V2;

1112

}

1112

}

1113

}

1113

}

1114

if (up->port.type == PORT_16550A) {

1114

if (up->port.type == PORT_16550A) {

1115

/* Check for TI 16750 */

1115

/* Check for TI 16750 */

1116

serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);

1116

serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);

1117

serial_outp(up, UART_FCR,

1117

serial_outp(up, UART_FCR,

1118

UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1118

UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1119

scratch = serial_in(up, UART_IIR) >> 5;

1119

scratch = serial_in(up, UART_IIR) >> 5;

1120

if (scratch == 7) {

1120

if (scratch == 7) {

1121

/*

1121

/*

1122

* If this is a 16750, and not a cheap UART

1122

* If this is a 16750, and not a cheap UART

1123

* clone, then it should only go into 64 byte

1123

* clone, then it should only go into 64 byte

1124

* mode if the UART_FCR7_64BYTE bit was set

1124

* mode if the UART_FCR7_64BYTE bit was set

1125

* while UART_LCR_DLAB was latched.

1125

* while UART_LCR_DLAB was latched.

1126

*/

1126

*/

1127

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1127

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1128

serial_outp(up, UART_LCR, 0);

1128

serial_outp(up, UART_LCR, 0);

1129

serial_outp(up, UART_FCR,

1129

serial_outp(up, UART_FCR,

1130

UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1130

UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1131

scratch = serial_in(up, UART_IIR) >> 5;

1131

scratch = serial_in(up, UART_IIR) >> 5;

1132

if (scratch == 6)

1132

if (scratch == 6)

1133

up->port.type = PORT_16750;

1133

up->port.type = PORT_16750;

1134

}

1134

}

1135

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1135

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1136

}

1136

}

1137

serial_outp(up, UART_LCR, save_lcr);

1137

serial_outp(up, UART_LCR, save_lcr);

1138

if (up->port.type == PORT_16450) {

1138

if (up->port.type == PORT_16450) {

1139

scratch = serial_in(up, UART_SCR);

1139

scratch = serial_in(up, UART_SCR);

1140

serial_outp(up, UART_SCR, 0xa5);

1140

serial_outp(up, UART_SCR, 0xa5);

1141

status1 = serial_in(up, UART_SCR);

1141

status1 = serial_in(up, UART_SCR);

1142

serial_outp(up, UART_SCR, 0x5a);

1142

serial_outp(up, UART_SCR, 0x5a);

1143

status2 = serial_in(up, UART_SCR);

1143

status2 = serial_in(up, UART_SCR);

1144

serial_outp(up, UART_SCR, scratch);

1144

serial_outp(up, UART_SCR, scratch);

1145

1146

if ((status1 != 0xa5) || (status2 != 0x5a))

1146

if ((status1 != 0xa5) || (status2 != 0x5a))

1147

up->port.type = PORT_8250;

1147

up->port.type = PORT_8250;

1148

}

1148

}

1149

1150

up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;

1150

up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;

1151

1152

if (up->port.type == PORT_UNKNOWN)

1152

if (up->port.type == PORT_UNKNOWN)

1153

goto out;

1153

goto out;

1154

up->type_probed = up->port.type; /* XXX */

1154

up->type_probed = up->port.type; /* XXX */

1155

1156

/*

1156

/*

1157

* Reset the UART.

1157

* Reset the UART.

1158

*/

1158

*/

1159

#ifdef CONFIG_SERIAL_8250_RSA

1159

#ifdef CONFIG_SERIAL_8250_RSA

1160

if (up->port.type == PORT_RSA)

1160

if (up->port.type == PORT_RSA)

1161

serial_outp(up, UART_RSA_FRR, 0);

1161

serial_outp(up, UART_RSA_FRR, 0);

1162

#endif

1162

#endif

1163

serial_outp(up, UART_MCR, save_mcr);

1163

serial_outp(up, UART_MCR, save_mcr);

1164

serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |

1164

serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |

1165

UART_FCR_CLEAR_RCVR |

1165

UART_FCR_CLEAR_RCVR |

1166

UART_FCR_CLEAR_XMIT));

1166

UART_FCR_CLEAR_XMIT));

1167

serial_outp(up, UART_FCR, 0);

1167

serial_outp(up, UART_FCR, 0);

1168

(void)serial_in(up, UART_RX);

1168

(void)serial_in(up, UART_RX);

1169

serial_outp(up, UART_IER, 0);

1169

serial_outp(up, UART_IER, 0);

1170

1171

out:

1171

out:

1172

spin_unlock_irqrestore(&up->port.lock, flags);

1172

spin_unlock_irqrestore(&up->port.lock, flags);

1173

}

1173

}

1174

1175

static struct uart_driver sunsu_reg = {

1175

static struct uart_driver sunsu_reg = {

1176

.owner = THIS_MODULE,

1176

.owner = THIS_MODULE,

1177

.driver_name = "sunsu",

1177

.driver_name = "sunsu",

1178

.dev_name = "ttyS",

1178

.dev_name = "ttyS",

1179

.major = TTY_MAJOR,

1179

.major = TTY_MAJOR,

1180

};

1180

};

1181

1182

static int __devinit sunsu_kbd_ms_init(struct uart_sunsu_port *up)

1182

static int __devinit sunsu_kbd_ms_init(struct uart_sunsu_port *up)

1183

{

1183

{

1184

int quot, baud;

1184

int quot, baud;

1185

#ifdef CONFIG_SERIO

1185

#ifdef CONFIG_SERIO

1186

struct serio *serio;

1186

struct serio *serio;

1187

#endif

1187

#endif

1188

1189

if (up->su_type == SU_PORT_KBD) {

1189

if (up->su_type == SU_PORT_KBD) {

1190

up->cflag = B1200 | CS8 | CLOCAL | CREAD;

1190

up->cflag = B1200 | CS8 | CLOCAL | CREAD;

1191

baud = 1200;

1191

baud = 1200;

1192

} else {

1192

} else {

1193

up->cflag = B4800 | CS8 | CLOCAL | CREAD;

1193

up->cflag = B4800 | CS8 | CLOCAL | CREAD;

1194

baud = 4800;

1194

baud = 4800;

1195

}

1195

}

1196

quot = up->port.uartclk / (16 * baud);

1196

quot = up->port.uartclk / (16 * baud);

1197

1198

sunsu_autoconfig(up);

1198

sunsu_autoconfig(up);

1199

if (up->port.type == PORT_UNKNOWN)

1199

if (up->port.type == PORT_UNKNOWN)

1200

return -ENODEV;

1200

return -ENODEV;

1201

1202

printk("%s: %s port at %llx, irq %u\n",

1202

printk("%s: %s port at %llx, irq %u\n",

1203

to_of_device(up->port.dev)->dev.of_node->full_name,

1203

to_of_device(up->port.dev)->dev.of_node->full_name,

1204

(up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",

1204

(up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",

1205

(unsigned long long) up->port.mapbase,

1205

(unsigned long long) up->port.mapbase,

1206

up->port.irq);

1206

up->port.irq);

1207

1208

#ifdef CONFIG_SERIO

1208

#ifdef CONFIG_SERIO

1209

serio = &up->serio;

1209

serio = &up->serio;

1210

serio->port_data = up;

1210

serio->port_data = up;

1211

1212

serio->id.type = SERIO_RS232;

1212

serio->id.type = SERIO_RS232;

1213

if (up->su_type == SU_PORT_KBD) {

1213

if (up->su_type == SU_PORT_KBD) {

1214

serio->id.proto = SERIO_SUNKBD;

1214

serio->id.proto = SERIO_SUNKBD;

1215

strlcpy(serio->name, "sukbd", sizeof(serio->name));

1215

strlcpy(serio->name, "sukbd", sizeof(serio->name));

1216

} else {

1216

} else {

1217

serio->id.proto = SERIO_SUN;

1217

serio->id.proto = SERIO_SUN;

1218

serio->id.extra = 1;

1218

serio->id.extra = 1;

1219

strlcpy(serio->name, "sums", sizeof(serio->name));

1219

strlcpy(serio->name, "sums", sizeof(serio->name));

1220

}

1220

}

1221

strlcpy(serio->phys,

1221

strlcpy(serio->phys,

1222

(!(up->port.line & 1) ? "su/serio0" : "su/serio1"),

1222

(!(up->port.line & 1) ? "su/serio0" : "su/serio1"),

1223

sizeof(serio->phys));

1223

sizeof(serio->phys));

1224

1225

serio->write = sunsu_serio_write;

1225

serio->write = sunsu_serio_write;

1226

serio->open = sunsu_serio_open;

1226

serio->open = sunsu_serio_open;

1227

serio->close = sunsu_serio_close;

1227

serio->close = sunsu_serio_close;

1228

serio->dev.parent = up->port.dev;

1228

serio->dev.parent = up->port.dev;

1229

1230

serio_register_port(serio);

1230

serio_register_port(serio);

1231

#endif

1231

#endif

1232

1233

sunsu_change_speed(&up->port, up->cflag, 0, quot);

1233

sunsu_change_speed(&up->port, up->cflag, 0, quot);

1234

1235

sunsu_startup(&up->port);

1235

sunsu_startup(&up->port);

1236

return 0;

1236

return 0;

1237

}

1237

}

1238

1239

/*

1239

/*

1240

* ------------------------------------------------------------

1240

* ------------------------------------------------------------

1241

* Serial console driver

1241

* Serial console driver

1242

* ------------------------------------------------------------

1242

* ------------------------------------------------------------

1243

*/

1243

*/

1244

1245

#ifdef CONFIG_SERIAL_SUNSU_CONSOLE

1245

#ifdef CONFIG_SERIAL_SUNSU_CONSOLE

1246

1247

#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)

1247

#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)

1248

1249

/*

1249

/*

1250

* Wait for transmitter & holding register to empty

1250

* Wait for transmitter & holding register to empty

1251

*/

1251

*/

1252

static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)

1252

static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)

1253

{

1253

{

1254

unsigned int status, tmout = 10000;

1254

unsigned int status, tmout = 10000;

1255

1256

/* Wait up to 10ms for the character(s) to be sent. */

1256

/* Wait up to 10ms for the character(s) to be sent. */

1257

do {

1257

do {

1258

status = serial_in(up, UART_LSR);

1258

status = serial_in(up, UART_LSR);

1259

1260

if (status & UART_LSR_BI)

1260

if (status & UART_LSR_BI)

1261

up->lsr_break_flag = UART_LSR_BI;

1261

up->lsr_break_flag = UART_LSR_BI;

1262

1263

if (--tmout == 0)

1263

if (--tmout == 0)

1264

break;

1264

break;

1265

udelay(1);

1265

udelay(1);

1266

} while ((status & BOTH_EMPTY) != BOTH_EMPTY);

1266

} while ((status & BOTH_EMPTY) != BOTH_EMPTY);

1267

1268

/* Wait up to 1s for flow control if necessary */

1268

/* Wait up to 1s for flow control if necessary */

1269

if (up->port.flags & UPF_CONS_FLOW) {

1269

if (up->port.flags & UPF_CONS_FLOW) {

1270

tmout = 1000000;

1270

tmout = 1000000;

1271

while (--tmout &&

1271

while (--tmout &&

1272

((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))

1272

((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))

1273

udelay(1);

1273

udelay(1);

1274

}

1274

}

1275

}

1275

}

1276

1277

static void sunsu_console_putchar(struct uart_port *port, int ch)

1277

static void sunsu_console_putchar(struct uart_port *port, int ch)

1278

{

1278

{

1279

struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;

1279

struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;

1280

1281

wait_for_xmitr(up);

1281

wait_for_xmitr(up);

1282

serial_out(up, UART_TX, ch);

1282

serial_out(up, UART_TX, ch);

1283

}

1283

}

1284

1285

/*

1285

/*

1286

* Print a string to the serial port trying not to disturb

1286

* Print a string to the serial port trying not to disturb

1287

* any possible real use of the port...

1287

* any possible real use of the port...

1288

*/

1288

*/

1289

static void sunsu_console_write(struct console *co, const char *s,

1289

static void sunsu_console_write(struct console *co, const char *s,

1290

unsigned int count)

1290

unsigned int count)

1291

{

1291

{

1292

struct uart_sunsu_port *up = &sunsu_ports[co->index];

1292

struct uart_sunsu_port *up = &sunsu_ports[co->index];

1293

unsigned long flags;

1293

unsigned long flags;

1294

unsigned int ier;

1294

unsigned int ier;

1295

int locked = 1;

1295

int locked = 1;

1296

1297

local_irq_save(flags);

1297

local_irq_save(flags);

1298

if (up->port.sysrq) {

1298

if (up->port.sysrq) {

1299

locked = 0;

1299

locked = 0;

1300

} else if (oops_in_progress) {

1300

} else if (oops_in_progress) {

1301

locked = spin_trylock(&up->port.lock);

1301

locked = spin_trylock(&up->port.lock);

1302

} else

1302

} else

1303

spin_lock(&up->port.lock);

1303

spin_lock(&up->port.lock);

1304

1305

/*

1305

/*

1306

* First save the UER then disable the interrupts

1306

* First save the UER then disable the interrupts

1307

*/

1307

*/

1308

ier = serial_in(up, UART_IER);

1308

ier = serial_in(up, UART_IER);

1309

serial_out(up, UART_IER, 0);

1309

serial_out(up, UART_IER, 0);

1310

1311

uart_console_write(&up->port, s, count, sunsu_console_putchar);

1311

uart_console_write(&up->port, s, count, sunsu_console_putchar);

1312

1313

/*

1313

/*

1314

* Finally, wait for transmitter to become empty

1314

* Finally, wait for transmitter to become empty

1315

* and restore the IER

1315

* and restore the IER

1316

*/

1316

*/

1317

wait_for_xmitr(up);

1317

wait_for_xmitr(up);

1318

serial_out(up, UART_IER, ier);

1318

serial_out(up, UART_IER, ier);

1319

1320

if (locked)

1320

if (locked)

1321

spin_unlock(&up->port.lock);

1321

spin_unlock(&up->port.lock);

1322

local_irq_restore(flags);

1322

local_irq_restore(flags);

1323

}

1323

}

1324

1325

/*

1325

/*

1326

* Setup initial baud/bits/parity. We do two things here:

1326

* Setup initial baud/bits/parity. We do two things here:

1327

* - construct a cflag setting for the first su_open()

1327

* - construct a cflag setting for the first su_open()

1328

* - initialize the serial port

1328

* - initialize the serial port

1329

* Return non-zero if we didn't find a serial port.

1329

* Return non-zero if we didn't find a serial port.

1330

*/

1330

*/

1331

static int __init sunsu_console_setup(struct console *co, char *options)

1331

static int __init sunsu_console_setup(struct console *co, char *options)

1332

{

1332

{

1333

static struct ktermios dummy;

1333

static struct ktermios dummy;

1334

struct ktermios termios;

1334

struct ktermios termios;

1335

struct uart_port *port;

1335

struct uart_port *port;

1336

1337

printk("Console: ttyS%d (SU)\n",

1337

printk("Console: ttyS%d (SU)\n",

1338

(sunsu_reg.minor - 64) + co->index);

1338

(sunsu_reg.minor - 64) + co->index);

1339

1340

/*

1340

/*

1341

* Check whether an invalid uart number has been specified, and

1341

* Check whether an invalid uart number has been specified, and

1342

* if so, search for the first available port that does have

1342

* if so, search for the first available port that does have

1343

* console support.

1343

* console support.

1344

*/

1344

*/

1345

if (co->index >= UART_NR)

1345

if (co->index >= UART_NR)

1346

co->index = 0;

1346

co->index = 0;

1347

port = &sunsu_ports[co->index].port;

1347

port = &sunsu_ports[co->index].port;

1348

1349

/*

1349

/*

1350

* Temporary fix.

1350

* Temporary fix.

1351

*/

1351

*/

1352

spin_lock_init(&port->lock);

1352

spin_lock_init(&port->lock);

1353

1354

/* Get firmware console settings. */

1354

/* Get firmware console settings. */

1355

sunserial_console_termios(co, to_of_device(port->dev)->dev.of_node);

1355

sunserial_console_termios(co, to_of_device(port->dev)->dev.of_node);

1356

1357

memset(&termios, 0, sizeof(struct ktermios));

1357

memset(&termios, 0, sizeof(struct ktermios));

1358

termios.c_cflag = co->cflag;

1358

termios.c_cflag = co->cflag;

1359

port->mctrl |= TIOCM_DTR;

1359

port->mctrl |= TIOCM_DTR;

1360

port->ops->set_termios(port, &termios, &dummy);

1360

port->ops->set_termios(port, &termios, &dummy);

1361

1362

return 0;

1362

return 0;

1363

}

1363

}

1364

1365

static struct console sunsu_console = {

1365

static struct console sunsu_console = {

1366

.name = "ttyS",

1366

.name = "ttyS",

1367

.write = sunsu_console_write,

1367

.write = sunsu_console_write,

1368

.device = uart_console_device,

1368

.device = uart_console_device,

1369

.setup = sunsu_console_setup,

1369

.setup = sunsu_console_setup,

1370

.flags = CON_PRINTBUFFER,

1370

.flags = CON_PRINTBUFFER,

1371

.index = -1,

1371

.index = -1,

1372

.data = &sunsu_reg,

1372

.data = &sunsu_reg,

1373

};

1373

};

1374

1375

/*

1375

/*

1376

* Register console.

1376

* Register console.

1377

*/

1377

*/

1378

1379

static inline struct console *SUNSU_CONSOLE(void)

1379

static inline struct console *SUNSU_CONSOLE(void)

1380

{

1380

{

1381

return &sunsu_console;

1381

return &sunsu_console;

1382

}

1382

}

1383

#else

1383

#else

1384

#define SUNSU_CONSOLE() (NULL)

1384

#define SUNSU_CONSOLE() (NULL)

1385

#define sunsu_serial_console_init() do { } while (0)

1385

#define sunsu_serial_console_init() do { } while (0)

1386

#endif

1386

#endif

1387

1388

static enum su_type __devinit su_get_type(struct device_node *dp)

1388

static enum su_type __devinit su_get_type(struct device_node *dp)

1389

{

1389

{

1390

struct device_node *ap = of_find_node_by_path("/aliases");

1390

struct device_node *ap = of_find_node_by_path("/aliases");

1391

1392

if (ap) {

1392

if (ap) {

1393

const char *keyb = of_get_property(ap, "keyboard", NULL);

1393

const char *keyb = of_get_property(ap, "keyboard", NULL);

1394

const char *ms = of_get_property(ap, "mouse", NULL);

1394

const char *ms = of_get_property(ap, "mouse", NULL);

1395

1396

if (keyb) {

1396

if (keyb) {

1397

if (dp == of_find_node_by_path(keyb))

1397

if (dp == of_find_node_by_path(keyb))

1398

return SU_PORT_KBD;

1398

return SU_PORT_KBD;

1399

}

1399

}

1400

if (ms) {

1400

if (ms) {

1401

if (dp == of_find_node_by_path(ms))

1401

if (dp == of_find_node_by_path(ms))

1402

return SU_PORT_MS;

1402

return SU_PORT_MS;

1403

}

1403

}

1404

}

1404

}

1405

1406

return SU_PORT_PORT;

1406

return SU_PORT_PORT;

1407

}

1407

}

1408

1409

static int __devinit su_probe(struct of_device *op, const struct of_device_id *match)

1409

static int __devinit su_probe(struct of_device *op, const struct of_device_id *match)

1410

{

1410

{

1411

static int inst;

1411

static int inst;

1412

struct device_node *dp = op->dev.of_node;

1412

struct device_node *dp = op->dev.of_node;

1413

struct uart_sunsu_port *up;

1413

struct uart_sunsu_port *up;

1414

struct resource *rp;

1414

struct resource *rp;

1415

enum su_type type;

1415

enum su_type type;

1416

bool ignore_line;

1416

bool ignore_line;

1417

int err;

1417

int err;

1418

1419

type = su_get_type(dp);

1419

type = su_get_type(dp);

1420

if (type == SU_PORT_PORT) {

1420

if (type == SU_PORT_PORT) {

1421

if (inst >= UART_NR)

1421

if (inst >= UART_NR)

1422

return -EINVAL;

1422

return -EINVAL;

1423

up = &sunsu_ports[inst];

1423

up = &sunsu_ports[inst];

1424

} else {

1424

} else {

1425

up = kzalloc(sizeof(*up), GFP_KERNEL);

1425

up = kzalloc(sizeof(*up), GFP_KERNEL);

1426

if (!up)

1426

if (!up)

1427

return -ENOMEM;

1427

return -ENOMEM;

1428

}

1428

}

1429

1430

up->port.line = inst;

1430

up->port.line = inst;

1431

1432

spin_lock_init(&up->port.lock);

1432

spin_lock_init(&up->port.lock);

1433

1434

up->su_type = type;

1434

up->su_type = type;

1435

1436

rp = &op->resource[0];

1436

rp = &op->resource[0];

1437

up->port.mapbase = rp->start;

1437

up->port.mapbase = rp->start;

1438

up->reg_size = (rp->end - rp->start) + 1;

1438

up->reg_size = (rp->end - rp->start) + 1;

1439

up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");

1439

up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");

1440

if (!up->port.membase) {

1440

if (!up->port.membase) {

1441

if (type != SU_PORT_PORT)

1441

if (type != SU_PORT_PORT)

1442

kfree(up);

1442

kfree(up);

1443

return -ENOMEM;

1443

return -ENOMEM;

1444

}

1444

}

1445

1446

up->port.irq = op->irqs[0];

1446

up->port.irq = op->irqs[0];

1447

1448

up->port.dev = &op->dev;

1448

up->port.dev = &op->dev;

1449

1450

up->port.type = PORT_UNKNOWN;

1450

up->port.type = PORT_UNKNOWN;

1451

up->port.uartclk = (SU_BASE_BAUD * 16);

1451

up->port.uartclk = (SU_BASE_BAUD * 16);

1452

1453

err = 0;

1453

err = 0;

1454

if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {

1454

if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {

1455

err = sunsu_kbd_ms_init(up);

1455

err = sunsu_kbd_ms_init(up);

1456

if (err) {

1456

if (err) {

1457

of_iounmap(&op->resource[0],

1457

of_iounmap(&op->resource[0],

1458

up->port.membase, up->reg_size);

1458

up->port.membase, up->reg_size);

1459

kfree(up);

1459

kfree(up);

1460

return err;

1460

return err;

1461

}

1461

}

1462

dev_set_drvdata(&op->dev, up);

1462

dev_set_drvdata(&op->dev, up);

1463

1464

return 0;

1464

return 0;

1465

}

1465

}

1466

1467

up->port.flags |= UPF_BOOT_AUTOCONF;

1467

up->port.flags |= UPF_BOOT_AUTOCONF;

1468

1469

sunsu_autoconfig(up);

1469

sunsu_autoconfig(up);

1470

1471

err = -ENODEV;

1471

err = -ENODEV;

1472

if (up->port.type == PORT_UNKNOWN)

1472

if (up->port.type == PORT_UNKNOWN)

1473

goto out_unmap;

1473

goto out_unmap;

1474

1475

up->port.ops = &sunsu_pops;

1475

up->port.ops = &sunsu_pops;

1476

1477

ignore_line = false;

1477

ignore_line = false;

1478

if (!strcmp(dp->name, "rsc-console") ||

1478

if (!strcmp(dp->name, "rsc-console") ||

1479

!strcmp(dp->name, "lom-console"))

1479

!strcmp(dp->name, "lom-console"))

1480

ignore_line = true;

1480

ignore_line = true;

1481

1482

sunserial_console_match(SUNSU_CONSOLE(), dp,

1482

sunserial_console_match(SUNSU_CONSOLE(), dp,

1483

&sunsu_reg, up->port.line,

1483

&sunsu_reg, up->port.line,

1484

ignore_line);

1484

ignore_line);

1485

err = uart_add_one_port(&sunsu_reg, &up->port);

1485

err = uart_add_one_port(&sunsu_reg, &up->port);

1486

if (err)

1486

if (err)

1487

goto out_unmap;

1487

goto out_unmap;

1488

1489

dev_set_drvdata(&op->dev, up);

1489

dev_set_drvdata(&op->dev, up);

1490

1491

inst++;

1491

inst++;

1492

1493

return 0;

1493

return 0;

1494

1495

out_unmap:

1495

out_unmap:

1496

of_iounmap(&op->resource[0], up->port.membase, up->reg_size);

1496

of_iounmap(&op->resource[0], up->port.membase, up->reg_size);

1497

return err;

1497

return err;

1498

}

1498

}

1499

1500

static int __devexit su_remove(struct of_device *op)

1500

static int __devexit su_remove(struct of_device *op)

1501

{

1501

{

1502

struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);

1502

struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);

1503

bool kbdms = false;

1503

1504

if (up->su_type == SU_PORT_MS ||

1505

if (up->su_type == SU_PORT_MS ||

1505

up->su_type == SU_PORT_KBD) {

1506

up->su_type == SU_PORT_KBD)

1507

kbdms = true;

1508

1509

if (kbdms) {

1506

#ifdef CONFIG_SERIO

1510

#ifdef CONFIG_SERIO

1507

serio_unregister_port(&up->serio);

1511

serio_unregister_port(&up->serio);

1508

#endif

1512

#endif

1509

kfree(up);

1513

} else if (up->port.type != PORT_UNKNOWN)

1510

} else if (up->port.type != PORT_UNKNOWN) {

1511

uart_remove_one_port(&sunsu_reg, &up->port);

1514

uart_remove_one_port(&sunsu_reg, &up->port);

1512

}

1513

1515

1514

if (up->port.membase)

1516

if (up->port.membase)

1515

of_iounmap(&op->resource[0], up->port.membase, up->reg_size);

1517

of_iounmap(&op->resource[0], up->port.membase, up->reg_size);

1518

1519

if (kbdms)

1520

kfree(up);

1516

1521

1517

dev_set_drvdata(&op->dev, NULL);

1522

dev_set_drvdata(&op->dev, NULL);

1518

1523

1519

return 0;

1524

return 0;

1520

}

1525

}

1521

1526

1522

static const struct of_device_id su_match[] = {

1527

static const struct of_device_id su_match[] = {

1523

{

1528

{

1524

.name = "su",

1529

.name = "su",

1525

},

1530

},

1526

{

1531

{

1527

.name = "su_pnp",

1532

.name = "su_pnp",

1528

},

1533

},

1529

{

1534

{

1530

.name = "serial",

1535

.name = "serial",

1531

.compatible = "su",

1536

.compatible = "su",

1532

},

1537

},

1533

{

1538

{

1534

.type = "serial",

1539

.type = "serial",

1535

.compatible = "su",

1540

.compatible = "su",

1536

},

1541

},

1537

{},

1542

{},

1538

};

1543

};

1539

MODULE_DEVICE_TABLE(of, su_match);

1544

MODULE_DEVICE_TABLE(of, su_match);

1540

1545

1541

static struct of_platform_driver su_driver = {

1546

static struct of_platform_driver su_driver = {

1542

.driver = {

1547

.driver = {

1543

.name = "su",

1548

.name = "su",

1544

.owner = THIS_MODULE,

1549

.owner = THIS_MODULE,

1545

.of_match_table = su_match,

1550

.of_match_table = su_match,

1546

},

1551

},

1547

.probe = su_probe,

1552

.probe = su_probe,

1548

.remove = __devexit_p(su_remove),

1553

.remove = __devexit_p(su_remove),

1549

};

1554

};

1550

1555

1551

static int __init sunsu_init(void)

1556

static int __init sunsu_init(void)

1552

{

1557

{

1553

struct device_node *dp;

1558

struct device_node *dp;

1554

int err;

1559

int err;

1555

int num_uart = 0;

1560

int num_uart = 0;

1556

1561

1557

for_each_node_by_name(dp, "su") {

1562

for_each_node_by_name(dp, "su") {

1558

if (su_get_type(dp) == SU_PORT_PORT)

1563

if (su_get_type(dp) == SU_PORT_PORT)

1559

num_uart++;

1564

num_uart++;

1560

}

1565

}

1561

for_each_node_by_name(dp, "su_pnp") {

1566

for_each_node_by_name(dp, "su_pnp") {

1562

if (su_get_type(dp) == SU_PORT_PORT)

1567

if (su_get_type(dp) == SU_PORT_PORT)

1563

num_uart++;

1568

num_uart++;

1564

}

1569

}

1565

for_each_node_by_name(dp, "serial") {

1570

for_each_node_by_name(dp, "serial") {

1566

if (of_device_is_compatible(dp, "su")) {

1571

if (of_device_is_compatible(dp, "su")) {

1567

if (su_get_type(dp) == SU_PORT_PORT)

1572

if (su_get_type(dp) == SU_PORT_PORT)

1568

num_uart++;

1573

num_uart++;

1569

}

1574

}

1570

}

1575

}

1571

for_each_node_by_type(dp, "serial") {

1576

for_each_node_by_type(dp, "serial") {

1572

if (of_device_is_compatible(dp, "su")) {

1577

if (of_device_is_compatible(dp, "su")) {

1573

if (su_get_type(dp) == SU_PORT_PORT)

1578

if (su_get_type(dp) == SU_PORT_PORT)

1574

num_uart++;

1579

num_uart++;

1575

}

1580

}

1576

}

1581

}

1577

1582

1578

if (num_uart) {

1583

if (num_uart) {

1579

err = sunserial_register_minors(&sunsu_reg, num_uart);

1584

err = sunserial_register_minors(&sunsu_reg, num_uart);

1580

if (err)

1585

if (err)

1581

return err;

1586

return err;

1582

}

1587

}

1583

1588

1584

err = of_register_driver(&su_driver, &of_bus_type);

1589

err = of_register_driver(&su_driver, &of_bus_type);

1585

if (err && num_uart)

1590

if (err && num_uart)

1586

sunserial_unregister_minors(&sunsu_reg, num_uart);

1591

sunserial_unregister_minors(&sunsu_reg, num_uart);

1587

1592

1588

return err;

1593

return err;

1589

}

1594

}

1590

1595

1591

static void __exit sunsu_exit(void)

1596

static void __exit sunsu_exit(void)

1592

{

1597

{

1593

if (sunsu_reg.nr)

1598

if (sunsu_reg.nr)

1594

sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);

1599

sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);

1595

}

1600

}

1596

1601

1597

module_init(sunsu_init);

1602

module_init(sunsu_init);

1598

module_exit(sunsu_exit);

1603

module_exit(sunsu_exit);

1599

1604

1600

MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");

1605

MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");

1601

MODULE_DESCRIPTION("Sun SU serial port driver");

1606

MODULE_DESCRIPTION("Sun SU serial port driver");

1602

MODULE_VERSION("2.0");

1607

MODULE_VERSION("2.0");

GITLAB

sunsu: Fix use after free in su_remove().

 /*
  * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  *
  * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
  * Copyright (C) 1998-1999  Pete Zaitcev   (zaitcev@yahoo.com)
  *
  * This is mainly a variation of 8250.c, credits go to authors mentioned
  * therein.  In fact this driver should be merged into the generic 8250.c
  * infrastructure perhaps using a 8250_sparc.c module.
  *
  * Fixed to use tty_get_baud_rate().
  *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  *
  * Converted to new 2.5.x UART layer.
  *   David S. Miller (davem@davemloft.net), 2002-Jul-29
  */
 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/spinlock.h>
 #include <linux/errno.h>
 #include <linux/tty.h>
 #include <linux/tty_flip.h>
 #include <linux/major.h>
 #include <linux/string.h>
 #include <linux/ptrace.h>
 #include <linux/ioport.h>
 #include <linux/circ_buf.h>
 #include <linux/serial.h>
 #include <linux/sysrq.h>
 #include <linux/console.h>
 #include <linux/slab.h>
 #ifdef CONFIG_SERIO
 #include <linux/serio.h>
 #endif
 #include <linux/serial_reg.h>
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/of_device.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include <asm/prom.h>
 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
 #endif
 #include <linux/serial_core.h>
 #include "suncore.h"
 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  * in a UART clock of 1.8462 MHz.
  */
 #define SU_BASE_BAUD	(1846200 / 16)
 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
 /*
  * Here we define the default xmit fifo size used for each type of UART.
  */
 static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
 	{ "unknown",	1,	0 },
 	{ "8250",	1,	0 },
 	{ "16450",	1,	0 },
 	{ "16550",	1,	0 },
 	{ "16550A",	16,	UART_CLEAR_FIFO | UART_USE_FIFO },
 	{ "Cirrus",	1, 	0 },
 	{ "ST16650",	1,	UART_CLEAR_FIFO | UART_STARTECH },
 	{ "ST16650V2",	32,	UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
 	{ "TI16750",	64,	UART_CLEAR_FIFO | UART_USE_FIFO },
 	{ "Startech",	1,	0 },
 	{ "16C950/954",	128,	UART_CLEAR_FIFO | UART_USE_FIFO },
 	{ "ST16654",	64,	UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
 	{ "XR16850",	128,	UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
 	{ "RSA",	2048,	UART_CLEAR_FIFO | UART_USE_FIFO }
 };
 struct uart_sunsu_port {
 	struct uart_port	port;
 	unsigned char		acr;
 	unsigned char		ier;
 	unsigned short		rev;
 	unsigned char		lcr;
 	unsigned int		lsr_break_flag;
 	unsigned int		cflag;
 	/* Probing information.  */
 	enum su_type		su_type;
 	unsigned int		type_probed;	/* XXX Stupid */
 	unsigned long		reg_size;
 #ifdef CONFIG_SERIO
 	struct serio		serio;
 	int			serio_open;
 #endif
 };
 static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
 {
 	offset <<= up->port.regshift;
 	switch (up->port.iotype) {
 	case UPIO_HUB6:
 		outb(up->port.hub6 - 1 + offset, up->port.iobase);
 		return inb(up->port.iobase + 1);
 	case UPIO_MEM:
 		return readb(up->port.membase + offset);
 	default:
 		return inb(up->port.iobase + offset);
 	}
 }
 static void serial_out(struct uart_sunsu_port *up, int offset, int value)
 {
 #ifndef CONFIG_SPARC64
 	/*
 	 * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
 	 * connected with a gate then go to SlavIO. When IRQ4 goes tristated
 	 * gate outputs a logical one. Since we use level triggered interrupts
 	 * we have lockup and watchdog reset. We cannot mask IRQ because
 	 * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
 	 * This problem is similar to what Alpha people suffer, see serial.c.
 	 */
 	if (offset == UART_MCR)
 		value |= UART_MCR_OUT2;
 #endif
 	offset <<= up->port.regshift;
 	switch (up->port.iotype) {
 	case UPIO_HUB6:
 		outb(up->port.hub6 - 1 + offset, up->port.iobase);
 		outb(value, up->port.iobase + 1);
 		break;
 	case UPIO_MEM:
 		writeb(value, up->port.membase + offset);
 		break;
 	default:
 		outb(value, up->port.iobase + offset);
 	}
 }
 /*
  * We used to support using pause I/O for certain machines.  We
  * haven't supported this for a while, but just in case it's badly
  * needed for certain old 386 machines, I've left these #define's
  * in....
  */
 #define serial_inp(up, offset)		serial_in(up, offset)
 #define serial_outp(up, offset, value)	serial_out(up, offset, value)
 /*
  * For the 16C950
  */
 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
 {
 	serial_out(up, UART_SCR, offset);
 	serial_out(up, UART_ICR, value);
 }
 #if 0 /* Unused currently */
 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
 {
 	unsigned int value;
 	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
 	serial_out(up, UART_SCR, offset);
 	value = serial_in(up, UART_ICR);
 	serial_icr_write(up, UART_ACR, up->acr);
 	return value;
 }
 #endif
 #ifdef CONFIG_SERIAL_8250_RSA
 /*
  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
  * We set the port uart clock rate if we succeed.
  */
 static int __enable_rsa(struct uart_sunsu_port *up)
 {
 	unsigned char mode;
 	int result;
 	mode = serial_inp(up, UART_RSA_MSR);
 	result = mode & UART_RSA_MSR_FIFO;
 	if (!result) {
 		serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
 		mode = serial_inp(up, UART_RSA_MSR);
 		result = mode & UART_RSA_MSR_FIFO;
 	}
 	if (result)
 		up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
 	return result;
 }
 static void enable_rsa(struct uart_sunsu_port *up)
 {
 	if (up->port.type == PORT_RSA) {
 		if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
 			spin_lock_irq(&up->port.lock);
 			__enable_rsa(up);
 			spin_unlock_irq(&up->port.lock);
 		}
 		if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
 			serial_outp(up, UART_RSA_FRR, 0);
 	}
 }
 /*
  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
  * It is unknown why interrupts were disabled in here.  However,
  * the caller is expected to preserve this behaviour by grabbing
  * the spinlock before calling this function.
  */
 static void disable_rsa(struct uart_sunsu_port *up)
 {
 	unsigned char mode;
 	int result;
 	if (up->port.type == PORT_RSA &&
 	    up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
 		spin_lock_irq(&up->port.lock);
 		mode = serial_inp(up, UART_RSA_MSR);
 		result = !(mode & UART_RSA_MSR_FIFO);
 		if (!result) {
 			serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
 			mode = serial_inp(up, UART_RSA_MSR);
 			result = !(mode & UART_RSA_MSR_FIFO);
 		}
 		if (result)
 			up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
 		spin_unlock_irq(&up->port.lock);
 	}
 }
 #endif /* CONFIG_SERIAL_8250_RSA */
 static inline void __stop_tx(struct uart_sunsu_port *p)
 {
 	if (p->ier & UART_IER_THRI) {
 		p->ier &= ~UART_IER_THRI;
 		serial_out(p, UART_IER, p->ier);
 	}
 }
 static void sunsu_stop_tx(struct uart_port *port)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	__stop_tx(up);
 	/*
 	 * We really want to stop the transmitter from sending.
 	 */
 	if (up->port.type == PORT_16C950) {
 		up->acr |= UART_ACR_TXDIS;
 		serial_icr_write(up, UART_ACR, up->acr);
 	}
 }
 static void sunsu_start_tx(struct uart_port *port)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	if (!(up->ier & UART_IER_THRI)) {
 		up->ier |= UART_IER_THRI;
 		serial_out(up, UART_IER, up->ier);
 	}
 	/*
 	 * Re-enable the transmitter if we disabled it.
 	 */
 	if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
 		up->acr &= ~UART_ACR_TXDIS;
 		serial_icr_write(up, UART_ACR, up->acr);
 	}
 }
 static void sunsu_stop_rx(struct uart_port *port)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	up->ier &= ~UART_IER_RLSI;
 	up->port.read_status_mask &= ~UART_LSR_DR;
 	serial_out(up, UART_IER, up->ier);
 }
 static void sunsu_enable_ms(struct uart_port *port)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	unsigned long flags;
 	spin_lock_irqsave(&up->port.lock, flags);
 	up->ier |= UART_IER_MSI;
 	serial_out(up, UART_IER, up->ier);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
 static struct tty_struct *
 receive_chars(struct uart_sunsu_port *up, unsigned char *status)
 {
 	struct tty_struct *tty = up->port.state->port.tty;
 	unsigned char ch, flag;
 	int max_count = 256;
 	int saw_console_brk = 0;
 	do {
 		ch = serial_inp(up, UART_RX);
 		flag = TTY_NORMAL;
 		up->port.icount.rx++;
 		if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
 				       UART_LSR_FE | UART_LSR_OE))) {
 			/*
 			 * For statistics only
 			 */
 			if (*status & UART_LSR_BI) {
 				*status &= ~(UART_LSR_FE | UART_LSR_PE);
 				up->port.icount.brk++;
 				if (up->port.cons != NULL &&
 				    up->port.line == up->port.cons->index)
 					saw_console_brk = 1;
 				/*
 				 * We do the SysRQ and SAK checking
 				 * here because otherwise the break
 				 * may get masked by ignore_status_mask
 				 * or read_status_mask.
 				 */
 				if (uart_handle_break(&up->port))
 					goto ignore_char;
 			} else if (*status & UART_LSR_PE)
 				up->port.icount.parity++;
 			else if (*status & UART_LSR_FE)
 				up->port.icount.frame++;
 			if (*status & UART_LSR_OE)
 				up->port.icount.overrun++;
 			/*
 			 * Mask off conditions which should be ingored.
 			 */
 			*status &= up->port.read_status_mask;
 			if (up->port.cons != NULL &&
 			    up->port.line == up->port.cons->index) {
 				/* Recover the break flag from console xmit */
 				*status |= up->lsr_break_flag;
 				up->lsr_break_flag = 0;
 			}
 			if (*status & UART_LSR_BI) {
 				flag = TTY_BREAK;
 			} else if (*status & UART_LSR_PE)
 				flag = TTY_PARITY;
 			else if (*status & UART_LSR_FE)
 				flag = TTY_FRAME;
 		}
 		if (uart_handle_sysrq_char(&up->port, ch))
 			goto ignore_char;
 		if ((*status & up->port.ignore_status_mask) == 0)
 			tty_insert_flip_char(tty, ch, flag);
 		if (*status & UART_LSR_OE)
 			/*
 			 * Overrun is special, since it's reported
 			 * immediately, and doesn't affect the current
 			 * character.
 			 */
 			 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 	ignore_char:
 		*status = serial_inp(up, UART_LSR);
 	} while ((*status & UART_LSR_DR) && (max_count-- > 0));
 	if (saw_console_brk)
 		sun_do_break();
 	return tty;
 }
 static void transmit_chars(struct uart_sunsu_port *up)
 {
 	struct circ_buf *xmit = &up->port.state->xmit;
 	int count;
 	if (up->port.x_char) {
 		serial_outp(up, UART_TX, up->port.x_char);
 		up->port.icount.tx++;
 		up->port.x_char = 0;
 		return;
 	}
 	if (uart_tx_stopped(&up->port)) {
 		sunsu_stop_tx(&up->port);
 		return;
 	}
 	if (uart_circ_empty(xmit)) {
 		__stop_tx(up);
 		return;
 	}
 	count = up->port.fifosize;
 	do {
 		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 		up->port.icount.tx++;
 		if (uart_circ_empty(xmit))
 			break;
 	} while (--count > 0);
 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 		uart_write_wakeup(&up->port);
 	if (uart_circ_empty(xmit))
 		__stop_tx(up);
 }
 static void check_modem_status(struct uart_sunsu_port *up)
 {
 	int status;
 	status = serial_in(up, UART_MSR);
 	if ((status & UART_MSR_ANY_DELTA) == 0)
 		return;
 	if (status & UART_MSR_TERI)
 		up->port.icount.rng++;
 	if (status & UART_MSR_DDSR)
 		up->port.icount.dsr++;
 	if (status & UART_MSR_DDCD)
 		uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 	if (status & UART_MSR_DCTS)
 		uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 	wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 }
 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
 {
 	struct uart_sunsu_port *up = dev_id;
 	unsigned long flags;
 	unsigned char status;
 	spin_lock_irqsave(&up->port.lock, flags);
 	do {
 		struct tty_struct *tty;
 		status = serial_inp(up, UART_LSR);
 		tty = NULL;
 		if (status & UART_LSR_DR)
 			tty = receive_chars(up, &status);
 		check_modem_status(up);
 		if (status & UART_LSR_THRE)
 			transmit_chars(up);
 		spin_unlock_irqrestore(&up->port.lock, flags);
 		if (tty)
 			tty_flip_buffer_push(tty);
 		spin_lock_irqsave(&up->port.lock, flags);
 	} while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	return IRQ_HANDLED;
 }
 /* Separate interrupt handling path for keyboard/mouse ports.  */
 static void
 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 		   unsigned int iflag, unsigned int quot);
 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
 {
 	unsigned int cur_cflag = up->cflag;
 	int quot, new_baud;
 	up->cflag &= ~CBAUD;
 	up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
 	quot = up->port.uartclk / (16 * new_baud);
 	sunsu_change_speed(&up->port, up->cflag, 0, quot);
 }
 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
 {
 	do {
 		unsigned char ch = serial_inp(up, UART_RX);
 		/* Stop-A is handled by drivers/char/keyboard.c now. */
 		if (up->su_type == SU_PORT_KBD) {
 #ifdef CONFIG_SERIO
 			serio_interrupt(&up->serio, ch, 0);
 #endif
 		} else if (up->su_type == SU_PORT_MS) {
 			int ret = suncore_mouse_baud_detection(ch, is_break);
 			switch (ret) {
 			case 2:
 				sunsu_change_mouse_baud(up);
 				/* fallthru */
 			case 1:
 				break;
 			case 0:
 #ifdef CONFIG_SERIO
 				serio_interrupt(&up->serio, ch, 0);
 #endif
 				break;
 			};
 		}
 	} while (serial_in(up, UART_LSR) & UART_LSR_DR);
 }
 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
 {
 	struct uart_sunsu_port *up = dev_id;
 	if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
 		unsigned char status = serial_inp(up, UART_LSR);
 		if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
 			receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
 	}
 	return IRQ_HANDLED;
 }
 static unsigned int sunsu_tx_empty(struct uart_port *port)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	unsigned long flags;
 	unsigned int ret;
 	spin_lock_irqsave(&up->port.lock, flags);
 	ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	return ret;
 }
 static unsigned int sunsu_get_mctrl(struct uart_port *port)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	unsigned char status;
 	unsigned int ret;
 	status = serial_in(up, UART_MSR);
 	ret = 0;
 	if (status & UART_MSR_DCD)
 		ret |= TIOCM_CAR;
 	if (status & UART_MSR_RI)
 		ret |= TIOCM_RNG;
 	if (status & UART_MSR_DSR)
 		ret |= TIOCM_DSR;
 	if (status & UART_MSR_CTS)
 		ret |= TIOCM_CTS;
 	return ret;
 }
 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	unsigned char mcr = 0;
 	if (mctrl & TIOCM_RTS)
 		mcr |= UART_MCR_RTS;
 	if (mctrl & TIOCM_DTR)
 		mcr |= UART_MCR_DTR;
 	if (mctrl & TIOCM_OUT1)
 		mcr |= UART_MCR_OUT1;
 	if (mctrl & TIOCM_OUT2)
 		mcr |= UART_MCR_OUT2;
 	if (mctrl & TIOCM_LOOP)
 		mcr |= UART_MCR_LOOP;
 	serial_out(up, UART_MCR, mcr);
 }
 static void sunsu_break_ctl(struct uart_port *port, int break_state)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	unsigned long flags;
 	spin_lock_irqsave(&up->port.lock, flags);
 	if (break_state == -1)
 		up->lcr |= UART_LCR_SBC;
 	else
 		up->lcr &= ~UART_LCR_SBC;
 	serial_out(up, UART_LCR, up->lcr);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
 static int sunsu_startup(struct uart_port *port)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	unsigned long flags;
 	int retval;
 	if (up->port.type == PORT_16C950) {
 		/* Wake up and initialize UART */
 		up->acr = 0;
 		serial_outp(up, UART_LCR, 0xBF);
 		serial_outp(up, UART_EFR, UART_EFR_ECB);
 		serial_outp(up, UART_IER, 0);
 		serial_outp(up, UART_LCR, 0);
 		serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
 		serial_outp(up, UART_LCR, 0xBF);
 		serial_outp(up, UART_EFR, UART_EFR_ECB);
 		serial_outp(up, UART_LCR, 0);
 	}
 #ifdef CONFIG_SERIAL_8250_RSA
 	/*
 	 * If this is an RSA port, see if we can kick it up to the
 	 * higher speed clock.
 	 */
 	enable_rsa(up);
 #endif
 	/*
 	 * Clear the FIFO buffers and disable them.
 	 * (they will be reenabled in set_termios())
 	 */
 	if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
 		serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 		serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 				UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 		serial_outp(up, UART_FCR, 0);
 	}
 	/*
 	 * Clear the interrupt registers.
 	 */
 	(void) serial_inp(up, UART_LSR);
 	(void) serial_inp(up, UART_RX);
 	(void) serial_inp(up, UART_IIR);
 	(void) serial_inp(up, UART_MSR);
 	/*
 	 * At this point, there's no way the LSR could still be 0xff;
 	 * if it is, then bail out, because there's likely no UART
 	 * here.
 	 */
 	if (!(up->port.flags & UPF_BUGGY_UART) &&
 	    (serial_inp(up, UART_LSR) == 0xff)) {
 		printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
 		return -ENODEV;
 	}
 	if (up->su_type != SU_PORT_PORT) {
 		retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
 				     IRQF_SHARED, su_typev[up->su_type], up);
 	} else {
 		retval = request_irq(up->port.irq, sunsu_serial_interrupt,
 				     IRQF_SHARED, su_typev[up->su_type], up);
 	}
 	if (retval) {
 		printk("su: Cannot register IRQ %d\n", up->port.irq);
 		return retval;
 	}
 	/*
 	 * Now, initialize the UART
 	 */
 	serial_outp(up, UART_LCR, UART_LCR_WLEN8);
 	spin_lock_irqsave(&up->port.lock, flags);
 	up->port.mctrl |= TIOCM_OUT2;
 	sunsu_set_mctrl(&up->port, up->port.mctrl);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	/*
 	 * Finally, enable interrupts.  Note: Modem status interrupts
 	 * are set via set_termios(), which will be occurring imminently
 	 * anyway, so we don't enable them here.
 	 */
 	up->ier = UART_IER_RLSI | UART_IER_RDI;
 	serial_outp(up, UART_IER, up->ier);
 	if (up->port.flags & UPF_FOURPORT) {
 		unsigned int icp;
 		/*
 		 * Enable interrupts on the AST Fourport board
 		 */
 		icp = (up->port.iobase & 0xfe0) | 0x01f;
 		outb_p(0x80, icp);
 		(void) inb_p(icp);
 	}
 	/*
 	 * And clear the interrupt registers again for luck.
 	 */
 	(void) serial_inp(up, UART_LSR);
 	(void) serial_inp(up, UART_RX);
 	(void) serial_inp(up, UART_IIR);
 	(void) serial_inp(up, UART_MSR);
 	return 0;
 }
 static void sunsu_shutdown(struct uart_port *port)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	unsigned long flags;
 	/*
 	 * Disable interrupts from this port
 	 */
 	up->ier = 0;
 	serial_outp(up, UART_IER, 0);
 	spin_lock_irqsave(&up->port.lock, flags);
 	if (up->port.flags & UPF_FOURPORT) {
 		/* reset interrupts on the AST Fourport board */
 		inb((up->port.iobase & 0xfe0) | 0x1f);
 		up->port.mctrl |= TIOCM_OUT1;
 	} else
 		up->port.mctrl &= ~TIOCM_OUT2;
 	sunsu_set_mctrl(&up->port, up->port.mctrl);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	/*
 	 * Disable break condition and FIFOs
 	 */
 	serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 				  UART_FCR_CLEAR_RCVR |
 				  UART_FCR_CLEAR_XMIT);
 	serial_outp(up, UART_FCR, 0);
 #ifdef CONFIG_SERIAL_8250_RSA
 	/*
 	 * Reset the RSA board back to 115kbps compat mode.
 	 */
 	disable_rsa(up);
 #endif
 	/*
 	 * Read data port to reset things.
 	 */
 	(void) serial_in(up, UART_RX);
 	free_irq(up->port.irq, up);
 }
 static void
 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 		   unsigned int iflag, unsigned int quot)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	unsigned char cval, fcr = 0;
 	unsigned long flags;
 	switch (cflag & CSIZE) {
 	case CS5:
 		cval = 0x00;
 		break;
 	case CS6:
 		cval = 0x01;
 		break;
 	case CS7:
 		cval = 0x02;
 		break;
 	default:
 	case CS8:
 		cval = 0x03;
 		break;
 	}
 	if (cflag & CSTOPB)
 		cval |= 0x04;
 	if (cflag & PARENB)
 		cval |= UART_LCR_PARITY;
 	if (!(cflag & PARODD))
 		cval |= UART_LCR_EPAR;
 #ifdef CMSPAR
 	if (cflag & CMSPAR)
 		cval |= UART_LCR_SPAR;
 #endif
 	/*
 	 * Work around a bug in the Oxford Semiconductor 952 rev B
 	 * chip which causes it to seriously miscalculate baud rates
 	 * when DLL is 0.
 	 */
 	if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
 	    up->rev == 0x5201)
 		quot ++;
 	if (uart_config[up->port.type].flags & UART_USE_FIFO) {
 		if ((up->port.uartclk / quot) < (2400 * 16))
 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
 #ifdef CONFIG_SERIAL_8250_RSA
 		else if (up->port.type == PORT_RSA)
 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
 #endif
 		else
 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
 	}
 	if (up->port.type == PORT_16750)
 		fcr |= UART_FCR7_64BYTE;
 	/*
 	 * Ok, we're now changing the port state.  Do it with
 	 * interrupts disabled.
 	 */
 	spin_lock_irqsave(&up->port.lock, flags);
 	/*
 	 * Update the per-port timeout.
 	 */
 	uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
 	up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 	if (iflag & INPCK)
 		up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 	if (iflag & (BRKINT | PARMRK))
 		up->port.read_status_mask |= UART_LSR_BI;
 	/*
 	 * Characteres to ignore
 	 */
 	up->port.ignore_status_mask = 0;
 	if (iflag & IGNPAR)
 		up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 	if (iflag & IGNBRK) {
 		up->port.ignore_status_mask |= UART_LSR_BI;
 		/*
 		 * If we're ignoring parity and break indicators,
 		 * ignore overruns too (for real raw support).
 		 */
 		if (iflag & IGNPAR)
 			up->port.ignore_status_mask |= UART_LSR_OE;
 	}
 	/*
 	 * ignore all characters if CREAD is not set
 	 */
 	if ((cflag & CREAD) == 0)
 		up->port.ignore_status_mask |= UART_LSR_DR;
 	/*
 	 * CTS flow control flag and modem status interrupts
 	 */
 	up->ier &= ~UART_IER_MSI;
 	if (UART_ENABLE_MS(&up->port, cflag))
 		up->ier |= UART_IER_MSI;
 	serial_out(up, UART_IER, up->ier);
 	if (uart_config[up->port.type].flags & UART_STARTECH) {
 		serial_outp(up, UART_LCR, 0xBF);
 		serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
 	}
 	serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 	serial_outp(up, UART_DLL, quot & 0xff);		/* LS of divisor */
 	serial_outp(up, UART_DLM, quot >> 8);		/* MS of divisor */
 	if (up->port.type == PORT_16750)
 		serial_outp(up, UART_FCR, fcr);		/* set fcr */
 	serial_outp(up, UART_LCR, cval);		/* reset DLAB */
 	up->lcr = cval;					/* Save LCR */
 	if (up->port.type != PORT_16750) {
 		if (fcr & UART_FCR_ENABLE_FIFO) {
 			/* emulated UARTs (Lucent Venus 167x) need two steps */
 			serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 		}
 		serial_outp(up, UART_FCR, fcr);		/* set fcr */
 	}
 	up->cflag = cflag;
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
 static void
 sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
 		  struct ktermios *old)
 {
 	unsigned int baud, quot;
 	/*
 	 * Ask the core to calculate the divisor for us.
 	 */
 	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 	quot = uart_get_divisor(port, baud);
 	sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
 }
 static void sunsu_release_port(struct uart_port *port)
 {
 }
 static int sunsu_request_port(struct uart_port *port)
 {
 	return 0;
 }
 static void sunsu_config_port(struct uart_port *port, int flags)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 	if (flags & UART_CONFIG_TYPE) {
 		/*
 		 * We are supposed to call autoconfig here, but this requires
 		 * splitting all the OBP probing crap from the UART probing.
 		 * We'll do it when we kill sunsu.c altogether.
 		 */
 		port->type = up->type_probed;	/* XXX */
 	}
 }
 static int
 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
 {
 	return -EINVAL;
 }
 static const char *
 sunsu_type(struct uart_port *port)
 {
 	int type = port->type;
 	if (type >= ARRAY_SIZE(uart_config))
 		type = 0;
 	return uart_config[type].name;
 }
 static struct uart_ops sunsu_pops = {
 	.tx_empty	= sunsu_tx_empty,
 	.set_mctrl	= sunsu_set_mctrl,
 	.get_mctrl	= sunsu_get_mctrl,
 	.stop_tx	= sunsu_stop_tx,
 	.start_tx	= sunsu_start_tx,
 	.stop_rx	= sunsu_stop_rx,
 	.enable_ms	= sunsu_enable_ms,
 	.break_ctl	= sunsu_break_ctl,
 	.startup	= sunsu_startup,
 	.shutdown	= sunsu_shutdown,
 	.set_termios	= sunsu_set_termios,
 	.type		= sunsu_type,
 	.release_port	= sunsu_release_port,
 	.request_port	= sunsu_request_port,
 	.config_port	= sunsu_config_port,
 	.verify_port	= sunsu_verify_port,
 };
 #define UART_NR	4
 static struct uart_sunsu_port sunsu_ports[UART_NR];
 #ifdef CONFIG_SERIO
 static DEFINE_SPINLOCK(sunsu_serio_lock);
 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
 {
 	struct uart_sunsu_port *up = serio->port_data;
 	unsigned long flags;
 	int lsr;
 	spin_lock_irqsave(&sunsu_serio_lock, flags);
 	do {
 		lsr = serial_in(up, UART_LSR);
 	} while (!(lsr & UART_LSR_THRE));
 	/* Send the character out. */
 	serial_out(up, UART_TX, ch);
 	spin_unlock_irqrestore(&sunsu_serio_lock, flags);
 	return 0;
 }
 static int sunsu_serio_open(struct serio *serio)
 {
 	struct uart_sunsu_port *up = serio->port_data;
 	unsigned long flags;
 	int ret;
 	spin_lock_irqsave(&sunsu_serio_lock, flags);
 	if (!up->serio_open) {
 		up->serio_open = 1;
 		ret = 0;
 	} else
 		ret = -EBUSY;
 	spin_unlock_irqrestore(&sunsu_serio_lock, flags);
 	return ret;
 }
 static void sunsu_serio_close(struct serio *serio)
 {
 	struct uart_sunsu_port *up = serio->port_data;
 	unsigned long flags;
 	spin_lock_irqsave(&sunsu_serio_lock, flags);
 	up->serio_open = 0;
 	spin_unlock_irqrestore(&sunsu_serio_lock, flags);
 }
 #endif /* CONFIG_SERIO */
 static void sunsu_autoconfig(struct uart_sunsu_port *up)
 {
 	unsigned char status1, status2, scratch, scratch2, scratch3;
 	unsigned char save_lcr, save_mcr;
 	unsigned long flags;
 	if (up->su_type == SU_PORT_NONE)
 		return;
 	up->type_probed = PORT_UNKNOWN;
 	up->port.iotype = UPIO_MEM;
 	spin_lock_irqsave(&up->port.lock, flags);
 	if (!(up->port.flags & UPF_BUGGY_UART)) {
 		/*
 		 * Do a simple existence test first; if we fail this, there's
 		 * no point trying anything else.
 		 *
 		 * 0x80 is used as a nonsense port to prevent against false
 		 * positives due to ISA bus float.  The assumption is that
 		 * 0x80 is a non-existent port; which should be safe since
 		 * include/asm/io.h also makes this assumption.
 		 */
 		scratch = serial_inp(up, UART_IER);
 		serial_outp(up, UART_IER, 0);
 #ifdef __i386__
 		outb(0xff, 0x080);
 #endif
 		scratch2 = serial_inp(up, UART_IER);
 		serial_outp(up, UART_IER, 0x0f);
 #ifdef __i386__
 		outb(0, 0x080);
 #endif
 		scratch3 = serial_inp(up, UART_IER);
 		serial_outp(up, UART_IER, scratch);
 		if (scratch2 != 0 || scratch3 != 0x0F)
 			goto out;	/* We failed; there's nothing here */
 	}
 	save_mcr = serial_in(up, UART_MCR);
 	save_lcr = serial_in(up, UART_LCR);
 	/*
 	 * Check to see if a UART is really there.  Certain broken
 	 * internal modems based on the Rockwell chipset fail this
 	 * test, because they apparently don't implement the loopback
 	 * test mode.  So this test is skipped on the COM 1 through
 	 * COM 4 ports.  This *should* be safe, since no board
 	 * manufacturer would be stupid enough to design a board
 	 * that conflicts with COM 1-4 --- we hope!
 	 */
 	if (!(up->port.flags & UPF_SKIP_TEST)) {
 		serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
 		status1 = serial_inp(up, UART_MSR) & 0xF0;
 		serial_outp(up, UART_MCR, save_mcr);
 		if (status1 != 0x90)
 			goto out;	/* We failed loopback test */
 	}
 	serial_outp(up, UART_LCR, 0xBF);	/* set up for StarTech test */
 	serial_outp(up, UART_EFR, 0);		/* EFR is the same as FCR */
 	serial_outp(up, UART_LCR, 0);
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 	scratch = serial_in(up, UART_IIR) >> 6;
 	switch (scratch) {
 		case 0:
 			up->port.type = PORT_16450;
 			break;
 		case 1:
 			up->port.type = PORT_UNKNOWN;
 			break;
 		case 2:
 			up->port.type = PORT_16550;
 			break;
 		case 3:
 			up->port.type = PORT_16550A;
 			break;
 	}
 	if (up->port.type == PORT_16550A) {
 		/* Check for Startech UART's */
 		serial_outp(up, UART_LCR, UART_LCR_DLAB);
 		if (serial_in(up, UART_EFR) == 0) {
 			up->port.type = PORT_16650;
 		} else {
 			serial_outp(up, UART_LCR, 0xBF);
 			if (serial_in(up, UART_EFR) == 0)
 				up->port.type = PORT_16650V2;
 		}
 	}
 	if (up->port.type == PORT_16550A) {
 		/* Check for TI 16750 */
 		serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
 		serial_outp(up, UART_FCR,
 			    UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
 		scratch = serial_in(up, UART_IIR) >> 5;
 		if (scratch == 7) {
 			/*
 			 * If this is a 16750, and not a cheap UART
 			 * clone, then it should only go into 64 byte
 			 * mode if the UART_FCR7_64BYTE bit was set
 			 * while UART_LCR_DLAB was latched.
 			 */
  			serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 			serial_outp(up, UART_LCR, 0);
 			serial_outp(up, UART_FCR,
 				    UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
 			scratch = serial_in(up, UART_IIR) >> 5;
 			if (scratch == 6)
 				up->port.type = PORT_16750;
 		}
 		serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 	}
 	serial_outp(up, UART_LCR, save_lcr);
 	if (up->port.type == PORT_16450) {
 		scratch = serial_in(up, UART_SCR);
 		serial_outp(up, UART_SCR, 0xa5);
 		status1 = serial_in(up, UART_SCR);
 		serial_outp(up, UART_SCR, 0x5a);
 		status2 = serial_in(up, UART_SCR);
 		serial_outp(up, UART_SCR, scratch);
 		if ((status1 != 0xa5) || (status2 != 0x5a))
 			up->port.type = PORT_8250;
 	}
 	up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
 	if (up->port.type == PORT_UNKNOWN)
 		goto out;
 	up->type_probed = up->port.type;	/* XXX */
 	/*
 	 * Reset the UART.
 	 */
 #ifdef CONFIG_SERIAL_8250_RSA
 	if (up->port.type == PORT_RSA)
 		serial_outp(up, UART_RSA_FRR, 0);
 #endif
 	serial_outp(up, UART_MCR, save_mcr);
 	serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
 				     UART_FCR_CLEAR_RCVR |
 				     UART_FCR_CLEAR_XMIT));
 	serial_outp(up, UART_FCR, 0);
 	(void)serial_in(up, UART_RX);
 	serial_outp(up, UART_IER, 0);
 out:
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
 static struct uart_driver sunsu_reg = {
 	.owner			= THIS_MODULE,
 	.driver_name		= "sunsu",
 	.dev_name		= "ttyS",
 	.major			= TTY_MAJOR,
 };
 static int __devinit sunsu_kbd_ms_init(struct uart_sunsu_port *up)
 {
 	int quot, baud;
 #ifdef CONFIG_SERIO
 	struct serio *serio;
 #endif
 	if (up->su_type == SU_PORT_KBD) {
 		up->cflag = B1200 | CS8 | CLOCAL | CREAD;
 		baud = 1200;
 	} else {
 		up->cflag = B4800 | CS8 | CLOCAL | CREAD;
 		baud = 4800;
 	}
 	quot = up->port.uartclk / (16 * baud);
 	sunsu_autoconfig(up);
 	if (up->port.type == PORT_UNKNOWN)
 		return -ENODEV;
 	printk("%s: %s port at %llx, irq %u\n",
 	       to_of_device(up->port.dev)->dev.of_node->full_name,
 	       (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
 	       (unsigned long long) up->port.mapbase,
 	       up->port.irq);
 #ifdef CONFIG_SERIO
 	serio = &up->serio;
 	serio->port_data = up;
 	serio->id.type = SERIO_RS232;
 	if (up->su_type == SU_PORT_KBD) {
 		serio->id.proto = SERIO_SUNKBD;
 		strlcpy(serio->name, "sukbd", sizeof(serio->name));
 	} else {
 		serio->id.proto = SERIO_SUN;
 		serio->id.extra = 1;
 		strlcpy(serio->name, "sums", sizeof(serio->name));
 	}
 	strlcpy(serio->phys,
 		(!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
 		sizeof(serio->phys));
 	serio->write = sunsu_serio_write;
 	serio->open = sunsu_serio_open;
 	serio->close = sunsu_serio_close;
 	serio->dev.parent = up->port.dev;
 	serio_register_port(serio);
 #endif
 	sunsu_change_speed(&up->port, up->cflag, 0, quot);
 	sunsu_startup(&up->port);
 	return 0;
 }
 /*
  * ------------------------------------------------------------
  * Serial console driver
  * ------------------------------------------------------------
  */
 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
 /*
  *	Wait for transmitter & holding register to empty
  */
 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
 {
 	unsigned int status, tmout = 10000;
 	/* Wait up to 10ms for the character(s) to be sent. */
 	do {
 		status = serial_in(up, UART_LSR);
 		if (status & UART_LSR_BI)
 			up->lsr_break_flag = UART_LSR_BI;
 		if (--tmout == 0)
 			break;
 		udelay(1);
 	} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
 	/* Wait up to 1s for flow control if necessary */
 	if (up->port.flags & UPF_CONS_FLOW) {
 		tmout = 1000000;
 		while (--tmout &&
 		       ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
 			udelay(1);
 	}
 }
 static void sunsu_console_putchar(struct uart_port *port, int ch)
 {
 	struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
 	wait_for_xmitr(up);
 	serial_out(up, UART_TX, ch);
 }
 /*
  *	Print a string to the serial port trying not to disturb
  *	any possible real use of the port...
  */
 static void sunsu_console_write(struct console *co, const char *s,
 				unsigned int count)
 {
 	struct uart_sunsu_port *up = &sunsu_ports[co->index];
 	unsigned long flags;
 	unsigned int ier;
 	int locked = 1;
 	local_irq_save(flags);
 	if (up->port.sysrq) {
 		locked = 0;
 	} else if (oops_in_progress) {
 		locked = spin_trylock(&up->port.lock);
 	} else
 		spin_lock(&up->port.lock);
 	/*
 	 *	First save the UER then disable the interrupts
 	 */
 	ier = serial_in(up, UART_IER);
 	serial_out(up, UART_IER, 0);
 	uart_console_write(&up->port, s, count, sunsu_console_putchar);
 	/*
 	 *	Finally, wait for transmitter to become empty
 	 *	and restore the IER
 	 */
 	wait_for_xmitr(up);
 	serial_out(up, UART_IER, ier);
 	if (locked)
 		spin_unlock(&up->port.lock);
 	local_irq_restore(flags);
 }
 /*
  *	Setup initial baud/bits/parity. We do two things here:
  *	- construct a cflag setting for the first su_open()
  *	- initialize the serial port
  *	Return non-zero if we didn't find a serial port.
  */
 static int __init sunsu_console_setup(struct console *co, char *options)
 {
 	static struct ktermios dummy;
 	struct ktermios termios;
 	struct uart_port *port;
 	printk("Console: ttyS%d (SU)\n",
 	       (sunsu_reg.minor - 64) + co->index);
 	/*
 	 * Check whether an invalid uart number has been specified, and
 	 * if so, search for the first available port that does have
 	 * console support.
 	 */
 	if (co->index >= UART_NR)
 		co->index = 0;
 	port = &sunsu_ports[co->index].port;
 	/*
 	 * Temporary fix.
 	 */
 	spin_lock_init(&port->lock);
 	/* Get firmware console settings.  */
 	sunserial_console_termios(co, to_of_device(port->dev)->dev.of_node);
 	memset(&termios, 0, sizeof(struct ktermios));
 	termios.c_cflag = co->cflag;
 	port->mctrl |= TIOCM_DTR;
 	port->ops->set_termios(port, &termios, &dummy);
 	return 0;
 }
 static struct console sunsu_console = {
 	.name	=	"ttyS",
 	.write	=	sunsu_console_write,
 	.device	=	uart_console_device,
 	.setup	=	sunsu_console_setup,
 	.flags	=	CON_PRINTBUFFER,
 	.index	=	-1,
 	.data	=	&sunsu_reg,
 };
 /*
  *	Register console.
  */
 static inline struct console *SUNSU_CONSOLE(void)
 {
 	return &sunsu_console;
 }
 #else
 #define SUNSU_CONSOLE()			(NULL)
 #define sunsu_serial_console_init()	do { } while (0)
 #endif
 static enum su_type __devinit su_get_type(struct device_node *dp)
 {
 	struct device_node *ap = of_find_node_by_path("/aliases");
 	if (ap) {
 		const char *keyb = of_get_property(ap, "keyboard", NULL);
 		const char *ms = of_get_property(ap, "mouse", NULL);
 		if (keyb) {
 			if (dp == of_find_node_by_path(keyb))
 				return SU_PORT_KBD;
 		}
 		if (ms) {
 			if (dp == of_find_node_by_path(ms))
 				return SU_PORT_MS;
 		}
 	}
 	return SU_PORT_PORT;
 }
 static int __devinit su_probe(struct of_device *op, const struct of_device_id *match)
 {
 	static int inst;
 	struct device_node *dp = op->dev.of_node;
 	struct uart_sunsu_port *up;
 	struct resource *rp;
 	enum su_type type;
 	bool ignore_line;
 	int err;
 	type = su_get_type(dp);
 	if (type == SU_PORT_PORT) {
 		if (inst >= UART_NR)
 			return -EINVAL;
 		up = &sunsu_ports[inst];
 	} else {
 		up = kzalloc(sizeof(*up), GFP_KERNEL);
 		if (!up)
 			return -ENOMEM;
 	}
 	up->port.line = inst;
 	spin_lock_init(&up->port.lock);
 	up->su_type = type;
 	rp = &op->resource[0];
 	up->port.mapbase = rp->start;
 	up->reg_size = (rp->end - rp->start) + 1;
 	up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
 	if (!up->port.membase) {
 		if (type != SU_PORT_PORT)
 			kfree(up);
 		return -ENOMEM;
 	}
 	up->port.irq = op->irqs[0];
 	up->port.dev = &op->dev;
 	up->port.type = PORT_UNKNOWN;
 	up->port.uartclk = (SU_BASE_BAUD * 16);
 	err = 0;
 	if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
 		err = sunsu_kbd_ms_init(up);
 		if (err) {
 			of_iounmap(&op->resource[0],
 				   up->port.membase, up->reg_size);
 			kfree(up);
 			return err;
 		}
 		dev_set_drvdata(&op->dev, up);
 		return 0;
 	}
 	up->port.flags |= UPF_BOOT_AUTOCONF;
 	sunsu_autoconfig(up);
 	err = -ENODEV;
 	if (up->port.type == PORT_UNKNOWN)
 		goto out_unmap;
 	up->port.ops = &sunsu_pops;
 	ignore_line = false;
 	if (!strcmp(dp->name, "rsc-console") ||
 	    !strcmp(dp->name, "lom-console"))
 		ignore_line = true;
 	sunserial_console_match(SUNSU_CONSOLE(), dp,
 				&sunsu_reg, up->port.line,
 				ignore_line);
 	err = uart_add_one_port(&sunsu_reg, &up->port);
 	if (err)
 		goto out_unmap;
 	dev_set_drvdata(&op->dev, up);
 	inst++;
 	return 0;
 out_unmap:
 	of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
 	return err;
 }
 static int __devexit su_remove(struct of_device *op)
 {
 	struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
+	bool kbdms = false;
 	if (up->su_type == SU_PORT_MS ||
-	    up->su_type == SU_PORT_KBD) {
+	    up->su_type == SU_PORT_KBD)
+		kbdms = true;
+	if (kbdms) {
 #ifdef CONFIG_SERIO
 		serio_unregister_port(&up->serio);
 #endif
-		kfree(up);
+	} else if (up->port.type != PORT_UNKNOWN)
-	} else if (up->port.type != PORT_UNKNOWN) {
 		uart_remove_one_port(&sunsu_reg, &up->port);
-	}
 	if (up->port.membase)
 		of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
+	if (kbdms)
+		kfree(up);
 	dev_set_drvdata(&op->dev, NULL);
 	return 0;
 }
 static const struct of_device_id su_match[] = {
 	{
 		.name = "su",
 	},
 	{
 		.name = "su_pnp",
 	},
 	{
 		.name = "serial",
 		.compatible = "su",
 	},
 	{
 		.type = "serial",
 		.compatible = "su",
 	},
 	{},
 };
 MODULE_DEVICE_TABLE(of, su_match);
 static struct of_platform_driver su_driver = {
 	.driver = {
 		.name = "su",
 		.owner = THIS_MODULE,
 		.of_match_table = su_match,
 	},
 	.probe		= su_probe,
 	.remove		= __devexit_p(su_remove),
 };
 static int __init sunsu_init(void)
 {
 	struct device_node *dp;
 	int err;
 	int num_uart = 0;
 	for_each_node_by_name(dp, "su") {
 		if (su_get_type(dp) == SU_PORT_PORT)
 			num_uart++;
 	}
 	for_each_node_by_name(dp, "su_pnp") {
 		if (su_get_type(dp) == SU_PORT_PORT)
 			num_uart++;
 	}
 	for_each_node_by_name(dp, "serial") {
 		if (of_device_is_compatible(dp, "su")) {
 			if (su_get_type(dp) == SU_PORT_PORT)
 				num_uart++;
 		}
 	}
 	for_each_node_by_type(dp, "serial") {
 		if (of_device_is_compatible(dp, "su")) {
 			if (su_get_type(dp) == SU_PORT_PORT)
 				num_uart++;
 		}
 	}
 	if (num_uart) {
 		err = sunserial_register_minors(&sunsu_reg, num_uart);
 		if (err)
 			return err;
 	}
 	err = of_register_driver(&su_driver, &of_bus_type);
 	if (err && num_uart)
 		sunserial_unregister_minors(&sunsu_reg, num_uart);
 	return err;
 }
 static void __exit sunsu_exit(void)
 {
 	if (sunsu_reg.nr)
 		sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
 }
 module_init(sunsu_init);
 module_exit(sunsu_exit);
 MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
 MODULE_DESCRIPTION("Sun SU serial port driver");
 MODULE_VERSION("2.0");