Commit 985c0679dfa459a1deed31b999b26e4420786874

Authored by Marc Zyngier
Committed by Catalin Marinas
1 parent 257cb25192

arm64: Generic timers support

This patch adds support for the ARM generic timers with A64 instructions
for accessing the timer registers. It uses the physical counter as the
clock source and the virtual counter as sched_clock.

The timer frequency can be specified via DT or read from the CNTFRQ_EL0
register. The physical counter is also accessible from user space
allowing fast gettimeofday() implementation.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

Showing 7 changed files with 453 additions and 0 deletions Inline Diff

arch/arm64/include/asm/arm_generic.h
File was created 1 /*
2 * arch/arm64/include/asm/arm_generic.h
3 *
4 * Copyright (C) 2012 ARM Ltd.
5 * Author: Marc Zyngier <marc.zyngier@arm.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19 #ifndef __ASM_ARM_GENERIC_H
20 #define __ASM_ARM_GENERIC_H
21
22 #include <linux/clocksource.h>
23
24 #define ARCH_TIMER_CTRL_ENABLE (1 << 0)
25 #define ARCH_TIMER_CTRL_IMASK (1 << 1)
26 #define ARCH_TIMER_CTRL_ISTATUS (1 << 2)
27
28 #define ARCH_TIMER_REG_CTRL 0
29 #define ARCH_TIMER_REG_FREQ 1
30 #define ARCH_TIMER_REG_TVAL 2
31
32 static inline void arch_timer_reg_write(int reg, u32 val)
33 {
34 switch (reg) {
35 case ARCH_TIMER_REG_CTRL:
36 asm volatile("msr cntp_ctl_el0, %0" : : "r" (val));
37 break;
38 case ARCH_TIMER_REG_TVAL:
39 asm volatile("msr cntp_tval_el0, %0" : : "r" (val));
40 break;
41 default:
42 BUILD_BUG();
43 }
44
45 isb();
46 }
47
48 static inline u32 arch_timer_reg_read(int reg)
49 {
50 u32 val;
51
52 switch (reg) {
53 case ARCH_TIMER_REG_CTRL:
54 asm volatile("mrs %0, cntp_ctl_el0" : "=r" (val));
55 break;
56 case ARCH_TIMER_REG_FREQ:
57 asm volatile("mrs %0, cntfrq_el0" : "=r" (val));
58 break;
59 case ARCH_TIMER_REG_TVAL:
60 asm volatile("mrs %0, cntp_tval_el0" : "=r" (val));
61 break;
62 default:
63 BUILD_BUG();
64 }
65
66 return val;
67 }
68
69 static inline void __cpuinit arch_counter_enable_user_access(void)
70 {
71 u32 cntkctl;
72
73 /* Disable user access to the timers and the virtual counter. */
74 asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl));
75 cntkctl &= ~((3 << 8) | (1 << 1));
76
77 /* Enable user access to the physical counter and frequency. */
78 cntkctl |= 1;
79 asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl));
80 }
81
82 static inline cycle_t arch_counter_get_cntpct(void)
83 {
84 cycle_t cval;
85
86 asm volatile("mrs %0, cntpct_el0" : "=r" (cval));
87
88 return cval;
89 }
90
91 static inline cycle_t arch_counter_get_cntvct(void)
92 {
93 cycle_t cval;
94
95 asm volatile("mrs %0, cntvct_el0" : "=r" (cval));
96
97 return cval;
98 }
99
100 #endif
101
arch/arm64/include/asm/timex.h
File was created 1 /*
2 * Copyright (C) 2012 ARM Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16 #ifndef __ASM_TIMEX_H
17 #define __ASM_TIMEX_H
18
19 /*
20 * Use the current timer as a cycle counter since this is what we use for
21 * the delay loop.
22 */
23 #define get_cycles() ({ cycles_t c; read_current_timer(&c); c; })
24
25 #include <asm-generic/timex.h>
26
27 #define ARCH_HAS_READ_CURRENT_TIMER
28
29 #endif
30
arch/arm64/kernel/time.c
File was created 1 /*
2 * Based on arch/arm/kernel/time.c
3 *
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 * Modifications for ARM (C) 1994-2001 Russell King
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include <linux/export.h>
22 #include <linux/kernel.h>
23 #include <linux/interrupt.h>
24 #include <linux/time.h>
25 #include <linux/init.h>
26 #include <linux/sched.h>
27 #include <linux/smp.h>
28 #include <linux/timex.h>
29 #include <linux/errno.h>
30 #include <linux/profile.h>
31 #include <linux/syscore_ops.h>
32 #include <linux/timer.h>
33 #include <linux/irq.h>
34
35 #include <clocksource/arm_generic.h>
36
37 #include <asm/thread_info.h>
38 #include <asm/stacktrace.h>
39
40 #ifdef CONFIG_SMP
41 unsigned long profile_pc(struct pt_regs *regs)
42 {
43 struct stackframe frame;
44
45 if (!in_lock_functions(regs->pc))
46 return regs->pc;
47
48 frame.fp = regs->regs[29];
49 frame.sp = regs->sp;
50 frame.pc = regs->pc;
51 do {
52 int ret = unwind_frame(&frame);
53 if (ret < 0)
54 return 0;
55 } while (in_lock_functions(frame.pc));
56
57 return frame.pc;
58 }
59 EXPORT_SYMBOL(profile_pc);
60 #endif
61
62 void __init time_init(void)
63 {
64 arm_generic_timer_init();
65 }
66
drivers/clocksource/Kconfig
1 config CLKSRC_I8253 1 config CLKSRC_I8253
2 bool 2 bool
3 3
4 config CLKEVT_I8253 4 config CLKEVT_I8253
5 bool 5 bool
6 6
7 config I8253_LOCK 7 config I8253_LOCK
8 bool 8 bool
9 9
10 config CLKBLD_I8253 10 config CLKBLD_I8253
11 def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK 11 def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
12 12
13 config CLKSRC_MMIO 13 config CLKSRC_MMIO
14 bool 14 bool
15 15
16 config DW_APB_TIMER 16 config DW_APB_TIMER
17 bool 17 bool
18 18
19 config DW_APB_TIMER_OF 19 config DW_APB_TIMER_OF
20 bool 20 bool
21 21
22 config ARMADA_370_XP_TIMER 22 config ARMADA_370_XP_TIMER
23 bool 23 bool
24 24
25 config CLKSRC_DBX500_PRCMU 25 config CLKSRC_DBX500_PRCMU
26 bool "Clocksource PRCMU Timer" 26 bool "Clocksource PRCMU Timer"
27 depends on UX500_SOC_DB8500 27 depends on UX500_SOC_DB8500
28 default y 28 default y
29 help 29 help
30 Use the always on PRCMU Timer as clocksource 30 Use the always on PRCMU Timer as clocksource
31 31
32 config CLKSRC_DBX500_PRCMU_SCHED_CLOCK 32 config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
33 bool "Clocksource PRCMU Timer sched_clock" 33 bool "Clocksource PRCMU Timer sched_clock"
34 depends on (CLKSRC_DBX500_PRCMU && !NOMADIK_MTU_SCHED_CLOCK) 34 depends on (CLKSRC_DBX500_PRCMU && !NOMADIK_MTU_SCHED_CLOCK)
35 default y 35 default y
36 help 36 help
37 Use the always on PRCMU Timer as sched_clock 37 Use the always on PRCMU Timer as sched_clock
38
39 config CLKSRC_ARM_GENERIC
40 def_bool y if ARM64
41 help
42 This option enables support for the ARM generic timer.
38 43
drivers/clocksource/Makefile
1 obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o 1 obj-$(CONFIG_ATMEL_TCB_CLKSRC) += tcb_clksrc.o
2 obj-$(CONFIG_X86_CYCLONE_TIMER) += cyclone.o 2 obj-$(CONFIG_X86_CYCLONE_TIMER) += cyclone.o
3 obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o 3 obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o
4 obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o 4 obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o
5 obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += cs5535-clockevt.o 5 obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += cs5535-clockevt.o
6 obj-$(CONFIG_SH_TIMER_CMT) += sh_cmt.o 6 obj-$(CONFIG_SH_TIMER_CMT) += sh_cmt.o
7 obj-$(CONFIG_SH_TIMER_MTU2) += sh_mtu2.o 7 obj-$(CONFIG_SH_TIMER_MTU2) += sh_mtu2.o
8 obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o 8 obj-$(CONFIG_SH_TIMER_TMU) += sh_tmu.o
9 obj-$(CONFIG_EM_TIMER_STI) += em_sti.o 9 obj-$(CONFIG_EM_TIMER_STI) += em_sti.o
10 obj-$(CONFIG_CLKBLD_I8253) += i8253.o 10 obj-$(CONFIG_CLKBLD_I8253) += i8253.o
11 obj-$(CONFIG_CLKSRC_MMIO) += mmio.o 11 obj-$(CONFIG_CLKSRC_MMIO) += mmio.o
12 obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o 12 obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o
13 obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o 13 obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o
14 obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o 14 obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
15 obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o 15 obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o
16 obj-$(CONFIG_CLKSRC_ARM_GENERIC) += arm_generic.o
16 17
drivers/clocksource/arm_generic.c
File was created 1 /*
2 * Generic timers support
3 *
4 * Copyright (C) 2012 ARM Ltd.
5 * Author: Marc Zyngier <marc.zyngier@arm.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include <linux/init.h>
21 #include <linux/kernel.h>
22 #include <linux/delay.h>
23 #include <linux/device.h>
24 #include <linux/smp.h>
25 #include <linux/cpu.h>
26 #include <linux/jiffies.h>
27 #include <linux/interrupt.h>
28 #include <linux/clockchips.h>
29 #include <linux/of_irq.h>
30 #include <linux/io.h>
31
32 #include <clocksource/arm_generic.h>
33
34 #include <asm/arm_generic.h>
35
36 static u32 arch_timer_rate;
37 static u64 sched_clock_mult __read_mostly;
38 static DEFINE_PER_CPU(struct clock_event_device, arch_timer_evt);
39 static int arch_timer_ppi;
40
41 static irqreturn_t arch_timer_handle_irq(int irq, void *dev_id)
42 {
43 struct clock_event_device *evt = dev_id;
44 unsigned long ctrl;
45
46 ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);
47 if (ctrl & ARCH_TIMER_CTRL_ISTATUS) {
48 ctrl |= ARCH_TIMER_CTRL_IMASK;
49 arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);
50 evt->event_handler(evt);
51 return IRQ_HANDLED;
52 }
53
54 return IRQ_NONE;
55 }
56
57 static void arch_timer_stop(void)
58 {
59 unsigned long ctrl;
60
61 ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);
62 ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
63 arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);
64 }
65
66 static void arch_timer_set_mode(enum clock_event_mode mode,
67 struct clock_event_device *clk)
68 {
69 switch (mode) {
70 case CLOCK_EVT_MODE_UNUSED:
71 case CLOCK_EVT_MODE_SHUTDOWN:
72 arch_timer_stop();
73 break;
74 default:
75 break;
76 }
77 }
78
79 static int arch_timer_set_next_event(unsigned long evt,
80 struct clock_event_device *unused)
81 {
82 unsigned long ctrl;
83
84 ctrl = arch_timer_reg_read(ARCH_TIMER_REG_CTRL);
85 ctrl |= ARCH_TIMER_CTRL_ENABLE;
86 ctrl &= ~ARCH_TIMER_CTRL_IMASK;
87
88 arch_timer_reg_write(ARCH_TIMER_REG_TVAL, evt);
89 arch_timer_reg_write(ARCH_TIMER_REG_CTRL, ctrl);
90
91 return 0;
92 }
93
94 static void __cpuinit arch_timer_setup(struct clock_event_device *clk)
95 {
96 /* Let's make sure the timer is off before doing anything else */
97 arch_timer_stop();
98
99 clk->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP;
100 clk->name = "arch_sys_timer";
101 clk->rating = 400;
102 clk->set_mode = arch_timer_set_mode;
103 clk->set_next_event = arch_timer_set_next_event;
104 clk->irq = arch_timer_ppi;
105 clk->cpumask = cpumask_of(smp_processor_id());
106
107 clockevents_config_and_register(clk, arch_timer_rate,
108 0xf, 0x7fffffff);
109
110 enable_percpu_irq(clk->irq, 0);
111
112 /* Ensure the physical counter is visible to userspace for the vDSO. */
113 arch_counter_enable_user_access();
114 }
115
116 static void __init arch_timer_calibrate(void)
117 {
118 if (arch_timer_rate == 0) {
119 arch_timer_reg_write(ARCH_TIMER_REG_CTRL, 0);
120 arch_timer_rate = arch_timer_reg_read(ARCH_TIMER_REG_FREQ);
121
122 /* Check the timer frequency. */
123 if (arch_timer_rate == 0)
124 panic("Architected timer frequency is set to zero.\n"
125 "You must set this in your .dts file\n");
126 }
127
128 /* Cache the sched_clock multiplier to save a divide in the hot path. */
129
130 sched_clock_mult = NSEC_PER_SEC / arch_timer_rate;
131
132 pr_info("Architected local timer running at %u.%02uMHz.\n",
133 arch_timer_rate / 1000000, (arch_timer_rate / 10000) % 100);
134 }
135
136 static cycle_t arch_counter_read(struct clocksource *cs)
137 {
138 return arch_counter_get_cntpct();
139 }
140
141 static struct clocksource clocksource_counter = {
142 .name = "arch_sys_counter",
143 .rating = 400,
144 .read = arch_counter_read,
145 .mask = CLOCKSOURCE_MASK(56),
146 .flags = (CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_VALID_FOR_HRES),
147 };
148
149 int read_current_timer(unsigned long *timer_value)
150 {
151 *timer_value = arch_counter_get_cntpct();
152 return 0;
153 }
154
155 unsigned long long notrace sched_clock(void)
156 {
157 return arch_counter_get_cntvct() * sched_clock_mult;
158 }
159
160 static int __cpuinit arch_timer_cpu_notify(struct notifier_block *self,
161 unsigned long action, void *hcpu)
162 {
163 int cpu = (long)hcpu;
164 struct clock_event_device *clk = per_cpu_ptr(&arch_timer_evt, cpu);
165
166 switch(action) {
167 case CPU_STARTING:
168 case CPU_STARTING_FROZEN:
169 arch_timer_setup(clk);
170 break;
171
172 case CPU_DYING:
173 case CPU_DYING_FROZEN:
174 pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n",
175 clk->irq, cpu);
176 disable_percpu_irq(clk->irq);
177 arch_timer_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
178 break;
179 }
180
181 return NOTIFY_OK;
182 }
183
184 static struct notifier_block __cpuinitdata arch_timer_cpu_nb = {
185 .notifier_call = arch_timer_cpu_notify,
186 };
187
188 static const struct of_device_id arch_timer_of_match[] __initconst = {
189 { .compatible = "arm,armv8-timer" },
190 {},
191 };
192
193 int __init arm_generic_timer_init(void)
194 {
195 struct device_node *np;
196 int err;
197 u32 freq;
198
199 np = of_find_matching_node(NULL, arch_timer_of_match);
200 if (!np) {
201 pr_err("arch_timer: can't find DT node\n");
202 return -ENODEV;
203 }
204
205 /* Try to determine the frequency from the device tree or CNTFRQ */
206 if (!of_property_read_u32(np, "clock-frequency", &freq))
207 arch_timer_rate = freq;
208 arch_timer_calibrate();
209
210 arch_timer_ppi = irq_of_parse_and_map(np, 0);
211 pr_info("arch_timer: found %s irq %d\n", np->name, arch_timer_ppi);
212
213 err = request_percpu_irq(arch_timer_ppi, arch_timer_handle_irq,
214 np->name, &arch_timer_evt);
215 if (err) {
216 pr_err("arch_timer: can't register interrupt %d (%d)\n",
217 arch_timer_ppi, err);
218 return err;
219 }
220
221 clocksource_register_hz(&clocksource_counter, arch_timer_rate);
222
223 /* Calibrate the delay loop directly */
224 lpj_fine = arch_timer_rate / HZ;
225
226 /* Immediately configure the timer on the boot CPU */
227 arch_timer_setup(per_cpu_ptr(&arch_timer_evt, smp_processor_id()));
228
229 register_cpu_notifier(&arch_timer_cpu_nb);
230
231 return 0;
232 }
233
include/clocksource/arm_generic.h
File was created 1 /*
2 * Copyright (C) 2012 ARM Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16 #ifndef __CLKSOURCE_ARM_GENERIC_H
17 #define __CLKSOURCE_ARM_GENERIC_H
18
19 extern int arm_generic_timer_init(void);
20
21 #endif
22