Doug / smarc-fsl-linux-kernel

Download as
Browse Code ยป

Commit 991214386dee8a3cd9adc743778f472ac8a12bbc

Authored by Matt Porter
Committed by Greg Kroah-Hartman
1 parent 1790625feb
Exists in smarc-l5.0.0_1.0.0-ga and in 5 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga

parport: remove unused dead code from lowlevel drivers 

This unused code has been untouched for over 7 years and must
go.

Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Showing 5 changed files with 0 additions and 377 deletions Inline Diff

drivers/parport/parport_amiga.c
Diff comments   View file @ 9912143
1 /* Low-level parallel port routines for the Amiga built-in port 1 /* Low-level parallel port routines for the Amiga built-in port
2 * 2 *
3 * Author: Joerg Dorchain <joerg@dorchain.net> 3 * Author: Joerg Dorchain <joerg@dorchain.net>
4 * 4 *
5 * This is a complete rewrite of the code, but based heaviy upon the old 5 * This is a complete rewrite of the code, but based heaviy upon the old
6 * lp_intern. code. 6 * lp_intern. code.
7 * 7 *
8 * The built-in Amiga parallel port provides one port at a fixed address 8 * The built-in Amiga parallel port provides one port at a fixed address
9 * with 8 bidirectional data lines (D0 - D7) and 3 bidirectional status 9 * with 8 bidirectional data lines (D0 - D7) and 3 bidirectional status
10 * lines (BUSY, POUT, SEL), 1 output control line /STROBE (raised automatically 10 * lines (BUSY, POUT, SEL), 1 output control line /STROBE (raised automatically
11 * in hardware when the data register is accessed), and 1 input control line 11 * in hardware when the data register is accessed), and 1 input control line
12 * /ACK, able to cause an interrupt, but both not directly settable by 12 * /ACK, able to cause an interrupt, but both not directly settable by
13 * software. 13 * software.
14 */ 14 */
15 15
16 #include <linux/module.h> 16 #include <linux/module.h>
17 #include <linux/init.h> 17 #include <linux/init.h>
18 #include <linux/parport.h> 18 #include <linux/parport.h>
19 #include <linux/ioport.h> 19 #include <linux/ioport.h>
20 #include <linux/interrupt.h> 20 #include <linux/interrupt.h>
21 #include <linux/platform_device.h> 21 #include <linux/platform_device.h>
22 22
23 #include <asm/setup.h> 23 #include <asm/setup.h>
24 #include <asm/amigahw.h> 24 #include <asm/amigahw.h>
25 #include <asm/irq.h> 25 #include <asm/irq.h>
26 #include <asm/io.h> 26 #include <asm/io.h>
27 #include <asm/amigaints.h> 27 #include <asm/amigaints.h>
28 28
29 #undef DEBUG 29 #undef DEBUG
30 #ifdef DEBUG 30 #ifdef DEBUG
31 #define DPRINTK printk 31 #define DPRINTK printk
32 #else 32 #else
33 #define DPRINTK(x...) do { } while (0) 33 #define DPRINTK(x...) do { } while (0)
34 #endif 34 #endif
35 35
36 36
37 static void amiga_write_data(struct parport *p, unsigned char data) 37 static void amiga_write_data(struct parport *p, unsigned char data)
38 { 38 {
39 DPRINTK(KERN_DEBUG "write_data %c\n",data); 39 DPRINTK(KERN_DEBUG "write_data %c\n",data);
40 /* Triggers also /STROBE. This behavior cannot be changed */ 40 /* Triggers also /STROBE. This behavior cannot be changed */
41 ciaa.prb = data; 41 ciaa.prb = data;
42 mb(); 42 mb();
43 } 43 }
44 44
45 static unsigned char amiga_read_data(struct parport *p) 45 static unsigned char amiga_read_data(struct parport *p)
46 { 46 {
47 /* Triggers also /STROBE. This behavior cannot be changed */ 47 /* Triggers also /STROBE. This behavior cannot be changed */
48 return ciaa.prb; 48 return ciaa.prb;
49 } 49 }
50 50
51 #if 0
52 static unsigned char control_pc_to_amiga(unsigned char control)
53 {
54 unsigned char ret = 0;
55
56 if (control & PARPORT_CONTROL_SELECT) /* XXX: What is SELECP? */
57 ;
58 if (control & PARPORT_CONTROL_INIT) /* INITP */
59 /* reset connected to cpu reset pin */;
60 if (control & PARPORT_CONTROL_AUTOFD) /* AUTOLF */
61 /* Not connected */;
62 if (control & PARPORT_CONTROL_STROBE) /* Strobe */
63 /* Handled only directly by hardware */;
64 return ret;
65 }
66 #endif
67
68 static unsigned char control_amiga_to_pc(unsigned char control) 51 static unsigned char control_amiga_to_pc(unsigned char control)
69 { 52 {
70 return PARPORT_CONTROL_SELECT | 53 return PARPORT_CONTROL_SELECT |
71 PARPORT_CONTROL_AUTOFD | PARPORT_CONTROL_STROBE; 54 PARPORT_CONTROL_AUTOFD | PARPORT_CONTROL_STROBE;
72 /* fake value: interrupt enable, select in, no reset, 55 /* fake value: interrupt enable, select in, no reset,
73 no autolf, no strobe - seems to be closest the wiring diagram */ 56 no autolf, no strobe - seems to be closest the wiring diagram */
74 } 57 }
75 58
76 static void amiga_write_control(struct parport *p, unsigned char control) 59 static void amiga_write_control(struct parport *p, unsigned char control)
77 { 60 {
78 DPRINTK(KERN_DEBUG "write_control %02x\n",control); 61 DPRINTK(KERN_DEBUG "write_control %02x\n",control);
79 /* No implementation possible */ 62 /* No implementation possible */
80 } 63 }
81 64
82 static unsigned char amiga_read_control( struct parport *p) 65 static unsigned char amiga_read_control( struct parport *p)
83 { 66 {
84 DPRINTK(KERN_DEBUG "read_control \n"); 67 DPRINTK(KERN_DEBUG "read_control \n");
85 return control_amiga_to_pc(0); 68 return control_amiga_to_pc(0);
86 } 69 }
87 70
88 static unsigned char amiga_frob_control( struct parport *p, unsigned char mask, unsigned char val) 71 static unsigned char amiga_frob_control( struct parport *p, unsigned char mask, unsigned char val)
89 { 72 {
90 unsigned char old; 73 unsigned char old;
91 74
92 DPRINTK(KERN_DEBUG "frob_control mask %02x, value %02x\n",mask,val); 75 DPRINTK(KERN_DEBUG "frob_control mask %02x, value %02x\n",mask,val);
93 old = amiga_read_control(p); 76 old = amiga_read_control(p);
94 amiga_write_control(p, (old & ~mask) ^ val); 77 amiga_write_control(p, (old & ~mask) ^ val);
95 return old; 78 return old;
96 } 79 }
97
98 #if 0 /* currently unused */
99 static unsigned char status_pc_to_amiga(unsigned char status)
100 {
101 unsigned char ret = 1;
102
103 if (status & PARPORT_STATUS_BUSY) /* Busy */
104 ret &= ~1;
105 if (status & PARPORT_STATUS_ACK) /* Ack */
106 /* handled in hardware */;
107 if (status & PARPORT_STATUS_PAPEROUT) /* PaperOut */
108 ret |= 2;
109 if (status & PARPORT_STATUS_SELECT) /* select */
110 ret |= 4;
111 if (status & PARPORT_STATUS_ERROR) /* error */
112 /* not connected */;
113 return ret;
114 }
115 #endif
116 80
117 static unsigned char status_amiga_to_pc(unsigned char status) 81 static unsigned char status_amiga_to_pc(unsigned char status)
118 { 82 {
119 unsigned char ret = PARPORT_STATUS_BUSY | PARPORT_STATUS_ACK | PARPORT_STATUS_ERROR; 83 unsigned char ret = PARPORT_STATUS_BUSY | PARPORT_STATUS_ACK | PARPORT_STATUS_ERROR;
120 84
121 if (status & 1) /* Busy */ 85 if (status & 1) /* Busy */
122 ret &= ~PARPORT_STATUS_BUSY; 86 ret &= ~PARPORT_STATUS_BUSY;
123 if (status & 2) /* PaperOut */ 87 if (status & 2) /* PaperOut */
124 ret |= PARPORT_STATUS_PAPEROUT; 88 ret |= PARPORT_STATUS_PAPEROUT;
125 if (status & 4) /* Selected */ 89 if (status & 4) /* Selected */
126 ret |= PARPORT_STATUS_SELECT; 90 ret |= PARPORT_STATUS_SELECT;
127 /* the rest is not connected or handled autonomously in hardware */ 91 /* the rest is not connected or handled autonomously in hardware */
128 92
129 return ret; 93 return ret;
130 } 94 }
131 95
132 static unsigned char amiga_read_status(struct parport *p) 96 static unsigned char amiga_read_status(struct parport *p)
133 { 97 {
134 unsigned char status; 98 unsigned char status;
135 99
136 status = status_amiga_to_pc(ciab.pra & 7); 100 status = status_amiga_to_pc(ciab.pra & 7);
137 DPRINTK(KERN_DEBUG "read_status %02x\n", status); 101 DPRINTK(KERN_DEBUG "read_status %02x\n", status);
138 return status; 102 return status;
139 } 103 }
140 104
141 static void amiga_enable_irq(struct parport *p) 105 static void amiga_enable_irq(struct parport *p)
142 { 106 {
143 enable_irq(IRQ_AMIGA_CIAA_FLG); 107 enable_irq(IRQ_AMIGA_CIAA_FLG);
144 } 108 }
145 109
146 static void amiga_disable_irq(struct parport *p) 110 static void amiga_disable_irq(struct parport *p)
147 { 111 {
148 disable_irq(IRQ_AMIGA_CIAA_FLG); 112 disable_irq(IRQ_AMIGA_CIAA_FLG);
149 } 113 }
150 114
151 static void amiga_data_forward(struct parport *p) 115 static void amiga_data_forward(struct parport *p)
152 { 116 {
153 DPRINTK(KERN_DEBUG "forward\n"); 117 DPRINTK(KERN_DEBUG "forward\n");
154 ciaa.ddrb = 0xff; /* all pins output */ 118 ciaa.ddrb = 0xff; /* all pins output */
155 mb(); 119 mb();
156 } 120 }
157 121
158 static void amiga_data_reverse(struct parport *p) 122 static void amiga_data_reverse(struct parport *p)
159 { 123 {
160 DPRINTK(KERN_DEBUG "reverse\n"); 124 DPRINTK(KERN_DEBUG "reverse\n");
161 ciaa.ddrb = 0; /* all pins input */ 125 ciaa.ddrb = 0; /* all pins input */
162 mb(); 126 mb();
163 } 127 }
164 128
165 static void amiga_init_state(struct pardevice *dev, struct parport_state *s) 129 static void amiga_init_state(struct pardevice *dev, struct parport_state *s)
166 { 130 {
167 s->u.amiga.data = 0; 131 s->u.amiga.data = 0;
168 s->u.amiga.datadir = 255; 132 s->u.amiga.datadir = 255;
169 s->u.amiga.status = 0; 133 s->u.amiga.status = 0;
170 s->u.amiga.statusdir = 0; 134 s->u.amiga.statusdir = 0;
171 } 135 }
172 136
173 static void amiga_save_state(struct parport *p, struct parport_state *s) 137 static void amiga_save_state(struct parport *p, struct parport_state *s)
174 { 138 {
175 mb(); 139 mb();
176 s->u.amiga.data = ciaa.prb; 140 s->u.amiga.data = ciaa.prb;
177 s->u.amiga.datadir = ciaa.ddrb; 141 s->u.amiga.datadir = ciaa.ddrb;
178 s->u.amiga.status = ciab.pra & 7; 142 s->u.amiga.status = ciab.pra & 7;
179 s->u.amiga.statusdir = ciab.ddra & 7; 143 s->u.amiga.statusdir = ciab.ddra & 7;
180 mb(); 144 mb();
181 } 145 }
182 146
183 static void amiga_restore_state(struct parport *p, struct parport_state *s) 147 static void amiga_restore_state(struct parport *p, struct parport_state *s)
184 { 148 {
185 mb(); 149 mb();
186 ciaa.prb = s->u.amiga.data; 150 ciaa.prb = s->u.amiga.data;
187 ciaa.ddrb = s->u.amiga.datadir; 151 ciaa.ddrb = s->u.amiga.datadir;
188 ciab.pra |= (ciab.pra & 0xf8) | s->u.amiga.status; 152 ciab.pra |= (ciab.pra & 0xf8) | s->u.amiga.status;
189 ciab.ddra |= (ciab.ddra & 0xf8) | s->u.amiga.statusdir; 153 ciab.ddra |= (ciab.ddra & 0xf8) | s->u.amiga.statusdir;
190 mb(); 154 mb();
191 } 155 }
192 156
193 static struct parport_operations pp_amiga_ops = { 157 static struct parport_operations pp_amiga_ops = {
194 .write_data = amiga_write_data, 158 .write_data = amiga_write_data,
195 .read_data = amiga_read_data, 159 .read_data = amiga_read_data,
196 160
197 .write_control = amiga_write_control, 161 .write_control = amiga_write_control,
198 .read_control = amiga_read_control, 162 .read_control = amiga_read_control,
199 .frob_control = amiga_frob_control, 163 .frob_control = amiga_frob_control,
200 164
201 .read_status = amiga_read_status, 165 .read_status = amiga_read_status,
202 166
203 .enable_irq = amiga_enable_irq, 167 .enable_irq = amiga_enable_irq,
204 .disable_irq = amiga_disable_irq, 168 .disable_irq = amiga_disable_irq,
205 169
206 .data_forward = amiga_data_forward, 170 .data_forward = amiga_data_forward,
207 .data_reverse = amiga_data_reverse, 171 .data_reverse = amiga_data_reverse,
208 172
209 .init_state = amiga_init_state, 173 .init_state = amiga_init_state,
210 .save_state = amiga_save_state, 174 .save_state = amiga_save_state,
211 .restore_state = amiga_restore_state, 175 .restore_state = amiga_restore_state,
212 176
213 .epp_write_data = parport_ieee1284_epp_write_data, 177 .epp_write_data = parport_ieee1284_epp_write_data,
214 .epp_read_data = parport_ieee1284_epp_read_data, 178 .epp_read_data = parport_ieee1284_epp_read_data,
215 .epp_write_addr = parport_ieee1284_epp_write_addr, 179 .epp_write_addr = parport_ieee1284_epp_write_addr,
216 .epp_read_addr = parport_ieee1284_epp_read_addr, 180 .epp_read_addr = parport_ieee1284_epp_read_addr,
217 181
218 .ecp_write_data = parport_ieee1284_ecp_write_data, 182 .ecp_write_data = parport_ieee1284_ecp_write_data,
219 .ecp_read_data = parport_ieee1284_ecp_read_data, 183 .ecp_read_data = parport_ieee1284_ecp_read_data,
220 .ecp_write_addr = parport_ieee1284_ecp_write_addr, 184 .ecp_write_addr = parport_ieee1284_ecp_write_addr,
221 185
222 .compat_write_data = parport_ieee1284_write_compat, 186 .compat_write_data = parport_ieee1284_write_compat,
223 .nibble_read_data = parport_ieee1284_read_nibble, 187 .nibble_read_data = parport_ieee1284_read_nibble,
224 .byte_read_data = parport_ieee1284_read_byte, 188 .byte_read_data = parport_ieee1284_read_byte,
225 189
226 .owner = THIS_MODULE, 190 .owner = THIS_MODULE,
227 }; 191 };
228 192
229 /* ----------- Initialisation code --------------------------------- */ 193 /* ----------- Initialisation code --------------------------------- */
230 194
231 static int __init amiga_parallel_probe(struct platform_device *pdev) 195 static int __init amiga_parallel_probe(struct platform_device *pdev)
232 { 196 {
233 struct parport *p; 197 struct parport *p;
234 int err; 198 int err;
235 199
236 ciaa.ddrb = 0xff; 200 ciaa.ddrb = 0xff;
237 ciab.ddra &= 0xf8; 201 ciab.ddra &= 0xf8;
238 mb(); 202 mb();
239 203
240 p = parport_register_port((unsigned long)&ciaa.prb, IRQ_AMIGA_CIAA_FLG, 204 p = parport_register_port((unsigned long)&ciaa.prb, IRQ_AMIGA_CIAA_FLG,
241 PARPORT_DMA_NONE, &pp_amiga_ops); 205 PARPORT_DMA_NONE, &pp_amiga_ops);
242 if (!p) 206 if (!p)
243 return -EBUSY; 207 return -EBUSY;
244 208
245 err = request_irq(IRQ_AMIGA_CIAA_FLG, parport_irq_handler, 0, p->name, 209 err = request_irq(IRQ_AMIGA_CIAA_FLG, parport_irq_handler, 0, p->name,
246 p); 210 p);
247 if (err) 211 if (err)
248 goto out_irq; 212 goto out_irq;
249 213
250 printk(KERN_INFO "%s: Amiga built-in port using irq\n", p->name); 214 printk(KERN_INFO "%s: Amiga built-in port using irq\n", p->name);
251 /* XXX: set operating mode */ 215 /* XXX: set operating mode */
252 parport_announce_port(p); 216 parport_announce_port(p);
253 217
254 platform_set_drvdata(pdev, p); 218 platform_set_drvdata(pdev, p);
255 219
256 return 0; 220 return 0;
257 221
258 out_irq: 222 out_irq:
259 parport_put_port(p); 223 parport_put_port(p);
260 return err; 224 return err;
261 } 225 }
262 226
263 static int __exit amiga_parallel_remove(struct platform_device *pdev) 227 static int __exit amiga_parallel_remove(struct platform_device *pdev)
264 { 228 {
265 struct parport *port = platform_get_drvdata(pdev); 229 struct parport *port = platform_get_drvdata(pdev);
266 230
267 parport_remove_port(port); 231 parport_remove_port(port);
268 if (port->irq != PARPORT_IRQ_NONE) 232 if (port->irq != PARPORT_IRQ_NONE)
269 free_irq(IRQ_AMIGA_CIAA_FLG, port); 233 free_irq(IRQ_AMIGA_CIAA_FLG, port);
270 parport_put_port(port); 234 parport_put_port(port);
271 platform_set_drvdata(pdev, NULL); 235 platform_set_drvdata(pdev, NULL);
272 return 0; 236 return 0;
273 } 237 }
274 238
275 static struct platform_driver amiga_parallel_driver = { 239 static struct platform_driver amiga_parallel_driver = {
276 .remove = __exit_p(amiga_parallel_remove), 240 .remove = __exit_p(amiga_parallel_remove),
277 .driver = { 241 .driver = {
278 .name = "amiga-parallel", 242 .name = "amiga-parallel",
279 .owner = THIS_MODULE, 243 .owner = THIS_MODULE,
280 }, 244 },
281 }; 245 };
282 246
283 static int __init amiga_parallel_init(void) 247 static int __init amiga_parallel_init(void)
284 { 248 {
285 return platform_driver_probe(&amiga_parallel_driver, 249 return platform_driver_probe(&amiga_parallel_driver,
286 amiga_parallel_probe); 250 amiga_parallel_probe);
287 } 251 }
288 252
289 module_init(amiga_parallel_init); 253 module_init(amiga_parallel_init);
290 254
291 static void __exit amiga_parallel_exit(void) 255 static void __exit amiga_parallel_exit(void)
292 { 256 {
293 platform_driver_unregister(&amiga_parallel_driver); 257 platform_driver_unregister(&amiga_parallel_driver);
294 } 258 }
295 259
296 module_exit(amiga_parallel_exit); 260 module_exit(amiga_parallel_exit);
297 261
298 MODULE_AUTHOR("Joerg Dorchain <joerg@dorchain.net>"); 262 MODULE_AUTHOR("Joerg Dorchain <joerg@dorchain.net>");
299 MODULE_DESCRIPTION("Parport Driver for Amiga builtin Port"); 263 MODULE_DESCRIPTION("Parport Driver for Amiga builtin Port");
300 MODULE_SUPPORTED_DEVICE("Amiga builtin Parallel Port"); 264 MODULE_SUPPORTED_DEVICE("Amiga builtin Parallel Port");
301 MODULE_LICENSE("GPL"); 265 MODULE_LICENSE("GPL");
302 MODULE_ALIAS("platform:amiga-parallel"); 266 MODULE_ALIAS("platform:amiga-parallel");
303 267
drivers/parport/parport_atari.c
Diff comments   View file @ 9912143
1 /* Low-level parallel port routines for the Atari builtin port 1 /* Low-level parallel port routines for the Atari builtin port
2 * 2 *
3 * Author: Andreas Schwab <schwab@issan.informatik.uni-dortmund.de> 3 * Author: Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
4 * 4 *
5 * Based on parport_amiga.c. 5 * Based on parport_amiga.c.
6 * 6 *
7 * The built-in Atari parallel port provides one port at a fixed address 7 * The built-in Atari parallel port provides one port at a fixed address
8 * with 8 output data lines (D0 - D7), 1 output control line (STROBE) 8 * with 8 output data lines (D0 - D7), 1 output control line (STROBE)
9 * and 1 input status line (BUSY) able to cause an interrupt. 9 * and 1 input status line (BUSY) able to cause an interrupt.
10 */ 10 */
11 11
12 #include <linux/module.h> 12 #include <linux/module.h>
13 #include <linux/init.h> 13 #include <linux/init.h>
14 #include <linux/parport.h> 14 #include <linux/parport.h>
15 #include <linux/interrupt.h> 15 #include <linux/interrupt.h>
16 #include <asm/setup.h> 16 #include <asm/setup.h>
17 #include <asm/atarihw.h> 17 #include <asm/atarihw.h>
18 #include <asm/irq.h> 18 #include <asm/irq.h>
19 #include <asm/atariints.h> 19 #include <asm/atariints.h>
20 20
21 static struct parport *this_port = NULL; 21 static struct parport *this_port = NULL;
22 22
23 static unsigned char 23 static unsigned char
24 parport_atari_read_data(struct parport *p) 24 parport_atari_read_data(struct parport *p)
25 { 25 {
26 unsigned long flags; 26 unsigned long flags;
27 unsigned char data; 27 unsigned char data;
28 28
29 local_irq_save(flags); 29 local_irq_save(flags);
30 sound_ym.rd_data_reg_sel = 15; 30 sound_ym.rd_data_reg_sel = 15;
31 data = sound_ym.rd_data_reg_sel; 31 data = sound_ym.rd_data_reg_sel;
32 local_irq_restore(flags); 32 local_irq_restore(flags);
33 return data; 33 return data;
34 } 34 }
35 35
36 static void 36 static void
37 parport_atari_write_data(struct parport *p, unsigned char data) 37 parport_atari_write_data(struct parport *p, unsigned char data)
38 { 38 {
39 unsigned long flags; 39 unsigned long flags;
40 40
41 local_irq_save(flags); 41 local_irq_save(flags);
42 sound_ym.rd_data_reg_sel = 15; 42 sound_ym.rd_data_reg_sel = 15;
43 sound_ym.wd_data = data; 43 sound_ym.wd_data = data;
44 local_irq_restore(flags); 44 local_irq_restore(flags);
45 } 45 }
46 46
47 static unsigned char 47 static unsigned char
48 parport_atari_read_control(struct parport *p) 48 parport_atari_read_control(struct parport *p)
49 { 49 {
50 unsigned long flags; 50 unsigned long flags;
51 unsigned char control = 0; 51 unsigned char control = 0;
52 52
53 local_irq_save(flags); 53 local_irq_save(flags);
54 sound_ym.rd_data_reg_sel = 14; 54 sound_ym.rd_data_reg_sel = 14;
55 if (!(sound_ym.rd_data_reg_sel & (1 << 5))) 55 if (!(sound_ym.rd_data_reg_sel & (1 << 5)))
56 control = PARPORT_CONTROL_STROBE; 56 control = PARPORT_CONTROL_STROBE;
57 local_irq_restore(flags); 57 local_irq_restore(flags);
58 return control; 58 return control;
59 } 59 }
60 60
61 static void 61 static void
62 parport_atari_write_control(struct parport *p, unsigned char control) 62 parport_atari_write_control(struct parport *p, unsigned char control)
63 { 63 {
64 unsigned long flags; 64 unsigned long flags;
65 65
66 local_irq_save(flags); 66 local_irq_save(flags);
67 sound_ym.rd_data_reg_sel = 14; 67 sound_ym.rd_data_reg_sel = 14;
68 if (control & PARPORT_CONTROL_STROBE) 68 if (control & PARPORT_CONTROL_STROBE)
69 sound_ym.wd_data = sound_ym.rd_data_reg_sel & ~(1 << 5); 69 sound_ym.wd_data = sound_ym.rd_data_reg_sel & ~(1 << 5);
70 else 70 else
71 sound_ym.wd_data = sound_ym.rd_data_reg_sel | (1 << 5); 71 sound_ym.wd_data = sound_ym.rd_data_reg_sel | (1 << 5);
72 local_irq_restore(flags); 72 local_irq_restore(flags);
73 } 73 }
74 74
75 static unsigned char 75 static unsigned char
76 parport_atari_frob_control(struct parport *p, unsigned char mask, 76 parport_atari_frob_control(struct parport *p, unsigned char mask,
77 unsigned char val) 77 unsigned char val)
78 { 78 {
79 unsigned char old = parport_atari_read_control(p); 79 unsigned char old = parport_atari_read_control(p);
80 parport_atari_write_control(p, (old & ~mask) ^ val); 80 parport_atari_write_control(p, (old & ~mask) ^ val);
81 return old; 81 return old;
82 } 82 }
83 83
84 static unsigned char 84 static unsigned char
85 parport_atari_read_status(struct parport *p) 85 parport_atari_read_status(struct parport *p)
86 { 86 {
87 return ((st_mfp.par_dt_reg & 1 ? 0 : PARPORT_STATUS_BUSY) | 87 return ((st_mfp.par_dt_reg & 1 ? 0 : PARPORT_STATUS_BUSY) |
88 PARPORT_STATUS_SELECT | PARPORT_STATUS_ERROR); 88 PARPORT_STATUS_SELECT | PARPORT_STATUS_ERROR);
89 } 89 }
90 90
91 static void 91 static void
92 parport_atari_init_state(struct pardevice *d, struct parport_state *s) 92 parport_atari_init_state(struct pardevice *d, struct parport_state *s)
93 { 93 {
94 } 94 }
95 95
96 static void 96 static void
97 parport_atari_save_state(struct parport *p, struct parport_state *s) 97 parport_atari_save_state(struct parport *p, struct parport_state *s)
98 { 98 {
99 } 99 }
100 100
101 static void 101 static void
102 parport_atari_restore_state(struct parport *p, struct parport_state *s) 102 parport_atari_restore_state(struct parport *p, struct parport_state *s)
103 { 103 {
104 } 104 }
105 105
106 static void 106 static void
107 parport_atari_enable_irq(struct parport *p) 107 parport_atari_enable_irq(struct parport *p)
108 { 108 {
109 enable_irq(IRQ_MFP_BUSY); 109 enable_irq(IRQ_MFP_BUSY);
110 } 110 }
111 111
112 static void 112 static void
113 parport_atari_disable_irq(struct parport *p) 113 parport_atari_disable_irq(struct parport *p)
114 { 114 {
115 disable_irq(IRQ_MFP_BUSY); 115 disable_irq(IRQ_MFP_BUSY);
116 } 116 }
117 117
118 static void 118 static void
119 parport_atari_data_forward(struct parport *p) 119 parport_atari_data_forward(struct parport *p)
120 { 120 {
121 unsigned long flags; 121 unsigned long flags;
122 122
123 local_irq_save(flags); 123 local_irq_save(flags);
124 /* Soundchip port B as output. */ 124 /* Soundchip port B as output. */
125 sound_ym.rd_data_reg_sel = 7; 125 sound_ym.rd_data_reg_sel = 7;
126 sound_ym.wd_data = sound_ym.rd_data_reg_sel | 0x40; 126 sound_ym.wd_data = sound_ym.rd_data_reg_sel | 0x40;
127 local_irq_restore(flags); 127 local_irq_restore(flags);
128 } 128 }
129 129
130 static void 130 static void
131 parport_atari_data_reverse(struct parport *p) 131 parport_atari_data_reverse(struct parport *p)
132 { 132 {
133 #if 0 /* too dangerous, can kill sound chip */
134 unsigned long flags;
135
136 local_irq_save(flags);
137 /* Soundchip port B as input. */
138 sound_ym.rd_data_reg_sel = 7;
139 sound_ym.wd_data = sound_ym.rd_data_reg_sel & ~0x40;
140 local_irq_restore(flags);
141 #endif
142 } 133 }
143 134
144 static struct parport_operations parport_atari_ops = { 135 static struct parport_operations parport_atari_ops = {
145 .write_data = parport_atari_write_data, 136 .write_data = parport_atari_write_data,
146 .read_data = parport_atari_read_data, 137 .read_data = parport_atari_read_data,
147 138
148 .write_control = parport_atari_write_control, 139 .write_control = parport_atari_write_control,
149 .read_control = parport_atari_read_control, 140 .read_control = parport_atari_read_control,
150 .frob_control = parport_atari_frob_control, 141 .frob_control = parport_atari_frob_control,
151 142
152 .read_status = parport_atari_read_status, 143 .read_status = parport_atari_read_status,
153 144
154 .enable_irq = parport_atari_enable_irq, 145 .enable_irq = parport_atari_enable_irq,
155 .disable_irq = parport_atari_disable_irq, 146 .disable_irq = parport_atari_disable_irq,
156 147
157 .data_forward = parport_atari_data_forward, 148 .data_forward = parport_atari_data_forward,
158 .data_reverse = parport_atari_data_reverse, 149 .data_reverse = parport_atari_data_reverse,
159 150
160 .init_state = parport_atari_init_state, 151 .init_state = parport_atari_init_state,
161 .save_state = parport_atari_save_state, 152 .save_state = parport_atari_save_state,
162 .restore_state = parport_atari_restore_state, 153 .restore_state = parport_atari_restore_state,
163 154
164 .epp_write_data = parport_ieee1284_epp_write_data, 155 .epp_write_data = parport_ieee1284_epp_write_data,
165 .epp_read_data = parport_ieee1284_epp_read_data, 156 .epp_read_data = parport_ieee1284_epp_read_data,
166 .epp_write_addr = parport_ieee1284_epp_write_addr, 157 .epp_write_addr = parport_ieee1284_epp_write_addr,
167 .epp_read_addr = parport_ieee1284_epp_read_addr, 158 .epp_read_addr = parport_ieee1284_epp_read_addr,
168 159
169 .ecp_write_data = parport_ieee1284_ecp_write_data, 160 .ecp_write_data = parport_ieee1284_ecp_write_data,
170 .ecp_read_data = parport_ieee1284_ecp_read_data, 161 .ecp_read_data = parport_ieee1284_ecp_read_data,
171 .ecp_write_addr = parport_ieee1284_ecp_write_addr, 162 .ecp_write_addr = parport_ieee1284_ecp_write_addr,
172 163
173 .compat_write_data = parport_ieee1284_write_compat, 164 .compat_write_data = parport_ieee1284_write_compat,
174 .nibble_read_data = parport_ieee1284_read_nibble, 165 .nibble_read_data = parport_ieee1284_read_nibble,
175 .byte_read_data = parport_ieee1284_read_byte, 166 .byte_read_data = parport_ieee1284_read_byte,
176 167
177 .owner = THIS_MODULE, 168 .owner = THIS_MODULE,
178 }; 169 };
179 170
180 171
181 static int __init parport_atari_init(void) 172 static int __init parport_atari_init(void)
182 { 173 {
183 struct parport *p; 174 struct parport *p;
184 unsigned long flags; 175 unsigned long flags;
185 176
186 if (MACH_IS_ATARI) { 177 if (MACH_IS_ATARI) {
187 local_irq_save(flags); 178 local_irq_save(flags);
188 /* Soundchip port A/B as output. */ 179 /* Soundchip port A/B as output. */
189 sound_ym.rd_data_reg_sel = 7; 180 sound_ym.rd_data_reg_sel = 7;
190 sound_ym.wd_data = (sound_ym.rd_data_reg_sel & 0x3f) | 0xc0; 181 sound_ym.wd_data = (sound_ym.rd_data_reg_sel & 0x3f) | 0xc0;
191 /* STROBE high. */ 182 /* STROBE high. */
192 sound_ym.rd_data_reg_sel = 14; 183 sound_ym.rd_data_reg_sel = 14;
193 sound_ym.wd_data = sound_ym.rd_data_reg_sel | (1 << 5); 184 sound_ym.wd_data = sound_ym.rd_data_reg_sel | (1 << 5);
194 local_irq_restore(flags); 185 local_irq_restore(flags);
195 /* MFP port I0 as input. */ 186 /* MFP port I0 as input. */
196 st_mfp.data_dir &= ~1; 187 st_mfp.data_dir &= ~1;
197 /* MFP port I0 interrupt on high->low edge. */ 188 /* MFP port I0 interrupt on high->low edge. */
198 st_mfp.active_edge &= ~1; 189 st_mfp.active_edge &= ~1;
199 p = parport_register_port((unsigned long)&sound_ym.wd_data, 190 p = parport_register_port((unsigned long)&sound_ym.wd_data,
200 IRQ_MFP_BUSY, PARPORT_DMA_NONE, 191 IRQ_MFP_BUSY, PARPORT_DMA_NONE,
201 &parport_atari_ops); 192 &parport_atari_ops);
202 if (!p) 193 if (!p)
203 return -ENODEV; 194 return -ENODEV;
204 if (request_irq(IRQ_MFP_BUSY, parport_irq_handler, 195 if (request_irq(IRQ_MFP_BUSY, parport_irq_handler,
205 IRQ_TYPE_SLOW, p->name, p)) { 196 IRQ_TYPE_SLOW, p->name, p)) {
206 parport_put_port (p); 197 parport_put_port (p);
207 return -ENODEV; 198 return -ENODEV;
208 } 199 }
209 200
210 this_port = p; 201 this_port = p;
211 printk(KERN_INFO "%s: Atari built-in port using irq\n", p->name); 202 printk(KERN_INFO "%s: Atari built-in port using irq\n", p->name);
212 parport_announce_port (p); 203 parport_announce_port (p);
213 204
214 return 0; 205 return 0;
215 } 206 }
216 return -ENODEV; 207 return -ENODEV;
217 } 208 }
218 209
219 static void __exit parport_atari_exit(void) 210 static void __exit parport_atari_exit(void)
220 { 211 {
221 parport_remove_port(this_port); 212 parport_remove_port(this_port);
222 if (this_port->irq != PARPORT_IRQ_NONE) 213 if (this_port->irq != PARPORT_IRQ_NONE)
223 free_irq(IRQ_MFP_BUSY, this_port); 214 free_irq(IRQ_MFP_BUSY, this_port);
224 parport_put_port(this_port); 215 parport_put_port(this_port);
225 } 216 }
226 217
227 MODULE_AUTHOR("Andreas Schwab"); 218 MODULE_AUTHOR("Andreas Schwab");
228 MODULE_DESCRIPTION("Parport Driver for Atari builtin Port"); 219 MODULE_DESCRIPTION("Parport Driver for Atari builtin Port");
229 MODULE_SUPPORTED_DEVICE("Atari builtin Parallel Port"); 220 MODULE_SUPPORTED_DEVICE("Atari builtin Parallel Port");
230 MODULE_LICENSE("GPL"); 221 MODULE_LICENSE("GPL");
231 222
232 module_init(parport_atari_init) 223 module_init(parport_atari_init)
233 module_exit(parport_atari_exit) 224 module_exit(parport_atari_exit)
234 225
drivers/parport/parport_mfc3.c
Diff comments   View file @ 9912143
1 /* Low-level parallel port routines for the Multiface 3 card 1 /* Low-level parallel port routines for the Multiface 3 card
2 * 2 *
3 * Author: Joerg Dorchain <joerg@dorchain.net> 3 * Author: Joerg Dorchain <joerg@dorchain.net>
4 * 4 *
5 * (C) The elitist m68k Users(TM) 5 * (C) The elitist m68k Users(TM)
6 * 6 *
7 * based on the existing parport_amiga and lp_mfc 7 * based on the existing parport_amiga and lp_mfc
8 * 8 *
9 * 9 *
10 * From the MFC3 documentation: 10 * From the MFC3 documentation:
11 * 11 *
12 * Miscellaneous PIA Details 12 * Miscellaneous PIA Details
13 * ------------------------- 13 * -------------------------
14 * 14 *
15 * The two open-drain interrupt outputs /IRQA and /IRQB are routed to 15 * The two open-drain interrupt outputs /IRQA and /IRQB are routed to
16 * /INT2 of the Z2 bus. 16 * /INT2 of the Z2 bus.
17 * 17 *
18 * The CPU data bus of the PIA (D0-D7) is connected to D8-D15 on the Z2 18 * The CPU data bus of the PIA (D0-D7) is connected to D8-D15 on the Z2
19 * bus. This means that any PIA registers are accessed at even addresses. 19 * bus. This means that any PIA registers are accessed at even addresses.
20 * 20 *
21 * Centronics Pin Connections for the PIA 21 * Centronics Pin Connections for the PIA
22 * -------------------------------------- 22 * --------------------------------------
23 * 23 *
24 * The following table shows the connections between the PIA and the 24 * The following table shows the connections between the PIA and the
25 * Centronics interface connector. These connections implement a single, but 25 * Centronics interface connector. These connections implement a single, but
26 * very complete, Centronics type interface. The Pin column gives the pin 26 * very complete, Centronics type interface. The Pin column gives the pin
27 * numbers of the PIA. The Centronics pin numbers can be found in the section 27 * numbers of the PIA. The Centronics pin numbers can be found in the section
28 * "Parallel Connectors". 28 * "Parallel Connectors".
29 * 29 *
30 * 30 *
31 * Pin | PIA | Dir | Centronics Names 31 * Pin | PIA | Dir | Centronics Names
32 * -------+-----+-----+--------------------------------------------------------- 32 * -------+-----+-----+---------------------------------------------------------
33 * 19 | CB2 | --> | /STROBE (aka /DRDY) 33 * 19 | CB2 | --> | /STROBE (aka /DRDY)
34 * 10-17 | PBx | <-> | DATA0 - DATA7 34 * 10-17 | PBx | <-> | DATA0 - DATA7
35 * 18 | CB1 | <-- | /ACK 35 * 18 | CB1 | <-- | /ACK
36 * 40 | CA1 | <-- | BUSY 36 * 40 | CA1 | <-- | BUSY
37 * 3 | PA1 | <-- | PAPER-OUT (aka POUT) 37 * 3 | PA1 | <-- | PAPER-OUT (aka POUT)
38 * 4 | PA2 | <-- | SELECTED (aka SEL) 38 * 4 | PA2 | <-- | SELECTED (aka SEL)
39 * 9 | PA7 | --> | /INIT (aka /RESET or /INPUT-PRIME) 39 * 9 | PA7 | --> | /INIT (aka /RESET or /INPUT-PRIME)
40 * 6 | PA4 | <-- | /ERROR (aka /FAULT) 40 * 6 | PA4 | <-- | /ERROR (aka /FAULT)
41 * 7 | PA5 | --> | DIR (aka /SELECT-IN) 41 * 7 | PA5 | --> | DIR (aka /SELECT-IN)
42 * 8 | PA6 | --> | /AUTO-FEED-XT 42 * 8 | PA6 | --> | /AUTO-FEED-XT
43 * 39 | CA2 | --> | open 43 * 39 | CA2 | --> | open
44 * 5 | PA3 | <-- | /ACK (same as CB1!) 44 * 5 | PA3 | <-- | /ACK (same as CB1!)
45 * 2 | PA0 | <-- | BUSY (same as CA1!) 45 * 2 | PA0 | <-- | BUSY (same as CA1!)
46 * -------+-----+-----+--------------------------------------------------------- 46 * -------+-----+-----+---------------------------------------------------------
47 * 47 *
48 * Should be enough to understand some of the driver. 48 * Should be enough to understand some of the driver.
49 * 49 *
50 * Per convention for normal use the port registers are visible. 50 * Per convention for normal use the port registers are visible.
51 * If you need the data direction registers, restore the value in the 51 * If you need the data direction registers, restore the value in the
52 * control register. 52 * control register.
53 */ 53 */
54 54
55 #include "multiface.h" 55 #include "multiface.h"
56 #include <linux/module.h> 56 #include <linux/module.h>
57 #include <linux/init.h> 57 #include <linux/init.h>
58 #include <linux/parport.h> 58 #include <linux/parport.h>
59 #include <linux/delay.h> 59 #include <linux/delay.h>
60 #include <linux/mc6821.h> 60 #include <linux/mc6821.h>
61 #include <linux/zorro.h> 61 #include <linux/zorro.h>
62 #include <linux/interrupt.h> 62 #include <linux/interrupt.h>
63 #include <asm/setup.h> 63 #include <asm/setup.h>
64 #include <asm/amigahw.h> 64 #include <asm/amigahw.h>
65 #include <asm/irq.h> 65 #include <asm/irq.h>
66 #include <asm/amigaints.h> 66 #include <asm/amigaints.h>
67 67
68 /* Maximum Number of Cards supported */ 68 /* Maximum Number of Cards supported */
69 #define MAX_MFC 5 69 #define MAX_MFC 5
70 70
71 #undef DEBUG 71 #undef DEBUG
72 #ifdef DEBUG 72 #ifdef DEBUG
73 #define DPRINTK printk 73 #define DPRINTK printk
74 #else 74 #else
75 static inline int DPRINTK(void *nothing, ...) {return 0;} 75 static inline int DPRINTK(void *nothing, ...) {return 0;}
76 #endif 76 #endif
77 77
78 static struct parport *this_port[MAX_MFC] = {NULL, }; 78 static struct parport *this_port[MAX_MFC] = {NULL, };
79 static volatile int dummy; /* for trigger readds */ 79 static volatile int dummy; /* for trigger readds */
80 80
81 #define pia(dev) ((struct pia *)(dev->base)) 81 #define pia(dev) ((struct pia *)(dev->base))
82 static struct parport_operations pp_mfc3_ops; 82 static struct parport_operations pp_mfc3_ops;
83 83
84 static void mfc3_write_data(struct parport *p, unsigned char data) 84 static void mfc3_write_data(struct parport *p, unsigned char data)
85 { 85 {
86 DPRINTK(KERN_DEBUG "write_data %c\n",data); 86 DPRINTK(KERN_DEBUG "write_data %c\n",data);
87 87
88 dummy = pia(p)->pprb; /* clears irq bit */ 88 dummy = pia(p)->pprb; /* clears irq bit */
89 /* Triggers also /STROBE.*/ 89 /* Triggers also /STROBE.*/
90 pia(p)->pprb = data; 90 pia(p)->pprb = data;
91 } 91 }
92 92
93 static unsigned char mfc3_read_data(struct parport *p) 93 static unsigned char mfc3_read_data(struct parport *p)
94 { 94 {
95 /* clears interrupt bit. Triggers also /STROBE. */ 95 /* clears interrupt bit. Triggers also /STROBE. */
96 return pia(p)->pprb; 96 return pia(p)->pprb;
97 } 97 }
98 98
99 static unsigned char control_pc_to_mfc3(unsigned char control) 99 static unsigned char control_pc_to_mfc3(unsigned char control)
100 { 100 {
101 unsigned char ret = 32|64; 101 unsigned char ret = 32|64;
102 102
103 if (control & PARPORT_CONTROL_SELECT) /* XXX: What is SELECP? */ 103 if (control & PARPORT_CONTROL_SELECT) /* XXX: What is SELECP? */
104 ret &= ~32; /* /SELECT_IN */ 104 ret &= ~32; /* /SELECT_IN */
105 if (control & PARPORT_CONTROL_INIT) /* INITP */ 105 if (control & PARPORT_CONTROL_INIT) /* INITP */
106 ret |= 128; 106 ret |= 128;
107 if (control & PARPORT_CONTROL_AUTOFD) /* AUTOLF */ 107 if (control & PARPORT_CONTROL_AUTOFD) /* AUTOLF */
108 ret &= ~64; 108 ret &= ~64;
109 if (control & PARPORT_CONTROL_STROBE) /* Strobe */ 109 if (control & PARPORT_CONTROL_STROBE) /* Strobe */
110 /* Handled directly by hardware */; 110 /* Handled directly by hardware */;
111 return ret; 111 return ret;
112 } 112 }
113 113
114 static unsigned char control_mfc3_to_pc(unsigned char control) 114 static unsigned char control_mfc3_to_pc(unsigned char control)
115 { 115 {
116 unsigned char ret = PARPORT_CONTROL_STROBE 116 unsigned char ret = PARPORT_CONTROL_STROBE
117 | PARPORT_CONTROL_AUTOFD | PARPORT_CONTROL_SELECT; 117 | PARPORT_CONTROL_AUTOFD | PARPORT_CONTROL_SELECT;
118 118
119 if (control & 128) /* /INITP */ 119 if (control & 128) /* /INITP */
120 ret |= PARPORT_CONTROL_INIT; 120 ret |= PARPORT_CONTROL_INIT;
121 if (control & 64) /* /AUTOLF */ 121 if (control & 64) /* /AUTOLF */
122 ret &= ~PARPORT_CONTROL_AUTOFD; 122 ret &= ~PARPORT_CONTROL_AUTOFD;
123 if (control & 32) /* /SELECT_IN */ 123 if (control & 32) /* /SELECT_IN */
124 ret &= ~PARPORT_CONTROL_SELECT; 124 ret &= ~PARPORT_CONTROL_SELECT;
125 return ret; 125 return ret;
126 } 126 }
127 127
128 static void mfc3_write_control(struct parport *p, unsigned char control) 128 static void mfc3_write_control(struct parport *p, unsigned char control)
129 { 129 {
130 DPRINTK(KERN_DEBUG "write_control %02x\n",control); 130 DPRINTK(KERN_DEBUG "write_control %02x\n",control);
131 pia(p)->ppra = (pia(p)->ppra & 0x1f) | control_pc_to_mfc3(control); 131 pia(p)->ppra = (pia(p)->ppra & 0x1f) | control_pc_to_mfc3(control);
132 } 132 }
133 133
134 static unsigned char mfc3_read_control( struct parport *p) 134 static unsigned char mfc3_read_control( struct parport *p)
135 { 135 {
136 DPRINTK(KERN_DEBUG "read_control \n"); 136 DPRINTK(KERN_DEBUG "read_control \n");
137 return control_mfc3_to_pc(pia(p)->ppra & 0xe0); 137 return control_mfc3_to_pc(pia(p)->ppra & 0xe0);
138 } 138 }
139 139
140 static unsigned char mfc3_frob_control( struct parport *p, unsigned char mask, unsigned char val) 140 static unsigned char mfc3_frob_control( struct parport *p, unsigned char mask, unsigned char val)
141 { 141 {
142 unsigned char old; 142 unsigned char old;
143 143
144 DPRINTK(KERN_DEBUG "frob_control mask %02x, value %02x\n",mask,val); 144 DPRINTK(KERN_DEBUG "frob_control mask %02x, value %02x\n",mask,val);
145 old = mfc3_read_control(p); 145 old = mfc3_read_control(p);
146 mfc3_write_control(p, (old & ~mask) ^ val); 146 mfc3_write_control(p, (old & ~mask) ^ val);
147 return old; 147 return old;
148 } 148 }
149 149
150 #if 0 /* currently unused */
151 static unsigned char status_pc_to_mfc3(unsigned char status)
152 {
153 unsigned char ret = 1;
154
155 if (status & PARPORT_STATUS_BUSY) /* Busy */
156 ret &= ~1;
157 if (status & PARPORT_STATUS_ACK) /* Ack */
158 ret |= 8;
159 if (status & PARPORT_STATUS_PAPEROUT) /* PaperOut */
160 ret |= 2;
161 if (status & PARPORT_STATUS_SELECT) /* select */
162 ret |= 4;
163 if (status & PARPORT_STATUS_ERROR) /* error */
164 ret |= 16;
165 return ret;
166 }
167 #endif
168
169 static unsigned char status_mfc3_to_pc(unsigned char status) 150 static unsigned char status_mfc3_to_pc(unsigned char status)
170 { 151 {
171 unsigned char ret = PARPORT_STATUS_BUSY; 152 unsigned char ret = PARPORT_STATUS_BUSY;
172 153
173 if (status & 1) /* Busy */ 154 if (status & 1) /* Busy */
174 ret &= ~PARPORT_STATUS_BUSY; 155 ret &= ~PARPORT_STATUS_BUSY;
175 if (status & 2) /* PaperOut */ 156 if (status & 2) /* PaperOut */
176 ret |= PARPORT_STATUS_PAPEROUT; 157 ret |= PARPORT_STATUS_PAPEROUT;
177 if (status & 4) /* Selected */ 158 if (status & 4) /* Selected */
178 ret |= PARPORT_STATUS_SELECT; 159 ret |= PARPORT_STATUS_SELECT;
179 if (status & 8) /* Ack */ 160 if (status & 8) /* Ack */
180 ret |= PARPORT_STATUS_ACK; 161 ret |= PARPORT_STATUS_ACK;
181 if (status & 16) /* /ERROR */ 162 if (status & 16) /* /ERROR */
182 ret |= PARPORT_STATUS_ERROR; 163 ret |= PARPORT_STATUS_ERROR;
183 164
184 return ret; 165 return ret;
185 } 166 }
186 167
187 #if 0 /* currently unused */
188 static void mfc3_write_status( struct parport *p, unsigned char status)
189 {
190 DPRINTK(KERN_DEBUG "write_status %02x\n",status);
191 pia(p)->ppra = (pia(p)->ppra & 0xe0) | status_pc_to_mfc3(status);
192 }
193 #endif
194
195 static unsigned char mfc3_read_status(struct parport *p) 168 static unsigned char mfc3_read_status(struct parport *p)
196 { 169 {
197 unsigned char status; 170 unsigned char status;
198 171
199 status = status_mfc3_to_pc(pia(p)->ppra & 0x1f); 172 status = status_mfc3_to_pc(pia(p)->ppra & 0x1f);
200 DPRINTK(KERN_DEBUG "read_status %02x\n", status); 173 DPRINTK(KERN_DEBUG "read_status %02x\n", status);
201 return status; 174 return status;
202 } 175 }
203
204 #if 0 /* currently unused */
205 static void mfc3_change_mode( struct parport *p, int m)
206 {
207 /* XXX: This port only has one mode, and I am
208 not sure about the corresponding PC-style mode*/
209 }
210 #endif
211 176
212 static int use_cnt = 0; 177 static int use_cnt = 0;
213 178
214 static irqreturn_t mfc3_interrupt(int irq, void *dev_id) 179 static irqreturn_t mfc3_interrupt(int irq, void *dev_id)
215 { 180 {
216 int i; 181 int i;
217 182
218 for( i = 0; i < MAX_MFC; i++) 183 for( i = 0; i < MAX_MFC; i++)
219 if (this_port[i] != NULL) 184 if (this_port[i] != NULL)
220 if (pia(this_port[i])->crb & 128) { /* Board caused interrupt */ 185 if (pia(this_port[i])->crb & 128) { /* Board caused interrupt */
221 dummy = pia(this_port[i])->pprb; /* clear irq bit */ 186 dummy = pia(this_port[i])->pprb; /* clear irq bit */
222 parport_generic_irq(this_port[i]); 187 parport_generic_irq(this_port[i]);
223 } 188 }
224 return IRQ_HANDLED; 189 return IRQ_HANDLED;
225 } 190 }
226 191
227 static void mfc3_enable_irq(struct parport *p) 192 static void mfc3_enable_irq(struct parport *p)
228 { 193 {
229 pia(p)->crb |= PIA_C1_ENABLE_IRQ; 194 pia(p)->crb |= PIA_C1_ENABLE_IRQ;
230 } 195 }
231 196
232 static void mfc3_disable_irq(struct parport *p) 197 static void mfc3_disable_irq(struct parport *p)
233 { 198 {
234 pia(p)->crb &= ~PIA_C1_ENABLE_IRQ; 199 pia(p)->crb &= ~PIA_C1_ENABLE_IRQ;
235 } 200 }
236 201
237 static void mfc3_data_forward(struct parport *p) 202 static void mfc3_data_forward(struct parport *p)
238 { 203 {
239 DPRINTK(KERN_DEBUG "forward\n"); 204 DPRINTK(KERN_DEBUG "forward\n");
240 pia(p)->crb &= ~PIA_DDR; /* make data direction register visible */ 205 pia(p)->crb &= ~PIA_DDR; /* make data direction register visible */
241 pia(p)->pddrb = 255; /* all pins output */ 206 pia(p)->pddrb = 255; /* all pins output */
242 pia(p)->crb |= PIA_DDR; /* make data register visible - default */ 207 pia(p)->crb |= PIA_DDR; /* make data register visible - default */
243 } 208 }
244 209
245 static void mfc3_data_reverse(struct parport *p) 210 static void mfc3_data_reverse(struct parport *p)
246 { 211 {
247 DPRINTK(KERN_DEBUG "reverse\n"); 212 DPRINTK(KERN_DEBUG "reverse\n");
248 pia(p)->crb &= ~PIA_DDR; /* make data direction register visible */ 213 pia(p)->crb &= ~PIA_DDR; /* make data direction register visible */
249 pia(p)->pddrb = 0; /* all pins input */ 214 pia(p)->pddrb = 0; /* all pins input */
250 pia(p)->crb |= PIA_DDR; /* make data register visible - default */ 215 pia(p)->crb |= PIA_DDR; /* make data register visible - default */
251 } 216 }
252 217
253 static void mfc3_init_state(struct pardevice *dev, struct parport_state *s) 218 static void mfc3_init_state(struct pardevice *dev, struct parport_state *s)
254 { 219 {
255 s->u.amiga.data = 0; 220 s->u.amiga.data = 0;
256 s->u.amiga.datadir = 255; 221 s->u.amiga.datadir = 255;
257 s->u.amiga.status = 0; 222 s->u.amiga.status = 0;
258 s->u.amiga.statusdir = 0xe0; 223 s->u.amiga.statusdir = 0xe0;
259 } 224 }
260 225
261 static void mfc3_save_state(struct parport *p, struct parport_state *s) 226 static void mfc3_save_state(struct parport *p, struct parport_state *s)
262 { 227 {
263 s->u.amiga.data = pia(p)->pprb; 228 s->u.amiga.data = pia(p)->pprb;
264 pia(p)->crb &= ~PIA_DDR; 229 pia(p)->crb &= ~PIA_DDR;
265 s->u.amiga.datadir = pia(p)->pddrb; 230 s->u.amiga.datadir = pia(p)->pddrb;
266 pia(p)->crb |= PIA_DDR; 231 pia(p)->crb |= PIA_DDR;
267 s->u.amiga.status = pia(p)->ppra; 232 s->u.amiga.status = pia(p)->ppra;
268 pia(p)->cra &= ~PIA_DDR; 233 pia(p)->cra &= ~PIA_DDR;
269 s->u.amiga.statusdir = pia(p)->pddrb; 234 s->u.amiga.statusdir = pia(p)->pddrb;
270 pia(p)->cra |= PIA_DDR; 235 pia(p)->cra |= PIA_DDR;
271 } 236 }
272 237
273 static void mfc3_restore_state(struct parport *p, struct parport_state *s) 238 static void mfc3_restore_state(struct parport *p, struct parport_state *s)
274 { 239 {
275 pia(p)->pprb = s->u.amiga.data; 240 pia(p)->pprb = s->u.amiga.data;
276 pia(p)->crb &= ~PIA_DDR; 241 pia(p)->crb &= ~PIA_DDR;
277 pia(p)->pddrb = s->u.amiga.datadir; 242 pia(p)->pddrb = s->u.amiga.datadir;
278 pia(p)->crb |= PIA_DDR; 243 pia(p)->crb |= PIA_DDR;
279 pia(p)->ppra = s->u.amiga.status; 244 pia(p)->ppra = s->u.amiga.status;
280 pia(p)->cra &= ~PIA_DDR; 245 pia(p)->cra &= ~PIA_DDR;
281 pia(p)->pddrb = s->u.amiga.statusdir; 246 pia(p)->pddrb = s->u.amiga.statusdir;
282 pia(p)->cra |= PIA_DDR; 247 pia(p)->cra |= PIA_DDR;
283 } 248 }
284 249
285 static struct parport_operations pp_mfc3_ops = { 250 static struct parport_operations pp_mfc3_ops = {
286 .write_data = mfc3_write_data, 251 .write_data = mfc3_write_data,
287 .read_data = mfc3_read_data, 252 .read_data = mfc3_read_data,
288 253
289 .write_control = mfc3_write_control, 254 .write_control = mfc3_write_control,
290 .read_control = mfc3_read_control, 255 .read_control = mfc3_read_control,
291 .frob_control = mfc3_frob_control, 256 .frob_control = mfc3_frob_control,
292 257
293 .read_status = mfc3_read_status, 258 .read_status = mfc3_read_status,
294 259
295 .enable_irq = mfc3_enable_irq, 260 .enable_irq = mfc3_enable_irq,
296 .disable_irq = mfc3_disable_irq, 261 .disable_irq = mfc3_disable_irq,
297 262
298 .data_forward = mfc3_data_forward, 263 .data_forward = mfc3_data_forward,
299 .data_reverse = mfc3_data_reverse, 264 .data_reverse = mfc3_data_reverse,
300 265
301 .init_state = mfc3_init_state, 266 .init_state = mfc3_init_state,
302 .save_state = mfc3_save_state, 267 .save_state = mfc3_save_state,
303 .restore_state = mfc3_restore_state, 268 .restore_state = mfc3_restore_state,
304 269
305 .epp_write_data = parport_ieee1284_epp_write_data, 270 .epp_write_data = parport_ieee1284_epp_write_data,
306 .epp_read_data = parport_ieee1284_epp_read_data, 271 .epp_read_data = parport_ieee1284_epp_read_data,
307 .epp_write_addr = parport_ieee1284_epp_write_addr, 272 .epp_write_addr = parport_ieee1284_epp_write_addr,
308 .epp_read_addr = parport_ieee1284_epp_read_addr, 273 .epp_read_addr = parport_ieee1284_epp_read_addr,
309 274
310 .ecp_write_data = parport_ieee1284_ecp_write_data, 275 .ecp_write_data = parport_ieee1284_ecp_write_data,
311 .ecp_read_data = parport_ieee1284_ecp_read_data, 276 .ecp_read_data = parport_ieee1284_ecp_read_data,
312 .ecp_write_addr = parport_ieee1284_ecp_write_addr, 277 .ecp_write_addr = parport_ieee1284_ecp_write_addr,
313 278
314 .compat_write_data = parport_ieee1284_write_compat, 279 .compat_write_data = parport_ieee1284_write_compat,
315 .nibble_read_data = parport_ieee1284_read_nibble, 280 .nibble_read_data = parport_ieee1284_read_nibble,
316 .byte_read_data = parport_ieee1284_read_byte, 281 .byte_read_data = parport_ieee1284_read_byte,
317 282
318 .owner = THIS_MODULE, 283 .owner = THIS_MODULE,
319 }; 284 };
320 285
321 /* ----------- Initialisation code --------------------------------- */ 286 /* ----------- Initialisation code --------------------------------- */
322 287
323 static int __init parport_mfc3_init(void) 288 static int __init parport_mfc3_init(void)
324 { 289 {
325 struct parport *p; 290 struct parport *p;
326 int pias = 0; 291 int pias = 0;
327 struct pia *pp; 292 struct pia *pp;
328 struct zorro_dev *z = NULL; 293 struct zorro_dev *z = NULL;
329 294
330 if (!MACH_IS_AMIGA) 295 if (!MACH_IS_AMIGA)
331 return -ENODEV; 296 return -ENODEV;
332 297
333 while ((z = zorro_find_device(ZORRO_PROD_BSC_MULTIFACE_III, z))) { 298 while ((z = zorro_find_device(ZORRO_PROD_BSC_MULTIFACE_III, z))) {
334 unsigned long piabase = z->resource.start+PIABASE; 299 unsigned long piabase = z->resource.start+PIABASE;
335 if (!request_mem_region(piabase, sizeof(struct pia), "PIA")) 300 if (!request_mem_region(piabase, sizeof(struct pia), "PIA"))
336 continue; 301 continue;
337 302
338 pp = (struct pia *)ZTWO_VADDR(piabase); 303 pp = (struct pia *)ZTWO_VADDR(piabase);
339 pp->crb = 0; 304 pp->crb = 0;
340 pp->pddrb = 255; /* all data pins output */ 305 pp->pddrb = 255; /* all data pins output */
341 pp->crb = PIA_DDR|32|8; 306 pp->crb = PIA_DDR|32|8;
342 dummy = pp->pddrb; /* reading clears interrupt */ 307 dummy = pp->pddrb; /* reading clears interrupt */
343 pp->cra = 0; 308 pp->cra = 0;
344 pp->pddra = 0xe0; /* /RESET, /DIR ,/AUTO-FEED output */ 309 pp->pddra = 0xe0; /* /RESET, /DIR ,/AUTO-FEED output */
345 pp->cra = PIA_DDR; 310 pp->cra = PIA_DDR;
346 pp->ppra = 0; /* reset printer */ 311 pp->ppra = 0; /* reset printer */
347 udelay(10); 312 udelay(10);
348 pp->ppra = 128; 313 pp->ppra = 128;
349 p = parport_register_port((unsigned long)pp, IRQ_AMIGA_PORTS, 314 p = parport_register_port((unsigned long)pp, IRQ_AMIGA_PORTS,
350 PARPORT_DMA_NONE, &pp_mfc3_ops); 315 PARPORT_DMA_NONE, &pp_mfc3_ops);
351 if (!p) 316 if (!p)
352 goto out_port; 317 goto out_port;
353 318
354 if (p->irq != PARPORT_IRQ_NONE) { 319 if (p->irq != PARPORT_IRQ_NONE) {
355 if (use_cnt++ == 0) 320 if (use_cnt++ == 0)
356 if (request_irq(IRQ_AMIGA_PORTS, mfc3_interrupt, IRQF_SHARED, p->name, &pp_mfc3_ops)) 321 if (request_irq(IRQ_AMIGA_PORTS, mfc3_interrupt, IRQF_SHARED, p->name, &pp_mfc3_ops))
357 goto out_irq; 322 goto out_irq;
358 } 323 }
359 p->dev = &z->dev; 324 p->dev = &z->dev;
360 325
361 this_port[pias++] = p; 326 this_port[pias++] = p;
362 printk(KERN_INFO "%s: Multiface III port using irq\n", p->name); 327 printk(KERN_INFO "%s: Multiface III port using irq\n", p->name);
363 /* XXX: set operating mode */ 328 /* XXX: set operating mode */
364 329
365 p->private_data = (void *)piabase; 330 p->private_data = (void *)piabase;
366 parport_announce_port (p); 331 parport_announce_port (p);
367 332
368 if (pias >= MAX_MFC) 333 if (pias >= MAX_MFC)
369 break; 334 break;
370 continue; 335 continue;
371 336
372 out_irq: 337 out_irq:
373 parport_put_port(p); 338 parport_put_port(p);
374 out_port: 339 out_port:
375 release_mem_region(piabase, sizeof(struct pia)); 340 release_mem_region(piabase, sizeof(struct pia));
376 } 341 }
377 342
378 return pias ? 0 : -ENODEV; 343 return pias ? 0 : -ENODEV;
379 } 344 }
380 345
381 static void __exit parport_mfc3_exit(void) 346 static void __exit parport_mfc3_exit(void)
382 { 347 {
383 int i; 348 int i;
384 349
385 for (i = 0; i < MAX_MFC; i++) { 350 for (i = 0; i < MAX_MFC; i++) {
386 if (!this_port[i]) 351 if (!this_port[i])
387 continue; 352 continue;
388 parport_remove_port(this_port[i]); 353 parport_remove_port(this_port[i]);
389 if (this_port[i]->irq != PARPORT_IRQ_NONE) { 354 if (this_port[i]->irq != PARPORT_IRQ_NONE) {
390 if (--use_cnt == 0) 355 if (--use_cnt == 0)
391 free_irq(IRQ_AMIGA_PORTS, &pp_mfc3_ops); 356 free_irq(IRQ_AMIGA_PORTS, &pp_mfc3_ops);
392 } 357 }
393 release_mem_region(ZTWO_PADDR(this_port[i]->private_data), sizeof(struct pia)); 358 release_mem_region(ZTWO_PADDR(this_port[i]->private_data), sizeof(struct pia));
394 parport_put_port(this_port[i]); 359 parport_put_port(this_port[i]);
395 } 360 }
396 } 361 }
397 362
398 363
399 MODULE_AUTHOR("Joerg Dorchain <joerg@dorchain.net>"); 364 MODULE_AUTHOR("Joerg Dorchain <joerg@dorchain.net>");
400 MODULE_DESCRIPTION("Parport Driver for Multiface 3 expansion cards Parallel Port"); 365 MODULE_DESCRIPTION("Parport Driver for Multiface 3 expansion cards Parallel Port");
401 MODULE_SUPPORTED_DEVICE("Multiface 3 Parallel Port"); 366 MODULE_SUPPORTED_DEVICE("Multiface 3 Parallel Port");
402 MODULE_LICENSE("GPL"); 367 MODULE_LICENSE("GPL");
403 368
404 module_init(parport_mfc3_init) 369 module_init(parport_mfc3_init)
405 module_exit(parport_mfc3_exit) 370 module_exit(parport_mfc3_exit)
406 371
drivers/parport/parport_pc.c
Diff comments   View file @ 9912143
1 /* Low-level parallel-port routines for 8255-based PC-style hardware. 1 /* Low-level parallel-port routines for 8255-based PC-style hardware.
2 * 2 *
3 * Authors: Phil Blundell <philb@gnu.org> 3 * Authors: Phil Blundell <philb@gnu.org>
4 * Tim Waugh <tim@cyberelk.demon.co.uk> 4 * Tim Waugh <tim@cyberelk.demon.co.uk>
5 * Jose Renau <renau@acm.org> 5 * Jose Renau <renau@acm.org>
6 * David Campbell 6 * David Campbell
7 * Andrea Arcangeli 7 * Andrea Arcangeli
8 * 8 *
9 * based on work by Grant Guenther <grant@torque.net> and Phil Blundell. 9 * based on work by Grant Guenther <grant@torque.net> and Phil Blundell.
10 * 10 *
11 * Cleaned up include files - Russell King <linux@arm.uk.linux.org> 11 * Cleaned up include files - Russell King <linux@arm.uk.linux.org>
12 * DMA support - Bert De Jonghe <bert@sophis.be> 12 * DMA support - Bert De Jonghe <bert@sophis.be>
13 * Many ECP bugs fixed. Fred Barnes & Jamie Lokier, 1999 13 * Many ECP bugs fixed. Fred Barnes & Jamie Lokier, 1999
14 * More PCI support now conditional on CONFIG_PCI, 03/2001, Paul G. 14 * More PCI support now conditional on CONFIG_PCI, 03/2001, Paul G.
15 * Various hacks, Fred Barnes, 04/2001 15 * Various hacks, Fred Barnes, 04/2001
16 * Updated probing logic - Adam Belay <ambx1@neo.rr.com> 16 * Updated probing logic - Adam Belay <ambx1@neo.rr.com>
17 */ 17 */
18 18
19 /* This driver should work with any hardware that is broadly compatible 19 /* This driver should work with any hardware that is broadly compatible
20 * with that in the IBM PC. This applies to the majority of integrated 20 * with that in the IBM PC. This applies to the majority of integrated
21 * I/O chipsets that are commonly available. The expected register 21 * I/O chipsets that are commonly available. The expected register
22 * layout is: 22 * layout is:
23 * 23 *
24 * base+0 data 24 * base+0 data
25 * base+1 status 25 * base+1 status
26 * base+2 control 26 * base+2 control
27 * 27 *
28 * In addition, there are some optional registers: 28 * In addition, there are some optional registers:
29 * 29 *
30 * base+3 EPP address 30 * base+3 EPP address
31 * base+4 EPP data 31 * base+4 EPP data
32 * base+0x400 ECP config A 32 * base+0x400 ECP config A
33 * base+0x401 ECP config B 33 * base+0x401 ECP config B
34 * base+0x402 ECP control 34 * base+0x402 ECP control
35 * 35 *
36 * All registers are 8 bits wide and read/write. If your hardware differs 36 * All registers are 8 bits wide and read/write. If your hardware differs
37 * only in register addresses (eg because your registers are on 32-bit 37 * only in register addresses (eg because your registers are on 32-bit
38 * word boundaries) then you can alter the constants in parport_pc.h to 38 * word boundaries) then you can alter the constants in parport_pc.h to
39 * accommodate this. 39 * accommodate this.
40 * 40 *
41 * Note that the ECP registers may not start at offset 0x400 for PCI cards, 41 * Note that the ECP registers may not start at offset 0x400 for PCI cards,
42 * but rather will start at port->base_hi. 42 * but rather will start at port->base_hi.
43 */ 43 */
44 44
45 #include <linux/module.h> 45 #include <linux/module.h>
46 #include <linux/init.h> 46 #include <linux/init.h>
47 #include <linux/sched.h> 47 #include <linux/sched.h>
48 #include <linux/delay.h> 48 #include <linux/delay.h>
49 #include <linux/errno.h> 49 #include <linux/errno.h>
50 #include <linux/interrupt.h> 50 #include <linux/interrupt.h>
51 #include <linux/ioport.h> 51 #include <linux/ioport.h>
52 #include <linux/kernel.h> 52 #include <linux/kernel.h>
53 #include <linux/slab.h> 53 #include <linux/slab.h>
54 #include <linux/dma-mapping.h> 54 #include <linux/dma-mapping.h>
55 #include <linux/pci.h> 55 #include <linux/pci.h>
56 #include <linux/pnp.h> 56 #include <linux/pnp.h>
57 #include <linux/platform_device.h> 57 #include <linux/platform_device.h>
58 #include <linux/sysctl.h> 58 #include <linux/sysctl.h>
59 #include <linux/io.h> 59 #include <linux/io.h>
60 #include <linux/uaccess.h> 60 #include <linux/uaccess.h>
61 61
62 #include <asm/dma.h> 62 #include <asm/dma.h>
63 63
64 #include <linux/parport.h> 64 #include <linux/parport.h>
65 #include <linux/parport_pc.h> 65 #include <linux/parport_pc.h>
66 #include <linux/via.h> 66 #include <linux/via.h>
67 #include <asm/parport.h> 67 #include <asm/parport.h>
68 68
69 #define PARPORT_PC_MAX_PORTS PARPORT_MAX 69 #define PARPORT_PC_MAX_PORTS PARPORT_MAX
70 70
71 #ifdef CONFIG_ISA_DMA_API 71 #ifdef CONFIG_ISA_DMA_API
72 #define HAS_DMA 72 #define HAS_DMA
73 #endif 73 #endif
74 74
75 /* ECR modes */ 75 /* ECR modes */
76 #define ECR_SPP 00 76 #define ECR_SPP 00
77 #define ECR_PS2 01 77 #define ECR_PS2 01
78 #define ECR_PPF 02 78 #define ECR_PPF 02
79 #define ECR_ECP 03 79 #define ECR_ECP 03
80 #define ECR_EPP 04 80 #define ECR_EPP 04
81 #define ECR_VND 05 81 #define ECR_VND 05
82 #define ECR_TST 06 82 #define ECR_TST 06
83 #define ECR_CNF 07 83 #define ECR_CNF 07
84 #define ECR_MODE_MASK 0xe0 84 #define ECR_MODE_MASK 0xe0
85 #define ECR_WRITE(p, v) frob_econtrol((p), 0xff, (v)) 85 #define ECR_WRITE(p, v) frob_econtrol((p), 0xff, (v))
86 86
87 #undef DEBUG 87 #undef DEBUG
88 88
89 #ifdef DEBUG 89 #ifdef DEBUG
90 #define DPRINTK printk 90 #define DPRINTK printk
91 #else 91 #else
92 #define DPRINTK(stuff...) 92 #define DPRINTK(stuff...)
93 #endif 93 #endif
94 94
95 95
96 #define NR_SUPERIOS 3 96 #define NR_SUPERIOS 3
97 static struct superio_struct { /* For Super-IO chips autodetection */ 97 static struct superio_struct { /* For Super-IO chips autodetection */
98 int io; 98 int io;
99 int irq; 99 int irq;
100 int dma; 100 int dma;
101 } superios[NR_SUPERIOS] = { {0,},}; 101 } superios[NR_SUPERIOS] = { {0,},};
102 102
103 static int user_specified; 103 static int user_specified;
104 #if defined(CONFIG_PARPORT_PC_SUPERIO) || \ 104 #if defined(CONFIG_PARPORT_PC_SUPERIO) || \
105 (defined(CONFIG_PARPORT_1284) && defined(CONFIG_PARPORT_PC_FIFO)) 105 (defined(CONFIG_PARPORT_1284) && defined(CONFIG_PARPORT_PC_FIFO))
106 static int verbose_probing; 106 static int verbose_probing;
107 #endif 107 #endif
108 static int pci_registered_parport; 108 static int pci_registered_parport;
109 static int pnp_registered_parport; 109 static int pnp_registered_parport;
110 110
111 /* frob_control, but for ECR */ 111 /* frob_control, but for ECR */
112 static void frob_econtrol(struct parport *pb, unsigned char m, 112 static void frob_econtrol(struct parport *pb, unsigned char m,
113 unsigned char v) 113 unsigned char v)
114 { 114 {
115 unsigned char ectr = 0; 115 unsigned char ectr = 0;
116 116
117 if (m != 0xff) 117 if (m != 0xff)
118 ectr = inb(ECONTROL(pb)); 118 ectr = inb(ECONTROL(pb));
119 119
120 DPRINTK(KERN_DEBUG "frob_econtrol(%02x,%02x): %02x -> %02x\n", 120 DPRINTK(KERN_DEBUG "frob_econtrol(%02x,%02x): %02x -> %02x\n",
121 m, v, ectr, (ectr & ~m) ^ v); 121 m, v, ectr, (ectr & ~m) ^ v);
122 122
123 outb((ectr & ~m) ^ v, ECONTROL(pb)); 123 outb((ectr & ~m) ^ v, ECONTROL(pb));
124 } 124 }
125 125
126 static inline void frob_set_mode(struct parport *p, int mode) 126 static inline void frob_set_mode(struct parport *p, int mode)
127 { 127 {
128 frob_econtrol(p, ECR_MODE_MASK, mode << 5); 128 frob_econtrol(p, ECR_MODE_MASK, mode << 5);
129 } 129 }
130 130
131 #ifdef CONFIG_PARPORT_PC_FIFO 131 #ifdef CONFIG_PARPORT_PC_FIFO
132 /* Safely change the mode bits in the ECR 132 /* Safely change the mode bits in the ECR
133 Returns: 133 Returns:
134 0 : Success 134 0 : Success
135 -EBUSY: Could not drain FIFO in some finite amount of time, 135 -EBUSY: Could not drain FIFO in some finite amount of time,
136 mode not changed! 136 mode not changed!
137 */ 137 */
138 static int change_mode(struct parport *p, int m) 138 static int change_mode(struct parport *p, int m)
139 { 139 {
140 const struct parport_pc_private *priv = p->physport->private_data; 140 const struct parport_pc_private *priv = p->physport->private_data;
141 unsigned char oecr; 141 unsigned char oecr;
142 int mode; 142 int mode;
143 143
144 DPRINTK(KERN_INFO "parport change_mode ECP-ISA to mode 0x%02x\n", m); 144 DPRINTK(KERN_INFO "parport change_mode ECP-ISA to mode 0x%02x\n", m);
145 145
146 if (!priv->ecr) { 146 if (!priv->ecr) {
147 printk(KERN_DEBUG "change_mode: but there's no ECR!\n"); 147 printk(KERN_DEBUG "change_mode: but there's no ECR!\n");
148 return 0; 148 return 0;
149 } 149 }
150 150
151 /* Bits <7:5> contain the mode. */ 151 /* Bits <7:5> contain the mode. */
152 oecr = inb(ECONTROL(p)); 152 oecr = inb(ECONTROL(p));
153 mode = (oecr >> 5) & 0x7; 153 mode = (oecr >> 5) & 0x7;
154 if (mode == m) 154 if (mode == m)
155 return 0; 155 return 0;
156 156
157 if (mode >= 2 && !(priv->ctr & 0x20)) { 157 if (mode >= 2 && !(priv->ctr & 0x20)) {
158 /* This mode resets the FIFO, so we may 158 /* This mode resets the FIFO, so we may
159 * have to wait for it to drain first. */ 159 * have to wait for it to drain first. */
160 unsigned long expire = jiffies + p->physport->cad->timeout; 160 unsigned long expire = jiffies + p->physport->cad->timeout;
161 int counter; 161 int counter;
162 switch (mode) { 162 switch (mode) {
163 case ECR_PPF: /* Parallel Port FIFO mode */ 163 case ECR_PPF: /* Parallel Port FIFO mode */
164 case ECR_ECP: /* ECP Parallel Port mode */ 164 case ECR_ECP: /* ECP Parallel Port mode */
165 /* Busy wait for 200us */ 165 /* Busy wait for 200us */
166 for (counter = 0; counter < 40; counter++) { 166 for (counter = 0; counter < 40; counter++) {
167 if (inb(ECONTROL(p)) & 0x01) 167 if (inb(ECONTROL(p)) & 0x01)
168 break; 168 break;
169 if (signal_pending(current)) 169 if (signal_pending(current))
170 break; 170 break;
171 udelay(5); 171 udelay(5);
172 } 172 }
173 173
174 /* Poll slowly. */ 174 /* Poll slowly. */
175 while (!(inb(ECONTROL(p)) & 0x01)) { 175 while (!(inb(ECONTROL(p)) & 0x01)) {
176 if (time_after_eq(jiffies, expire)) 176 if (time_after_eq(jiffies, expire))
177 /* The FIFO is stuck. */ 177 /* The FIFO is stuck. */
178 return -EBUSY; 178 return -EBUSY;
179 schedule_timeout_interruptible( 179 schedule_timeout_interruptible(
180 msecs_to_jiffies(10)); 180 msecs_to_jiffies(10));
181 if (signal_pending(current)) 181 if (signal_pending(current))
182 break; 182 break;
183 } 183 }
184 } 184 }
185 } 185 }
186 186
187 if (mode >= 2 && m >= 2) { 187 if (mode >= 2 && m >= 2) {
188 /* We have to go through mode 001 */ 188 /* We have to go through mode 001 */
189 oecr &= ~(7 << 5); 189 oecr &= ~(7 << 5);
190 oecr |= ECR_PS2 << 5; 190 oecr |= ECR_PS2 << 5;
191 ECR_WRITE(p, oecr); 191 ECR_WRITE(p, oecr);
192 } 192 }
193 193
194 /* Set the mode. */ 194 /* Set the mode. */
195 oecr &= ~(7 << 5); 195 oecr &= ~(7 << 5);
196 oecr |= m << 5; 196 oecr |= m << 5;
197 ECR_WRITE(p, oecr); 197 ECR_WRITE(p, oecr);
198 return 0; 198 return 0;
199 } 199 }
200
201 #ifdef CONFIG_PARPORT_1284
202 /* Find FIFO lossage; FIFO is reset */
203 #if 0
204 static int get_fifo_residue(struct parport *p)
205 {
206 int residue;
207 int cnfga;
208 const struct parport_pc_private *priv = p->physport->private_data;
209
210 /* Adjust for the contents of the FIFO. */
211 for (residue = priv->fifo_depth; ; residue--) {
212 if (inb(ECONTROL(p)) & 0x2)
213 /* Full up. */
214 break;
215
216 outb(0, FIFO(p));
217 }
218
219 printk(KERN_DEBUG "%s: %d PWords were left in FIFO\n", p->name,
220 residue);
221
222 /* Reset the FIFO. */
223 frob_set_mode(p, ECR_PS2);
224
225 /* Now change to config mode and clean up. FIXME */
226 frob_set_mode(p, ECR_CNF);
227 cnfga = inb(CONFIGA(p));
228 printk(KERN_DEBUG "%s: cnfgA contains 0x%02x\n", p->name, cnfga);
229
230 if (!(cnfga & (1<<2))) {
231 printk(KERN_DEBUG "%s: Accounting for extra byte\n", p->name);
232 residue++;
233 }
234
235 /* Don't care about partial PWords until support is added for
236 * PWord != 1 byte. */
237
238 /* Back to PS2 mode. */
239 frob_set_mode(p, ECR_PS2);
240
241 DPRINTK(KERN_DEBUG
242 "*** get_fifo_residue: done residue collecting (ecr = 0x%2.2x)\n",
243 inb(ECONTROL(p)));
244 return residue;
245 }
246 #endif /* 0 */
247 #endif /* IEEE 1284 support */
248 #endif /* FIFO support */ 200 #endif /* FIFO support */
249 201
250 /* 202 /*
251 * Clear TIMEOUT BIT in EPP MODE 203 * Clear TIMEOUT BIT in EPP MODE
252 * 204 *
253 * This is also used in SPP detection. 205 * This is also used in SPP detection.
254 */ 206 */
255 static int clear_epp_timeout(struct parport *pb) 207 static int clear_epp_timeout(struct parport *pb)
256 { 208 {
257 unsigned char r; 209 unsigned char r;
258 210
259 if (!(parport_pc_read_status(pb) & 0x01)) 211 if (!(parport_pc_read_status(pb) & 0x01))
260 return 1; 212 return 1;
261 213
262 /* To clear timeout some chips require double read */ 214 /* To clear timeout some chips require double read */
263 parport_pc_read_status(pb); 215 parport_pc_read_status(pb);
264 r = parport_pc_read_status(pb); 216 r = parport_pc_read_status(pb);
265 outb(r | 0x01, STATUS(pb)); /* Some reset by writing 1 */ 217 outb(r | 0x01, STATUS(pb)); /* Some reset by writing 1 */
266 outb(r & 0xfe, STATUS(pb)); /* Others by writing 0 */ 218 outb(r & 0xfe, STATUS(pb)); /* Others by writing 0 */
267 r = parport_pc_read_status(pb); 219 r = parport_pc_read_status(pb);
268 220
269 return !(r & 0x01); 221 return !(r & 0x01);
270 } 222 }
271 223
272 /* 224 /*
273 * Access functions. 225 * Access functions.
274 * 226 *
275 * Most of these aren't static because they may be used by the 227 * Most of these aren't static because they may be used by the
276 * parport_xxx_yyy macros. extern __inline__ versions of several 228 * parport_xxx_yyy macros. extern __inline__ versions of several
277 * of these are in parport_pc.h. 229 * of these are in parport_pc.h.
278 */ 230 */
279 231
280 static void parport_pc_init_state(struct pardevice *dev, 232 static void parport_pc_init_state(struct pardevice *dev,
281 struct parport_state *s) 233 struct parport_state *s)
282 { 234 {
283 s->u.pc.ctr = 0xc; 235 s->u.pc.ctr = 0xc;
284 if (dev->irq_func && 236 if (dev->irq_func &&
285 dev->port->irq != PARPORT_IRQ_NONE) 237 dev->port->irq != PARPORT_IRQ_NONE)
286 /* Set ackIntEn */ 238 /* Set ackIntEn */
287 s->u.pc.ctr |= 0x10; 239 s->u.pc.ctr |= 0x10;
288 240
289 s->u.pc.ecr = 0x34; /* NetMos chip can cause problems 0x24; 241 s->u.pc.ecr = 0x34; /* NetMos chip can cause problems 0x24;
290 * D.Gruszka VScom */ 242 * D.Gruszka VScom */
291 } 243 }
292 244
293 static void parport_pc_save_state(struct parport *p, struct parport_state *s) 245 static void parport_pc_save_state(struct parport *p, struct parport_state *s)
294 { 246 {
295 const struct parport_pc_private *priv = p->physport->private_data; 247 const struct parport_pc_private *priv = p->physport->private_data;
296 s->u.pc.ctr = priv->ctr; 248 s->u.pc.ctr = priv->ctr;
297 if (priv->ecr) 249 if (priv->ecr)
298 s->u.pc.ecr = inb(ECONTROL(p)); 250 s->u.pc.ecr = inb(ECONTROL(p));
299 } 251 }
300 252
301 static void parport_pc_restore_state(struct parport *p, 253 static void parport_pc_restore_state(struct parport *p,
302 struct parport_state *s) 254 struct parport_state *s)
303 { 255 {
304 struct parport_pc_private *priv = p->physport->private_data; 256 struct parport_pc_private *priv = p->physport->private_data;
305 register unsigned char c = s->u.pc.ctr & priv->ctr_writable; 257 register unsigned char c = s->u.pc.ctr & priv->ctr_writable;
306 outb(c, CONTROL(p)); 258 outb(c, CONTROL(p));
307 priv->ctr = c; 259 priv->ctr = c;
308 if (priv->ecr) 260 if (priv->ecr)
309 ECR_WRITE(p, s->u.pc.ecr); 261 ECR_WRITE(p, s->u.pc.ecr);
310 } 262 }
311 263
312 #ifdef CONFIG_PARPORT_1284 264 #ifdef CONFIG_PARPORT_1284
313 static size_t parport_pc_epp_read_data(struct parport *port, void *buf, 265 static size_t parport_pc_epp_read_data(struct parport *port, void *buf,
314 size_t length, int flags) 266 size_t length, int flags)
315 { 267 {
316 size_t got = 0; 268 size_t got = 0;
317 269
318 if (flags & PARPORT_W91284PIC) { 270 if (flags & PARPORT_W91284PIC) {
319 unsigned char status; 271 unsigned char status;
320 size_t left = length; 272 size_t left = length;
321 273
322 /* use knowledge about data lines..: 274 /* use knowledge about data lines..:
323 * nFault is 0 if there is at least 1 byte in the Warp's FIFO 275 * nFault is 0 if there is at least 1 byte in the Warp's FIFO
324 * pError is 1 if there are 16 bytes in the Warp's FIFO 276 * pError is 1 if there are 16 bytes in the Warp's FIFO
325 */ 277 */
326 status = inb(STATUS(port)); 278 status = inb(STATUS(port));
327 279
328 while (!(status & 0x08) && got < length) { 280 while (!(status & 0x08) && got < length) {
329 if (left >= 16 && (status & 0x20) && !(status & 0x08)) { 281 if (left >= 16 && (status & 0x20) && !(status & 0x08)) {
330 /* can grab 16 bytes from warp fifo */ 282 /* can grab 16 bytes from warp fifo */
331 if (!((long)buf & 0x03)) 283 if (!((long)buf & 0x03))
332 insl(EPPDATA(port), buf, 4); 284 insl(EPPDATA(port), buf, 4);
333 else 285 else
334 insb(EPPDATA(port), buf, 16); 286 insb(EPPDATA(port), buf, 16);
335 buf += 16; 287 buf += 16;
336 got += 16; 288 got += 16;
337 left -= 16; 289 left -= 16;
338 } else { 290 } else {
339 /* grab single byte from the warp fifo */ 291 /* grab single byte from the warp fifo */
340 *((char *)buf) = inb(EPPDATA(port)); 292 *((char *)buf) = inb(EPPDATA(port));
341 buf++; 293 buf++;
342 got++; 294 got++;
343 left--; 295 left--;
344 } 296 }
345 status = inb(STATUS(port)); 297 status = inb(STATUS(port));
346 if (status & 0x01) { 298 if (status & 0x01) {
347 /* EPP timeout should never occur... */ 299 /* EPP timeout should never occur... */
348 printk(KERN_DEBUG 300 printk(KERN_DEBUG
349 "%s: EPP timeout occurred while talking to w91284pic (should not have done)\n", port->name); 301 "%s: EPP timeout occurred while talking to w91284pic (should not have done)\n", port->name);
350 clear_epp_timeout(port); 302 clear_epp_timeout(port);
351 } 303 }
352 } 304 }
353 return got; 305 return got;
354 } 306 }
355 if ((flags & PARPORT_EPP_FAST) && (length > 1)) { 307 if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
356 if (!(((long)buf | length) & 0x03)) 308 if (!(((long)buf | length) & 0x03))
357 insl(EPPDATA(port), buf, (length >> 2)); 309 insl(EPPDATA(port), buf, (length >> 2));
358 else 310 else
359 insb(EPPDATA(port), buf, length); 311 insb(EPPDATA(port), buf, length);
360 if (inb(STATUS(port)) & 0x01) { 312 if (inb(STATUS(port)) & 0x01) {
361 clear_epp_timeout(port); 313 clear_epp_timeout(port);
362 return -EIO; 314 return -EIO;
363 } 315 }
364 return length; 316 return length;
365 } 317 }
366 for (; got < length; got++) { 318 for (; got < length; got++) {
367 *((char *)buf) = inb(EPPDATA(port)); 319 *((char *)buf) = inb(EPPDATA(port));
368 buf++; 320 buf++;
369 if (inb(STATUS(port)) & 0x01) { 321 if (inb(STATUS(port)) & 0x01) {
370 /* EPP timeout */ 322 /* EPP timeout */
371 clear_epp_timeout(port); 323 clear_epp_timeout(port);
372 break; 324 break;
373 } 325 }
374 } 326 }
375 327
376 return got; 328 return got;
377 } 329 }
378 330
379 static size_t parport_pc_epp_write_data(struct parport *port, const void *buf, 331 static size_t parport_pc_epp_write_data(struct parport *port, const void *buf,
380 size_t length, int flags) 332 size_t length, int flags)
381 { 333 {
382 size_t written = 0; 334 size_t written = 0;
383 335
384 if ((flags & PARPORT_EPP_FAST) && (length > 1)) { 336 if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
385 if (!(((long)buf | length) & 0x03)) 337 if (!(((long)buf | length) & 0x03))
386 outsl(EPPDATA(port), buf, (length >> 2)); 338 outsl(EPPDATA(port), buf, (length >> 2));
387 else 339 else
388 outsb(EPPDATA(port), buf, length); 340 outsb(EPPDATA(port), buf, length);
389 if (inb(STATUS(port)) & 0x01) { 341 if (inb(STATUS(port)) & 0x01) {
390 clear_epp_timeout(port); 342 clear_epp_timeout(port);
391 return -EIO; 343 return -EIO;
392 } 344 }
393 return length; 345 return length;
394 } 346 }
395 for (; written < length; written++) { 347 for (; written < length; written++) {
396 outb(*((char *)buf), EPPDATA(port)); 348 outb(*((char *)buf), EPPDATA(port));
397 buf++; 349 buf++;
398 if (inb(STATUS(port)) & 0x01) { 350 if (inb(STATUS(port)) & 0x01) {
399 clear_epp_timeout(port); 351 clear_epp_timeout(port);
400 break; 352 break;
401 } 353 }
402 } 354 }
403 355
404 return written; 356 return written;
405 } 357 }
406 358
407 static size_t parport_pc_epp_read_addr(struct parport *port, void *buf, 359 static size_t parport_pc_epp_read_addr(struct parport *port, void *buf,
408 size_t length, int flags) 360 size_t length, int flags)
409 { 361 {
410 size_t got = 0; 362 size_t got = 0;
411 363
412 if ((flags & PARPORT_EPP_FAST) && (length > 1)) { 364 if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
413 insb(EPPADDR(port), buf, length); 365 insb(EPPADDR(port), buf, length);
414 if (inb(STATUS(port)) & 0x01) { 366 if (inb(STATUS(port)) & 0x01) {
415 clear_epp_timeout(port); 367 clear_epp_timeout(port);
416 return -EIO; 368 return -EIO;
417 } 369 }
418 return length; 370 return length;
419 } 371 }
420 for (; got < length; got++) { 372 for (; got < length; got++) {
421 *((char *)buf) = inb(EPPADDR(port)); 373 *((char *)buf) = inb(EPPADDR(port));
422 buf++; 374 buf++;
423 if (inb(STATUS(port)) & 0x01) { 375 if (inb(STATUS(port)) & 0x01) {
424 clear_epp_timeout(port); 376 clear_epp_timeout(port);
425 break; 377 break;
426 } 378 }
427 } 379 }
428 380
429 return got; 381 return got;
430 } 382 }
431 383
432 static size_t parport_pc_epp_write_addr(struct parport *port, 384 static size_t parport_pc_epp_write_addr(struct parport *port,
433 const void *buf, size_t length, 385 const void *buf, size_t length,
434 int flags) 386 int flags)
435 { 387 {
436 size_t written = 0; 388 size_t written = 0;
437 389
438 if ((flags & PARPORT_EPP_FAST) && (length > 1)) { 390 if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
439 outsb(EPPADDR(port), buf, length); 391 outsb(EPPADDR(port), buf, length);
440 if (inb(STATUS(port)) & 0x01) { 392 if (inb(STATUS(port)) & 0x01) {
441 clear_epp_timeout(port); 393 clear_epp_timeout(port);
442 return -EIO; 394 return -EIO;
443 } 395 }
444 return length; 396 return length;
445 } 397 }
446 for (; written < length; written++) { 398 for (; written < length; written++) {
447 outb(*((char *)buf), EPPADDR(port)); 399 outb(*((char *)buf), EPPADDR(port));
448 buf++; 400 buf++;
449 if (inb(STATUS(port)) & 0x01) { 401 if (inb(STATUS(port)) & 0x01) {
450 clear_epp_timeout(port); 402 clear_epp_timeout(port);
451 break; 403 break;
452 } 404 }
453 } 405 }
454 406
455 return written; 407 return written;
456 } 408 }
457 409
458 static size_t parport_pc_ecpepp_read_data(struct parport *port, void *buf, 410 static size_t parport_pc_ecpepp_read_data(struct parport *port, void *buf,
459 size_t length, int flags) 411 size_t length, int flags)
460 { 412 {
461 size_t got; 413 size_t got;
462 414
463 frob_set_mode(port, ECR_EPP); 415 frob_set_mode(port, ECR_EPP);
464 parport_pc_data_reverse(port); 416 parport_pc_data_reverse(port);
465 parport_pc_write_control(port, 0x4); 417 parport_pc_write_control(port, 0x4);
466 got = parport_pc_epp_read_data(port, buf, length, flags); 418 got = parport_pc_epp_read_data(port, buf, length, flags);
467 frob_set_mode(port, ECR_PS2); 419 frob_set_mode(port, ECR_PS2);
468 420
469 return got; 421 return got;
470 } 422 }
471 423
472 static size_t parport_pc_ecpepp_write_data(struct parport *port, 424 static size_t parport_pc_ecpepp_write_data(struct parport *port,
473 const void *buf, size_t length, 425 const void *buf, size_t length,
474 int flags) 426 int flags)
475 { 427 {
476 size_t written; 428 size_t written;
477 429
478 frob_set_mode(port, ECR_EPP); 430 frob_set_mode(port, ECR_EPP);
479 parport_pc_write_control(port, 0x4); 431 parport_pc_write_control(port, 0x4);
480 parport_pc_data_forward(port); 432 parport_pc_data_forward(port);
481 written = parport_pc_epp_write_data(port, buf, length, flags); 433 written = parport_pc_epp_write_data(port, buf, length, flags);
482 frob_set_mode(port, ECR_PS2); 434 frob_set_mode(port, ECR_PS2);
483 435
484 return written; 436 return written;
485 } 437 }
486 438
487 static size_t parport_pc_ecpepp_read_addr(struct parport *port, void *buf, 439 static size_t parport_pc_ecpepp_read_addr(struct parport *port, void *buf,
488 size_t length, int flags) 440 size_t length, int flags)
489 { 441 {
490 size_t got; 442 size_t got;
491 443
492 frob_set_mode(port, ECR_EPP); 444 frob_set_mode(port, ECR_EPP);
493 parport_pc_data_reverse(port); 445 parport_pc_data_reverse(port);
494 parport_pc_write_control(port, 0x4); 446 parport_pc_write_control(port, 0x4);
495 got = parport_pc_epp_read_addr(port, buf, length, flags); 447 got = parport_pc_epp_read_addr(port, buf, length, flags);
496 frob_set_mode(port, ECR_PS2); 448 frob_set_mode(port, ECR_PS2);
497 449
498 return got; 450 return got;
499 } 451 }
500 452
501 static size_t parport_pc_ecpepp_write_addr(struct parport *port, 453 static size_t parport_pc_ecpepp_write_addr(struct parport *port,
502 const void *buf, size_t length, 454 const void *buf, size_t length,
503 int flags) 455 int flags)
504 { 456 {
505 size_t written; 457 size_t written;
506 458
507 frob_set_mode(port, ECR_EPP); 459 frob_set_mode(port, ECR_EPP);
508 parport_pc_write_control(port, 0x4); 460 parport_pc_write_control(port, 0x4);
509 parport_pc_data_forward(port); 461 parport_pc_data_forward(port);
510 written = parport_pc_epp_write_addr(port, buf, length, flags); 462 written = parport_pc_epp_write_addr(port, buf, length, flags);
511 frob_set_mode(port, ECR_PS2); 463 frob_set_mode(port, ECR_PS2);
512 464
513 return written; 465 return written;
514 } 466 }
515 #endif /* IEEE 1284 support */ 467 #endif /* IEEE 1284 support */
516 468
517 #ifdef CONFIG_PARPORT_PC_FIFO 469 #ifdef CONFIG_PARPORT_PC_FIFO
518 static size_t parport_pc_fifo_write_block_pio(struct parport *port, 470 static size_t parport_pc_fifo_write_block_pio(struct parport *port,
519 const void *buf, size_t length) 471 const void *buf, size_t length)
520 { 472 {
521 int ret = 0; 473 int ret = 0;
522 const unsigned char *bufp = buf; 474 const unsigned char *bufp = buf;
523 size_t left = length; 475 size_t left = length;
524 unsigned long expire = jiffies + port->physport->cad->timeout; 476 unsigned long expire = jiffies + port->physport->cad->timeout;
525 const int fifo = FIFO(port); 477 const int fifo = FIFO(port);
526 int poll_for = 8; /* 80 usecs */ 478 int poll_for = 8; /* 80 usecs */
527 const struct parport_pc_private *priv = port->physport->private_data; 479 const struct parport_pc_private *priv = port->physport->private_data;
528 const int fifo_depth = priv->fifo_depth; 480 const int fifo_depth = priv->fifo_depth;
529 481
530 port = port->physport; 482 port = port->physport;
531 483
532 /* We don't want to be interrupted every character. */ 484 /* We don't want to be interrupted every character. */
533 parport_pc_disable_irq(port); 485 parport_pc_disable_irq(port);
534 /* set nErrIntrEn and serviceIntr */ 486 /* set nErrIntrEn and serviceIntr */
535 frob_econtrol(port, (1<<4) | (1<<2), (1<<4) | (1<<2)); 487 frob_econtrol(port, (1<<4) | (1<<2), (1<<4) | (1<<2));
536 488
537 /* Forward mode. */ 489 /* Forward mode. */
538 parport_pc_data_forward(port); /* Must be in PS2 mode */ 490 parport_pc_data_forward(port); /* Must be in PS2 mode */
539 491
540 while (left) { 492 while (left) {
541 unsigned char byte; 493 unsigned char byte;
542 unsigned char ecrval = inb(ECONTROL(port)); 494 unsigned char ecrval = inb(ECONTROL(port));
543 int i = 0; 495 int i = 0;
544 496
545 if (need_resched() && time_before(jiffies, expire)) 497 if (need_resched() && time_before(jiffies, expire))
546 /* Can't yield the port. */ 498 /* Can't yield the port. */
547 schedule(); 499 schedule();
548 500
549 /* Anyone else waiting for the port? */ 501 /* Anyone else waiting for the port? */
550 if (port->waithead) { 502 if (port->waithead) {
551 printk(KERN_DEBUG "Somebody wants the port\n"); 503 printk(KERN_DEBUG "Somebody wants the port\n");
552 break; 504 break;
553 } 505 }
554 506
555 if (ecrval & 0x02) { 507 if (ecrval & 0x02) {
556 /* FIFO is full. Wait for interrupt. */ 508 /* FIFO is full. Wait for interrupt. */
557 509
558 /* Clear serviceIntr */ 510 /* Clear serviceIntr */
559 ECR_WRITE(port, ecrval & ~(1<<2)); 511 ECR_WRITE(port, ecrval & ~(1<<2));
560 false_alarm: 512 false_alarm:
561 ret = parport_wait_event(port, HZ); 513 ret = parport_wait_event(port, HZ);
562 if (ret < 0) 514 if (ret < 0)
563 break; 515 break;
564 ret = 0; 516 ret = 0;
565 if (!time_before(jiffies, expire)) { 517 if (!time_before(jiffies, expire)) {
566 /* Timed out. */ 518 /* Timed out. */
567 printk(KERN_DEBUG "FIFO write timed out\n"); 519 printk(KERN_DEBUG "FIFO write timed out\n");
568 break; 520 break;
569 } 521 }
570 ecrval = inb(ECONTROL(port)); 522 ecrval = inb(ECONTROL(port));
571 if (!(ecrval & (1<<2))) { 523 if (!(ecrval & (1<<2))) {
572 if (need_resched() && 524 if (need_resched() &&
573 time_before(jiffies, expire)) 525 time_before(jiffies, expire))
574 schedule(); 526 schedule();
575 527
576 goto false_alarm; 528 goto false_alarm;
577 } 529 }
578 530
579 continue; 531 continue;
580 } 532 }
581 533
582 /* Can't fail now. */ 534 /* Can't fail now. */
583 expire = jiffies + port->cad->timeout; 535 expire = jiffies + port->cad->timeout;
584 536
585 poll: 537 poll:
586 if (signal_pending(current)) 538 if (signal_pending(current))
587 break; 539 break;
588 540
589 if (ecrval & 0x01) { 541 if (ecrval & 0x01) {
590 /* FIFO is empty. Blast it full. */ 542 /* FIFO is empty. Blast it full. */
591 const int n = left < fifo_depth ? left : fifo_depth; 543 const int n = left < fifo_depth ? left : fifo_depth;
592 outsb(fifo, bufp, n); 544 outsb(fifo, bufp, n);
593 bufp += n; 545 bufp += n;
594 left -= n; 546 left -= n;
595 547
596 /* Adjust the poll time. */ 548 /* Adjust the poll time. */
597 if (i < (poll_for - 2)) 549 if (i < (poll_for - 2))
598 poll_for--; 550 poll_for--;
599 continue; 551 continue;
600 } else if (i++ < poll_for) { 552 } else if (i++ < poll_for) {
601 udelay(10); 553 udelay(10);
602 ecrval = inb(ECONTROL(port)); 554 ecrval = inb(ECONTROL(port));
603 goto poll; 555 goto poll;
604 } 556 }
605 557
606 /* Half-full(call me an optimist) */ 558 /* Half-full(call me an optimist) */
607 byte = *bufp++; 559 byte = *bufp++;
608 outb(byte, fifo); 560 outb(byte, fifo);
609 left--; 561 left--;
610 } 562 }
611 dump_parport_state("leave fifo_write_block_pio", port); 563 dump_parport_state("leave fifo_write_block_pio", port);
612 return length - left; 564 return length - left;
613 } 565 }
614 566
615 #ifdef HAS_DMA 567 #ifdef HAS_DMA
616 static size_t parport_pc_fifo_write_block_dma(struct parport *port, 568 static size_t parport_pc_fifo_write_block_dma(struct parport *port,
617 const void *buf, size_t length) 569 const void *buf, size_t length)
618 { 570 {
619 int ret = 0; 571 int ret = 0;
620 unsigned long dmaflag; 572 unsigned long dmaflag;
621 size_t left = length; 573 size_t left = length;
622 const struct parport_pc_private *priv = port->physport->private_data; 574 const struct parport_pc_private *priv = port->physport->private_data;
623 struct device *dev = port->physport->dev; 575 struct device *dev = port->physport->dev;
624 dma_addr_t dma_addr, dma_handle; 576 dma_addr_t dma_addr, dma_handle;
625 size_t maxlen = 0x10000; /* max 64k per DMA transfer */ 577 size_t maxlen = 0x10000; /* max 64k per DMA transfer */
626 unsigned long start = (unsigned long) buf; 578 unsigned long start = (unsigned long) buf;
627 unsigned long end = (unsigned long) buf + length - 1; 579 unsigned long end = (unsigned long) buf + length - 1;
628 580
629 dump_parport_state("enter fifo_write_block_dma", port); 581 dump_parport_state("enter fifo_write_block_dma", port);
630 if (end < MAX_DMA_ADDRESS) { 582 if (end < MAX_DMA_ADDRESS) {
631 /* If it would cross a 64k boundary, cap it at the end. */ 583 /* If it would cross a 64k boundary, cap it at the end. */
632 if ((start ^ end) & ~0xffffUL) 584 if ((start ^ end) & ~0xffffUL)
633 maxlen = 0x10000 - (start & 0xffff); 585 maxlen = 0x10000 - (start & 0xffff);
634 586
635 dma_addr = dma_handle = dma_map_single(dev, (void *)buf, length, 587 dma_addr = dma_handle = dma_map_single(dev, (void *)buf, length,
636 DMA_TO_DEVICE); 588 DMA_TO_DEVICE);
637 } else { 589 } else {
638 /* above 16 MB we use a bounce buffer as ISA-DMA 590 /* above 16 MB we use a bounce buffer as ISA-DMA
639 is not possible */ 591 is not possible */
640 maxlen = PAGE_SIZE; /* sizeof(priv->dma_buf) */ 592 maxlen = PAGE_SIZE; /* sizeof(priv->dma_buf) */
641 dma_addr = priv->dma_handle; 593 dma_addr = priv->dma_handle;
642 dma_handle = 0; 594 dma_handle = 0;
643 } 595 }
644 596
645 port = port->physport; 597 port = port->physport;
646 598
647 /* We don't want to be interrupted every character. */ 599 /* We don't want to be interrupted every character. */
648 parport_pc_disable_irq(port); 600 parport_pc_disable_irq(port);
649 /* set nErrIntrEn and serviceIntr */ 601 /* set nErrIntrEn and serviceIntr */
650 frob_econtrol(port, (1<<4) | (1<<2), (1<<4) | (1<<2)); 602 frob_econtrol(port, (1<<4) | (1<<2), (1<<4) | (1<<2));
651 603
652 /* Forward mode. */ 604 /* Forward mode. */
653 parport_pc_data_forward(port); /* Must be in PS2 mode */ 605 parport_pc_data_forward(port); /* Must be in PS2 mode */
654 606
655 while (left) { 607 while (left) {
656 unsigned long expire = jiffies + port->physport->cad->timeout; 608 unsigned long expire = jiffies + port->physport->cad->timeout;
657 609
658 size_t count = left; 610 size_t count = left;
659 611
660 if (count > maxlen) 612 if (count > maxlen)
661 count = maxlen; 613 count = maxlen;
662 614
663 if (!dma_handle) /* bounce buffer ! */ 615 if (!dma_handle) /* bounce buffer ! */
664 memcpy(priv->dma_buf, buf, count); 616 memcpy(priv->dma_buf, buf, count);
665 617
666 dmaflag = claim_dma_lock(); 618 dmaflag = claim_dma_lock();
667 disable_dma(port->dma); 619 disable_dma(port->dma);
668 clear_dma_ff(port->dma); 620 clear_dma_ff(port->dma);
669 set_dma_mode(port->dma, DMA_MODE_WRITE); 621 set_dma_mode(port->dma, DMA_MODE_WRITE);
670 set_dma_addr(port->dma, dma_addr); 622 set_dma_addr(port->dma, dma_addr);
671 set_dma_count(port->dma, count); 623 set_dma_count(port->dma, count);
672 624
673 /* Set DMA mode */ 625 /* Set DMA mode */
674 frob_econtrol(port, 1<<3, 1<<3); 626 frob_econtrol(port, 1<<3, 1<<3);
675 627
676 /* Clear serviceIntr */ 628 /* Clear serviceIntr */
677 frob_econtrol(port, 1<<2, 0); 629 frob_econtrol(port, 1<<2, 0);
678 630
679 enable_dma(port->dma); 631 enable_dma(port->dma);
680 release_dma_lock(dmaflag); 632 release_dma_lock(dmaflag);
681 633
682 /* assume DMA will be successful */ 634 /* assume DMA will be successful */
683 left -= count; 635 left -= count;
684 buf += count; 636 buf += count;
685 if (dma_handle) 637 if (dma_handle)
686 dma_addr += count; 638 dma_addr += count;
687 639
688 /* Wait for interrupt. */ 640 /* Wait for interrupt. */
689 false_alarm: 641 false_alarm:
690 ret = parport_wait_event(port, HZ); 642 ret = parport_wait_event(port, HZ);
691 if (ret < 0) 643 if (ret < 0)
692 break; 644 break;
693 ret = 0; 645 ret = 0;
694 if (!time_before(jiffies, expire)) { 646 if (!time_before(jiffies, expire)) {
695 /* Timed out. */ 647 /* Timed out. */
696 printk(KERN_DEBUG "DMA write timed out\n"); 648 printk(KERN_DEBUG "DMA write timed out\n");
697 break; 649 break;
698 } 650 }
699 /* Is serviceIntr set? */ 651 /* Is serviceIntr set? */
700 if (!(inb(ECONTROL(port)) & (1<<2))) { 652 if (!(inb(ECONTROL(port)) & (1<<2))) {
701 cond_resched(); 653 cond_resched();
702 654
703 goto false_alarm; 655 goto false_alarm;
704 } 656 }
705 657
706 dmaflag = claim_dma_lock(); 658 dmaflag = claim_dma_lock();
707 disable_dma(port->dma); 659 disable_dma(port->dma);
708 clear_dma_ff(port->dma); 660 clear_dma_ff(port->dma);
709 count = get_dma_residue(port->dma); 661 count = get_dma_residue(port->dma);
710 release_dma_lock(dmaflag); 662 release_dma_lock(dmaflag);
711 663
712 cond_resched(); /* Can't yield the port. */ 664 cond_resched(); /* Can't yield the port. */
713 665
714 /* Anyone else waiting for the port? */ 666 /* Anyone else waiting for the port? */
715 if (port->waithead) { 667 if (port->waithead) {
716 printk(KERN_DEBUG "Somebody wants the port\n"); 668 printk(KERN_DEBUG "Somebody wants the port\n");
717 break; 669 break;
718 } 670 }
719 671
720 /* update for possible DMA residue ! */ 672 /* update for possible DMA residue ! */
721 buf -= count; 673 buf -= count;
722 left += count; 674 left += count;
723 if (dma_handle) 675 if (dma_handle)
724 dma_addr -= count; 676 dma_addr -= count;
725 } 677 }
726 678
727 /* Maybe got here through break, so adjust for DMA residue! */ 679 /* Maybe got here through break, so adjust for DMA residue! */
728 dmaflag = claim_dma_lock(); 680 dmaflag = claim_dma_lock();
729 disable_dma(port->dma); 681 disable_dma(port->dma);
730 clear_dma_ff(port->dma); 682 clear_dma_ff(port->dma);
731 left += get_dma_residue(port->dma); 683 left += get_dma_residue(port->dma);
732 release_dma_lock(dmaflag); 684 release_dma_lock(dmaflag);
733 685
734 /* Turn off DMA mode */ 686 /* Turn off DMA mode */
735 frob_econtrol(port, 1<<3, 0); 687 frob_econtrol(port, 1<<3, 0);
736 688
737 if (dma_handle) 689 if (dma_handle)
738 dma_unmap_single(dev, dma_handle, length, DMA_TO_DEVICE); 690 dma_unmap_single(dev, dma_handle, length, DMA_TO_DEVICE);
739 691
740 dump_parport_state("leave fifo_write_block_dma", port); 692 dump_parport_state("leave fifo_write_block_dma", port);
741 return length - left; 693 return length - left;
742 } 694 }
743 #endif 695 #endif
744 696
745 static inline size_t parport_pc_fifo_write_block(struct parport *port, 697 static inline size_t parport_pc_fifo_write_block(struct parport *port,
746 const void *buf, size_t length) 698 const void *buf, size_t length)
747 { 699 {
748 #ifdef HAS_DMA 700 #ifdef HAS_DMA
749 if (port->dma != PARPORT_DMA_NONE) 701 if (port->dma != PARPORT_DMA_NONE)
750 return parport_pc_fifo_write_block_dma(port, buf, length); 702 return parport_pc_fifo_write_block_dma(port, buf, length);
751 #endif 703 #endif
752 return parport_pc_fifo_write_block_pio(port, buf, length); 704 return parport_pc_fifo_write_block_pio(port, buf, length);
753 } 705 }
754 706
755 /* Parallel Port FIFO mode (ECP chipsets) */ 707 /* Parallel Port FIFO mode (ECP chipsets) */
756 static size_t parport_pc_compat_write_block_pio(struct parport *port, 708 static size_t parport_pc_compat_write_block_pio(struct parport *port,
757 const void *buf, size_t length, 709 const void *buf, size_t length,
758 int flags) 710 int flags)
759 { 711 {
760 size_t written; 712 size_t written;
761 int r; 713 int r;
762 unsigned long expire; 714 unsigned long expire;
763 const struct parport_pc_private *priv = port->physport->private_data; 715 const struct parport_pc_private *priv = port->physport->private_data;
764 716
765 /* Special case: a timeout of zero means we cannot call schedule(). 717 /* Special case: a timeout of zero means we cannot call schedule().
766 * Also if O_NONBLOCK is set then use the default implementation. */ 718 * Also if O_NONBLOCK is set then use the default implementation. */
767 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) 719 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK)
768 return parport_ieee1284_write_compat(port, buf, 720 return parport_ieee1284_write_compat(port, buf,
769 length, flags); 721 length, flags);
770 722
771 /* Set up parallel port FIFO mode.*/ 723 /* Set up parallel port FIFO mode.*/
772 parport_pc_data_forward(port); /* Must be in PS2 mode */ 724 parport_pc_data_forward(port); /* Must be in PS2 mode */
773 parport_pc_frob_control(port, PARPORT_CONTROL_STROBE, 0); 725 parport_pc_frob_control(port, PARPORT_CONTROL_STROBE, 0);
774 r = change_mode(port, ECR_PPF); /* Parallel port FIFO */ 726 r = change_mode(port, ECR_PPF); /* Parallel port FIFO */
775 if (r) 727 if (r)
776 printk(KERN_DEBUG "%s: Warning change_mode ECR_PPF failed\n", 728 printk(KERN_DEBUG "%s: Warning change_mode ECR_PPF failed\n",
777 port->name); 729 port->name);
778 730
779 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; 731 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA;
780 732
781 /* Write the data to the FIFO. */ 733 /* Write the data to the FIFO. */
782 written = parport_pc_fifo_write_block(port, buf, length); 734 written = parport_pc_fifo_write_block(port, buf, length);
783 735
784 /* Finish up. */ 736 /* Finish up. */
785 /* For some hardware we don't want to touch the mode until 737 /* For some hardware we don't want to touch the mode until
786 * the FIFO is empty, so allow 4 seconds for each position 738 * the FIFO is empty, so allow 4 seconds for each position
787 * in the fifo. 739 * in the fifo.
788 */ 740 */
789 expire = jiffies + (priv->fifo_depth * HZ * 4); 741 expire = jiffies + (priv->fifo_depth * HZ * 4);
790 do { 742 do {
791 /* Wait for the FIFO to empty */ 743 /* Wait for the FIFO to empty */
792 r = change_mode(port, ECR_PS2); 744 r = change_mode(port, ECR_PS2);
793 if (r != -EBUSY) 745 if (r != -EBUSY)
794 break; 746 break;
795 } while (time_before(jiffies, expire)); 747 } while (time_before(jiffies, expire));
796 if (r == -EBUSY) { 748 if (r == -EBUSY) {
797 749
798 printk(KERN_DEBUG "%s: FIFO is stuck\n", port->name); 750 printk(KERN_DEBUG "%s: FIFO is stuck\n", port->name);
799 751
800 /* Prevent further data transfer. */ 752 /* Prevent further data transfer. */
801 frob_set_mode(port, ECR_TST); 753 frob_set_mode(port, ECR_TST);
802 754
803 /* Adjust for the contents of the FIFO. */ 755 /* Adjust for the contents of the FIFO. */
804 for (written -= priv->fifo_depth; ; written++) { 756 for (written -= priv->fifo_depth; ; written++) {
805 if (inb(ECONTROL(port)) & 0x2) { 757 if (inb(ECONTROL(port)) & 0x2) {
806 /* Full up. */ 758 /* Full up. */
807 break; 759 break;
808 } 760 }
809 outb(0, FIFO(port)); 761 outb(0, FIFO(port));
810 } 762 }
811 763
812 /* Reset the FIFO and return to PS2 mode. */ 764 /* Reset the FIFO and return to PS2 mode. */
813 frob_set_mode(port, ECR_PS2); 765 frob_set_mode(port, ECR_PS2);
814 } 766 }
815 767
816 r = parport_wait_peripheral(port, 768 r = parport_wait_peripheral(port,
817 PARPORT_STATUS_BUSY, 769 PARPORT_STATUS_BUSY,
818 PARPORT_STATUS_BUSY); 770 PARPORT_STATUS_BUSY);
819 if (r) 771 if (r)
820 printk(KERN_DEBUG 772 printk(KERN_DEBUG
821 "%s: BUSY timeout (%d) in compat_write_block_pio\n", 773 "%s: BUSY timeout (%d) in compat_write_block_pio\n",
822 port->name, r); 774 port->name, r);
823 775
824 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; 776 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
825 777
826 return written; 778 return written;
827 } 779 }
828 780
829 /* ECP */ 781 /* ECP */
830 #ifdef CONFIG_PARPORT_1284 782 #ifdef CONFIG_PARPORT_1284
831 static size_t parport_pc_ecp_write_block_pio(struct parport *port, 783 static size_t parport_pc_ecp_write_block_pio(struct parport *port,
832 const void *buf, size_t length, 784 const void *buf, size_t length,
833 int flags) 785 int flags)
834 { 786 {
835 size_t written; 787 size_t written;
836 int r; 788 int r;
837 unsigned long expire; 789 unsigned long expire;
838 const struct parport_pc_private *priv = port->physport->private_data; 790 const struct parport_pc_private *priv = port->physport->private_data;
839 791
840 /* Special case: a timeout of zero means we cannot call schedule(). 792 /* Special case: a timeout of zero means we cannot call schedule().
841 * Also if O_NONBLOCK is set then use the default implementation. */ 793 * Also if O_NONBLOCK is set then use the default implementation. */
842 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK) 794 if (port->physport->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK)
843 return parport_ieee1284_ecp_write_data(port, buf, 795 return parport_ieee1284_ecp_write_data(port, buf,
844 length, flags); 796 length, flags);
845 797
846 /* Switch to forward mode if necessary. */ 798 /* Switch to forward mode if necessary. */
847 if (port->physport->ieee1284.phase != IEEE1284_PH_FWD_IDLE) { 799 if (port->physport->ieee1284.phase != IEEE1284_PH_FWD_IDLE) {
848 /* Event 47: Set nInit high. */ 800 /* Event 47: Set nInit high. */
849 parport_frob_control(port, 801 parport_frob_control(port,
850 PARPORT_CONTROL_INIT 802 PARPORT_CONTROL_INIT
851 | PARPORT_CONTROL_AUTOFD, 803 | PARPORT_CONTROL_AUTOFD,
852 PARPORT_CONTROL_INIT 804 PARPORT_CONTROL_INIT
853 | PARPORT_CONTROL_AUTOFD); 805 | PARPORT_CONTROL_AUTOFD);
854 806
855 /* Event 49: PError goes high. */ 807 /* Event 49: PError goes high. */
856 r = parport_wait_peripheral(port, 808 r = parport_wait_peripheral(port,
857 PARPORT_STATUS_PAPEROUT, 809 PARPORT_STATUS_PAPEROUT,
858 PARPORT_STATUS_PAPEROUT); 810 PARPORT_STATUS_PAPEROUT);
859 if (r) { 811 if (r) {
860 printk(KERN_DEBUG "%s: PError timeout (%d) " 812 printk(KERN_DEBUG "%s: PError timeout (%d) "
861 "in ecp_write_block_pio\n", port->name, r); 813 "in ecp_write_block_pio\n", port->name, r);
862 } 814 }
863 } 815 }
864 816
865 /* Set up ECP parallel port mode.*/ 817 /* Set up ECP parallel port mode.*/
866 parport_pc_data_forward(port); /* Must be in PS2 mode */ 818 parport_pc_data_forward(port); /* Must be in PS2 mode */
867 parport_pc_frob_control(port, 819 parport_pc_frob_control(port,
868 PARPORT_CONTROL_STROBE | 820 PARPORT_CONTROL_STROBE |
869 PARPORT_CONTROL_AUTOFD, 821 PARPORT_CONTROL_AUTOFD,
870 0); 822 0);
871 r = change_mode(port, ECR_ECP); /* ECP FIFO */ 823 r = change_mode(port, ECR_ECP); /* ECP FIFO */
872 if (r) 824 if (r)
873 printk(KERN_DEBUG "%s: Warning change_mode ECR_ECP failed\n", 825 printk(KERN_DEBUG "%s: Warning change_mode ECR_ECP failed\n",
874 port->name); 826 port->name);
875 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; 827 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA;
876 828
877 /* Write the data to the FIFO. */ 829 /* Write the data to the FIFO. */
878 written = parport_pc_fifo_write_block(port, buf, length); 830 written = parport_pc_fifo_write_block(port, buf, length);
879 831
880 /* Finish up. */ 832 /* Finish up. */
881 /* For some hardware we don't want to touch the mode until 833 /* For some hardware we don't want to touch the mode until
882 * the FIFO is empty, so allow 4 seconds for each position 834 * the FIFO is empty, so allow 4 seconds for each position
883 * in the fifo. 835 * in the fifo.
884 */ 836 */
885 expire = jiffies + (priv->fifo_depth * (HZ * 4)); 837 expire = jiffies + (priv->fifo_depth * (HZ * 4));
886 do { 838 do {
887 /* Wait for the FIFO to empty */ 839 /* Wait for the FIFO to empty */
888 r = change_mode(port, ECR_PS2); 840 r = change_mode(port, ECR_PS2);
889 if (r != -EBUSY) 841 if (r != -EBUSY)
890 break; 842 break;
891 } while (time_before(jiffies, expire)); 843 } while (time_before(jiffies, expire));
892 if (r == -EBUSY) { 844 if (r == -EBUSY) {
893 845
894 printk(KERN_DEBUG "%s: FIFO is stuck\n", port->name); 846 printk(KERN_DEBUG "%s: FIFO is stuck\n", port->name);
895 847
896 /* Prevent further data transfer. */ 848 /* Prevent further data transfer. */
897 frob_set_mode(port, ECR_TST); 849 frob_set_mode(port, ECR_TST);
898 850
899 /* Adjust for the contents of the FIFO. */ 851 /* Adjust for the contents of the FIFO. */
900 for (written -= priv->fifo_depth; ; written++) { 852 for (written -= priv->fifo_depth; ; written++) {
901 if (inb(ECONTROL(port)) & 0x2) { 853 if (inb(ECONTROL(port)) & 0x2) {
902 /* Full up. */ 854 /* Full up. */
903 break; 855 break;
904 } 856 }
905 outb(0, FIFO(port)); 857 outb(0, FIFO(port));
906 } 858 }
907 859
908 /* Reset the FIFO and return to PS2 mode. */ 860 /* Reset the FIFO and return to PS2 mode. */
909 frob_set_mode(port, ECR_PS2); 861 frob_set_mode(port, ECR_PS2);
910 862
911 /* Host transfer recovery. */ 863 /* Host transfer recovery. */
912 parport_pc_data_reverse(port); /* Must be in PS2 mode */ 864 parport_pc_data_reverse(port); /* Must be in PS2 mode */
913 udelay(5); 865 udelay(5);
914 parport_frob_control(port, PARPORT_CONTROL_INIT, 0); 866 parport_frob_control(port, PARPORT_CONTROL_INIT, 0);
915 r = parport_wait_peripheral(port, PARPORT_STATUS_PAPEROUT, 0); 867 r = parport_wait_peripheral(port, PARPORT_STATUS_PAPEROUT, 0);
916 if (r) 868 if (r)
917 printk(KERN_DEBUG "%s: PE,1 timeout (%d) " 869 printk(KERN_DEBUG "%s: PE,1 timeout (%d) "
918 "in ecp_write_block_pio\n", port->name, r); 870 "in ecp_write_block_pio\n", port->name, r);
919 871
920 parport_frob_control(port, 872 parport_frob_control(port,
921 PARPORT_CONTROL_INIT, 873 PARPORT_CONTROL_INIT,
922 PARPORT_CONTROL_INIT); 874 PARPORT_CONTROL_INIT);
923 r = parport_wait_peripheral(port, 875 r = parport_wait_peripheral(port,
924 PARPORT_STATUS_PAPEROUT, 876 PARPORT_STATUS_PAPEROUT,
925 PARPORT_STATUS_PAPEROUT); 877 PARPORT_STATUS_PAPEROUT);
926 if (r) 878 if (r)
927 printk(KERN_DEBUG "%s: PE,2 timeout (%d) " 879 printk(KERN_DEBUG "%s: PE,2 timeout (%d) "
928 "in ecp_write_block_pio\n", port->name, r); 880 "in ecp_write_block_pio\n", port->name, r);
929 } 881 }
930 882
931 r = parport_wait_peripheral(port, 883 r = parport_wait_peripheral(port,
932 PARPORT_STATUS_BUSY, 884 PARPORT_STATUS_BUSY,
933 PARPORT_STATUS_BUSY); 885 PARPORT_STATUS_BUSY);
934 if (r) 886 if (r)
935 printk(KERN_DEBUG 887 printk(KERN_DEBUG
936 "%s: BUSY timeout (%d) in ecp_write_block_pio\n", 888 "%s: BUSY timeout (%d) in ecp_write_block_pio\n",
937 port->name, r); 889 port->name, r);
938 890
939 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE; 891 port->physport->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
940 892
941 return written; 893 return written;
942 } 894 }
943
944 #if 0
945 static size_t parport_pc_ecp_read_block_pio(struct parport *port,
946 void *buf, size_t length,
947 int flags)
948 {
949 size_t left = length;
950 size_t fifofull;
951 int r;
952 const int fifo = FIFO(port);
953 const struct parport_pc_private *priv = port->physport->private_data;
954 const int fifo_depth = priv->fifo_depth;
955 char *bufp = buf;
956
957 port = port->physport;
958 DPRINTK(KERN_DEBUG "parport_pc: parport_pc_ecp_read_block_pio\n");
959 dump_parport_state("enter fcn", port);
960
961 /* Special case: a timeout of zero means we cannot call schedule().
962 * Also if O_NONBLOCK is set then use the default implementation. */
963 if (port->cad->timeout <= PARPORT_INACTIVITY_O_NONBLOCK)
964 return parport_ieee1284_ecp_read_data(port, buf,
965 length, flags);
966
967 if (port->ieee1284.mode == IEEE1284_MODE_ECPRLE) {
968 /* If the peripheral is allowed to send RLE compressed
969 * data, it is possible for a byte to expand to 128
970 * bytes in the FIFO. */
971 fifofull = 128;
972 } else {
973 fifofull = fifo_depth;
974 }
975
976 /* If the caller wants less than a full FIFO's worth of data,
977 * go through software emulation. Otherwise we may have to throw
978 * away data. */
979 if (length < fifofull)
980 return parport_ieee1284_ecp_read_data(port, buf,
981 length, flags);
982
983 if (port->ieee1284.phase != IEEE1284_PH_REV_IDLE) {
984 /* change to reverse-idle phase (must be in forward-idle) */
985
986 /* Event 38: Set nAutoFd low (also make sure nStrobe is high) */
987 parport_frob_control(port,
988 PARPORT_CONTROL_AUTOFD
989 | PARPORT_CONTROL_STROBE,
990 PARPORT_CONTROL_AUTOFD);
991 parport_pc_data_reverse(port); /* Must be in PS2 mode */
992 udelay(5);
993 /* Event 39: Set nInit low to initiate bus reversal */
994 parport_frob_control(port,
995 PARPORT_CONTROL_INIT,
996 0);
997 /* Event 40: Wait for nAckReverse (PError) to go low */
998 r = parport_wait_peripheral(port, PARPORT_STATUS_PAPEROUT, 0);
999 if (r) {
1000 printk(KERN_DEBUG "%s: PE timeout Event 40 (%d) "
1001 "in ecp_read_block_pio\n", port->name, r);
1002 return 0;
1003 }
1004 }
1005
1006 /* Set up ECP FIFO mode.*/
1007 /* parport_pc_frob_control(port,
1008 PARPORT_CONTROL_STROBE |
1009 PARPORT_CONTROL_AUTOFD,
1010 PARPORT_CONTROL_AUTOFD); */
1011 r = change_mode(port, ECR_ECP); /* ECP FIFO */
1012 if (r)
1013 printk(KERN_DEBUG "%s: Warning change_mode ECR_ECP failed\n",
1014 port->name);
1015
1016 port->ieee1284.phase = IEEE1284_PH_REV_DATA;
1017
1018 /* the first byte must be collected manually */
1019 dump_parport_state("pre 43", port);
1020 /* Event 43: Wait for nAck to go low */
1021 r = parport_wait_peripheral(port, PARPORT_STATUS_ACK, 0);
1022 if (r) {
1023 /* timed out while reading -- no data */
1024 printk(KERN_DEBUG "PIO read timed out (initial byte)\n");
1025 goto out_no_data;
1026 }
1027 /* read byte */
1028 *bufp++ = inb(DATA(port));
1029 left--;
1030 dump_parport_state("43-44", port);
1031 /* Event 44: nAutoFd (HostAck) goes high to acknowledge */
1032 parport_pc_frob_control(port,
1033 PARPORT_CONTROL_AUTOFD,
1034 0);
1035 dump_parport_state("pre 45", port);
1036 /* Event 45: Wait for nAck to go high */
1037 /* r = parport_wait_peripheral(port, PARPORT_STATUS_ACK,
1038 PARPORT_STATUS_ACK); */
1039 dump_parport_state("post 45", port);
1040 r = 0;
1041 if (r) {
1042 /* timed out while waiting for peripheral to respond to ack */
1043 printk(KERN_DEBUG "ECP PIO read timed out (waiting for nAck)\n");
1044
1045 /* keep hold of the byte we've got already */
1046 goto out_no_data;
1047 }
1048 /* Event 46: nAutoFd (HostAck) goes low to accept more data */
1049 parport_pc_frob_control(port,
1050 PARPORT_CONTROL_AUTOFD,
1051 PARPORT_CONTROL_AUTOFD);
1052
1053
1054 dump_parport_state("rev idle", port);
1055 /* Do the transfer. */
1056 while (left > fifofull) {
1057 int ret;
1058 unsigned long expire = jiffies + port->cad->timeout;
1059 unsigned char ecrval = inb(ECONTROL(port));
1060
1061 if (need_resched() && time_before(jiffies, expire))
1062 /* Can't yield the port. */
1063 schedule();
1064
1065 /* At this point, the FIFO may already be full. In
1066 * that case ECP is already holding back the
1067 * peripheral (assuming proper design) with a delayed
1068 * handshake. Work fast to avoid a peripheral
1069 * timeout. */
1070
1071 if (ecrval & 0x01) {
1072 /* FIFO is empty. Wait for interrupt. */
1073 dump_parport_state("FIFO empty", port);
1074
1075 /* Anyone else waiting for the port? */
1076 if (port->waithead) {
1077 printk(KERN_DEBUG "Somebody wants the port\n");
1078 break;
1079 }
1080
1081 /* Clear serviceIntr */
1082 ECR_WRITE(port, ecrval & ~(1<<2));
1083 false_alarm:
1084 dump_parport_state("waiting", port);
1085 ret = parport_wait_event(port, HZ);
1086 DPRINTK(KERN_DEBUG "parport_wait_event returned %d\n",
1087 ret);
1088 if (ret < 0)
1089 break;
1090 ret = 0;
1091 if (!time_before(jiffies, expire)) {
1092 /* Timed out. */
1093 dump_parport_state("timeout", port);
1094 printk(KERN_DEBUG "PIO read timed out\n");
1095 break;
1096 }
1097 ecrval = inb(ECONTROL(port));
1098 if (!(ecrval & (1<<2))) {
1099 if (need_resched() &&
1100 time_before(jiffies, expire)) {
1101 schedule();
1102 }
1103 goto false_alarm;
1104 }
1105
1106 /* Depending on how the FIFO threshold was
1107 * set, how long interrupt service took, and
1108 * how fast the peripheral is, we might be
1109 * lucky and have a just filled FIFO. */
1110 continue;
1111 }
1112
1113 if (ecrval & 0x02) {
1114 /* FIFO is full. */
1115 dump_parport_state("FIFO full", port);
1116 insb(fifo, bufp, fifo_depth);
1117 bufp += fifo_depth;
1118 left -= fifo_depth;
1119 continue;
1120 }
1121
1122 DPRINTK(KERN_DEBUG
1123 "*** ecp_read_block_pio: reading one byte from the FIFO\n");
1124
1125 /* FIFO not filled. We will cycle this loop for a while
1126 * and either the peripheral will fill it faster,
1127 * tripping a fast empty with insb, or we empty it. */
1128 *bufp++ = inb(fifo);
1129 left--;
1130 }
1131
1132 /* scoop up anything left in the FIFO */
1133 while (left && !(inb(ECONTROL(port) & 0x01))) {
1134 *bufp++ = inb(fifo);
1135 left--;
1136 }
1137
1138 port->ieee1284.phase = IEEE1284_PH_REV_IDLE;
1139 dump_parport_state("rev idle2", port);
1140
1141 out_no_data:
1142
1143 /* Go to forward idle mode to shut the peripheral up (event 47). */
1144 parport_frob_control(port, PARPORT_CONTROL_INIT, PARPORT_CONTROL_INIT);
1145
1146 /* event 49: PError goes high */
1147 r = parport_wait_peripheral(port,
1148 PARPORT_STATUS_PAPEROUT,
1149 PARPORT_STATUS_PAPEROUT);
1150 if (r) {
1151 printk(KERN_DEBUG
1152 "%s: PE timeout FWDIDLE (%d) in ecp_read_block_pio\n",
1153 port->name, r);
1154 }
1155
1156 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
1157
1158 /* Finish up. */
1159 {
1160 int lost = get_fifo_residue(port);
1161 if (lost)
1162 /* Shouldn't happen with compliant peripherals. */
1163 printk(KERN_DEBUG "%s: DATA LOSS (%d bytes)!\n",
1164 port->name, lost);
1165 }
1166
1167 dump_parport_state("fwd idle", port);
1168 return length - left;
1169 }
1170 #endif /* 0 */
1171 #endif /* IEEE 1284 support */ 895 #endif /* IEEE 1284 support */
1172 #endif /* Allowed to use FIFO/DMA */ 896 #endif /* Allowed to use FIFO/DMA */
1173 897
1174 898
1175 /* 899 /*
1176 * ****************************************** 900 * ******************************************
1177 * INITIALISATION AND MODULE STUFF BELOW HERE 901 * INITIALISATION AND MODULE STUFF BELOW HERE
1178 * ****************************************** 902 * ******************************************
1179 */ 903 */
1180 904
1181 /* GCC is not inlining extern inline function later overwriten to non-inline, 905 /* GCC is not inlining extern inline function later overwriten to non-inline,
1182 so we use outlined_ variants here. */ 906 so we use outlined_ variants here. */
1183 static const struct parport_operations parport_pc_ops = { 907 static const struct parport_operations parport_pc_ops = {
1184 .write_data = parport_pc_write_data, 908 .write_data = parport_pc_write_data,
1185 .read_data = parport_pc_read_data, 909 .read_data = parport_pc_read_data,
1186 910
1187 .write_control = parport_pc_write_control, 911 .write_control = parport_pc_write_control,
1188 .read_control = parport_pc_read_control, 912 .read_control = parport_pc_read_control,
1189 .frob_control = parport_pc_frob_control, 913 .frob_control = parport_pc_frob_control,
1190 914
1191 .read_status = parport_pc_read_status, 915 .read_status = parport_pc_read_status,
1192 916
1193 .enable_irq = parport_pc_enable_irq, 917 .enable_irq = parport_pc_enable_irq,
1194 .disable_irq = parport_pc_disable_irq, 918 .disable_irq = parport_pc_disable_irq,
1195 919
1196 .data_forward = parport_pc_data_forward, 920 .data_forward = parport_pc_data_forward,
1197 .data_reverse = parport_pc_data_reverse, 921 .data_reverse = parport_pc_data_reverse,
1198 922
1199 .init_state = parport_pc_init_state, 923 .init_state = parport_pc_init_state,
1200 .save_state = parport_pc_save_state, 924 .save_state = parport_pc_save_state,
1201 .restore_state = parport_pc_restore_state, 925 .restore_state = parport_pc_restore_state,
1202 926
1203 .epp_write_data = parport_ieee1284_epp_write_data, 927 .epp_write_data = parport_ieee1284_epp_write_data,
1204 .epp_read_data = parport_ieee1284_epp_read_data, 928 .epp_read_data = parport_ieee1284_epp_read_data,
1205 .epp_write_addr = parport_ieee1284_epp_write_addr, 929 .epp_write_addr = parport_ieee1284_epp_write_addr,
1206 .epp_read_addr = parport_ieee1284_epp_read_addr, 930 .epp_read_addr = parport_ieee1284_epp_read_addr,
1207 931
1208 .ecp_write_data = parport_ieee1284_ecp_write_data, 932 .ecp_write_data = parport_ieee1284_ecp_write_data,
1209 .ecp_read_data = parport_ieee1284_ecp_read_data, 933 .ecp_read_data = parport_ieee1284_ecp_read_data,
1210 .ecp_write_addr = parport_ieee1284_ecp_write_addr, 934 .ecp_write_addr = parport_ieee1284_ecp_write_addr,
1211 935
1212 .compat_write_data = parport_ieee1284_write_compat, 936 .compat_write_data = parport_ieee1284_write_compat,
1213 .nibble_read_data = parport_ieee1284_read_nibble, 937 .nibble_read_data = parport_ieee1284_read_nibble,
1214 .byte_read_data = parport_ieee1284_read_byte, 938 .byte_read_data = parport_ieee1284_read_byte,
1215 939
1216 .owner = THIS_MODULE, 940 .owner = THIS_MODULE,
1217 }; 941 };
1218 942
1219 #ifdef CONFIG_PARPORT_PC_SUPERIO 943 #ifdef CONFIG_PARPORT_PC_SUPERIO
1220 944
1221 static struct superio_struct *find_free_superio(void) 945 static struct superio_struct *find_free_superio(void)
1222 { 946 {
1223 int i; 947 int i;
1224 for (i = 0; i < NR_SUPERIOS; i++) 948 for (i = 0; i < NR_SUPERIOS; i++)
1225 if (superios[i].io == 0) 949 if (superios[i].io == 0)
1226 return &superios[i]; 950 return &superios[i];
1227 return NULL; 951 return NULL;
1228 } 952 }
1229 953
1230 954
1231 /* Super-IO chipset detection, Winbond, SMSC */ 955 /* Super-IO chipset detection, Winbond, SMSC */
1232 static void __devinit show_parconfig_smsc37c669(int io, int key) 956 static void __devinit show_parconfig_smsc37c669(int io, int key)
1233 { 957 {
1234 int cr1, cr4, cra, cr23, cr26, cr27; 958 int cr1, cr4, cra, cr23, cr26, cr27;
1235 struct superio_struct *s; 959 struct superio_struct *s;
1236 960
1237 static const char *const modes[] = { 961 static const char *const modes[] = {
1238 "SPP and Bidirectional (PS/2)", 962 "SPP and Bidirectional (PS/2)",
1239 "EPP and SPP", 963 "EPP and SPP",
1240 "ECP", 964 "ECP",
1241 "ECP and EPP" }; 965 "ECP and EPP" };
1242 966
1243 outb(key, io); 967 outb(key, io);
1244 outb(key, io); 968 outb(key, io);
1245 outb(1, io); 969 outb(1, io);
1246 cr1 = inb(io + 1); 970 cr1 = inb(io + 1);
1247 outb(4, io); 971 outb(4, io);
1248 cr4 = inb(io + 1); 972 cr4 = inb(io + 1);
1249 outb(0x0a, io); 973 outb(0x0a, io);
1250 cra = inb(io + 1); 974 cra = inb(io + 1);
1251 outb(0x23, io); 975 outb(0x23, io);
1252 cr23 = inb(io + 1); 976 cr23 = inb(io + 1);
1253 outb(0x26, io); 977 outb(0x26, io);
1254 cr26 = inb(io + 1); 978 cr26 = inb(io + 1);
1255 outb(0x27, io); 979 outb(0x27, io);
1256 cr27 = inb(io + 1); 980 cr27 = inb(io + 1);
1257 outb(0xaa, io); 981 outb(0xaa, io);
1258 982
1259 if (verbose_probing) { 983 if (verbose_probing) {
1260 printk(KERN_INFO 984 printk(KERN_INFO
1261 "SMSC 37c669 LPT Config: cr_1=0x%02x, 4=0x%02x, " 985 "SMSC 37c669 LPT Config: cr_1=0x%02x, 4=0x%02x, "
1262 "A=0x%2x, 23=0x%02x, 26=0x%02x, 27=0x%02x\n", 986 "A=0x%2x, 23=0x%02x, 26=0x%02x, 27=0x%02x\n",
1263 cr1, cr4, cra, cr23, cr26, cr27); 987 cr1, cr4, cra, cr23, cr26, cr27);
1264 988
1265 /* The documentation calls DMA and IRQ-Lines by letters, so 989 /* The documentation calls DMA and IRQ-Lines by letters, so
1266 the board maker can/will wire them 990 the board maker can/will wire them
1267 appropriately/randomly... G=reserved H=IDE-irq, */ 991 appropriately/randomly... G=reserved H=IDE-irq, */
1268 printk(KERN_INFO 992 printk(KERN_INFO
1269 "SMSC LPT Config: io=0x%04x, irq=%c, dma=%c, fifo threshold=%d\n", 993 "SMSC LPT Config: io=0x%04x, irq=%c, dma=%c, fifo threshold=%d\n",
1270 cr23 * 4, 994 cr23 * 4,
1271 (cr27 & 0x0f) ? 'A' - 1 + (cr27 & 0x0f) : '-', 995 (cr27 & 0x0f) ? 'A' - 1 + (cr27 & 0x0f) : '-',
1272 (cr26 & 0x0f) ? 'A' - 1 + (cr26 & 0x0f) : '-', 996 (cr26 & 0x0f) ? 'A' - 1 + (cr26 & 0x0f) : '-',
1273 cra & 0x0f); 997 cra & 0x0f);
1274 printk(KERN_INFO "SMSC LPT Config: enabled=%s power=%s\n", 998 printk(KERN_INFO "SMSC LPT Config: enabled=%s power=%s\n",
1275 (cr23 * 4 >= 0x100) ? "yes" : "no", 999 (cr23 * 4 >= 0x100) ? "yes" : "no",
1276 (cr1 & 4) ? "yes" : "no"); 1000 (cr1 & 4) ? "yes" : "no");
1277 printk(KERN_INFO 1001 printk(KERN_INFO
1278 "SMSC LPT Config: Port mode=%s, EPP version =%s\n", 1002 "SMSC LPT Config: Port mode=%s, EPP version =%s\n",
1279 (cr1 & 0x08) ? "Standard mode only (SPP)" 1003 (cr1 & 0x08) ? "Standard mode only (SPP)"
1280 : modes[cr4 & 0x03], 1004 : modes[cr4 & 0x03],
1281 (cr4 & 0x40) ? "1.7" : "1.9"); 1005 (cr4 & 0x40) ? "1.7" : "1.9");
1282 } 1006 }
1283 1007
1284 /* Heuristics ! BIOS setup for this mainboard device limits 1008 /* Heuristics ! BIOS setup for this mainboard device limits
1285 the choices to standard settings, i.e. io-address and IRQ 1009 the choices to standard settings, i.e. io-address and IRQ
1286 are related, however DMA can be 1 or 3, assume DMA_A=DMA1, 1010 are related, however DMA can be 1 or 3, assume DMA_A=DMA1,
1287 DMA_C=DMA3 (this is true e.g. for TYAN 1564D Tomcat IV) */ 1011 DMA_C=DMA3 (this is true e.g. for TYAN 1564D Tomcat IV) */
1288 if (cr23 * 4 >= 0x100) { /* if active */ 1012 if (cr23 * 4 >= 0x100) { /* if active */
1289 s = find_free_superio(); 1013 s = find_free_superio();
1290 if (s == NULL) 1014 if (s == NULL)
1291 printk(KERN_INFO "Super-IO: too many chips!\n"); 1015 printk(KERN_INFO "Super-IO: too many chips!\n");
1292 else { 1016 else {
1293 int d; 1017 int d;
1294 switch (cr23 * 4) { 1018 switch (cr23 * 4) {
1295 case 0x3bc: 1019 case 0x3bc:
1296 s->io = 0x3bc; 1020 s->io = 0x3bc;
1297 s->irq = 7; 1021 s->irq = 7;
1298 break; 1022 break;
1299 case 0x378: 1023 case 0x378:
1300 s->io = 0x378; 1024 s->io = 0x378;
1301 s->irq = 7; 1025 s->irq = 7;
1302 break; 1026 break;
1303 case 0x278: 1027 case 0x278:
1304 s->io = 0x278; 1028 s->io = 0x278;
1305 s->irq = 5; 1029 s->irq = 5;
1306 } 1030 }
1307 d = (cr26 & 0x0f); 1031 d = (cr26 & 0x0f);
1308 if (d == 1 || d == 3) 1032 if (d == 1 || d == 3)
1309 s->dma = d; 1033 s->dma = d;
1310 else 1034 else
1311 s->dma = PARPORT_DMA_NONE; 1035 s->dma = PARPORT_DMA_NONE;
1312 } 1036 }
1313 } 1037 }
1314 } 1038 }
1315 1039
1316 1040
1317 static void __devinit show_parconfig_winbond(int io, int key) 1041 static void __devinit show_parconfig_winbond(int io, int key)
1318 { 1042 {
1319 int cr30, cr60, cr61, cr70, cr74, crf0; 1043 int cr30, cr60, cr61, cr70, cr74, crf0;
1320 struct superio_struct *s; 1044 struct superio_struct *s;
1321 static const char *const modes[] = { 1045 static const char *const modes[] = {
1322 "Standard (SPP) and Bidirectional(PS/2)", /* 0 */ 1046 "Standard (SPP) and Bidirectional(PS/2)", /* 0 */
1323 "EPP-1.9 and SPP", 1047 "EPP-1.9 and SPP",
1324 "ECP", 1048 "ECP",
1325 "ECP and EPP-1.9", 1049 "ECP and EPP-1.9",
1326 "Standard (SPP)", 1050 "Standard (SPP)",
1327 "EPP-1.7 and SPP", /* 5 */ 1051 "EPP-1.7 and SPP", /* 5 */
1328 "undefined!", 1052 "undefined!",
1329 "ECP and EPP-1.7" }; 1053 "ECP and EPP-1.7" };
1330 static char *const irqtypes[] = { 1054 static char *const irqtypes[] = {
1331 "pulsed low, high-Z", 1055 "pulsed low, high-Z",
1332 "follows nACK" }; 1056 "follows nACK" };
1333 1057
1334 /* The registers are called compatible-PnP because the 1058 /* The registers are called compatible-PnP because the
1335 register layout is modelled after ISA-PnP, the access 1059 register layout is modelled after ISA-PnP, the access
1336 method is just another ... */ 1060 method is just another ... */
1337 outb(key, io); 1061 outb(key, io);
1338 outb(key, io); 1062 outb(key, io);
1339 outb(0x07, io); /* Register 7: Select Logical Device */ 1063 outb(0x07, io); /* Register 7: Select Logical Device */
1340 outb(0x01, io + 1); /* LD1 is Parallel Port */ 1064 outb(0x01, io + 1); /* LD1 is Parallel Port */
1341 outb(0x30, io); 1065 outb(0x30, io);
1342 cr30 = inb(io + 1); 1066 cr30 = inb(io + 1);
1343 outb(0x60, io); 1067 outb(0x60, io);
1344 cr60 = inb(io + 1); 1068 cr60 = inb(io + 1);
1345 outb(0x61, io); 1069 outb(0x61, io);
1346 cr61 = inb(io + 1); 1070 cr61 = inb(io + 1);
1347 outb(0x70, io); 1071 outb(0x70, io);
1348 cr70 = inb(io + 1); 1072 cr70 = inb(io + 1);
1349 outb(0x74, io); 1073 outb(0x74, io);
1350 cr74 = inb(io + 1); 1074 cr74 = inb(io + 1);
1351 outb(0xf0, io); 1075 outb(0xf0, io);
1352 crf0 = inb(io + 1); 1076 crf0 = inb(io + 1);
1353 outb(0xaa, io); 1077 outb(0xaa, io);
1354 1078
1355 if (verbose_probing) { 1079 if (verbose_probing) {
1356 printk(KERN_INFO 1080 printk(KERN_INFO
1357 "Winbond LPT Config: cr_30=%02x 60,61=%02x%02x 70=%02x 74=%02x, f0=%02x\n", 1081 "Winbond LPT Config: cr_30=%02x 60,61=%02x%02x 70=%02x 74=%02x, f0=%02x\n",
1358 cr30, cr60, cr61, cr70, cr74, crf0); 1082 cr30, cr60, cr61, cr70, cr74, crf0);
1359 printk(KERN_INFO "Winbond LPT Config: active=%s, io=0x%02x%02x irq=%d, ", 1083 printk(KERN_INFO "Winbond LPT Config: active=%s, io=0x%02x%02x irq=%d, ",
1360 (cr30 & 0x01) ? "yes" : "no", cr60, cr61, cr70 & 0x0f); 1084 (cr30 & 0x01) ? "yes" : "no", cr60, cr61, cr70 & 0x0f);
1361 if ((cr74 & 0x07) > 3) 1085 if ((cr74 & 0x07) > 3)
1362 printk("dma=none\n"); 1086 printk("dma=none\n");
1363 else 1087 else
1364 printk("dma=%d\n", cr74 & 0x07); 1088 printk("dma=%d\n", cr74 & 0x07);
1365 printk(KERN_INFO 1089 printk(KERN_INFO
1366 "Winbond LPT Config: irqtype=%s, ECP fifo threshold=%d\n", 1090 "Winbond LPT Config: irqtype=%s, ECP fifo threshold=%d\n",
1367 irqtypes[crf0>>7], (crf0>>3)&0x0f); 1091 irqtypes[crf0>>7], (crf0>>3)&0x0f);
1368 printk(KERN_INFO "Winbond LPT Config: Port mode=%s\n", 1092 printk(KERN_INFO "Winbond LPT Config: Port mode=%s\n",
1369 modes[crf0 & 0x07]); 1093 modes[crf0 & 0x07]);
1370 } 1094 }
1371 1095
1372 if (cr30 & 0x01) { /* the settings can be interrogated later ... */ 1096 if (cr30 & 0x01) { /* the settings can be interrogated later ... */
1373 s = find_free_superio(); 1097 s = find_free_superio();
1374 if (s == NULL) 1098 if (s == NULL)
1375 printk(KERN_INFO "Super-IO: too many chips!\n"); 1099 printk(KERN_INFO "Super-IO: too many chips!\n");
1376 else { 1100 else {
1377 s->io = (cr60 << 8) | cr61; 1101 s->io = (cr60 << 8) | cr61;
1378 s->irq = cr70 & 0x0f; 1102 s->irq = cr70 & 0x0f;
1379 s->dma = (((cr74 & 0x07) > 3) ? 1103 s->dma = (((cr74 & 0x07) > 3) ?
1380 PARPORT_DMA_NONE : (cr74 & 0x07)); 1104 PARPORT_DMA_NONE : (cr74 & 0x07));
1381 } 1105 }
1382 } 1106 }
1383 } 1107 }
1384 1108
1385 static void __devinit decode_winbond(int efer, int key, int devid, 1109 static void __devinit decode_winbond(int efer, int key, int devid,
1386 int devrev, int oldid) 1110 int devrev, int oldid)
1387 { 1111 {
1388 const char *type = "unknown"; 1112 const char *type = "unknown";
1389 int id, progif = 2; 1113 int id, progif = 2;
1390 1114
1391 if (devid == devrev) 1115 if (devid == devrev)
1392 /* simple heuristics, we happened to read some 1116 /* simple heuristics, we happened to read some
1393 non-winbond register */ 1117 non-winbond register */
1394 return; 1118 return;
1395 1119
1396 id = (devid << 8) | devrev; 1120 id = (devid << 8) | devrev;
1397 1121
1398 /* Values are from public data sheets pdf files, I can just 1122 /* Values are from public data sheets pdf files, I can just
1399 confirm 83977TF is correct :-) */ 1123 confirm 83977TF is correct :-) */
1400 if (id == 0x9771) 1124 if (id == 0x9771)
1401 type = "83977F/AF"; 1125 type = "83977F/AF";
1402 else if (id == 0x9773) 1126 else if (id == 0x9773)
1403 type = "83977TF / SMSC 97w33x/97w34x"; 1127 type = "83977TF / SMSC 97w33x/97w34x";
1404 else if (id == 0x9774) 1128 else if (id == 0x9774)
1405 type = "83977ATF"; 1129 type = "83977ATF";
1406 else if ((id & ~0x0f) == 0x5270) 1130 else if ((id & ~0x0f) == 0x5270)
1407 type = "83977CTF / SMSC 97w36x"; 1131 type = "83977CTF / SMSC 97w36x";
1408 else if ((id & ~0x0f) == 0x52f0) 1132 else if ((id & ~0x0f) == 0x52f0)
1409 type = "83977EF / SMSC 97w35x"; 1133 type = "83977EF / SMSC 97w35x";
1410 else if ((id & ~0x0f) == 0x5210) 1134 else if ((id & ~0x0f) == 0x5210)
1411 type = "83627"; 1135 type = "83627";
1412 else if ((id & ~0x0f) == 0x6010) 1136 else if ((id & ~0x0f) == 0x6010)
1413 type = "83697HF"; 1137 type = "83697HF";
1414 else if ((oldid & 0x0f) == 0x0a) { 1138 else if ((oldid & 0x0f) == 0x0a) {
1415 type = "83877F"; 1139 type = "83877F";
1416 progif = 1; 1140 progif = 1;
1417 } else if ((oldid & 0x0f) == 0x0b) { 1141 } else if ((oldid & 0x0f) == 0x0b) {
1418 type = "83877AF"; 1142 type = "83877AF";
1419 progif = 1; 1143 progif = 1;
1420 } else if ((oldid & 0x0f) == 0x0c) { 1144 } else if ((oldid & 0x0f) == 0x0c) {
1421 type = "83877TF"; 1145 type = "83877TF";
1422 progif = 1; 1146 progif = 1;
1423 } else if ((oldid & 0x0f) == 0x0d) { 1147 } else if ((oldid & 0x0f) == 0x0d) {
1424 type = "83877ATF"; 1148 type = "83877ATF";
1425 progif = 1; 1149 progif = 1;
1426 } else 1150 } else
1427 progif = 0; 1151 progif = 0;
1428 1152
1429 if (verbose_probing) 1153 if (verbose_probing)
1430 printk(KERN_INFO "Winbond chip at EFER=0x%x key=0x%02x " 1154 printk(KERN_INFO "Winbond chip at EFER=0x%x key=0x%02x "
1431 "devid=%02x devrev=%02x oldid=%02x type=%s\n", 1155 "devid=%02x devrev=%02x oldid=%02x type=%s\n",
1432 efer, key, devid, devrev, oldid, type); 1156 efer, key, devid, devrev, oldid, type);
1433 1157
1434 if (progif == 2) 1158 if (progif == 2)
1435 show_parconfig_winbond(efer, key); 1159 show_parconfig_winbond(efer, key);
1436 } 1160 }
1437 1161
1438 static void __devinit decode_smsc(int efer, int key, int devid, int devrev) 1162 static void __devinit decode_smsc(int efer, int key, int devid, int devrev)
1439 { 1163 {
1440 const char *type = "unknown"; 1164 const char *type = "unknown";
1441 void (*func)(int io, int key); 1165 void (*func)(int io, int key);
1442 int id; 1166 int id;
1443 1167
1444 if (devid == devrev) 1168 if (devid == devrev)
1445 /* simple heuristics, we happened to read some 1169 /* simple heuristics, we happened to read some
1446 non-smsc register */ 1170 non-smsc register */
1447 return; 1171 return;
1448 1172
1449 func = NULL; 1173 func = NULL;
1450 id = (devid << 8) | devrev; 1174 id = (devid << 8) | devrev;
1451 1175
1452 if (id == 0x0302) { 1176 if (id == 0x0302) {
1453 type = "37c669"; 1177 type = "37c669";
1454 func = show_parconfig_smsc37c669; 1178 func = show_parconfig_smsc37c669;
1455 } else if (id == 0x6582) 1179 } else if (id == 0x6582)
1456 type = "37c665IR"; 1180 type = "37c665IR";
1457 else if (devid == 0x65) 1181 else if (devid == 0x65)
1458 type = "37c665GT"; 1182 type = "37c665GT";
1459 else if (devid == 0x66) 1183 else if (devid == 0x66)
1460 type = "37c666GT"; 1184 type = "37c666GT";
1461 1185
1462 if (verbose_probing) 1186 if (verbose_probing)
1463 printk(KERN_INFO "SMSC chip at EFER=0x%x " 1187 printk(KERN_INFO "SMSC chip at EFER=0x%x "
1464 "key=0x%02x devid=%02x devrev=%02x type=%s\n", 1188 "key=0x%02x devid=%02x devrev=%02x type=%s\n",
1465 efer, key, devid, devrev, type); 1189 efer, key, devid, devrev, type);
1466 1190
1467 if (func) 1191 if (func)
1468 func(efer, key); 1192 func(efer, key);
1469 } 1193 }
1470 1194
1471 1195
1472 static void __devinit winbond_check(int io, int key) 1196 static void __devinit winbond_check(int io, int key)
1473 { 1197 {
1474 int origval, devid, devrev, oldid, x_devid, x_devrev, x_oldid; 1198 int origval, devid, devrev, oldid, x_devid, x_devrev, x_oldid;
1475 1199
1476 if (!request_region(io, 3, __func__)) 1200 if (!request_region(io, 3, __func__))
1477 return; 1201 return;
1478 1202
1479 origval = inb(io); /* Save original value */ 1203 origval = inb(io); /* Save original value */
1480 1204
1481 /* First probe without key */ 1205 /* First probe without key */
1482 outb(0x20, io); 1206 outb(0x20, io);
1483 x_devid = inb(io + 1); 1207 x_devid = inb(io + 1);
1484 outb(0x21, io); 1208 outb(0x21, io);
1485 x_devrev = inb(io + 1); 1209 x_devrev = inb(io + 1);
1486 outb(0x09, io); 1210 outb(0x09, io);
1487 x_oldid = inb(io + 1); 1211 x_oldid = inb(io + 1);
1488 1212
1489 outb(key, io); 1213 outb(key, io);
1490 outb(key, io); /* Write Magic Sequence to EFER, extended 1214 outb(key, io); /* Write Magic Sequence to EFER, extended
1491 function enable register */ 1215 function enable register */
1492 outb(0x20, io); /* Write EFIR, extended function index register */ 1216 outb(0x20, io); /* Write EFIR, extended function index register */
1493 devid = inb(io + 1); /* Read EFDR, extended function data register */ 1217 devid = inb(io + 1); /* Read EFDR, extended function data register */
1494 outb(0x21, io); 1218 outb(0x21, io);
1495 devrev = inb(io + 1); 1219 devrev = inb(io + 1);
1496 outb(0x09, io); 1220 outb(0x09, io);
1497 oldid = inb(io + 1); 1221 oldid = inb(io + 1);
1498 outb(0xaa, io); /* Magic Seal */ 1222 outb(0xaa, io); /* Magic Seal */
1499 1223
1500 outb(origval, io); /* in case we poked some entirely different hardware */ 1224 outb(origval, io); /* in case we poked some entirely different hardware */
1501 1225
1502 if ((x_devid == devid) && (x_devrev == devrev) && (x_oldid == oldid)) 1226 if ((x_devid == devid) && (x_devrev == devrev) && (x_oldid == oldid))
1503 goto out; /* protection against false positives */ 1227 goto out; /* protection against false positives */
1504 1228
1505 decode_winbond(io, key, devid, devrev, oldid); 1229 decode_winbond(io, key, devid, devrev, oldid);
1506 out: 1230 out:
1507 release_region(io, 3); 1231 release_region(io, 3);
1508 } 1232 }
1509 1233
1510 static void __devinit winbond_check2(int io, int key) 1234 static void __devinit winbond_check2(int io, int key)
1511 { 1235 {
1512 int origval[3], devid, devrev, oldid, x_devid, x_devrev, x_oldid; 1236 int origval[3], devid, devrev, oldid, x_devid, x_devrev, x_oldid;
1513 1237
1514 if (!request_region(io, 3, __func__)) 1238 if (!request_region(io, 3, __func__))
1515 return; 1239 return;
1516 1240
1517 origval[0] = inb(io); /* Save original values */ 1241 origval[0] = inb(io); /* Save original values */
1518 origval[1] = inb(io + 1); 1242 origval[1] = inb(io + 1);
1519 origval[2] = inb(io + 2); 1243 origval[2] = inb(io + 2);
1520 1244
1521 /* First probe without the key */ 1245 /* First probe without the key */
1522 outb(0x20, io + 2); 1246 outb(0x20, io + 2);
1523 x_devid = inb(io + 2); 1247 x_devid = inb(io + 2);
1524 outb(0x21, io + 1); 1248 outb(0x21, io + 1);
1525 x_devrev = inb(io + 2); 1249 x_devrev = inb(io + 2);
1526 outb(0x09, io + 1); 1250 outb(0x09, io + 1);
1527 x_oldid = inb(io + 2); 1251 x_oldid = inb(io + 2);
1528 1252
1529 outb(key, io); /* Write Magic Byte to EFER, extended 1253 outb(key, io); /* Write Magic Byte to EFER, extended
1530 function enable register */ 1254 function enable register */
1531 outb(0x20, io + 2); /* Write EFIR, extended function index register */ 1255 outb(0x20, io + 2); /* Write EFIR, extended function index register */
1532 devid = inb(io + 2); /* Read EFDR, extended function data register */ 1256 devid = inb(io + 2); /* Read EFDR, extended function data register */
1533 outb(0x21, io + 1); 1257 outb(0x21, io + 1);
1534 devrev = inb(io + 2); 1258 devrev = inb(io + 2);
1535 outb(0x09, io + 1); 1259 outb(0x09, io + 1);
1536 oldid = inb(io + 2); 1260 oldid = inb(io + 2);
1537 outb(0xaa, io); /* Magic Seal */ 1261 outb(0xaa, io); /* Magic Seal */
1538 1262
1539 outb(origval[0], io); /* in case we poked some entirely different hardware */ 1263 outb(origval[0], io); /* in case we poked some entirely different hardware */
1540 outb(origval[1], io + 1); 1264 outb(origval[1], io + 1);
1541 outb(origval[2], io + 2); 1265 outb(origval[2], io + 2);
1542 1266
1543 if (x_devid == devid && x_devrev == devrev && x_oldid == oldid) 1267 if (x_devid == devid && x_devrev == devrev && x_oldid == oldid)
1544 goto out; /* protection against false positives */ 1268 goto out; /* protection against false positives */
1545 1269
1546 decode_winbond(io, key, devid, devrev, oldid); 1270 decode_winbond(io, key, devid, devrev, oldid);
1547 out: 1271 out:
1548 release_region(io, 3); 1272 release_region(io, 3);
1549 } 1273 }
1550 1274
1551 static void __devinit smsc_check(int io, int key) 1275 static void __devinit smsc_check(int io, int key)
1552 { 1276 {
1553 int origval, id, rev, oldid, oldrev, x_id, x_rev, x_oldid, x_oldrev; 1277 int origval, id, rev, oldid, oldrev, x_id, x_rev, x_oldid, x_oldrev;
1554 1278
1555 if (!request_region(io, 3, __func__)) 1279 if (!request_region(io, 3, __func__))
1556 return; 1280 return;
1557 1281
1558 origval = inb(io); /* Save original value */ 1282 origval = inb(io); /* Save original value */
1559 1283
1560 /* First probe without the key */ 1284 /* First probe without the key */
1561 outb(0x0d, io); 1285 outb(0x0d, io);
1562 x_oldid = inb(io + 1); 1286 x_oldid = inb(io + 1);
1563 outb(0x0e, io); 1287 outb(0x0e, io);
1564 x_oldrev = inb(io + 1); 1288 x_oldrev = inb(io + 1);
1565 outb(0x20, io); 1289 outb(0x20, io);
1566 x_id = inb(io + 1); 1290 x_id = inb(io + 1);
1567 outb(0x21, io); 1291 outb(0x21, io);
1568 x_rev = inb(io + 1); 1292 x_rev = inb(io + 1);
1569 1293
1570 outb(key, io); 1294 outb(key, io);
1571 outb(key, io); /* Write Magic Sequence to EFER, extended 1295 outb(key, io); /* Write Magic Sequence to EFER, extended
1572 function enable register */ 1296 function enable register */
1573 outb(0x0d, io); /* Write EFIR, extended function index register */ 1297 outb(0x0d, io); /* Write EFIR, extended function index register */
1574 oldid = inb(io + 1); /* Read EFDR, extended function data register */ 1298 oldid = inb(io + 1); /* Read EFDR, extended function data register */
1575 outb(0x0e, io); 1299 outb(0x0e, io);
1576 oldrev = inb(io + 1); 1300 oldrev = inb(io + 1);
1577 outb(0x20, io); 1301 outb(0x20, io);
1578 id = inb(io + 1); 1302 id = inb(io + 1);
1579 outb(0x21, io); 1303 outb(0x21, io);
1580 rev = inb(io + 1); 1304 rev = inb(io + 1);
1581 outb(0xaa, io); /* Magic Seal */ 1305 outb(0xaa, io); /* Magic Seal */
1582 1306
1583 outb(origval, io); /* in case we poked some entirely different hardware */ 1307 outb(origval, io); /* in case we poked some entirely different hardware */
1584 1308
1585 if (x_id == id && x_oldrev == oldrev && 1309 if (x_id == id && x_oldrev == oldrev &&
1586 x_oldid == oldid && x_rev == rev) 1310 x_oldid == oldid && x_rev == rev)
1587 goto out; /* protection against false positives */ 1311 goto out; /* protection against false positives */
1588 1312
1589 decode_smsc(io, key, oldid, oldrev); 1313 decode_smsc(io, key, oldid, oldrev);
1590 out: 1314 out:
1591 release_region(io, 3); 1315 release_region(io, 3);
1592 } 1316 }
1593 1317
1594 1318
1595 static void __devinit detect_and_report_winbond(void) 1319 static void __devinit detect_and_report_winbond(void)
1596 { 1320 {
1597 if (verbose_probing) 1321 if (verbose_probing)
1598 printk(KERN_DEBUG "Winbond Super-IO detection, now testing ports 3F0,370,250,4E,2E ...\n"); 1322 printk(KERN_DEBUG "Winbond Super-IO detection, now testing ports 3F0,370,250,4E,2E ...\n");
1599 winbond_check(0x3f0, 0x87); 1323 winbond_check(0x3f0, 0x87);
1600 winbond_check(0x370, 0x87); 1324 winbond_check(0x370, 0x87);
1601 winbond_check(0x2e , 0x87); 1325 winbond_check(0x2e , 0x87);
1602 winbond_check(0x4e , 0x87); 1326 winbond_check(0x4e , 0x87);
1603 winbond_check(0x3f0, 0x86); 1327 winbond_check(0x3f0, 0x86);
1604 winbond_check2(0x250, 0x88); 1328 winbond_check2(0x250, 0x88);
1605 winbond_check2(0x250, 0x89); 1329 winbond_check2(0x250, 0x89);
1606 } 1330 }
1607 1331
1608 static void __devinit detect_and_report_smsc(void) 1332 static void __devinit detect_and_report_smsc(void)
1609 { 1333 {
1610 if (verbose_probing) 1334 if (verbose_probing)
1611 printk(KERN_DEBUG "SMSC Super-IO detection, now testing Ports 2F0, 370 ...\n"); 1335 printk(KERN_DEBUG "SMSC Super-IO detection, now testing Ports 2F0, 370 ...\n");
1612 smsc_check(0x3f0, 0x55); 1336 smsc_check(0x3f0, 0x55);
1613 smsc_check(0x370, 0x55); 1337 smsc_check(0x370, 0x55);
1614 smsc_check(0x3f0, 0x44); 1338 smsc_check(0x3f0, 0x44);
1615 smsc_check(0x370, 0x44); 1339 smsc_check(0x370, 0x44);
1616 } 1340 }
1617 1341
1618 static void __devinit detect_and_report_it87(void) 1342 static void __devinit detect_and_report_it87(void)
1619 { 1343 {
1620 u16 dev; 1344 u16 dev;
1621 u8 origval, r; 1345 u8 origval, r;
1622 if (verbose_probing) 1346 if (verbose_probing)
1623 printk(KERN_DEBUG "IT8705 Super-IO detection, now testing port 2E ...\n"); 1347 printk(KERN_DEBUG "IT8705 Super-IO detection, now testing port 2E ...\n");
1624 if (!request_muxed_region(0x2e, 2, __func__)) 1348 if (!request_muxed_region(0x2e, 2, __func__))
1625 return; 1349 return;
1626 origval = inb(0x2e); /* Save original value */ 1350 origval = inb(0x2e); /* Save original value */
1627 outb(0x87, 0x2e); 1351 outb(0x87, 0x2e);
1628 outb(0x01, 0x2e); 1352 outb(0x01, 0x2e);
1629 outb(0x55, 0x2e); 1353 outb(0x55, 0x2e);
1630 outb(0x55, 0x2e); 1354 outb(0x55, 0x2e);
1631 outb(0x20, 0x2e); 1355 outb(0x20, 0x2e);
1632 dev = inb(0x2f) << 8; 1356 dev = inb(0x2f) << 8;
1633 outb(0x21, 0x2e); 1357 outb(0x21, 0x2e);
1634 dev |= inb(0x2f); 1358 dev |= inb(0x2f);
1635 if (dev == 0x8712 || dev == 0x8705 || dev == 0x8715 || 1359 if (dev == 0x8712 || dev == 0x8705 || dev == 0x8715 ||
1636 dev == 0x8716 || dev == 0x8718 || dev == 0x8726) { 1360 dev == 0x8716 || dev == 0x8718 || dev == 0x8726) {
1637 printk(KERN_INFO "IT%04X SuperIO detected.\n", dev); 1361 printk(KERN_INFO "IT%04X SuperIO detected.\n", dev);
1638 outb(0x07, 0x2E); /* Parallel Port */ 1362 outb(0x07, 0x2E); /* Parallel Port */
1639 outb(0x03, 0x2F); 1363 outb(0x03, 0x2F);
1640 outb(0xF0, 0x2E); /* BOOT 0x80 off */ 1364 outb(0xF0, 0x2E); /* BOOT 0x80 off */
1641 r = inb(0x2f); 1365 r = inb(0x2f);
1642 outb(0xF0, 0x2E); 1366 outb(0xF0, 0x2E);
1643 outb(r | 8, 0x2F); 1367 outb(r | 8, 0x2F);
1644 outb(0x02, 0x2E); /* Lock */ 1368 outb(0x02, 0x2E); /* Lock */
1645 outb(0x02, 0x2F); 1369 outb(0x02, 0x2F);
1646 } else { 1370 } else {
1647 outb(origval, 0x2e); /* Oops, sorry to disturb */ 1371 outb(origval, 0x2e); /* Oops, sorry to disturb */
1648 } 1372 }
1649 release_region(0x2e, 2); 1373 release_region(0x2e, 2);
1650 } 1374 }
1651 #endif /* CONFIG_PARPORT_PC_SUPERIO */ 1375 #endif /* CONFIG_PARPORT_PC_SUPERIO */
1652 1376
1653 static struct superio_struct *find_superio(struct parport *p) 1377 static struct superio_struct *find_superio(struct parport *p)
1654 { 1378 {
1655 int i; 1379 int i;
1656 for (i = 0; i < NR_SUPERIOS; i++) 1380 for (i = 0; i < NR_SUPERIOS; i++)
1657 if (superios[i].io != p->base) 1381 if (superios[i].io != p->base)
1658 return &superios[i]; 1382 return &superios[i];
1659 return NULL; 1383 return NULL;
1660 } 1384 }
1661 1385
1662 static int get_superio_dma(struct parport *p) 1386 static int get_superio_dma(struct parport *p)
1663 { 1387 {
1664 struct superio_struct *s = find_superio(p); 1388 struct superio_struct *s = find_superio(p);
1665 if (s) 1389 if (s)
1666 return s->dma; 1390 return s->dma;
1667 return PARPORT_DMA_NONE; 1391 return PARPORT_DMA_NONE;
1668 } 1392 }
1669 1393
1670 static int get_superio_irq(struct parport *p) 1394 static int get_superio_irq(struct parport *p)
1671 { 1395 {
1672 struct superio_struct *s = find_superio(p); 1396 struct superio_struct *s = find_superio(p);
1673 if (s) 1397 if (s)
1674 return s->irq; 1398 return s->irq;
1675 return PARPORT_IRQ_NONE; 1399 return PARPORT_IRQ_NONE;
1676 } 1400 }
1677 1401
1678 1402
1679 /* --- Mode detection ------------------------------------- */ 1403 /* --- Mode detection ------------------------------------- */
1680 1404
1681 /* 1405 /*
1682 * Checks for port existence, all ports support SPP MODE 1406 * Checks for port existence, all ports support SPP MODE
1683 * Returns: 1407 * Returns:
1684 * 0 : No parallel port at this address 1408 * 0 : No parallel port at this address
1685 * PARPORT_MODE_PCSPP : SPP port detected 1409 * PARPORT_MODE_PCSPP : SPP port detected
1686 * (if the user specified an ioport himself, 1410 * (if the user specified an ioport himself,
1687 * this shall always be the case!) 1411 * this shall always be the case!)
1688 * 1412 *
1689 */ 1413 */
1690 static int parport_SPP_supported(struct parport *pb) 1414 static int parport_SPP_supported(struct parport *pb)
1691 { 1415 {
1692 unsigned char r, w; 1416 unsigned char r, w;
1693 1417
1694 /* 1418 /*
1695 * first clear an eventually pending EPP timeout 1419 * first clear an eventually pending EPP timeout
1696 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset 1420 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
1697 * that does not even respond to SPP cycles if an EPP 1421 * that does not even respond to SPP cycles if an EPP
1698 * timeout is pending 1422 * timeout is pending
1699 */ 1423 */
1700 clear_epp_timeout(pb); 1424 clear_epp_timeout(pb);
1701 1425
1702 /* Do a simple read-write test to make sure the port exists. */ 1426 /* Do a simple read-write test to make sure the port exists. */
1703 w = 0xc; 1427 w = 0xc;
1704 outb(w, CONTROL(pb)); 1428 outb(w, CONTROL(pb));
1705 1429
1706 /* Is there a control register that we can read from? Some 1430 /* Is there a control register that we can read from? Some
1707 * ports don't allow reads, so read_control just returns a 1431 * ports don't allow reads, so read_control just returns a
1708 * software copy. Some ports _do_ allow reads, so bypass the 1432 * software copy. Some ports _do_ allow reads, so bypass the
1709 * software copy here. In addition, some bits aren't 1433 * software copy here. In addition, some bits aren't
1710 * writable. */ 1434 * writable. */
1711 r = inb(CONTROL(pb)); 1435 r = inb(CONTROL(pb));
1712 if ((r & 0xf) == w) { 1436 if ((r & 0xf) == w) {
1713 w = 0xe; 1437 w = 0xe;
1714 outb(w, CONTROL(pb)); 1438 outb(w, CONTROL(pb));
1715 r = inb(CONTROL(pb)); 1439 r = inb(CONTROL(pb));
1716 outb(0xc, CONTROL(pb)); 1440 outb(0xc, CONTROL(pb));
1717 if ((r & 0xf) == w) 1441 if ((r & 0xf) == w)
1718 return PARPORT_MODE_PCSPP; 1442 return PARPORT_MODE_PCSPP;
1719 } 1443 }
1720 1444
1721 if (user_specified) 1445 if (user_specified)
1722 /* That didn't work, but the user thinks there's a 1446 /* That didn't work, but the user thinks there's a
1723 * port here. */ 1447 * port here. */
1724 printk(KERN_INFO "parport 0x%lx (WARNING): CTR: " 1448 printk(KERN_INFO "parport 0x%lx (WARNING): CTR: "
1725 "wrote 0x%02x, read 0x%02x\n", pb->base, w, r); 1449 "wrote 0x%02x, read 0x%02x\n", pb->base, w, r);
1726 1450
1727 /* Try the data register. The data lines aren't tri-stated at 1451 /* Try the data register. The data lines aren't tri-stated at
1728 * this stage, so we expect back what we wrote. */ 1452 * this stage, so we expect back what we wrote. */
1729 w = 0xaa; 1453 w = 0xaa;
1730 parport_pc_write_data(pb, w); 1454 parport_pc_write_data(pb, w);
1731 r = parport_pc_read_data(pb); 1455 r = parport_pc_read_data(pb);
1732 if (r == w) { 1456 if (r == w) {
1733 w = 0x55; 1457 w = 0x55;
1734 parport_pc_write_data(pb, w); 1458 parport_pc_write_data(pb, w);
1735 r = parport_pc_read_data(pb); 1459 r = parport_pc_read_data(pb);
1736 if (r == w) 1460 if (r == w)
1737 return PARPORT_MODE_PCSPP; 1461 return PARPORT_MODE_PCSPP;
1738 } 1462 }
1739 1463
1740 if (user_specified) { 1464 if (user_specified) {
1741 /* Didn't work, but the user is convinced this is the 1465 /* Didn't work, but the user is convinced this is the
1742 * place. */ 1466 * place. */
1743 printk(KERN_INFO "parport 0x%lx (WARNING): DATA: " 1467 printk(KERN_INFO "parport 0x%lx (WARNING): DATA: "
1744 "wrote 0x%02x, read 0x%02x\n", pb->base, w, r); 1468 "wrote 0x%02x, read 0x%02x\n", pb->base, w, r);
1745 printk(KERN_INFO "parport 0x%lx: You gave this address, " 1469 printk(KERN_INFO "parport 0x%lx: You gave this address, "
1746 "but there is probably no parallel port there!\n", 1470 "but there is probably no parallel port there!\n",
1747 pb->base); 1471 pb->base);
1748 } 1472 }
1749 1473
1750 /* It's possible that we can't read the control register or 1474 /* It's possible that we can't read the control register or
1751 * the data register. In that case just believe the user. */ 1475 * the data register. In that case just believe the user. */
1752 if (user_specified) 1476 if (user_specified)
1753 return PARPORT_MODE_PCSPP; 1477 return PARPORT_MODE_PCSPP;
1754 1478
1755 return 0; 1479 return 0;
1756 } 1480 }
1757 1481
1758 /* Check for ECR 1482 /* Check for ECR
1759 * 1483 *
1760 * Old style XT ports alias io ports every 0x400, hence accessing ECR 1484 * Old style XT ports alias io ports every 0x400, hence accessing ECR
1761 * on these cards actually accesses the CTR. 1485 * on these cards actually accesses the CTR.
1762 * 1486 *
1763 * Modern cards don't do this but reading from ECR will return 0xff 1487 * Modern cards don't do this but reading from ECR will return 0xff
1764 * regardless of what is written here if the card does NOT support 1488 * regardless of what is written here if the card does NOT support
1765 * ECP. 1489 * ECP.
1766 * 1490 *
1767 * We first check to see if ECR is the same as CTR. If not, the low 1491 * We first check to see if ECR is the same as CTR. If not, the low
1768 * two bits of ECR aren't writable, so we check by writing ECR and 1492 * two bits of ECR aren't writable, so we check by writing ECR and
1769 * reading it back to see if it's what we expect. 1493 * reading it back to see if it's what we expect.
1770 */ 1494 */
1771 static int parport_ECR_present(struct parport *pb) 1495 static int parport_ECR_present(struct parport *pb)
1772 { 1496 {
1773 struct parport_pc_private *priv = pb->private_data; 1497 struct parport_pc_private *priv = pb->private_data;
1774 unsigned char r = 0xc; 1498 unsigned char r = 0xc;
1775 1499
1776 outb(r, CONTROL(pb)); 1500 outb(r, CONTROL(pb));
1777 if ((inb(ECONTROL(pb)) & 0x3) == (r & 0x3)) { 1501 if ((inb(ECONTROL(pb)) & 0x3) == (r & 0x3)) {
1778 outb(r ^ 0x2, CONTROL(pb)); /* Toggle bit 1 */ 1502 outb(r ^ 0x2, CONTROL(pb)); /* Toggle bit 1 */
1779 1503
1780 r = inb(CONTROL(pb)); 1504 r = inb(CONTROL(pb));
1781 if ((inb(ECONTROL(pb)) & 0x2) == (r & 0x2)) 1505 if ((inb(ECONTROL(pb)) & 0x2) == (r & 0x2))
1782 goto no_reg; /* Sure that no ECR register exists */ 1506 goto no_reg; /* Sure that no ECR register exists */
1783 } 1507 }
1784 1508
1785 if ((inb(ECONTROL(pb)) & 0x3) != 0x1) 1509 if ((inb(ECONTROL(pb)) & 0x3) != 0x1)
1786 goto no_reg; 1510 goto no_reg;
1787 1511
1788 ECR_WRITE(pb, 0x34); 1512 ECR_WRITE(pb, 0x34);
1789 if (inb(ECONTROL(pb)) != 0x35) 1513 if (inb(ECONTROL(pb)) != 0x35)
1790 goto no_reg; 1514 goto no_reg;
1791 1515
1792 priv->ecr = 1; 1516 priv->ecr = 1;
1793 outb(0xc, CONTROL(pb)); 1517 outb(0xc, CONTROL(pb));
1794 1518
1795 /* Go to mode 000 */ 1519 /* Go to mode 000 */
1796 frob_set_mode(pb, ECR_SPP); 1520 frob_set_mode(pb, ECR_SPP);
1797 1521
1798 return 1; 1522 return 1;
1799 1523
1800 no_reg: 1524 no_reg:
1801 outb(0xc, CONTROL(pb)); 1525 outb(0xc, CONTROL(pb));
1802 return 0; 1526 return 0;
1803 } 1527 }
1804 1528
1805 #ifdef CONFIG_PARPORT_1284 1529 #ifdef CONFIG_PARPORT_1284
1806 /* Detect PS/2 support. 1530 /* Detect PS/2 support.
1807 * 1531 *
1808 * Bit 5 (0x20) sets the PS/2 data direction; setting this high 1532 * Bit 5 (0x20) sets the PS/2 data direction; setting this high
1809 * allows us to read data from the data lines. In theory we would get back 1533 * allows us to read data from the data lines. In theory we would get back
1810 * 0xff but any peripheral attached to the port may drag some or all of the 1534 * 0xff but any peripheral attached to the port may drag some or all of the
1811 * lines down to zero. So if we get back anything that isn't the contents 1535 * lines down to zero. So if we get back anything that isn't the contents
1812 * of the data register we deem PS/2 support to be present. 1536 * of the data register we deem PS/2 support to be present.
1813 * 1537 *
1814 * Some SPP ports have "half PS/2" ability - you can't turn off the line 1538 * Some SPP ports have "half PS/2" ability - you can't turn off the line
1815 * drivers, but an external peripheral with sufficiently beefy drivers of 1539 * drivers, but an external peripheral with sufficiently beefy drivers of
1816 * its own can overpower them and assert its own levels onto the bus, from 1540 * its own can overpower them and assert its own levels onto the bus, from
1817 * where they can then be read back as normal. Ports with this property 1541 * where they can then be read back as normal. Ports with this property
1818 * and the right type of device attached are likely to fail the SPP test, 1542 * and the right type of device attached are likely to fail the SPP test,
1819 * (as they will appear to have stuck bits) and so the fact that they might 1543 * (as they will appear to have stuck bits) and so the fact that they might
1820 * be misdetected here is rather academic. 1544 * be misdetected here is rather academic.
1821 */ 1545 */
1822 1546
1823 static int parport_PS2_supported(struct parport *pb) 1547 static int parport_PS2_supported(struct parport *pb)
1824 { 1548 {
1825 int ok = 0; 1549 int ok = 0;
1826 1550
1827 clear_epp_timeout(pb); 1551 clear_epp_timeout(pb);
1828 1552
1829 /* try to tri-state the buffer */ 1553 /* try to tri-state the buffer */
1830 parport_pc_data_reverse(pb); 1554 parport_pc_data_reverse(pb);
1831 1555
1832 parport_pc_write_data(pb, 0x55); 1556 parport_pc_write_data(pb, 0x55);
1833 if (parport_pc_read_data(pb) != 0x55) 1557 if (parport_pc_read_data(pb) != 0x55)
1834 ok++; 1558 ok++;
1835 1559
1836 parport_pc_write_data(pb, 0xaa); 1560 parport_pc_write_data(pb, 0xaa);
1837 if (parport_pc_read_data(pb) != 0xaa) 1561 if (parport_pc_read_data(pb) != 0xaa)
1838 ok++; 1562 ok++;
1839 1563
1840 /* cancel input mode */ 1564 /* cancel input mode */
1841 parport_pc_data_forward(pb); 1565 parport_pc_data_forward(pb);
1842 1566
1843 if (ok) { 1567 if (ok) {
1844 pb->modes |= PARPORT_MODE_TRISTATE; 1568 pb->modes |= PARPORT_MODE_TRISTATE;
1845 } else { 1569 } else {
1846 struct parport_pc_private *priv = pb->private_data; 1570 struct parport_pc_private *priv = pb->private_data;
1847 priv->ctr_writable &= ~0x20; 1571 priv->ctr_writable &= ~0x20;
1848 } 1572 }
1849 1573
1850 return ok; 1574 return ok;
1851 } 1575 }
1852 1576
1853 #ifdef CONFIG_PARPORT_PC_FIFO 1577 #ifdef CONFIG_PARPORT_PC_FIFO
1854 static int parport_ECP_supported(struct parport *pb) 1578 static int parport_ECP_supported(struct parport *pb)
1855 { 1579 {
1856 int i; 1580 int i;
1857 int config, configb; 1581 int config, configb;
1858 int pword; 1582 int pword;
1859 struct parport_pc_private *priv = pb->private_data; 1583 struct parport_pc_private *priv = pb->private_data;
1860 /* Translate ECP intrLine to ISA irq value */ 1584 /* Translate ECP intrLine to ISA irq value */
1861 static const int intrline[] = { 0, 7, 9, 10, 11, 14, 15, 5 }; 1585 static const int intrline[] = { 0, 7, 9, 10, 11, 14, 15, 5 };
1862 1586
1863 /* If there is no ECR, we have no hope of supporting ECP. */ 1587 /* If there is no ECR, we have no hope of supporting ECP. */
1864 if (!priv->ecr) 1588 if (!priv->ecr)
1865 return 0; 1589 return 0;
1866 1590
1867 /* Find out FIFO depth */ 1591 /* Find out FIFO depth */
1868 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */ 1592 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1869 ECR_WRITE(pb, ECR_TST << 5); /* TEST FIFO */ 1593 ECR_WRITE(pb, ECR_TST << 5); /* TEST FIFO */
1870 for (i = 0; i < 1024 && !(inb(ECONTROL(pb)) & 0x02); i++) 1594 for (i = 0; i < 1024 && !(inb(ECONTROL(pb)) & 0x02); i++)
1871 outb(0xaa, FIFO(pb)); 1595 outb(0xaa, FIFO(pb));
1872 1596
1873 /* 1597 /*
1874 * Using LGS chipset it uses ECR register, but 1598 * Using LGS chipset it uses ECR register, but
1875 * it doesn't support ECP or FIFO MODE 1599 * it doesn't support ECP or FIFO MODE
1876 */ 1600 */
1877 if (i == 1024) { 1601 if (i == 1024) {
1878 ECR_WRITE(pb, ECR_SPP << 5); 1602 ECR_WRITE(pb, ECR_SPP << 5);
1879 return 0; 1603 return 0;
1880 } 1604 }
1881 1605
1882 priv->fifo_depth = i; 1606 priv->fifo_depth = i;
1883 if (verbose_probing) 1607 if (verbose_probing)
1884 printk(KERN_DEBUG "0x%lx: FIFO is %d bytes\n", pb->base, i); 1608 printk(KERN_DEBUG "0x%lx: FIFO is %d bytes\n", pb->base, i);
1885 1609
1886 /* Find out writeIntrThreshold */ 1610 /* Find out writeIntrThreshold */
1887 frob_econtrol(pb, 1<<2, 1<<2); 1611 frob_econtrol(pb, 1<<2, 1<<2);
1888 frob_econtrol(pb, 1<<2, 0); 1612 frob_econtrol(pb, 1<<2, 0);
1889 for (i = 1; i <= priv->fifo_depth; i++) { 1613 for (i = 1; i <= priv->fifo_depth; i++) {
1890 inb(FIFO(pb)); 1614 inb(FIFO(pb));
1891 udelay(50); 1615 udelay(50);
1892 if (inb(ECONTROL(pb)) & (1<<2)) 1616 if (inb(ECONTROL(pb)) & (1<<2))
1893 break; 1617 break;
1894 } 1618 }
1895 1619
1896 if (i <= priv->fifo_depth) { 1620 if (i <= priv->fifo_depth) {
1897 if (verbose_probing) 1621 if (verbose_probing)
1898 printk(KERN_DEBUG "0x%lx: writeIntrThreshold is %d\n", 1622 printk(KERN_DEBUG "0x%lx: writeIntrThreshold is %d\n",
1899 pb->base, i); 1623 pb->base, i);
1900 } else 1624 } else
1901 /* Number of bytes we know we can write if we get an 1625 /* Number of bytes we know we can write if we get an
1902 interrupt. */ 1626 interrupt. */
1903 i = 0; 1627 i = 0;
1904 1628
1905 priv->writeIntrThreshold = i; 1629 priv->writeIntrThreshold = i;
1906 1630
1907 /* Find out readIntrThreshold */ 1631 /* Find out readIntrThreshold */
1908 frob_set_mode(pb, ECR_PS2); /* Reset FIFO and enable PS2 */ 1632 frob_set_mode(pb, ECR_PS2); /* Reset FIFO and enable PS2 */
1909 parport_pc_data_reverse(pb); /* Must be in PS2 mode */ 1633 parport_pc_data_reverse(pb); /* Must be in PS2 mode */
1910 frob_set_mode(pb, ECR_TST); /* Test FIFO */ 1634 frob_set_mode(pb, ECR_TST); /* Test FIFO */
1911 frob_econtrol(pb, 1<<2, 1<<2); 1635 frob_econtrol(pb, 1<<2, 1<<2);
1912 frob_econtrol(pb, 1<<2, 0); 1636 frob_econtrol(pb, 1<<2, 0);
1913 for (i = 1; i <= priv->fifo_depth; i++) { 1637 for (i = 1; i <= priv->fifo_depth; i++) {
1914 outb(0xaa, FIFO(pb)); 1638 outb(0xaa, FIFO(pb));
1915 if (inb(ECONTROL(pb)) & (1<<2)) 1639 if (inb(ECONTROL(pb)) & (1<<2))
1916 break; 1640 break;
1917 } 1641 }
1918 1642
1919 if (i <= priv->fifo_depth) { 1643 if (i <= priv->fifo_depth) {
1920 if (verbose_probing) 1644 if (verbose_probing)
1921 printk(KERN_INFO "0x%lx: readIntrThreshold is %d\n", 1645 printk(KERN_INFO "0x%lx: readIntrThreshold is %d\n",
1922 pb->base, i); 1646 pb->base, i);
1923 } else 1647 } else
1924 /* Number of bytes we can read if we get an interrupt. */ 1648 /* Number of bytes we can read if we get an interrupt. */
1925 i = 0; 1649 i = 0;
1926 1650
1927 priv->readIntrThreshold = i; 1651 priv->readIntrThreshold = i;
1928 1652
1929 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */ 1653 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
1930 ECR_WRITE(pb, 0xf4); /* Configuration mode */ 1654 ECR_WRITE(pb, 0xf4); /* Configuration mode */
1931 config = inb(CONFIGA(pb)); 1655 config = inb(CONFIGA(pb));
1932 pword = (config >> 4) & 0x7; 1656 pword = (config >> 4) & 0x7;
1933 switch (pword) { 1657 switch (pword) {
1934 case 0: 1658 case 0:
1935 pword = 2; 1659 pword = 2;
1936 printk(KERN_WARNING "0x%lx: Unsupported pword size!\n", 1660 printk(KERN_WARNING "0x%lx: Unsupported pword size!\n",
1937 pb->base); 1661 pb->base);
1938 break; 1662 break;
1939 case 2: 1663 case 2:
1940 pword = 4; 1664 pword = 4;
1941 printk(KERN_WARNING "0x%lx: Unsupported pword size!\n", 1665 printk(KERN_WARNING "0x%lx: Unsupported pword size!\n",
1942 pb->base); 1666 pb->base);
1943 break; 1667 break;
1944 default: 1668 default:
1945 printk(KERN_WARNING "0x%lx: Unknown implementation ID\n", 1669 printk(KERN_WARNING "0x%lx: Unknown implementation ID\n",
1946 pb->base); 1670 pb->base);
1947 /* Assume 1 */ 1671 /* Assume 1 */
1948 case 1: 1672 case 1:
1949 pword = 1; 1673 pword = 1;
1950 } 1674 }
1951 priv->pword = pword; 1675 priv->pword = pword;
1952 1676
1953 if (verbose_probing) { 1677 if (verbose_probing) {
1954 printk(KERN_DEBUG "0x%lx: PWord is %d bits\n", 1678 printk(KERN_DEBUG "0x%lx: PWord is %d bits\n",
1955 pb->base, 8 * pword); 1679 pb->base, 8 * pword);
1956 1680
1957 printk(KERN_DEBUG "0x%lx: Interrupts are ISA-%s\n", pb->base, 1681 printk(KERN_DEBUG "0x%lx: Interrupts are ISA-%s\n", pb->base,
1958 config & 0x80 ? "Level" : "Pulses"); 1682 config & 0x80 ? "Level" : "Pulses");
1959 1683
1960 configb = inb(CONFIGB(pb)); 1684 configb = inb(CONFIGB(pb));
1961 printk(KERN_DEBUG "0x%lx: ECP port cfgA=0x%02x cfgB=0x%02x\n", 1685 printk(KERN_DEBUG "0x%lx: ECP port cfgA=0x%02x cfgB=0x%02x\n",
1962 pb->base, config, configb); 1686 pb->base, config, configb);
1963 printk(KERN_DEBUG "0x%lx: ECP settings irq=", pb->base); 1687 printk(KERN_DEBUG "0x%lx: ECP settings irq=", pb->base);
1964 if ((configb >> 3) & 0x07) 1688 if ((configb >> 3) & 0x07)
1965 printk("%d", intrline[(configb >> 3) & 0x07]); 1689 printk("%d", intrline[(configb >> 3) & 0x07]);
1966 else 1690 else
1967 printk("<none or set by other means>"); 1691 printk("<none or set by other means>");
1968 printk(" dma="); 1692 printk(" dma=");
1969 if ((configb & 0x03) == 0x00) 1693 if ((configb & 0x03) == 0x00)
1970 printk("<none or set by other means>\n"); 1694 printk("<none or set by other means>\n");
1971 else 1695 else
1972 printk("%d\n", configb & 0x07); 1696 printk("%d\n", configb & 0x07);
1973 } 1697 }
1974 1698
1975 /* Go back to mode 000 */ 1699 /* Go back to mode 000 */
1976 frob_set_mode(pb, ECR_SPP); 1700 frob_set_mode(pb, ECR_SPP);
1977 1701
1978 return 1; 1702 return 1;
1979 } 1703 }
1980 #endif 1704 #endif
1981 1705
1982 static int parport_ECPPS2_supported(struct parport *pb) 1706 static int parport_ECPPS2_supported(struct parport *pb)
1983 { 1707 {
1984 const struct parport_pc_private *priv = pb->private_data; 1708 const struct parport_pc_private *priv = pb->private_data;
1985 int result; 1709 int result;
1986 unsigned char oecr; 1710 unsigned char oecr;
1987 1711
1988 if (!priv->ecr) 1712 if (!priv->ecr)
1989 return 0; 1713 return 0;
1990 1714
1991 oecr = inb(ECONTROL(pb)); 1715 oecr = inb(ECONTROL(pb));
1992 ECR_WRITE(pb, ECR_PS2 << 5); 1716 ECR_WRITE(pb, ECR_PS2 << 5);
1993 result = parport_PS2_supported(pb); 1717 result = parport_PS2_supported(pb);
1994 ECR_WRITE(pb, oecr); 1718 ECR_WRITE(pb, oecr);
1995 return result; 1719 return result;
1996 } 1720 }
1997 1721
1998 /* EPP mode detection */ 1722 /* EPP mode detection */
1999 1723
2000 static int parport_EPP_supported(struct parport *pb) 1724 static int parport_EPP_supported(struct parport *pb)
2001 { 1725 {
2002 const struct parport_pc_private *priv = pb->private_data; 1726 const struct parport_pc_private *priv = pb->private_data;
2003 1727
2004 /* 1728 /*
2005 * Theory: 1729 * Theory:
2006 * Bit 0 of STR is the EPP timeout bit, this bit is 0 1730 * Bit 0 of STR is the EPP timeout bit, this bit is 0
2007 * when EPP is possible and is set high when an EPP timeout 1731 * when EPP is possible and is set high when an EPP timeout
2008 * occurs (EPP uses the HALT line to stop the CPU while it does 1732 * occurs (EPP uses the HALT line to stop the CPU while it does
2009 * the byte transfer, an EPP timeout occurs if the attached 1733 * the byte transfer, an EPP timeout occurs if the attached
2010 * device fails to respond after 10 micro seconds). 1734 * device fails to respond after 10 micro seconds).
2011 * 1735 *
2012 * This bit is cleared by either reading it (National Semi) 1736 * This bit is cleared by either reading it (National Semi)
2013 * or writing a 1 to the bit (SMC, UMC, WinBond), others ??? 1737 * or writing a 1 to the bit (SMC, UMC, WinBond), others ???
2014 * This bit is always high in non EPP modes. 1738 * This bit is always high in non EPP modes.
2015 */ 1739 */
2016 1740
2017 /* If EPP timeout bit clear then EPP available */ 1741 /* If EPP timeout bit clear then EPP available */
2018 if (!clear_epp_timeout(pb)) 1742 if (!clear_epp_timeout(pb))
2019 return 0; /* No way to clear timeout */ 1743 return 0; /* No way to clear timeout */
2020 1744
2021 /* Check for Intel bug. */ 1745 /* Check for Intel bug. */
2022 if (priv->ecr) { 1746 if (priv->ecr) {
2023 unsigned char i; 1747 unsigned char i;
2024 for (i = 0x00; i < 0x80; i += 0x20) { 1748 for (i = 0x00; i < 0x80; i += 0x20) {
2025 ECR_WRITE(pb, i); 1749 ECR_WRITE(pb, i);
2026 if (clear_epp_timeout(pb)) { 1750 if (clear_epp_timeout(pb)) {
2027 /* Phony EPP in ECP. */ 1751 /* Phony EPP in ECP. */
2028 return 0; 1752 return 0;
2029 } 1753 }
2030 } 1754 }
2031 } 1755 }
2032 1756
2033 pb->modes |= PARPORT_MODE_EPP; 1757 pb->modes |= PARPORT_MODE_EPP;
2034 1758
2035 /* Set up access functions to use EPP hardware. */ 1759 /* Set up access functions to use EPP hardware. */
2036 pb->ops->epp_read_data = parport_pc_epp_read_data; 1760 pb->ops->epp_read_data = parport_pc_epp_read_data;
2037 pb->ops->epp_write_data = parport_pc_epp_write_data; 1761 pb->ops->epp_write_data = parport_pc_epp_write_data;
2038 pb->ops->epp_read_addr = parport_pc_epp_read_addr; 1762 pb->ops->epp_read_addr = parport_pc_epp_read_addr;
2039 pb->ops->epp_write_addr = parport_pc_epp_write_addr; 1763 pb->ops->epp_write_addr = parport_pc_epp_write_addr;
2040 1764
2041 return 1; 1765 return 1;
2042 } 1766 }
2043 1767
2044 static int parport_ECPEPP_supported(struct parport *pb) 1768 static int parport_ECPEPP_supported(struct parport *pb)
2045 { 1769 {
2046 struct parport_pc_private *priv = pb->private_data; 1770 struct parport_pc_private *priv = pb->private_data;
2047 int result; 1771 int result;
2048 unsigned char oecr; 1772 unsigned char oecr;
2049 1773
2050 if (!priv->ecr) 1774 if (!priv->ecr)
2051 return 0; 1775 return 0;
2052 1776
2053 oecr = inb(ECONTROL(pb)); 1777 oecr = inb(ECONTROL(pb));
2054 /* Search for SMC style EPP+ECP mode */ 1778 /* Search for SMC style EPP+ECP mode */
2055 ECR_WRITE(pb, 0x80); 1779 ECR_WRITE(pb, 0x80);
2056 outb(0x04, CONTROL(pb)); 1780 outb(0x04, CONTROL(pb));
2057 result = parport_EPP_supported(pb); 1781 result = parport_EPP_supported(pb);
2058 1782
2059 ECR_WRITE(pb, oecr); 1783 ECR_WRITE(pb, oecr);
2060 1784
2061 if (result) { 1785 if (result) {
2062 /* Set up access functions to use ECP+EPP hardware. */ 1786 /* Set up access functions to use ECP+EPP hardware. */
2063 pb->ops->epp_read_data = parport_pc_ecpepp_read_data; 1787 pb->ops->epp_read_data = parport_pc_ecpepp_read_data;
2064 pb->ops->epp_write_data = parport_pc_ecpepp_write_data; 1788 pb->ops->epp_write_data = parport_pc_ecpepp_write_data;
2065 pb->ops->epp_read_addr = parport_pc_ecpepp_read_addr; 1789 pb->ops->epp_read_addr = parport_pc_ecpepp_read_addr;
2066 pb->ops->epp_write_addr = parport_pc_ecpepp_write_addr; 1790 pb->ops->epp_write_addr = parport_pc_ecpepp_write_addr;
2067 } 1791 }
2068 1792
2069 return result; 1793 return result;
2070 } 1794 }
2071 1795
2072 #else /* No IEEE 1284 support */ 1796 #else /* No IEEE 1284 support */
2073 1797
2074 /* Don't bother probing for modes we know we won't use. */ 1798 /* Don't bother probing for modes we know we won't use. */
2075 static int __devinit parport_PS2_supported(struct parport *pb) { return 0; } 1799 static int __devinit parport_PS2_supported(struct parport *pb) { return 0; }
2076 #ifdef CONFIG_PARPORT_PC_FIFO 1800 #ifdef CONFIG_PARPORT_PC_FIFO
2077 static int parport_ECP_supported(struct parport *pb) 1801 static int parport_ECP_supported(struct parport *pb)
2078 { 1802 {
2079 return 0; 1803 return 0;
2080 } 1804 }
2081 #endif 1805 #endif
2082 static int __devinit parport_EPP_supported(struct parport *pb) 1806 static int __devinit parport_EPP_supported(struct parport *pb)
2083 { 1807 {
2084 return 0; 1808 return 0;
2085 } 1809 }
2086 1810
2087 static int __devinit parport_ECPEPP_supported(struct parport *pb) 1811 static int __devinit parport_ECPEPP_supported(struct parport *pb)
2088 { 1812 {
2089 return 0; 1813 return 0;
2090 } 1814 }
2091 1815
2092 static int __devinit parport_ECPPS2_supported(struct parport *pb) 1816 static int __devinit parport_ECPPS2_supported(struct parport *pb)
2093 { 1817 {
2094 return 0; 1818 return 0;
2095 } 1819 }
2096 1820
2097 #endif /* No IEEE 1284 support */ 1821 #endif /* No IEEE 1284 support */
2098 1822
2099 /* --- IRQ detection -------------------------------------- */ 1823 /* --- IRQ detection -------------------------------------- */
2100 1824
2101 /* Only if supports ECP mode */ 1825 /* Only if supports ECP mode */
2102 static int programmable_irq_support(struct parport *pb) 1826 static int programmable_irq_support(struct parport *pb)
2103 { 1827 {
2104 int irq, intrLine; 1828 int irq, intrLine;
2105 unsigned char oecr = inb(ECONTROL(pb)); 1829 unsigned char oecr = inb(ECONTROL(pb));
2106 static const int lookup[8] = { 1830 static const int lookup[8] = {
2107 PARPORT_IRQ_NONE, 7, 9, 10, 11, 14, 15, 5 1831 PARPORT_IRQ_NONE, 7, 9, 10, 11, 14, 15, 5
2108 }; 1832 };
2109 1833
2110 ECR_WRITE(pb, ECR_CNF << 5); /* Configuration MODE */ 1834 ECR_WRITE(pb, ECR_CNF << 5); /* Configuration MODE */
2111 1835
2112 intrLine = (inb(CONFIGB(pb)) >> 3) & 0x07; 1836 intrLine = (inb(CONFIGB(pb)) >> 3) & 0x07;
2113 irq = lookup[intrLine]; 1837 irq = lookup[intrLine];
2114 1838
2115 ECR_WRITE(pb, oecr); 1839 ECR_WRITE(pb, oecr);
2116 return irq; 1840 return irq;
2117 } 1841 }
2118 1842
2119 static int irq_probe_ECP(struct parport *pb) 1843 static int irq_probe_ECP(struct parport *pb)
2120 { 1844 {
2121 int i; 1845 int i;
2122 unsigned long irqs; 1846 unsigned long irqs;
2123 1847
2124 irqs = probe_irq_on(); 1848 irqs = probe_irq_on();
2125 1849
2126 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */ 1850 ECR_WRITE(pb, ECR_SPP << 5); /* Reset FIFO */
2127 ECR_WRITE(pb, (ECR_TST << 5) | 0x04); 1851 ECR_WRITE(pb, (ECR_TST << 5) | 0x04);
2128 ECR_WRITE(pb, ECR_TST << 5); 1852 ECR_WRITE(pb, ECR_TST << 5);
2129 1853
2130 /* If Full FIFO sure that writeIntrThreshold is generated */ 1854 /* If Full FIFO sure that writeIntrThreshold is generated */
2131 for (i = 0; i < 1024 && !(inb(ECONTROL(pb)) & 0x02) ; i++) 1855 for (i = 0; i < 1024 && !(inb(ECONTROL(pb)) & 0x02) ; i++)
2132 outb(0xaa, FIFO(pb)); 1856 outb(0xaa, FIFO(pb));
2133 1857
2134 pb->irq = probe_irq_off(irqs); 1858 pb->irq = probe_irq_off(irqs);
2135 ECR_WRITE(pb, ECR_SPP << 5); 1859 ECR_WRITE(pb, ECR_SPP << 5);
2136 1860
2137 if (pb->irq <= 0) 1861 if (pb->irq <= 0)
2138 pb->irq = PARPORT_IRQ_NONE; 1862 pb->irq = PARPORT_IRQ_NONE;
2139 1863
2140 return pb->irq; 1864 return pb->irq;
2141 } 1865 }
2142 1866
2143 /* 1867 /*
2144 * This detection seems that only works in National Semiconductors 1868 * This detection seems that only works in National Semiconductors
2145 * This doesn't work in SMC, LGS, and Winbond 1869 * This doesn't work in SMC, LGS, and Winbond
2146 */ 1870 */
2147 static int irq_probe_EPP(struct parport *pb) 1871 static int irq_probe_EPP(struct parport *pb)
2148 { 1872 {
2149 #ifndef ADVANCED_DETECT 1873 #ifndef ADVANCED_DETECT
2150 return PARPORT_IRQ_NONE; 1874 return PARPORT_IRQ_NONE;
2151 #else 1875 #else
2152 int irqs; 1876 int irqs;
2153 unsigned char oecr; 1877 unsigned char oecr;
2154 1878
2155 if (pb->modes & PARPORT_MODE_PCECR) 1879 if (pb->modes & PARPORT_MODE_PCECR)
2156 oecr = inb(ECONTROL(pb)); 1880 oecr = inb(ECONTROL(pb));
2157 1881
2158 irqs = probe_irq_on(); 1882 irqs = probe_irq_on();
2159 1883
2160 if (pb->modes & PARPORT_MODE_PCECR) 1884 if (pb->modes & PARPORT_MODE_PCECR)
2161 frob_econtrol(pb, 0x10, 0x10); 1885 frob_econtrol(pb, 0x10, 0x10);
2162 1886
2163 clear_epp_timeout(pb); 1887 clear_epp_timeout(pb);
2164 parport_pc_frob_control(pb, 0x20, 0x20); 1888 parport_pc_frob_control(pb, 0x20, 0x20);
2165 parport_pc_frob_control(pb, 0x10, 0x10); 1889 parport_pc_frob_control(pb, 0x10, 0x10);
2166 clear_epp_timeout(pb); 1890 clear_epp_timeout(pb);
2167 1891
2168 /* Device isn't expecting an EPP read 1892 /* Device isn't expecting an EPP read
2169 * and generates an IRQ. 1893 * and generates an IRQ.
2170 */ 1894 */
2171 parport_pc_read_epp(pb); 1895 parport_pc_read_epp(pb);
2172 udelay(20); 1896 udelay(20);
2173 1897
2174 pb->irq = probe_irq_off(irqs); 1898 pb->irq = probe_irq_off(irqs);
2175 if (pb->modes & PARPORT_MODE_PCECR) 1899 if (pb->modes & PARPORT_MODE_PCECR)
2176 ECR_WRITE(pb, oecr); 1900 ECR_WRITE(pb, oecr);
2177 parport_pc_write_control(pb, 0xc); 1901 parport_pc_write_control(pb, 0xc);
2178 1902
2179 if (pb->irq <= 0) 1903 if (pb->irq <= 0)
2180 pb->irq = PARPORT_IRQ_NONE; 1904 pb->irq = PARPORT_IRQ_NONE;
2181 1905
2182 return pb->irq; 1906 return pb->irq;
2183 #endif /* Advanced detection */ 1907 #endif /* Advanced detection */
2184 } 1908 }
2185 1909
2186 static int irq_probe_SPP(struct parport *pb) 1910 static int irq_probe_SPP(struct parport *pb)
2187 { 1911 {
2188 /* Don't even try to do this. */ 1912 /* Don't even try to do this. */
2189 return PARPORT_IRQ_NONE; 1913 return PARPORT_IRQ_NONE;
2190 } 1914 }
2191 1915
2192 /* We will attempt to share interrupt requests since other devices 1916 /* We will attempt to share interrupt requests since other devices
2193 * such as sound cards and network cards seem to like using the 1917 * such as sound cards and network cards seem to like using the
2194 * printer IRQs. 1918 * printer IRQs.
2195 * 1919 *
2196 * When ECP is available we can autoprobe for IRQs. 1920 * When ECP is available we can autoprobe for IRQs.
2197 * NOTE: If we can autoprobe it, we can register the IRQ. 1921 * NOTE: If we can autoprobe it, we can register the IRQ.
2198 */ 1922 */
2199 static int parport_irq_probe(struct parport *pb) 1923 static int parport_irq_probe(struct parport *pb)
2200 { 1924 {
2201 struct parport_pc_private *priv = pb->private_data; 1925 struct parport_pc_private *priv = pb->private_data;
2202 1926
2203 if (priv->ecr) { 1927 if (priv->ecr) {
2204 pb->irq = programmable_irq_support(pb); 1928 pb->irq = programmable_irq_support(pb);
2205 1929
2206 if (pb->irq == PARPORT_IRQ_NONE) 1930 if (pb->irq == PARPORT_IRQ_NONE)
2207 pb->irq = irq_probe_ECP(pb); 1931 pb->irq = irq_probe_ECP(pb);
2208 } 1932 }
2209 1933
2210 if ((pb->irq == PARPORT_IRQ_NONE) && priv->ecr && 1934 if ((pb->irq == PARPORT_IRQ_NONE) && priv->ecr &&
2211 (pb->modes & PARPORT_MODE_EPP)) 1935 (pb->modes & PARPORT_MODE_EPP))
2212 pb->irq = irq_probe_EPP(pb); 1936 pb->irq = irq_probe_EPP(pb);
2213 1937
2214 clear_epp_timeout(pb); 1938 clear_epp_timeout(pb);
2215 1939
2216 if (pb->irq == PARPORT_IRQ_NONE && (pb->modes & PARPORT_MODE_EPP)) 1940 if (pb->irq == PARPORT_IRQ_NONE && (pb->modes & PARPORT_MODE_EPP))
2217 pb->irq = irq_probe_EPP(pb); 1941 pb->irq = irq_probe_EPP(pb);
2218 1942
2219 clear_epp_timeout(pb); 1943 clear_epp_timeout(pb);
2220 1944
2221 if (pb->irq == PARPORT_IRQ_NONE) 1945 if (pb->irq == PARPORT_IRQ_NONE)
2222 pb->irq = irq_probe_SPP(pb); 1946 pb->irq = irq_probe_SPP(pb);
2223 1947
2224 if (pb->irq == PARPORT_IRQ_NONE) 1948 if (pb->irq == PARPORT_IRQ_NONE)
2225 pb->irq = get_superio_irq(pb); 1949 pb->irq = get_superio_irq(pb);
2226 1950
2227 return pb->irq; 1951 return pb->irq;
2228 } 1952 }
2229 1953
2230 /* --- DMA detection -------------------------------------- */ 1954 /* --- DMA detection -------------------------------------- */
2231 1955
2232 /* Only if chipset conforms to ECP ISA Interface Standard */ 1956 /* Only if chipset conforms to ECP ISA Interface Standard */
2233 static int programmable_dma_support(struct parport *p) 1957 static int programmable_dma_support(struct parport *p)
2234 { 1958 {
2235 unsigned char oecr = inb(ECONTROL(p)); 1959 unsigned char oecr = inb(ECONTROL(p));
2236 int dma; 1960 int dma;
2237 1961
2238 frob_set_mode(p, ECR_CNF); 1962 frob_set_mode(p, ECR_CNF);
2239 1963
2240 dma = inb(CONFIGB(p)) & 0x07; 1964 dma = inb(CONFIGB(p)) & 0x07;
2241 /* 000: Indicates jumpered 8-bit DMA if read-only. 1965 /* 000: Indicates jumpered 8-bit DMA if read-only.
2242 100: Indicates jumpered 16-bit DMA if read-only. */ 1966 100: Indicates jumpered 16-bit DMA if read-only. */
2243 if ((dma & 0x03) == 0) 1967 if ((dma & 0x03) == 0)
2244 dma = PARPORT_DMA_NONE; 1968 dma = PARPORT_DMA_NONE;
2245 1969
2246 ECR_WRITE(p, oecr); 1970 ECR_WRITE(p, oecr);
2247 return dma; 1971 return dma;
2248 } 1972 }
2249 1973
2250 static int parport_dma_probe(struct parport *p) 1974 static int parport_dma_probe(struct parport *p)
2251 { 1975 {
2252 const struct parport_pc_private *priv = p->private_data; 1976 const struct parport_pc_private *priv = p->private_data;
2253 if (priv->ecr) /* ask ECP chipset first */ 1977 if (priv->ecr) /* ask ECP chipset first */
2254 p->dma = programmable_dma_support(p); 1978 p->dma = programmable_dma_support(p);
2255 if (p->dma == PARPORT_DMA_NONE) { 1979 if (p->dma == PARPORT_DMA_NONE) {
2256 /* ask known Super-IO chips proper, although these 1980 /* ask known Super-IO chips proper, although these
2257 claim ECP compatible, some don't report their DMA 1981 claim ECP compatible, some don't report their DMA
2258 conforming to ECP standards */ 1982 conforming to ECP standards */
2259 p->dma = get_superio_dma(p); 1983 p->dma = get_superio_dma(p);
2260 } 1984 }
2261 1985
2262 return p->dma; 1986 return p->dma;
2263 } 1987 }
2264 1988
2265 /* --- Initialisation code -------------------------------- */ 1989 /* --- Initialisation code -------------------------------- */
2266 1990
2267 static LIST_HEAD(ports_list); 1991 static LIST_HEAD(ports_list);
2268 static DEFINE_SPINLOCK(ports_lock); 1992 static DEFINE_SPINLOCK(ports_lock);
2269 1993
2270 struct parport *parport_pc_probe_port(unsigned long int base, 1994 struct parport *parport_pc_probe_port(unsigned long int base,
2271 unsigned long int base_hi, 1995 unsigned long int base_hi,
2272 int irq, int dma, 1996 int irq, int dma,
2273 struct device *dev, 1997 struct device *dev,
2274 int irqflags) 1998 int irqflags)
2275 { 1999 {
2276 struct parport_pc_private *priv; 2000 struct parport_pc_private *priv;
2277 struct parport_operations *ops; 2001 struct parport_operations *ops;
2278 struct parport *p; 2002 struct parport *p;
2279 int probedirq = PARPORT_IRQ_NONE; 2003 int probedirq = PARPORT_IRQ_NONE;
2280 struct resource *base_res; 2004 struct resource *base_res;
2281 struct resource *ECR_res = NULL; 2005 struct resource *ECR_res = NULL;
2282 struct resource *EPP_res = NULL; 2006 struct resource *EPP_res = NULL;
2283 struct platform_device *pdev = NULL; 2007 struct platform_device *pdev = NULL;
2284 2008
2285 if (!dev) { 2009 if (!dev) {
2286 /* We need a physical device to attach to, but none was 2010 /* We need a physical device to attach to, but none was
2287 * provided. Create our own. */ 2011 * provided. Create our own. */
2288 pdev = platform_device_register_simple("parport_pc", 2012 pdev = platform_device_register_simple("parport_pc",
2289 base, NULL, 0); 2013 base, NULL, 0);
2290 if (IS_ERR(pdev)) 2014 if (IS_ERR(pdev))
2291 return NULL; 2015 return NULL;
2292 dev = &pdev->dev; 2016 dev = &pdev->dev;
2293 2017
2294 dev->coherent_dma_mask = DMA_BIT_MASK(24); 2018 dev->coherent_dma_mask = DMA_BIT_MASK(24);
2295 dev->dma_mask = &dev->coherent_dma_mask; 2019 dev->dma_mask = &dev->coherent_dma_mask;
2296 } 2020 }
2297 2021
2298 ops = kmalloc(sizeof(struct parport_operations), GFP_KERNEL); 2022 ops = kmalloc(sizeof(struct parport_operations), GFP_KERNEL);
2299 if (!ops) 2023 if (!ops)
2300 goto out1; 2024 goto out1;
2301 2025
2302 priv = kmalloc(sizeof(struct parport_pc_private), GFP_KERNEL); 2026 priv = kmalloc(sizeof(struct parport_pc_private), GFP_KERNEL);
2303 if (!priv) 2027 if (!priv)
2304 goto out2; 2028 goto out2;
2305 2029
2306 /* a misnomer, actually - it's allocate and reserve parport number */ 2030 /* a misnomer, actually - it's allocate and reserve parport number */
2307 p = parport_register_port(base, irq, dma, ops); 2031 p = parport_register_port(base, irq, dma, ops);
2308 if (!p) 2032 if (!p)
2309 goto out3; 2033 goto out3;
2310 2034
2311 base_res = request_region(base, 3, p->name); 2035 base_res = request_region(base, 3, p->name);
2312 if (!base_res) 2036 if (!base_res)
2313 goto out4; 2037 goto out4;
2314 2038
2315 memcpy(ops, &parport_pc_ops, sizeof(struct parport_operations)); 2039 memcpy(ops, &parport_pc_ops, sizeof(struct parport_operations));
2316 priv->ctr = 0xc; 2040 priv->ctr = 0xc;
2317 priv->ctr_writable = ~0x10; 2041 priv->ctr_writable = ~0x10;
2318 priv->ecr = 0; 2042 priv->ecr = 0;
2319 priv->fifo_depth = 0; 2043 priv->fifo_depth = 0;
2320 priv->dma_buf = NULL; 2044 priv->dma_buf = NULL;
2321 priv->dma_handle = 0; 2045 priv->dma_handle = 0;
2322 INIT_LIST_HEAD(&priv->list); 2046 INIT_LIST_HEAD(&priv->list);
2323 priv->port = p; 2047 priv->port = p;
2324 2048
2325 p->dev = dev; 2049 p->dev = dev;
2326 p->base_hi = base_hi; 2050 p->base_hi = base_hi;
2327 p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT; 2051 p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT;
2328 p->private_data = priv; 2052 p->private_data = priv;
2329 2053
2330 if (base_hi) { 2054 if (base_hi) {
2331 ECR_res = request_region(base_hi, 3, p->name); 2055 ECR_res = request_region(base_hi, 3, p->name);
2332 if (ECR_res) 2056 if (ECR_res)
2333 parport_ECR_present(p); 2057 parport_ECR_present(p);
2334 } 2058 }
2335 2059
2336 if (base != 0x3bc) { 2060 if (base != 0x3bc) {
2337 EPP_res = request_region(base+0x3, 5, p->name); 2061 EPP_res = request_region(base+0x3, 5, p->name);
2338 if (EPP_res) 2062 if (EPP_res)
2339 if (!parport_EPP_supported(p)) 2063 if (!parport_EPP_supported(p))
2340 parport_ECPEPP_supported(p); 2064 parport_ECPEPP_supported(p);
2341 } 2065 }
2342 if (!parport_SPP_supported(p)) 2066 if (!parport_SPP_supported(p))
2343 /* No port. */ 2067 /* No port. */
2344 goto out5; 2068 goto out5;
2345 if (priv->ecr) 2069 if (priv->ecr)
2346 parport_ECPPS2_supported(p); 2070 parport_ECPPS2_supported(p);
2347 else 2071 else
2348 parport_PS2_supported(p); 2072 parport_PS2_supported(p);
2349 2073
2350 p->size = (p->modes & PARPORT_MODE_EPP) ? 8 : 3; 2074 p->size = (p->modes & PARPORT_MODE_EPP) ? 8 : 3;
2351 2075
2352 printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base); 2076 printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
2353 if (p->base_hi && priv->ecr) 2077 if (p->base_hi && priv->ecr)
2354 printk(" (0x%lx)", p->base_hi); 2078 printk(" (0x%lx)", p->base_hi);
2355 if (p->irq == PARPORT_IRQ_AUTO) { 2079 if (p->irq == PARPORT_IRQ_AUTO) {
2356 p->irq = PARPORT_IRQ_NONE; 2080 p->irq = PARPORT_IRQ_NONE;
2357 parport_irq_probe(p); 2081 parport_irq_probe(p);
2358 } else if (p->irq == PARPORT_IRQ_PROBEONLY) { 2082 } else if (p->irq == PARPORT_IRQ_PROBEONLY) {
2359 p->irq = PARPORT_IRQ_NONE; 2083 p->irq = PARPORT_IRQ_NONE;
2360 parport_irq_probe(p); 2084 parport_irq_probe(p);
2361 probedirq = p->irq; 2085 probedirq = p->irq;
2362 p->irq = PARPORT_IRQ_NONE; 2086 p->irq = PARPORT_IRQ_NONE;
2363 } 2087 }
2364 if (p->irq != PARPORT_IRQ_NONE) { 2088 if (p->irq != PARPORT_IRQ_NONE) {
2365 printk(", irq %d", p->irq); 2089 printk(", irq %d", p->irq);
2366 priv->ctr_writable |= 0x10; 2090 priv->ctr_writable |= 0x10;
2367 2091
2368 if (p->dma == PARPORT_DMA_AUTO) { 2092 if (p->dma == PARPORT_DMA_AUTO) {
2369 p->dma = PARPORT_DMA_NONE; 2093 p->dma = PARPORT_DMA_NONE;
2370 parport_dma_probe(p); 2094 parport_dma_probe(p);
2371 } 2095 }
2372 } 2096 }
2373 if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq 2097 if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
2374 is mandatory (see above) */ 2098 is mandatory (see above) */
2375 p->dma = PARPORT_DMA_NONE; 2099 p->dma = PARPORT_DMA_NONE;
2376 2100
2377 #ifdef CONFIG_PARPORT_PC_FIFO 2101 #ifdef CONFIG_PARPORT_PC_FIFO
2378 if (parport_ECP_supported(p) && 2102 if (parport_ECP_supported(p) &&
2379 p->dma != PARPORT_DMA_NOFIFO && 2103 p->dma != PARPORT_DMA_NOFIFO &&
2380 priv->fifo_depth > 0 && p->irq != PARPORT_IRQ_NONE) { 2104 priv->fifo_depth > 0 && p->irq != PARPORT_IRQ_NONE) {
2381 p->modes |= PARPORT_MODE_ECP | PARPORT_MODE_COMPAT; 2105 p->modes |= PARPORT_MODE_ECP | PARPORT_MODE_COMPAT;
2382 p->ops->compat_write_data = parport_pc_compat_write_block_pio; 2106 p->ops->compat_write_data = parport_pc_compat_write_block_pio;
2383 #ifdef CONFIG_PARPORT_1284 2107 #ifdef CONFIG_PARPORT_1284
2384 p->ops->ecp_write_data = parport_pc_ecp_write_block_pio; 2108 p->ops->ecp_write_data = parport_pc_ecp_write_block_pio;
2385 /* currently broken, but working on it.. (FB) */ 2109 /* currently broken, but working on it.. (FB) */
2386 /* p->ops->ecp_read_data = parport_pc_ecp_read_block_pio; */ 2110 /* p->ops->ecp_read_data = parport_pc_ecp_read_block_pio; */
2387 #endif /* IEEE 1284 support */ 2111 #endif /* IEEE 1284 support */
2388 if (p->dma != PARPORT_DMA_NONE) { 2112 if (p->dma != PARPORT_DMA_NONE) {
2389 printk(", dma %d", p->dma); 2113 printk(", dma %d", p->dma);
2390 p->modes |= PARPORT_MODE_DMA; 2114 p->modes |= PARPORT_MODE_DMA;
2391 } else 2115 } else
2392 printk(", using FIFO"); 2116 printk(", using FIFO");
2393 } else 2117 } else
2394 /* We can't use the DMA channel after all. */ 2118 /* We can't use the DMA channel after all. */
2395 p->dma = PARPORT_DMA_NONE; 2119 p->dma = PARPORT_DMA_NONE;
2396 #endif /* Allowed to use FIFO/DMA */ 2120 #endif /* Allowed to use FIFO/DMA */
2397 2121
2398 printk(" ["); 2122 printk(" [");
2399 2123
2400 #define printmode(x) \ 2124 #define printmode(x) \
2401 {\ 2125 {\
2402 if (p->modes & PARPORT_MODE_##x) {\ 2126 if (p->modes & PARPORT_MODE_##x) {\
2403 printk("%s%s", f ? "," : "", #x);\ 2127 printk("%s%s", f ? "," : "", #x);\
2404 f++;\ 2128 f++;\
2405 } \ 2129 } \
2406 } 2130 }
2407 2131
2408 { 2132 {
2409 int f = 0; 2133 int f = 0;
2410 printmode(PCSPP); 2134 printmode(PCSPP);
2411 printmode(TRISTATE); 2135 printmode(TRISTATE);
2412 printmode(COMPAT) 2136 printmode(COMPAT)
2413 printmode(EPP); 2137 printmode(EPP);
2414 printmode(ECP); 2138 printmode(ECP);
2415 printmode(DMA); 2139 printmode(DMA);
2416 } 2140 }
2417 #undef printmode 2141 #undef printmode
2418 #ifndef CONFIG_PARPORT_1284 2142 #ifndef CONFIG_PARPORT_1284
2419 printk("(,...)"); 2143 printk("(,...)");
2420 #endif /* CONFIG_PARPORT_1284 */ 2144 #endif /* CONFIG_PARPORT_1284 */
2421 printk("]\n"); 2145 printk("]\n");
2422 if (probedirq != PARPORT_IRQ_NONE) 2146 if (probedirq != PARPORT_IRQ_NONE)
2423 printk(KERN_INFO "%s: irq %d detected\n", p->name, probedirq); 2147 printk(KERN_INFO "%s: irq %d detected\n", p->name, probedirq);
2424 2148
2425 /* If No ECP release the ports grabbed above. */ 2149 /* If No ECP release the ports grabbed above. */
2426 if (ECR_res && (p->modes & PARPORT_MODE_ECP) == 0) { 2150 if (ECR_res && (p->modes & PARPORT_MODE_ECP) == 0) {
2427 release_region(base_hi, 3); 2151 release_region(base_hi, 3);
2428 ECR_res = NULL; 2152 ECR_res = NULL;
2429 } 2153 }
2430 /* Likewise for EEP ports */ 2154 /* Likewise for EEP ports */
2431 if (EPP_res && (p->modes & PARPORT_MODE_EPP) == 0) { 2155 if (EPP_res && (p->modes & PARPORT_MODE_EPP) == 0) {
2432 release_region(base+3, 5); 2156 release_region(base+3, 5);
2433 EPP_res = NULL; 2157 EPP_res = NULL;
2434 } 2158 }
2435 if (p->irq != PARPORT_IRQ_NONE) { 2159 if (p->irq != PARPORT_IRQ_NONE) {
2436 if (request_irq(p->irq, parport_irq_handler, 2160 if (request_irq(p->irq, parport_irq_handler,
2437 irqflags, p->name, p)) { 2161 irqflags, p->name, p)) {
2438 printk(KERN_WARNING "%s: irq %d in use, " 2162 printk(KERN_WARNING "%s: irq %d in use, "
2439 "resorting to polled operation\n", 2163 "resorting to polled operation\n",
2440 p->name, p->irq); 2164 p->name, p->irq);
2441 p->irq = PARPORT_IRQ_NONE; 2165 p->irq = PARPORT_IRQ_NONE;
2442 p->dma = PARPORT_DMA_NONE; 2166 p->dma = PARPORT_DMA_NONE;
2443 } 2167 }
2444 2168
2445 #ifdef CONFIG_PARPORT_PC_FIFO 2169 #ifdef CONFIG_PARPORT_PC_FIFO
2446 #ifdef HAS_DMA 2170 #ifdef HAS_DMA
2447 if (p->dma != PARPORT_DMA_NONE) { 2171 if (p->dma != PARPORT_DMA_NONE) {
2448 if (request_dma(p->dma, p->name)) { 2172 if (request_dma(p->dma, p->name)) {
2449 printk(KERN_WARNING "%s: dma %d in use, " 2173 printk(KERN_WARNING "%s: dma %d in use, "
2450 "resorting to PIO operation\n", 2174 "resorting to PIO operation\n",
2451 p->name, p->dma); 2175 p->name, p->dma);
2452 p->dma = PARPORT_DMA_NONE; 2176 p->dma = PARPORT_DMA_NONE;
2453 } else { 2177 } else {
2454 priv->dma_buf = 2178 priv->dma_buf =
2455 dma_alloc_coherent(dev, 2179 dma_alloc_coherent(dev,
2456 PAGE_SIZE, 2180 PAGE_SIZE,
2457 &priv->dma_handle, 2181 &priv->dma_handle,
2458 GFP_KERNEL); 2182 GFP_KERNEL);
2459 if (!priv->dma_buf) { 2183 if (!priv->dma_buf) {
2460 printk(KERN_WARNING "%s: " 2184 printk(KERN_WARNING "%s: "
2461 "cannot get buffer for DMA, " 2185 "cannot get buffer for DMA, "
2462 "resorting to PIO operation\n", 2186 "resorting to PIO operation\n",
2463 p->name); 2187 p->name);
2464 free_dma(p->dma); 2188 free_dma(p->dma);
2465 p->dma = PARPORT_DMA_NONE; 2189 p->dma = PARPORT_DMA_NONE;
2466 } 2190 }
2467 } 2191 }
2468 } 2192 }
2469 #endif 2193 #endif
2470 #endif 2194 #endif
2471 } 2195 }
2472 2196
2473 /* Done probing. Now put the port into a sensible start-up state. */ 2197 /* Done probing. Now put the port into a sensible start-up state. */
2474 if (priv->ecr) 2198 if (priv->ecr)
2475 /* 2199 /*
2476 * Put the ECP detected port in PS2 mode. 2200 * Put the ECP detected port in PS2 mode.
2477 * Do this also for ports that have ECR but don't do ECP. 2201 * Do this also for ports that have ECR but don't do ECP.
2478 */ 2202 */
2479 ECR_WRITE(p, 0x34); 2203 ECR_WRITE(p, 0x34);
2480 2204
2481 parport_pc_write_data(p, 0); 2205 parport_pc_write_data(p, 0);
2482 parport_pc_data_forward(p); 2206 parport_pc_data_forward(p);
2483 2207
2484 /* Now that we've told the sharing engine about the port, and 2208 /* Now that we've told the sharing engine about the port, and
2485 found out its characteristics, let the high-level drivers 2209 found out its characteristics, let the high-level drivers
2486 know about it. */ 2210 know about it. */
2487 spin_lock(&ports_lock); 2211 spin_lock(&ports_lock);
2488 list_add(&priv->list, &ports_list); 2212 list_add(&priv->list, &ports_list);
2489 spin_unlock(&ports_lock); 2213 spin_unlock(&ports_lock);
2490 parport_announce_port(p); 2214 parport_announce_port(p);
2491 2215
2492 return p; 2216 return p;
2493 2217
2494 out5: 2218 out5:
2495 if (ECR_res) 2219 if (ECR_res)
2496 release_region(base_hi, 3); 2220 release_region(base_hi, 3);
2497 if (EPP_res) 2221 if (EPP_res)
2498 release_region(base+0x3, 5); 2222 release_region(base+0x3, 5);
2499 release_region(base, 3); 2223 release_region(base, 3);
2500 out4: 2224 out4:
2501 parport_put_port(p); 2225 parport_put_port(p);
2502 out3: 2226 out3:
2503 kfree(priv); 2227 kfree(priv);
2504 out2: 2228 out2:
2505 kfree(ops); 2229 kfree(ops);
2506 out1: 2230 out1:
2507 if (pdev) 2231 if (pdev)
2508 platform_device_unregister(pdev); 2232 platform_device_unregister(pdev);
2509 return NULL; 2233 return NULL;
2510 } 2234 }
2511 EXPORT_SYMBOL(parport_pc_probe_port); 2235 EXPORT_SYMBOL(parport_pc_probe_port);
2512 2236
2513 void parport_pc_unregister_port(struct parport *p) 2237 void parport_pc_unregister_port(struct parport *p)
2514 { 2238 {
2515 struct parport_pc_private *priv = p->private_data; 2239 struct parport_pc_private *priv = p->private_data;
2516 struct parport_operations *ops = p->ops; 2240 struct parport_operations *ops = p->ops;
2517 2241
2518 parport_remove_port(p); 2242 parport_remove_port(p);
2519 spin_lock(&ports_lock); 2243 spin_lock(&ports_lock);
2520 list_del_init(&priv->list); 2244 list_del_init(&priv->list);
2521 spin_unlock(&ports_lock); 2245 spin_unlock(&ports_lock);
2522 #if defined(CONFIG_PARPORT_PC_FIFO) && defined(HAS_DMA) 2246 #if defined(CONFIG_PARPORT_PC_FIFO) && defined(HAS_DMA)
2523 if (p->dma != PARPORT_DMA_NONE) 2247 if (p->dma != PARPORT_DMA_NONE)
2524 free_dma(p->dma); 2248 free_dma(p->dma);
2525 #endif 2249 #endif
2526 if (p->irq != PARPORT_IRQ_NONE) 2250 if (p->irq != PARPORT_IRQ_NONE)
2527 free_irq(p->irq, p); 2251 free_irq(p->irq, p);
2528 release_region(p->base, 3); 2252 release_region(p->base, 3);
2529 if (p->size > 3) 2253 if (p->size > 3)
2530 release_region(p->base + 3, p->size - 3); 2254 release_region(p->base + 3, p->size - 3);
2531 if (p->modes & PARPORT_MODE_ECP) 2255 if (p->modes & PARPORT_MODE_ECP)
2532 release_region(p->base_hi, 3); 2256 release_region(p->base_hi, 3);
2533 #if defined(CONFIG_PARPORT_PC_FIFO) && defined(HAS_DMA) 2257 #if defined(CONFIG_PARPORT_PC_FIFO) && defined(HAS_DMA)
2534 if (priv->dma_buf) 2258 if (priv->dma_buf)
2535 dma_free_coherent(p->physport->dev, PAGE_SIZE, 2259 dma_free_coherent(p->physport->dev, PAGE_SIZE,
2536 priv->dma_buf, 2260 priv->dma_buf,
2537 priv->dma_handle); 2261 priv->dma_handle);
2538 #endif 2262 #endif
2539 kfree(p->private_data); 2263 kfree(p->private_data);
2540 parport_put_port(p); 2264 parport_put_port(p);
2541 kfree(ops); /* hope no-one cached it */ 2265 kfree(ops); /* hope no-one cached it */
2542 } 2266 }
2543 EXPORT_SYMBOL(parport_pc_unregister_port); 2267 EXPORT_SYMBOL(parport_pc_unregister_port);
2544 2268
2545 #ifdef CONFIG_PCI 2269 #ifdef CONFIG_PCI
2546 2270
2547 /* ITE support maintained by Rich Liu <richliu@poorman.org> */ 2271 /* ITE support maintained by Rich Liu <richliu@poorman.org> */
2548 static int __devinit sio_ite_8872_probe(struct pci_dev *pdev, int autoirq, 2272 static int __devinit sio_ite_8872_probe(struct pci_dev *pdev, int autoirq,
2549 int autodma, 2273 int autodma,
2550 const struct parport_pc_via_data *via) 2274 const struct parport_pc_via_data *via)
2551 { 2275 {
2552 short inta_addr[6] = { 0x2A0, 0x2C0, 0x220, 0x240, 0x1E0 }; 2276 short inta_addr[6] = { 0x2A0, 0x2C0, 0x220, 0x240, 0x1E0 };
2553 u32 ite8872set; 2277 u32 ite8872set;
2554 u32 ite8872_lpt, ite8872_lpthi; 2278 u32 ite8872_lpt, ite8872_lpthi;
2555 u8 ite8872_irq, type; 2279 u8 ite8872_irq, type;
2556 int irq; 2280 int irq;
2557 int i; 2281 int i;
2558 2282
2559 DPRINTK(KERN_DEBUG "sio_ite_8872_probe()\n"); 2283 DPRINTK(KERN_DEBUG "sio_ite_8872_probe()\n");
2560 2284
2561 /* make sure which one chip */ 2285 /* make sure which one chip */
2562 for (i = 0; i < 5; i++) { 2286 for (i = 0; i < 5; i++) {
2563 if (request_region(inta_addr[i], 32, "it887x")) { 2287 if (request_region(inta_addr[i], 32, "it887x")) {
2564 int test; 2288 int test;
2565 pci_write_config_dword(pdev, 0x60, 2289 pci_write_config_dword(pdev, 0x60,
2566 0xe5000000 | inta_addr[i]); 2290 0xe5000000 | inta_addr[i]);
2567 pci_write_config_dword(pdev, 0x78, 2291 pci_write_config_dword(pdev, 0x78,
2568 0x00000000 | inta_addr[i]); 2292 0x00000000 | inta_addr[i]);
2569 test = inb(inta_addr[i]); 2293 test = inb(inta_addr[i]);
2570 if (test != 0xff) 2294 if (test != 0xff)
2571 break; 2295 break;
2572 release_region(inta_addr[i], 32); 2296 release_region(inta_addr[i], 32);
2573 } 2297 }
2574 } 2298 }
2575 if (i >= 5) { 2299 if (i >= 5) {
2576 printk(KERN_INFO "parport_pc: cannot find ITE8872 INTA\n"); 2300 printk(KERN_INFO "parport_pc: cannot find ITE8872 INTA\n");
2577 return 0; 2301 return 0;
2578 } 2302 }
2579 2303
2580 type = inb(inta_addr[i] + 0x18); 2304 type = inb(inta_addr[i] + 0x18);
2581 type &= 0x0f; 2305 type &= 0x0f;
2582 2306
2583 switch (type) { 2307 switch (type) {
2584 case 0x2: 2308 case 0x2:
2585 printk(KERN_INFO "parport_pc: ITE8871 found (1P)\n"); 2309 printk(KERN_INFO "parport_pc: ITE8871 found (1P)\n");
2586 ite8872set = 0x64200000; 2310 ite8872set = 0x64200000;
2587 break; 2311 break;
2588 case 0xa: 2312 case 0xa:
2589 printk(KERN_INFO "parport_pc: ITE8875 found (1P)\n"); 2313 printk(KERN_INFO "parport_pc: ITE8875 found (1P)\n");
2590 ite8872set = 0x64200000; 2314 ite8872set = 0x64200000;
2591 break; 2315 break;
2592 case 0xe: 2316 case 0xe:
2593 printk(KERN_INFO "parport_pc: ITE8872 found (2S1P)\n"); 2317 printk(KERN_INFO "parport_pc: ITE8872 found (2S1P)\n");
2594 ite8872set = 0x64e00000; 2318 ite8872set = 0x64e00000;
2595 break; 2319 break;
2596 case 0x6: 2320 case 0x6:
2597 printk(KERN_INFO "parport_pc: ITE8873 found (1S)\n"); 2321 printk(KERN_INFO "parport_pc: ITE8873 found (1S)\n");
2598 release_region(inta_addr[i], 32); 2322 release_region(inta_addr[i], 32);
2599 return 0; 2323 return 0;
2600 case 0x8: 2324 case 0x8:
2601 printk(KERN_INFO "parport_pc: ITE8874 found (2S)\n"); 2325 printk(KERN_INFO "parport_pc: ITE8874 found (2S)\n");
2602 release_region(inta_addr[i], 32); 2326 release_region(inta_addr[i], 32);
2603 return 0; 2327 return 0;
2604 default: 2328 default:
2605 printk(KERN_INFO "parport_pc: unknown ITE887x\n"); 2329 printk(KERN_INFO "parport_pc: unknown ITE887x\n");
2606 printk(KERN_INFO "parport_pc: please mail 'lspci -nvv' " 2330 printk(KERN_INFO "parport_pc: please mail 'lspci -nvv' "
2607 "output to Rich.Liu@ite.com.tw\n"); 2331 "output to Rich.Liu@ite.com.tw\n");
2608 release_region(inta_addr[i], 32); 2332 release_region(inta_addr[i], 32);
2609 return 0; 2333 return 0;
2610 } 2334 }
2611 2335
2612 pci_read_config_byte(pdev, 0x3c, &ite8872_irq); 2336 pci_read_config_byte(pdev, 0x3c, &ite8872_irq);
2613 pci_read_config_dword(pdev, 0x1c, &ite8872_lpt); 2337 pci_read_config_dword(pdev, 0x1c, &ite8872_lpt);
2614 ite8872_lpt &= 0x0000ff00; 2338 ite8872_lpt &= 0x0000ff00;
2615 pci_read_config_dword(pdev, 0x20, &ite8872_lpthi); 2339 pci_read_config_dword(pdev, 0x20, &ite8872_lpthi);
2616 ite8872_lpthi &= 0x0000ff00; 2340 ite8872_lpthi &= 0x0000ff00;
2617 pci_write_config_dword(pdev, 0x6c, 0xe3000000 | ite8872_lpt); 2341 pci_write_config_dword(pdev, 0x6c, 0xe3000000 | ite8872_lpt);
2618 pci_write_config_dword(pdev, 0x70, 0xe3000000 | ite8872_lpthi); 2342 pci_write_config_dword(pdev, 0x70, 0xe3000000 | ite8872_lpthi);
2619 pci_write_config_dword(pdev, 0x80, (ite8872_lpthi<<16) | ite8872_lpt); 2343 pci_write_config_dword(pdev, 0x80, (ite8872_lpthi<<16) | ite8872_lpt);
2620 /* SET SPP&EPP , Parallel Port NO DMA , Enable All Function */ 2344 /* SET SPP&EPP , Parallel Port NO DMA , Enable All Function */
2621 /* SET Parallel IRQ */ 2345 /* SET Parallel IRQ */
2622 pci_write_config_dword(pdev, 0x9c, 2346 pci_write_config_dword(pdev, 0x9c,
2623 ite8872set | (ite8872_irq * 0x11111)); 2347 ite8872set | (ite8872_irq * 0x11111));
2624 2348
2625 DPRINTK(KERN_DEBUG "ITE887x: The IRQ is %d.\n", ite8872_irq); 2349 DPRINTK(KERN_DEBUG "ITE887x: The IRQ is %d.\n", ite8872_irq);
2626 DPRINTK(KERN_DEBUG "ITE887x: The PARALLEL I/O port is 0x%x.\n", 2350 DPRINTK(KERN_DEBUG "ITE887x: The PARALLEL I/O port is 0x%x.\n",
2627 ite8872_lpt); 2351 ite8872_lpt);
2628 DPRINTK(KERN_DEBUG "ITE887x: The PARALLEL I/O porthi is 0x%x.\n", 2352 DPRINTK(KERN_DEBUG "ITE887x: The PARALLEL I/O porthi is 0x%x.\n",
2629 ite8872_lpthi); 2353 ite8872_lpthi);
2630 2354
2631 /* Let the user (or defaults) steer us away from interrupts */ 2355 /* Let the user (or defaults) steer us away from interrupts */
2632 irq = ite8872_irq; 2356 irq = ite8872_irq;
2633 if (autoirq != PARPORT_IRQ_AUTO) 2357 if (autoirq != PARPORT_IRQ_AUTO)
2634 irq = PARPORT_IRQ_NONE; 2358 irq = PARPORT_IRQ_NONE;
2635 2359
2636 /* 2360 /*
2637 * Release the resource so that parport_pc_probe_port can get it. 2361 * Release the resource so that parport_pc_probe_port can get it.
2638 */ 2362 */
2639 release_region(inta_addr[i], 32); 2363 release_region(inta_addr[i], 32);
2640 if (parport_pc_probe_port(ite8872_lpt, ite8872_lpthi, 2364 if (parport_pc_probe_port(ite8872_lpt, ite8872_lpthi,
2641 irq, PARPORT_DMA_NONE, &pdev->dev, 0)) { 2365 irq, PARPORT_DMA_NONE, &pdev->dev, 0)) {
2642 printk(KERN_INFO 2366 printk(KERN_INFO
2643 "parport_pc: ITE 8872 parallel port: io=0x%X", 2367 "parport_pc: ITE 8872 parallel port: io=0x%X",
2644 ite8872_lpt); 2368 ite8872_lpt);
2645 if (irq != PARPORT_IRQ_NONE) 2369 if (irq != PARPORT_IRQ_NONE)
2646 printk(", irq=%d", irq); 2370 printk(", irq=%d", irq);
2647 printk("\n"); 2371 printk("\n");
2648 return 1; 2372 return 1;
2649 } 2373 }
2650 2374
2651 return 0; 2375 return 0;
2652 } 2376 }
2653 2377
2654 /* VIA 8231 support by Pavel Fedin <sonic_amiga@rambler.ru> 2378 /* VIA 8231 support by Pavel Fedin <sonic_amiga@rambler.ru>
2655 based on VIA 686a support code by Jeff Garzik <jgarzik@pobox.com> */ 2379 based on VIA 686a support code by Jeff Garzik <jgarzik@pobox.com> */
2656 static int __devinitdata parport_init_mode; 2380 static int __devinitdata parport_init_mode;
2657 2381
2658 /* Data for two known VIA chips */ 2382 /* Data for two known VIA chips */
2659 static struct parport_pc_via_data via_686a_data __devinitdata = { 2383 static struct parport_pc_via_data via_686a_data __devinitdata = {
2660 0x51, 2384 0x51,
2661 0x50, 2385 0x50,
2662 0x85, 2386 0x85,
2663 0x02, 2387 0x02,
2664 0xE2, 2388 0xE2,
2665 0xF0, 2389 0xF0,
2666 0xE6 2390 0xE6
2667 }; 2391 };
2668 static struct parport_pc_via_data via_8231_data __devinitdata = { 2392 static struct parport_pc_via_data via_8231_data __devinitdata = {
2669 0x45, 2393 0x45,
2670 0x44, 2394 0x44,
2671 0x50, 2395 0x50,
2672 0x04, 2396 0x04,
2673 0xF2, 2397 0xF2,
2674 0xFA, 2398 0xFA,
2675 0xF6 2399 0xF6
2676 }; 2400 };
2677 2401
2678 static int __devinit sio_via_probe(struct pci_dev *pdev, int autoirq, 2402 static int __devinit sio_via_probe(struct pci_dev *pdev, int autoirq,
2679 int autodma, 2403 int autodma,
2680 const struct parport_pc_via_data *via) 2404 const struct parport_pc_via_data *via)
2681 { 2405 {
2682 u8 tmp, tmp2, siofunc; 2406 u8 tmp, tmp2, siofunc;
2683 u8 ppcontrol = 0; 2407 u8 ppcontrol = 0;
2684 int dma, irq; 2408 int dma, irq;
2685 unsigned port1, port2; 2409 unsigned port1, port2;
2686 unsigned have_epp = 0; 2410 unsigned have_epp = 0;
2687 2411
2688 printk(KERN_DEBUG "parport_pc: VIA 686A/8231 detected\n"); 2412 printk(KERN_DEBUG "parport_pc: VIA 686A/8231 detected\n");
2689 2413
2690 switch (parport_init_mode) { 2414 switch (parport_init_mode) {
2691 case 1: 2415 case 1:
2692 printk(KERN_DEBUG "parport_pc: setting SPP mode\n"); 2416 printk(KERN_DEBUG "parport_pc: setting SPP mode\n");
2693 siofunc = VIA_FUNCTION_PARPORT_SPP; 2417 siofunc = VIA_FUNCTION_PARPORT_SPP;
2694 break; 2418 break;
2695 case 2: 2419 case 2:
2696 printk(KERN_DEBUG "parport_pc: setting PS/2 mode\n"); 2420 printk(KERN_DEBUG "parport_pc: setting PS/2 mode\n");
2697 siofunc = VIA_FUNCTION_PARPORT_SPP; 2421 siofunc = VIA_FUNCTION_PARPORT_SPP;
2698 ppcontrol = VIA_PARPORT_BIDIR; 2422 ppcontrol = VIA_PARPORT_BIDIR;
2699 break; 2423 break;
2700 case 3: 2424 case 3:
2701 printk(KERN_DEBUG "parport_pc: setting EPP mode\n"); 2425 printk(KERN_DEBUG "parport_pc: setting EPP mode\n");
2702 siofunc = VIA_FUNCTION_PARPORT_EPP; 2426 siofunc = VIA_FUNCTION_PARPORT_EPP;
2703 ppcontrol = VIA_PARPORT_BIDIR; 2427 ppcontrol = VIA_PARPORT_BIDIR;
2704 have_epp = 1; 2428 have_epp = 1;
2705 break; 2429 break;
2706 case 4: 2430 case 4:
2707 printk(KERN_DEBUG "parport_pc: setting ECP mode\n"); 2431 printk(KERN_DEBUG "parport_pc: setting ECP mode\n");
2708 siofunc = VIA_FUNCTION_PARPORT_ECP; 2432 siofunc = VIA_FUNCTION_PARPORT_ECP;
2709 ppcontrol = VIA_PARPORT_BIDIR; 2433 ppcontrol = VIA_PARPORT_BIDIR;
2710 break; 2434 break;
2711 case 5: 2435 case 5:
2712 printk(KERN_DEBUG "parport_pc: setting EPP+ECP mode\n"); 2436 printk(KERN_DEBUG "parport_pc: setting EPP+ECP mode\n");
2713 siofunc = VIA_FUNCTION_PARPORT_ECP; 2437 siofunc = VIA_FUNCTION_PARPORT_ECP;
2714 ppcontrol = VIA_PARPORT_BIDIR|VIA_PARPORT_ECPEPP; 2438 ppcontrol = VIA_PARPORT_BIDIR|VIA_PARPORT_ECPEPP;
2715 have_epp = 1; 2439 have_epp = 1;
2716 break; 2440 break;
2717 default: 2441 default:
2718 printk(KERN_DEBUG 2442 printk(KERN_DEBUG
2719 "parport_pc: probing current configuration\n"); 2443 "parport_pc: probing current configuration\n");
2720 siofunc = VIA_FUNCTION_PROBE; 2444 siofunc = VIA_FUNCTION_PROBE;
2721 break; 2445 break;
2722 } 2446 }
2723 /* 2447 /*
2724 * unlock super i/o configuration 2448 * unlock super i/o configuration
2725 */ 2449 */
2726 pci_read_config_byte(pdev, via->via_pci_superio_config_reg, &tmp); 2450 pci_read_config_byte(pdev, via->via_pci_superio_config_reg, &tmp);
2727 tmp |= via->via_pci_superio_config_data; 2451 tmp |= via->via_pci_superio_config_data;
2728 pci_write_config_byte(pdev, via->via_pci_superio_config_reg, tmp); 2452 pci_write_config_byte(pdev, via->via_pci_superio_config_reg, tmp);
2729 2453
2730 /* Bits 1-0: Parallel Port Mode / Enable */ 2454 /* Bits 1-0: Parallel Port Mode / Enable */
2731 outb(via->viacfg_function, VIA_CONFIG_INDEX); 2455 outb(via->viacfg_function, VIA_CONFIG_INDEX);
2732 tmp = inb(VIA_CONFIG_DATA); 2456 tmp = inb(VIA_CONFIG_DATA);
2733 /* Bit 5: EPP+ECP enable; bit 7: PS/2 bidirectional port enable */ 2457 /* Bit 5: EPP+ECP enable; bit 7: PS/2 bidirectional port enable */
2734 outb(via->viacfg_parport_control, VIA_CONFIG_INDEX); 2458 outb(via->viacfg_parport_control, VIA_CONFIG_INDEX);
2735 tmp2 = inb(VIA_CONFIG_DATA); 2459 tmp2 = inb(VIA_CONFIG_DATA);
2736 if (siofunc == VIA_FUNCTION_PROBE) { 2460 if (siofunc == VIA_FUNCTION_PROBE) {
2737 siofunc = tmp & VIA_FUNCTION_PARPORT_DISABLE; 2461 siofunc = tmp & VIA_FUNCTION_PARPORT_DISABLE;
2738 ppcontrol = tmp2; 2462 ppcontrol = tmp2;
2739 } else { 2463 } else {
2740 tmp &= ~VIA_FUNCTION_PARPORT_DISABLE; 2464 tmp &= ~VIA_FUNCTION_PARPORT_DISABLE;
2741 tmp |= siofunc; 2465 tmp |= siofunc;
2742 outb(via->viacfg_function, VIA_CONFIG_INDEX); 2466 outb(via->viacfg_function, VIA_CONFIG_INDEX);
2743 outb(tmp, VIA_CONFIG_DATA); 2467 outb(tmp, VIA_CONFIG_DATA);
2744 tmp2 &= ~(VIA_PARPORT_BIDIR|VIA_PARPORT_ECPEPP); 2468 tmp2 &= ~(VIA_PARPORT_BIDIR|VIA_PARPORT_ECPEPP);
2745 tmp2 |= ppcontrol; 2469 tmp2 |= ppcontrol;
2746 outb(via->viacfg_parport_control, VIA_CONFIG_INDEX); 2470 outb(via->viacfg_parport_control, VIA_CONFIG_INDEX);
2747 outb(tmp2, VIA_CONFIG_DATA); 2471 outb(tmp2, VIA_CONFIG_DATA);
2748 } 2472 }
2749 2473
2750 /* Parallel Port I/O Base Address, bits 9-2 */ 2474 /* Parallel Port I/O Base Address, bits 9-2 */
2751 outb(via->viacfg_parport_base, VIA_CONFIG_INDEX); 2475 outb(via->viacfg_parport_base, VIA_CONFIG_INDEX);
2752 port1 = inb(VIA_CONFIG_DATA) << 2; 2476 port1 = inb(VIA_CONFIG_DATA) << 2;
2753 2477
2754 printk(KERN_DEBUG "parport_pc: Current parallel port base: 0x%X\n", 2478 printk(KERN_DEBUG "parport_pc: Current parallel port base: 0x%X\n",
2755 port1); 2479 port1);
2756 if (port1 == 0x3BC && have_epp) { 2480 if (port1 == 0x3BC && have_epp) {
2757 outb(via->viacfg_parport_base, VIA_CONFIG_INDEX); 2481 outb(via->viacfg_parport_base, VIA_CONFIG_INDEX);
2758 outb((0x378 >> 2), VIA_CONFIG_DATA); 2482 outb((0x378 >> 2), VIA_CONFIG_DATA);
2759 printk(KERN_DEBUG 2483 printk(KERN_DEBUG
2760 "parport_pc: Parallel port base changed to 0x378\n"); 2484 "parport_pc: Parallel port base changed to 0x378\n");
2761 port1 = 0x378; 2485 port1 = 0x378;
2762 } 2486 }
2763 2487
2764 /* 2488 /*
2765 * lock super i/o configuration 2489 * lock super i/o configuration
2766 */ 2490 */
2767 pci_read_config_byte(pdev, via->via_pci_superio_config_reg, &tmp); 2491 pci_read_config_byte(pdev, via->via_pci_superio_config_reg, &tmp);
2768 tmp &= ~via->via_pci_superio_config_data; 2492 tmp &= ~via->via_pci_superio_config_data;
2769 pci_write_config_byte(pdev, via->via_pci_superio_config_reg, tmp); 2493 pci_write_config_byte(pdev, via->via_pci_superio_config_reg, tmp);
2770 2494
2771 if (siofunc == VIA_FUNCTION_PARPORT_DISABLE) { 2495 if (siofunc == VIA_FUNCTION_PARPORT_DISABLE) {
2772 printk(KERN_INFO "parport_pc: VIA parallel port disabled in BIOS\n"); 2496 printk(KERN_INFO "parport_pc: VIA parallel port disabled in BIOS\n");
2773 return 0; 2497 return 0;
2774 } 2498 }
2775 2499
2776 /* Bits 7-4: PnP Routing for Parallel Port IRQ */ 2500 /* Bits 7-4: PnP Routing for Parallel Port IRQ */
2777 pci_read_config_byte(pdev, via->via_pci_parport_irq_reg, &tmp); 2501 pci_read_config_byte(pdev, via->via_pci_parport_irq_reg, &tmp);
2778 irq = ((tmp & VIA_IRQCONTROL_PARALLEL) >> 4); 2502 irq = ((tmp & VIA_IRQCONTROL_PARALLEL) >> 4);
2779 2503
2780 if (siofunc == VIA_FUNCTION_PARPORT_ECP) { 2504 if (siofunc == VIA_FUNCTION_PARPORT_ECP) {
2781 /* Bits 3-2: PnP Routing for Parallel Port DMA */ 2505 /* Bits 3-2: PnP Routing for Parallel Port DMA */
2782 pci_read_config_byte(pdev, via->via_pci_parport_dma_reg, &tmp); 2506 pci_read_config_byte(pdev, via->via_pci_parport_dma_reg, &tmp);
2783 dma = ((tmp & VIA_DMACONTROL_PARALLEL) >> 2); 2507 dma = ((tmp & VIA_DMACONTROL_PARALLEL) >> 2);
2784 } else 2508 } else
2785 /* if ECP not enabled, DMA is not enabled, assumed 2509 /* if ECP not enabled, DMA is not enabled, assumed
2786 bogus 'dma' value */ 2510 bogus 'dma' value */
2787 dma = PARPORT_DMA_NONE; 2511 dma = PARPORT_DMA_NONE;
2788 2512
2789 /* Let the user (or defaults) steer us away from interrupts and DMA */ 2513 /* Let the user (or defaults) steer us away from interrupts and DMA */
2790 if (autoirq == PARPORT_IRQ_NONE) { 2514 if (autoirq == PARPORT_IRQ_NONE) {
2791 irq = PARPORT_IRQ_NONE; 2515 irq = PARPORT_IRQ_NONE;
2792 dma = PARPORT_DMA_NONE; 2516 dma = PARPORT_DMA_NONE;
2793 } 2517 }
2794 if (autodma == PARPORT_DMA_NONE) 2518 if (autodma == PARPORT_DMA_NONE)
2795 dma = PARPORT_DMA_NONE; 2519 dma = PARPORT_DMA_NONE;
2796 2520
2797 switch (port1) { 2521 switch (port1) {
2798 case 0x3bc: 2522 case 0x3bc:
2799 port2 = 0x7bc; break; 2523 port2 = 0x7bc; break;
2800 case 0x378: 2524 case 0x378:
2801 port2 = 0x778; break; 2525 port2 = 0x778; break;
2802 case 0x278: 2526 case 0x278:
2803 port2 = 0x678; break; 2527 port2 = 0x678; break;
2804 default: 2528 default:
2805 printk(KERN_INFO 2529 printk(KERN_INFO
2806 "parport_pc: Weird VIA parport base 0x%X, ignoring\n", 2530 "parport_pc: Weird VIA parport base 0x%X, ignoring\n",
2807 port1); 2531 port1);
2808 return 0; 2532 return 0;
2809 } 2533 }
2810 2534
2811 /* filter bogus IRQs */ 2535 /* filter bogus IRQs */
2812 switch (irq) { 2536 switch (irq) {
2813 case 0: 2537 case 0:
2814 case 2: 2538 case 2:
2815 case 8: 2539 case 8:
2816 case 13: 2540 case 13:
2817 irq = PARPORT_IRQ_NONE; 2541 irq = PARPORT_IRQ_NONE;
2818 break; 2542 break;
2819 2543
2820 default: /* do nothing */ 2544 default: /* do nothing */
2821 break; 2545 break;
2822 } 2546 }
2823 2547
2824 /* finally, do the probe with values obtained */ 2548 /* finally, do the probe with values obtained */
2825 if (parport_pc_probe_port(port1, port2, irq, dma, &pdev->dev, 0)) { 2549 if (parport_pc_probe_port(port1, port2, irq, dma, &pdev->dev, 0)) {
2826 printk(KERN_INFO 2550 printk(KERN_INFO
2827 "parport_pc: VIA parallel port: io=0x%X", port1); 2551 "parport_pc: VIA parallel port: io=0x%X", port1);
2828 if (irq != PARPORT_IRQ_NONE) 2552 if (irq != PARPORT_IRQ_NONE)
2829 printk(", irq=%d", irq); 2553 printk(", irq=%d", irq);
2830 if (dma != PARPORT_DMA_NONE) 2554 if (dma != PARPORT_DMA_NONE)
2831 printk(", dma=%d", dma); 2555 printk(", dma=%d", dma);
2832 printk("\n"); 2556 printk("\n");
2833 return 1; 2557 return 1;
2834 } 2558 }
2835 2559
2836 printk(KERN_WARNING "parport_pc: Strange, can't probe VIA parallel port: io=0x%X, irq=%d, dma=%d\n", 2560 printk(KERN_WARNING "parport_pc: Strange, can't probe VIA parallel port: io=0x%X, irq=%d, dma=%d\n",
2837 port1, irq, dma); 2561 port1, irq, dma);
2838 return 0; 2562 return 0;
2839 } 2563 }
2840 2564
2841 2565
2842 enum parport_pc_sio_types { 2566 enum parport_pc_sio_types {
2843 sio_via_686a = 0, /* Via VT82C686A motherboard Super I/O */ 2567 sio_via_686a = 0, /* Via VT82C686A motherboard Super I/O */
2844 sio_via_8231, /* Via VT8231 south bridge integrated Super IO */ 2568 sio_via_8231, /* Via VT8231 south bridge integrated Super IO */
2845 sio_ite_8872, 2569 sio_ite_8872,
2846 last_sio 2570 last_sio
2847 }; 2571 };
2848 2572
2849 /* each element directly indexed from enum list, above */ 2573 /* each element directly indexed from enum list, above */
2850 static struct parport_pc_superio { 2574 static struct parport_pc_superio {
2851 int (*probe) (struct pci_dev *pdev, int autoirq, int autodma, 2575 int (*probe) (struct pci_dev *pdev, int autoirq, int autodma,
2852 const struct parport_pc_via_data *via); 2576 const struct parport_pc_via_data *via);
2853 const struct parport_pc_via_data *via; 2577 const struct parport_pc_via_data *via;
2854 } parport_pc_superio_info[] __devinitdata = { 2578 } parport_pc_superio_info[] __devinitdata = {
2855 { sio_via_probe, &via_686a_data, }, 2579 { sio_via_probe, &via_686a_data, },
2856 { sio_via_probe, &via_8231_data, }, 2580 { sio_via_probe, &via_8231_data, },
2857 { sio_ite_8872_probe, NULL, }, 2581 { sio_ite_8872_probe, NULL, },
2858 }; 2582 };
2859 2583
2860 enum parport_pc_pci_cards { 2584 enum parport_pc_pci_cards {
2861 siig_1p_10x = last_sio, 2585 siig_1p_10x = last_sio,
2862 siig_2p_10x, 2586 siig_2p_10x,
2863 siig_1p_20x, 2587 siig_1p_20x,
2864 siig_2p_20x, 2588 siig_2p_20x,
2865 lava_parallel, 2589 lava_parallel,
2866 lava_parallel_dual_a, 2590 lava_parallel_dual_a,
2867 lava_parallel_dual_b, 2591 lava_parallel_dual_b,
2868 boca_ioppar, 2592 boca_ioppar,
2869 plx_9050, 2593 plx_9050,
2870 timedia_4006a, 2594 timedia_4006a,
2871 timedia_4014, 2595 timedia_4014,
2872 timedia_4008a, 2596 timedia_4008a,
2873 timedia_4018, 2597 timedia_4018,
2874 timedia_9018a, 2598 timedia_9018a,
2875 syba_2p_epp, 2599 syba_2p_epp,
2876 syba_1p_ecp, 2600 syba_1p_ecp,
2877 titan_010l, 2601 titan_010l,
2878 titan_1284p1, 2602 titan_1284p1,
2879 titan_1284p2, 2603 titan_1284p2,
2880 avlab_1p, 2604 avlab_1p,
2881 avlab_2p, 2605 avlab_2p,
2882 oxsemi_952, 2606 oxsemi_952,
2883 oxsemi_954, 2607 oxsemi_954,
2884 oxsemi_840, 2608 oxsemi_840,
2885 oxsemi_pcie_pport, 2609 oxsemi_pcie_pport,
2886 aks_0100, 2610 aks_0100,
2887 mobility_pp, 2611 mobility_pp,
2888 netmos_9705, 2612 netmos_9705,
2889 netmos_9715, 2613 netmos_9715,
2890 netmos_9755, 2614 netmos_9755,
2891 netmos_9805, 2615 netmos_9805,
2892 netmos_9815, 2616 netmos_9815,
2893 netmos_9901, 2617 netmos_9901,
2894 netmos_9865, 2618 netmos_9865,
2895 quatech_sppxp100, 2619 quatech_sppxp100,
2896 }; 2620 };
2897 2621
2898 2622
2899 /* each element directly indexed from enum list, above 2623 /* each element directly indexed from enum list, above
2900 * (but offset by last_sio) */ 2624 * (but offset by last_sio) */
2901 static struct parport_pc_pci { 2625 static struct parport_pc_pci {
2902 int numports; 2626 int numports;
2903 struct { /* BAR (base address registers) numbers in the config 2627 struct { /* BAR (base address registers) numbers in the config
2904 space header */ 2628 space header */
2905 int lo; 2629 int lo;
2906 int hi; 2630 int hi;
2907 /* -1 if not there, >6 for offset-method (max BAR is 6) */ 2631 /* -1 if not there, >6 for offset-method (max BAR is 6) */
2908 } addr[4]; 2632 } addr[4];
2909 2633
2910 /* If set, this is called immediately after pci_enable_device. 2634 /* If set, this is called immediately after pci_enable_device.
2911 * If it returns non-zero, no probing will take place and the 2635 * If it returns non-zero, no probing will take place and the
2912 * ports will not be used. */ 2636 * ports will not be used. */
2913 int (*preinit_hook) (struct pci_dev *pdev, int autoirq, int autodma); 2637 int (*preinit_hook) (struct pci_dev *pdev, int autoirq, int autodma);
2914 2638
2915 /* If set, this is called after probing for ports. If 'failed' 2639 /* If set, this is called after probing for ports. If 'failed'
2916 * is non-zero we couldn't use any of the ports. */ 2640 * is non-zero we couldn't use any of the ports. */
2917 void (*postinit_hook) (struct pci_dev *pdev, int failed); 2641 void (*postinit_hook) (struct pci_dev *pdev, int failed);
2918 } cards[] = { 2642 } cards[] = {
2919 /* siig_1p_10x */ { 1, { { 2, 3 }, } }, 2643 /* siig_1p_10x */ { 1, { { 2, 3 }, } },
2920 /* siig_2p_10x */ { 2, { { 2, 3 }, { 4, 5 }, } }, 2644 /* siig_2p_10x */ { 2, { { 2, 3 }, { 4, 5 }, } },
2921 /* siig_1p_20x */ { 1, { { 0, 1 }, } }, 2645 /* siig_1p_20x */ { 1, { { 0, 1 }, } },
2922 /* siig_2p_20x */ { 2, { { 0, 1 }, { 2, 3 }, } }, 2646 /* siig_2p_20x */ { 2, { { 0, 1 }, { 2, 3 }, } },
2923 /* lava_parallel */ { 1, { { 0, -1 }, } }, 2647 /* lava_parallel */ { 1, { { 0, -1 }, } },
2924 /* lava_parallel_dual_a */ { 1, { { 0, -1 }, } }, 2648 /* lava_parallel_dual_a */ { 1, { { 0, -1 }, } },
2925 /* lava_parallel_dual_b */ { 1, { { 0, -1 }, } }, 2649 /* lava_parallel_dual_b */ { 1, { { 0, -1 }, } },
2926 /* boca_ioppar */ { 1, { { 0, -1 }, } }, 2650 /* boca_ioppar */ { 1, { { 0, -1 }, } },
2927 /* plx_9050 */ { 2, { { 4, -1 }, { 5, -1 }, } }, 2651 /* plx_9050 */ { 2, { { 4, -1 }, { 5, -1 }, } },
2928 /* timedia_4006a */ { 1, { { 0, -1 }, } }, 2652 /* timedia_4006a */ { 1, { { 0, -1 }, } },
2929 /* timedia_4014 */ { 2, { { 0, -1 }, { 2, -1 }, } }, 2653 /* timedia_4014 */ { 2, { { 0, -1 }, { 2, -1 }, } },
2930 /* timedia_4008a */ { 1, { { 0, 1 }, } }, 2654 /* timedia_4008a */ { 1, { { 0, 1 }, } },
2931 /* timedia_4018 */ { 2, { { 0, 1 }, { 2, 3 }, } }, 2655 /* timedia_4018 */ { 2, { { 0, 1 }, { 2, 3 }, } },
2932 /* timedia_9018a */ { 2, { { 0, 1 }, { 2, 3 }, } }, 2656 /* timedia_9018a */ { 2, { { 0, 1 }, { 2, 3 }, } },
2933 /* SYBA uses fixed offsets in 2657 /* SYBA uses fixed offsets in
2934 a 1K io window */ 2658 a 1K io window */
2935 /* syba_2p_epp AP138B */ { 2, { { 0, 0x078 }, { 0, 0x178 }, } }, 2659 /* syba_2p_epp AP138B */ { 2, { { 0, 0x078 }, { 0, 0x178 }, } },
2936 /* syba_1p_ecp W83787 */ { 1, { { 0, 0x078 }, } }, 2660 /* syba_1p_ecp W83787 */ { 1, { { 0, 0x078 }, } },
2937 /* titan_010l */ { 1, { { 3, -1 }, } }, 2661 /* titan_010l */ { 1, { { 3, -1 }, } },
2938 /* titan_1284p1 */ { 1, { { 0, 1 }, } }, 2662 /* titan_1284p1 */ { 1, { { 0, 1 }, } },
2939 /* titan_1284p2 */ { 2, { { 0, 1 }, { 2, 3 }, } }, 2663 /* titan_1284p2 */ { 2, { { 0, 1 }, { 2, 3 }, } },
2940 /* avlab_1p */ { 1, { { 0, 1}, } }, 2664 /* avlab_1p */ { 1, { { 0, 1}, } },
2941 /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} }, 2665 /* avlab_2p */ { 2, { { 0, 1}, { 2, 3 },} },
2942 /* The Oxford Semi cards are unusual: 954 doesn't support ECP, 2666 /* The Oxford Semi cards are unusual: 954 doesn't support ECP,
2943 * and 840 locks up if you write 1 to bit 2! */ 2667 * and 840 locks up if you write 1 to bit 2! */
2944 /* oxsemi_952 */ { 1, { { 0, 1 }, } }, 2668 /* oxsemi_952 */ { 1, { { 0, 1 }, } },
2945 /* oxsemi_954 */ { 1, { { 0, -1 }, } }, 2669 /* oxsemi_954 */ { 1, { { 0, -1 }, } },
2946 /* oxsemi_840 */ { 1, { { 0, 1 }, } }, 2670 /* oxsemi_840 */ { 1, { { 0, 1 }, } },
2947 /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, } }, 2671 /* oxsemi_pcie_pport */ { 1, { { 0, 1 }, } },
2948 /* aks_0100 */ { 1, { { 0, -1 }, } }, 2672 /* aks_0100 */ { 1, { { 0, -1 }, } },
2949 /* mobility_pp */ { 1, { { 0, 1 }, } }, 2673 /* mobility_pp */ { 1, { { 0, 1 }, } },
2950 2674
2951 /* The netmos entries below are untested */ 2675 /* The netmos entries below are untested */
2952 /* netmos_9705 */ { 1, { { 0, -1 }, } }, 2676 /* netmos_9705 */ { 1, { { 0, -1 }, } },
2953 /* netmos_9715 */ { 2, { { 0, 1 }, { 2, 3 },} }, 2677 /* netmos_9715 */ { 2, { { 0, 1 }, { 2, 3 },} },
2954 /* netmos_9755 */ { 2, { { 0, 1 }, { 2, 3 },} }, 2678 /* netmos_9755 */ { 2, { { 0, 1 }, { 2, 3 },} },
2955 /* netmos_9805 */ { 1, { { 0, -1 }, } }, 2679 /* netmos_9805 */ { 1, { { 0, -1 }, } },
2956 /* netmos_9815 */ { 2, { { 0, -1 }, { 2, -1 }, } }, 2680 /* netmos_9815 */ { 2, { { 0, -1 }, { 2, -1 }, } },
2957 /* netmos_9901 */ { 1, { { 0, -1 }, } }, 2681 /* netmos_9901 */ { 1, { { 0, -1 }, } },
2958 /* netmos_9865 */ { 1, { { 0, -1 }, } }, 2682 /* netmos_9865 */ { 1, { { 0, -1 }, } },
2959 /* quatech_sppxp100 */ { 1, { { 0, 1 }, } }, 2683 /* quatech_sppxp100 */ { 1, { { 0, 1 }, } },
2960 }; 2684 };
2961 2685
2962 static const struct pci_device_id parport_pc_pci_tbl[] = { 2686 static const struct pci_device_id parport_pc_pci_tbl[] = {
2963 /* Super-IO onboard chips */ 2687 /* Super-IO onboard chips */
2964 { 0x1106, 0x0686, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_via_686a }, 2688 { 0x1106, 0x0686, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_via_686a },
2965 { 0x1106, 0x8231, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_via_8231 }, 2689 { 0x1106, 0x8231, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_via_8231 },
2966 { PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8872, 2690 { PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8872,
2967 PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_ite_8872 }, 2691 PCI_ANY_ID, PCI_ANY_ID, 0, 0, sio_ite_8872 },
2968 2692
2969 /* PCI cards */ 2693 /* PCI cards */
2970 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1P_10x, 2694 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1P_10x,
2971 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1p_10x }, 2695 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1p_10x },
2972 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P_10x, 2696 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P_10x,
2973 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p_10x }, 2697 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p_10x },
2974 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1P_20x, 2698 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1P_20x,
2975 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1p_20x }, 2699 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1p_20x },
2976 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P_20x, 2700 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P_20x,
2977 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p_20x }, 2701 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p_20x },
2978 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_PARALLEL, 2702 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_PARALLEL,
2979 PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel }, 2703 PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel },
2980 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DUAL_PAR_A, 2704 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DUAL_PAR_A,
2981 PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel_dual_a }, 2705 PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel_dual_a },
2982 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DUAL_PAR_B, 2706 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DUAL_PAR_B,
2983 PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel_dual_b }, 2707 PCI_ANY_ID, PCI_ANY_ID, 0, 0, lava_parallel_dual_b },
2984 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_BOCA_IOPPAR, 2708 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_BOCA_IOPPAR,
2985 PCI_ANY_ID, PCI_ANY_ID, 0, 0, boca_ioppar }, 2709 PCI_ANY_ID, PCI_ANY_ID, 0, 0, boca_ioppar },
2986 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, 2710 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
2987 PCI_SUBVENDOR_ID_EXSYS, PCI_SUBDEVICE_ID_EXSYS_4014, 0, 0, plx_9050 }, 2711 PCI_SUBVENDOR_ID_EXSYS, PCI_SUBDEVICE_ID_EXSYS_4014, 0, 0, plx_9050 },
2988 /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/ 2712 /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/
2989 { 0x1409, 0x7268, 0x1409, 0x0101, 0, 0, timedia_4006a }, 2713 { 0x1409, 0x7268, 0x1409, 0x0101, 0, 0, timedia_4006a },
2990 { 0x1409, 0x7268, 0x1409, 0x0102, 0, 0, timedia_4014 }, 2714 { 0x1409, 0x7268, 0x1409, 0x0102, 0, 0, timedia_4014 },
2991 { 0x1409, 0x7268, 0x1409, 0x0103, 0, 0, timedia_4008a }, 2715 { 0x1409, 0x7268, 0x1409, 0x0103, 0, 0, timedia_4008a },
2992 { 0x1409, 0x7268, 0x1409, 0x0104, 0, 0, timedia_4018 }, 2716 { 0x1409, 0x7268, 0x1409, 0x0104, 0, 0, timedia_4018 },
2993 { 0x1409, 0x7268, 0x1409, 0x9018, 0, 0, timedia_9018a }, 2717 { 0x1409, 0x7268, 0x1409, 0x9018, 0, 0, timedia_9018a },
2994 { PCI_VENDOR_ID_SYBA, PCI_DEVICE_ID_SYBA_2P_EPP, 2718 { PCI_VENDOR_ID_SYBA, PCI_DEVICE_ID_SYBA_2P_EPP,
2995 PCI_ANY_ID, PCI_ANY_ID, 0, 0, syba_2p_epp }, 2719 PCI_ANY_ID, PCI_ANY_ID, 0, 0, syba_2p_epp },
2996 { PCI_VENDOR_ID_SYBA, PCI_DEVICE_ID_SYBA_1P_ECP, 2720 { PCI_VENDOR_ID_SYBA, PCI_DEVICE_ID_SYBA_1P_ECP,
2997 PCI_ANY_ID, PCI_ANY_ID, 0, 0, syba_1p_ecp }, 2721 PCI_ANY_ID, PCI_ANY_ID, 0, 0, syba_1p_ecp },
2998 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_010L, 2722 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_010L,
2999 PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_010l }, 2723 PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_010l },
3000 { 0x9710, 0x9805, 0x1000, 0x0010, 0, 0, titan_1284p1 }, 2724 { 0x9710, 0x9805, 0x1000, 0x0010, 0, 0, titan_1284p1 },
3001 { 0x9710, 0x9815, 0x1000, 0x0020, 0, 0, titan_1284p2 }, 2725 { 0x9710, 0x9815, 0x1000, 0x0020, 0, 0, titan_1284p2 },
3002 /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/ 2726 /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/
3003 /* AFAVLAB_TK9902 */ 2727 /* AFAVLAB_TK9902 */
3004 { 0x14db, 0x2120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1p}, 2728 { 0x14db, 0x2120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1p},
3005 { 0x14db, 0x2121, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2p}, 2729 { 0x14db, 0x2121, PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2p},
3006 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI952PP, 2730 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI952PP,
3007 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_952 }, 2731 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_952 },
3008 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954PP, 2732 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954PP,
3009 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_954 }, 2733 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_954 },
3010 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_12PCI840, 2734 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_12PCI840,
3011 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_840 }, 2735 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_840 },
3012 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe840, 2736 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe840,
3013 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport }, 2737 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport },
3014 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe840_G, 2738 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe840_G,
3015 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport }, 2739 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport },
3016 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_0, 2740 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_0,
3017 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport }, 2741 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport },
3018 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_0_G, 2742 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_0_G,
3019 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport }, 2743 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport },
3020 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_1, 2744 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_1,
3021 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport }, 2745 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport },
3022 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_1_G, 2746 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_1_G,
3023 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport }, 2747 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport },
3024 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_1_U, 2748 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_1_U,
3025 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport }, 2749 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport },
3026 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_1_GU, 2750 { PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_PCIe952_1_GU,
3027 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport }, 2751 PCI_ANY_ID, PCI_ANY_ID, 0, 0, oxsemi_pcie_pport },
3028 { PCI_VENDOR_ID_AKS, PCI_DEVICE_ID_AKS_ALADDINCARD, 2752 { PCI_VENDOR_ID_AKS, PCI_DEVICE_ID_AKS_ALADDINCARD,
3029 PCI_ANY_ID, PCI_ANY_ID, 0, 0, aks_0100 }, 2753 PCI_ANY_ID, PCI_ANY_ID, 0, 0, aks_0100 },
3030 { 0x14f2, 0x0121, PCI_ANY_ID, PCI_ANY_ID, 0, 0, mobility_pp }, 2754 { 0x14f2, 0x0121, PCI_ANY_ID, PCI_ANY_ID, 0, 0, mobility_pp },
3031 /* NetMos communication controllers */ 2755 /* NetMos communication controllers */
3032 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9705, 2756 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9705,
3033 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9705 }, 2757 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9705 },
3034 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9715, 2758 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9715,
3035 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9715 }, 2759 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9715 },
3036 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9755, 2760 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9755,
3037 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9755 }, 2761 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9755 },
3038 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9805, 2762 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9805,
3039 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9805 }, 2763 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9805 },
3040 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9815, 2764 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9815,
3041 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9815 }, 2765 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9815 },
3042 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9901, 2766 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9901,
3043 0xA000, 0x2000, 0, 0, netmos_9901 }, 2767 0xA000, 0x2000, 0, 0, netmos_9901 },
3044 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865, 2768 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865,
3045 0xA000, 0x1000, 0, 0, netmos_9865 }, 2769 0xA000, 0x1000, 0, 0, netmos_9865 },
3046 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865, 2770 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9865,
3047 0xA000, 0x2000, 0, 0, netmos_9865 }, 2771 0xA000, 0x2000, 0, 0, netmos_9865 },
3048 /* Quatech SPPXP-100 Parallel port PCI ExpressCard */ 2772 /* Quatech SPPXP-100 Parallel port PCI ExpressCard */
3049 { PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_SPPXP_100, 2773 { PCI_VENDOR_ID_QUATECH, PCI_DEVICE_ID_QUATECH_SPPXP_100,
3050 PCI_ANY_ID, PCI_ANY_ID, 0, 0, quatech_sppxp100 }, 2774 PCI_ANY_ID, PCI_ANY_ID, 0, 0, quatech_sppxp100 },
3051 { 0, } /* terminate list */ 2775 { 0, } /* terminate list */
3052 }; 2776 };
3053 MODULE_DEVICE_TABLE(pci, parport_pc_pci_tbl); 2777 MODULE_DEVICE_TABLE(pci, parport_pc_pci_tbl);
3054 2778
3055 struct pci_parport_data { 2779 struct pci_parport_data {
3056 int num; 2780 int num;
3057 struct parport *ports[2]; 2781 struct parport *ports[2];
3058 }; 2782 };
3059 2783
3060 static int parport_pc_pci_probe(struct pci_dev *dev, 2784 static int parport_pc_pci_probe(struct pci_dev *dev,
3061 const struct pci_device_id *id) 2785 const struct pci_device_id *id)
3062 { 2786 {
3063 int err, count, n, i = id->driver_data; 2787 int err, count, n, i = id->driver_data;
3064 struct pci_parport_data *data; 2788 struct pci_parport_data *data;
3065 2789
3066 if (i < last_sio) 2790 if (i < last_sio)
3067 /* This is an onboard Super-IO and has already been probed */ 2791 /* This is an onboard Super-IO and has already been probed */
3068 return 0; 2792 return 0;
3069 2793
3070 /* This is a PCI card */ 2794 /* This is a PCI card */
3071 i -= last_sio; 2795 i -= last_sio;
3072 count = 0; 2796 count = 0;
3073 err = pci_enable_device(dev); 2797 err = pci_enable_device(dev);
3074 if (err) 2798 if (err)
3075 return err; 2799 return err;
3076 2800
3077 data = kmalloc(sizeof(struct pci_parport_data), GFP_KERNEL); 2801 data = kmalloc(sizeof(struct pci_parport_data), GFP_KERNEL);
3078 if (!data) 2802 if (!data)
3079 return -ENOMEM; 2803 return -ENOMEM;
3080 2804
3081 if (cards[i].preinit_hook && 2805 if (cards[i].preinit_hook &&
3082 cards[i].preinit_hook(dev, PARPORT_IRQ_NONE, PARPORT_DMA_NONE)) { 2806 cards[i].preinit_hook(dev, PARPORT_IRQ_NONE, PARPORT_DMA_NONE)) {
3083 kfree(data); 2807 kfree(data);
3084 return -ENODEV; 2808 return -ENODEV;
3085 } 2809 }
3086 2810
3087 for (n = 0; n < cards[i].numports; n++) { 2811 for (n = 0; n < cards[i].numports; n++) {
3088 int lo = cards[i].addr[n].lo; 2812 int lo = cards[i].addr[n].lo;
3089 int hi = cards[i].addr[n].hi; 2813 int hi = cards[i].addr[n].hi;
3090 int irq; 2814 int irq;
3091 unsigned long io_lo, io_hi; 2815 unsigned long io_lo, io_hi;
3092 io_lo = pci_resource_start(dev, lo); 2816 io_lo = pci_resource_start(dev, lo);
3093 io_hi = 0; 2817 io_hi = 0;
3094 if ((hi >= 0) && (hi <= 6)) 2818 if ((hi >= 0) && (hi <= 6))
3095 io_hi = pci_resource_start(dev, hi); 2819 io_hi = pci_resource_start(dev, hi);
3096 else if (hi > 6) 2820 else if (hi > 6)
3097 io_lo += hi; /* Reinterpret the meaning of 2821 io_lo += hi; /* Reinterpret the meaning of
3098 "hi" as an offset (see SYBA 2822 "hi" as an offset (see SYBA
3099 def.) */ 2823 def.) */
3100 /* TODO: test if sharing interrupts works */ 2824 /* TODO: test if sharing interrupts works */
3101 irq = dev->irq; 2825 irq = dev->irq;
3102 if (irq == IRQ_NONE) { 2826 if (irq == IRQ_NONE) {
3103 printk(KERN_DEBUG 2827 printk(KERN_DEBUG
3104 "PCI parallel port detected: %04x:%04x, I/O at %#lx(%#lx)\n", 2828 "PCI parallel port detected: %04x:%04x, I/O at %#lx(%#lx)\n",
3105 parport_pc_pci_tbl[i + last_sio].vendor, 2829 parport_pc_pci_tbl[i + last_sio].vendor,
3106 parport_pc_pci_tbl[i + last_sio].device, 2830 parport_pc_pci_tbl[i + last_sio].device,
3107 io_lo, io_hi); 2831 io_lo, io_hi);
3108 irq = PARPORT_IRQ_NONE; 2832 irq = PARPORT_IRQ_NONE;
3109 } else { 2833 } else {
3110 printk(KERN_DEBUG 2834 printk(KERN_DEBUG
3111 "PCI parallel port detected: %04x:%04x, I/O at %#lx(%#lx), IRQ %d\n", 2835 "PCI parallel port detected: %04x:%04x, I/O at %#lx(%#lx), IRQ %d\n",
3112 parport_pc_pci_tbl[i + last_sio].vendor, 2836 parport_pc_pci_tbl[i + last_sio].vendor,
3113 parport_pc_pci_tbl[i + last_sio].device, 2837 parport_pc_pci_tbl[i + last_sio].device,
3114 io_lo, io_hi, irq); 2838 io_lo, io_hi, irq);
3115 } 2839 }
3116 data->ports[count] = 2840 data->ports[count] =
3117 parport_pc_probe_port(io_lo, io_hi, irq, 2841 parport_pc_probe_port(io_lo, io_hi, irq,
3118 PARPORT_DMA_NONE, &dev->dev, 2842 PARPORT_DMA_NONE, &dev->dev,
3119 IRQF_SHARED); 2843 IRQF_SHARED);
3120 if (data->ports[count]) 2844 if (data->ports[count])
3121 count++; 2845 count++;
3122 } 2846 }
3123 2847
3124 data->num = count; 2848 data->num = count;
3125 2849
3126 if (cards[i].postinit_hook) 2850 if (cards[i].postinit_hook)
3127 cards[i].postinit_hook(dev, count == 0); 2851 cards[i].postinit_hook(dev, count == 0);
3128 2852
3129 if (count) { 2853 if (count) {
3130 pci_set_drvdata(dev, data); 2854 pci_set_drvdata(dev, data);
3131 return 0; 2855 return 0;
3132 } 2856 }
3133 2857
3134 kfree(data); 2858 kfree(data);
3135 2859
3136 return -ENODEV; 2860 return -ENODEV;
3137 } 2861 }
3138 2862
3139 static void __devexit parport_pc_pci_remove(struct pci_dev *dev) 2863 static void __devexit parport_pc_pci_remove(struct pci_dev *dev)
3140 { 2864 {
3141 struct pci_parport_data *data = pci_get_drvdata(dev); 2865 struct pci_parport_data *data = pci_get_drvdata(dev);
3142 int i; 2866 int i;
3143 2867
3144 pci_set_drvdata(dev, NULL); 2868 pci_set_drvdata(dev, NULL);
3145 2869
3146 if (data) { 2870 if (data) {
3147 for (i = data->num - 1; i >= 0; i--) 2871 for (i = data->num - 1; i >= 0; i--)
3148 parport_pc_unregister_port(data->ports[i]); 2872 parport_pc_unregister_port(data->ports[i]);
3149 2873
3150 kfree(data); 2874 kfree(data);
3151 } 2875 }
3152 } 2876 }
3153 2877
3154 static struct pci_driver parport_pc_pci_driver = { 2878 static struct pci_driver parport_pc_pci_driver = {
3155 .name = "parport_pc", 2879 .name = "parport_pc",
3156 .id_table = parport_pc_pci_tbl, 2880 .id_table = parport_pc_pci_tbl,
3157 .probe = parport_pc_pci_probe, 2881 .probe = parport_pc_pci_probe,
3158 .remove = __devexit_p(parport_pc_pci_remove), 2882 .remove = __devexit_p(parport_pc_pci_remove),
3159 }; 2883 };
3160 2884
3161 static int __init parport_pc_init_superio(int autoirq, int autodma) 2885 static int __init parport_pc_init_superio(int autoirq, int autodma)
3162 { 2886 {
3163 const struct pci_device_id *id; 2887 const struct pci_device_id *id;
3164 struct pci_dev *pdev = NULL; 2888 struct pci_dev *pdev = NULL;
3165 int ret = 0; 2889 int ret = 0;
3166 2890
3167 for_each_pci_dev(pdev) { 2891 for_each_pci_dev(pdev) {
3168 id = pci_match_id(parport_pc_pci_tbl, pdev); 2892 id = pci_match_id(parport_pc_pci_tbl, pdev);
3169 if (id == NULL || id->driver_data >= last_sio) 2893 if (id == NULL || id->driver_data >= last_sio)
3170 continue; 2894 continue;
3171 2895
3172 if (parport_pc_superio_info[id->driver_data].probe( 2896 if (parport_pc_superio_info[id->driver_data].probe(
3173 pdev, autoirq, autodma, 2897 pdev, autoirq, autodma,
3174 parport_pc_superio_info[id->driver_data].via)) { 2898 parport_pc_superio_info[id->driver_data].via)) {
3175 ret++; 2899 ret++;
3176 } 2900 }
3177 } 2901 }
3178 2902
3179 return ret; /* number of devices found */ 2903 return ret; /* number of devices found */
3180 } 2904 }
3181 #else 2905 #else
3182 static struct pci_driver parport_pc_pci_driver; 2906 static struct pci_driver parport_pc_pci_driver;
3183 static int __init parport_pc_init_superio(int autoirq, int autodma) 2907 static int __init parport_pc_init_superio(int autoirq, int autodma)
3184 { 2908 {
3185 return 0; 2909 return 0;
3186 } 2910 }
3187 #endif /* CONFIG_PCI */ 2911 #endif /* CONFIG_PCI */
3188 2912
3189 #ifdef CONFIG_PNP 2913 #ifdef CONFIG_PNP
3190 2914
3191 static const struct pnp_device_id parport_pc_pnp_tbl[] = { 2915 static const struct pnp_device_id parport_pc_pnp_tbl[] = {
3192 /* Standard LPT Printer Port */ 2916 /* Standard LPT Printer Port */
3193 {.id = "PNP0400", .driver_data = 0}, 2917 {.id = "PNP0400", .driver_data = 0},
3194 /* ECP Printer Port */ 2918 /* ECP Printer Port */
3195 {.id = "PNP0401", .driver_data = 0}, 2919 {.id = "PNP0401", .driver_data = 0},
3196 { } 2920 { }
3197 }; 2921 };
3198 2922
3199 MODULE_DEVICE_TABLE(pnp, parport_pc_pnp_tbl); 2923 MODULE_DEVICE_TABLE(pnp, parport_pc_pnp_tbl);
3200 2924
3201 static int parport_pc_pnp_probe(struct pnp_dev *dev, 2925 static int parport_pc_pnp_probe(struct pnp_dev *dev,
3202 const struct pnp_device_id *id) 2926 const struct pnp_device_id *id)
3203 { 2927 {
3204 struct parport *pdata; 2928 struct parport *pdata;
3205 unsigned long io_lo, io_hi; 2929 unsigned long io_lo, io_hi;
3206 int dma, irq; 2930 int dma, irq;
3207 2931
3208 if (pnp_port_valid(dev, 0) && 2932 if (pnp_port_valid(dev, 0) &&
3209 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED)) { 2933 !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED)) {
3210 io_lo = pnp_port_start(dev, 0); 2934 io_lo = pnp_port_start(dev, 0);
3211 } else 2935 } else
3212 return -EINVAL; 2936 return -EINVAL;
3213 2937
3214 if (pnp_port_valid(dev, 1) && 2938 if (pnp_port_valid(dev, 1) &&
3215 !(pnp_port_flags(dev, 1) & IORESOURCE_DISABLED)) { 2939 !(pnp_port_flags(dev, 1) & IORESOURCE_DISABLED)) {
3216 io_hi = pnp_port_start(dev, 1); 2940 io_hi = pnp_port_start(dev, 1);
3217 } else 2941 } else
3218 io_hi = 0; 2942 io_hi = 0;
3219 2943
3220 if (pnp_irq_valid(dev, 0) && 2944 if (pnp_irq_valid(dev, 0) &&
3221 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED)) { 2945 !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED)) {
3222 irq = pnp_irq(dev, 0); 2946 irq = pnp_irq(dev, 0);
3223 } else 2947 } else
3224 irq = PARPORT_IRQ_NONE; 2948 irq = PARPORT_IRQ_NONE;
3225 2949
3226 if (pnp_dma_valid(dev, 0) && 2950 if (pnp_dma_valid(dev, 0) &&
3227 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED)) { 2951 !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED)) {
3228 dma = pnp_dma(dev, 0); 2952 dma = pnp_dma(dev, 0);
3229 } else 2953 } else
3230 dma = PARPORT_DMA_NONE; 2954 dma = PARPORT_DMA_NONE;
3231 2955
3232 dev_info(&dev->dev, "reported by %s\n", dev->protocol->name); 2956 dev_info(&dev->dev, "reported by %s\n", dev->protocol->name);
3233 pdata = parport_pc_probe_port(io_lo, io_hi, irq, dma, &dev->dev, 0); 2957 pdata = parport_pc_probe_port(io_lo, io_hi, irq, dma, &dev->dev, 0);
3234 if (pdata == NULL) 2958 if (pdata == NULL)
3235 return -ENODEV; 2959 return -ENODEV;
3236 2960
3237 pnp_set_drvdata(dev, pdata); 2961 pnp_set_drvdata(dev, pdata);
3238 return 0; 2962 return 0;
3239 } 2963 }
3240 2964
3241 static void parport_pc_pnp_remove(struct pnp_dev *dev) 2965 static void parport_pc_pnp_remove(struct pnp_dev *dev)
3242 { 2966 {
3243 struct parport *pdata = (struct parport *)pnp_get_drvdata(dev); 2967 struct parport *pdata = (struct parport *)pnp_get_drvdata(dev);
3244 if (!pdata) 2968 if (!pdata)
3245 return; 2969 return;
3246 2970
3247 parport_pc_unregister_port(pdata); 2971 parport_pc_unregister_port(pdata);
3248 } 2972 }
3249 2973
3250 /* we only need the pnp layer to activate the device, at least for now */ 2974 /* we only need the pnp layer to activate the device, at least for now */
3251 static struct pnp_driver parport_pc_pnp_driver = { 2975 static struct pnp_driver parport_pc_pnp_driver = {
3252 .name = "parport_pc", 2976 .name = "parport_pc",
3253 .id_table = parport_pc_pnp_tbl, 2977 .id_table = parport_pc_pnp_tbl,
3254 .probe = parport_pc_pnp_probe, 2978 .probe = parport_pc_pnp_probe,
3255 .remove = parport_pc_pnp_remove, 2979 .remove = parport_pc_pnp_remove,
3256 }; 2980 };
3257 2981
3258 #else 2982 #else
3259 static struct pnp_driver parport_pc_pnp_driver; 2983 static struct pnp_driver parport_pc_pnp_driver;
3260 #endif /* CONFIG_PNP */ 2984 #endif /* CONFIG_PNP */
3261 2985
3262 static int __devinit parport_pc_platform_probe(struct platform_device *pdev) 2986 static int __devinit parport_pc_platform_probe(struct platform_device *pdev)
3263 { 2987 {
3264 /* Always succeed, the actual probing is done in 2988 /* Always succeed, the actual probing is done in
3265 * parport_pc_probe_port(). */ 2989 * parport_pc_probe_port(). */
3266 return 0; 2990 return 0;
3267 } 2991 }
3268 2992
3269 static struct platform_driver parport_pc_platform_driver = { 2993 static struct platform_driver parport_pc_platform_driver = {
3270 .driver = { 2994 .driver = {
3271 .owner = THIS_MODULE, 2995 .owner = THIS_MODULE,
3272 .name = "parport_pc", 2996 .name = "parport_pc",
3273 }, 2997 },
3274 .probe = parport_pc_platform_probe, 2998 .probe = parport_pc_platform_probe,
3275 }; 2999 };
3276 3000
3277 /* This is called by parport_pc_find_nonpci_ports (in asm/parport.h) */ 3001 /* This is called by parport_pc_find_nonpci_ports (in asm/parport.h) */
3278 static int __devinit __attribute__((unused)) 3002 static int __devinit __attribute__((unused))
3279 parport_pc_find_isa_ports(int autoirq, int autodma) 3003 parport_pc_find_isa_ports(int autoirq, int autodma)
3280 { 3004 {
3281 int count = 0; 3005 int count = 0;
3282 3006
3283 if (parport_pc_probe_port(0x3bc, 0x7bc, autoirq, autodma, NULL, 0)) 3007 if (parport_pc_probe_port(0x3bc, 0x7bc, autoirq, autodma, NULL, 0))
3284 count++; 3008 count++;
3285 if (parport_pc_probe_port(0x378, 0x778, autoirq, autodma, NULL, 0)) 3009 if (parport_pc_probe_port(0x378, 0x778, autoirq, autodma, NULL, 0))
3286 count++; 3010 count++;
3287 if (parport_pc_probe_port(0x278, 0x678, autoirq, autodma, NULL, 0)) 3011 if (parport_pc_probe_port(0x278, 0x678, autoirq, autodma, NULL, 0))
3288 count++; 3012 count++;
3289 3013
3290 return count; 3014 return count;
3291 } 3015 }
3292 3016
3293 /* This function is called by parport_pc_init if the user didn't 3017 /* This function is called by parport_pc_init if the user didn't
3294 * specify any ports to probe. Its job is to find some ports. Order 3018 * specify any ports to probe. Its job is to find some ports. Order
3295 * is important here -- we want ISA ports to be registered first, 3019 * is important here -- we want ISA ports to be registered first,
3296 * followed by PCI cards (for least surprise), but before that we want 3020 * followed by PCI cards (for least surprise), but before that we want
3297 * to do chipset-specific tests for some onboard ports that we know 3021 * to do chipset-specific tests for some onboard ports that we know
3298 * about. 3022 * about.
3299 * 3023 *
3300 * autoirq is PARPORT_IRQ_NONE, PARPORT_IRQ_AUTO, or PARPORT_IRQ_PROBEONLY 3024 * autoirq is PARPORT_IRQ_NONE, PARPORT_IRQ_AUTO, or PARPORT_IRQ_PROBEONLY
3301 * autodma is PARPORT_DMA_NONE or PARPORT_DMA_AUTO 3025 * autodma is PARPORT_DMA_NONE or PARPORT_DMA_AUTO
3302 */ 3026 */
3303 static void __init parport_pc_find_ports(int autoirq, int autodma) 3027 static void __init parport_pc_find_ports(int autoirq, int autodma)
3304 { 3028 {
3305 int count = 0, err; 3029 int count = 0, err;
3306 3030
3307 #ifdef CONFIG_PARPORT_PC_SUPERIO 3031 #ifdef CONFIG_PARPORT_PC_SUPERIO
3308 detect_and_report_it87(); 3032 detect_and_report_it87();
3309 detect_and_report_winbond(); 3033 detect_and_report_winbond();
3310 detect_and_report_smsc(); 3034 detect_and_report_smsc();
3311 #endif 3035 #endif
3312 3036
3313 /* Onboard SuperIO chipsets that show themselves on the PCI bus. */ 3037 /* Onboard SuperIO chipsets that show themselves on the PCI bus. */
3314 count += parport_pc_init_superio(autoirq, autodma); 3038 count += parport_pc_init_superio(autoirq, autodma);
3315 3039
3316 /* PnP ports, skip detection if SuperIO already found them */ 3040 /* PnP ports, skip detection if SuperIO already found them */
3317 if (!count) { 3041 if (!count) {
3318 err = pnp_register_driver(&parport_pc_pnp_driver); 3042 err = pnp_register_driver(&parport_pc_pnp_driver);
3319 if (!err) 3043 if (!err)
3320 pnp_registered_parport = 1; 3044 pnp_registered_parport = 1;
3321 } 3045 }
3322 3046
3323 /* ISA ports and whatever (see asm/parport.h). */ 3047 /* ISA ports and whatever (see asm/parport.h). */
3324 parport_pc_find_nonpci_ports(autoirq, autodma); 3048 parport_pc_find_nonpci_ports(autoirq, autodma);
3325 3049
3326 err = pci_register_driver(&parport_pc_pci_driver); 3050 err = pci_register_driver(&parport_pc_pci_driver);
3327 if (!err) 3051 if (!err)
3328 pci_registered_parport = 1; 3052 pci_registered_parport = 1;
3329 } 3053 }
3330 3054
3331 /* 3055 /*
3332 * Piles of crap below pretend to be a parser for module and kernel 3056 * Piles of crap below pretend to be a parser for module and kernel
3333 * parameters. Say "thank you" to whoever had come up with that 3057 * parameters. Say "thank you" to whoever had come up with that
3334 * syntax and keep in mind that code below is a cleaned up version. 3058 * syntax and keep in mind that code below is a cleaned up version.
3335 */ 3059 */
3336 3060
3337 static int __initdata io[PARPORT_PC_MAX_PORTS+1] = { 3061 static int __initdata io[PARPORT_PC_MAX_PORTS+1] = {
3338 [0 ... PARPORT_PC_MAX_PORTS] = 0 3062 [0 ... PARPORT_PC_MAX_PORTS] = 0
3339 }; 3063 };
3340 static int __initdata io_hi[PARPORT_PC_MAX_PORTS+1] = { 3064 static int __initdata io_hi[PARPORT_PC_MAX_PORTS+1] = {
3341 [0 ... PARPORT_PC_MAX_PORTS] = PARPORT_IOHI_AUTO 3065 [0 ... PARPORT_PC_MAX_PORTS] = PARPORT_IOHI_AUTO
3342 }; 3066 };
3343 static int __initdata dmaval[PARPORT_PC_MAX_PORTS] = { 3067 static int __initdata dmaval[PARPORT_PC_MAX_PORTS] = {
3344 [0 ... PARPORT_PC_MAX_PORTS-1] = PARPORT_DMA_NONE 3068 [0 ... PARPORT_PC_MAX_PORTS-1] = PARPORT_DMA_NONE
3345 }; 3069 };
3346 static int __initdata irqval[PARPORT_PC_MAX_PORTS] = { 3070 static int __initdata irqval[PARPORT_PC_MAX_PORTS] = {
3347 [0 ... PARPORT_PC_MAX_PORTS-1] = PARPORT_IRQ_PROBEONLY 3071 [0 ... PARPORT_PC_MAX_PORTS-1] = PARPORT_IRQ_PROBEONLY
3348 }; 3072 };
3349 3073
3350 static int __init parport_parse_param(const char *s, int *val, 3074 static int __init parport_parse_param(const char *s, int *val,
3351 int automatic, int none, int nofifo) 3075 int automatic, int none, int nofifo)
3352 { 3076 {
3353 if (!s) 3077 if (!s)
3354 return 0; 3078 return 0;
3355 if (!strncmp(s, "auto", 4)) 3079 if (!strncmp(s, "auto", 4))
3356 *val = automatic; 3080 *val = automatic;
3357 else if (!strncmp(s, "none", 4)) 3081 else if (!strncmp(s, "none", 4))
3358 *val = none; 3082 *val = none;
3359 else if (nofifo && !strncmp(s, "nofifo", 6)) 3083 else if (nofifo && !strncmp(s, "nofifo", 6))
3360 *val = nofifo; 3084 *val = nofifo;
3361 else { 3085 else {
3362 char *ep; 3086 char *ep;
3363 unsigned long r = simple_strtoul(s, &ep, 0); 3087 unsigned long r = simple_strtoul(s, &ep, 0);
3364 if (ep != s) 3088 if (ep != s)
3365 *val = r; 3089 *val = r;
3366 else { 3090 else {
3367 printk(KERN_ERR "parport: bad specifier `%s'\n", s); 3091 printk(KERN_ERR "parport: bad specifier `%s'\n", s);
3368 return -1; 3092 return -1;
3369 } 3093 }
3370 } 3094 }
3371 return 0; 3095 return 0;
3372 } 3096 }
3373 3097
3374 static int __init parport_parse_irq(const char *irqstr, int *val) 3098 static int __init parport_parse_irq(const char *irqstr, int *val)
3375 { 3099 {
3376 return parport_parse_param(irqstr, val, PARPORT_IRQ_AUTO, 3100 return parport_parse_param(irqstr, val, PARPORT_IRQ_AUTO,
3377 PARPORT_IRQ_NONE, 0); 3101 PARPORT_IRQ_NONE, 0);
3378 } 3102 }
3379 3103
3380 static int __init parport_parse_dma(const char *dmastr, int *val) 3104 static int __init parport_parse_dma(const char *dmastr, int *val)
3381 { 3105 {
3382 return parport_parse_param(dmastr, val, PARPORT_DMA_AUTO, 3106 return parport_parse_param(dmastr, val, PARPORT_DMA_AUTO,
3383 PARPORT_DMA_NONE, PARPORT_DMA_NOFIFO); 3107 PARPORT_DMA_NONE, PARPORT_DMA_NOFIFO);
3384 } 3108 }
3385 3109
3386 #ifdef CONFIG_PCI 3110 #ifdef CONFIG_PCI
3387 static int __init parport_init_mode_setup(char *str) 3111 static int __init parport_init_mode_setup(char *str)
3388 { 3112 {
3389 printk(KERN_DEBUG 3113 printk(KERN_DEBUG
3390 "parport_pc.c: Specified parameter parport_init_mode=%s\n", str); 3114 "parport_pc.c: Specified parameter parport_init_mode=%s\n", str);
3391 3115
3392 if (!strcmp(str, "spp")) 3116 if (!strcmp(str, "spp"))
3393 parport_init_mode = 1; 3117 parport_init_mode = 1;
3394 if (!strcmp(str, "ps2")) 3118 if (!strcmp(str, "ps2"))
3395 parport_init_mode = 2; 3119 parport_init_mode = 2;
3396 if (!strcmp(str, "epp")) 3120 if (!strcmp(str, "epp"))
3397 parport_init_mode = 3; 3121 parport_init_mode = 3;
3398 if (!strcmp(str, "ecp")) 3122 if (!strcmp(str, "ecp"))
3399 parport_init_mode = 4; 3123 parport_init_mode = 4;
3400 if (!strcmp(str, "ecpepp")) 3124 if (!strcmp(str, "ecpepp"))
3401 parport_init_mode = 5; 3125 parport_init_mode = 5;
3402 return 1; 3126 return 1;
3403 } 3127 }
3404 #endif 3128 #endif
3405 3129
3406 #ifdef MODULE 3130 #ifdef MODULE
3407 static char *irq[PARPORT_PC_MAX_PORTS]; 3131 static char *irq[PARPORT_PC_MAX_PORTS];
3408 static char *dma[PARPORT_PC_MAX_PORTS]; 3132 static char *dma[PARPORT_PC_MAX_PORTS];
3409 3133
3410 MODULE_PARM_DESC(io, "Base I/O address (SPP regs)"); 3134 MODULE_PARM_DESC(io, "Base I/O address (SPP regs)");
3411 module_param_array(io, int, NULL, 0); 3135 module_param_array(io, int, NULL, 0);
3412 MODULE_PARM_DESC(io_hi, "Base I/O address (ECR)"); 3136 MODULE_PARM_DESC(io_hi, "Base I/O address (ECR)");
3413 module_param_array(io_hi, int, NULL, 0); 3137 module_param_array(io_hi, int, NULL, 0);
3414 MODULE_PARM_DESC(irq, "IRQ line"); 3138 MODULE_PARM_DESC(irq, "IRQ line");
3415 module_param_array(irq, charp, NULL, 0); 3139 module_param_array(irq, charp, NULL, 0);
3416 MODULE_PARM_DESC(dma, "DMA channel"); 3140 MODULE_PARM_DESC(dma, "DMA channel");
3417 module_param_array(dma, charp, NULL, 0); 3141 module_param_array(dma, charp, NULL, 0);
3418 #if defined(CONFIG_PARPORT_PC_SUPERIO) || \ 3142 #if defined(CONFIG_PARPORT_PC_SUPERIO) || \
3419 (defined(CONFIG_PARPORT_1284) && defined(CONFIG_PARPORT_PC_FIFO)) 3143 (defined(CONFIG_PARPORT_1284) && defined(CONFIG_PARPORT_PC_FIFO))
3420 MODULE_PARM_DESC(verbose_probing, "Log chit-chat during initialisation"); 3144 MODULE_PARM_DESC(verbose_probing, "Log chit-chat during initialisation");
3421 module_param(verbose_probing, int, 0644); 3145 module_param(verbose_probing, int, 0644);
3422 #endif 3146 #endif
3423 #ifdef CONFIG_PCI 3147 #ifdef CONFIG_PCI
3424 static char *init_mode; 3148 static char *init_mode;
3425 MODULE_PARM_DESC(init_mode, 3149 MODULE_PARM_DESC(init_mode,
3426 "Initialise mode for VIA VT8231 port (spp, ps2, epp, ecp or ecpepp)"); 3150 "Initialise mode for VIA VT8231 port (spp, ps2, epp, ecp or ecpepp)");
3427 module_param(init_mode, charp, 0); 3151 module_param(init_mode, charp, 0);
3428 #endif 3152 #endif
3429 3153
3430 static int __init parse_parport_params(void) 3154 static int __init parse_parport_params(void)
3431 { 3155 {
3432 unsigned int i; 3156 unsigned int i;
3433 int val; 3157 int val;
3434 3158
3435 #ifdef CONFIG_PCI 3159 #ifdef CONFIG_PCI
3436 if (init_mode) 3160 if (init_mode)
3437 parport_init_mode_setup(init_mode); 3161 parport_init_mode_setup(init_mode);
3438 #endif 3162 #endif
3439 3163
3440 for (i = 0; i < PARPORT_PC_MAX_PORTS && io[i]; i++) { 3164 for (i = 0; i < PARPORT_PC_MAX_PORTS && io[i]; i++) {
3441 if (parport_parse_irq(irq[i], &val)) 3165 if (parport_parse_irq(irq[i], &val))
3442 return 1; 3166 return 1;
3443 irqval[i] = val; 3167 irqval[i] = val;
3444 if (parport_parse_dma(dma[i], &val)) 3168 if (parport_parse_dma(dma[i], &val))
3445 return 1; 3169 return 1;
3446 dmaval[i] = val; 3170 dmaval[i] = val;
3447 } 3171 }
3448 if (!io[0]) { 3172 if (!io[0]) {
3449 /* The user can make us use any IRQs or DMAs we find. */ 3173 /* The user can make us use any IRQs or DMAs we find. */
3450 if (irq[0] && !parport_parse_irq(irq[0], &val)) 3174 if (irq[0] && !parport_parse_irq(irq[0], &val))
3451 switch (val) { 3175 switch (val) {
3452 case PARPORT_IRQ_NONE: 3176 case PARPORT_IRQ_NONE:
3453 case PARPORT_IRQ_AUTO: 3177 case PARPORT_IRQ_AUTO:
3454 irqval[0] = val; 3178 irqval[0] = val;
3455 break; 3179 break;
3456 default: 3180 default:
3457 printk(KERN_WARNING 3181 printk(KERN_WARNING
3458 "parport_pc: irq specified " 3182 "parport_pc: irq specified "
3459 "without base address. Use 'io=' " 3183 "without base address. Use 'io=' "
3460 "to specify one\n"); 3184 "to specify one\n");
3461 } 3185 }
3462 3186
3463 if (dma[0] && !parport_parse_dma(dma[0], &val)) 3187 if (dma[0] && !parport_parse_dma(dma[0], &val))
3464 switch (val) { 3188 switch (val) {
3465 case PARPORT_DMA_NONE: 3189 case PARPORT_DMA_NONE:
3466 case PARPORT_DMA_AUTO: 3190 case PARPORT_DMA_AUTO:
3467 dmaval[0] = val; 3191 dmaval[0] = val;
3468 break; 3192 break;
3469 default: 3193 default:
3470 printk(KERN_WARNING 3194 printk(KERN_WARNING
3471 "parport_pc: dma specified " 3195 "parport_pc: dma specified "
3472 "without base address. Use 'io=' " 3196 "without base address. Use 'io=' "
3473 "to specify one\n"); 3197 "to specify one\n");
3474 } 3198 }
3475 } 3199 }
3476 return 0; 3200 return 0;
3477 } 3201 }
3478 3202
3479 #else 3203 #else
3480 3204
3481 static int parport_setup_ptr __initdata; 3205 static int parport_setup_ptr __initdata;
3482 3206
3483 /* 3207 /*
3484 * Acceptable parameters: 3208 * Acceptable parameters:
3485 * 3209 *
3486 * parport=0 3210 * parport=0
3487 * parport=auto 3211 * parport=auto
3488 * parport=0xBASE[,IRQ[,DMA]] 3212 * parport=0xBASE[,IRQ[,DMA]]
3489 * 3213 *
3490 * IRQ/DMA may be numeric or 'auto' or 'none' 3214 * IRQ/DMA may be numeric or 'auto' or 'none'
3491 */ 3215 */
3492 static int __init parport_setup(char *str) 3216 static int __init parport_setup(char *str)
3493 { 3217 {
3494 char *endptr; 3218 char *endptr;
3495 char *sep; 3219 char *sep;
3496 int val; 3220 int val;
3497 3221
3498 if (!str || !*str || (*str == '0' && !*(str+1))) { 3222 if (!str || !*str || (*str == '0' && !*(str+1))) {
3499 /* Disable parport if "parport=0" in cmdline */ 3223 /* Disable parport if "parport=0" in cmdline */
3500 io[0] = PARPORT_DISABLE; 3224 io[0] = PARPORT_DISABLE;
3501 return 1; 3225 return 1;
3502 } 3226 }
3503 3227
3504 if (!strncmp(str, "auto", 4)) { 3228 if (!strncmp(str, "auto", 4)) {
3505 irqval[0] = PARPORT_IRQ_AUTO; 3229 irqval[0] = PARPORT_IRQ_AUTO;
3506 dmaval[0] = PARPORT_DMA_AUTO; 3230 dmaval[0] = PARPORT_DMA_AUTO;
3507 return 1; 3231 return 1;
3508 } 3232 }
3509 3233
3510 val = simple_strtoul(str, &endptr, 0); 3234 val = simple_strtoul(str, &endptr, 0);
3511 if (endptr == str) { 3235 if (endptr == str) {
3512 printk(KERN_WARNING "parport=%s not understood\n", str); 3236 printk(KERN_WARNING "parport=%s not understood\n", str);
3513 return 1; 3237 return 1;
3514 } 3238 }
3515 3239
3516 if (parport_setup_ptr == PARPORT_PC_MAX_PORTS) { 3240 if (parport_setup_ptr == PARPORT_PC_MAX_PORTS) {
3517 printk(KERN_ERR "parport=%s ignored, too many ports\n", str); 3241 printk(KERN_ERR "parport=%s ignored, too many ports\n", str);
3518 return 1; 3242 return 1;
3519 } 3243 }
3520 3244
3521 io[parport_setup_ptr] = val; 3245 io[parport_setup_ptr] = val;
3522 irqval[parport_setup_ptr] = PARPORT_IRQ_NONE; 3246 irqval[parport_setup_ptr] = PARPORT_IRQ_NONE;
3523 dmaval[parport_setup_ptr] = PARPORT_DMA_NONE; 3247 dmaval[parport_setup_ptr] = PARPORT_DMA_NONE;
3524 3248
3525 sep = strchr(str, ','); 3249 sep = strchr(str, ',');
3526 if (sep++) { 3250 if (sep++) {
3527 if (parport_parse_irq(sep, &val)) 3251 if (parport_parse_irq(sep, &val))
3528 return 1; 3252 return 1;
3529 irqval[parport_setup_ptr] = val; 3253 irqval[parport_setup_ptr] = val;
3530 sep = strchr(sep, ','); 3254 sep = strchr(sep, ',');
3531 if (sep++) { 3255 if (sep++) {
3532 if (parport_parse_dma(sep, &val)) 3256 if (parport_parse_dma(sep, &val))
3533 return 1; 3257 return 1;
3534 dmaval[parport_setup_ptr] = val; 3258 dmaval[parport_setup_ptr] = val;
3535 } 3259 }
3536 } 3260 }
3537 parport_setup_ptr++; 3261 parport_setup_ptr++;
3538 return 1; 3262 return 1;
3539 } 3263 }
3540 3264
3541 static int __init parse_parport_params(void) 3265 static int __init parse_parport_params(void)
3542 { 3266 {
3543 return io[0] == PARPORT_DISABLE; 3267 return io[0] == PARPORT_DISABLE;
3544 } 3268 }
3545 3269
3546 __setup("parport=", parport_setup); 3270 __setup("parport=", parport_setup);
3547 3271
3548 /* 3272 /*
3549 * Acceptable parameters: 3273 * Acceptable parameters:
3550 * 3274 *
3551 * parport_init_mode=[spp|ps2|epp|ecp|ecpepp] 3275 * parport_init_mode=[spp|ps2|epp|ecp|ecpepp]
3552 */ 3276 */
3553 #ifdef CONFIG_PCI 3277 #ifdef CONFIG_PCI
3554 __setup("parport_init_mode=", parport_init_mode_setup); 3278 __setup("parport_init_mode=", parport_init_mode_setup);
3555 #endif 3279 #endif
3556 #endif 3280 #endif
3557 3281
3558 /* "Parser" ends here */ 3282 /* "Parser" ends here */
3559 3283
3560 static int __init parport_pc_init(void) 3284 static int __init parport_pc_init(void)
3561 { 3285 {
3562 int err; 3286 int err;
3563 3287
3564 if (parse_parport_params()) 3288 if (parse_parport_params())
3565 return -EINVAL; 3289 return -EINVAL;
3566 3290
3567 err = platform_driver_register(&parport_pc_platform_driver); 3291 err = platform_driver_register(&parport_pc_platform_driver);
3568 if (err) 3292 if (err)
3569 return err; 3293 return err;
3570 3294
3571 if (io[0]) { 3295 if (io[0]) {
3572 int i; 3296 int i;
3573 /* Only probe the ports we were given. */ 3297 /* Only probe the ports we were given. */
3574 user_specified = 1; 3298 user_specified = 1;
3575 for (i = 0; i < PARPORT_PC_MAX_PORTS; i++) { 3299 for (i = 0; i < PARPORT_PC_MAX_PORTS; i++) {
3576 if (!io[i]) 3300 if (!io[i])
3577 break; 3301 break;
3578 if (io_hi[i] == PARPORT_IOHI_AUTO) 3302 if (io_hi[i] == PARPORT_IOHI_AUTO)
3579 io_hi[i] = 0x400 + io[i]; 3303 io_hi[i] = 0x400 + io[i];
3580 parport_pc_probe_port(io[i], io_hi[i], 3304 parport_pc_probe_port(io[i], io_hi[i],
3581 irqval[i], dmaval[i], NULL, 0); 3305 irqval[i], dmaval[i], NULL, 0);
3582 } 3306 }
3583 } else 3307 } else
3584 parport_pc_find_ports(irqval[0], dmaval[0]); 3308 parport_pc_find_ports(irqval[0], dmaval[0]);
3585 3309
3586 return 0; 3310 return 0;
3587 } 3311 }
3588 3312
3589 static void __exit parport_pc_exit(void) 3313 static void __exit parport_pc_exit(void)
3590 { 3314 {
3591 if (pci_registered_parport) 3315 if (pci_registered_parport)
3592 pci_unregister_driver(&parport_pc_pci_driver); 3316 pci_unregister_driver(&parport_pc_pci_driver);
3593 if (pnp_registered_parport) 3317 if (pnp_registered_parport)
3594 pnp_unregister_driver(&parport_pc_pnp_driver); 3318 pnp_unregister_driver(&parport_pc_pnp_driver);
3595 platform_driver_unregister(&parport_pc_platform_driver); 3319 platform_driver_unregister(&parport_pc_platform_driver);
3596 3320
3597 while (!list_empty(&ports_list)) { 3321 while (!list_empty(&ports_list)) {
3598 struct parport_pc_private *priv; 3322 struct parport_pc_private *priv;
3599 struct parport *port; 3323 struct parport *port;
3600 priv = list_entry(ports_list.next, 3324 priv = list_entry(ports_list.next,
3601 struct parport_pc_private, list); 3325 struct parport_pc_private, list);
3602 port = priv->port; 3326 port = priv->port;
3603 if (port->dev && port->dev->bus == &platform_bus_type) 3327 if (port->dev && port->dev->bus == &platform_bus_type)
3604 platform_device_unregister( 3328 platform_device_unregister(
3605 to_platform_device(port->dev)); 3329 to_platform_device(port->dev));
3606 parport_pc_unregister_port(port); 3330 parport_pc_unregister_port(port);
3607 } 3331 }
3608 } 3332 }
3609 3333
3610 MODULE_AUTHOR("Phil Blundell, Tim Waugh, others"); 3334 MODULE_AUTHOR("Phil Blundell, Tim Waugh, others");
3611 MODULE_DESCRIPTION("PC-style parallel port driver"); 3335 MODULE_DESCRIPTION("PC-style parallel port driver");
3612 MODULE_LICENSE("GPL"); 3336 MODULE_LICENSE("GPL");
3613 module_init(parport_pc_init) 3337 module_init(parport_pc_init)
3614 module_exit(parport_pc_exit) 3338 module_exit(parport_pc_exit)
3615 3339
drivers/parport/parport_sunbpp.c
Diff comments   View file @ 9912143
1 /* parport_sunbpp.c: Parallel-port routines for SBUS 1 /* parport_sunbpp.c: Parallel-port routines for SBUS
2 * 2 *
3 * Author: Derrick J. Brashear <shadow@dementia.org> 3 * Author: Derrick J. Brashear <shadow@dementia.org>
4 * 4 *
5 * based on work by: 5 * based on work by:
6 * Phil Blundell <philb@gnu.org> 6 * Phil Blundell <philb@gnu.org>
7 * Tim Waugh <tim@cyberelk.demon.co.uk> 7 * Tim Waugh <tim@cyberelk.demon.co.uk>
8 * Jose Renau <renau@acm.org> 8 * Jose Renau <renau@acm.org>
9 * David Campbell <campbell@tirian.che.curtin.edu.au> 9 * David Campbell <campbell@tirian.che.curtin.edu.au>
10 * Grant Guenther <grant@torque.net> 10 * Grant Guenther <grant@torque.net>
11 * Eddie C. Dost <ecd@skynet.be> 11 * Eddie C. Dost <ecd@skynet.be>
12 * Stephen Williams (steve@icarus.com) 12 * Stephen Williams (steve@icarus.com)
13 * Gus Baldauf (gbaldauf@ix.netcom.com) 13 * Gus Baldauf (gbaldauf@ix.netcom.com)
14 * Peter Zaitcev 14 * Peter Zaitcev
15 * Tom Dyas 15 * Tom Dyas
16 * 16 *
17 * Updated to new SBUS device framework: David S. Miller <davem@davemloft.net> 17 * Updated to new SBUS device framework: David S. Miller <davem@davemloft.net>
18 * 18 *
19 */ 19 */
20 20
21 #include <linux/string.h> 21 #include <linux/string.h>
22 #include <linux/module.h> 22 #include <linux/module.h>
23 #include <linux/delay.h> 23 #include <linux/delay.h>
24 #include <linux/errno.h> 24 #include <linux/errno.h>
25 #include <linux/ioport.h> 25 #include <linux/ioport.h>
26 #include <linux/kernel.h> 26 #include <linux/kernel.h>
27 #include <linux/slab.h> 27 #include <linux/slab.h>
28 #include <linux/init.h> 28 #include <linux/init.h>
29 #include <linux/of.h> 29 #include <linux/of.h>
30 #include <linux/of_device.h> 30 #include <linux/of_device.h>
31 31
32 #include <linux/parport.h> 32 #include <linux/parport.h>
33 33
34 #include <asm/ptrace.h> 34 #include <asm/ptrace.h>
35 #include <linux/interrupt.h> 35 #include <linux/interrupt.h>
36 36
37 #include <asm/io.h> 37 #include <asm/io.h>
38 #include <asm/oplib.h> /* OpenProm Library */ 38 #include <asm/oplib.h> /* OpenProm Library */
39 #include <asm/dma.h> /* BPP uses LSI 64854 for DMA */ 39 #include <asm/dma.h> /* BPP uses LSI 64854 for DMA */
40 #include <asm/irq.h> 40 #include <asm/irq.h>
41 #include <asm/sunbpp.h> 41 #include <asm/sunbpp.h>
42 42
43 #undef __SUNBPP_DEBUG 43 #undef __SUNBPP_DEBUG
44 #ifdef __SUNBPP_DEBUG 44 #ifdef __SUNBPP_DEBUG
45 #define dprintk(x) printk x 45 #define dprintk(x) printk x
46 #else 46 #else
47 #define dprintk(x) 47 #define dprintk(x)
48 #endif 48 #endif
49 49
50 static void parport_sunbpp_disable_irq(struct parport *p) 50 static void parport_sunbpp_disable_irq(struct parport *p)
51 { 51 {
52 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; 52 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
53 u32 tmp; 53 u32 tmp;
54 54
55 tmp = sbus_readl(&regs->p_csr); 55 tmp = sbus_readl(&regs->p_csr);
56 tmp &= ~DMA_INT_ENAB; 56 tmp &= ~DMA_INT_ENAB;
57 sbus_writel(tmp, &regs->p_csr); 57 sbus_writel(tmp, &regs->p_csr);
58 } 58 }
59 59
60 static void parport_sunbpp_enable_irq(struct parport *p) 60 static void parport_sunbpp_enable_irq(struct parport *p)
61 { 61 {
62 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; 62 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
63 u32 tmp; 63 u32 tmp;
64 64
65 tmp = sbus_readl(&regs->p_csr); 65 tmp = sbus_readl(&regs->p_csr);
66 tmp |= DMA_INT_ENAB; 66 tmp |= DMA_INT_ENAB;
67 sbus_writel(tmp, &regs->p_csr); 67 sbus_writel(tmp, &regs->p_csr);
68 } 68 }
69 69
70 static void parport_sunbpp_write_data(struct parport *p, unsigned char d) 70 static void parport_sunbpp_write_data(struct parport *p, unsigned char d)
71 { 71 {
72 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; 72 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
73 73
74 sbus_writeb(d, &regs->p_dr); 74 sbus_writeb(d, &regs->p_dr);
75 dprintk((KERN_DEBUG "wrote 0x%x\n", d)); 75 dprintk((KERN_DEBUG "wrote 0x%x\n", d));
76 } 76 }
77 77
78 static unsigned char parport_sunbpp_read_data(struct parport *p) 78 static unsigned char parport_sunbpp_read_data(struct parport *p)
79 { 79 {
80 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; 80 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
81 81
82 return sbus_readb(&regs->p_dr); 82 return sbus_readb(&regs->p_dr);
83 } 83 }
84 84
85 #if 0
86 static void control_pc_to_sunbpp(struct parport *p, unsigned char status)
87 {
88 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
89 unsigned char value_tcr = sbus_readb(&regs->p_tcr);
90 unsigned char value_or = sbus_readb(&regs->p_or);
91
92 if (status & PARPORT_CONTROL_STROBE)
93 value_tcr |= P_TCR_DS;
94 if (status & PARPORT_CONTROL_AUTOFD)
95 value_or |= P_OR_AFXN;
96 if (status & PARPORT_CONTROL_INIT)
97 value_or |= P_OR_INIT;
98 if (status & PARPORT_CONTROL_SELECT)
99 value_or |= P_OR_SLCT_IN;
100
101 sbus_writeb(value_or, &regs->p_or);
102 sbus_writeb(value_tcr, &regs->p_tcr);
103 }
104 #endif
105
106 static unsigned char status_sunbpp_to_pc(struct parport *p) 85 static unsigned char status_sunbpp_to_pc(struct parport *p)
107 { 86 {
108 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; 87 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
109 unsigned char bits = 0; 88 unsigned char bits = 0;
110 unsigned char value_tcr = sbus_readb(&regs->p_tcr); 89 unsigned char value_tcr = sbus_readb(&regs->p_tcr);
111 unsigned char value_ir = sbus_readb(&regs->p_ir); 90 unsigned char value_ir = sbus_readb(&regs->p_ir);
112 91
113 if (!(value_ir & P_IR_ERR)) 92 if (!(value_ir & P_IR_ERR))
114 bits |= PARPORT_STATUS_ERROR; 93 bits |= PARPORT_STATUS_ERROR;
115 if (!(value_ir & P_IR_SLCT)) 94 if (!(value_ir & P_IR_SLCT))
116 bits |= PARPORT_STATUS_SELECT; 95 bits |= PARPORT_STATUS_SELECT;
117 if (!(value_ir & P_IR_PE)) 96 if (!(value_ir & P_IR_PE))
118 bits |= PARPORT_STATUS_PAPEROUT; 97 bits |= PARPORT_STATUS_PAPEROUT;
119 if (value_tcr & P_TCR_ACK) 98 if (value_tcr & P_TCR_ACK)
120 bits |= PARPORT_STATUS_ACK; 99 bits |= PARPORT_STATUS_ACK;
121 if (!(value_tcr & P_TCR_BUSY)) 100 if (!(value_tcr & P_TCR_BUSY))
122 bits |= PARPORT_STATUS_BUSY; 101 bits |= PARPORT_STATUS_BUSY;
123 102
124 dprintk((KERN_DEBUG "tcr 0x%x ir 0x%x\n", value_tcr, value_ir)); 103 dprintk((KERN_DEBUG "tcr 0x%x ir 0x%x\n", value_tcr, value_ir));
125 dprintk((KERN_DEBUG "read status 0x%x\n", bits)); 104 dprintk((KERN_DEBUG "read status 0x%x\n", bits));
126 return bits; 105 return bits;
127 } 106 }
128 107
129 static unsigned char control_sunbpp_to_pc(struct parport *p) 108 static unsigned char control_sunbpp_to_pc(struct parport *p)
130 { 109 {
131 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; 110 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
132 unsigned char bits = 0; 111 unsigned char bits = 0;
133 unsigned char value_tcr = sbus_readb(&regs->p_tcr); 112 unsigned char value_tcr = sbus_readb(&regs->p_tcr);
134 unsigned char value_or = sbus_readb(&regs->p_or); 113 unsigned char value_or = sbus_readb(&regs->p_or);
135 114
136 if (!(value_tcr & P_TCR_DS)) 115 if (!(value_tcr & P_TCR_DS))
137 bits |= PARPORT_CONTROL_STROBE; 116 bits |= PARPORT_CONTROL_STROBE;
138 if (!(value_or & P_OR_AFXN)) 117 if (!(value_or & P_OR_AFXN))
139 bits |= PARPORT_CONTROL_AUTOFD; 118 bits |= PARPORT_CONTROL_AUTOFD;
140 if (!(value_or & P_OR_INIT)) 119 if (!(value_or & P_OR_INIT))
141 bits |= PARPORT_CONTROL_INIT; 120 bits |= PARPORT_CONTROL_INIT;
142 if (value_or & P_OR_SLCT_IN) 121 if (value_or & P_OR_SLCT_IN)
143 bits |= PARPORT_CONTROL_SELECT; 122 bits |= PARPORT_CONTROL_SELECT;
144 123
145 dprintk((KERN_DEBUG "tcr 0x%x or 0x%x\n", value_tcr, value_or)); 124 dprintk((KERN_DEBUG "tcr 0x%x or 0x%x\n", value_tcr, value_or));
146 dprintk((KERN_DEBUG "read control 0x%x\n", bits)); 125 dprintk((KERN_DEBUG "read control 0x%x\n", bits));
147 return bits; 126 return bits;
148 } 127 }
149 128
150 static unsigned char parport_sunbpp_read_control(struct parport *p) 129 static unsigned char parport_sunbpp_read_control(struct parport *p)
151 { 130 {
152 return control_sunbpp_to_pc(p); 131 return control_sunbpp_to_pc(p);
153 } 132 }
154 133
155 static unsigned char parport_sunbpp_frob_control(struct parport *p, 134 static unsigned char parport_sunbpp_frob_control(struct parport *p,
156 unsigned char mask, 135 unsigned char mask,
157 unsigned char val) 136 unsigned char val)
158 { 137 {
159 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; 138 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
160 unsigned char value_tcr = sbus_readb(&regs->p_tcr); 139 unsigned char value_tcr = sbus_readb(&regs->p_tcr);
161 unsigned char value_or = sbus_readb(&regs->p_or); 140 unsigned char value_or = sbus_readb(&regs->p_or);
162 141
163 dprintk((KERN_DEBUG "frob1: tcr 0x%x or 0x%x\n", 142 dprintk((KERN_DEBUG "frob1: tcr 0x%x or 0x%x\n",
164 value_tcr, value_or)); 143 value_tcr, value_or));
165 if (mask & PARPORT_CONTROL_STROBE) { 144 if (mask & PARPORT_CONTROL_STROBE) {
166 if (val & PARPORT_CONTROL_STROBE) { 145 if (val & PARPORT_CONTROL_STROBE) {
167 value_tcr &= ~P_TCR_DS; 146 value_tcr &= ~P_TCR_DS;
168 } else { 147 } else {
169 value_tcr |= P_TCR_DS; 148 value_tcr |= P_TCR_DS;
170 } 149 }
171 } 150 }
172 if (mask & PARPORT_CONTROL_AUTOFD) { 151 if (mask & PARPORT_CONTROL_AUTOFD) {
173 if (val & PARPORT_CONTROL_AUTOFD) { 152 if (val & PARPORT_CONTROL_AUTOFD) {
174 value_or &= ~P_OR_AFXN; 153 value_or &= ~P_OR_AFXN;
175 } else { 154 } else {
176 value_or |= P_OR_AFXN; 155 value_or |= P_OR_AFXN;
177 } 156 }
178 } 157 }
179 if (mask & PARPORT_CONTROL_INIT) { 158 if (mask & PARPORT_CONTROL_INIT) {
180 if (val & PARPORT_CONTROL_INIT) { 159 if (val & PARPORT_CONTROL_INIT) {
181 value_or &= ~P_OR_INIT; 160 value_or &= ~P_OR_INIT;
182 } else { 161 } else {
183 value_or |= P_OR_INIT; 162 value_or |= P_OR_INIT;
184 } 163 }
185 } 164 }
186 if (mask & PARPORT_CONTROL_SELECT) { 165 if (mask & PARPORT_CONTROL_SELECT) {
187 if (val & PARPORT_CONTROL_SELECT) { 166 if (val & PARPORT_CONTROL_SELECT) {
188 value_or |= P_OR_SLCT_IN; 167 value_or |= P_OR_SLCT_IN;
189 } else { 168 } else {
190 value_or &= ~P_OR_SLCT_IN; 169 value_or &= ~P_OR_SLCT_IN;
191 } 170 }
192 } 171 }
193 172
194 sbus_writeb(value_or, &regs->p_or); 173 sbus_writeb(value_or, &regs->p_or);
195 sbus_writeb(value_tcr, &regs->p_tcr); 174 sbus_writeb(value_tcr, &regs->p_tcr);
196 dprintk((KERN_DEBUG "frob2: tcr 0x%x or 0x%x\n", 175 dprintk((KERN_DEBUG "frob2: tcr 0x%x or 0x%x\n",
197 value_tcr, value_or)); 176 value_tcr, value_or));
198 return parport_sunbpp_read_control(p); 177 return parport_sunbpp_read_control(p);
199 } 178 }
200 179
201 static void parport_sunbpp_write_control(struct parport *p, unsigned char d) 180 static void parport_sunbpp_write_control(struct parport *p, unsigned char d)
202 { 181 {
203 const unsigned char wm = (PARPORT_CONTROL_STROBE | 182 const unsigned char wm = (PARPORT_CONTROL_STROBE |
204 PARPORT_CONTROL_AUTOFD | 183 PARPORT_CONTROL_AUTOFD |
205 PARPORT_CONTROL_INIT | 184 PARPORT_CONTROL_INIT |
206 PARPORT_CONTROL_SELECT); 185 PARPORT_CONTROL_SELECT);
207 186
208 parport_sunbpp_frob_control (p, wm, d & wm); 187 parport_sunbpp_frob_control (p, wm, d & wm);
209 } 188 }
210 189
211 static unsigned char parport_sunbpp_read_status(struct parport *p) 190 static unsigned char parport_sunbpp_read_status(struct parport *p)
212 { 191 {
213 return status_sunbpp_to_pc(p); 192 return status_sunbpp_to_pc(p);
214 } 193 }
215 194
216 static void parport_sunbpp_data_forward (struct parport *p) 195 static void parport_sunbpp_data_forward (struct parport *p)
217 { 196 {
218 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; 197 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
219 unsigned char value_tcr = sbus_readb(&regs->p_tcr); 198 unsigned char value_tcr = sbus_readb(&regs->p_tcr);
220 199
221 dprintk((KERN_DEBUG "forward\n")); 200 dprintk((KERN_DEBUG "forward\n"));
222 value_tcr &= ~P_TCR_DIR; 201 value_tcr &= ~P_TCR_DIR;
223 sbus_writeb(value_tcr, &regs->p_tcr); 202 sbus_writeb(value_tcr, &regs->p_tcr);
224 } 203 }
225 204
226 static void parport_sunbpp_data_reverse (struct parport *p) 205 static void parport_sunbpp_data_reverse (struct parport *p)
227 { 206 {
228 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; 207 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base;
229 u8 val = sbus_readb(&regs->p_tcr); 208 u8 val = sbus_readb(&regs->p_tcr);
230 209
231 dprintk((KERN_DEBUG "reverse\n")); 210 dprintk((KERN_DEBUG "reverse\n"));
232 val |= P_TCR_DIR; 211 val |= P_TCR_DIR;
233 sbus_writeb(val, &regs->p_tcr); 212 sbus_writeb(val, &regs->p_tcr);
234 } 213 }
235 214
236 static void parport_sunbpp_init_state(struct pardevice *dev, struct parport_state *s) 215 static void parport_sunbpp_init_state(struct pardevice *dev, struct parport_state *s)
237 { 216 {
238 s->u.pc.ctr = 0xc; 217 s->u.pc.ctr = 0xc;
239 s->u.pc.ecr = 0x0; 218 s->u.pc.ecr = 0x0;
240 } 219 }
241 220
242 static void parport_sunbpp_save_state(struct parport *p, struct parport_state *s) 221 static void parport_sunbpp_save_state(struct parport *p, struct parport_state *s)
243 { 222 {
244 s->u.pc.ctr = parport_sunbpp_read_control(p); 223 s->u.pc.ctr = parport_sunbpp_read_control(p);
245 } 224 }
246 225
247 static void parport_sunbpp_restore_state(struct parport *p, struct parport_state *s) 226 static void parport_sunbpp_restore_state(struct parport *p, struct parport_state *s)
248 { 227 {
249 parport_sunbpp_write_control(p, s->u.pc.ctr); 228 parport_sunbpp_write_control(p, s->u.pc.ctr);
250 } 229 }
251 230
252 static struct parport_operations parport_sunbpp_ops = 231 static struct parport_operations parport_sunbpp_ops =
253 { 232 {
254 .write_data = parport_sunbpp_write_data, 233 .write_data = parport_sunbpp_write_data,
255 .read_data = parport_sunbpp_read_data, 234 .read_data = parport_sunbpp_read_data,
256 235
257 .write_control = parport_sunbpp_write_control, 236 .write_control = parport_sunbpp_write_control,
258 .read_control = parport_sunbpp_read_control, 237 .read_control = parport_sunbpp_read_control,
259 .frob_control = parport_sunbpp_frob_control, 238 .frob_control = parport_sunbpp_frob_control,
260 239
261 .read_status = parport_sunbpp_read_status, 240 .read_status = parport_sunbpp_read_status,
262 241
263 .enable_irq = parport_sunbpp_enable_irq, 242 .enable_irq = parport_sunbpp_enable_irq,
264 .disable_irq = parport_sunbpp_disable_irq, 243 .disable_irq = parport_sunbpp_disable_irq,
265 244
266 .data_forward = parport_sunbpp_data_forward, 245 .data_forward = parport_sunbpp_data_forward,
267 .data_reverse = parport_sunbpp_data_reverse, 246 .data_reverse = parport_sunbpp_data_reverse,
268 247
269 .init_state = parport_sunbpp_init_state, 248 .init_state = parport_sunbpp_init_state,
270 .save_state = parport_sunbpp_save_state, 249 .save_state = parport_sunbpp_save_state,
271 .restore_state = parport_sunbpp_restore_state, 250 .restore_state = parport_sunbpp_restore_state,
272 251
273 .epp_write_data = parport_ieee1284_epp_write_data, 252 .epp_write_data = parport_ieee1284_epp_write_data,
274 .epp_read_data = parport_ieee1284_epp_read_data, 253 .epp_read_data = parport_ieee1284_epp_read_data,
275 .epp_write_addr = parport_ieee1284_epp_write_addr, 254 .epp_write_addr = parport_ieee1284_epp_write_addr,
276 .epp_read_addr = parport_ieee1284_epp_read_addr, 255 .epp_read_addr = parport_ieee1284_epp_read_addr,
277 256
278 .ecp_write_data = parport_ieee1284_ecp_write_data, 257 .ecp_write_data = parport_ieee1284_ecp_write_data,
279 .ecp_read_data = parport_ieee1284_ecp_read_data, 258 .ecp_read_data = parport_ieee1284_ecp_read_data,
280 .ecp_write_addr = parport_ieee1284_ecp_write_addr, 259 .ecp_write_addr = parport_ieee1284_ecp_write_addr,
281 260
282 .compat_write_data = parport_ieee1284_write_compat, 261 .compat_write_data = parport_ieee1284_write_compat,
283 .nibble_read_data = parport_ieee1284_read_nibble, 262 .nibble_read_data = parport_ieee1284_read_nibble,
284 .byte_read_data = parport_ieee1284_read_byte, 263 .byte_read_data = parport_ieee1284_read_byte,
285 264
286 .owner = THIS_MODULE, 265 .owner = THIS_MODULE,
287 }; 266 };
288 267
289 static int __devinit bpp_probe(struct platform_device *op) 268 static int __devinit bpp_probe(struct platform_device *op)
290 { 269 {
291 struct parport_operations *ops; 270 struct parport_operations *ops;
292 struct bpp_regs __iomem *regs; 271 struct bpp_regs __iomem *regs;
293 int irq, dma, err = 0, size; 272 int irq, dma, err = 0, size;
294 unsigned char value_tcr; 273 unsigned char value_tcr;
295 void __iomem *base; 274 void __iomem *base;
296 struct parport *p; 275 struct parport *p;
297 276
298 irq = op->archdata.irqs[0]; 277 irq = op->archdata.irqs[0];
299 base = of_ioremap(&op->resource[0], 0, 278 base = of_ioremap(&op->resource[0], 0,
300 resource_size(&op->resource[0]), 279 resource_size(&op->resource[0]),
301 "sunbpp"); 280 "sunbpp");
302 if (!base) 281 if (!base)
303 return -ENODEV; 282 return -ENODEV;
304 283
305 size = resource_size(&op->resource[0]); 284 size = resource_size(&op->resource[0]);
306 dma = PARPORT_DMA_NONE; 285 dma = PARPORT_DMA_NONE;
307 286
308 ops = kmalloc(sizeof(struct parport_operations), GFP_KERNEL); 287 ops = kmalloc(sizeof(struct parport_operations), GFP_KERNEL);
309 if (!ops) 288 if (!ops)
310 goto out_unmap; 289 goto out_unmap;
311 290
312 memcpy (ops, &parport_sunbpp_ops, sizeof(struct parport_operations)); 291 memcpy (ops, &parport_sunbpp_ops, sizeof(struct parport_operations));
313 292
314 dprintk(("register_port\n")); 293 dprintk(("register_port\n"));
315 if (!(p = parport_register_port((unsigned long)base, irq, dma, ops))) 294 if (!(p = parport_register_port((unsigned long)base, irq, dma, ops)))
316 goto out_free_ops; 295 goto out_free_ops;
317 296
318 p->size = size; 297 p->size = size;
319 p->dev = &op->dev; 298 p->dev = &op->dev;
320 299
321 if ((err = request_irq(p->irq, parport_irq_handler, 300 if ((err = request_irq(p->irq, parport_irq_handler,
322 IRQF_SHARED, p->name, p)) != 0) { 301 IRQF_SHARED, p->name, p)) != 0) {
323 goto out_put_port; 302 goto out_put_port;
324 } 303 }
325 304
326 parport_sunbpp_enable_irq(p); 305 parport_sunbpp_enable_irq(p);
327 306
328 regs = (struct bpp_regs __iomem *)p->base; 307 regs = (struct bpp_regs __iomem *)p->base;
329 308
330 value_tcr = sbus_readb(&regs->p_tcr); 309 value_tcr = sbus_readb(&regs->p_tcr);
331 value_tcr &= ~P_TCR_DIR; 310 value_tcr &= ~P_TCR_DIR;
332 sbus_writeb(value_tcr, &regs->p_tcr); 311 sbus_writeb(value_tcr, &regs->p_tcr);
333 312
334 printk(KERN_INFO "%s: sunbpp at 0x%lx\n", p->name, p->base); 313 printk(KERN_INFO "%s: sunbpp at 0x%lx\n", p->name, p->base);
335 314
336 dev_set_drvdata(&op->dev, p); 315 dev_set_drvdata(&op->dev, p);
337 316
338 parport_announce_port(p); 317 parport_announce_port(p);
339 318
340 return 0; 319 return 0;
341 320
342 out_put_port: 321 out_put_port:
343 parport_put_port(p); 322 parport_put_port(p);
344 323
345 out_free_ops: 324 out_free_ops:
346 kfree(ops); 325 kfree(ops);
347 326
348 out_unmap: 327 out_unmap:
349 of_iounmap(&op->resource[0], base, size); 328 of_iounmap(&op->resource[0], base, size);
350 329
351 return err; 330 return err;
352 } 331 }
353 332
354 static int __devexit bpp_remove(struct platform_device *op) 333 static int __devexit bpp_remove(struct platform_device *op)
355 { 334 {
356 struct parport *p = dev_get_drvdata(&op->dev); 335 struct parport *p = dev_get_drvdata(&op->dev);
357 struct parport_operations *ops = p->ops; 336 struct parport_operations *ops = p->ops;
358 337
359 parport_remove_port(p); 338 parport_remove_port(p);
360 339
361 if (p->irq != PARPORT_IRQ_NONE) { 340 if (p->irq != PARPORT_IRQ_NONE) {
362 parport_sunbpp_disable_irq(p); 341 parport_sunbpp_disable_irq(p);
363 free_irq(p->irq, p); 342 free_irq(p->irq, p);
364 } 343 }
365 344
366 of_iounmap(&op->resource[0], (void __iomem *) p->base, p->size); 345 of_iounmap(&op->resource[0], (void __iomem *) p->base, p->size);
367 parport_put_port(p); 346 parport_put_port(p);
368 kfree(ops); 347 kfree(ops);
369 348
370 dev_set_drvdata(&op->dev, NULL); 349 dev_set_drvdata(&op->dev, NULL);
371 350
372 return 0; 351 return 0;
373 } 352 }
374 353
375 static const struct of_device_id bpp_match[] = { 354 static const struct of_device_id bpp_match[] = {
376 { 355 {
377 .name = "SUNW,bpp", 356 .name = "SUNW,bpp",
378 }, 357 },
379 {}, 358 {},
380 }; 359 };
381 360
382 MODULE_DEVICE_TABLE(of, bpp_match); 361 MODULE_DEVICE_TABLE(of, bpp_match);
383 362
384 static struct platform_driver bpp_sbus_driver = { 363 static struct platform_driver bpp_sbus_driver = {
385 .driver = { 364 .driver = {
386 .name = "bpp", 365 .name = "bpp",
387 .owner = THIS_MODULE, 366 .owner = THIS_MODULE,
388 .of_match_table = bpp_match, 367 .of_match_table = bpp_match,
389 }, 368 },
390 .probe = bpp_probe, 369 .probe = bpp_probe,
391 .remove = __devexit_p(bpp_remove), 370 .remove = __devexit_p(bpp_remove),
392 }; 371 };
393 372
394 module_platform_driver(bpp_sbus_driver); 373 module_platform_driver(bpp_sbus_driver);
395 374
396 MODULE_AUTHOR("Derrick J Brashear"); 375 MODULE_AUTHOR("Derrick J Brashear");
397 MODULE_DESCRIPTION("Parport Driver for Sparc bidirectional Port"); 376 MODULE_DESCRIPTION("Parport Driver for Sparc bidirectional Port");
398 MODULE_SUPPORTED_DEVICE("Sparc Bidirectional Parallel Port"); 377 MODULE_SUPPORTED_DEVICE("Sparc Bidirectional Parallel Port");
399 MODULE_VERSION("2.0"); 378 MODULE_VERSION("2.0");
400 MODULE_LICENSE("GPL"); 379 MODULE_LICENSE("GPL");
401 380