Commit 9dfa36218dadf1821da5823773dd689b4e650e00
Committed by
Felipe Balbi
1 parent
c031a7d419
Exists in
smarc-imx_3.14.28_1.0.0_ga
and in
1 other branch
usb: musb: dsps: do not set is_active on the first drvbus interrupt
Quite early on init there is an vbus / drvvbus interrupt comming and the dsps code sets is_active to one. As a result we see a lot of |musb_bus_suspend 2459: trying to suspend as a_wait_bcon while active until a device is plugged in with pm_runtime enabled in the kernel. After checking davinci, am35, da8xx I noticed that dsps is actually the only one doing this. So remove it and we won't flooded with mesages and the idle port can be suspended. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
Showing 1 changed file with 0 additions and 1 deletions Inline Diff
drivers/usb/musb/musb_dsps.c
1 | /* | 1 | /* |
2 | * Texas Instruments DSPS platforms "glue layer" | 2 | * Texas Instruments DSPS platforms "glue layer" |
3 | * | 3 | * |
4 | * Copyright (C) 2012, by Texas Instruments | 4 | * Copyright (C) 2012, by Texas Instruments |
5 | * | 5 | * |
6 | * Based on the am35x "glue layer" code. | 6 | * Based on the am35x "glue layer" code. |
7 | * | 7 | * |
8 | * This file is part of the Inventra Controller Driver for Linux. | 8 | * This file is part of the Inventra Controller Driver for Linux. |
9 | * | 9 | * |
10 | * The Inventra Controller Driver for Linux is free software; you | 10 | * The Inventra Controller Driver for Linux is free software; you |
11 | * can redistribute it and/or modify it under the terms of the GNU | 11 | * can redistribute it and/or modify it under the terms of the GNU |
12 | * General Public License version 2 as published by the Free Software | 12 | * General Public License version 2 as published by the Free Software |
13 | * Foundation. | 13 | * Foundation. |
14 | * | 14 | * |
15 | * The Inventra Controller Driver for Linux is distributed in | 15 | * The Inventra Controller Driver for Linux is distributed in |
16 | * the hope that it will be useful, but WITHOUT ANY WARRANTY; | 16 | * the hope that it will be useful, but WITHOUT ANY WARRANTY; |
17 | * without even the implied warranty of MERCHANTABILITY or | 17 | * without even the implied warranty of MERCHANTABILITY or |
18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | 18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
19 | * License for more details. | 19 | * License for more details. |
20 | * | 20 | * |
21 | * You should have received a copy of the GNU General Public License | 21 | * You should have received a copy of the GNU General Public License |
22 | * along with The Inventra Controller Driver for Linux ; if not, | 22 | * along with The Inventra Controller Driver for Linux ; if not, |
23 | * write to the Free Software Foundation, Inc., 59 Temple Place, | 23 | * write to the Free Software Foundation, Inc., 59 Temple Place, |
24 | * Suite 330, Boston, MA 02111-1307 USA | 24 | * Suite 330, Boston, MA 02111-1307 USA |
25 | * | 25 | * |
26 | * musb_dsps.c will be a common file for all the TI DSPS platforms | 26 | * musb_dsps.c will be a common file for all the TI DSPS platforms |
27 | * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. | 27 | * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. |
28 | * For now only ti81x is using this and in future davinci.c, am35x.c | 28 | * For now only ti81x is using this and in future davinci.c, am35x.c |
29 | * da8xx.c would be merged to this file after testing. | 29 | * da8xx.c would be merged to this file after testing. |
30 | */ | 30 | */ |
31 | 31 | ||
32 | #include <linux/init.h> | 32 | #include <linux/init.h> |
33 | #include <linux/io.h> | 33 | #include <linux/io.h> |
34 | #include <linux/err.h> | 34 | #include <linux/err.h> |
35 | #include <linux/platform_device.h> | 35 | #include <linux/platform_device.h> |
36 | #include <linux/dma-mapping.h> | 36 | #include <linux/dma-mapping.h> |
37 | #include <linux/pm_runtime.h> | 37 | #include <linux/pm_runtime.h> |
38 | #include <linux/module.h> | 38 | #include <linux/module.h> |
39 | #include <linux/usb/usb_phy_gen_xceiv.h> | 39 | #include <linux/usb/usb_phy_gen_xceiv.h> |
40 | #include <linux/platform_data/usb-omap.h> | 40 | #include <linux/platform_data/usb-omap.h> |
41 | #include <linux/sizes.h> | 41 | #include <linux/sizes.h> |
42 | 42 | ||
43 | #include <linux/of.h> | 43 | #include <linux/of.h> |
44 | #include <linux/of_device.h> | 44 | #include <linux/of_device.h> |
45 | #include <linux/of_address.h> | 45 | #include <linux/of_address.h> |
46 | #include <linux/of_irq.h> | 46 | #include <linux/of_irq.h> |
47 | #include <linux/usb/of.h> | 47 | #include <linux/usb/of.h> |
48 | 48 | ||
49 | #include "musb_core.h" | 49 | #include "musb_core.h" |
50 | 50 | ||
51 | static const struct of_device_id musb_dsps_of_match[]; | 51 | static const struct of_device_id musb_dsps_of_match[]; |
52 | 52 | ||
53 | /** | 53 | /** |
54 | * avoid using musb_readx()/musb_writex() as glue layer should not be | 54 | * avoid using musb_readx()/musb_writex() as glue layer should not be |
55 | * dependent on musb core layer symbols. | 55 | * dependent on musb core layer symbols. |
56 | */ | 56 | */ |
57 | static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) | 57 | static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) |
58 | { return __raw_readb(addr + offset); } | 58 | { return __raw_readb(addr + offset); } |
59 | 59 | ||
60 | static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) | 60 | static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) |
61 | { return __raw_readl(addr + offset); } | 61 | { return __raw_readl(addr + offset); } |
62 | 62 | ||
63 | static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) | 63 | static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) |
64 | { __raw_writeb(data, addr + offset); } | 64 | { __raw_writeb(data, addr + offset); } |
65 | 65 | ||
66 | static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) | 66 | static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) |
67 | { __raw_writel(data, addr + offset); } | 67 | { __raw_writel(data, addr + offset); } |
68 | 68 | ||
69 | /** | 69 | /** |
70 | * DSPS musb wrapper register offset. | 70 | * DSPS musb wrapper register offset. |
71 | * FIXME: This should be expanded to have all the wrapper registers from TI DSPS | 71 | * FIXME: This should be expanded to have all the wrapper registers from TI DSPS |
72 | * musb ips. | 72 | * musb ips. |
73 | */ | 73 | */ |
74 | struct dsps_musb_wrapper { | 74 | struct dsps_musb_wrapper { |
75 | u16 revision; | 75 | u16 revision; |
76 | u16 control; | 76 | u16 control; |
77 | u16 status; | 77 | u16 status; |
78 | u16 epintr_set; | 78 | u16 epintr_set; |
79 | u16 epintr_clear; | 79 | u16 epintr_clear; |
80 | u16 epintr_status; | 80 | u16 epintr_status; |
81 | u16 coreintr_set; | 81 | u16 coreintr_set; |
82 | u16 coreintr_clear; | 82 | u16 coreintr_clear; |
83 | u16 coreintr_status; | 83 | u16 coreintr_status; |
84 | u16 phy_utmi; | 84 | u16 phy_utmi; |
85 | u16 mode; | 85 | u16 mode; |
86 | 86 | ||
87 | /* bit positions for control */ | 87 | /* bit positions for control */ |
88 | unsigned reset:5; | 88 | unsigned reset:5; |
89 | 89 | ||
90 | /* bit positions for interrupt */ | 90 | /* bit positions for interrupt */ |
91 | unsigned usb_shift:5; | 91 | unsigned usb_shift:5; |
92 | u32 usb_mask; | 92 | u32 usb_mask; |
93 | u32 usb_bitmap; | 93 | u32 usb_bitmap; |
94 | unsigned drvvbus:5; | 94 | unsigned drvvbus:5; |
95 | 95 | ||
96 | unsigned txep_shift:5; | 96 | unsigned txep_shift:5; |
97 | u32 txep_mask; | 97 | u32 txep_mask; |
98 | u32 txep_bitmap; | 98 | u32 txep_bitmap; |
99 | 99 | ||
100 | unsigned rxep_shift:5; | 100 | unsigned rxep_shift:5; |
101 | u32 rxep_mask; | 101 | u32 rxep_mask; |
102 | u32 rxep_bitmap; | 102 | u32 rxep_bitmap; |
103 | 103 | ||
104 | /* bit positions for phy_utmi */ | 104 | /* bit positions for phy_utmi */ |
105 | unsigned otg_disable:5; | 105 | unsigned otg_disable:5; |
106 | 106 | ||
107 | /* bit positions for mode */ | 107 | /* bit positions for mode */ |
108 | unsigned iddig:5; | 108 | unsigned iddig:5; |
109 | /* miscellaneous stuff */ | 109 | /* miscellaneous stuff */ |
110 | u8 poll_seconds; | 110 | u8 poll_seconds; |
111 | }; | 111 | }; |
112 | 112 | ||
113 | /** | 113 | /** |
114 | * DSPS glue structure. | 114 | * DSPS glue structure. |
115 | */ | 115 | */ |
116 | struct dsps_glue { | 116 | struct dsps_glue { |
117 | struct device *dev; | 117 | struct device *dev; |
118 | struct platform_device *musb; /* child musb pdev */ | 118 | struct platform_device *musb; /* child musb pdev */ |
119 | const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ | 119 | const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ |
120 | struct timer_list timer; /* otg_workaround timer */ | 120 | struct timer_list timer; /* otg_workaround timer */ |
121 | unsigned long last_timer; /* last timer data for each instance */ | 121 | unsigned long last_timer; /* last timer data for each instance */ |
122 | }; | 122 | }; |
123 | 123 | ||
124 | /** | 124 | /** |
125 | * dsps_musb_enable - enable interrupts | 125 | * dsps_musb_enable - enable interrupts |
126 | */ | 126 | */ |
127 | static void dsps_musb_enable(struct musb *musb) | 127 | static void dsps_musb_enable(struct musb *musb) |
128 | { | 128 | { |
129 | struct device *dev = musb->controller; | 129 | struct device *dev = musb->controller; |
130 | struct platform_device *pdev = to_platform_device(dev->parent); | 130 | struct platform_device *pdev = to_platform_device(dev->parent); |
131 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 131 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
132 | const struct dsps_musb_wrapper *wrp = glue->wrp; | 132 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
133 | void __iomem *reg_base = musb->ctrl_base; | 133 | void __iomem *reg_base = musb->ctrl_base; |
134 | u32 epmask, coremask; | 134 | u32 epmask, coremask; |
135 | 135 | ||
136 | /* Workaround: setup IRQs through both register sets. */ | 136 | /* Workaround: setup IRQs through both register sets. */ |
137 | epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | | 137 | epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | |
138 | ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); | 138 | ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); |
139 | coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); | 139 | coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); |
140 | 140 | ||
141 | dsps_writel(reg_base, wrp->epintr_set, epmask); | 141 | dsps_writel(reg_base, wrp->epintr_set, epmask); |
142 | dsps_writel(reg_base, wrp->coreintr_set, coremask); | 142 | dsps_writel(reg_base, wrp->coreintr_set, coremask); |
143 | /* Force the DRVVBUS IRQ so we can start polling for ID change. */ | 143 | /* Force the DRVVBUS IRQ so we can start polling for ID change. */ |
144 | dsps_writel(reg_base, wrp->coreintr_set, | 144 | dsps_writel(reg_base, wrp->coreintr_set, |
145 | (1 << wrp->drvvbus) << wrp->usb_shift); | 145 | (1 << wrp->drvvbus) << wrp->usb_shift); |
146 | } | 146 | } |
147 | 147 | ||
148 | /** | 148 | /** |
149 | * dsps_musb_disable - disable HDRC and flush interrupts | 149 | * dsps_musb_disable - disable HDRC and flush interrupts |
150 | */ | 150 | */ |
151 | static void dsps_musb_disable(struct musb *musb) | 151 | static void dsps_musb_disable(struct musb *musb) |
152 | { | 152 | { |
153 | struct device *dev = musb->controller; | 153 | struct device *dev = musb->controller; |
154 | struct platform_device *pdev = to_platform_device(dev->parent); | 154 | struct platform_device *pdev = to_platform_device(dev->parent); |
155 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 155 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
156 | const struct dsps_musb_wrapper *wrp = glue->wrp; | 156 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
157 | void __iomem *reg_base = musb->ctrl_base; | 157 | void __iomem *reg_base = musb->ctrl_base; |
158 | 158 | ||
159 | dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); | 159 | dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); |
160 | dsps_writel(reg_base, wrp->epintr_clear, | 160 | dsps_writel(reg_base, wrp->epintr_clear, |
161 | wrp->txep_bitmap | wrp->rxep_bitmap); | 161 | wrp->txep_bitmap | wrp->rxep_bitmap); |
162 | dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); | 162 | dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); |
163 | } | 163 | } |
164 | 164 | ||
165 | static void otg_timer(unsigned long _musb) | 165 | static void otg_timer(unsigned long _musb) |
166 | { | 166 | { |
167 | struct musb *musb = (void *)_musb; | 167 | struct musb *musb = (void *)_musb; |
168 | void __iomem *mregs = musb->mregs; | 168 | void __iomem *mregs = musb->mregs; |
169 | struct device *dev = musb->controller; | 169 | struct device *dev = musb->controller; |
170 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); | 170 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
171 | const struct dsps_musb_wrapper *wrp = glue->wrp; | 171 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
172 | u8 devctl; | 172 | u8 devctl; |
173 | unsigned long flags; | 173 | unsigned long flags; |
174 | 174 | ||
175 | /* | 175 | /* |
176 | * We poll because DSPS IP's won't expose several OTG-critical | 176 | * We poll because DSPS IP's won't expose several OTG-critical |
177 | * status change events (from the transceiver) otherwise. | 177 | * status change events (from the transceiver) otherwise. |
178 | */ | 178 | */ |
179 | devctl = dsps_readb(mregs, MUSB_DEVCTL); | 179 | devctl = dsps_readb(mregs, MUSB_DEVCTL); |
180 | dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, | 180 | dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, |
181 | usb_otg_state_string(musb->xceiv->state)); | 181 | usb_otg_state_string(musb->xceiv->state)); |
182 | 182 | ||
183 | spin_lock_irqsave(&musb->lock, flags); | 183 | spin_lock_irqsave(&musb->lock, flags); |
184 | switch (musb->xceiv->state) { | 184 | switch (musb->xceiv->state) { |
185 | case OTG_STATE_A_WAIT_BCON: | 185 | case OTG_STATE_A_WAIT_BCON: |
186 | devctl &= ~MUSB_DEVCTL_SESSION; | 186 | devctl &= ~MUSB_DEVCTL_SESSION; |
187 | dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); | 187 | dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); |
188 | 188 | ||
189 | devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); | 189 | devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); |
190 | if (devctl & MUSB_DEVCTL_BDEVICE) { | 190 | if (devctl & MUSB_DEVCTL_BDEVICE) { |
191 | musb->xceiv->state = OTG_STATE_B_IDLE; | 191 | musb->xceiv->state = OTG_STATE_B_IDLE; |
192 | MUSB_DEV_MODE(musb); | 192 | MUSB_DEV_MODE(musb); |
193 | } else { | 193 | } else { |
194 | musb->xceiv->state = OTG_STATE_A_IDLE; | 194 | musb->xceiv->state = OTG_STATE_A_IDLE; |
195 | MUSB_HST_MODE(musb); | 195 | MUSB_HST_MODE(musb); |
196 | } | 196 | } |
197 | break; | 197 | break; |
198 | case OTG_STATE_A_WAIT_VFALL: | 198 | case OTG_STATE_A_WAIT_VFALL: |
199 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; | 199 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; |
200 | dsps_writel(musb->ctrl_base, wrp->coreintr_set, | 200 | dsps_writel(musb->ctrl_base, wrp->coreintr_set, |
201 | MUSB_INTR_VBUSERROR << wrp->usb_shift); | 201 | MUSB_INTR_VBUSERROR << wrp->usb_shift); |
202 | break; | 202 | break; |
203 | case OTG_STATE_B_IDLE: | 203 | case OTG_STATE_B_IDLE: |
204 | devctl = dsps_readb(mregs, MUSB_DEVCTL); | 204 | devctl = dsps_readb(mregs, MUSB_DEVCTL); |
205 | if (devctl & MUSB_DEVCTL_BDEVICE) | 205 | if (devctl & MUSB_DEVCTL_BDEVICE) |
206 | mod_timer(&glue->timer, | 206 | mod_timer(&glue->timer, |
207 | jiffies + wrp->poll_seconds * HZ); | 207 | jiffies + wrp->poll_seconds * HZ); |
208 | else | 208 | else |
209 | musb->xceiv->state = OTG_STATE_A_IDLE; | 209 | musb->xceiv->state = OTG_STATE_A_IDLE; |
210 | break; | 210 | break; |
211 | default: | 211 | default: |
212 | break; | 212 | break; |
213 | } | 213 | } |
214 | spin_unlock_irqrestore(&musb->lock, flags); | 214 | spin_unlock_irqrestore(&musb->lock, flags); |
215 | } | 215 | } |
216 | 216 | ||
217 | static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) | 217 | static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) |
218 | { | 218 | { |
219 | struct device *dev = musb->controller; | 219 | struct device *dev = musb->controller; |
220 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); | 220 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
221 | 221 | ||
222 | if (timeout == 0) | 222 | if (timeout == 0) |
223 | timeout = jiffies + msecs_to_jiffies(3); | 223 | timeout = jiffies + msecs_to_jiffies(3); |
224 | 224 | ||
225 | /* Never idle if active, or when VBUS timeout is not set as host */ | 225 | /* Never idle if active, or when VBUS timeout is not set as host */ |
226 | if (musb->is_active || (musb->a_wait_bcon == 0 && | 226 | if (musb->is_active || (musb->a_wait_bcon == 0 && |
227 | musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { | 227 | musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { |
228 | dev_dbg(musb->controller, "%s active, deleting timer\n", | 228 | dev_dbg(musb->controller, "%s active, deleting timer\n", |
229 | usb_otg_state_string(musb->xceiv->state)); | 229 | usb_otg_state_string(musb->xceiv->state)); |
230 | del_timer(&glue->timer); | 230 | del_timer(&glue->timer); |
231 | glue->last_timer = jiffies; | 231 | glue->last_timer = jiffies; |
232 | return; | 232 | return; |
233 | } | 233 | } |
234 | 234 | ||
235 | if (time_after(glue->last_timer, timeout) && | 235 | if (time_after(glue->last_timer, timeout) && |
236 | timer_pending(&glue->timer)) { | 236 | timer_pending(&glue->timer)) { |
237 | dev_dbg(musb->controller, | 237 | dev_dbg(musb->controller, |
238 | "Longer idle timer already pending, ignoring...\n"); | 238 | "Longer idle timer already pending, ignoring...\n"); |
239 | return; | 239 | return; |
240 | } | 240 | } |
241 | glue->last_timer = timeout; | 241 | glue->last_timer = timeout; |
242 | 242 | ||
243 | dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", | 243 | dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", |
244 | usb_otg_state_string(musb->xceiv->state), | 244 | usb_otg_state_string(musb->xceiv->state), |
245 | jiffies_to_msecs(timeout - jiffies)); | 245 | jiffies_to_msecs(timeout - jiffies)); |
246 | mod_timer(&glue->timer, timeout); | 246 | mod_timer(&glue->timer, timeout); |
247 | } | 247 | } |
248 | 248 | ||
249 | static irqreturn_t dsps_interrupt(int irq, void *hci) | 249 | static irqreturn_t dsps_interrupt(int irq, void *hci) |
250 | { | 250 | { |
251 | struct musb *musb = hci; | 251 | struct musb *musb = hci; |
252 | void __iomem *reg_base = musb->ctrl_base; | 252 | void __iomem *reg_base = musb->ctrl_base; |
253 | struct device *dev = musb->controller; | 253 | struct device *dev = musb->controller; |
254 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); | 254 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
255 | const struct dsps_musb_wrapper *wrp = glue->wrp; | 255 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
256 | unsigned long flags; | 256 | unsigned long flags; |
257 | irqreturn_t ret = IRQ_NONE; | 257 | irqreturn_t ret = IRQ_NONE; |
258 | u32 epintr, usbintr; | 258 | u32 epintr, usbintr; |
259 | 259 | ||
260 | spin_lock_irqsave(&musb->lock, flags); | 260 | spin_lock_irqsave(&musb->lock, flags); |
261 | 261 | ||
262 | /* Get endpoint interrupts */ | 262 | /* Get endpoint interrupts */ |
263 | epintr = dsps_readl(reg_base, wrp->epintr_status); | 263 | epintr = dsps_readl(reg_base, wrp->epintr_status); |
264 | musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; | 264 | musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; |
265 | musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; | 265 | musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; |
266 | 266 | ||
267 | if (epintr) | 267 | if (epintr) |
268 | dsps_writel(reg_base, wrp->epintr_status, epintr); | 268 | dsps_writel(reg_base, wrp->epintr_status, epintr); |
269 | 269 | ||
270 | /* Get usb core interrupts */ | 270 | /* Get usb core interrupts */ |
271 | usbintr = dsps_readl(reg_base, wrp->coreintr_status); | 271 | usbintr = dsps_readl(reg_base, wrp->coreintr_status); |
272 | if (!usbintr && !epintr) | 272 | if (!usbintr && !epintr) |
273 | goto out; | 273 | goto out; |
274 | 274 | ||
275 | musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; | 275 | musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; |
276 | if (usbintr) | 276 | if (usbintr) |
277 | dsps_writel(reg_base, wrp->coreintr_status, usbintr); | 277 | dsps_writel(reg_base, wrp->coreintr_status, usbintr); |
278 | 278 | ||
279 | dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", | 279 | dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", |
280 | usbintr, epintr); | 280 | usbintr, epintr); |
281 | /* | 281 | /* |
282 | * DRVVBUS IRQs are the only proxy we have (a very poor one!) for | 282 | * DRVVBUS IRQs are the only proxy we have (a very poor one!) for |
283 | * DSPS IP's missing ID change IRQ. We need an ID change IRQ to | 283 | * DSPS IP's missing ID change IRQ. We need an ID change IRQ to |
284 | * switch appropriately between halves of the OTG state machine. | 284 | * switch appropriately between halves of the OTG state machine. |
285 | * Managing DEVCTL.SESSION per Mentor docs requires that we know its | 285 | * Managing DEVCTL.SESSION per Mentor docs requires that we know its |
286 | * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. | 286 | * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. |
287 | * Also, DRVVBUS pulses for SRP (but not at 5V) ... | 287 | * Also, DRVVBUS pulses for SRP (but not at 5V) ... |
288 | */ | 288 | */ |
289 | if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) | 289 | if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) |
290 | pr_info("CAUTION: musb: Babble Interrupt Occurred\n"); | 290 | pr_info("CAUTION: musb: Babble Interrupt Occurred\n"); |
291 | 291 | ||
292 | if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { | 292 | if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { |
293 | int drvvbus = dsps_readl(reg_base, wrp->status); | 293 | int drvvbus = dsps_readl(reg_base, wrp->status); |
294 | void __iomem *mregs = musb->mregs; | 294 | void __iomem *mregs = musb->mregs; |
295 | u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); | 295 | u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); |
296 | int err; | 296 | int err; |
297 | 297 | ||
298 | err = musb->int_usb & MUSB_INTR_VBUSERROR; | 298 | err = musb->int_usb & MUSB_INTR_VBUSERROR; |
299 | if (err) { | 299 | if (err) { |
300 | /* | 300 | /* |
301 | * The Mentor core doesn't debounce VBUS as needed | 301 | * The Mentor core doesn't debounce VBUS as needed |
302 | * to cope with device connect current spikes. This | 302 | * to cope with device connect current spikes. This |
303 | * means it's not uncommon for bus-powered devices | 303 | * means it's not uncommon for bus-powered devices |
304 | * to get VBUS errors during enumeration. | 304 | * to get VBUS errors during enumeration. |
305 | * | 305 | * |
306 | * This is a workaround, but newer RTL from Mentor | 306 | * This is a workaround, but newer RTL from Mentor |
307 | * seems to allow a better one: "re"-starting sessions | 307 | * seems to allow a better one: "re"-starting sessions |
308 | * without waiting for VBUS to stop registering in | 308 | * without waiting for VBUS to stop registering in |
309 | * devctl. | 309 | * devctl. |
310 | */ | 310 | */ |
311 | musb->int_usb &= ~MUSB_INTR_VBUSERROR; | 311 | musb->int_usb &= ~MUSB_INTR_VBUSERROR; |
312 | musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; | 312 | musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; |
313 | mod_timer(&glue->timer, | 313 | mod_timer(&glue->timer, |
314 | jiffies + wrp->poll_seconds * HZ); | 314 | jiffies + wrp->poll_seconds * HZ); |
315 | WARNING("VBUS error workaround (delay coming)\n"); | 315 | WARNING("VBUS error workaround (delay coming)\n"); |
316 | } else if (drvvbus) { | 316 | } else if (drvvbus) { |
317 | musb->is_active = 1; | ||
318 | MUSB_HST_MODE(musb); | 317 | MUSB_HST_MODE(musb); |
319 | musb->xceiv->otg->default_a = 1; | 318 | musb->xceiv->otg->default_a = 1; |
320 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; | 319 | musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; |
321 | del_timer(&glue->timer); | 320 | del_timer(&glue->timer); |
322 | } else { | 321 | } else { |
323 | musb->is_active = 0; | 322 | musb->is_active = 0; |
324 | MUSB_DEV_MODE(musb); | 323 | MUSB_DEV_MODE(musb); |
325 | musb->xceiv->otg->default_a = 0; | 324 | musb->xceiv->otg->default_a = 0; |
326 | musb->xceiv->state = OTG_STATE_B_IDLE; | 325 | musb->xceiv->state = OTG_STATE_B_IDLE; |
327 | } | 326 | } |
328 | 327 | ||
329 | /* NOTE: this must complete power-on within 100 ms. */ | 328 | /* NOTE: this must complete power-on within 100 ms. */ |
330 | dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", | 329 | dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", |
331 | drvvbus ? "on" : "off", | 330 | drvvbus ? "on" : "off", |
332 | usb_otg_state_string(musb->xceiv->state), | 331 | usb_otg_state_string(musb->xceiv->state), |
333 | err ? " ERROR" : "", | 332 | err ? " ERROR" : "", |
334 | devctl); | 333 | devctl); |
335 | ret = IRQ_HANDLED; | 334 | ret = IRQ_HANDLED; |
336 | } | 335 | } |
337 | 336 | ||
338 | if (musb->int_tx || musb->int_rx || musb->int_usb) | 337 | if (musb->int_tx || musb->int_rx || musb->int_usb) |
339 | ret |= musb_interrupt(musb); | 338 | ret |= musb_interrupt(musb); |
340 | 339 | ||
341 | /* Poll for ID change */ | 340 | /* Poll for ID change */ |
342 | if (musb->xceiv->state == OTG_STATE_B_IDLE) | 341 | if (musb->xceiv->state == OTG_STATE_B_IDLE) |
343 | mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); | 342 | mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); |
344 | out: | 343 | out: |
345 | spin_unlock_irqrestore(&musb->lock, flags); | 344 | spin_unlock_irqrestore(&musb->lock, flags); |
346 | 345 | ||
347 | return ret; | 346 | return ret; |
348 | } | 347 | } |
349 | 348 | ||
350 | static int dsps_musb_init(struct musb *musb) | 349 | static int dsps_musb_init(struct musb *musb) |
351 | { | 350 | { |
352 | struct device *dev = musb->controller; | 351 | struct device *dev = musb->controller; |
353 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); | 352 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
354 | struct platform_device *parent = to_platform_device(dev->parent); | 353 | struct platform_device *parent = to_platform_device(dev->parent); |
355 | const struct dsps_musb_wrapper *wrp = glue->wrp; | 354 | const struct dsps_musb_wrapper *wrp = glue->wrp; |
356 | void __iomem *reg_base; | 355 | void __iomem *reg_base; |
357 | struct resource *r; | 356 | struct resource *r; |
358 | u32 rev, val; | 357 | u32 rev, val; |
359 | 358 | ||
360 | r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); | 359 | r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); |
361 | if (!r) | 360 | if (!r) |
362 | return -EINVAL; | 361 | return -EINVAL; |
363 | 362 | ||
364 | reg_base = devm_ioremap_resource(dev, r); | 363 | reg_base = devm_ioremap_resource(dev, r); |
365 | if (IS_ERR(reg_base)) | 364 | if (IS_ERR(reg_base)) |
366 | return PTR_ERR(reg_base); | 365 | return PTR_ERR(reg_base); |
367 | musb->ctrl_base = reg_base; | 366 | musb->ctrl_base = reg_base; |
368 | 367 | ||
369 | /* NOP driver needs change if supporting dual instance */ | 368 | /* NOP driver needs change if supporting dual instance */ |
370 | musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0); | 369 | musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0); |
371 | if (IS_ERR(musb->xceiv)) | 370 | if (IS_ERR(musb->xceiv)) |
372 | return PTR_ERR(musb->xceiv); | 371 | return PTR_ERR(musb->xceiv); |
373 | 372 | ||
374 | /* Returns zero if e.g. not clocked */ | 373 | /* Returns zero if e.g. not clocked */ |
375 | rev = dsps_readl(reg_base, wrp->revision); | 374 | rev = dsps_readl(reg_base, wrp->revision); |
376 | if (!rev) | 375 | if (!rev) |
377 | return -ENODEV; | 376 | return -ENODEV; |
378 | 377 | ||
379 | usb_phy_init(musb->xceiv); | 378 | usb_phy_init(musb->xceiv); |
380 | setup_timer(&glue->timer, otg_timer, (unsigned long) musb); | 379 | setup_timer(&glue->timer, otg_timer, (unsigned long) musb); |
381 | 380 | ||
382 | /* Reset the musb */ | 381 | /* Reset the musb */ |
383 | dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); | 382 | dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); |
384 | 383 | ||
385 | musb->isr = dsps_interrupt; | 384 | musb->isr = dsps_interrupt; |
386 | 385 | ||
387 | /* reset the otgdisable bit, needed for host mode to work */ | 386 | /* reset the otgdisable bit, needed for host mode to work */ |
388 | val = dsps_readl(reg_base, wrp->phy_utmi); | 387 | val = dsps_readl(reg_base, wrp->phy_utmi); |
389 | val &= ~(1 << wrp->otg_disable); | 388 | val &= ~(1 << wrp->otg_disable); |
390 | dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); | 389 | dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); |
391 | 390 | ||
392 | return 0; | 391 | return 0; |
393 | } | 392 | } |
394 | 393 | ||
395 | static int dsps_musb_exit(struct musb *musb) | 394 | static int dsps_musb_exit(struct musb *musb) |
396 | { | 395 | { |
397 | struct device *dev = musb->controller; | 396 | struct device *dev = musb->controller; |
398 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); | 397 | struct dsps_glue *glue = dev_get_drvdata(dev->parent); |
399 | 398 | ||
400 | del_timer_sync(&glue->timer); | 399 | del_timer_sync(&glue->timer); |
401 | 400 | ||
402 | usb_phy_shutdown(musb->xceiv); | 401 | usb_phy_shutdown(musb->xceiv); |
403 | return 0; | 402 | return 0; |
404 | } | 403 | } |
405 | 404 | ||
406 | static struct musb_platform_ops dsps_ops = { | 405 | static struct musb_platform_ops dsps_ops = { |
407 | .init = dsps_musb_init, | 406 | .init = dsps_musb_init, |
408 | .exit = dsps_musb_exit, | 407 | .exit = dsps_musb_exit, |
409 | 408 | ||
410 | .enable = dsps_musb_enable, | 409 | .enable = dsps_musb_enable, |
411 | .disable = dsps_musb_disable, | 410 | .disable = dsps_musb_disable, |
412 | 411 | ||
413 | .try_idle = dsps_musb_try_idle, | 412 | .try_idle = dsps_musb_try_idle, |
414 | }; | 413 | }; |
415 | 414 | ||
416 | static u64 musb_dmamask = DMA_BIT_MASK(32); | 415 | static u64 musb_dmamask = DMA_BIT_MASK(32); |
417 | 416 | ||
418 | static int get_int_prop(struct device_node *dn, const char *s) | 417 | static int get_int_prop(struct device_node *dn, const char *s) |
419 | { | 418 | { |
420 | int ret; | 419 | int ret; |
421 | u32 val; | 420 | u32 val; |
422 | 421 | ||
423 | ret = of_property_read_u32(dn, s, &val); | 422 | ret = of_property_read_u32(dn, s, &val); |
424 | if (ret) | 423 | if (ret) |
425 | return 0; | 424 | return 0; |
426 | return val; | 425 | return val; |
427 | } | 426 | } |
428 | 427 | ||
429 | static int get_musb_port_mode(struct device *dev) | 428 | static int get_musb_port_mode(struct device *dev) |
430 | { | 429 | { |
431 | enum usb_dr_mode mode; | 430 | enum usb_dr_mode mode; |
432 | 431 | ||
433 | mode = of_usb_get_dr_mode(dev->of_node); | 432 | mode = of_usb_get_dr_mode(dev->of_node); |
434 | switch (mode) { | 433 | switch (mode) { |
435 | case USB_DR_MODE_HOST: | 434 | case USB_DR_MODE_HOST: |
436 | return MUSB_PORT_MODE_HOST; | 435 | return MUSB_PORT_MODE_HOST; |
437 | 436 | ||
438 | case USB_DR_MODE_PERIPHERAL: | 437 | case USB_DR_MODE_PERIPHERAL: |
439 | return MUSB_PORT_MODE_GADGET; | 438 | return MUSB_PORT_MODE_GADGET; |
440 | 439 | ||
441 | case USB_DR_MODE_UNKNOWN: | 440 | case USB_DR_MODE_UNKNOWN: |
442 | case USB_DR_MODE_OTG: | 441 | case USB_DR_MODE_OTG: |
443 | default: | 442 | default: |
444 | return MUSB_PORT_MODE_DUAL_ROLE; | 443 | return MUSB_PORT_MODE_DUAL_ROLE; |
445 | }; | 444 | }; |
446 | } | 445 | } |
447 | 446 | ||
448 | static int dsps_create_musb_pdev(struct dsps_glue *glue, | 447 | static int dsps_create_musb_pdev(struct dsps_glue *glue, |
449 | struct platform_device *parent) | 448 | struct platform_device *parent) |
450 | { | 449 | { |
451 | struct musb_hdrc_platform_data pdata; | 450 | struct musb_hdrc_platform_data pdata; |
452 | struct resource resources[2]; | 451 | struct resource resources[2]; |
453 | struct resource *res; | 452 | struct resource *res; |
454 | struct device *dev = &parent->dev; | 453 | struct device *dev = &parent->dev; |
455 | struct musb_hdrc_config *config; | 454 | struct musb_hdrc_config *config; |
456 | struct platform_device *musb; | 455 | struct platform_device *musb; |
457 | struct device_node *dn = parent->dev.of_node; | 456 | struct device_node *dn = parent->dev.of_node; |
458 | int ret; | 457 | int ret; |
459 | 458 | ||
460 | memset(resources, 0, sizeof(resources)); | 459 | memset(resources, 0, sizeof(resources)); |
461 | res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); | 460 | res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); |
462 | if (!res) { | 461 | if (!res) { |
463 | dev_err(dev, "failed to get memory.\n"); | 462 | dev_err(dev, "failed to get memory.\n"); |
464 | return -EINVAL; | 463 | return -EINVAL; |
465 | } | 464 | } |
466 | resources[0] = *res; | 465 | resources[0] = *res; |
467 | 466 | ||
468 | res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); | 467 | res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); |
469 | if (!res) { | 468 | if (!res) { |
470 | dev_err(dev, "failed to get irq.\n"); | 469 | dev_err(dev, "failed to get irq.\n"); |
471 | return -EINVAL; | 470 | return -EINVAL; |
472 | } | 471 | } |
473 | resources[1] = *res; | 472 | resources[1] = *res; |
474 | 473 | ||
475 | /* allocate the child platform device */ | 474 | /* allocate the child platform device */ |
476 | musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); | 475 | musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); |
477 | if (!musb) { | 476 | if (!musb) { |
478 | dev_err(dev, "failed to allocate musb device\n"); | 477 | dev_err(dev, "failed to allocate musb device\n"); |
479 | return -ENOMEM; | 478 | return -ENOMEM; |
480 | } | 479 | } |
481 | 480 | ||
482 | musb->dev.parent = dev; | 481 | musb->dev.parent = dev; |
483 | musb->dev.dma_mask = &musb_dmamask; | 482 | musb->dev.dma_mask = &musb_dmamask; |
484 | musb->dev.coherent_dma_mask = musb_dmamask; | 483 | musb->dev.coherent_dma_mask = musb_dmamask; |
485 | musb->dev.of_node = of_node_get(dn); | 484 | musb->dev.of_node = of_node_get(dn); |
486 | 485 | ||
487 | glue->musb = musb; | 486 | glue->musb = musb; |
488 | 487 | ||
489 | ret = platform_device_add_resources(musb, resources, | 488 | ret = platform_device_add_resources(musb, resources, |
490 | ARRAY_SIZE(resources)); | 489 | ARRAY_SIZE(resources)); |
491 | if (ret) { | 490 | if (ret) { |
492 | dev_err(dev, "failed to add resources\n"); | 491 | dev_err(dev, "failed to add resources\n"); |
493 | goto err; | 492 | goto err; |
494 | } | 493 | } |
495 | 494 | ||
496 | config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); | 495 | config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); |
497 | if (!config) { | 496 | if (!config) { |
498 | dev_err(dev, "failed to allocate musb hdrc config\n"); | 497 | dev_err(dev, "failed to allocate musb hdrc config\n"); |
499 | ret = -ENOMEM; | 498 | ret = -ENOMEM; |
500 | goto err; | 499 | goto err; |
501 | } | 500 | } |
502 | pdata.config = config; | 501 | pdata.config = config; |
503 | pdata.platform_ops = &dsps_ops; | 502 | pdata.platform_ops = &dsps_ops; |
504 | 503 | ||
505 | config->num_eps = get_int_prop(dn, "mentor,num-eps"); | 504 | config->num_eps = get_int_prop(dn, "mentor,num-eps"); |
506 | config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); | 505 | config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); |
507 | pdata.mode = get_musb_port_mode(dev); | 506 | pdata.mode = get_musb_port_mode(dev); |
508 | /* DT keeps this entry in mA, musb expects it as per USB spec */ | 507 | /* DT keeps this entry in mA, musb expects it as per USB spec */ |
509 | pdata.power = get_int_prop(dn, "mentor,power") / 2; | 508 | pdata.power = get_int_prop(dn, "mentor,power") / 2; |
510 | config->multipoint = of_property_read_bool(dn, "mentor,multipoint"); | 509 | config->multipoint = of_property_read_bool(dn, "mentor,multipoint"); |
511 | 510 | ||
512 | ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); | 511 | ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); |
513 | if (ret) { | 512 | if (ret) { |
514 | dev_err(dev, "failed to add platform_data\n"); | 513 | dev_err(dev, "failed to add platform_data\n"); |
515 | goto err; | 514 | goto err; |
516 | } | 515 | } |
517 | 516 | ||
518 | ret = platform_device_add(musb); | 517 | ret = platform_device_add(musb); |
519 | if (ret) { | 518 | if (ret) { |
520 | dev_err(dev, "failed to register musb device\n"); | 519 | dev_err(dev, "failed to register musb device\n"); |
521 | goto err; | 520 | goto err; |
522 | } | 521 | } |
523 | return 0; | 522 | return 0; |
524 | 523 | ||
525 | err: | 524 | err: |
526 | platform_device_put(musb); | 525 | platform_device_put(musb); |
527 | return ret; | 526 | return ret; |
528 | } | 527 | } |
529 | 528 | ||
530 | static int dsps_probe(struct platform_device *pdev) | 529 | static int dsps_probe(struct platform_device *pdev) |
531 | { | 530 | { |
532 | const struct of_device_id *match; | 531 | const struct of_device_id *match; |
533 | const struct dsps_musb_wrapper *wrp; | 532 | const struct dsps_musb_wrapper *wrp; |
534 | struct dsps_glue *glue; | 533 | struct dsps_glue *glue; |
535 | int ret; | 534 | int ret; |
536 | 535 | ||
537 | match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); | 536 | match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); |
538 | if (!match) { | 537 | if (!match) { |
539 | dev_err(&pdev->dev, "fail to get matching of_match struct\n"); | 538 | dev_err(&pdev->dev, "fail to get matching of_match struct\n"); |
540 | return -EINVAL; | 539 | return -EINVAL; |
541 | } | 540 | } |
542 | wrp = match->data; | 541 | wrp = match->data; |
543 | 542 | ||
544 | /* allocate glue */ | 543 | /* allocate glue */ |
545 | glue = kzalloc(sizeof(*glue), GFP_KERNEL); | 544 | glue = kzalloc(sizeof(*glue), GFP_KERNEL); |
546 | if (!glue) { | 545 | if (!glue) { |
547 | dev_err(&pdev->dev, "unable to allocate glue memory\n"); | 546 | dev_err(&pdev->dev, "unable to allocate glue memory\n"); |
548 | return -ENOMEM; | 547 | return -ENOMEM; |
549 | } | 548 | } |
550 | 549 | ||
551 | glue->dev = &pdev->dev; | 550 | glue->dev = &pdev->dev; |
552 | glue->wrp = wrp; | 551 | glue->wrp = wrp; |
553 | 552 | ||
554 | platform_set_drvdata(pdev, glue); | 553 | platform_set_drvdata(pdev, glue); |
555 | pm_runtime_enable(&pdev->dev); | 554 | pm_runtime_enable(&pdev->dev); |
556 | 555 | ||
557 | ret = pm_runtime_get_sync(&pdev->dev); | 556 | ret = pm_runtime_get_sync(&pdev->dev); |
558 | if (ret < 0) { | 557 | if (ret < 0) { |
559 | dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); | 558 | dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); |
560 | goto err2; | 559 | goto err2; |
561 | } | 560 | } |
562 | 561 | ||
563 | ret = dsps_create_musb_pdev(glue, pdev); | 562 | ret = dsps_create_musb_pdev(glue, pdev); |
564 | if (ret) | 563 | if (ret) |
565 | goto err3; | 564 | goto err3; |
566 | 565 | ||
567 | return 0; | 566 | return 0; |
568 | 567 | ||
569 | err3: | 568 | err3: |
570 | pm_runtime_put(&pdev->dev); | 569 | pm_runtime_put(&pdev->dev); |
571 | err2: | 570 | err2: |
572 | pm_runtime_disable(&pdev->dev); | 571 | pm_runtime_disable(&pdev->dev); |
573 | kfree(glue); | 572 | kfree(glue); |
574 | return ret; | 573 | return ret; |
575 | } | 574 | } |
576 | 575 | ||
577 | static int dsps_remove(struct platform_device *pdev) | 576 | static int dsps_remove(struct platform_device *pdev) |
578 | { | 577 | { |
579 | struct dsps_glue *glue = platform_get_drvdata(pdev); | 578 | struct dsps_glue *glue = platform_get_drvdata(pdev); |
580 | 579 | ||
581 | platform_device_unregister(glue->musb); | 580 | platform_device_unregister(glue->musb); |
582 | 581 | ||
583 | /* disable usbss clocks */ | 582 | /* disable usbss clocks */ |
584 | pm_runtime_put(&pdev->dev); | 583 | pm_runtime_put(&pdev->dev); |
585 | pm_runtime_disable(&pdev->dev); | 584 | pm_runtime_disable(&pdev->dev); |
586 | kfree(glue); | 585 | kfree(glue); |
587 | return 0; | 586 | return 0; |
588 | } | 587 | } |
589 | 588 | ||
590 | static const struct dsps_musb_wrapper am33xx_driver_data = { | 589 | static const struct dsps_musb_wrapper am33xx_driver_data = { |
591 | .revision = 0x00, | 590 | .revision = 0x00, |
592 | .control = 0x14, | 591 | .control = 0x14, |
593 | .status = 0x18, | 592 | .status = 0x18, |
594 | .epintr_set = 0x38, | 593 | .epintr_set = 0x38, |
595 | .epintr_clear = 0x40, | 594 | .epintr_clear = 0x40, |
596 | .epintr_status = 0x30, | 595 | .epintr_status = 0x30, |
597 | .coreintr_set = 0x3c, | 596 | .coreintr_set = 0x3c, |
598 | .coreintr_clear = 0x44, | 597 | .coreintr_clear = 0x44, |
599 | .coreintr_status = 0x34, | 598 | .coreintr_status = 0x34, |
600 | .phy_utmi = 0xe0, | 599 | .phy_utmi = 0xe0, |
601 | .mode = 0xe8, | 600 | .mode = 0xe8, |
602 | .reset = 0, | 601 | .reset = 0, |
603 | .otg_disable = 21, | 602 | .otg_disable = 21, |
604 | .iddig = 8, | 603 | .iddig = 8, |
605 | .usb_shift = 0, | 604 | .usb_shift = 0, |
606 | .usb_mask = 0x1ff, | 605 | .usb_mask = 0x1ff, |
607 | .usb_bitmap = (0x1ff << 0), | 606 | .usb_bitmap = (0x1ff << 0), |
608 | .drvvbus = 8, | 607 | .drvvbus = 8, |
609 | .txep_shift = 0, | 608 | .txep_shift = 0, |
610 | .txep_mask = 0xffff, | 609 | .txep_mask = 0xffff, |
611 | .txep_bitmap = (0xffff << 0), | 610 | .txep_bitmap = (0xffff << 0), |
612 | .rxep_shift = 16, | 611 | .rxep_shift = 16, |
613 | .rxep_mask = 0xfffe, | 612 | .rxep_mask = 0xfffe, |
614 | .rxep_bitmap = (0xfffe << 16), | 613 | .rxep_bitmap = (0xfffe << 16), |
615 | .poll_seconds = 2, | 614 | .poll_seconds = 2, |
616 | }; | 615 | }; |
617 | 616 | ||
618 | static const struct of_device_id musb_dsps_of_match[] = { | 617 | static const struct of_device_id musb_dsps_of_match[] = { |
619 | { .compatible = "ti,musb-am33xx", | 618 | { .compatible = "ti,musb-am33xx", |
620 | .data = (void *) &am33xx_driver_data, }, | 619 | .data = (void *) &am33xx_driver_data, }, |
621 | { }, | 620 | { }, |
622 | }; | 621 | }; |
623 | MODULE_DEVICE_TABLE(of, musb_dsps_of_match); | 622 | MODULE_DEVICE_TABLE(of, musb_dsps_of_match); |
624 | 623 | ||
625 | static struct platform_driver dsps_usbss_driver = { | 624 | static struct platform_driver dsps_usbss_driver = { |
626 | .probe = dsps_probe, | 625 | .probe = dsps_probe, |
627 | .remove = dsps_remove, | 626 | .remove = dsps_remove, |
628 | .driver = { | 627 | .driver = { |
629 | .name = "musb-dsps", | 628 | .name = "musb-dsps", |
630 | .of_match_table = of_match_ptr(musb_dsps_of_match), | 629 | .of_match_table = of_match_ptr(musb_dsps_of_match), |
631 | }, | 630 | }, |
632 | }; | 631 | }; |
633 | 632 | ||
634 | MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); | 633 | MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); |
635 | MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); | 634 | MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); |
636 | MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); | 635 | MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); |
637 | MODULE_LICENSE("GPL v2"); | 636 | MODULE_LICENSE("GPL v2"); |
638 | 637 | ||
639 | module_platform_driver(dsps_usbss_driver); | 638 | module_platform_driver(dsps_usbss_driver); |
640 | 639 |