Commit 9fd3238e95046b61d518ddacaa767fa09f31b0d0

Authored by Stephen Hemminger
Committed by David S. Miller
1 parent 48b47a5e30

ibmtr: convert to internal network_device_stats

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Showing 2 changed files with 7 additions and 24 deletions Inline Diff

drivers/net/tokenring/ibmtr.c
1 /* ibmtr.c: A shared-memory IBM Token Ring 16/4 driver for linux 1 /* ibmtr.c: A shared-memory IBM Token Ring 16/4 driver for linux
2 * 2 *
3 * Written 1993 by Mark Swanson and Peter De Schrijver. 3 * Written 1993 by Mark Swanson and Peter De Schrijver.
4 * This software may be used and distributed according to the terms 4 * This software may be used and distributed according to the terms
5 * of the GNU General Public License, incorporated herein by reference. 5 * of the GNU General Public License, incorporated herein by reference.
6 * 6 *
7 * This device driver should work with Any IBM Token Ring Card that does 7 * This device driver should work with Any IBM Token Ring Card that does
8 * not use DMA. 8 * not use DMA.
9 * 9 *
10 * I used Donald Becker's (becker@scyld.com) device driver work 10 * I used Donald Becker's (becker@scyld.com) device driver work
11 * as a base for most of my initial work. 11 * as a base for most of my initial work.
12 * 12 *
13 * Changes by Peter De Schrijver 13 * Changes by Peter De Schrijver
14 * (Peter.Deschrijver@linux.cc.kuleuven.ac.be) : 14 * (Peter.Deschrijver@linux.cc.kuleuven.ac.be) :
15 * 15 *
16 * + changed name to ibmtr.c in anticipation of other tr boards. 16 * + changed name to ibmtr.c in anticipation of other tr boards.
17 * + changed reset code and adapter open code. 17 * + changed reset code and adapter open code.
18 * + added SAP open code. 18 * + added SAP open code.
19 * + a first attempt to write interrupt, transmit and receive routines. 19 * + a first attempt to write interrupt, transmit and receive routines.
20 * 20 *
21 * Changes by David W. Morris (dwm@shell.portal.com) : 21 * Changes by David W. Morris (dwm@shell.portal.com) :
22 * 941003 dwm: - Restructure tok_probe for multiple adapters, devices. 22 * 941003 dwm: - Restructure tok_probe for multiple adapters, devices.
23 * + Add comments, misc reorg for clarity. 23 * + Add comments, misc reorg for clarity.
24 * + Flatten interrupt handler levels. 24 * + Flatten interrupt handler levels.
25 * 25 *
26 * Changes by Farzad Farid (farzy@zen.via.ecp.fr) 26 * Changes by Farzad Farid (farzy@zen.via.ecp.fr)
27 * and Pascal Andre (andre@chimay.via.ecp.fr) (March 9 1995) : 27 * and Pascal Andre (andre@chimay.via.ecp.fr) (March 9 1995) :
28 * + multi ring support clean up. 28 * + multi ring support clean up.
29 * + RFC1042 compliance enhanced. 29 * + RFC1042 compliance enhanced.
30 * 30 *
31 * Changes by Pascal Andre (andre@chimay.via.ecp.fr) (September 7 1995) : 31 * Changes by Pascal Andre (andre@chimay.via.ecp.fr) (September 7 1995) :
32 * + bug correction in tr_tx 32 * + bug correction in tr_tx
33 * + removed redundant information display 33 * + removed redundant information display
34 * + some code reworking 34 * + some code reworking
35 * 35 *
36 * Changes by Michel Lespinasse (walken@via.ecp.fr), 36 * Changes by Michel Lespinasse (walken@via.ecp.fr),
37 * Yann Doussot (doussot@via.ecp.fr) and Pascal Andre (andre@via.ecp.fr) 37 * Yann Doussot (doussot@via.ecp.fr) and Pascal Andre (andre@via.ecp.fr)
38 * (February 18, 1996) : 38 * (February 18, 1996) :
39 * + modified shared memory and mmio access port the driver to 39 * + modified shared memory and mmio access port the driver to
40 * alpha platform (structure access -> readb/writeb) 40 * alpha platform (structure access -> readb/writeb)
41 * 41 *
42 * Changes by Steve Kipisz (bungy@ibm.net or kipisz@vnet.ibm.com) 42 * Changes by Steve Kipisz (bungy@ibm.net or kipisz@vnet.ibm.com)
43 * (January 18 1996): 43 * (January 18 1996):
44 * + swapped WWOR and WWCR in ibmtr.h 44 * + swapped WWOR and WWCR in ibmtr.h
45 * + moved some init code from tok_probe into trdev_init. The 45 * + moved some init code from tok_probe into trdev_init. The
46 * PCMCIA code can call trdev_init to complete initializing 46 * PCMCIA code can call trdev_init to complete initializing
47 * the driver. 47 * the driver.
48 * + added -DPCMCIA to support PCMCIA 48 * + added -DPCMCIA to support PCMCIA
49 * + detecting PCMCIA Card Removal in interrupt handler. If 49 * + detecting PCMCIA Card Removal in interrupt handler. If
50 * ISRP is FF, then a PCMCIA card has been removed 50 * ISRP is FF, then a PCMCIA card has been removed
51 * 10/2000 Burt needed a new method to avoid crashing the OS 51 * 10/2000 Burt needed a new method to avoid crashing the OS
52 * 52 *
53 * Changes by Paul Norton (pnorton@cts.com) : 53 * Changes by Paul Norton (pnorton@cts.com) :
54 * + restructured the READ.LOG logic to prevent the transmit SRB 54 * + restructured the READ.LOG logic to prevent the transmit SRB
55 * from being rudely overwritten before the transmit cycle is 55 * from being rudely overwritten before the transmit cycle is
56 * complete. (August 15 1996) 56 * complete. (August 15 1996)
57 * + completed multiple adapter support. (November 20 1996) 57 * + completed multiple adapter support. (November 20 1996)
58 * + implemented csum_partial_copy in tr_rx and increased receive 58 * + implemented csum_partial_copy in tr_rx and increased receive
59 * buffer size and count. Minor fixes. (March 15, 1997) 59 * buffer size and count. Minor fixes. (March 15, 1997)
60 * 60 *
61 * Changes by Christopher Turcksin <wabbit@rtfc.demon.co.uk> 61 * Changes by Christopher Turcksin <wabbit@rtfc.demon.co.uk>
62 * + Now compiles ok as a module again. 62 * + Now compiles ok as a module again.
63 * 63 *
64 * Changes by Paul Norton (pnorton@ieee.org) : 64 * Changes by Paul Norton (pnorton@ieee.org) :
65 * + moved the header manipulation code in tr_tx and tr_rx to 65 * + moved the header manipulation code in tr_tx and tr_rx to
66 * net/802/tr.c. (July 12 1997) 66 * net/802/tr.c. (July 12 1997)
67 * + add retry and timeout on open if cable disconnected. (May 5 1998) 67 * + add retry and timeout on open if cable disconnected. (May 5 1998)
68 * + lifted 2000 byte mtu limit. now depends on shared-RAM size. 68 * + lifted 2000 byte mtu limit. now depends on shared-RAM size.
69 * May 25 1998) 69 * May 25 1998)
70 * + can't allocate 2k recv buff at 8k shared-RAM. (20 October 1998) 70 * + can't allocate 2k recv buff at 8k shared-RAM. (20 October 1998)
71 * 71 *
72 * Changes by Joel Sloan (jjs@c-me.com) : 72 * Changes by Joel Sloan (jjs@c-me.com) :
73 * + disable verbose debug messages by default - to enable verbose 73 * + disable verbose debug messages by default - to enable verbose
74 * debugging, edit the IBMTR_DEBUG_MESSAGES define below 74 * debugging, edit the IBMTR_DEBUG_MESSAGES define below
75 * 75 *
76 * Changes by Mike Phillips <phillim@amtrak.com> : 76 * Changes by Mike Phillips <phillim@amtrak.com> :
77 * + Added extra #ifdef's to work with new PCMCIA Token Ring Code. 77 * + Added extra #ifdef's to work with new PCMCIA Token Ring Code.
78 * The PCMCIA code now just sets up the card so it can be recognized 78 * The PCMCIA code now just sets up the card so it can be recognized
79 * by ibmtr_probe. Also checks allocated memory vs. on-board memory 79 * by ibmtr_probe. Also checks allocated memory vs. on-board memory
80 * for correct figure to use. 80 * for correct figure to use.
81 * 81 *
82 * Changes by Tim Hockin (thockin@isunix.it.ilstu.edu) : 82 * Changes by Tim Hockin (thockin@isunix.it.ilstu.edu) :
83 * + added spinlocks for SMP sanity (10 March 1999) 83 * + added spinlocks for SMP sanity (10 March 1999)
84 * 84 *
85 * Changes by Jochen Friedrich to enable RFC1469 Option 2 multicasting 85 * Changes by Jochen Friedrich to enable RFC1469 Option 2 multicasting
86 * i.e. using functional address C0 00 00 04 00 00 to transmit and 86 * i.e. using functional address C0 00 00 04 00 00 to transmit and
87 * receive multicast packets. 87 * receive multicast packets.
88 * 88 *
89 * Changes by Mike Sullivan (based on original sram patch by Dave Grothe 89 * Changes by Mike Sullivan (based on original sram patch by Dave Grothe
90 * to support windowing into on adapter shared ram. 90 * to support windowing into on adapter shared ram.
91 * i.e. Use LANAID to setup a PnP configuration with 16K RAM. Paging 91 * i.e. Use LANAID to setup a PnP configuration with 16K RAM. Paging
92 * will shift this 16K window over the entire available shared RAM. 92 * will shift this 16K window over the entire available shared RAM.
93 * 93 *
94 * Changes by Peter De Schrijver (p2@mind.be) : 94 * Changes by Peter De Schrijver (p2@mind.be) :
95 * + fixed a problem with PCMCIA card removal 95 * + fixed a problem with PCMCIA card removal
96 * 96 *
97 * Change by Mike Sullivan et al.: 97 * Change by Mike Sullivan et al.:
98 * + added turbo card support. No need to use lanaid to configure 98 * + added turbo card support. No need to use lanaid to configure
99 * the adapter into isa compatiblity mode. 99 * the adapter into isa compatiblity mode.
100 * 100 *
101 * Changes by Burt Silverman to allow the computer to behave nicely when 101 * Changes by Burt Silverman to allow the computer to behave nicely when
102 * a cable is pulled or not in place, or a PCMCIA card is removed hot. 102 * a cable is pulled or not in place, or a PCMCIA card is removed hot.
103 */ 103 */
104 104
105 /* change the define of IBMTR_DEBUG_MESSAGES to a nonzero value 105 /* change the define of IBMTR_DEBUG_MESSAGES to a nonzero value
106 in the event that chatty debug messages are desired - jjs 12/30/98 */ 106 in the event that chatty debug messages are desired - jjs 12/30/98 */
107 107
108 #define IBMTR_DEBUG_MESSAGES 0 108 #define IBMTR_DEBUG_MESSAGES 0
109 109
110 #include <linux/module.h> 110 #include <linux/module.h>
111 111
112 #ifdef PCMCIA /* required for ibmtr_cs.c to build */ 112 #ifdef PCMCIA /* required for ibmtr_cs.c to build */
113 #undef MODULE /* yes, really */ 113 #undef MODULE /* yes, really */
114 #undef ENABLE_PAGING 114 #undef ENABLE_PAGING
115 #else 115 #else
116 #define ENABLE_PAGING 1 116 #define ENABLE_PAGING 1
117 #endif 117 #endif
118 118
119 /* changes the output format of driver initialization */ 119 /* changes the output format of driver initialization */
120 #define TR_VERBOSE 0 120 #define TR_VERBOSE 0
121 121
122 /* some 95 OS send many non UI frame; this allow removing the warning */ 122 /* some 95 OS send many non UI frame; this allow removing the warning */
123 #define TR_FILTERNONUI 1 123 #define TR_FILTERNONUI 1
124 124
125 #include <linux/ioport.h> 125 #include <linux/ioport.h>
126 #include <linux/netdevice.h> 126 #include <linux/netdevice.h>
127 #include <linux/ip.h> 127 #include <linux/ip.h>
128 #include <linux/trdevice.h> 128 #include <linux/trdevice.h>
129 #include <linux/ibmtr.h> 129 #include <linux/ibmtr.h>
130 130
131 #include <net/checksum.h> 131 #include <net/checksum.h>
132 132
133 #include <asm/io.h> 133 #include <asm/io.h>
134 134
135 #define DPRINTK(format, args...) printk("%s: " format, dev->name , ## args) 135 #define DPRINTK(format, args...) printk("%s: " format, dev->name , ## args)
136 #define DPRINTD(format, args...) DummyCall("%s: " format, dev->name , ## args) 136 #define DPRINTD(format, args...) DummyCall("%s: " format, dev->name , ## args)
137 137
138 /* version and credits */ 138 /* version and credits */
139 #ifndef PCMCIA 139 #ifndef PCMCIA
140 static char version[] __devinitdata = 140 static char version[] __devinitdata =
141 "\nibmtr.c: v1.3.57 8/ 7/94 Peter De Schrijver and Mark Swanson\n" 141 "\nibmtr.c: v1.3.57 8/ 7/94 Peter De Schrijver and Mark Swanson\n"
142 " v2.1.125 10/20/98 Paul Norton <pnorton@ieee.org>\n" 142 " v2.1.125 10/20/98 Paul Norton <pnorton@ieee.org>\n"
143 " v2.2.0 12/30/98 Joel Sloan <jjs@c-me.com>\n" 143 " v2.2.0 12/30/98 Joel Sloan <jjs@c-me.com>\n"
144 " v2.2.1 02/08/00 Mike Sullivan <sullivam@us.ibm.com>\n" 144 " v2.2.1 02/08/00 Mike Sullivan <sullivam@us.ibm.com>\n"
145 " v2.2.2 07/27/00 Burt Silverman <burts@us.ibm.com>\n" 145 " v2.2.2 07/27/00 Burt Silverman <burts@us.ibm.com>\n"
146 " v2.4.0 03/01/01 Mike Sullivan <sullivan@us.ibm.com>\n"; 146 " v2.4.0 03/01/01 Mike Sullivan <sullivan@us.ibm.com>\n";
147 #endif 147 #endif
148 148
149 /* this allows displaying full adapter information */ 149 /* this allows displaying full adapter information */
150 150
151 static char *channel_def[] __devinitdata = { "ISA", "MCA", "ISA P&P" }; 151 static char *channel_def[] __devinitdata = { "ISA", "MCA", "ISA P&P" };
152 152
153 static char pcchannelid[] __devinitdata = { 153 static char pcchannelid[] __devinitdata = {
154 0x05, 0x00, 0x04, 0x09, 154 0x05, 0x00, 0x04, 0x09,
155 0x04, 0x03, 0x04, 0x0f, 155 0x04, 0x03, 0x04, 0x0f,
156 0x03, 0x06, 0x03, 0x01, 156 0x03, 0x06, 0x03, 0x01,
157 0x03, 0x01, 0x03, 0x00, 157 0x03, 0x01, 0x03, 0x00,
158 0x03, 0x09, 0x03, 0x09, 158 0x03, 0x09, 0x03, 0x09,
159 0x03, 0x00, 0x02, 0x00 159 0x03, 0x00, 0x02, 0x00
160 }; 160 };
161 161
162 static char mcchannelid[] __devinitdata = { 162 static char mcchannelid[] __devinitdata = {
163 0x04, 0x0d, 0x04, 0x01, 163 0x04, 0x0d, 0x04, 0x01,
164 0x05, 0x02, 0x05, 0x03, 164 0x05, 0x02, 0x05, 0x03,
165 0x03, 0x06, 0x03, 0x03, 165 0x03, 0x06, 0x03, 0x03,
166 0x05, 0x08, 0x03, 0x04, 166 0x05, 0x08, 0x03, 0x04,
167 0x03, 0x05, 0x03, 0x01, 167 0x03, 0x05, 0x03, 0x01,
168 0x03, 0x08, 0x02, 0x00 168 0x03, 0x08, 0x02, 0x00
169 }; 169 };
170 170
171 static char __devinit *adapter_def(char type) 171 static char __devinit *adapter_def(char type)
172 { 172 {
173 switch (type) { 173 switch (type) {
174 case 0xF: return "PC Adapter | PC Adapter II | Adapter/A"; 174 case 0xF: return "PC Adapter | PC Adapter II | Adapter/A";
175 case 0xE: return "16/4 Adapter | 16/4 Adapter/A (long)"; 175 case 0xE: return "16/4 Adapter | 16/4 Adapter/A (long)";
176 case 0xD: return "16/4 Adapter/A (short) | 16/4 ISA-16 Adapter"; 176 case 0xD: return "16/4 Adapter/A (short) | 16/4 ISA-16 Adapter";
177 case 0xC: return "Auto 16/4 Adapter"; 177 case 0xC: return "Auto 16/4 Adapter";
178 default: return "adapter (unknown type)"; 178 default: return "adapter (unknown type)";
179 }; 179 };
180 }; 180 };
181 181
182 #define TRC_INIT 0x01 /* Trace initialization & PROBEs */ 182 #define TRC_INIT 0x01 /* Trace initialization & PROBEs */
183 #define TRC_INITV 0x02 /* verbose init trace points */ 183 #define TRC_INITV 0x02 /* verbose init trace points */
184 static unsigned char ibmtr_debug_trace = 0; 184 static unsigned char ibmtr_debug_trace = 0;
185 185
186 static int ibmtr_probe1(struct net_device *dev, int ioaddr); 186 static int ibmtr_probe1(struct net_device *dev, int ioaddr);
187 static unsigned char get_sram_size(struct tok_info *adapt_info); 187 static unsigned char get_sram_size(struct tok_info *adapt_info);
188 static int trdev_init(struct net_device *dev); 188 static int trdev_init(struct net_device *dev);
189 static int tok_open(struct net_device *dev); 189 static int tok_open(struct net_device *dev);
190 static int tok_init_card(struct net_device *dev); 190 static int tok_init_card(struct net_device *dev);
191 static void tok_open_adapter(unsigned long dev_addr); 191 static void tok_open_adapter(unsigned long dev_addr);
192 static void open_sap(unsigned char type, struct net_device *dev); 192 static void open_sap(unsigned char type, struct net_device *dev);
193 static void tok_set_multicast_list(struct net_device *dev); 193 static void tok_set_multicast_list(struct net_device *dev);
194 static int tok_send_packet(struct sk_buff *skb, struct net_device *dev); 194 static int tok_send_packet(struct sk_buff *skb, struct net_device *dev);
195 static int tok_close(struct net_device *dev); 195 static int tok_close(struct net_device *dev);
196 static irqreturn_t tok_interrupt(int irq, void *dev_id); 196 static irqreturn_t tok_interrupt(int irq, void *dev_id);
197 static void initial_tok_int(struct net_device *dev); 197 static void initial_tok_int(struct net_device *dev);
198 static void tr_tx(struct net_device *dev); 198 static void tr_tx(struct net_device *dev);
199 static void tr_rx(struct net_device *dev); 199 static void tr_rx(struct net_device *dev);
200 static void ibmtr_reset_timer(struct timer_list*tmr,struct net_device *dev); 200 static void ibmtr_reset_timer(struct timer_list*tmr,struct net_device *dev);
201 static void tok_rerun(unsigned long dev_addr); 201 static void tok_rerun(unsigned long dev_addr);
202 static void ibmtr_readlog(struct net_device *dev); 202 static void ibmtr_readlog(struct net_device *dev);
203 static struct net_device_stats *tok_get_stats(struct net_device *dev);
204 static int ibmtr_change_mtu(struct net_device *dev, int mtu); 203 static int ibmtr_change_mtu(struct net_device *dev, int mtu);
205 static void find_turbo_adapters(int *iolist); 204 static void find_turbo_adapters(int *iolist);
206 205
207 static int ibmtr_portlist[IBMTR_MAX_ADAPTERS+1] __devinitdata = { 206 static int ibmtr_portlist[IBMTR_MAX_ADAPTERS+1] __devinitdata = {
208 0xa20, 0xa24, 0, 0, 0 207 0xa20, 0xa24, 0, 0, 0
209 }; 208 };
210 static int __devinitdata turbo_io[IBMTR_MAX_ADAPTERS] = {0}; 209 static int __devinitdata turbo_io[IBMTR_MAX_ADAPTERS] = {0};
211 static int __devinitdata turbo_irq[IBMTR_MAX_ADAPTERS] = {0}; 210 static int __devinitdata turbo_irq[IBMTR_MAX_ADAPTERS] = {0};
212 static int __devinitdata turbo_searched = 0; 211 static int __devinitdata turbo_searched = 0;
213 212
214 #ifndef PCMCIA 213 #ifndef PCMCIA
215 static __u32 ibmtr_mem_base __devinitdata = 0xd0000; 214 static __u32 ibmtr_mem_base __devinitdata = 0xd0000;
216 #endif 215 #endif
217 216
218 static void __devinit PrtChanID(char *pcid, short stride) 217 static void __devinit PrtChanID(char *pcid, short stride)
219 { 218 {
220 short i, j; 219 short i, j;
221 for (i = 0, j = 0; i < 24; i++, j += stride) 220 for (i = 0, j = 0; i < 24; i++, j += stride)
222 printk("%1x", ((int) pcid[j]) & 0x0f); 221 printk("%1x", ((int) pcid[j]) & 0x0f);
223 printk("\n"); 222 printk("\n");
224 } 223 }
225 224
226 static void __devinit HWPrtChanID(void __iomem *pcid, short stride) 225 static void __devinit HWPrtChanID(void __iomem *pcid, short stride)
227 { 226 {
228 short i, j; 227 short i, j;
229 for (i = 0, j = 0; i < 24; i++, j += stride) 228 for (i = 0, j = 0; i < 24; i++, j += stride)
230 printk("%1x", ((int) readb(pcid + j)) & 0x0f); 229 printk("%1x", ((int) readb(pcid + j)) & 0x0f);
231 printk("\n"); 230 printk("\n");
232 } 231 }
233 232
234 /* We have to ioremap every checked address, because isa_readb is 233 /* We have to ioremap every checked address, because isa_readb is
235 * going away. 234 * going away.
236 */ 235 */
237 236
238 static void __devinit find_turbo_adapters(int *iolist) 237 static void __devinit find_turbo_adapters(int *iolist)
239 { 238 {
240 int ram_addr; 239 int ram_addr;
241 int index=0; 240 int index=0;
242 void __iomem *chanid; 241 void __iomem *chanid;
243 int found_turbo=0; 242 int found_turbo=0;
244 unsigned char *tchanid, ctemp; 243 unsigned char *tchanid, ctemp;
245 int i, j; 244 int i, j;
246 unsigned long jif; 245 unsigned long jif;
247 void __iomem *ram_mapped ; 246 void __iomem *ram_mapped ;
248 247
249 if (turbo_searched == 1) return; 248 if (turbo_searched == 1) return;
250 turbo_searched=1; 249 turbo_searched=1;
251 for (ram_addr=0xC0000; ram_addr < 0xE0000; ram_addr+=0x2000) { 250 for (ram_addr=0xC0000; ram_addr < 0xE0000; ram_addr+=0x2000) {
252 251
253 __u32 intf_tbl=0; 252 __u32 intf_tbl=0;
254 253
255 found_turbo=1; 254 found_turbo=1;
256 ram_mapped = ioremap((u32)ram_addr,0x1fff) ; 255 ram_mapped = ioremap((u32)ram_addr,0x1fff) ;
257 if (ram_mapped==NULL) 256 if (ram_mapped==NULL)
258 continue ; 257 continue ;
259 chanid=(CHANNEL_ID + ram_mapped); 258 chanid=(CHANNEL_ID + ram_mapped);
260 tchanid=pcchannelid; 259 tchanid=pcchannelid;
261 ctemp=readb(chanid) & 0x0f; 260 ctemp=readb(chanid) & 0x0f;
262 if (ctemp != *tchanid) continue; 261 if (ctemp != *tchanid) continue;
263 for (i=2,j=1; i<=46; i=i+2,j++) { 262 for (i=2,j=1; i<=46; i=i+2,j++) {
264 if ((readb(chanid+i) & 0x0f) != tchanid[j]){ 263 if ((readb(chanid+i) & 0x0f) != tchanid[j]){
265 found_turbo=0; 264 found_turbo=0;
266 break; 265 break;
267 } 266 }
268 } 267 }
269 if (!found_turbo) continue; 268 if (!found_turbo) continue;
270 269
271 writeb(0x90, ram_mapped+0x1E01); 270 writeb(0x90, ram_mapped+0x1E01);
272 for(i=2; i<0x0f; i++) { 271 for(i=2; i<0x0f; i++) {
273 writeb(0x00, ram_mapped+0x1E01+i); 272 writeb(0x00, ram_mapped+0x1E01+i);
274 } 273 }
275 writeb(0x00, ram_mapped+0x1E01); 274 writeb(0x00, ram_mapped+0x1E01);
276 for(jif=jiffies+TR_BUSY_INTERVAL; time_before_eq(jiffies,jif);); 275 for(jif=jiffies+TR_BUSY_INTERVAL; time_before_eq(jiffies,jif););
277 intf_tbl=ntohs(readw(ram_mapped+ACA_OFFSET+ACA_RW+WRBR_EVEN)); 276 intf_tbl=ntohs(readw(ram_mapped+ACA_OFFSET+ACA_RW+WRBR_EVEN));
278 if (intf_tbl) { 277 if (intf_tbl) {
279 #if IBMTR_DEBUG_MESSAGES 278 #if IBMTR_DEBUG_MESSAGES
280 printk("ibmtr::find_turbo_adapters, Turbo found at " 279 printk("ibmtr::find_turbo_adapters, Turbo found at "
281 "ram_addr %x\n",ram_addr); 280 "ram_addr %x\n",ram_addr);
282 printk("ibmtr::find_turbo_adapters, interface_table "); 281 printk("ibmtr::find_turbo_adapters, interface_table ");
283 for(i=0; i<6; i++) { 282 for(i=0; i<6; i++) {
284 printk("%x:",readb(ram_addr+intf_tbl+i)); 283 printk("%x:",readb(ram_addr+intf_tbl+i));
285 } 284 }
286 printk("\n"); 285 printk("\n");
287 #endif 286 #endif
288 turbo_io[index]=ntohs(readw(ram_mapped+intf_tbl+4)); 287 turbo_io[index]=ntohs(readw(ram_mapped+intf_tbl+4));
289 turbo_irq[index]=readb(ram_mapped+intf_tbl+3); 288 turbo_irq[index]=readb(ram_mapped+intf_tbl+3);
290 outb(0, turbo_io[index] + ADAPTRESET); 289 outb(0, turbo_io[index] + ADAPTRESET);
291 for(jif=jiffies+TR_RST_TIME;time_before_eq(jiffies,jif);); 290 for(jif=jiffies+TR_RST_TIME;time_before_eq(jiffies,jif););
292 outb(0, turbo_io[index] + ADAPTRESETREL); 291 outb(0, turbo_io[index] + ADAPTRESETREL);
293 index++; 292 index++;
294 continue; 293 continue;
295 } 294 }
296 #if IBMTR_DEBUG_MESSAGES 295 #if IBMTR_DEBUG_MESSAGES
297 printk("ibmtr::find_turbo_adapters, ibmtr card found at" 296 printk("ibmtr::find_turbo_adapters, ibmtr card found at"
298 " %x but not a Turbo model\n",ram_addr); 297 " %x but not a Turbo model\n",ram_addr);
299 #endif 298 #endif
300 iounmap(ram_mapped) ; 299 iounmap(ram_mapped) ;
301 } /* for */ 300 } /* for */
302 for(i=0; i<IBMTR_MAX_ADAPTERS; i++) { 301 for(i=0; i<IBMTR_MAX_ADAPTERS; i++) {
303 if(!turbo_io[i]) break; 302 if(!turbo_io[i]) break;
304 for (j=0; j<IBMTR_MAX_ADAPTERS; j++) { 303 for (j=0; j<IBMTR_MAX_ADAPTERS; j++) {
305 if ( iolist[j] && iolist[j] != turbo_io[i]) continue; 304 if ( iolist[j] && iolist[j] != turbo_io[i]) continue;
306 iolist[j]=turbo_io[i]; 305 iolist[j]=turbo_io[i];
307 break; 306 break;
308 } 307 }
309 } 308 }
310 } 309 }
311 310
312 static void ibmtr_cleanup_card(struct net_device *dev) 311 static void ibmtr_cleanup_card(struct net_device *dev)
313 { 312 {
314 if (dev->base_addr) { 313 if (dev->base_addr) {
315 outb(0,dev->base_addr+ADAPTRESET); 314 outb(0,dev->base_addr+ADAPTRESET);
316 315
317 schedule_timeout_uninterruptible(TR_RST_TIME); /* wait 50ms */ 316 schedule_timeout_uninterruptible(TR_RST_TIME); /* wait 50ms */
318 317
319 outb(0,dev->base_addr+ADAPTRESETREL); 318 outb(0,dev->base_addr+ADAPTRESETREL);
320 } 319 }
321 320
322 #ifndef PCMCIA 321 #ifndef PCMCIA
323 free_irq(dev->irq, dev); 322 free_irq(dev->irq, dev);
324 release_region(dev->base_addr, IBMTR_IO_EXTENT); 323 release_region(dev->base_addr, IBMTR_IO_EXTENT);
325 324
326 { 325 {
327 struct tok_info *ti = netdev_priv(dev); 326 struct tok_info *ti = netdev_priv(dev);
328 iounmap(ti->mmio); 327 iounmap(ti->mmio);
329 iounmap(ti->sram_virt); 328 iounmap(ti->sram_virt);
330 } 329 }
331 #endif 330 #endif
332 } 331 }
333 332
334 /**************************************************************************** 333 /****************************************************************************
335 * ibmtr_probe(): Routine specified in the network device structure 334 * ibmtr_probe(): Routine specified in the network device structure
336 * to probe for an IBM Token Ring Adapter. Routine outline: 335 * to probe for an IBM Token Ring Adapter. Routine outline:
337 * I. Interrogate hardware to determine if an adapter exists 336 * I. Interrogate hardware to determine if an adapter exists
338 * and what the speeds and feeds are 337 * and what the speeds and feeds are
339 * II. Setup data structures to control execution based upon 338 * II. Setup data structures to control execution based upon
340 * adapter characteristics. 339 * adapter characteristics.
341 * 340 *
342 * We expect ibmtr_probe to be called once for each device entry 341 * We expect ibmtr_probe to be called once for each device entry
343 * which references it. 342 * which references it.
344 ****************************************************************************/ 343 ****************************************************************************/
345 344
346 static int __devinit ibmtr_probe(struct net_device *dev) 345 static int __devinit ibmtr_probe(struct net_device *dev)
347 { 346 {
348 int i; 347 int i;
349 int base_addr = dev->base_addr; 348 int base_addr = dev->base_addr;
350 349
351 if (base_addr && base_addr <= 0x1ff) /* Don't probe at all. */ 350 if (base_addr && base_addr <= 0x1ff) /* Don't probe at all. */
352 return -ENXIO; 351 return -ENXIO;
353 if (base_addr > 0x1ff) { /* Check a single specified location. */ 352 if (base_addr > 0x1ff) { /* Check a single specified location. */
354 if (!ibmtr_probe1(dev, base_addr)) return 0; 353 if (!ibmtr_probe1(dev, base_addr)) return 0;
355 return -ENODEV; 354 return -ENODEV;
356 } 355 }
357 find_turbo_adapters(ibmtr_portlist); 356 find_turbo_adapters(ibmtr_portlist);
358 for (i = 0; ibmtr_portlist[i]; i++) { 357 for (i = 0; ibmtr_portlist[i]; i++) {
359 int ioaddr = ibmtr_portlist[i]; 358 int ioaddr = ibmtr_portlist[i];
360 359
361 if (!ibmtr_probe1(dev, ioaddr)) return 0; 360 if (!ibmtr_probe1(dev, ioaddr)) return 0;
362 } 361 }
363 return -ENODEV; 362 return -ENODEV;
364 } 363 }
365 364
366 int __devinit ibmtr_probe_card(struct net_device *dev) 365 int __devinit ibmtr_probe_card(struct net_device *dev)
367 { 366 {
368 int err = ibmtr_probe(dev); 367 int err = ibmtr_probe(dev);
369 if (!err) { 368 if (!err) {
370 err = register_netdev(dev); 369 err = register_netdev(dev);
371 if (err) 370 if (err)
372 ibmtr_cleanup_card(dev); 371 ibmtr_cleanup_card(dev);
373 } 372 }
374 return err; 373 return err;
375 } 374 }
376 375
377 /*****************************************************************************/ 376 /*****************************************************************************/
378 377
379 static int __devinit ibmtr_probe1(struct net_device *dev, int PIOaddr) 378 static int __devinit ibmtr_probe1(struct net_device *dev, int PIOaddr)
380 { 379 {
381 380
382 unsigned char segment, intr=0, irq=0, i, j, cardpresent=NOTOK, temp=0; 381 unsigned char segment, intr=0, irq=0, i, j, cardpresent=NOTOK, temp=0;
383 void __iomem * t_mmio = NULL; 382 void __iomem * t_mmio = NULL;
384 struct tok_info *ti = netdev_priv(dev); 383 struct tok_info *ti = netdev_priv(dev);
385 void __iomem *cd_chanid; 384 void __iomem *cd_chanid;
386 unsigned char *tchanid, ctemp; 385 unsigned char *tchanid, ctemp;
387 #ifndef PCMCIA 386 #ifndef PCMCIA
388 unsigned char t_irq=0; 387 unsigned char t_irq=0;
389 unsigned long timeout; 388 unsigned long timeout;
390 static int version_printed; 389 static int version_printed;
391 #endif 390 #endif
392 391
393 /* Query the adapter PIO base port which will return 392 /* Query the adapter PIO base port which will return
394 * indication of where MMIO was placed. We also have a 393 * indication of where MMIO was placed. We also have a
395 * coded interrupt number. 394 * coded interrupt number.
396 */ 395 */
397 segment = inb(PIOaddr); 396 segment = inb(PIOaddr);
398 if (segment < 0x40 || segment > 0xe0) { 397 if (segment < 0x40 || segment > 0xe0) {
399 /* Out of range values so we'll assume non-existent IO device 398 /* Out of range values so we'll assume non-existent IO device
400 * but this is not necessarily a problem, esp if a turbo 399 * but this is not necessarily a problem, esp if a turbo
401 * adapter is being used. */ 400 * adapter is being used. */
402 #if IBMTR_DEBUG_MESSAGES 401 #if IBMTR_DEBUG_MESSAGES
403 DPRINTK("ibmtr_probe1(): unhappy that inb(0x%X) == 0x%X, " 402 DPRINTK("ibmtr_probe1(): unhappy that inb(0x%X) == 0x%X, "
404 "Hardware Problem?\n",PIOaddr,segment); 403 "Hardware Problem?\n",PIOaddr,segment);
405 #endif 404 #endif
406 return -ENODEV; 405 return -ENODEV;
407 } 406 }
408 /* 407 /*
409 * Compute the linear base address of the MMIO area 408 * Compute the linear base address of the MMIO area
410 * as LINUX doesn't care about segments 409 * as LINUX doesn't care about segments
411 */ 410 */
412 t_mmio = ioremap(((__u32) (segment & 0xfc) << 11) + 0x80000,2048); 411 t_mmio = ioremap(((__u32) (segment & 0xfc) << 11) + 0x80000,2048);
413 if (!t_mmio) { 412 if (!t_mmio) {
414 DPRINTK("Cannot remap mmiobase memory area") ; 413 DPRINTK("Cannot remap mmiobase memory area") ;
415 return -ENODEV ; 414 return -ENODEV ;
416 } 415 }
417 intr = segment & 0x03; /* low bits is coded interrupt # */ 416 intr = segment & 0x03; /* low bits is coded interrupt # */
418 if (ibmtr_debug_trace & TRC_INIT) 417 if (ibmtr_debug_trace & TRC_INIT)
419 DPRINTK("PIOaddr: %4hx seg/intr: %2x mmio base: %p intr: %d\n" 418 DPRINTK("PIOaddr: %4hx seg/intr: %2x mmio base: %p intr: %d\n"
420 , PIOaddr, (int) segment, t_mmio, (int) intr); 419 , PIOaddr, (int) segment, t_mmio, (int) intr);
421 420
422 /* 421 /*
423 * Now we will compare expected 'channelid' strings with 422 * Now we will compare expected 'channelid' strings with
424 * what we is there to learn of ISA/MCA or not TR card 423 * what we is there to learn of ISA/MCA or not TR card
425 */ 424 */
426 #ifdef PCMCIA 425 #ifdef PCMCIA
427 iounmap(t_mmio); 426 iounmap(t_mmio);
428 t_mmio = ti->mmio; /*BMS to get virtual address */ 427 t_mmio = ti->mmio; /*BMS to get virtual address */
429 irq = ti->irq; /*BMS to display the irq! */ 428 irq = ti->irq; /*BMS to display the irq! */
430 #endif 429 #endif
431 cd_chanid = (CHANNEL_ID + t_mmio); /* for efficiency */ 430 cd_chanid = (CHANNEL_ID + t_mmio); /* for efficiency */
432 tchanid = pcchannelid; 431 tchanid = pcchannelid;
433 cardpresent = TR_ISA; /* try ISA */ 432 cardpresent = TR_ISA; /* try ISA */
434 433
435 /* Suboptimize knowing first byte different */ 434 /* Suboptimize knowing first byte different */
436 ctemp = readb(cd_chanid) & 0x0f; 435 ctemp = readb(cd_chanid) & 0x0f;
437 if (ctemp != *tchanid) { /* NOT ISA card, try MCA */ 436 if (ctemp != *tchanid) { /* NOT ISA card, try MCA */
438 tchanid = mcchannelid; 437 tchanid = mcchannelid;
439 cardpresent = TR_MCA; 438 cardpresent = TR_MCA;
440 if (ctemp != *tchanid) /* Neither ISA nor MCA */ 439 if (ctemp != *tchanid) /* Neither ISA nor MCA */
441 cardpresent = NOTOK; 440 cardpresent = NOTOK;
442 } 441 }
443 if (cardpresent != NOTOK) { 442 if (cardpresent != NOTOK) {
444 /* Know presumed type, try rest of ID */ 443 /* Know presumed type, try rest of ID */
445 for (i = 2, j = 1; i <= 46; i = i + 2, j++) { 444 for (i = 2, j = 1; i <= 46; i = i + 2, j++) {
446 if( (readb(cd_chanid+i)&0x0f) == tchanid[j]) continue; 445 if( (readb(cd_chanid+i)&0x0f) == tchanid[j]) continue;
447 /* match failed, not TR card */ 446 /* match failed, not TR card */
448 cardpresent = NOTOK; 447 cardpresent = NOTOK;
449 break; 448 break;
450 } 449 }
451 } 450 }
452 /* 451 /*
453 * If we have an ISA board check for the ISA P&P version, 452 * If we have an ISA board check for the ISA P&P version,
454 * as it has different IRQ settings 453 * as it has different IRQ settings
455 */ 454 */
456 if (cardpresent == TR_ISA && (readb(AIPFID + t_mmio) == 0x0e)) 455 if (cardpresent == TR_ISA && (readb(AIPFID + t_mmio) == 0x0e))
457 cardpresent = TR_ISAPNP; 456 cardpresent = TR_ISAPNP;
458 if (cardpresent == NOTOK) { /* "channel_id" did not match, report */ 457 if (cardpresent == NOTOK) { /* "channel_id" did not match, report */
459 if (!(ibmtr_debug_trace & TRC_INIT)) { 458 if (!(ibmtr_debug_trace & TRC_INIT)) {
460 #ifndef PCMCIA 459 #ifndef PCMCIA
461 iounmap(t_mmio); 460 iounmap(t_mmio);
462 #endif 461 #endif
463 return -ENODEV; 462 return -ENODEV;
464 } 463 }
465 DPRINTK( "Channel ID string not found for PIOaddr: %4hx\n", 464 DPRINTK( "Channel ID string not found for PIOaddr: %4hx\n",
466 PIOaddr); 465 PIOaddr);
467 DPRINTK("Expected for ISA: "); 466 DPRINTK("Expected for ISA: ");
468 PrtChanID(pcchannelid, 1); 467 PrtChanID(pcchannelid, 1);
469 DPRINTK(" found: "); 468 DPRINTK(" found: ");
470 /* BMS Note that this can be misleading, when hardware is flaky, because you 469 /* BMS Note that this can be misleading, when hardware is flaky, because you
471 are reading it a second time here. So with my flaky hardware, I'll see my- 470 are reading it a second time here. So with my flaky hardware, I'll see my-
472 self in this block, with the HW ID matching the ISA ID exactly! */ 471 self in this block, with the HW ID matching the ISA ID exactly! */
473 HWPrtChanID(cd_chanid, 2); 472 HWPrtChanID(cd_chanid, 2);
474 DPRINTK("Expected for MCA: "); 473 DPRINTK("Expected for MCA: ");
475 PrtChanID(mcchannelid, 1); 474 PrtChanID(mcchannelid, 1);
476 } 475 }
477 /* Now, setup some of the pl0 buffers for this driver.. */ 476 /* Now, setup some of the pl0 buffers for this driver.. */
478 /* If called from PCMCIA, it is already set up, so no need to 477 /* If called from PCMCIA, it is already set up, so no need to
479 waste the memory, just use the existing structure */ 478 waste the memory, just use the existing structure */
480 #ifndef PCMCIA 479 #ifndef PCMCIA
481 ti->mmio = t_mmio; 480 ti->mmio = t_mmio;
482 for (i = 0; i < IBMTR_MAX_ADAPTERS; i++) { 481 for (i = 0; i < IBMTR_MAX_ADAPTERS; i++) {
483 if (turbo_io[i] != PIOaddr) 482 if (turbo_io[i] != PIOaddr)
484 continue; 483 continue;
485 #if IBMTR_DEBUG_MESSAGES 484 #if IBMTR_DEBUG_MESSAGES
486 printk("ibmtr::tr_probe1, setting PIOaddr %x to Turbo\n", 485 printk("ibmtr::tr_probe1, setting PIOaddr %x to Turbo\n",
487 PIOaddr); 486 PIOaddr);
488 #endif 487 #endif
489 ti->turbo = 1; 488 ti->turbo = 1;
490 t_irq = turbo_irq[i]; 489 t_irq = turbo_irq[i];
491 } 490 }
492 #endif /* !PCMCIA */ 491 #endif /* !PCMCIA */
493 ti->readlog_pending = 0; 492 ti->readlog_pending = 0;
494 init_waitqueue_head(&ti->wait_for_reset); 493 init_waitqueue_head(&ti->wait_for_reset);
495 494
496 /* if PCMCIA, the card can be recognized as either TR_ISA or TR_ISAPNP 495 /* if PCMCIA, the card can be recognized as either TR_ISA or TR_ISAPNP
497 * depending which card is inserted. */ 496 * depending which card is inserted. */
498 497
499 #ifndef PCMCIA 498 #ifndef PCMCIA
500 switch (cardpresent) { 499 switch (cardpresent) {
501 case TR_ISA: 500 case TR_ISA:
502 if (intr == 0) irq = 9; /* irq2 really is irq9 */ 501 if (intr == 0) irq = 9; /* irq2 really is irq9 */
503 if (intr == 1) irq = 3; 502 if (intr == 1) irq = 3;
504 if (intr == 2) irq = 6; 503 if (intr == 2) irq = 6;
505 if (intr == 3) irq = 7; 504 if (intr == 3) irq = 7;
506 ti->adapter_int_enable = PIOaddr + ADAPTINTREL; 505 ti->adapter_int_enable = PIOaddr + ADAPTINTREL;
507 break; 506 break;
508 case TR_MCA: 507 case TR_MCA:
509 if (intr == 0) irq = 9; 508 if (intr == 0) irq = 9;
510 if (intr == 1) irq = 3; 509 if (intr == 1) irq = 3;
511 if (intr == 2) irq = 10; 510 if (intr == 2) irq = 10;
512 if (intr == 3) irq = 11; 511 if (intr == 3) irq = 11;
513 ti->global_int_enable = 0; 512 ti->global_int_enable = 0;
514 ti->adapter_int_enable = 0; 513 ti->adapter_int_enable = 0;
515 ti->sram_phys=(__u32)(inb(PIOaddr+ADAPTRESETREL) & 0xfe) << 12; 514 ti->sram_phys=(__u32)(inb(PIOaddr+ADAPTRESETREL) & 0xfe) << 12;
516 break; 515 break;
517 case TR_ISAPNP: 516 case TR_ISAPNP:
518 if (!t_irq) { 517 if (!t_irq) {
519 if (intr == 0) irq = 9; 518 if (intr == 0) irq = 9;
520 if (intr == 1) irq = 3; 519 if (intr == 1) irq = 3;
521 if (intr == 2) irq = 10; 520 if (intr == 2) irq = 10;
522 if (intr == 3) irq = 11; 521 if (intr == 3) irq = 11;
523 } else 522 } else
524 irq=t_irq; 523 irq=t_irq;
525 timeout = jiffies + TR_SPIN_INTERVAL; 524 timeout = jiffies + TR_SPIN_INTERVAL;
526 while (!readb(ti->mmio + ACA_OFFSET + ACA_RW + RRR_EVEN)){ 525 while (!readb(ti->mmio + ACA_OFFSET + ACA_RW + RRR_EVEN)){
527 if (!time_after(jiffies, timeout)) continue; 526 if (!time_after(jiffies, timeout)) continue;
528 DPRINTK( "Hardware timeout during initialization.\n"); 527 DPRINTK( "Hardware timeout during initialization.\n");
529 iounmap(t_mmio); 528 iounmap(t_mmio);
530 return -ENODEV; 529 return -ENODEV;
531 } 530 }
532 ti->sram_phys = 531 ti->sram_phys =
533 ((__u32)readb(ti->mmio+ACA_OFFSET+ACA_RW+RRR_EVEN)<<12); 532 ((__u32)readb(ti->mmio+ACA_OFFSET+ACA_RW+RRR_EVEN)<<12);
534 ti->adapter_int_enable = PIOaddr + ADAPTINTREL; 533 ti->adapter_int_enable = PIOaddr + ADAPTINTREL;
535 break; 534 break;
536 } /*end switch (cardpresent) */ 535 } /*end switch (cardpresent) */
537 #endif /*not PCMCIA */ 536 #endif /*not PCMCIA */
538 537
539 if (ibmtr_debug_trace & TRC_INIT) { /* just report int */ 538 if (ibmtr_debug_trace & TRC_INIT) { /* just report int */
540 DPRINTK("irq=%d", irq); 539 DPRINTK("irq=%d", irq);
541 printk(", sram_phys=0x%x", ti->sram_phys); 540 printk(", sram_phys=0x%x", ti->sram_phys);
542 if(ibmtr_debug_trace&TRC_INITV){ /* full chat in verbose only */ 541 if(ibmtr_debug_trace&TRC_INITV){ /* full chat in verbose only */
543 DPRINTK(", ti->mmio=%p", ti->mmio); 542 DPRINTK(", ti->mmio=%p", ti->mmio);
544 printk(", segment=%02X", segment); 543 printk(", segment=%02X", segment);
545 } 544 }
546 printk(".\n"); 545 printk(".\n");
547 } 546 }
548 547
549 /* Get hw address of token ring card */ 548 /* Get hw address of token ring card */
550 j = 0; 549 j = 0;
551 for (i = 0; i < 0x18; i = i + 2) { 550 for (i = 0; i < 0x18; i = i + 2) {
552 /* technical reference states to do this */ 551 /* technical reference states to do this */
553 temp = readb(ti->mmio + AIP + i) & 0x0f; 552 temp = readb(ti->mmio + AIP + i) & 0x0f;
554 ti->hw_address[j] = temp; 553 ti->hw_address[j] = temp;
555 if (j & 1) 554 if (j & 1)
556 dev->dev_addr[(j / 2)] = 555 dev->dev_addr[(j / 2)] =
557 ti->hw_address[j]+ (ti->hw_address[j - 1] << 4); 556 ti->hw_address[j]+ (ti->hw_address[j - 1] << 4);
558 ++j; 557 ++j;
559 } 558 }
560 /* get Adapter type: 'F' = Adapter/A, 'E' = 16/4 Adapter II,... */ 559 /* get Adapter type: 'F' = Adapter/A, 'E' = 16/4 Adapter II,... */
561 ti->adapter_type = readb(ti->mmio + AIPADAPTYPE); 560 ti->adapter_type = readb(ti->mmio + AIPADAPTYPE);
562 561
563 /* get Data Rate: F=4Mb, E=16Mb, D=4Mb & 16Mb ?? */ 562 /* get Data Rate: F=4Mb, E=16Mb, D=4Mb & 16Mb ?? */
564 ti->data_rate = readb(ti->mmio + AIPDATARATE); 563 ti->data_rate = readb(ti->mmio + AIPDATARATE);
565 564
566 /* Get Early Token Release support?: F=no, E=4Mb, D=16Mb, C=4&16Mb */ 565 /* Get Early Token Release support?: F=no, E=4Mb, D=16Mb, C=4&16Mb */
567 ti->token_release = readb(ti->mmio + AIPEARLYTOKEN); 566 ti->token_release = readb(ti->mmio + AIPEARLYTOKEN);
568 567
569 /* How much shared RAM is on adapter ? */ 568 /* How much shared RAM is on adapter ? */
570 if (ti->turbo) { 569 if (ti->turbo) {
571 ti->avail_shared_ram=127; 570 ti->avail_shared_ram=127;
572 } else { 571 } else {
573 ti->avail_shared_ram = get_sram_size(ti);/*in 512 byte units */ 572 ti->avail_shared_ram = get_sram_size(ti);/*in 512 byte units */
574 } 573 }
575 /* We need to set or do a bunch of work here based on previous results*/ 574 /* We need to set or do a bunch of work here based on previous results*/
576 /* Support paging? What sizes?: F=no, E=16k, D=32k, C=16 & 32k */ 575 /* Support paging? What sizes?: F=no, E=16k, D=32k, C=16 & 32k */
577 ti->shared_ram_paging = readb(ti->mmio + AIPSHRAMPAGE); 576 ti->shared_ram_paging = readb(ti->mmio + AIPSHRAMPAGE);
578 577
579 /* Available DHB 4Mb size: F=2048, E=4096, D=4464 */ 578 /* Available DHB 4Mb size: F=2048, E=4096, D=4464 */
580 switch (readb(ti->mmio + AIP4MBDHB)) { 579 switch (readb(ti->mmio + AIP4MBDHB)) {
581 case 0xe: ti->dhb_size4mb = 4096; break; 580 case 0xe: ti->dhb_size4mb = 4096; break;
582 case 0xd: ti->dhb_size4mb = 4464; break; 581 case 0xd: ti->dhb_size4mb = 4464; break;
583 default: ti->dhb_size4mb = 2048; break; 582 default: ti->dhb_size4mb = 2048; break;
584 } 583 }
585 584
586 /* Available DHB 16Mb size: F=2048, E=4096, D=8192, C=16384, B=17960 */ 585 /* Available DHB 16Mb size: F=2048, E=4096, D=8192, C=16384, B=17960 */
587 switch (readb(ti->mmio + AIP16MBDHB)) { 586 switch (readb(ti->mmio + AIP16MBDHB)) {
588 case 0xe: ti->dhb_size16mb = 4096; break; 587 case 0xe: ti->dhb_size16mb = 4096; break;
589 case 0xd: ti->dhb_size16mb = 8192; break; 588 case 0xd: ti->dhb_size16mb = 8192; break;
590 case 0xc: ti->dhb_size16mb = 16384; break; 589 case 0xc: ti->dhb_size16mb = 16384; break;
591 case 0xb: ti->dhb_size16mb = 17960; break; 590 case 0xb: ti->dhb_size16mb = 17960; break;
592 default: ti->dhb_size16mb = 2048; break; 591 default: ti->dhb_size16mb = 2048; break;
593 } 592 }
594 593
595 /* We must figure out how much shared memory space this adapter 594 /* We must figure out how much shared memory space this adapter
596 * will occupy so that if there are two adapters we can fit both 595 * will occupy so that if there are two adapters we can fit both
597 * in. Given a choice, we will limit this adapter to 32K. The 596 * in. Given a choice, we will limit this adapter to 32K. The
598 * maximum space will will use for two adapters is 64K so if the 597 * maximum space will will use for two adapters is 64K so if the
599 * adapter we are working on demands 64K (it also doesn't support 598 * adapter we are working on demands 64K (it also doesn't support
600 * paging), then only one adapter can be supported. 599 * paging), then only one adapter can be supported.
601 */ 600 */
602 601
603 /* 602 /*
604 * determine how much of total RAM is mapped into PC space 603 * determine how much of total RAM is mapped into PC space
605 */ 604 */
606 ti->mapped_ram_size= /*sixteen to onehundredtwentyeight 512byte blocks*/ 605 ti->mapped_ram_size= /*sixteen to onehundredtwentyeight 512byte blocks*/
607 1<< ((readb(ti->mmio+ACA_OFFSET+ACA_RW+RRR_ODD) >> 2 & 0x03) + 4); 606 1<< ((readb(ti->mmio+ACA_OFFSET+ACA_RW+RRR_ODD) >> 2 & 0x03) + 4);
608 ti->page_mask = 0; 607 ti->page_mask = 0;
609 if (ti->turbo) ti->page_mask=0xf0; 608 if (ti->turbo) ti->page_mask=0xf0;
610 else if (ti->shared_ram_paging == 0xf); /* No paging in adapter */ 609 else if (ti->shared_ram_paging == 0xf); /* No paging in adapter */
611 else { 610 else {
612 #ifdef ENABLE_PAGING 611 #ifdef ENABLE_PAGING
613 unsigned char pg_size = 0; 612 unsigned char pg_size = 0;
614 /* BMS: page size: PCMCIA, use configuration register; 613 /* BMS: page size: PCMCIA, use configuration register;
615 ISAPNP, use LANAIDC config tool from www.ibm.com */ 614 ISAPNP, use LANAIDC config tool from www.ibm.com */
616 switch (ti->shared_ram_paging) { 615 switch (ti->shared_ram_paging) {
617 case 0xf: 616 case 0xf:
618 break; 617 break;
619 case 0xe: 618 case 0xe:
620 ti->page_mask = (ti->mapped_ram_size == 32) ? 0xc0 : 0; 619 ti->page_mask = (ti->mapped_ram_size == 32) ? 0xc0 : 0;
621 pg_size = 32; /* 16KB page size */ 620 pg_size = 32; /* 16KB page size */
622 break; 621 break;
623 case 0xd: 622 case 0xd:
624 ti->page_mask = (ti->mapped_ram_size == 64) ? 0x80 : 0; 623 ti->page_mask = (ti->mapped_ram_size == 64) ? 0x80 : 0;
625 pg_size = 64; /* 32KB page size */ 624 pg_size = 64; /* 32KB page size */
626 break; 625 break;
627 case 0xc: 626 case 0xc:
628 switch (ti->mapped_ram_size) { 627 switch (ti->mapped_ram_size) {
629 case 32: 628 case 32:
630 ti->page_mask = 0xc0; 629 ti->page_mask = 0xc0;
631 pg_size = 32; 630 pg_size = 32;
632 break; 631 break;
633 case 64: 632 case 64:
634 ti->page_mask = 0x80; 633 ti->page_mask = 0x80;
635 pg_size = 64; 634 pg_size = 64;
636 break; 635 break;
637 } 636 }
638 break; 637 break;
639 default: 638 default:
640 DPRINTK("Unknown shared ram paging info %01X\n", 639 DPRINTK("Unknown shared ram paging info %01X\n",
641 ti->shared_ram_paging); 640 ti->shared_ram_paging);
642 iounmap(t_mmio); 641 iounmap(t_mmio);
643 return -ENODEV; 642 return -ENODEV;
644 break; 643 break;
645 } /*end switch shared_ram_paging */ 644 } /*end switch shared_ram_paging */
646 645
647 if (ibmtr_debug_trace & TRC_INIT) 646 if (ibmtr_debug_trace & TRC_INIT)
648 DPRINTK("Shared RAM paging code: %02X, " 647 DPRINTK("Shared RAM paging code: %02X, "
649 "mapped RAM size: %dK, shared RAM size: %dK, " 648 "mapped RAM size: %dK, shared RAM size: %dK, "
650 "page mask: %02X\n:", 649 "page mask: %02X\n:",
651 ti->shared_ram_paging, ti->mapped_ram_size / 2, 650 ti->shared_ram_paging, ti->mapped_ram_size / 2,
652 ti->avail_shared_ram / 2, ti->page_mask); 651 ti->avail_shared_ram / 2, ti->page_mask);
653 #endif /*ENABLE_PAGING */ 652 #endif /*ENABLE_PAGING */
654 } 653 }
655 654
656 #ifndef PCMCIA 655 #ifndef PCMCIA
657 /* finish figuring the shared RAM address */ 656 /* finish figuring the shared RAM address */
658 if (cardpresent == TR_ISA) { 657 if (cardpresent == TR_ISA) {
659 static __u32 ram_bndry_mask[] = 658 static __u32 ram_bndry_mask[] =
660 { 0xffffe000, 0xffffc000, 0xffff8000, 0xffff0000 }; 659 { 0xffffe000, 0xffffc000, 0xffff8000, 0xffff0000 };
661 __u32 new_base, rrr_32, chk_base, rbm; 660 __u32 new_base, rrr_32, chk_base, rbm;
662 661
663 rrr_32=readb(ti->mmio+ACA_OFFSET+ACA_RW+RRR_ODD) >> 2 & 0x03; 662 rrr_32=readb(ti->mmio+ACA_OFFSET+ACA_RW+RRR_ODD) >> 2 & 0x03;
664 rbm = ram_bndry_mask[rrr_32]; 663 rbm = ram_bndry_mask[rrr_32];
665 new_base = (ibmtr_mem_base + (~rbm)) & rbm;/* up to boundary */ 664 new_base = (ibmtr_mem_base + (~rbm)) & rbm;/* up to boundary */
666 chk_base = new_base + (ti->mapped_ram_size << 9); 665 chk_base = new_base + (ti->mapped_ram_size << 9);
667 if (chk_base > (ibmtr_mem_base + IBMTR_SHARED_RAM_SIZE)) { 666 if (chk_base > (ibmtr_mem_base + IBMTR_SHARED_RAM_SIZE)) {
668 DPRINTK("Shared RAM for this adapter (%05x) exceeds " 667 DPRINTK("Shared RAM for this adapter (%05x) exceeds "
669 "driver limit (%05x), adapter not started.\n", 668 "driver limit (%05x), adapter not started.\n",
670 chk_base, ibmtr_mem_base + IBMTR_SHARED_RAM_SIZE); 669 chk_base, ibmtr_mem_base + IBMTR_SHARED_RAM_SIZE);
671 iounmap(t_mmio); 670 iounmap(t_mmio);
672 return -ENODEV; 671 return -ENODEV;
673 } else { /* seems cool, record what we have figured out */ 672 } else { /* seems cool, record what we have figured out */
674 ti->sram_base = new_base >> 12; 673 ti->sram_base = new_base >> 12;
675 ibmtr_mem_base = chk_base; 674 ibmtr_mem_base = chk_base;
676 } 675 }
677 } 676 }
678 else ti->sram_base = ti->sram_phys >> 12; 677 else ti->sram_base = ti->sram_phys >> 12;
679 678
680 /* The PCMCIA has already got the interrupt line and the io port, 679 /* The PCMCIA has already got the interrupt line and the io port,
681 so no chance of anybody else getting it - MLP */ 680 so no chance of anybody else getting it - MLP */
682 if (request_irq(dev->irq = irq, &tok_interrupt, 0, "ibmtr", dev) != 0) { 681 if (request_irq(dev->irq = irq, &tok_interrupt, 0, "ibmtr", dev) != 0) {
683 DPRINTK("Could not grab irq %d. Halting Token Ring driver.\n", 682 DPRINTK("Could not grab irq %d. Halting Token Ring driver.\n",
684 irq); 683 irq);
685 iounmap(t_mmio); 684 iounmap(t_mmio);
686 return -ENODEV; 685 return -ENODEV;
687 } 686 }
688 /*?? Now, allocate some of the PIO PORTs for this driver.. */ 687 /*?? Now, allocate some of the PIO PORTs for this driver.. */
689 /* record PIOaddr range as busy */ 688 /* record PIOaddr range as busy */
690 if (!request_region(PIOaddr, IBMTR_IO_EXTENT, "ibmtr")) { 689 if (!request_region(PIOaddr, IBMTR_IO_EXTENT, "ibmtr")) {
691 DPRINTK("Could not grab PIO range. Halting driver.\n"); 690 DPRINTK("Could not grab PIO range. Halting driver.\n");
692 free_irq(dev->irq, dev); 691 free_irq(dev->irq, dev);
693 iounmap(t_mmio); 692 iounmap(t_mmio);
694 return -EBUSY; 693 return -EBUSY;
695 } 694 }
696 695
697 if (!version_printed++) { 696 if (!version_printed++) {
698 printk(version); 697 printk(version);
699 } 698 }
700 #endif /* !PCMCIA */ 699 #endif /* !PCMCIA */
701 DPRINTK("%s %s found\n", 700 DPRINTK("%s %s found\n",
702 channel_def[cardpresent - 1], adapter_def(ti->adapter_type)); 701 channel_def[cardpresent - 1], adapter_def(ti->adapter_type));
703 DPRINTK("using irq %d, PIOaddr %hx, %dK shared RAM.\n", 702 DPRINTK("using irq %d, PIOaddr %hx, %dK shared RAM.\n",
704 irq, PIOaddr, ti->mapped_ram_size / 2); 703 irq, PIOaddr, ti->mapped_ram_size / 2);
705 DPRINTK("Hardware address : %pM\n", dev->dev_addr); 704 DPRINTK("Hardware address : %pM\n", dev->dev_addr);
706 if (ti->page_mask) 705 if (ti->page_mask)
707 DPRINTK("Shared RAM paging enabled. " 706 DPRINTK("Shared RAM paging enabled. "
708 "Page size: %uK Shared Ram size %dK\n", 707 "Page size: %uK Shared Ram size %dK\n",
709 ((ti->page_mask^0xff)+1) >>2, ti->avail_shared_ram / 2); 708 ((ti->page_mask^0xff)+1) >>2, ti->avail_shared_ram / 2);
710 else 709 else
711 DPRINTK("Shared RAM paging disabled. ti->page_mask %x\n", 710 DPRINTK("Shared RAM paging disabled. ti->page_mask %x\n",
712 ti->page_mask); 711 ti->page_mask);
713 712
714 /* Calculate the maximum DHB we can use */ 713 /* Calculate the maximum DHB we can use */
715 /* two cases where avail_shared_ram doesn't equal mapped_ram_size: 714 /* two cases where avail_shared_ram doesn't equal mapped_ram_size:
716 1. avail_shared_ram is 127 but mapped_ram_size is 128 (typical) 715 1. avail_shared_ram is 127 but mapped_ram_size is 128 (typical)
717 2. user has configured adapter for less than avail_shared_ram 716 2. user has configured adapter for less than avail_shared_ram
718 but is not using paging (she should use paging, I believe) 717 but is not using paging (she should use paging, I believe)
719 */ 718 */
720 if (!ti->page_mask) { 719 if (!ti->page_mask) {
721 ti->avail_shared_ram= 720 ti->avail_shared_ram=
722 min(ti->mapped_ram_size,ti->avail_shared_ram); 721 min(ti->mapped_ram_size,ti->avail_shared_ram);
723 } 722 }
724 723
725 switch (ti->avail_shared_ram) { 724 switch (ti->avail_shared_ram) {
726 case 16: /* 8KB shared RAM */ 725 case 16: /* 8KB shared RAM */
727 ti->dhb_size4mb = min(ti->dhb_size4mb, (unsigned short)2048); 726 ti->dhb_size4mb = min(ti->dhb_size4mb, (unsigned short)2048);
728 ti->rbuf_len4 = 1032; 727 ti->rbuf_len4 = 1032;
729 ti->rbuf_cnt4=2; 728 ti->rbuf_cnt4=2;
730 ti->dhb_size16mb = min(ti->dhb_size16mb, (unsigned short)2048); 729 ti->dhb_size16mb = min(ti->dhb_size16mb, (unsigned short)2048);
731 ti->rbuf_len16 = 1032; 730 ti->rbuf_len16 = 1032;
732 ti->rbuf_cnt16=2; 731 ti->rbuf_cnt16=2;
733 break; 732 break;
734 case 32: /* 16KB shared RAM */ 733 case 32: /* 16KB shared RAM */
735 ti->dhb_size4mb = min(ti->dhb_size4mb, (unsigned short)4464); 734 ti->dhb_size4mb = min(ti->dhb_size4mb, (unsigned short)4464);
736 ti->rbuf_len4 = 1032; 735 ti->rbuf_len4 = 1032;
737 ti->rbuf_cnt4=4; 736 ti->rbuf_cnt4=4;
738 ti->dhb_size16mb = min(ti->dhb_size16mb, (unsigned short)4096); 737 ti->dhb_size16mb = min(ti->dhb_size16mb, (unsigned short)4096);
739 ti->rbuf_len16 = 1032; /*1024 usable */ 738 ti->rbuf_len16 = 1032; /*1024 usable */
740 ti->rbuf_cnt16=4; 739 ti->rbuf_cnt16=4;
741 break; 740 break;
742 case 64: /* 32KB shared RAM */ 741 case 64: /* 32KB shared RAM */
743 ti->dhb_size4mb = min(ti->dhb_size4mb, (unsigned short)4464); 742 ti->dhb_size4mb = min(ti->dhb_size4mb, (unsigned short)4464);
744 ti->rbuf_len4 = 1032; 743 ti->rbuf_len4 = 1032;
745 ti->rbuf_cnt4=6; 744 ti->rbuf_cnt4=6;
746 ti->dhb_size16mb = min(ti->dhb_size16mb, (unsigned short)10240); 745 ti->dhb_size16mb = min(ti->dhb_size16mb, (unsigned short)10240);
747 ti->rbuf_len16 = 1032; 746 ti->rbuf_len16 = 1032;
748 ti->rbuf_cnt16=6; 747 ti->rbuf_cnt16=6;
749 break; 748 break;
750 case 127: /* 63.5KB shared RAM */ 749 case 127: /* 63.5KB shared RAM */
751 ti->dhb_size4mb = min(ti->dhb_size4mb, (unsigned short)4464); 750 ti->dhb_size4mb = min(ti->dhb_size4mb, (unsigned short)4464);
752 ti->rbuf_len4 = 1032; 751 ti->rbuf_len4 = 1032;
753 ti->rbuf_cnt4=6; 752 ti->rbuf_cnt4=6;
754 ti->dhb_size16mb = min(ti->dhb_size16mb, (unsigned short)16384); 753 ti->dhb_size16mb = min(ti->dhb_size16mb, (unsigned short)16384);
755 ti->rbuf_len16 = 1032; 754 ti->rbuf_len16 = 1032;
756 ti->rbuf_cnt16=16; 755 ti->rbuf_cnt16=16;
757 break; 756 break;
758 case 128: /* 64KB shared RAM */ 757 case 128: /* 64KB shared RAM */
759 ti->dhb_size4mb = min(ti->dhb_size4mb, (unsigned short)4464); 758 ti->dhb_size4mb = min(ti->dhb_size4mb, (unsigned short)4464);
760 ti->rbuf_len4 = 1032; 759 ti->rbuf_len4 = 1032;
761 ti->rbuf_cnt4=6; 760 ti->rbuf_cnt4=6;
762 ti->dhb_size16mb = min(ti->dhb_size16mb, (unsigned short)17960); 761 ti->dhb_size16mb = min(ti->dhb_size16mb, (unsigned short)17960);
763 ti->rbuf_len16 = 1032; 762 ti->rbuf_len16 = 1032;
764 ti->rbuf_cnt16=16; 763 ti->rbuf_cnt16=16;
765 break; 764 break;
766 default: 765 default:
767 ti->dhb_size4mb = 2048; 766 ti->dhb_size4mb = 2048;
768 ti->rbuf_len4 = 1032; 767 ti->rbuf_len4 = 1032;
769 ti->rbuf_cnt4=2; 768 ti->rbuf_cnt4=2;
770 ti->dhb_size16mb = 2048; 769 ti->dhb_size16mb = 2048;
771 ti->rbuf_len16 = 1032; 770 ti->rbuf_len16 = 1032;
772 ti->rbuf_cnt16=2; 771 ti->rbuf_cnt16=2;
773 break; 772 break;
774 } 773 }
775 /* this formula is not smart enough for the paging case 774 /* this formula is not smart enough for the paging case
776 ti->rbuf_cnt<x> = (ti->avail_shared_ram * BLOCKSZ - ADAPT_PRIVATE - 775 ti->rbuf_cnt<x> = (ti->avail_shared_ram * BLOCKSZ - ADAPT_PRIVATE -
777 ARBLENGTH - SSBLENGTH - DLC_MAX_SAP * SAPLENGTH - 776 ARBLENGTH - SSBLENGTH - DLC_MAX_SAP * SAPLENGTH -
778 DLC_MAX_STA * STALENGTH - ti->dhb_size<x>mb * NUM_DHB - 777 DLC_MAX_STA * STALENGTH - ti->dhb_size<x>mb * NUM_DHB -
779 SRBLENGTH - ASBLENGTH) / ti->rbuf_len<x>; 778 SRBLENGTH - ASBLENGTH) / ti->rbuf_len<x>;
780 */ 779 */
781 ti->maxmtu16 = (ti->rbuf_len16 - 8) * ti->rbuf_cnt16 - TR_HLEN; 780 ti->maxmtu16 = (ti->rbuf_len16 - 8) * ti->rbuf_cnt16 - TR_HLEN;
782 ti->maxmtu4 = (ti->rbuf_len4 - 8) * ti->rbuf_cnt4 - TR_HLEN; 781 ti->maxmtu4 = (ti->rbuf_len4 - 8) * ti->rbuf_cnt4 - TR_HLEN;
783 /*BMS assuming 18 bytes of Routing Information (usually works) */ 782 /*BMS assuming 18 bytes of Routing Information (usually works) */
784 DPRINTK("Maximum Receive Internet Protocol MTU 16Mbps: %d, 4Mbps: %d\n", 783 DPRINTK("Maximum Receive Internet Protocol MTU 16Mbps: %d, 4Mbps: %d\n",
785 ti->maxmtu16, ti->maxmtu4); 784 ti->maxmtu16, ti->maxmtu4);
786 785
787 dev->base_addr = PIOaddr; /* set the value for device */ 786 dev->base_addr = PIOaddr; /* set the value for device */
788 dev->mem_start = ti->sram_base << 12; 787 dev->mem_start = ti->sram_base << 12;
789 dev->mem_end = dev->mem_start + (ti->mapped_ram_size << 9) - 1; 788 dev->mem_end = dev->mem_start + (ti->mapped_ram_size << 9) - 1;
790 trdev_init(dev); 789 trdev_init(dev);
791 return 0; /* Return 0 to indicate we have found a Token Ring card. */ 790 return 0; /* Return 0 to indicate we have found a Token Ring card. */
792 } /*ibmtr_probe1() */ 791 } /*ibmtr_probe1() */
793 792
794 /*****************************************************************************/ 793 /*****************************************************************************/
795 794
796 /* query the adapter for the size of shared RAM */ 795 /* query the adapter for the size of shared RAM */
797 /* the function returns the RAM size in units of 512 bytes */ 796 /* the function returns the RAM size in units of 512 bytes */
798 797
799 static unsigned char __devinit get_sram_size(struct tok_info *adapt_info) 798 static unsigned char __devinit get_sram_size(struct tok_info *adapt_info)
800 { 799 {
801 unsigned char avail_sram_code; 800 unsigned char avail_sram_code;
802 static unsigned char size_code[] = { 0, 16, 32, 64, 127, 128 }; 801 static unsigned char size_code[] = { 0, 16, 32, 64, 127, 128 };
803 /* Adapter gives 802 /* Adapter gives
804 'F' -- use RRR bits 3,2 803 'F' -- use RRR bits 3,2
805 'E' -- 8kb 'D' -- 16kb 804 'E' -- 8kb 'D' -- 16kb
806 'C' -- 32kb 'A' -- 64KB 805 'C' -- 32kb 'A' -- 64KB
807 'B' - 64KB less 512 bytes at top 806 'B' - 64KB less 512 bytes at top
808 (WARNING ... must zero top bytes in INIT */ 807 (WARNING ... must zero top bytes in INIT */
809 808
810 avail_sram_code = 0xf - readb(adapt_info->mmio + AIPAVAILSHRAM); 809 avail_sram_code = 0xf - readb(adapt_info->mmio + AIPAVAILSHRAM);
811 if (avail_sram_code) return size_code[avail_sram_code]; 810 if (avail_sram_code) return size_code[avail_sram_code];
812 else /* for code 'F', must compute size from RRR(3,2) bits */ 811 else /* for code 'F', must compute size from RRR(3,2) bits */
813 return 1 << 812 return 1 <<
814 ((readb(adapt_info->mmio+ACA_OFFSET+ACA_RW+RRR_ODD)>>2&3)+4); 813 ((readb(adapt_info->mmio+ACA_OFFSET+ACA_RW+RRR_ODD)>>2&3)+4);
815 } 814 }
816 815
817 /*****************************************************************************/ 816 /*****************************************************************************/
818 817
819 static int __devinit trdev_init(struct net_device *dev) 818 static int __devinit trdev_init(struct net_device *dev)
820 { 819 {
821 struct tok_info *ti = netdev_priv(dev); 820 struct tok_info *ti = netdev_priv(dev);
822 821
823 SET_PAGE(ti->srb_page); 822 SET_PAGE(ti->srb_page);
824 ti->open_failure = NO ; 823 ti->open_failure = NO ;
825 dev->open = tok_open; 824 dev->open = tok_open;
826 dev->stop = tok_close; 825 dev->stop = tok_close;
827 dev->hard_start_xmit = tok_send_packet; 826 dev->hard_start_xmit = tok_send_packet;
828 dev->get_stats = tok_get_stats;
829 dev->set_multicast_list = tok_set_multicast_list; 827 dev->set_multicast_list = tok_set_multicast_list;
830 dev->change_mtu = ibmtr_change_mtu; 828 dev->change_mtu = ibmtr_change_mtu;
831 829
832 return 0; 830 return 0;
833 } 831 }
834 832
835 /*****************************************************************************/ 833 /*****************************************************************************/
836 834
837 static int tok_init_card(struct net_device *dev) 835 static int tok_init_card(struct net_device *dev)
838 { 836 {
839 struct tok_info *ti; 837 struct tok_info *ti;
840 short PIOaddr; 838 short PIOaddr;
841 unsigned long i; 839 unsigned long i;
842 840
843 PIOaddr = dev->base_addr; 841 PIOaddr = dev->base_addr;
844 ti = netdev_priv(dev); 842 ti = netdev_priv(dev);
845 /* Special processing for first interrupt after reset */ 843 /* Special processing for first interrupt after reset */
846 ti->do_tok_int = FIRST_INT; 844 ti->do_tok_int = FIRST_INT;
847 /* Reset adapter */ 845 /* Reset adapter */
848 writeb(~INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN); 846 writeb(~INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN);
849 outb(0, PIOaddr + ADAPTRESET); 847 outb(0, PIOaddr + ADAPTRESET);
850 848
851 schedule_timeout_uninterruptible(TR_RST_TIME); /* wait 50ms */ 849 schedule_timeout_uninterruptible(TR_RST_TIME); /* wait 50ms */
852 850
853 outb(0, PIOaddr + ADAPTRESETREL); 851 outb(0, PIOaddr + ADAPTRESETREL);
854 #ifdef ENABLE_PAGING 852 #ifdef ENABLE_PAGING
855 if (ti->page_mask) 853 if (ti->page_mask)
856 writeb(SRPR_ENABLE_PAGING,ti->mmio+ACA_OFFSET+ACA_RW+SRPR_EVEN); 854 writeb(SRPR_ENABLE_PAGING,ti->mmio+ACA_OFFSET+ACA_RW+SRPR_EVEN);
857 #endif 855 #endif
858 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN); 856 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
859 i = sleep_on_timeout(&ti->wait_for_reset, 4 * HZ); 857 i = sleep_on_timeout(&ti->wait_for_reset, 4 * HZ);
860 return i? 0 : -EAGAIN; 858 return i? 0 : -EAGAIN;
861 } 859 }
862 860
863 /*****************************************************************************/ 861 /*****************************************************************************/
864 static int tok_open(struct net_device *dev) 862 static int tok_open(struct net_device *dev)
865 { 863 {
866 struct tok_info *ti = netdev_priv(dev); 864 struct tok_info *ti = netdev_priv(dev);
867 int i; 865 int i;
868 866
869 /*the case we were left in a failure state during a previous open */ 867 /*the case we were left in a failure state during a previous open */
870 if (ti->open_failure == YES) { 868 if (ti->open_failure == YES) {
871 DPRINTK("Last time you were disconnected, how about now?\n"); 869 DPRINTK("Last time you were disconnected, how about now?\n");
872 printk("You can't insert with an ICS connector half-cocked.\n"); 870 printk("You can't insert with an ICS connector half-cocked.\n");
873 } 871 }
874 872
875 ti->open_status = CLOSED; /* CLOSED or OPEN */ 873 ti->open_status = CLOSED; /* CLOSED or OPEN */
876 ti->sap_status = CLOSED; /* CLOSED or OPEN */ 874 ti->sap_status = CLOSED; /* CLOSED or OPEN */
877 ti->open_failure = NO; /* NO or YES */ 875 ti->open_failure = NO; /* NO or YES */
878 ti->open_mode = MANUAL; /* MANUAL or AUTOMATIC */ 876 ti->open_mode = MANUAL; /* MANUAL or AUTOMATIC */
879 877
880 ti->sram_phys &= ~1; /* to reverse what we do in tok_close */ 878 ti->sram_phys &= ~1; /* to reverse what we do in tok_close */
881 /* init the spinlock */ 879 /* init the spinlock */
882 spin_lock_init(&ti->lock); 880 spin_lock_init(&ti->lock);
883 init_timer(&ti->tr_timer); 881 init_timer(&ti->tr_timer);
884 882
885 i = tok_init_card(dev); 883 i = tok_init_card(dev);
886 if (i) return i; 884 if (i) return i;
887 885
888 while (1){ 886 while (1){
889 tok_open_adapter((unsigned long) dev); 887 tok_open_adapter((unsigned long) dev);
890 i= interruptible_sleep_on_timeout(&ti->wait_for_reset, 25 * HZ); 888 i= interruptible_sleep_on_timeout(&ti->wait_for_reset, 25 * HZ);
891 /* sig catch: estimate opening adapter takes more than .5 sec*/ 889 /* sig catch: estimate opening adapter takes more than .5 sec*/
892 if (i>(245*HZ)/10) break; /* fancier than if (i==25*HZ) */ 890 if (i>(245*HZ)/10) break; /* fancier than if (i==25*HZ) */
893 if (i==0) break; 891 if (i==0) break;
894 if (ti->open_status == OPEN && ti->sap_status==OPEN) { 892 if (ti->open_status == OPEN && ti->sap_status==OPEN) {
895 netif_start_queue(dev); 893 netif_start_queue(dev);
896 DPRINTK("Adapter is up and running\n"); 894 DPRINTK("Adapter is up and running\n");
897 return 0; 895 return 0;
898 } 896 }
899 i=schedule_timeout_interruptible(TR_RETRY_INTERVAL); 897 i=schedule_timeout_interruptible(TR_RETRY_INTERVAL);
900 /* wait 30 seconds */ 898 /* wait 30 seconds */
901 if(i!=0) break; /*prob. a signal, like the i>24*HZ case above */ 899 if(i!=0) break; /*prob. a signal, like the i>24*HZ case above */
902 } 900 }
903 outb(0, dev->base_addr + ADAPTRESET);/* kill pending interrupts*/ 901 outb(0, dev->base_addr + ADAPTRESET);/* kill pending interrupts*/
904 DPRINTK("TERMINATED via signal\n"); /*BMS useful */ 902 DPRINTK("TERMINATED via signal\n"); /*BMS useful */
905 return -EAGAIN; 903 return -EAGAIN;
906 } 904 }
907 905
908 /*****************************************************************************/ 906 /*****************************************************************************/
909 907
910 #define COMMAND_OFST 0 908 #define COMMAND_OFST 0
911 #define OPEN_OPTIONS_OFST 8 909 #define OPEN_OPTIONS_OFST 8
912 #define NUM_RCV_BUF_OFST 24 910 #define NUM_RCV_BUF_OFST 24
913 #define RCV_BUF_LEN_OFST 26 911 #define RCV_BUF_LEN_OFST 26
914 #define DHB_LENGTH_OFST 28 912 #define DHB_LENGTH_OFST 28
915 #define NUM_DHB_OFST 30 913 #define NUM_DHB_OFST 30
916 #define DLC_MAX_SAP_OFST 32 914 #define DLC_MAX_SAP_OFST 32
917 #define DLC_MAX_STA_OFST 33 915 #define DLC_MAX_STA_OFST 33
918 916
919 static void tok_open_adapter(unsigned long dev_addr) 917 static void tok_open_adapter(unsigned long dev_addr)
920 { 918 {
921 struct net_device *dev = (struct net_device *) dev_addr; 919 struct net_device *dev = (struct net_device *) dev_addr;
922 struct tok_info *ti; 920 struct tok_info *ti;
923 int i; 921 int i;
924 922
925 ti = netdev_priv(dev); 923 ti = netdev_priv(dev);
926 SET_PAGE(ti->init_srb_page); 924 SET_PAGE(ti->init_srb_page);
927 writeb(~SRB_RESP_INT, ti->mmio + ACA_OFFSET + ACA_RESET + ISRP_ODD); 925 writeb(~SRB_RESP_INT, ti->mmio + ACA_OFFSET + ACA_RESET + ISRP_ODD);
928 for (i = 0; i < sizeof(struct dir_open_adapter); i++) 926 for (i = 0; i < sizeof(struct dir_open_adapter); i++)
929 writeb(0, ti->init_srb + i); 927 writeb(0, ti->init_srb + i);
930 writeb(DIR_OPEN_ADAPTER, ti->init_srb + COMMAND_OFST); 928 writeb(DIR_OPEN_ADAPTER, ti->init_srb + COMMAND_OFST);
931 writew(htons(OPEN_PASS_BCON_MAC), ti->init_srb + OPEN_OPTIONS_OFST); 929 writew(htons(OPEN_PASS_BCON_MAC), ti->init_srb + OPEN_OPTIONS_OFST);
932 if (ti->ring_speed == 16) { 930 if (ti->ring_speed == 16) {
933 writew(htons(ti->dhb_size16mb), ti->init_srb + DHB_LENGTH_OFST); 931 writew(htons(ti->dhb_size16mb), ti->init_srb + DHB_LENGTH_OFST);
934 writew(htons(ti->rbuf_cnt16), ti->init_srb + NUM_RCV_BUF_OFST); 932 writew(htons(ti->rbuf_cnt16), ti->init_srb + NUM_RCV_BUF_OFST);
935 writew(htons(ti->rbuf_len16), ti->init_srb + RCV_BUF_LEN_OFST); 933 writew(htons(ti->rbuf_len16), ti->init_srb + RCV_BUF_LEN_OFST);
936 } else { 934 } else {
937 writew(htons(ti->dhb_size4mb), ti->init_srb + DHB_LENGTH_OFST); 935 writew(htons(ti->dhb_size4mb), ti->init_srb + DHB_LENGTH_OFST);
938 writew(htons(ti->rbuf_cnt4), ti->init_srb + NUM_RCV_BUF_OFST); 936 writew(htons(ti->rbuf_cnt4), ti->init_srb + NUM_RCV_BUF_OFST);
939 writew(htons(ti->rbuf_len4), ti->init_srb + RCV_BUF_LEN_OFST); 937 writew(htons(ti->rbuf_len4), ti->init_srb + RCV_BUF_LEN_OFST);
940 } 938 }
941 writeb(NUM_DHB, /* always 2 */ ti->init_srb + NUM_DHB_OFST); 939 writeb(NUM_DHB, /* always 2 */ ti->init_srb + NUM_DHB_OFST);
942 writeb(DLC_MAX_SAP, ti->init_srb + DLC_MAX_SAP_OFST); 940 writeb(DLC_MAX_SAP, ti->init_srb + DLC_MAX_SAP_OFST);
943 writeb(DLC_MAX_STA, ti->init_srb + DLC_MAX_STA_OFST); 941 writeb(DLC_MAX_STA, ti->init_srb + DLC_MAX_STA_OFST);
944 ti->srb = ti->init_srb; /* We use this one in the interrupt handler */ 942 ti->srb = ti->init_srb; /* We use this one in the interrupt handler */
945 ti->srb_page = ti->init_srb_page; 943 ti->srb_page = ti->init_srb_page;
946 DPRINTK("Opening adapter: Xmit bfrs: %d X %d, Rcv bfrs: %d X %d\n", 944 DPRINTK("Opening adapter: Xmit bfrs: %d X %d, Rcv bfrs: %d X %d\n",
947 readb(ti->init_srb + NUM_DHB_OFST), 945 readb(ti->init_srb + NUM_DHB_OFST),
948 ntohs(readw(ti->init_srb + DHB_LENGTH_OFST)), 946 ntohs(readw(ti->init_srb + DHB_LENGTH_OFST)),
949 ntohs(readw(ti->init_srb + NUM_RCV_BUF_OFST)), 947 ntohs(readw(ti->init_srb + NUM_RCV_BUF_OFST)),
950 ntohs(readw(ti->init_srb + RCV_BUF_LEN_OFST))); 948 ntohs(readw(ti->init_srb + RCV_BUF_LEN_OFST)));
951 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN); 949 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
952 writeb(CMD_IN_SRB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 950 writeb(CMD_IN_SRB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
953 } 951 }
954 952
955 /*****************************************************************************/ 953 /*****************************************************************************/
956 954
957 static void open_sap(unsigned char type, struct net_device *dev) 955 static void open_sap(unsigned char type, struct net_device *dev)
958 { 956 {
959 int i; 957 int i;
960 struct tok_info *ti = netdev_priv(dev); 958 struct tok_info *ti = netdev_priv(dev);
961 959
962 SET_PAGE(ti->srb_page); 960 SET_PAGE(ti->srb_page);
963 for (i = 0; i < sizeof(struct dlc_open_sap); i++) 961 for (i = 0; i < sizeof(struct dlc_open_sap); i++)
964 writeb(0, ti->srb + i); 962 writeb(0, ti->srb + i);
965 963
966 #define MAX_I_FIELD_OFST 14 964 #define MAX_I_FIELD_OFST 14
967 #define SAP_VALUE_OFST 16 965 #define SAP_VALUE_OFST 16
968 #define SAP_OPTIONS_OFST 17 966 #define SAP_OPTIONS_OFST 17
969 #define STATION_COUNT_OFST 18 967 #define STATION_COUNT_OFST 18
970 968
971 writeb(DLC_OPEN_SAP, ti->srb + COMMAND_OFST); 969 writeb(DLC_OPEN_SAP, ti->srb + COMMAND_OFST);
972 writew(htons(MAX_I_FIELD), ti->srb + MAX_I_FIELD_OFST); 970 writew(htons(MAX_I_FIELD), ti->srb + MAX_I_FIELD_OFST);
973 writeb(SAP_OPEN_IND_SAP | SAP_OPEN_PRIORITY, ti->srb+ SAP_OPTIONS_OFST); 971 writeb(SAP_OPEN_IND_SAP | SAP_OPEN_PRIORITY, ti->srb+ SAP_OPTIONS_OFST);
974 writeb(SAP_OPEN_STATION_CNT, ti->srb + STATION_COUNT_OFST); 972 writeb(SAP_OPEN_STATION_CNT, ti->srb + STATION_COUNT_OFST);
975 writeb(type, ti->srb + SAP_VALUE_OFST); 973 writeb(type, ti->srb + SAP_VALUE_OFST);
976 writeb(CMD_IN_SRB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 974 writeb(CMD_IN_SRB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
977 } 975 }
978 976
979 977
980 /*****************************************************************************/ 978 /*****************************************************************************/
981 979
982 static void tok_set_multicast_list(struct net_device *dev) 980 static void tok_set_multicast_list(struct net_device *dev)
983 { 981 {
984 struct tok_info *ti = netdev_priv(dev); 982 struct tok_info *ti = netdev_priv(dev);
985 struct dev_mc_list *mclist; 983 struct dev_mc_list *mclist;
986 unsigned char address[4]; 984 unsigned char address[4];
987 985
988 int i; 986 int i;
989 987
990 /*BMS the next line is CRUCIAL or you may be sad when you */ 988 /*BMS the next line is CRUCIAL or you may be sad when you */
991 /*BMS ifconfig tr down or hot unplug a PCMCIA card ??hownowbrowncow*/ 989 /*BMS ifconfig tr down or hot unplug a PCMCIA card ??hownowbrowncow*/
992 if (/*BMSHELPdev->start == 0 ||*/ ti->open_status != OPEN) return; 990 if (/*BMSHELPdev->start == 0 ||*/ ti->open_status != OPEN) return;
993 address[0] = address[1] = address[2] = address[3] = 0; 991 address[0] = address[1] = address[2] = address[3] = 0;
994 mclist = dev->mc_list; 992 mclist = dev->mc_list;
995 for (i = 0; i < dev->mc_count; i++) { 993 for (i = 0; i < dev->mc_count; i++) {
996 address[0] |= mclist->dmi_addr[2]; 994 address[0] |= mclist->dmi_addr[2];
997 address[1] |= mclist->dmi_addr[3]; 995 address[1] |= mclist->dmi_addr[3];
998 address[2] |= mclist->dmi_addr[4]; 996 address[2] |= mclist->dmi_addr[4];
999 address[3] |= mclist->dmi_addr[5]; 997 address[3] |= mclist->dmi_addr[5];
1000 mclist = mclist->next; 998 mclist = mclist->next;
1001 } 999 }
1002 SET_PAGE(ti->srb_page); 1000 SET_PAGE(ti->srb_page);
1003 for (i = 0; i < sizeof(struct srb_set_funct_addr); i++) 1001 for (i = 0; i < sizeof(struct srb_set_funct_addr); i++)
1004 writeb(0, ti->srb + i); 1002 writeb(0, ti->srb + i);
1005 1003
1006 #define FUNCT_ADDRESS_OFST 6 1004 #define FUNCT_ADDRESS_OFST 6
1007 1005
1008 writeb(DIR_SET_FUNC_ADDR, ti->srb + COMMAND_OFST); 1006 writeb(DIR_SET_FUNC_ADDR, ti->srb + COMMAND_OFST);
1009 for (i = 0; i < 4; i++) 1007 for (i = 0; i < 4; i++)
1010 writeb(address[i], ti->srb + FUNCT_ADDRESS_OFST + i); 1008 writeb(address[i], ti->srb + FUNCT_ADDRESS_OFST + i);
1011 writeb(CMD_IN_SRB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 1009 writeb(CMD_IN_SRB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
1012 #if TR_VERBOSE 1010 #if TR_VERBOSE
1013 DPRINTK("Setting functional address: "); 1011 DPRINTK("Setting functional address: ");
1014 for (i=0;i<4;i++) printk("%02X ", address[i]); 1012 for (i=0;i<4;i++) printk("%02X ", address[i]);
1015 printk("\n"); 1013 printk("\n");
1016 #endif 1014 #endif
1017 } 1015 }
1018 1016
1019 /*****************************************************************************/ 1017 /*****************************************************************************/
1020 1018
1021 #define STATION_ID_OFST 4 1019 #define STATION_ID_OFST 4
1022 1020
1023 static int tok_send_packet(struct sk_buff *skb, struct net_device *dev) 1021 static int tok_send_packet(struct sk_buff *skb, struct net_device *dev)
1024 { 1022 {
1025 struct tok_info *ti; 1023 struct tok_info *ti;
1026 unsigned long flags; 1024 unsigned long flags;
1027 ti = netdev_priv(dev); 1025 ti = netdev_priv(dev);
1028 1026
1029 netif_stop_queue(dev); 1027 netif_stop_queue(dev);
1030 1028
1031 /* lock against other CPUs */ 1029 /* lock against other CPUs */
1032 spin_lock_irqsave(&(ti->lock), flags); 1030 spin_lock_irqsave(&(ti->lock), flags);
1033 1031
1034 /* Save skb; we'll need it when the adapter asks for the data */ 1032 /* Save skb; we'll need it when the adapter asks for the data */
1035 ti->current_skb = skb; 1033 ti->current_skb = skb;
1036 SET_PAGE(ti->srb_page); 1034 SET_PAGE(ti->srb_page);
1037 writeb(XMIT_UI_FRAME, ti->srb + COMMAND_OFST); 1035 writeb(XMIT_UI_FRAME, ti->srb + COMMAND_OFST);
1038 writew(ti->exsap_station_id, ti->srb + STATION_ID_OFST); 1036 writew(ti->exsap_station_id, ti->srb + STATION_ID_OFST);
1039 writeb(CMD_IN_SRB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 1037 writeb(CMD_IN_SRB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
1040 spin_unlock_irqrestore(&(ti->lock), flags); 1038 spin_unlock_irqrestore(&(ti->lock), flags);
1041 dev->trans_start = jiffies; 1039 dev->trans_start = jiffies;
1042 return 0; 1040 return 0;
1043 } 1041 }
1044 1042
1045 /*****************************************************************************/ 1043 /*****************************************************************************/
1046 1044
1047 static int tok_close(struct net_device *dev) 1045 static int tok_close(struct net_device *dev)
1048 { 1046 {
1049 struct tok_info *ti = netdev_priv(dev); 1047 struct tok_info *ti = netdev_priv(dev);
1050 1048
1051 /* Important for PCMCIA hot unplug, otherwise, we'll pull the card, */ 1049 /* Important for PCMCIA hot unplug, otherwise, we'll pull the card, */
1052 /* unloading the module from memory, and then if a timer pops, ouch */ 1050 /* unloading the module from memory, and then if a timer pops, ouch */
1053 del_timer_sync(&ti->tr_timer); 1051 del_timer_sync(&ti->tr_timer);
1054 outb(0, dev->base_addr + ADAPTRESET); 1052 outb(0, dev->base_addr + ADAPTRESET);
1055 ti->sram_phys |= 1; 1053 ti->sram_phys |= 1;
1056 ti->open_status = CLOSED; 1054 ti->open_status = CLOSED;
1057 1055
1058 netif_stop_queue(dev); 1056 netif_stop_queue(dev);
1059 DPRINTK("Adapter is closed.\n"); 1057 DPRINTK("Adapter is closed.\n");
1060 return 0; 1058 return 0;
1061 } 1059 }
1062 1060
1063 /*****************************************************************************/ 1061 /*****************************************************************************/
1064 1062
1065 #define RETCODE_OFST 2 1063 #define RETCODE_OFST 2
1066 #define OPEN_ERROR_CODE_OFST 6 1064 #define OPEN_ERROR_CODE_OFST 6
1067 #define ASB_ADDRESS_OFST 8 1065 #define ASB_ADDRESS_OFST 8
1068 #define SRB_ADDRESS_OFST 10 1066 #define SRB_ADDRESS_OFST 10
1069 #define ARB_ADDRESS_OFST 12 1067 #define ARB_ADDRESS_OFST 12
1070 #define SSB_ADDRESS_OFST 14 1068 #define SSB_ADDRESS_OFST 14
1071 1069
1072 static char *printphase[]= {"Lobe media test","Physical insertion", 1070 static char *printphase[]= {"Lobe media test","Physical insertion",
1073 "Address verification","Roll call poll","Request Parameters"}; 1071 "Address verification","Roll call poll","Request Parameters"};
1074 static char *printerror[]={"Function failure","Signal loss","Reserved", 1072 static char *printerror[]={"Function failure","Signal loss","Reserved",
1075 "Frequency error","Timeout","Ring failure","Ring beaconing", 1073 "Frequency error","Timeout","Ring failure","Ring beaconing",
1076 "Duplicate node address", 1074 "Duplicate node address",
1077 "Parameter request-retry count exceeded","Remove received", 1075 "Parameter request-retry count exceeded","Remove received",
1078 "IMPL force received","Duplicate modifier", 1076 "IMPL force received","Duplicate modifier",
1079 "No monitor detected","Monitor contention failed for RPL"}; 1077 "No monitor detected","Monitor contention failed for RPL"};
1080 1078
1081 static void __iomem *map_address(struct tok_info *ti, unsigned index, __u8 *page) 1079 static void __iomem *map_address(struct tok_info *ti, unsigned index, __u8 *page)
1082 { 1080 {
1083 if (ti->page_mask) { 1081 if (ti->page_mask) {
1084 *page = (index >> 8) & ti->page_mask; 1082 *page = (index >> 8) & ti->page_mask;
1085 index &= ~(ti->page_mask << 8); 1083 index &= ~(ti->page_mask << 8);
1086 } 1084 }
1087 return ti->sram_virt + index; 1085 return ti->sram_virt + index;
1088 } 1086 }
1089 1087
1090 static void dir_open_adapter (struct net_device *dev) 1088 static void dir_open_adapter (struct net_device *dev)
1091 { 1089 {
1092 struct tok_info *ti = netdev_priv(dev); 1090 struct tok_info *ti = netdev_priv(dev);
1093 unsigned char ret_code; 1091 unsigned char ret_code;
1094 __u16 err; 1092 __u16 err;
1095 1093
1096 ti->srb = map_address(ti, 1094 ti->srb = map_address(ti,
1097 ntohs(readw(ti->init_srb + SRB_ADDRESS_OFST)), 1095 ntohs(readw(ti->init_srb + SRB_ADDRESS_OFST)),
1098 &ti->srb_page); 1096 &ti->srb_page);
1099 ti->ssb = map_address(ti, 1097 ti->ssb = map_address(ti,
1100 ntohs(readw(ti->init_srb + SSB_ADDRESS_OFST)), 1098 ntohs(readw(ti->init_srb + SSB_ADDRESS_OFST)),
1101 &ti->ssb_page); 1099 &ti->ssb_page);
1102 ti->arb = map_address(ti, 1100 ti->arb = map_address(ti,
1103 ntohs(readw(ti->init_srb + ARB_ADDRESS_OFST)), 1101 ntohs(readw(ti->init_srb + ARB_ADDRESS_OFST)),
1104 &ti->arb_page); 1102 &ti->arb_page);
1105 ti->asb = map_address(ti, 1103 ti->asb = map_address(ti,
1106 ntohs(readw(ti->init_srb + ASB_ADDRESS_OFST)), 1104 ntohs(readw(ti->init_srb + ASB_ADDRESS_OFST)),
1107 &ti->asb_page); 1105 &ti->asb_page);
1108 ti->current_skb = NULL; 1106 ti->current_skb = NULL;
1109 ret_code = readb(ti->init_srb + RETCODE_OFST); 1107 ret_code = readb(ti->init_srb + RETCODE_OFST);
1110 err = ntohs(readw(ti->init_srb + OPEN_ERROR_CODE_OFST)); 1108 err = ntohs(readw(ti->init_srb + OPEN_ERROR_CODE_OFST));
1111 if (!ret_code) { 1109 if (!ret_code) {
1112 ti->open_status = OPEN; /* TR adapter is now available */ 1110 ti->open_status = OPEN; /* TR adapter is now available */
1113 if (ti->open_mode == AUTOMATIC) { 1111 if (ti->open_mode == AUTOMATIC) {
1114 DPRINTK("Adapter reopened.\n"); 1112 DPRINTK("Adapter reopened.\n");
1115 } 1113 }
1116 writeb(~SRB_RESP_INT, ti->mmio+ACA_OFFSET+ACA_RESET+ISRP_ODD); 1114 writeb(~SRB_RESP_INT, ti->mmio+ACA_OFFSET+ACA_RESET+ISRP_ODD);
1117 open_sap(EXTENDED_SAP, dev); 1115 open_sap(EXTENDED_SAP, dev);
1118 return; 1116 return;
1119 } 1117 }
1120 ti->open_failure = YES; 1118 ti->open_failure = YES;
1121 if (ret_code == 7){ 1119 if (ret_code == 7){
1122 if (err == 0x24) { 1120 if (err == 0x24) {
1123 if (!ti->auto_speedsave) { 1121 if (!ti->auto_speedsave) {
1124 DPRINTK("Open failed: Adapter speed must match " 1122 DPRINTK("Open failed: Adapter speed must match "
1125 "ring speed if Automatic Ring Speed Save is " 1123 "ring speed if Automatic Ring Speed Save is "
1126 "disabled.\n"); 1124 "disabled.\n");
1127 ti->open_action = FAIL; 1125 ti->open_action = FAIL;
1128 }else 1126 }else
1129 DPRINTK("Retrying open to adjust to " 1127 DPRINTK("Retrying open to adjust to "
1130 "ring speed, "); 1128 "ring speed, ");
1131 } else if (err == 0x2d) { 1129 } else if (err == 0x2d) {
1132 DPRINTK("Physical Insertion: No Monitor Detected, "); 1130 DPRINTK("Physical Insertion: No Monitor Detected, ");
1133 printk("retrying after %ds delay...\n", 1131 printk("retrying after %ds delay...\n",
1134 TR_RETRY_INTERVAL/HZ); 1132 TR_RETRY_INTERVAL/HZ);
1135 } else if (err == 0x11) { 1133 } else if (err == 0x11) {
1136 DPRINTK("Lobe Media Function Failure (0x11), "); 1134 DPRINTK("Lobe Media Function Failure (0x11), ");
1137 printk(" retrying after %ds delay...\n", 1135 printk(" retrying after %ds delay...\n",
1138 TR_RETRY_INTERVAL/HZ); 1136 TR_RETRY_INTERVAL/HZ);
1139 } else { 1137 } else {
1140 char **prphase = printphase; 1138 char **prphase = printphase;
1141 char **prerror = printerror; 1139 char **prerror = printerror;
1142 DPRINTK("TR Adapter misc open failure, error code = "); 1140 DPRINTK("TR Adapter misc open failure, error code = ");
1143 printk("0x%x, Phase: %s, Error: %s\n", 1141 printk("0x%x, Phase: %s, Error: %s\n",
1144 err, prphase[err/16 -1], prerror[err%16 -1]); 1142 err, prphase[err/16 -1], prerror[err%16 -1]);
1145 printk(" retrying after %ds delay...\n", 1143 printk(" retrying after %ds delay...\n",
1146 TR_RETRY_INTERVAL/HZ); 1144 TR_RETRY_INTERVAL/HZ);
1147 } 1145 }
1148 } else DPRINTK("open failed: ret_code = %02X..., ", ret_code); 1146 } else DPRINTK("open failed: ret_code = %02X..., ", ret_code);
1149 if (ti->open_action != FAIL) { 1147 if (ti->open_action != FAIL) {
1150 if (ti->open_mode==AUTOMATIC){ 1148 if (ti->open_mode==AUTOMATIC){
1151 ti->open_action = REOPEN; 1149 ti->open_action = REOPEN;
1152 ibmtr_reset_timer(&(ti->tr_timer), dev); 1150 ibmtr_reset_timer(&(ti->tr_timer), dev);
1153 return; 1151 return;
1154 } 1152 }
1155 wake_up(&ti->wait_for_reset); 1153 wake_up(&ti->wait_for_reset);
1156 return; 1154 return;
1157 } 1155 }
1158 DPRINTK("FAILURE, CAPUT\n"); 1156 DPRINTK("FAILURE, CAPUT\n");
1159 } 1157 }
1160 1158
1161 /******************************************************************************/ 1159 /******************************************************************************/
1162 1160
1163 static irqreturn_t tok_interrupt(int irq, void *dev_id) 1161 static irqreturn_t tok_interrupt(int irq, void *dev_id)
1164 { 1162 {
1165 unsigned char status; 1163 unsigned char status;
1166 /* unsigned char status_even ; */ 1164 /* unsigned char status_even ; */
1167 struct tok_info *ti; 1165 struct tok_info *ti;
1168 struct net_device *dev; 1166 struct net_device *dev;
1169 #ifdef ENABLE_PAGING 1167 #ifdef ENABLE_PAGING
1170 unsigned char save_srpr; 1168 unsigned char save_srpr;
1171 #endif 1169 #endif
1172 1170
1173 dev = dev_id; 1171 dev = dev_id;
1174 #if TR_VERBOSE 1172 #if TR_VERBOSE
1175 DPRINTK("Int from tok_driver, dev : %p irq%d\n", dev,irq); 1173 DPRINTK("Int from tok_driver, dev : %p irq%d\n", dev,irq);
1176 #endif 1174 #endif
1177 ti = netdev_priv(dev); 1175 ti = netdev_priv(dev);
1178 if (ti->sram_phys & 1) 1176 if (ti->sram_phys & 1)
1179 return IRQ_NONE; /* PCMCIA card extraction flag */ 1177 return IRQ_NONE; /* PCMCIA card extraction flag */
1180 spin_lock(&(ti->lock)); 1178 spin_lock(&(ti->lock));
1181 #ifdef ENABLE_PAGING 1179 #ifdef ENABLE_PAGING
1182 save_srpr = readb(ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN); 1180 save_srpr = readb(ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN);
1183 #endif 1181 #endif
1184 1182
1185 /* Disable interrupts till processing is finished */ 1183 /* Disable interrupts till processing is finished */
1186 writeb((~INT_ENABLE), ti->mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN); 1184 writeb((~INT_ENABLE), ti->mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN);
1187 1185
1188 /* Reset interrupt for ISA boards */ 1186 /* Reset interrupt for ISA boards */
1189 if (ti->adapter_int_enable) 1187 if (ti->adapter_int_enable)
1190 outb(0, ti->adapter_int_enable); 1188 outb(0, ti->adapter_int_enable);
1191 else /* used for PCMCIA cards */ 1189 else /* used for PCMCIA cards */
1192 outb(0, ti->global_int_enable); 1190 outb(0, ti->global_int_enable);
1193 if (ti->do_tok_int == FIRST_INT){ 1191 if (ti->do_tok_int == FIRST_INT){
1194 initial_tok_int(dev); 1192 initial_tok_int(dev);
1195 #ifdef ENABLE_PAGING 1193 #ifdef ENABLE_PAGING
1196 writeb(save_srpr, ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN); 1194 writeb(save_srpr, ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN);
1197 #endif 1195 #endif
1198 spin_unlock(&(ti->lock)); 1196 spin_unlock(&(ti->lock));
1199 return IRQ_HANDLED; 1197 return IRQ_HANDLED;
1200 } 1198 }
1201 /* Begin interrupt handler HERE inline to avoid the extra 1199 /* Begin interrupt handler HERE inline to avoid the extra
1202 levels of logic and call depth for the original solution. */ 1200 levels of logic and call depth for the original solution. */
1203 status = readb(ti->mmio + ACA_OFFSET + ACA_RW + ISRP_ODD); 1201 status = readb(ti->mmio + ACA_OFFSET + ACA_RW + ISRP_ODD);
1204 /*BMSstatus_even = readb (ti->mmio + ACA_OFFSET + ACA_RW + ISRP_EVEN) */ 1202 /*BMSstatus_even = readb (ti->mmio + ACA_OFFSET + ACA_RW + ISRP_EVEN) */
1205 /*BMSdebugprintk("tok_interrupt: ISRP_ODD = 0x%x ISRP_EVEN = 0x%x\n", */ 1203 /*BMSdebugprintk("tok_interrupt: ISRP_ODD = 0x%x ISRP_EVEN = 0x%x\n", */
1206 /*BMS status,status_even); */ 1204 /*BMS status,status_even); */
1207 1205
1208 if (status & ADAP_CHK_INT) { 1206 if (status & ADAP_CHK_INT) {
1209 int i; 1207 int i;
1210 void __iomem *check_reason; 1208 void __iomem *check_reason;
1211 __u8 check_reason_page = 0; 1209 __u8 check_reason_page = 0;
1212 check_reason = map_address(ti, 1210 check_reason = map_address(ti,
1213 ntohs(readw(ti->mmio+ ACA_OFFSET+ACA_RW + WWCR_EVEN)), 1211 ntohs(readw(ti->mmio+ ACA_OFFSET+ACA_RW + WWCR_EVEN)),
1214 &check_reason_page); 1212 &check_reason_page);
1215 SET_PAGE(check_reason_page); 1213 SET_PAGE(check_reason_page);
1216 1214
1217 DPRINTK("Adapter check interrupt\n"); 1215 DPRINTK("Adapter check interrupt\n");
1218 DPRINTK("8 reason bytes follow: "); 1216 DPRINTK("8 reason bytes follow: ");
1219 for (i = 0; i < 8; i++, check_reason++) 1217 for (i = 0; i < 8; i++, check_reason++)
1220 printk("%02X ", (int) readb(check_reason)); 1218 printk("%02X ", (int) readb(check_reason));
1221 printk("\n"); 1219 printk("\n");
1222 writeb(~ADAP_CHK_INT, ti->mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD); 1220 writeb(~ADAP_CHK_INT, ti->mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD);
1223 status = readb(ti->mmio + ACA_OFFSET + ACA_RW + ISRA_EVEN); 1221 status = readb(ti->mmio + ACA_OFFSET + ACA_RW + ISRA_EVEN);
1224 DPRINTK("ISRA_EVEN == 0x02%x\n",status); 1222 DPRINTK("ISRA_EVEN == 0x02%x\n",status);
1225 ti->open_status = CLOSED; 1223 ti->open_status = CLOSED;
1226 ti->sap_status = CLOSED; 1224 ti->sap_status = CLOSED;
1227 ti->open_mode = AUTOMATIC; 1225 ti->open_mode = AUTOMATIC;
1228 netif_carrier_off(dev); 1226 netif_carrier_off(dev);
1229 netif_stop_queue(dev); 1227 netif_stop_queue(dev);
1230 ti->open_action = RESTART; 1228 ti->open_action = RESTART;
1231 outb(0, dev->base_addr + ADAPTRESET); 1229 outb(0, dev->base_addr + ADAPTRESET);
1232 ibmtr_reset_timer(&(ti->tr_timer), dev);/*BMS try to reopen*/ 1230 ibmtr_reset_timer(&(ti->tr_timer), dev);/*BMS try to reopen*/
1233 spin_unlock(&(ti->lock)); 1231 spin_unlock(&(ti->lock));
1234 return IRQ_HANDLED; 1232 return IRQ_HANDLED;
1235 } 1233 }
1236 if (readb(ti->mmio + ACA_OFFSET + ACA_RW + ISRP_EVEN) 1234 if (readb(ti->mmio + ACA_OFFSET + ACA_RW + ISRP_EVEN)
1237 & (TCR_INT | ERR_INT | ACCESS_INT)) { 1235 & (TCR_INT | ERR_INT | ACCESS_INT)) {
1238 DPRINTK("adapter error: ISRP_EVEN : %02x\n", 1236 DPRINTK("adapter error: ISRP_EVEN : %02x\n",
1239 (int)readb(ti->mmio+ ACA_OFFSET + ACA_RW + ISRP_EVEN)); 1237 (int)readb(ti->mmio+ ACA_OFFSET + ACA_RW + ISRP_EVEN));
1240 writeb(~(TCR_INT | ERR_INT | ACCESS_INT), 1238 writeb(~(TCR_INT | ERR_INT | ACCESS_INT),
1241 ti->mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN); 1239 ti->mmio + ACA_OFFSET + ACA_RESET + ISRP_EVEN);
1242 status= readb(ti->mmio+ ACA_OFFSET + ACA_RW + ISRA_EVEN);/*BMS*/ 1240 status= readb(ti->mmio+ ACA_OFFSET + ACA_RW + ISRA_EVEN);/*BMS*/
1243 DPRINTK("ISRA_EVEN == 0x02%x\n",status);/*BMS*/ 1241 DPRINTK("ISRA_EVEN == 0x02%x\n",status);/*BMS*/
1244 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN); 1242 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
1245 #ifdef ENABLE_PAGING 1243 #ifdef ENABLE_PAGING
1246 writeb(save_srpr, ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN); 1244 writeb(save_srpr, ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN);
1247 #endif 1245 #endif
1248 spin_unlock(&(ti->lock)); 1246 spin_unlock(&(ti->lock));
1249 return IRQ_HANDLED; 1247 return IRQ_HANDLED;
1250 } 1248 }
1251 if (status & SRB_RESP_INT) { /* SRB response */ 1249 if (status & SRB_RESP_INT) { /* SRB response */
1252 SET_PAGE(ti->srb_page); 1250 SET_PAGE(ti->srb_page);
1253 #if TR_VERBOSE 1251 #if TR_VERBOSE
1254 DPRINTK("SRB resp: cmd=%02X rsp=%02X\n", 1252 DPRINTK("SRB resp: cmd=%02X rsp=%02X\n",
1255 readb(ti->srb), readb(ti->srb + RETCODE_OFST)); 1253 readb(ti->srb), readb(ti->srb + RETCODE_OFST));
1256 #endif 1254 #endif
1257 switch (readb(ti->srb)) { /* SRB command check */ 1255 switch (readb(ti->srb)) { /* SRB command check */
1258 case XMIT_DIR_FRAME:{ 1256 case XMIT_DIR_FRAME:{
1259 unsigned char xmit_ret_code; 1257 unsigned char xmit_ret_code;
1260 xmit_ret_code = readb(ti->srb + RETCODE_OFST); 1258 xmit_ret_code = readb(ti->srb + RETCODE_OFST);
1261 if (xmit_ret_code == 0xff) break; 1259 if (xmit_ret_code == 0xff) break;
1262 DPRINTK("error on xmit_dir_frame request: %02X\n", 1260 DPRINTK("error on xmit_dir_frame request: %02X\n",
1263 xmit_ret_code); 1261 xmit_ret_code);
1264 if (ti->current_skb) { 1262 if (ti->current_skb) {
1265 dev_kfree_skb_irq(ti->current_skb); 1263 dev_kfree_skb_irq(ti->current_skb);
1266 ti->current_skb = NULL; 1264 ti->current_skb = NULL;
1267 } 1265 }
1268 /*dev->tbusy = 0;*/ 1266 /*dev->tbusy = 0;*/
1269 netif_wake_queue(dev); 1267 netif_wake_queue(dev);
1270 if (ti->readlog_pending) 1268 if (ti->readlog_pending)
1271 ibmtr_readlog(dev); 1269 ibmtr_readlog(dev);
1272 break; 1270 break;
1273 } 1271 }
1274 case XMIT_UI_FRAME:{ 1272 case XMIT_UI_FRAME:{
1275 unsigned char xmit_ret_code; 1273 unsigned char xmit_ret_code;
1276 1274
1277 xmit_ret_code = readb(ti->srb + RETCODE_OFST); 1275 xmit_ret_code = readb(ti->srb + RETCODE_OFST);
1278 if (xmit_ret_code == 0xff) break; 1276 if (xmit_ret_code == 0xff) break;
1279 DPRINTK("error on xmit_ui_frame request: %02X\n", 1277 DPRINTK("error on xmit_ui_frame request: %02X\n",
1280 xmit_ret_code); 1278 xmit_ret_code);
1281 if (ti->current_skb) { 1279 if (ti->current_skb) {
1282 dev_kfree_skb_irq(ti->current_skb); 1280 dev_kfree_skb_irq(ti->current_skb);
1283 ti->current_skb = NULL; 1281 ti->current_skb = NULL;
1284 } 1282 }
1285 netif_wake_queue(dev); 1283 netif_wake_queue(dev);
1286 if (ti->readlog_pending) 1284 if (ti->readlog_pending)
1287 ibmtr_readlog(dev); 1285 ibmtr_readlog(dev);
1288 break; 1286 break;
1289 } 1287 }
1290 case DIR_OPEN_ADAPTER: 1288 case DIR_OPEN_ADAPTER:
1291 dir_open_adapter(dev); 1289 dir_open_adapter(dev);
1292 break; 1290 break;
1293 case DLC_OPEN_SAP: 1291 case DLC_OPEN_SAP:
1294 if (readb(ti->srb + RETCODE_OFST)) { 1292 if (readb(ti->srb + RETCODE_OFST)) {
1295 DPRINTK("open_sap failed: ret_code = %02X, " 1293 DPRINTK("open_sap failed: ret_code = %02X, "
1296 "retrying\n", 1294 "retrying\n",
1297 (int) readb(ti->srb + RETCODE_OFST)); 1295 (int) readb(ti->srb + RETCODE_OFST));
1298 ti->open_action = REOPEN; 1296 ti->open_action = REOPEN;
1299 ibmtr_reset_timer(&(ti->tr_timer), dev); 1297 ibmtr_reset_timer(&(ti->tr_timer), dev);
1300 break; 1298 break;
1301 } 1299 }
1302 ti->exsap_station_id = readw(ti->srb + STATION_ID_OFST); 1300 ti->exsap_station_id = readw(ti->srb + STATION_ID_OFST);
1303 ti->sap_status = OPEN;/* TR adapter is now available */ 1301 ti->sap_status = OPEN;/* TR adapter is now available */
1304 if (ti->open_mode==MANUAL){ 1302 if (ti->open_mode==MANUAL){
1305 wake_up(&ti->wait_for_reset); 1303 wake_up(&ti->wait_for_reset);
1306 break; 1304 break;
1307 } 1305 }
1308 netif_wake_queue(dev); 1306 netif_wake_queue(dev);
1309 netif_carrier_on(dev); 1307 netif_carrier_on(dev);
1310 break; 1308 break;
1311 case DIR_INTERRUPT: 1309 case DIR_INTERRUPT:
1312 case DIR_MOD_OPEN_PARAMS: 1310 case DIR_MOD_OPEN_PARAMS:
1313 case DIR_SET_GRP_ADDR: 1311 case DIR_SET_GRP_ADDR:
1314 case DIR_SET_FUNC_ADDR: 1312 case DIR_SET_FUNC_ADDR:
1315 case DLC_CLOSE_SAP: 1313 case DLC_CLOSE_SAP:
1316 if (readb(ti->srb + RETCODE_OFST)) 1314 if (readb(ti->srb + RETCODE_OFST))
1317 DPRINTK("error on %02X: %02X\n", 1315 DPRINTK("error on %02X: %02X\n",
1318 (int) readb(ti->srb + COMMAND_OFST), 1316 (int) readb(ti->srb + COMMAND_OFST),
1319 (int) readb(ti->srb + RETCODE_OFST)); 1317 (int) readb(ti->srb + RETCODE_OFST));
1320 break; 1318 break;
1321 case DIR_READ_LOG: 1319 case DIR_READ_LOG:
1322 if (readb(ti->srb + RETCODE_OFST)){ 1320 if (readb(ti->srb + RETCODE_OFST)){
1323 DPRINTK("error on dir_read_log: %02X\n", 1321 DPRINTK("error on dir_read_log: %02X\n",
1324 (int) readb(ti->srb + RETCODE_OFST)); 1322 (int) readb(ti->srb + RETCODE_OFST));
1325 netif_wake_queue(dev); 1323 netif_wake_queue(dev);
1326 break; 1324 break;
1327 } 1325 }
1328 #if IBMTR_DEBUG_MESSAGES 1326 #if IBMTR_DEBUG_MESSAGES
1329 1327
1330 #define LINE_ERRORS_OFST 0 1328 #define LINE_ERRORS_OFST 0
1331 #define INTERNAL_ERRORS_OFST 1 1329 #define INTERNAL_ERRORS_OFST 1
1332 #define BURST_ERRORS_OFST 2 1330 #define BURST_ERRORS_OFST 2
1333 #define AC_ERRORS_OFST 3 1331 #define AC_ERRORS_OFST 3
1334 #define ABORT_DELIMITERS_OFST 4 1332 #define ABORT_DELIMITERS_OFST 4
1335 #define LOST_FRAMES_OFST 6 1333 #define LOST_FRAMES_OFST 6
1336 #define RECV_CONGEST_COUNT_OFST 7 1334 #define RECV_CONGEST_COUNT_OFST 7
1337 #define FRAME_COPIED_ERRORS_OFST 8 1335 #define FRAME_COPIED_ERRORS_OFST 8
1338 #define FREQUENCY_ERRORS_OFST 9 1336 #define FREQUENCY_ERRORS_OFST 9
1339 #define TOKEN_ERRORS_OFST 10 1337 #define TOKEN_ERRORS_OFST 10
1340 1338
1341 DPRINTK("Line errors %02X, Internal errors %02X, " 1339 DPRINTK("Line errors %02X, Internal errors %02X, "
1342 "Burst errors %02X\n" "A/C errors %02X, " 1340 "Burst errors %02X\n" "A/C errors %02X, "
1343 "Abort delimiters %02X, Lost frames %02X\n" 1341 "Abort delimiters %02X, Lost frames %02X\n"
1344 "Receive congestion count %02X, " 1342 "Receive congestion count %02X, "
1345 "Frame copied errors %02X\nFrequency errors %02X, " 1343 "Frame copied errors %02X\nFrequency errors %02X, "
1346 "Token errors %02X\n", 1344 "Token errors %02X\n",
1347 (int) readb(ti->srb + LINE_ERRORS_OFST), 1345 (int) readb(ti->srb + LINE_ERRORS_OFST),
1348 (int) readb(ti->srb + INTERNAL_ERRORS_OFST), 1346 (int) readb(ti->srb + INTERNAL_ERRORS_OFST),
1349 (int) readb(ti->srb + BURST_ERRORS_OFST), 1347 (int) readb(ti->srb + BURST_ERRORS_OFST),
1350 (int) readb(ti->srb + AC_ERRORS_OFST), 1348 (int) readb(ti->srb + AC_ERRORS_OFST),
1351 (int) readb(ti->srb + ABORT_DELIMITERS_OFST), 1349 (int) readb(ti->srb + ABORT_DELIMITERS_OFST),
1352 (int) readb(ti->srb + LOST_FRAMES_OFST), 1350 (int) readb(ti->srb + LOST_FRAMES_OFST),
1353 (int) readb(ti->srb + RECV_CONGEST_COUNT_OFST), 1351 (int) readb(ti->srb + RECV_CONGEST_COUNT_OFST),
1354 (int) readb(ti->srb + FRAME_COPIED_ERRORS_OFST), 1352 (int) readb(ti->srb + FRAME_COPIED_ERRORS_OFST),
1355 (int) readb(ti->srb + FREQUENCY_ERRORS_OFST), 1353 (int) readb(ti->srb + FREQUENCY_ERRORS_OFST),
1356 (int) readb(ti->srb + TOKEN_ERRORS_OFST)); 1354 (int) readb(ti->srb + TOKEN_ERRORS_OFST));
1357 #endif 1355 #endif
1358 netif_wake_queue(dev); 1356 netif_wake_queue(dev);
1359 break; 1357 break;
1360 default: 1358 default:
1361 DPRINTK("Unknown command %02X encountered\n", 1359 DPRINTK("Unknown command %02X encountered\n",
1362 (int) readb(ti->srb)); 1360 (int) readb(ti->srb));
1363 } /* end switch SRB command check */ 1361 } /* end switch SRB command check */
1364 writeb(~SRB_RESP_INT, ti->mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD); 1362 writeb(~SRB_RESP_INT, ti->mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD);
1365 } /* if SRB response */ 1363 } /* if SRB response */
1366 if (status & ASB_FREE_INT) { /* ASB response */ 1364 if (status & ASB_FREE_INT) { /* ASB response */
1367 SET_PAGE(ti->asb_page); 1365 SET_PAGE(ti->asb_page);
1368 #if TR_VERBOSE 1366 #if TR_VERBOSE
1369 DPRINTK("ASB resp: cmd=%02X\n", readb(ti->asb)); 1367 DPRINTK("ASB resp: cmd=%02X\n", readb(ti->asb));
1370 #endif 1368 #endif
1371 1369
1372 switch (readb(ti->asb)) { /* ASB command check */ 1370 switch (readb(ti->asb)) { /* ASB command check */
1373 case REC_DATA: 1371 case REC_DATA:
1374 case XMIT_UI_FRAME: 1372 case XMIT_UI_FRAME:
1375 case XMIT_DIR_FRAME: 1373 case XMIT_DIR_FRAME:
1376 break; 1374 break;
1377 default: 1375 default:
1378 DPRINTK("unknown command in asb %02X\n", 1376 DPRINTK("unknown command in asb %02X\n",
1379 (int) readb(ti->asb)); 1377 (int) readb(ti->asb));
1380 } /* switch ASB command check */ 1378 } /* switch ASB command check */
1381 if (readb(ti->asb + 2) != 0xff) /* checks ret_code */ 1379 if (readb(ti->asb + 2) != 0xff) /* checks ret_code */
1382 DPRINTK("ASB error %02X in cmd %02X\n", 1380 DPRINTK("ASB error %02X in cmd %02X\n",
1383 (int) readb(ti->asb + 2), (int) readb(ti->asb)); 1381 (int) readb(ti->asb + 2), (int) readb(ti->asb));
1384 writeb(~ASB_FREE_INT, ti->mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD); 1382 writeb(~ASB_FREE_INT, ti->mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD);
1385 } /* if ASB response */ 1383 } /* if ASB response */
1386 1384
1387 #define STATUS_OFST 6 1385 #define STATUS_OFST 6
1388 #define NETW_STATUS_OFST 6 1386 #define NETW_STATUS_OFST 6
1389 1387
1390 if (status & ARB_CMD_INT) { /* ARB response */ 1388 if (status & ARB_CMD_INT) { /* ARB response */
1391 SET_PAGE(ti->arb_page); 1389 SET_PAGE(ti->arb_page);
1392 #if TR_VERBOSE 1390 #if TR_VERBOSE
1393 DPRINTK("ARB resp: cmd=%02X\n", readb(ti->arb)); 1391 DPRINTK("ARB resp: cmd=%02X\n", readb(ti->arb));
1394 #endif 1392 #endif
1395 1393
1396 switch (readb(ti->arb)) { /* ARB command check */ 1394 switch (readb(ti->arb)) { /* ARB command check */
1397 case DLC_STATUS: 1395 case DLC_STATUS:
1398 DPRINTK("DLC_STATUS new status: %02X on station %02X\n", 1396 DPRINTK("DLC_STATUS new status: %02X on station %02X\n",
1399 ntohs(readw(ti->arb + STATUS_OFST)), 1397 ntohs(readw(ti->arb + STATUS_OFST)),
1400 ntohs(readw(ti->arb+ STATION_ID_OFST))); 1398 ntohs(readw(ti->arb+ STATION_ID_OFST)));
1401 break; 1399 break;
1402 case REC_DATA: 1400 case REC_DATA:
1403 tr_rx(dev); 1401 tr_rx(dev);
1404 break; 1402 break;
1405 case RING_STAT_CHANGE:{ 1403 case RING_STAT_CHANGE:{
1406 unsigned short ring_status; 1404 unsigned short ring_status;
1407 ring_status= ntohs(readw(ti->arb + NETW_STATUS_OFST)); 1405 ring_status= ntohs(readw(ti->arb + NETW_STATUS_OFST));
1408 if (ibmtr_debug_trace & TRC_INIT) 1406 if (ibmtr_debug_trace & TRC_INIT)
1409 DPRINTK("Ring Status Change...(0x%x)\n", 1407 DPRINTK("Ring Status Change...(0x%x)\n",
1410 ring_status); 1408 ring_status);
1411 if(ring_status& (REMOVE_RECV|AUTO_REMOVAL|LOBE_FAULT)){ 1409 if(ring_status& (REMOVE_RECV|AUTO_REMOVAL|LOBE_FAULT)){
1412 netif_stop_queue(dev); 1410 netif_stop_queue(dev);
1413 netif_carrier_off(dev); 1411 netif_carrier_off(dev);
1414 DPRINTK("Remove received, or Auto-removal error" 1412 DPRINTK("Remove received, or Auto-removal error"
1415 ", or Lobe fault\n"); 1413 ", or Lobe fault\n");
1416 DPRINTK("We'll try to reopen the closed adapter" 1414 DPRINTK("We'll try to reopen the closed adapter"
1417 " after a %d second delay.\n", 1415 " after a %d second delay.\n",
1418 TR_RETRY_INTERVAL/HZ); 1416 TR_RETRY_INTERVAL/HZ);
1419 /*I was confused: I saw the TR reopening but */ 1417 /*I was confused: I saw the TR reopening but */
1420 /*forgot:with an RJ45 in an RJ45/ICS adapter */ 1418 /*forgot:with an RJ45 in an RJ45/ICS adapter */
1421 /*but adapter not in the ring, the TR will */ 1419 /*but adapter not in the ring, the TR will */
1422 /* open, and then soon close and come here. */ 1420 /* open, and then soon close and come here. */
1423 ti->open_mode = AUTOMATIC; 1421 ti->open_mode = AUTOMATIC;
1424 ti->open_status = CLOSED; /*12/2000 BMS*/ 1422 ti->open_status = CLOSED; /*12/2000 BMS*/
1425 ti->open_action = REOPEN; 1423 ti->open_action = REOPEN;
1426 ibmtr_reset_timer(&(ti->tr_timer), dev); 1424 ibmtr_reset_timer(&(ti->tr_timer), dev);
1427 } else if (ring_status & LOG_OVERFLOW) { 1425 } else if (ring_status & LOG_OVERFLOW) {
1428 if(netif_queue_stopped(dev)) 1426 if(netif_queue_stopped(dev))
1429 ti->readlog_pending = 1; 1427 ti->readlog_pending = 1;
1430 else 1428 else
1431 ibmtr_readlog(dev); 1429 ibmtr_readlog(dev);
1432 } 1430 }
1433 break; 1431 break;
1434 } 1432 }
1435 case XMIT_DATA_REQ: 1433 case XMIT_DATA_REQ:
1436 tr_tx(dev); 1434 tr_tx(dev);
1437 break; 1435 break;
1438 default: 1436 default:
1439 DPRINTK("Unknown command %02X in arb\n", 1437 DPRINTK("Unknown command %02X in arb\n",
1440 (int) readb(ti->arb)); 1438 (int) readb(ti->arb));
1441 break; 1439 break;
1442 } /* switch ARB command check */ 1440 } /* switch ARB command check */
1443 writeb(~ARB_CMD_INT, ti->mmio+ ACA_OFFSET+ACA_RESET + ISRP_ODD); 1441 writeb(~ARB_CMD_INT, ti->mmio+ ACA_OFFSET+ACA_RESET + ISRP_ODD);
1444 writeb(ARB_FREE, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 1442 writeb(ARB_FREE, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
1445 } /* if ARB response */ 1443 } /* if ARB response */
1446 if (status & SSB_RESP_INT) { /* SSB response */ 1444 if (status & SSB_RESP_INT) { /* SSB response */
1447 unsigned char retcode; 1445 unsigned char retcode;
1448 SET_PAGE(ti->ssb_page); 1446 SET_PAGE(ti->ssb_page);
1449 #if TR_VERBOSE 1447 #if TR_VERBOSE
1450 DPRINTK("SSB resp: cmd=%02X rsp=%02X\n", 1448 DPRINTK("SSB resp: cmd=%02X rsp=%02X\n",
1451 readb(ti->ssb), readb(ti->ssb + 2)); 1449 readb(ti->ssb), readb(ti->ssb + 2));
1452 #endif 1450 #endif
1453 1451
1454 switch (readb(ti->ssb)) { /* SSB command check */ 1452 switch (readb(ti->ssb)) { /* SSB command check */
1455 case XMIT_DIR_FRAME: 1453 case XMIT_DIR_FRAME:
1456 case XMIT_UI_FRAME: 1454 case XMIT_UI_FRAME:
1457 retcode = readb(ti->ssb + 2); 1455 retcode = readb(ti->ssb + 2);
1458 if (retcode && (retcode != 0x22))/* checks ret_code */ 1456 if (retcode && (retcode != 0x22))/* checks ret_code */
1459 DPRINTK("xmit ret_code: %02X xmit error code: " 1457 DPRINTK("xmit ret_code: %02X xmit error code: "
1460 "%02X\n", 1458 "%02X\n",
1461 (int)retcode, (int)readb(ti->ssb + 6)); 1459 (int)retcode, (int)readb(ti->ssb + 6));
1462 else 1460 else
1463 ti->tr_stats.tx_packets++; 1461 dev->stats.tx_packets++;
1464 break; 1462 break;
1465 case XMIT_XID_CMD: 1463 case XMIT_XID_CMD:
1466 DPRINTK("xmit xid ret_code: %02X\n", 1464 DPRINTK("xmit xid ret_code: %02X\n",
1467 (int) readb(ti->ssb + 2)); 1465 (int) readb(ti->ssb + 2));
1468 default: 1466 default:
1469 DPRINTK("Unknown command %02X in ssb\n", 1467 DPRINTK("Unknown command %02X in ssb\n",
1470 (int) readb(ti->ssb)); 1468 (int) readb(ti->ssb));
1471 } /* SSB command check */ 1469 } /* SSB command check */
1472 writeb(~SSB_RESP_INT, ti->mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD); 1470 writeb(~SSB_RESP_INT, ti->mmio+ ACA_OFFSET+ACA_RESET+ ISRP_ODD);
1473 writeb(SSB_FREE, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 1471 writeb(SSB_FREE, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
1474 } /* if SSB response */ 1472 } /* if SSB response */
1475 #ifdef ENABLE_PAGING 1473 #ifdef ENABLE_PAGING
1476 writeb(save_srpr, ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN); 1474 writeb(save_srpr, ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN);
1477 #endif 1475 #endif
1478 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN); 1476 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
1479 spin_unlock(&(ti->lock)); 1477 spin_unlock(&(ti->lock));
1480 return IRQ_HANDLED; 1478 return IRQ_HANDLED;
1481 } /*tok_interrupt */ 1479 } /*tok_interrupt */
1482 1480
1483 /*****************************************************************************/ 1481 /*****************************************************************************/
1484 1482
1485 #define INIT_STATUS_OFST 1 1483 #define INIT_STATUS_OFST 1
1486 #define INIT_STATUS_2_OFST 2 1484 #define INIT_STATUS_2_OFST 2
1487 #define ENCODED_ADDRESS_OFST 8 1485 #define ENCODED_ADDRESS_OFST 8
1488 1486
1489 static void initial_tok_int(struct net_device *dev) 1487 static void initial_tok_int(struct net_device *dev)
1490 { 1488 {
1491 1489
1492 __u32 encoded_addr, hw_encoded_addr; 1490 __u32 encoded_addr, hw_encoded_addr;
1493 struct tok_info *ti; 1491 struct tok_info *ti;
1494 unsigned char init_status; /*BMS 12/2000*/ 1492 unsigned char init_status; /*BMS 12/2000*/
1495 1493
1496 ti = netdev_priv(dev); 1494 ti = netdev_priv(dev);
1497 1495
1498 ti->do_tok_int = NOT_FIRST; 1496 ti->do_tok_int = NOT_FIRST;
1499 1497
1500 /* we assign the shared-ram address for ISA devices */ 1498 /* we assign the shared-ram address for ISA devices */
1501 writeb(ti->sram_base, ti->mmio + ACA_OFFSET + ACA_RW + RRR_EVEN); 1499 writeb(ti->sram_base, ti->mmio + ACA_OFFSET + ACA_RW + RRR_EVEN);
1502 #ifndef PCMCIA 1500 #ifndef PCMCIA
1503 ti->sram_virt = ioremap(((__u32)ti->sram_base << 12), ti->avail_shared_ram); 1501 ti->sram_virt = ioremap(((__u32)ti->sram_base << 12), ti->avail_shared_ram);
1504 #endif 1502 #endif
1505 ti->init_srb = map_address(ti, 1503 ti->init_srb = map_address(ti,
1506 ntohs(readw(ti->mmio + ACA_OFFSET + WRBR_EVEN)), 1504 ntohs(readw(ti->mmio + ACA_OFFSET + WRBR_EVEN)),
1507 &ti->init_srb_page); 1505 &ti->init_srb_page);
1508 if (ti->page_mask && ti->avail_shared_ram == 127) { 1506 if (ti->page_mask && ti->avail_shared_ram == 127) {
1509 void __iomem *last_512; 1507 void __iomem *last_512;
1510 __u8 last_512_page=0; 1508 __u8 last_512_page=0;
1511 int i; 1509 int i;
1512 last_512 = map_address(ti, 0xfe00, &last_512_page); 1510 last_512 = map_address(ti, 0xfe00, &last_512_page);
1513 /* initialize high section of ram (if necessary) */ 1511 /* initialize high section of ram (if necessary) */
1514 SET_PAGE(last_512_page); 1512 SET_PAGE(last_512_page);
1515 for (i = 0; i < 512; i++) 1513 for (i = 0; i < 512; i++)
1516 writeb(0, last_512 + i); 1514 writeb(0, last_512 + i);
1517 } 1515 }
1518 SET_PAGE(ti->init_srb_page); 1516 SET_PAGE(ti->init_srb_page);
1519 1517
1520 #if TR_VERBOSE 1518 #if TR_VERBOSE
1521 { 1519 {
1522 int i; 1520 int i;
1523 1521
1524 DPRINTK("ti->init_srb_page=0x%x\n", ti->init_srb_page); 1522 DPRINTK("ti->init_srb_page=0x%x\n", ti->init_srb_page);
1525 DPRINTK("init_srb(%p):", ti->init_srb ); 1523 DPRINTK("init_srb(%p):", ti->init_srb );
1526 for (i = 0; i < 20; i++) 1524 for (i = 0; i < 20; i++)
1527 printk("%02X ", (int) readb(ti->init_srb + i)); 1525 printk("%02X ", (int) readb(ti->init_srb + i));
1528 printk("\n"); 1526 printk("\n");
1529 } 1527 }
1530 #endif 1528 #endif
1531 1529
1532 hw_encoded_addr = readw(ti->init_srb + ENCODED_ADDRESS_OFST); 1530 hw_encoded_addr = readw(ti->init_srb + ENCODED_ADDRESS_OFST);
1533 encoded_addr = ntohs(hw_encoded_addr); 1531 encoded_addr = ntohs(hw_encoded_addr);
1534 init_status= /*BMS 12/2000 check for shallow mode possibility (Turbo)*/ 1532 init_status= /*BMS 12/2000 check for shallow mode possibility (Turbo)*/
1535 readb(ti->init_srb+offsetof(struct srb_init_response,init_status)); 1533 readb(ti->init_srb+offsetof(struct srb_init_response,init_status));
1536 /*printk("Initial interrupt: init_status= 0x%02x\n",init_status);*/ 1534 /*printk("Initial interrupt: init_status= 0x%02x\n",init_status);*/
1537 ti->ring_speed = init_status & 0x01 ? 16 : 4; 1535 ti->ring_speed = init_status & 0x01 ? 16 : 4;
1538 DPRINTK("Initial interrupt : %d Mbps, shared RAM base %08x.\n", 1536 DPRINTK("Initial interrupt : %d Mbps, shared RAM base %08x.\n",
1539 ti->ring_speed, (unsigned int)dev->mem_start); 1537 ti->ring_speed, (unsigned int)dev->mem_start);
1540 ti->auto_speedsave = (readb(ti->init_srb+INIT_STATUS_2_OFST) & 4) != 0; 1538 ti->auto_speedsave = (readb(ti->init_srb+INIT_STATUS_2_OFST) & 4) != 0;
1541 1539
1542 if (ti->open_mode == MANUAL) wake_up(&ti->wait_for_reset); 1540 if (ti->open_mode == MANUAL) wake_up(&ti->wait_for_reset);
1543 else tok_open_adapter((unsigned long)dev); 1541 else tok_open_adapter((unsigned long)dev);
1544 1542
1545 } /*initial_tok_int() */ 1543 } /*initial_tok_int() */
1546 1544
1547 /*****************************************************************************/ 1545 /*****************************************************************************/
1548 1546
1549 #define CMD_CORRELATE_OFST 1 1547 #define CMD_CORRELATE_OFST 1
1550 #define DHB_ADDRESS_OFST 6 1548 #define DHB_ADDRESS_OFST 6
1551 1549
1552 #define FRAME_LENGTH_OFST 6 1550 #define FRAME_LENGTH_OFST 6
1553 #define HEADER_LENGTH_OFST 8 1551 #define HEADER_LENGTH_OFST 8
1554 #define RSAP_VALUE_OFST 9 1552 #define RSAP_VALUE_OFST 9
1555 1553
1556 static void tr_tx(struct net_device *dev) 1554 static void tr_tx(struct net_device *dev)
1557 { 1555 {
1558 struct tok_info *ti = netdev_priv(dev); 1556 struct tok_info *ti = netdev_priv(dev);
1559 struct trh_hdr *trhdr = (struct trh_hdr *) ti->current_skb->data; 1557 struct trh_hdr *trhdr = (struct trh_hdr *) ti->current_skb->data;
1560 unsigned int hdr_len; 1558 unsigned int hdr_len;
1561 __u32 dhb=0,dhb_base; 1559 __u32 dhb=0,dhb_base;
1562 void __iomem *dhbuf = NULL; 1560 void __iomem *dhbuf = NULL;
1563 unsigned char xmit_command; 1561 unsigned char xmit_command;
1564 int i,dhb_len=0x4000,src_len,src_offset; 1562 int i,dhb_len=0x4000,src_len,src_offset;
1565 struct trllc *llc; 1563 struct trllc *llc;
1566 struct srb_xmit xsrb; 1564 struct srb_xmit xsrb;
1567 __u8 dhb_page = 0; 1565 __u8 dhb_page = 0;
1568 __u8 llc_ssap; 1566 __u8 llc_ssap;
1569 1567
1570 SET_PAGE(ti->asb_page); 1568 SET_PAGE(ti->asb_page);
1571 1569
1572 if (readb(ti->asb+RETCODE_OFST) != 0xFF) DPRINTK("ASB not free !!!\n"); 1570 if (readb(ti->asb+RETCODE_OFST) != 0xFF) DPRINTK("ASB not free !!!\n");
1573 1571
1574 /* in providing the transmit interrupts, is telling us it is ready for 1572 /* in providing the transmit interrupts, is telling us it is ready for
1575 data and providing a shared memory address for us to stuff with data. 1573 data and providing a shared memory address for us to stuff with data.
1576 Here we compute the effective address where we will place data. 1574 Here we compute the effective address where we will place data.
1577 */ 1575 */
1578 SET_PAGE(ti->arb_page); 1576 SET_PAGE(ti->arb_page);
1579 dhb=dhb_base=ntohs(readw(ti->arb + DHB_ADDRESS_OFST)); 1577 dhb=dhb_base=ntohs(readw(ti->arb + DHB_ADDRESS_OFST));
1580 if (ti->page_mask) { 1578 if (ti->page_mask) {
1581 dhb_page = (dhb_base >> 8) & ti->page_mask; 1579 dhb_page = (dhb_base >> 8) & ti->page_mask;
1582 dhb=dhb_base & ~(ti->page_mask << 8); 1580 dhb=dhb_base & ~(ti->page_mask << 8);
1583 } 1581 }
1584 dhbuf = ti->sram_virt + dhb; 1582 dhbuf = ti->sram_virt + dhb;
1585 1583
1586 /* Figure out the size of the 802.5 header */ 1584 /* Figure out the size of the 802.5 header */
1587 if (!(trhdr->saddr[0] & 0x80)) /* RIF present? */ 1585 if (!(trhdr->saddr[0] & 0x80)) /* RIF present? */
1588 hdr_len = sizeof(struct trh_hdr) - TR_MAXRIFLEN; 1586 hdr_len = sizeof(struct trh_hdr) - TR_MAXRIFLEN;
1589 else 1587 else
1590 hdr_len = ((ntohs(trhdr->rcf) & TR_RCF_LEN_MASK) >> 8) 1588 hdr_len = ((ntohs(trhdr->rcf) & TR_RCF_LEN_MASK) >> 8)
1591 + sizeof(struct trh_hdr) - TR_MAXRIFLEN; 1589 + sizeof(struct trh_hdr) - TR_MAXRIFLEN;
1592 1590
1593 llc = (struct trllc *) (ti->current_skb->data + hdr_len); 1591 llc = (struct trllc *) (ti->current_skb->data + hdr_len);
1594 1592
1595 llc_ssap = llc->ssap; 1593 llc_ssap = llc->ssap;
1596 SET_PAGE(ti->srb_page); 1594 SET_PAGE(ti->srb_page);
1597 memcpy_fromio(&xsrb, ti->srb, sizeof(xsrb)); 1595 memcpy_fromio(&xsrb, ti->srb, sizeof(xsrb));
1598 SET_PAGE(ti->asb_page); 1596 SET_PAGE(ti->asb_page);
1599 xmit_command = xsrb.command; 1597 xmit_command = xsrb.command;
1600 1598
1601 writeb(xmit_command, ti->asb + COMMAND_OFST); 1599 writeb(xmit_command, ti->asb + COMMAND_OFST);
1602 writew(xsrb.station_id, ti->asb + STATION_ID_OFST); 1600 writew(xsrb.station_id, ti->asb + STATION_ID_OFST);
1603 writeb(llc_ssap, ti->asb + RSAP_VALUE_OFST); 1601 writeb(llc_ssap, ti->asb + RSAP_VALUE_OFST);
1604 writeb(xsrb.cmd_corr, ti->asb + CMD_CORRELATE_OFST); 1602 writeb(xsrb.cmd_corr, ti->asb + CMD_CORRELATE_OFST);
1605 writeb(0, ti->asb + RETCODE_OFST); 1603 writeb(0, ti->asb + RETCODE_OFST);
1606 if ((xmit_command == XMIT_XID_CMD) || (xmit_command == XMIT_TEST_CMD)) { 1604 if ((xmit_command == XMIT_XID_CMD) || (xmit_command == XMIT_TEST_CMD)) {
1607 writew(htons(0x11), ti->asb + FRAME_LENGTH_OFST); 1605 writew(htons(0x11), ti->asb + FRAME_LENGTH_OFST);
1608 writeb(0x0e, ti->asb + HEADER_LENGTH_OFST); 1606 writeb(0x0e, ti->asb + HEADER_LENGTH_OFST);
1609 SET_PAGE(dhb_page); 1607 SET_PAGE(dhb_page);
1610 writeb(AC, dhbuf); 1608 writeb(AC, dhbuf);
1611 writeb(LLC_FRAME, dhbuf + 1); 1609 writeb(LLC_FRAME, dhbuf + 1);
1612 for (i = 0; i < TR_ALEN; i++) 1610 for (i = 0; i < TR_ALEN; i++)
1613 writeb((int) 0x0FF, dhbuf + i + 2); 1611 writeb((int) 0x0FF, dhbuf + i + 2);
1614 for (i = 0; i < TR_ALEN; i++) 1612 for (i = 0; i < TR_ALEN; i++)
1615 writeb(0, dhbuf + i + TR_ALEN + 2); 1613 writeb(0, dhbuf + i + TR_ALEN + 2);
1616 writeb(RESP_IN_ASB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 1614 writeb(RESP_IN_ASB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
1617 return; 1615 return;
1618 } 1616 }
1619 /* 1617 /*
1620 * the token ring packet is copied from sk_buff to the adapter 1618 * the token ring packet is copied from sk_buff to the adapter
1621 * buffer identified in the command data received with the interrupt. 1619 * buffer identified in the command data received with the interrupt.
1622 */ 1620 */
1623 writeb(hdr_len, ti->asb + HEADER_LENGTH_OFST); 1621 writeb(hdr_len, ti->asb + HEADER_LENGTH_OFST);
1624 writew(htons(ti->current_skb->len), ti->asb + FRAME_LENGTH_OFST); 1622 writew(htons(ti->current_skb->len), ti->asb + FRAME_LENGTH_OFST);
1625 src_len=ti->current_skb->len; 1623 src_len=ti->current_skb->len;
1626 src_offset=0; 1624 src_offset=0;
1627 dhb=dhb_base; 1625 dhb=dhb_base;
1628 while(1) { 1626 while(1) {
1629 if (ti->page_mask) { 1627 if (ti->page_mask) {
1630 dhb_page=(dhb >> 8) & ti->page_mask; 1628 dhb_page=(dhb >> 8) & ti->page_mask;
1631 dhb=dhb & ~(ti->page_mask << 8); 1629 dhb=dhb & ~(ti->page_mask << 8);
1632 dhb_len=0x4000-dhb; /* remaining size of this page */ 1630 dhb_len=0x4000-dhb; /* remaining size of this page */
1633 } 1631 }
1634 dhbuf = ti->sram_virt + dhb; 1632 dhbuf = ti->sram_virt + dhb;
1635 SET_PAGE(dhb_page); 1633 SET_PAGE(dhb_page);
1636 if (src_len > dhb_len) { 1634 if (src_len > dhb_len) {
1637 memcpy_toio(dhbuf,&ti->current_skb->data[src_offset], 1635 memcpy_toio(dhbuf,&ti->current_skb->data[src_offset],
1638 dhb_len); 1636 dhb_len);
1639 src_len -= dhb_len; 1637 src_len -= dhb_len;
1640 src_offset += dhb_len; 1638 src_offset += dhb_len;
1641 dhb_base+=dhb_len; 1639 dhb_base+=dhb_len;
1642 dhb=dhb_base; 1640 dhb=dhb_base;
1643 continue; 1641 continue;
1644 } 1642 }
1645 memcpy_toio(dhbuf, &ti->current_skb->data[src_offset], src_len); 1643 memcpy_toio(dhbuf, &ti->current_skb->data[src_offset], src_len);
1646 break; 1644 break;
1647 } 1645 }
1648 writeb(RESP_IN_ASB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 1646 writeb(RESP_IN_ASB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
1649 ti->tr_stats.tx_bytes += ti->current_skb->len; 1647 dev->stats.tx_bytes += ti->current_skb->len;
1650 dev_kfree_skb_irq(ti->current_skb); 1648 dev_kfree_skb_irq(ti->current_skb);
1651 ti->current_skb = NULL; 1649 ti->current_skb = NULL;
1652 netif_wake_queue(dev); 1650 netif_wake_queue(dev);
1653 if (ti->readlog_pending) 1651 if (ti->readlog_pending)
1654 ibmtr_readlog(dev); 1652 ibmtr_readlog(dev);
1655 } /*tr_tx */ 1653 } /*tr_tx */
1656 1654
1657 /*****************************************************************************/ 1655 /*****************************************************************************/
1658 1656
1659 1657
1660 #define RECEIVE_BUFFER_OFST 6 1658 #define RECEIVE_BUFFER_OFST 6
1661 #define LAN_HDR_LENGTH_OFST 8 1659 #define LAN_HDR_LENGTH_OFST 8
1662 #define DLC_HDR_LENGTH_OFST 9 1660 #define DLC_HDR_LENGTH_OFST 9
1663 1661
1664 #define DSAP_OFST 0 1662 #define DSAP_OFST 0
1665 #define SSAP_OFST 1 1663 #define SSAP_OFST 1
1666 #define LLC_OFST 2 1664 #define LLC_OFST 2
1667 #define PROTID_OFST 3 1665 #define PROTID_OFST 3
1668 #define ETHERTYPE_OFST 6 1666 #define ETHERTYPE_OFST 6
1669 1667
1670 static void tr_rx(struct net_device *dev) 1668 static void tr_rx(struct net_device *dev)
1671 { 1669 {
1672 struct tok_info *ti = netdev_priv(dev); 1670 struct tok_info *ti = netdev_priv(dev);
1673 __u32 rbuffer; 1671 __u32 rbuffer;
1674 void __iomem *rbuf, *rbufdata, *llc; 1672 void __iomem *rbuf, *rbufdata, *llc;
1675 __u8 rbuffer_page = 0; 1673 __u8 rbuffer_page = 0;
1676 unsigned char *data; 1674 unsigned char *data;
1677 unsigned int rbuffer_len, lan_hdr_len, hdr_len, ip_len, length; 1675 unsigned int rbuffer_len, lan_hdr_len, hdr_len, ip_len, length;
1678 unsigned char dlc_hdr_len; 1676 unsigned char dlc_hdr_len;
1679 struct sk_buff *skb; 1677 struct sk_buff *skb;
1680 unsigned int skb_size = 0; 1678 unsigned int skb_size = 0;
1681 int IPv4_p = 0; 1679 int IPv4_p = 0;
1682 unsigned int chksum = 0; 1680 unsigned int chksum = 0;
1683 struct iphdr *iph; 1681 struct iphdr *iph;
1684 struct arb_rec_req rarb; 1682 struct arb_rec_req rarb;
1685 1683
1686 SET_PAGE(ti->arb_page); 1684 SET_PAGE(ti->arb_page);
1687 memcpy_fromio(&rarb, ti->arb, sizeof(rarb)); 1685 memcpy_fromio(&rarb, ti->arb, sizeof(rarb));
1688 rbuffer = ntohs(rarb.rec_buf_addr) ; 1686 rbuffer = ntohs(rarb.rec_buf_addr) ;
1689 rbuf = map_address(ti, rbuffer, &rbuffer_page); 1687 rbuf = map_address(ti, rbuffer, &rbuffer_page);
1690 1688
1691 SET_PAGE(ti->asb_page); 1689 SET_PAGE(ti->asb_page);
1692 1690
1693 if (readb(ti->asb + RETCODE_OFST) !=0xFF) DPRINTK("ASB not free !!!\n"); 1691 if (readb(ti->asb + RETCODE_OFST) !=0xFF) DPRINTK("ASB not free !!!\n");
1694 1692
1695 writeb(REC_DATA, ti->asb + COMMAND_OFST); 1693 writeb(REC_DATA, ti->asb + COMMAND_OFST);
1696 writew(rarb.station_id, ti->asb + STATION_ID_OFST); 1694 writew(rarb.station_id, ti->asb + STATION_ID_OFST);
1697 writew(rarb.rec_buf_addr, ti->asb + RECEIVE_BUFFER_OFST); 1695 writew(rarb.rec_buf_addr, ti->asb + RECEIVE_BUFFER_OFST);
1698 1696
1699 lan_hdr_len = rarb.lan_hdr_len; 1697 lan_hdr_len = rarb.lan_hdr_len;
1700 if (lan_hdr_len > sizeof(struct trh_hdr)) { 1698 if (lan_hdr_len > sizeof(struct trh_hdr)) {
1701 DPRINTK("Linux cannot handle greater than 18 bytes RIF\n"); 1699 DPRINTK("Linux cannot handle greater than 18 bytes RIF\n");
1702 return; 1700 return;
1703 } /*BMS I added this above just to be very safe */ 1701 } /*BMS I added this above just to be very safe */
1704 dlc_hdr_len = readb(ti->arb + DLC_HDR_LENGTH_OFST); 1702 dlc_hdr_len = readb(ti->arb + DLC_HDR_LENGTH_OFST);
1705 hdr_len = lan_hdr_len + sizeof(struct trllc) + sizeof(struct iphdr); 1703 hdr_len = lan_hdr_len + sizeof(struct trllc) + sizeof(struct iphdr);
1706 1704
1707 SET_PAGE(rbuffer_page); 1705 SET_PAGE(rbuffer_page);
1708 llc = rbuf + offsetof(struct rec_buf, data) + lan_hdr_len; 1706 llc = rbuf + offsetof(struct rec_buf, data) + lan_hdr_len;
1709 1707
1710 #if TR_VERBOSE 1708 #if TR_VERBOSE
1711 DPRINTK("offsetof data: %02X lan_hdr_len: %02X\n", 1709 DPRINTK("offsetof data: %02X lan_hdr_len: %02X\n",
1712 (__u32) offsetof(struct rec_buf, data), (unsigned int) lan_hdr_len); 1710 (__u32) offsetof(struct rec_buf, data), (unsigned int) lan_hdr_len);
1713 DPRINTK("llc: %08X rec_buf_addr: %04X dev->mem_start: %lX\n", 1711 DPRINTK("llc: %08X rec_buf_addr: %04X dev->mem_start: %lX\n",
1714 llc, ntohs(rarb.rec_buf_addr), dev->mem_start); 1712 llc, ntohs(rarb.rec_buf_addr), dev->mem_start);
1715 DPRINTK("dsap: %02X, ssap: %02X, llc: %02X, protid: %02X%02X%02X, " 1713 DPRINTK("dsap: %02X, ssap: %02X, llc: %02X, protid: %02X%02X%02X, "
1716 "ethertype: %04X\n", 1714 "ethertype: %04X\n",
1717 (int) readb(llc + DSAP_OFST), (int) readb(llc + SSAP_OFST), 1715 (int) readb(llc + DSAP_OFST), (int) readb(llc + SSAP_OFST),
1718 (int) readb(llc + LLC_OFST), (int) readb(llc + PROTID_OFST), 1716 (int) readb(llc + LLC_OFST), (int) readb(llc + PROTID_OFST),
1719 (int) readb(llc+PROTID_OFST+1),(int)readb(llc+PROTID_OFST + 2), 1717 (int) readb(llc+PROTID_OFST+1),(int)readb(llc+PROTID_OFST + 2),
1720 (int) ntohs(readw(llc + ETHERTYPE_OFST))); 1718 (int) ntohs(readw(llc + ETHERTYPE_OFST)));
1721 #endif 1719 #endif
1722 if (readb(llc + offsetof(struct trllc, llc)) != UI_CMD) { 1720 if (readb(llc + offsetof(struct trllc, llc)) != UI_CMD) {
1723 SET_PAGE(ti->asb_page); 1721 SET_PAGE(ti->asb_page);
1724 writeb(DATA_LOST, ti->asb + RETCODE_OFST); 1722 writeb(DATA_LOST, ti->asb + RETCODE_OFST);
1725 ti->tr_stats.rx_dropped++; 1723 dev->stats.rx_dropped++;
1726 writeb(RESP_IN_ASB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 1724 writeb(RESP_IN_ASB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
1727 return; 1725 return;
1728 } 1726 }
1729 length = ntohs(rarb.frame_len); 1727 length = ntohs(rarb.frame_len);
1730 if (readb(llc + DSAP_OFST) == EXTENDED_SAP && 1728 if (readb(llc + DSAP_OFST) == EXTENDED_SAP &&
1731 readb(llc + SSAP_OFST) == EXTENDED_SAP && 1729 readb(llc + SSAP_OFST) == EXTENDED_SAP &&
1732 length >= hdr_len) IPv4_p = 1; 1730 length >= hdr_len) IPv4_p = 1;
1733 #if TR_VERBOSE 1731 #if TR_VERBOSE
1734 #define SADDR_OFST 8 1732 #define SADDR_OFST 8
1735 #define DADDR_OFST 2 1733 #define DADDR_OFST 2
1736 1734
1737 if (!IPv4_p) { 1735 if (!IPv4_p) {
1738 1736
1739 void __iomem *trhhdr = rbuf + offsetof(struct rec_buf, data); 1737 void __iomem *trhhdr = rbuf + offsetof(struct rec_buf, data);
1740 u8 saddr[6]; 1738 u8 saddr[6];
1741 u8 daddr[6]; 1739 u8 daddr[6];
1742 int i; 1740 int i;
1743 for (i = 0 ; i < 6 ; i++) 1741 for (i = 0 ; i < 6 ; i++)
1744 saddr[i] = readb(trhhdr + SADDR_OFST + i); 1742 saddr[i] = readb(trhhdr + SADDR_OFST + i);
1745 for (i = 0 ; i < 6 ; i++) 1743 for (i = 0 ; i < 6 ; i++)
1746 daddr[i] = readb(trhhdr + DADDR_OFST + i); 1744 daddr[i] = readb(trhhdr + DADDR_OFST + i);
1747 DPRINTK("Probably non-IP frame received.\n"); 1745 DPRINTK("Probably non-IP frame received.\n");
1748 DPRINTK("ssap: %02X dsap: %02X " 1746 DPRINTK("ssap: %02X dsap: %02X "
1749 "saddr: %pM daddr: %pM\n", 1747 "saddr: %pM daddr: %pM\n",
1750 readb(llc + SSAP_OFST), readb(llc + DSAP_OFST), 1748 readb(llc + SSAP_OFST), readb(llc + DSAP_OFST),
1751 saddr, daddr); 1749 saddr, daddr);
1752 } 1750 }
1753 #endif 1751 #endif
1754 1752
1755 /*BMS handle the case she comes in with few hops but leaves with many */ 1753 /*BMS handle the case she comes in with few hops but leaves with many */
1756 skb_size=length-lan_hdr_len+sizeof(struct trh_hdr)+sizeof(struct trllc); 1754 skb_size=length-lan_hdr_len+sizeof(struct trh_hdr)+sizeof(struct trllc);
1757 1755
1758 if (!(skb = dev_alloc_skb(skb_size))) { 1756 if (!(skb = dev_alloc_skb(skb_size))) {
1759 DPRINTK("out of memory. frame dropped.\n"); 1757 DPRINTK("out of memory. frame dropped.\n");
1760 ti->tr_stats.rx_dropped++; 1758 dev->stats.rx_dropped++;
1761 SET_PAGE(ti->asb_page); 1759 SET_PAGE(ti->asb_page);
1762 writeb(DATA_LOST, ti->asb + offsetof(struct asb_rec, ret_code)); 1760 writeb(DATA_LOST, ti->asb + offsetof(struct asb_rec, ret_code));
1763 writeb(RESP_IN_ASB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 1761 writeb(RESP_IN_ASB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
1764 return; 1762 return;
1765 } 1763 }
1766 /*BMS again, if she comes in with few but leaves with many */ 1764 /*BMS again, if she comes in with few but leaves with many */
1767 skb_reserve(skb, sizeof(struct trh_hdr) - lan_hdr_len); 1765 skb_reserve(skb, sizeof(struct trh_hdr) - lan_hdr_len);
1768 skb_put(skb, length); 1766 skb_put(skb, length);
1769 data = skb->data; 1767 data = skb->data;
1770 rbuffer_len = ntohs(readw(rbuf + offsetof(struct rec_buf, buf_len))); 1768 rbuffer_len = ntohs(readw(rbuf + offsetof(struct rec_buf, buf_len)));
1771 rbufdata = rbuf + offsetof(struct rec_buf, data); 1769 rbufdata = rbuf + offsetof(struct rec_buf, data);
1772 1770
1773 if (IPv4_p) { 1771 if (IPv4_p) {
1774 /* Copy the headers without checksumming */ 1772 /* Copy the headers without checksumming */
1775 memcpy_fromio(data, rbufdata, hdr_len); 1773 memcpy_fromio(data, rbufdata, hdr_len);
1776 1774
1777 /* Watch for padded packets and bogons */ 1775 /* Watch for padded packets and bogons */
1778 iph= (struct iphdr *)(data+ lan_hdr_len + sizeof(struct trllc)); 1776 iph= (struct iphdr *)(data+ lan_hdr_len + sizeof(struct trllc));
1779 ip_len = ntohs(iph->tot_len) - sizeof(struct iphdr); 1777 ip_len = ntohs(iph->tot_len) - sizeof(struct iphdr);
1780 length -= hdr_len; 1778 length -= hdr_len;
1781 if ((ip_len <= length) && (ip_len > 7)) 1779 if ((ip_len <= length) && (ip_len > 7))
1782 length = ip_len; 1780 length = ip_len;
1783 data += hdr_len; 1781 data += hdr_len;
1784 rbuffer_len -= hdr_len; 1782 rbuffer_len -= hdr_len;
1785 rbufdata += hdr_len; 1783 rbufdata += hdr_len;
1786 } 1784 }
1787 /* Copy the payload... */ 1785 /* Copy the payload... */
1788 #define BUFFER_POINTER_OFST 2 1786 #define BUFFER_POINTER_OFST 2
1789 #define BUFFER_LENGTH_OFST 6 1787 #define BUFFER_LENGTH_OFST 6
1790 for (;;) { 1788 for (;;) {
1791 if (ibmtr_debug_trace&TRC_INITV && length < rbuffer_len) 1789 if (ibmtr_debug_trace&TRC_INITV && length < rbuffer_len)
1792 DPRINTK("CURIOUS, length=%d < rbuffer_len=%d\n", 1790 DPRINTK("CURIOUS, length=%d < rbuffer_len=%d\n",
1793 length,rbuffer_len); 1791 length,rbuffer_len);
1794 if (IPv4_p) 1792 if (IPv4_p)
1795 chksum=csum_partial_copy_nocheck((void*)rbufdata, 1793 chksum=csum_partial_copy_nocheck((void*)rbufdata,
1796 data,length<rbuffer_len?length:rbuffer_len,chksum); 1794 data,length<rbuffer_len?length:rbuffer_len,chksum);
1797 else 1795 else
1798 memcpy_fromio(data, rbufdata, rbuffer_len); 1796 memcpy_fromio(data, rbufdata, rbuffer_len);
1799 rbuffer = ntohs(readw(rbuf+BUFFER_POINTER_OFST)) ; 1797 rbuffer = ntohs(readw(rbuf+BUFFER_POINTER_OFST)) ;
1800 if (!rbuffer) 1798 if (!rbuffer)
1801 break; 1799 break;
1802 rbuffer -= 2; 1800 rbuffer -= 2;
1803 length -= rbuffer_len; 1801 length -= rbuffer_len;
1804 data += rbuffer_len; 1802 data += rbuffer_len;
1805 rbuf = map_address(ti, rbuffer, &rbuffer_page); 1803 rbuf = map_address(ti, rbuffer, &rbuffer_page);
1806 SET_PAGE(rbuffer_page); 1804 SET_PAGE(rbuffer_page);
1807 rbuffer_len = ntohs(readw(rbuf + BUFFER_LENGTH_OFST)); 1805 rbuffer_len = ntohs(readw(rbuf + BUFFER_LENGTH_OFST));
1808 rbufdata = rbuf + offsetof(struct rec_buf, data); 1806 rbufdata = rbuf + offsetof(struct rec_buf, data);
1809 } 1807 }
1810 1808
1811 SET_PAGE(ti->asb_page); 1809 SET_PAGE(ti->asb_page);
1812 writeb(0, ti->asb + offsetof(struct asb_rec, ret_code)); 1810 writeb(0, ti->asb + offsetof(struct asb_rec, ret_code));
1813 1811
1814 writeb(RESP_IN_ASB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 1812 writeb(RESP_IN_ASB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
1815 1813
1816 ti->tr_stats.rx_bytes += skb->len; 1814 dev->stats.rx_bytes += skb->len;
1817 ti->tr_stats.rx_packets++; 1815 dev->stats.rx_packets++;
1818 1816
1819 skb->protocol = tr_type_trans(skb, dev); 1817 skb->protocol = tr_type_trans(skb, dev);
1820 if (IPv4_p) { 1818 if (IPv4_p) {
1821 skb->csum = chksum; 1819 skb->csum = chksum;
1822 skb->ip_summed = CHECKSUM_COMPLETE; 1820 skb->ip_summed = CHECKSUM_COMPLETE;
1823 } 1821 }
1824 netif_rx(skb); 1822 netif_rx(skb);
1825 } /*tr_rx */ 1823 } /*tr_rx */
1826 1824
1827 /*****************************************************************************/ 1825 /*****************************************************************************/
1828 1826
1829 static void ibmtr_reset_timer(struct timer_list *tmr, struct net_device *dev) 1827 static void ibmtr_reset_timer(struct timer_list *tmr, struct net_device *dev)
1830 { 1828 {
1831 tmr->expires = jiffies + TR_RETRY_INTERVAL; 1829 tmr->expires = jiffies + TR_RETRY_INTERVAL;
1832 tmr->data = (unsigned long) dev; 1830 tmr->data = (unsigned long) dev;
1833 tmr->function = tok_rerun; 1831 tmr->function = tok_rerun;
1834 init_timer(tmr); 1832 init_timer(tmr);
1835 add_timer(tmr); 1833 add_timer(tmr);
1836 } 1834 }
1837 1835
1838 /*****************************************************************************/ 1836 /*****************************************************************************/
1839 1837
1840 static void tok_rerun(unsigned long dev_addr) 1838 static void tok_rerun(unsigned long dev_addr)
1841 { 1839 {
1842 struct net_device *dev = (struct net_device *)dev_addr; 1840 struct net_device *dev = (struct net_device *)dev_addr;
1843 struct tok_info *ti = netdev_priv(dev); 1841 struct tok_info *ti = netdev_priv(dev);
1844 1842
1845 if ( ti->open_action == RESTART){ 1843 if ( ti->open_action == RESTART){
1846 ti->do_tok_int = FIRST_INT; 1844 ti->do_tok_int = FIRST_INT;
1847 outb(0, dev->base_addr + ADAPTRESETREL); 1845 outb(0, dev->base_addr + ADAPTRESETREL);
1848 #ifdef ENABLE_PAGING 1846 #ifdef ENABLE_PAGING
1849 if (ti->page_mask) 1847 if (ti->page_mask)
1850 writeb(SRPR_ENABLE_PAGING, 1848 writeb(SRPR_ENABLE_PAGING,
1851 ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN); 1849 ti->mmio + ACA_OFFSET + ACA_RW + SRPR_EVEN);
1852 #endif 1850 #endif
1853 1851
1854 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN); 1852 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
1855 } else 1853 } else
1856 tok_open_adapter(dev_addr); 1854 tok_open_adapter(dev_addr);
1857 } 1855 }
1858 1856
1859 /*****************************************************************************/ 1857 /*****************************************************************************/
1860 1858
1861 static void ibmtr_readlog(struct net_device *dev) 1859 static void ibmtr_readlog(struct net_device *dev)
1862 { 1860 {
1863 struct tok_info *ti; 1861 struct tok_info *ti;
1864 1862
1865 ti = netdev_priv(dev); 1863 ti = netdev_priv(dev);
1866 1864
1867 ti->readlog_pending = 0; 1865 ti->readlog_pending = 0;
1868 SET_PAGE(ti->srb_page); 1866 SET_PAGE(ti->srb_page);
1869 writeb(DIR_READ_LOG, ti->srb); 1867 writeb(DIR_READ_LOG, ti->srb);
1870 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN); 1868 writeb(INT_ENABLE, ti->mmio + ACA_OFFSET + ACA_SET + ISRP_EVEN);
1871 writeb(CMD_IN_SRB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD); 1869 writeb(CMD_IN_SRB, ti->mmio + ACA_OFFSET + ACA_SET + ISRA_ODD);
1872 1870
1873 netif_stop_queue(dev); 1871 netif_stop_queue(dev);
1874 1872
1875 }
1876
1877 /*****************************************************************************/
1878
1879 /* tok_get_stats(): Basically a scaffold routine which will return
1880 the address of the tr_statistics structure associated with
1881 this device -- the tr.... structure is an ethnet look-alike
1882 so at least for this iteration may suffice. */
1883
1884 static struct net_device_stats *tok_get_stats(struct net_device *dev)
1885 {
1886
1887 struct tok_info *toki;
1888 toki = netdev_priv(dev);
1889 return (struct net_device_stats *) &toki->tr_stats;
1890 } 1873 }
1891 1874
1892 /*****************************************************************************/ 1875 /*****************************************************************************/
1893 1876
1894 static int ibmtr_change_mtu(struct net_device *dev, int mtu) 1877 static int ibmtr_change_mtu(struct net_device *dev, int mtu)
1895 { 1878 {
1896 struct tok_info *ti = netdev_priv(dev); 1879 struct tok_info *ti = netdev_priv(dev);
1897 1880
1898 if (ti->ring_speed == 16 && mtu > ti->maxmtu16) 1881 if (ti->ring_speed == 16 && mtu > ti->maxmtu16)
1899 return -EINVAL; 1882 return -EINVAL;
1900 if (ti->ring_speed == 4 && mtu > ti->maxmtu4) 1883 if (ti->ring_speed == 4 && mtu > ti->maxmtu4)
1901 return -EINVAL; 1884 return -EINVAL;
1902 dev->mtu = mtu; 1885 dev->mtu = mtu;
1903 return 0; 1886 return 0;
1904 } 1887 }
1905 1888
1906 /*****************************************************************************/ 1889 /*****************************************************************************/
1907 #ifdef MODULE 1890 #ifdef MODULE
1908 1891
1909 /* 3COM 3C619C supports 8 interrupts, 32 I/O ports */ 1892 /* 3COM 3C619C supports 8 interrupts, 32 I/O ports */
1910 static struct net_device *dev_ibmtr[IBMTR_MAX_ADAPTERS]; 1893 static struct net_device *dev_ibmtr[IBMTR_MAX_ADAPTERS];
1911 static int io[IBMTR_MAX_ADAPTERS] = { 0xa20, 0xa24 }; 1894 static int io[IBMTR_MAX_ADAPTERS] = { 0xa20, 0xa24 };
1912 static int irq[IBMTR_MAX_ADAPTERS]; 1895 static int irq[IBMTR_MAX_ADAPTERS];
1913 static int mem[IBMTR_MAX_ADAPTERS]; 1896 static int mem[IBMTR_MAX_ADAPTERS];
1914 1897
1915 MODULE_LICENSE("GPL"); 1898 MODULE_LICENSE("GPL");
1916 1899
1917 module_param_array(io, int, NULL, 0); 1900 module_param_array(io, int, NULL, 0);
1918 module_param_array(irq, int, NULL, 0); 1901 module_param_array(irq, int, NULL, 0);
1919 module_param_array(mem, int, NULL, 0); 1902 module_param_array(mem, int, NULL, 0);
1920 1903
1921 static int __init ibmtr_init(void) 1904 static int __init ibmtr_init(void)
1922 { 1905 {
1923 int i; 1906 int i;
1924 int count=0; 1907 int count=0;
1925 1908
1926 find_turbo_adapters(io); 1909 find_turbo_adapters(io);
1927 1910
1928 for (i = 0; io[i] && (i < IBMTR_MAX_ADAPTERS); i++) { 1911 for (i = 0; io[i] && (i < IBMTR_MAX_ADAPTERS); i++) {
1929 struct net_device *dev; 1912 struct net_device *dev;
1930 irq[i] = 0; 1913 irq[i] = 0;
1931 mem[i] = 0; 1914 mem[i] = 0;
1932 dev = alloc_trdev(sizeof(struct tok_info)); 1915 dev = alloc_trdev(sizeof(struct tok_info));
1933 if (dev == NULL) { 1916 if (dev == NULL) {
1934 if (i == 0) 1917 if (i == 0)
1935 return -ENOMEM; 1918 return -ENOMEM;
1936 break; 1919 break;
1937 } 1920 }
1938 dev->base_addr = io[i]; 1921 dev->base_addr = io[i];
1939 dev->irq = irq[i]; 1922 dev->irq = irq[i];
1940 dev->mem_start = mem[i]; 1923 dev->mem_start = mem[i];
1941 1924
1942 if (ibmtr_probe_card(dev)) { 1925 if (ibmtr_probe_card(dev)) {
1943 free_netdev(dev); 1926 free_netdev(dev);
1944 continue; 1927 continue;
1945 } 1928 }
1946 dev_ibmtr[i] = dev; 1929 dev_ibmtr[i] = dev;
1947 count++; 1930 count++;
1948 } 1931 }
1949 if (count) return 0; 1932 if (count) return 0;
1950 printk("ibmtr: register_netdev() returned non-zero.\n"); 1933 printk("ibmtr: register_netdev() returned non-zero.\n");
1951 return -EIO; 1934 return -EIO;
1952 } 1935 }
1953 module_init(ibmtr_init); 1936 module_init(ibmtr_init);
1954 1937
1955 static void __exit ibmtr_cleanup(void) 1938 static void __exit ibmtr_cleanup(void)
1956 { 1939 {
1957 int i; 1940 int i;
1958 1941
1959 for (i = 0; i < IBMTR_MAX_ADAPTERS; i++){ 1942 for (i = 0; i < IBMTR_MAX_ADAPTERS; i++){
1960 if (!dev_ibmtr[i]) 1943 if (!dev_ibmtr[i])
1961 continue; 1944 continue;
1962 unregister_netdev(dev_ibmtr[i]); 1945 unregister_netdev(dev_ibmtr[i]);
1963 ibmtr_cleanup_card(dev_ibmtr[i]); 1946 ibmtr_cleanup_card(dev_ibmtr[i]);
1964 free_netdev(dev_ibmtr[i]); 1947 free_netdev(dev_ibmtr[i]);
1965 } 1948 }
1966 } 1949 }
1967 module_exit(ibmtr_cleanup); 1950 module_exit(ibmtr_cleanup);
1968 #endif 1951 #endif
1969 1952
include/linux/ibmtr.h
1 #ifndef __LINUX_IBMTR_H__ 1 #ifndef __LINUX_IBMTR_H__
2 #define __LINUX_IBMTR_H__ 2 #define __LINUX_IBMTR_H__
3 3
4 /* Definitions for an IBM Token Ring card. */ 4 /* Definitions for an IBM Token Ring card. */
5 /* This file is distributed under the GNU GPL */ 5 /* This file is distributed under the GNU GPL */
6 6
7 /* ported to the Alpha architecture 02/20/96 (just used the HZ macro) */ 7 /* ported to the Alpha architecture 02/20/96 (just used the HZ macro) */
8 8
9 #define TR_RETRY_INTERVAL (30*HZ) /* 500 on PC = 5 s */ 9 #define TR_RETRY_INTERVAL (30*HZ) /* 500 on PC = 5 s */
10 #define TR_RST_TIME (msecs_to_jiffies(50)) /* 5 on PC = 50 ms */ 10 #define TR_RST_TIME (msecs_to_jiffies(50)) /* 5 on PC = 50 ms */
11 #define TR_BUSY_INTERVAL (msecs_to_jiffies(200)) /* 5 on PC = 200 ms */ 11 #define TR_BUSY_INTERVAL (msecs_to_jiffies(200)) /* 5 on PC = 200 ms */
12 #define TR_SPIN_INTERVAL (3*HZ) /* 3 seconds before init timeout */ 12 #define TR_SPIN_INTERVAL (3*HZ) /* 3 seconds before init timeout */
13 13
14 #define TR_ISA 1 14 #define TR_ISA 1
15 #define TR_MCA 2 15 #define TR_MCA 2
16 #define TR_ISAPNP 3 16 #define TR_ISAPNP 3
17 #define NOTOK 0 17 #define NOTOK 0
18 18
19 #define IBMTR_SHARED_RAM_SIZE 0x10000 19 #define IBMTR_SHARED_RAM_SIZE 0x10000
20 #define IBMTR_IO_EXTENT 4 20 #define IBMTR_IO_EXTENT 4
21 #define IBMTR_MAX_ADAPTERS 4 21 #define IBMTR_MAX_ADAPTERS 4
22 22
23 #define CHANNEL_ID 0X1F30 23 #define CHANNEL_ID 0X1F30
24 #define AIP 0X1F00 24 #define AIP 0X1F00
25 #define AIPADAPTYPE 0X1FA0 25 #define AIPADAPTYPE 0X1FA0
26 #define AIPDATARATE 0X1FA2 26 #define AIPDATARATE 0X1FA2
27 #define AIPEARLYTOKEN 0X1FA4 27 #define AIPEARLYTOKEN 0X1FA4
28 #define AIPAVAILSHRAM 0X1FA6 28 #define AIPAVAILSHRAM 0X1FA6
29 #define AIPSHRAMPAGE 0X1FA8 29 #define AIPSHRAMPAGE 0X1FA8
30 #define AIP4MBDHB 0X1FAA 30 #define AIP4MBDHB 0X1FAA
31 #define AIP16MBDHB 0X1FAC 31 #define AIP16MBDHB 0X1FAC
32 #define AIPFID 0X1FBA 32 #define AIPFID 0X1FBA
33 33
34 #define ADAPTRESET 0x1 /* Control Adapter reset (add to base) */ 34 #define ADAPTRESET 0x1 /* Control Adapter reset (add to base) */
35 #define ADAPTRESETREL 0x2 /* Release Adapter from reset ( """) */ 35 #define ADAPTRESETREL 0x2 /* Release Adapter from reset ( """) */
36 #define ADAPTINTREL 0x3 /* Adapter interrupt release */ 36 #define ADAPTINTREL 0x3 /* Adapter interrupt release */
37 37
38 #define GLOBAL_INT_ENABLE 0x02f0 38 #define GLOBAL_INT_ENABLE 0x02f0
39 39
40 /* MMIO bits 0-4 select register */ 40 /* MMIO bits 0-4 select register */
41 #define RRR_EVEN 0x00 /* Shared RAM relocation registers - even and odd */ 41 #define RRR_EVEN 0x00 /* Shared RAM relocation registers - even and odd */
42 /* Used to set the starting address of shared RAM */ 42 /* Used to set the starting address of shared RAM */
43 /* Bits 1 through 7 of this register map to bits 13 through 19 of the shared 43 /* Bits 1 through 7 of this register map to bits 13 through 19 of the shared
44 RAM address.*/ 44 RAM address.*/
45 /* ie: 0x02 sets RAM address to ...ato! issy su wazzoo !! GODZILLA!!! */ 45 /* ie: 0x02 sets RAM address to ...ato! issy su wazzoo !! GODZILLA!!! */
46 #define RRR_ODD 0x01 46 #define RRR_ODD 0x01
47 /* Bits 2 and 3 of this register can be read to determine shared RAM size */ 47 /* Bits 2 and 3 of this register can be read to determine shared RAM size */
48 /* 00 for 8k, 01 for 16k, 10 for 32k, 11 for 64k */ 48 /* 00 for 8k, 01 for 16k, 10 for 32k, 11 for 64k */
49 #define WRBR_EVEN 0x02 /* Write region base registers - even and odd */ 49 #define WRBR_EVEN 0x02 /* Write region base registers - even and odd */
50 #define WRBR_ODD 0x03 50 #define WRBR_ODD 0x03
51 #define WWOR_EVEN 0x04 /* Write window open registers - even and odd */ 51 #define WWOR_EVEN 0x04 /* Write window open registers - even and odd */
52 #define WWOR_ODD 0x05 52 #define WWOR_ODD 0x05
53 #define WWCR_EVEN 0x06 /* Write window close registers - even and odd */ 53 #define WWCR_EVEN 0x06 /* Write window close registers - even and odd */
54 #define WWCR_ODD 0x07 54 #define WWCR_ODD 0x07
55 55
56 /* Interrupt status registers - PC system - even and odd */ 56 /* Interrupt status registers - PC system - even and odd */
57 #define ISRP_EVEN 0x08 57 #define ISRP_EVEN 0x08
58 58
59 #define TCR_INT 0x10 /* Bit 4 - Timer interrupt. The TVR_EVEN timer has 59 #define TCR_INT 0x10 /* Bit 4 - Timer interrupt. The TVR_EVEN timer has
60 expired. */ 60 expired. */
61 #define ERR_INT 0x08 /* Bit 3 - Error interrupt. The adapter has had an 61 #define ERR_INT 0x08 /* Bit 3 - Error interrupt. The adapter has had an
62 internal error. */ 62 internal error. */
63 #define ACCESS_INT 0x04 /* Bit 2 - Access interrupt. You have attempted to 63 #define ACCESS_INT 0x04 /* Bit 2 - Access interrupt. You have attempted to
64 write to an invalid area of shared RAM 64 write to an invalid area of shared RAM
65 or an invalid register within the MMIO. */ 65 or an invalid register within the MMIO. */
66 /* In addition, the following bits within ISRP_EVEN can be turned on or off */ 66 /* In addition, the following bits within ISRP_EVEN can be turned on or off */
67 /* by you to control the interrupt processing: */ 67 /* by you to control the interrupt processing: */
68 #define INT_ENABLE 0x40 /* Bit 6 - Interrupt enable. If 0, no interrupts will 68 #define INT_ENABLE 0x40 /* Bit 6 - Interrupt enable. If 0, no interrupts will
69 occur. If 1, interrupts will occur normally. 69 occur. If 1, interrupts will occur normally.
70 Normally set to 1. */ 70 Normally set to 1. */
71 /* Bit 0 - Primary or alternate adapter. Set to zero if this adapter is the 71 /* Bit 0 - Primary or alternate adapter. Set to zero if this adapter is the
72 primary adapter, 1 if this adapter is the alternate adapter. */ 72 primary adapter, 1 if this adapter is the alternate adapter. */
73 73
74 74
75 #define ISRP_ODD 0x09 75 #define ISRP_ODD 0x09
76 76
77 #define ADAP_CHK_INT 0x40 /* Bit 6 - Adapter check. the adapter has 77 #define ADAP_CHK_INT 0x40 /* Bit 6 - Adapter check. the adapter has
78 encountered a serious problem and has closed 78 encountered a serious problem and has closed
79 itself. Whoa. */ 79 itself. Whoa. */
80 #define SRB_RESP_INT 0x20 /* Bit 5 - SRB response. The adapter has accepted 80 #define SRB_RESP_INT 0x20 /* Bit 5 - SRB response. The adapter has accepted
81 an SRB request and set the return code within 81 an SRB request and set the return code within
82 the SRB. */ 82 the SRB. */
83 #define ASB_FREE_INT 0x10 /* Bit 4 - ASB free. The adapter has read the ASB 83 #define ASB_FREE_INT 0x10 /* Bit 4 - ASB free. The adapter has read the ASB
84 and this area can be safely reused. This interrupt 84 and this area can be safely reused. This interrupt
85 is only used if your application has set the ASB 85 is only used if your application has set the ASB
86 free request bit in ISRA_ODD or if an error was 86 free request bit in ISRA_ODD or if an error was
87 detected in your response. */ 87 detected in your response. */
88 #define ARB_CMD_INT 0x08 /* Bit 3 - ARB command. The adapter has given you a 88 #define ARB_CMD_INT 0x08 /* Bit 3 - ARB command. The adapter has given you a
89 command for action. The command is located in the 89 command for action. The command is located in the
90 ARB area of shared memory. */ 90 ARB area of shared memory. */
91 #define SSB_RESP_INT 0x04 /* Bit 2 - SSB response. The adapter has posted a 91 #define SSB_RESP_INT 0x04 /* Bit 2 - SSB response. The adapter has posted a
92 response to your SRB (the response is located in 92 response to your SRB (the response is located in
93 the SSB area of shared memory). */ 93 the SSB area of shared memory). */
94 /* Bit 1 - Bridge frame forward complete. */ 94 /* Bit 1 - Bridge frame forward complete. */
95 95
96 96
97 97
98 #define ISRA_EVEN 0x0A /*Interrupt status registers - adapter - even and odd */ 98 #define ISRA_EVEN 0x0A /*Interrupt status registers - adapter - even and odd */
99 /* Bit 7 - Internal parity error (on adapter's internal bus) */ 99 /* Bit 7 - Internal parity error (on adapter's internal bus) */
100 /* Bit 6 - Timer interrupt pending */ 100 /* Bit 6 - Timer interrupt pending */
101 /* Bit 5 - Access interrupt (attempt by adapter to access illegal address) */ 101 /* Bit 5 - Access interrupt (attempt by adapter to access illegal address) */
102 /* Bit 4 - Adapter microcode problem (microcode dead-man timer expired) */ 102 /* Bit 4 - Adapter microcode problem (microcode dead-man timer expired) */
103 /* Bit 3 - Adapter processor check status */ 103 /* Bit 3 - Adapter processor check status */
104 /* Bit 2 - Reserved */ 104 /* Bit 2 - Reserved */
105 /* Bit 1 - Adapter hardware interrupt mask (prevents internal interrupts) */ 105 /* Bit 1 - Adapter hardware interrupt mask (prevents internal interrupts) */
106 /* Bit 0 - Adapter software interrupt mask (prevents internal software ints) */ 106 /* Bit 0 - Adapter software interrupt mask (prevents internal software ints) */
107 107
108 #define ISRA_ODD 0x0B 108 #define ISRA_ODD 0x0B
109 #define CMD_IN_SRB 0x20 /* Bit 5 - Indicates that you have placed a new 109 #define CMD_IN_SRB 0x20 /* Bit 5 - Indicates that you have placed a new
110 command in the SRB and are ready for the adapter to 110 command in the SRB and are ready for the adapter to
111 process the command. */ 111 process the command. */
112 #define RESP_IN_ASB 0x10 /* Bit 4 - Indicates that you have placed a response 112 #define RESP_IN_ASB 0x10 /* Bit 4 - Indicates that you have placed a response
113 (an ASB) in the shared RAM which is available for 113 (an ASB) in the shared RAM which is available for
114 the adapter's use. */ 114 the adapter's use. */
115 /* Bit 3 - Indicates that you are ready to put an SRB in the shared RAM, but 115 /* Bit 3 - Indicates that you are ready to put an SRB in the shared RAM, but
116 that a previous command is still pending. The adapter will then 116 that a previous command is still pending. The adapter will then
117 interrupt you when the previous command is completed */ 117 interrupt you when the previous command is completed */
118 /* Bit 2 - Indicates that you are ready to put an ASB in the shared RAM, but 118 /* Bit 2 - Indicates that you are ready to put an ASB in the shared RAM, but
119 that a previous ASB is still pending. The adapter will then interrupt 119 that a previous ASB is still pending. The adapter will then interrupt
120 you when the previous ASB is copied. */ 120 you when the previous ASB is copied. */
121 #define ARB_FREE 0x2 121 #define ARB_FREE 0x2
122 #define SSB_FREE 0x1 122 #define SSB_FREE 0x1
123 123
124 #define TCR_EVEN 0x0C /* Timer control registers - even and odd */ 124 #define TCR_EVEN 0x0C /* Timer control registers - even and odd */
125 #define TCR_ODD 0x0D 125 #define TCR_ODD 0x0D
126 #define TVR_EVEN 0x0E /* Timer value registers - even and odd */ 126 #define TVR_EVEN 0x0E /* Timer value registers - even and odd */
127 #define TVR_ODD 0x0F 127 #define TVR_ODD 0x0F
128 #define SRPR_EVEN 0x18 /* Shared RAM paging registers - even and odd */ 128 #define SRPR_EVEN 0x18 /* Shared RAM paging registers - even and odd */
129 #define SRPR_ENABLE_PAGING 0xc0 129 #define SRPR_ENABLE_PAGING 0xc0
130 #define SRPR_ODD 0x19 /* Not used. */ 130 #define SRPR_ODD 0x19 /* Not used. */
131 #define TOKREAD 0x60 131 #define TOKREAD 0x60
132 #define TOKOR 0x40 132 #define TOKOR 0x40
133 #define TOKAND 0x20 133 #define TOKAND 0x20
134 #define TOKWRITE 0x00 134 #define TOKWRITE 0x00
135 135
136 /* MMIO bits 5-6 select operation */ 136 /* MMIO bits 5-6 select operation */
137 /* 00 is used to write to a register */ 137 /* 00 is used to write to a register */
138 /* 01 is used to bitwise AND a byte with a register */ 138 /* 01 is used to bitwise AND a byte with a register */
139 /* 10 is used to bitwise OR a byte with a register */ 139 /* 10 is used to bitwise OR a byte with a register */
140 /* 11 is used to read from a register */ 140 /* 11 is used to read from a register */
141 141
142 /* MMIO bits 7-8 select area of interest.. see below */ 142 /* MMIO bits 7-8 select area of interest.. see below */
143 /* 00 selects attachment control area. */ 143 /* 00 selects attachment control area. */
144 /* 01 is reserved. */ 144 /* 01 is reserved. */
145 /* 10 selects adapter identification area A containing the adapter encoded 145 /* 10 selects adapter identification area A containing the adapter encoded
146 address. */ 146 address. */
147 /* 11 selects the adapter identification area B containing test patterns. */ 147 /* 11 selects the adapter identification area B containing test patterns. */
148 148
149 #define PCCHANNELID 5049434F3631313039393020 149 #define PCCHANNELID 5049434F3631313039393020
150 #define MCCHANNELID 4D4152533633583435313820 150 #define MCCHANNELID 4D4152533633583435313820
151 151
152 #define ACA_OFFSET 0x1e00 152 #define ACA_OFFSET 0x1e00
153 #define ACA_SET 0x40 153 #define ACA_SET 0x40
154 #define ACA_RESET 0x20 154 #define ACA_RESET 0x20
155 #define ACA_RW 0x00 155 #define ACA_RW 0x00
156 156
157 #ifdef ENABLE_PAGING 157 #ifdef ENABLE_PAGING
158 #define SET_PAGE(x) (writeb((x), ti->mmio + ACA_OFFSET+ ACA_RW + SRPR_EVEN)) 158 #define SET_PAGE(x) (writeb((x), ti->mmio + ACA_OFFSET+ ACA_RW + SRPR_EVEN))
159 #else 159 #else
160 #define SET_PAGE(x) 160 #define SET_PAGE(x)
161 #endif 161 #endif
162 162
163 /* do_tok_int possible values */ 163 /* do_tok_int possible values */
164 #define FIRST_INT 1 164 #define FIRST_INT 1
165 #define NOT_FIRST 2 165 #define NOT_FIRST 2
166 166
167 typedef enum { CLOSED, OPEN } open_state; 167 typedef enum { CLOSED, OPEN } open_state;
168 //staic const char *printstate[] = { "CLOSED","OPEN"}; 168 //staic const char *printstate[] = { "CLOSED","OPEN"};
169 169
170 struct tok_info { 170 struct tok_info {
171 unsigned char irq; 171 unsigned char irq;
172 void __iomem *mmio; 172 void __iomem *mmio;
173 unsigned char hw_address[32]; 173 unsigned char hw_address[32];
174 unsigned char adapter_type; 174 unsigned char adapter_type;
175 unsigned char data_rate; 175 unsigned char data_rate;
176 unsigned char token_release; 176 unsigned char token_release;
177 unsigned char avail_shared_ram; 177 unsigned char avail_shared_ram;
178 unsigned char shared_ram_paging; 178 unsigned char shared_ram_paging;
179 unsigned char turbo; 179 unsigned char turbo;
180 unsigned short dhb_size4mb; 180 unsigned short dhb_size4mb;
181 unsigned short rbuf_len4; 181 unsigned short rbuf_len4;
182 unsigned short rbuf_cnt4; 182 unsigned short rbuf_cnt4;
183 unsigned short maxmtu4; 183 unsigned short maxmtu4;
184 unsigned short dhb_size16mb; 184 unsigned short dhb_size16mb;
185 unsigned short rbuf_len16; 185 unsigned short rbuf_len16;
186 unsigned short rbuf_cnt16; 186 unsigned short rbuf_cnt16;
187 unsigned short maxmtu16; 187 unsigned short maxmtu16;
188 /* Additions by David Morris */ 188 /* Additions by David Morris */
189 unsigned char do_tok_int; 189 unsigned char do_tok_int;
190 wait_queue_head_t wait_for_reset; 190 wait_queue_head_t wait_for_reset;
191 unsigned char sram_base; 191 unsigned char sram_base;
192 /* Additions by Peter De Schrijver */ 192 /* Additions by Peter De Schrijver */
193 unsigned char page_mask; /* mask to select RAM page to Map*/ 193 unsigned char page_mask; /* mask to select RAM page to Map*/
194 unsigned char mapped_ram_size; /* size of RAM page */ 194 unsigned char mapped_ram_size; /* size of RAM page */
195 __u32 sram_phys; /* Shared memory base address */ 195 __u32 sram_phys; /* Shared memory base address */
196 void __iomem *sram_virt; /* Shared memory base address */ 196 void __iomem *sram_virt; /* Shared memory base address */
197 void __iomem *init_srb; /* Initial System Request Block address */ 197 void __iomem *init_srb; /* Initial System Request Block address */
198 void __iomem *srb; /* System Request Block address */ 198 void __iomem *srb; /* System Request Block address */
199 void __iomem *ssb; /* System Status Block address */ 199 void __iomem *ssb; /* System Status Block address */
200 void __iomem *arb; /* Adapter Request Block address */ 200 void __iomem *arb; /* Adapter Request Block address */
201 void __iomem *asb; /* Adapter Status Block address */ 201 void __iomem *asb; /* Adapter Status Block address */
202 __u8 init_srb_page; 202 __u8 init_srb_page;
203 __u8 srb_page; 203 __u8 srb_page;
204 __u8 ssb_page; 204 __u8 ssb_page;
205 __u8 arb_page; 205 __u8 arb_page;
206 __u8 asb_page; 206 __u8 asb_page;
207 unsigned short exsap_station_id; 207 unsigned short exsap_station_id;
208 unsigned short global_int_enable; 208 unsigned short global_int_enable;
209 struct sk_buff *current_skb; 209 struct sk_buff *current_skb;
210 struct net_device_stats tr_stats; 210
211 unsigned char auto_speedsave; 211 unsigned char auto_speedsave;
212 open_state open_status, sap_status; 212 open_state open_status, sap_status;
213 enum {MANUAL, AUTOMATIC} open_mode; 213 enum {MANUAL, AUTOMATIC} open_mode;
214 enum {FAIL, RESTART, REOPEN} open_action; 214 enum {FAIL, RESTART, REOPEN} open_action;
215 enum {NO, YES} open_failure; 215 enum {NO, YES} open_failure;
216 unsigned char readlog_pending; 216 unsigned char readlog_pending;
217 unsigned short adapter_int_enable; /* Adapter-specific int enable */ 217 unsigned short adapter_int_enable; /* Adapter-specific int enable */
218 struct timer_list tr_timer; 218 struct timer_list tr_timer;
219 unsigned char ring_speed; 219 unsigned char ring_speed;
220 spinlock_t lock; /* SMP protection */ 220 spinlock_t lock; /* SMP protection */
221 }; 221 };
222 222
223 /* token ring adapter commands */ 223 /* token ring adapter commands */
224 #define DIR_INTERRUPT 0x00 /* struct srb_interrupt */ 224 #define DIR_INTERRUPT 0x00 /* struct srb_interrupt */
225 #define DIR_MOD_OPEN_PARAMS 0x01 225 #define DIR_MOD_OPEN_PARAMS 0x01
226 #define DIR_OPEN_ADAPTER 0x03 /* struct dir_open_adapter */ 226 #define DIR_OPEN_ADAPTER 0x03 /* struct dir_open_adapter */
227 #define DIR_CLOSE_ADAPTER 0x04 227 #define DIR_CLOSE_ADAPTER 0x04
228 #define DIR_SET_GRP_ADDR 0x06 228 #define DIR_SET_GRP_ADDR 0x06
229 #define DIR_SET_FUNC_ADDR 0x07 /* struct srb_set_funct_addr */ 229 #define DIR_SET_FUNC_ADDR 0x07 /* struct srb_set_funct_addr */
230 #define DIR_READ_LOG 0x08 /* struct srb_read_log */ 230 #define DIR_READ_LOG 0x08 /* struct srb_read_log */
231 #define DLC_OPEN_SAP 0x15 /* struct dlc_open_sap */ 231 #define DLC_OPEN_SAP 0x15 /* struct dlc_open_sap */
232 #define DLC_CLOSE_SAP 0x16 232 #define DLC_CLOSE_SAP 0x16
233 #define DATA_LOST 0x20 /* struct asb_rec */ 233 #define DATA_LOST 0x20 /* struct asb_rec */
234 #define REC_DATA 0x81 /* struct arb_rec_req */ 234 #define REC_DATA 0x81 /* struct arb_rec_req */
235 #define XMIT_DATA_REQ 0x82 /* struct arb_xmit_req */ 235 #define XMIT_DATA_REQ 0x82 /* struct arb_xmit_req */
236 #define DLC_STATUS 0x83 /* struct arb_dlc_status */ 236 #define DLC_STATUS 0x83 /* struct arb_dlc_status */
237 #define RING_STAT_CHANGE 0x84 /* struct dlc_open_sap ??? */ 237 #define RING_STAT_CHANGE 0x84 /* struct dlc_open_sap ??? */
238 238
239 /* DIR_OPEN_ADAPTER options */ 239 /* DIR_OPEN_ADAPTER options */
240 #define OPEN_PASS_BCON_MAC 0x0100 240 #define OPEN_PASS_BCON_MAC 0x0100
241 #define NUM_RCV_BUF 2 241 #define NUM_RCV_BUF 2
242 #define RCV_BUF_LEN 1024 242 #define RCV_BUF_LEN 1024
243 #define DHB_LENGTH 2048 243 #define DHB_LENGTH 2048
244 #define NUM_DHB 2 244 #define NUM_DHB 2
245 #define DLC_MAX_SAP 2 245 #define DLC_MAX_SAP 2
246 #define DLC_MAX_STA 1 246 #define DLC_MAX_STA 1
247 247
248 /* DLC_OPEN_SAP options */ 248 /* DLC_OPEN_SAP options */
249 #define MAX_I_FIELD 0x0088 249 #define MAX_I_FIELD 0x0088
250 #define SAP_OPEN_IND_SAP 0x04 250 #define SAP_OPEN_IND_SAP 0x04
251 #define SAP_OPEN_PRIORITY 0x20 251 #define SAP_OPEN_PRIORITY 0x20
252 #define SAP_OPEN_STATION_CNT 0x1 252 #define SAP_OPEN_STATION_CNT 0x1
253 #define XMIT_DIR_FRAME 0x0A 253 #define XMIT_DIR_FRAME 0x0A
254 #define XMIT_UI_FRAME 0x0d 254 #define XMIT_UI_FRAME 0x0d
255 #define XMIT_XID_CMD 0x0e 255 #define XMIT_XID_CMD 0x0e
256 #define XMIT_TEST_CMD 0x11 256 #define XMIT_TEST_CMD 0x11
257 257
258 /* srb close return code */ 258 /* srb close return code */
259 #define SIGNAL_LOSS 0x8000 259 #define SIGNAL_LOSS 0x8000
260 #define HARD_ERROR 0x4000 260 #define HARD_ERROR 0x4000
261 #define XMIT_BEACON 0x1000 261 #define XMIT_BEACON 0x1000
262 #define LOBE_FAULT 0x0800 262 #define LOBE_FAULT 0x0800
263 #define AUTO_REMOVAL 0x0400 263 #define AUTO_REMOVAL 0x0400
264 #define REMOVE_RECV 0x0100 264 #define REMOVE_RECV 0x0100
265 #define LOG_OVERFLOW 0x0080 265 #define LOG_OVERFLOW 0x0080
266 #define RING_RECOVER 0x0020 266 #define RING_RECOVER 0x0020
267 267
268 struct srb_init_response { 268 struct srb_init_response {
269 unsigned char command; 269 unsigned char command;
270 unsigned char init_status; 270 unsigned char init_status;
271 unsigned char init_status_2; 271 unsigned char init_status_2;
272 unsigned char reserved[3]; 272 unsigned char reserved[3];
273 __u16 bring_up_code; 273 __u16 bring_up_code;
274 __u16 encoded_address; 274 __u16 encoded_address;
275 __u16 level_address; 275 __u16 level_address;
276 __u16 adapter_address; 276 __u16 adapter_address;
277 __u16 parms_address; 277 __u16 parms_address;
278 __u16 mac_address; 278 __u16 mac_address;
279 }; 279 };
280 280
281 struct dir_open_adapter { 281 struct dir_open_adapter {
282 unsigned char command; 282 unsigned char command;
283 char reserved[7]; 283 char reserved[7];
284 __u16 open_options; 284 __u16 open_options;
285 unsigned char node_address[6]; 285 unsigned char node_address[6];
286 unsigned char group_address[4]; 286 unsigned char group_address[4];
287 unsigned char funct_address[4]; 287 unsigned char funct_address[4];
288 __u16 num_rcv_buf; 288 __u16 num_rcv_buf;
289 __u16 rcv_buf_len; 289 __u16 rcv_buf_len;
290 __u16 dhb_length; 290 __u16 dhb_length;
291 unsigned char num_dhb; 291 unsigned char num_dhb;
292 char reserved2; 292 char reserved2;
293 unsigned char dlc_max_sap; 293 unsigned char dlc_max_sap;
294 unsigned char dlc_max_sta; 294 unsigned char dlc_max_sta;
295 unsigned char dlc_max_gsap; 295 unsigned char dlc_max_gsap;
296 unsigned char dlc_max_gmem; 296 unsigned char dlc_max_gmem;
297 unsigned char dlc_t1_tick_1; 297 unsigned char dlc_t1_tick_1;
298 unsigned char dlc_t2_tick_1; 298 unsigned char dlc_t2_tick_1;
299 unsigned char dlc_ti_tick_1; 299 unsigned char dlc_ti_tick_1;
300 unsigned char dlc_t1_tick_2; 300 unsigned char dlc_t1_tick_2;
301 unsigned char dlc_t2_tick_2; 301 unsigned char dlc_t2_tick_2;
302 unsigned char dlc_ti_tick_2; 302 unsigned char dlc_ti_tick_2;
303 unsigned char product_id[18]; 303 unsigned char product_id[18];
304 }; 304 };
305 305
306 struct dlc_open_sap { 306 struct dlc_open_sap {
307 unsigned char command; 307 unsigned char command;
308 unsigned char reserved1; 308 unsigned char reserved1;
309 unsigned char ret_code; 309 unsigned char ret_code;
310 unsigned char reserved2; 310 unsigned char reserved2;
311 __u16 station_id; 311 __u16 station_id;
312 unsigned char timer_t1; 312 unsigned char timer_t1;
313 unsigned char timer_t2; 313 unsigned char timer_t2;
314 unsigned char timer_ti; 314 unsigned char timer_ti;
315 unsigned char maxout; 315 unsigned char maxout;
316 unsigned char maxin; 316 unsigned char maxin;
317 unsigned char maxout_incr; 317 unsigned char maxout_incr;
318 unsigned char max_retry_count; 318 unsigned char max_retry_count;
319 unsigned char gsap_max_mem; 319 unsigned char gsap_max_mem;
320 __u16 max_i_field; 320 __u16 max_i_field;
321 unsigned char sap_value; 321 unsigned char sap_value;
322 unsigned char sap_options; 322 unsigned char sap_options;
323 unsigned char station_count; 323 unsigned char station_count;
324 unsigned char sap_gsap_mem; 324 unsigned char sap_gsap_mem;
325 unsigned char gsap[0]; 325 unsigned char gsap[0];
326 }; 326 };
327 327
328 struct srb_xmit { 328 struct srb_xmit {
329 unsigned char command; 329 unsigned char command;
330 unsigned char cmd_corr; 330 unsigned char cmd_corr;
331 unsigned char ret_code; 331 unsigned char ret_code;
332 unsigned char reserved1; 332 unsigned char reserved1;
333 __u16 station_id; 333 __u16 station_id;
334 }; 334 };
335 335
336 struct arb_rec_req { 336 struct arb_rec_req {
337 unsigned char command; 337 unsigned char command;
338 unsigned char reserved1[3]; 338 unsigned char reserved1[3];
339 __u16 station_id; 339 __u16 station_id;
340 __u16 rec_buf_addr; 340 __u16 rec_buf_addr;
341 unsigned char lan_hdr_len; 341 unsigned char lan_hdr_len;
342 unsigned char dlc_hdr_len; 342 unsigned char dlc_hdr_len;
343 __u16 frame_len; 343 __u16 frame_len;
344 unsigned char msg_type; 344 unsigned char msg_type;
345 }; 345 };
346 346
347 struct asb_rec { 347 struct asb_rec {
348 unsigned char command; 348 unsigned char command;
349 unsigned char reserved1; 349 unsigned char reserved1;
350 unsigned char ret_code; 350 unsigned char ret_code;
351 unsigned char reserved2; 351 unsigned char reserved2;
352 __u16 station_id; 352 __u16 station_id;
353 __u16 rec_buf_addr; 353 __u16 rec_buf_addr;
354 }; 354 };
355 355
356 struct rec_buf { 356 struct rec_buf {
357 unsigned char reserved1[2]; 357 unsigned char reserved1[2];
358 __u16 buf_ptr; 358 __u16 buf_ptr;
359 unsigned char reserved2; 359 unsigned char reserved2;
360 unsigned char receive_fs; 360 unsigned char receive_fs;
361 __u16 buf_len; 361 __u16 buf_len;
362 unsigned char data[0]; 362 unsigned char data[0];
363 }; 363 };
364 364
365 struct srb_set_funct_addr { 365 struct srb_set_funct_addr {
366 unsigned char command; 366 unsigned char command;
367 unsigned char reserved1; 367 unsigned char reserved1;
368 unsigned char ret_code; 368 unsigned char ret_code;
369 unsigned char reserved2[3]; 369 unsigned char reserved2[3];
370 unsigned char funct_address[4]; 370 unsigned char funct_address[4];
371 }; 371 };
372 372
373 #endif 373 #endif
374 374