Doug / smarc-fsl-linux-kernel

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/*

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/*

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* iio/adc/max1363.c

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* iio/adc/max1363.c

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*

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*

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* based on linux/drivers/i2c/chips/max123x

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* based on linux/drivers/i2c/chips/max123x

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*

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*

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* based on linux/drivers/acron/char/pcf8583.c

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* based on linux/drivers/acron/char/pcf8583.c

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*

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*

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* This program is free software; you can redistribute it and/or modify

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* This program is free software; you can redistribute it and/or modify

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* it under the terms of the GNU General Public License version 2 as

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* it under the terms of the GNU General Public License version 2 as

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* published by the Free Software Foundation.

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* published by the Free Software Foundation.

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*

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*

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* max1363.c

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* max1363.c

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*

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*

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* Partial support for max1363 and similar chips.

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* Partial support for max1363 and similar chips.

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*

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*

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* Not currently implemented.

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* Not currently implemented.

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*

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*

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* - Control of internal reference.

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* - Control of internal reference.

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*/

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*/

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#include <linux/interrupt.h>

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#include <linux/interrupt.h>

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#include <linux/device.h>

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#include <linux/device.h>

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#include <linux/kernel.h>

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#include <linux/kernel.h>

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#include <linux/sysfs.h>

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#include <linux/sysfs.h>

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#include <linux/list.h>

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#include <linux/list.h>

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#include <linux/i2c.h>

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#include <linux/i2c.h>

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#include <linux/regulator/consumer.h>

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#include <linux/regulator/consumer.h>

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#include <linux/slab.h>

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#include <linux/slab.h>

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#include <linux/err.h>

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#include <linux/err.h>

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#include <linux/module.h>

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#include <linux/module.h>

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#include <linux/iio/iio.h>

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#include <linux/iio/iio.h>

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#include <linux/iio/sysfs.h>

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#include <linux/iio/sysfs.h>

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#include <linux/iio/events.h>

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#include <linux/iio/events.h>

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#include <linux/iio/buffer.h>

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#include <linux/iio/buffer.h>

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#include <linux/iio/driver.h>

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#include <linux/iio/driver.h>

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#include <linux/iio/kfifo_buf.h>

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#include <linux/iio/kfifo_buf.h>

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#include <linux/iio/trigger_consumer.h>

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#include <linux/iio/trigger_consumer.h>

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#include <linux/iio/triggered_buffer.h>

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#include <linux/iio/triggered_buffer.h>

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#define MAX1363_SETUP_BYTE(a) ((a) | 0x80)

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#define MAX1363_SETUP_BYTE(a) ((a) | 0x80)

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/* There is a fair bit more defined here than currently

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/* There is a fair bit more defined here than currently

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* used, but the intention is to support everything these

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* used, but the intention is to support everything these

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* chips do in the long run */

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* chips do in the long run */

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/* see data sheets */

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/* see data sheets */

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/* max1363 and max1236, max1237, max1238, max1239 */

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/* max1363 and max1236, max1237, max1238, max1239 */

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#define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD 0x00

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#define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD 0x00

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#define MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF 0x20

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#define MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF 0x20

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#define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_INT 0x40

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#define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_INT 0x40

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#define MAX1363_SETUP_AIN3_IS_REF_REF_IS_INT 0x60

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#define MAX1363_SETUP_AIN3_IS_REF_REF_IS_INT 0x60

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#define MAX1363_SETUP_POWER_UP_INT_REF 0x10

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#define MAX1363_SETUP_POWER_UP_INT_REF 0x10

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#define MAX1363_SETUP_POWER_DOWN_INT_REF 0x00

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#define MAX1363_SETUP_POWER_DOWN_INT_REF 0x00

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/* think about including max11600 etc - more settings */

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/* think about including max11600 etc - more settings */

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#define MAX1363_SETUP_EXT_CLOCK 0x08

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#define MAX1363_SETUP_EXT_CLOCK 0x08

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#define MAX1363_SETUP_INT_CLOCK 0x00

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#define MAX1363_SETUP_INT_CLOCK 0x00

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#define MAX1363_SETUP_UNIPOLAR 0x00

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#define MAX1363_SETUP_UNIPOLAR 0x00

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#define MAX1363_SETUP_BIPOLAR 0x04

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#define MAX1363_SETUP_BIPOLAR 0x04

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#define MAX1363_SETUP_RESET 0x00

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#define MAX1363_SETUP_RESET 0x00

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#define MAX1363_SETUP_NORESET 0x02

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#define MAX1363_SETUP_NORESET 0x02

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/* max1363 only - though don't care on others.

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/* max1363 only - though don't care on others.

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* For now monitor modes are not implemented as the relevant

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* For now monitor modes are not implemented as the relevant

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* line is not connected on my test board.

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* line is not connected on my test board.

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* The definitions are here as I intend to add this soon.

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* The definitions are here as I intend to add this soon.

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*/

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*/

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#define MAX1363_SETUP_MONITOR_SETUP 0x01

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#define MAX1363_SETUP_MONITOR_SETUP 0x01

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/* Specific to the max1363 */

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/* Specific to the max1363 */

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#define MAX1363_MON_RESET_CHAN(a) (1 << ((a) + 4))

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#define MAX1363_MON_RESET_CHAN(a) (1 << ((a) + 4))

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#define MAX1363_MON_INT_ENABLE 0x01

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#define MAX1363_MON_INT_ENABLE 0x01

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/* defined for readability reasons */

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/* defined for readability reasons */

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/* All chips */

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/* All chips */

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#define MAX1363_CONFIG_BYTE(a) ((a))

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#define MAX1363_CONFIG_BYTE(a) ((a))

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#define MAX1363_CONFIG_SE 0x01

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#define MAX1363_CONFIG_SE 0x01

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#define MAX1363_CONFIG_DE 0x00

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#define MAX1363_CONFIG_DE 0x00

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#define MAX1363_CONFIG_SCAN_TO_CS 0x00

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#define MAX1363_CONFIG_SCAN_TO_CS 0x00

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#define MAX1363_CONFIG_SCAN_SINGLE_8 0x20

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#define MAX1363_CONFIG_SCAN_SINGLE_8 0x20

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#define MAX1363_CONFIG_SCAN_MONITOR_MODE 0x40

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#define MAX1363_CONFIG_SCAN_MONITOR_MODE 0x40

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#define MAX1363_CONFIG_SCAN_SINGLE_1 0x60

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#define MAX1363_CONFIG_SCAN_SINGLE_1 0x60

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/* max123{6-9} only */

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/* max123{6-9} only */

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#define MAX1236_SCAN_MID_TO_CHANNEL 0x40

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#define MAX1236_SCAN_MID_TO_CHANNEL 0x40

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/* max1363 only - merely part of channel selects or don't care for others */

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/* max1363 only - merely part of channel selects or don't care for others */

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#define MAX1363_CONFIG_EN_MON_MODE_READ 0x18

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#define MAX1363_CONFIG_EN_MON_MODE_READ 0x18

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#define MAX1363_CHANNEL_SEL(a) ((a) << 1)

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#define MAX1363_CHANNEL_SEL(a) ((a) << 1)

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/* max1363 strictly 0x06 - but doesn't matter */

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/* max1363 strictly 0x06 - but doesn't matter */

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#define MAX1363_CHANNEL_SEL_MASK 0x1E

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#define MAX1363_CHANNEL_SEL_MASK 0x1E

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#define MAX1363_SCAN_MASK 0x60

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#define MAX1363_SCAN_MASK 0x60

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#define MAX1363_SE_DE_MASK 0x01

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#define MAX1363_SE_DE_MASK 0x01

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#define MAX1363_MAX_CHANNELS 25

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#define MAX1363_MAX_CHANNELS 25

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/**

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/**

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* struct max1363_mode - scan mode information

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* struct max1363_mode - scan mode information

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* @conf: The corresponding value of the configuration register

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* @conf: The corresponding value of the configuration register

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* @modemask: Bit mask corresponding to channels enabled in this mode

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* @modemask: Bit mask corresponding to channels enabled in this mode

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*/

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*/

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struct max1363_mode {

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struct max1363_mode {

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int8_t conf;

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int8_t conf;

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DECLARE_BITMAP(modemask, MAX1363_MAX_CHANNELS);

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DECLARE_BITMAP(modemask, MAX1363_MAX_CHANNELS);

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};

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};

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/* This must be maintained along side the max1363_mode_table in max1363_core */

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/* This must be maintained along side the max1363_mode_table in max1363_core */

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enum max1363_modes {

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enum max1363_modes {

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/* Single read of a single channel */

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/* Single read of a single channel */

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_s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,

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_s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,

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/* Differential single read */

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/* Differential single read */

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d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,

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d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,

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d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,

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d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,

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/* Scan to channel and mid to channel where overlapping */

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/* Scan to channel and mid to channel where overlapping */

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s0to1, s0to2, s2to3, s0to3, s0to4, s0to5, s0to6,

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s0to1, s0to2, s2to3, s0to3, s0to4, s0to5, s0to6,

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s6to7, s0to7, s6to8, s0to8, s6to9,

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s6to7, s0to7, s6to8, s0to8, s6to9,

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s0to9, s6to10, s0to10, s6to11, s0to11,

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s0to9, s6to10, s0to10, s6to11, s0to11,

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/* Differential scan to channel and mid to channel where overlapping */

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/* Differential scan to channel and mid to channel where overlapping */

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d0m1to2m3, d0m1to4m5, d0m1to6m7, d6m7to8m9,

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d0m1to2m3, d0m1to4m5, d0m1to6m7, d6m7to8m9,

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d0m1to8m9, d6m7to10m11, d0m1to10m11, d1m0to3m2,

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d0m1to8m9, d6m7to10m11, d0m1to10m11, d1m0to3m2,

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d1m0to5m4, d1m0to7m6, d7m6to9m8, d1m0to9m8,

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d1m0to5m4, d1m0to7m6, d7m6to9m8, d1m0to9m8,

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d7m6to11m10, d1m0to11m10,

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d7m6to11m10, d1m0to11m10,

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};

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};

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/**

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/**

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* struct max1363_chip_info - chip specifc information

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* struct max1363_chip_info - chip specifc information

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* @info: iio core function callbacks structure

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* @info: iio core function callbacks structure

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* @channels: channel specification

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* @channels: channel specification

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* @num_channels: number of channels

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* @num_channels: number of channels

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* @mode_list: array of available scan modes

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* @mode_list: array of available scan modes

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* @default_mode: the scan mode in which the chip starts up

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* @default_mode: the scan mode in which the chip starts up

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* @int_vref_mv: the internal reference voltage

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* @int_vref_mv: the internal reference voltage

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* @num_modes: number of modes

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* @num_modes: number of modes

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* @bits: accuracy of the adc in bits

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* @bits: accuracy of the adc in bits

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*/

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*/

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struct max1363_chip_info {

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struct max1363_chip_info {

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const struct iio_info *info;

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const struct iio_info *info;

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const struct iio_chan_spec *channels;

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const struct iio_chan_spec *channels;

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int num_channels;

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int num_channels;

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const enum max1363_modes *mode_list;

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const enum max1363_modes *mode_list;

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enum max1363_modes default_mode;

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enum max1363_modes default_mode;

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u16 int_vref_mv;

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u16 int_vref_mv;

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u8 num_modes;

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u8 num_modes;

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u8 bits;

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u8 bits;

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};

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};

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/**

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/**

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* struct max1363_state - driver instance specific data

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* struct max1363_state - driver instance specific data

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* @client: i2c_client

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* @client: i2c_client

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* @setupbyte: cache of current device setup byte

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* @setupbyte: cache of current device setup byte

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* @configbyte: cache of current device config byte

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* @configbyte: cache of current device config byte

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* @chip_info: chip model specific constants, available modes, etc.

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* @chip_info: chip model specific constants, available modes, etc.

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* @current_mode: the scan mode of this chip

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* @current_mode: the scan mode of this chip

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* @requestedmask: a valid requested set of channels

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* @requestedmask: a valid requested set of channels

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* @reg: supply regulator

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* @reg: supply regulator

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* @monitor_on: whether monitor mode is enabled

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* @monitor_on: whether monitor mode is enabled

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* @monitor_speed: parameter corresponding to device monitor speed setting

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* @monitor_speed: parameter corresponding to device monitor speed setting

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* @mask_high: bitmask for enabled high thresholds

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* @mask_high: bitmask for enabled high thresholds

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* @mask_low: bitmask for enabled low thresholds

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* @mask_low: bitmask for enabled low thresholds

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* @thresh_high: high threshold values

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* @thresh_high: high threshold values

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* @thresh_low: low threshold values

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* @thresh_low: low threshold values

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* @vref: Reference voltage regulator

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* @vref_uv: Actual (external or internal) reference voltage

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*/

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*/

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struct max1363_state {

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struct max1363_state {

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struct i2c_client *client;

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struct i2c_client *client;

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u8 setupbyte;

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u8 setupbyte;

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u8 configbyte;

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u8 configbyte;

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const struct max1363_chip_info *chip_info;

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const struct max1363_chip_info *chip_info;

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const struct max1363_mode *current_mode;

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const struct max1363_mode *current_mode;

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u32 requestedmask;

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u32 requestedmask;

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struct regulator *reg;

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struct regulator *reg;

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/* Using monitor modes and buffer at the same time is

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/* Using monitor modes and buffer at the same time is

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currently not supported */

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currently not supported */

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bool monitor_on;

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bool monitor_on;

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unsigned int monitor_speed:3;

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unsigned int monitor_speed:3;

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u8 mask_high;

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u8 mask_high;

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u8 mask_low;

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u8 mask_low;

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/* 4x unipolar first then the fours bipolar ones */

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/* 4x unipolar first then the fours bipolar ones */

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s16 thresh_high[8];

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s16 thresh_high[8];

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s16 thresh_low[8];

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s16 thresh_low[8];

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struct regulator *vref;

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u32 vref_uv;

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};

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};

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#define MAX1363_MODE_SINGLE(_num, _mask) { \

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#define MAX1363_MODE_SINGLE(_num, _mask) { \

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.conf = MAX1363_CHANNEL_SEL(_num) \

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.conf = MAX1363_CHANNEL_SEL(_num) \

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| MAX1363_CONFIG_SCAN_SINGLE_1 \

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| MAX1363_CONFIG_SCAN_SINGLE_1 \

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| MAX1363_CONFIG_SE, \

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| MAX1363_CONFIG_SE, \

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.modemask[0] = _mask, \

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.modemask[0] = _mask, \

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}

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}

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#define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) { \

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#define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) { \

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.conf = MAX1363_CHANNEL_SEL(_num) \

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.conf = MAX1363_CHANNEL_SEL(_num) \

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| MAX1363_CONFIG_SCAN_TO_CS \

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| MAX1363_CONFIG_SCAN_TO_CS \

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| MAX1363_CONFIG_SE, \

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| MAX1363_CONFIG_SE, \

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.modemask[0] = _mask, \

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.modemask[0] = _mask, \

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}

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}

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/* note not available for max1363 hence naming */

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/* note not available for max1363 hence naming */

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#define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) { \

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#define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) { \

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.conf = MAX1363_CHANNEL_SEL(_num) \

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.conf = MAX1363_CHANNEL_SEL(_num) \

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| MAX1236_SCAN_MID_TO_CHANNEL \

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| MAX1236_SCAN_MID_TO_CHANNEL \

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| MAX1363_CONFIG_SE, \

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| MAX1363_CONFIG_SE, \

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.modemask[0] = _mask \

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.modemask[0] = _mask \

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}

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}

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#define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) { \

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#define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) { \

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.conf = MAX1363_CHANNEL_SEL(_nump) \

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.conf = MAX1363_CHANNEL_SEL(_nump) \

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| MAX1363_CONFIG_SCAN_SINGLE_1 \

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| MAX1363_CONFIG_SCAN_SINGLE_1 \

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| MAX1363_CONFIG_DE, \

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| MAX1363_CONFIG_DE, \

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.modemask[0] = _mask \

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.modemask[0] = _mask \

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}

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}

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/* Can't think how to automate naming so specify for now */

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/* Can't think how to automate naming so specify for now */

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#define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) { \

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#define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) { \

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.conf = MAX1363_CHANNEL_SEL(_num) \

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.conf = MAX1363_CHANNEL_SEL(_num) \

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| MAX1363_CONFIG_SCAN_TO_CS \

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| MAX1363_CONFIG_SCAN_TO_CS \

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| MAX1363_CONFIG_DE, \

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| MAX1363_CONFIG_DE, \

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.modemask[0] = _mask \

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.modemask[0] = _mask \

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}

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}

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/* note only available for max1363 hence naming */

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/* note only available for max1363 hence naming */

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#define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(_num, _numvals, _mask) { \

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#define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(_num, _numvals, _mask) { \

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.conf = MAX1363_CHANNEL_SEL(_num) \

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.conf = MAX1363_CHANNEL_SEL(_num) \

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| MAX1236_SCAN_MID_TO_CHANNEL \

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| MAX1236_SCAN_MID_TO_CHANNEL \

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| MAX1363_CONFIG_SE, \

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| MAX1363_CONFIG_SE, \

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.modemask[0] = _mask \

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.modemask[0] = _mask \

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}

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}

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static const struct max1363_mode max1363_mode_table[] = {

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static const struct max1363_mode max1363_mode_table[] = {

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/* All of the single channel options first */

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/* All of the single channel options first */

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MAX1363_MODE_SINGLE(0, 1 << 0),

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MAX1363_MODE_SINGLE(0, 1 << 0),

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MAX1363_MODE_SINGLE(1, 1 << 1),

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MAX1363_MODE_SINGLE(1, 1 << 1),

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MAX1363_MODE_SINGLE(2, 1 << 2),

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MAX1363_MODE_SINGLE(2, 1 << 2),

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MAX1363_MODE_SINGLE(3, 1 << 3),

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MAX1363_MODE_SINGLE(3, 1 << 3),

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MAX1363_MODE_SINGLE(4, 1 << 4),

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MAX1363_MODE_SINGLE(4, 1 << 4),

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MAX1363_MODE_SINGLE(5, 1 << 5),

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MAX1363_MODE_SINGLE(5, 1 << 5),

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MAX1363_MODE_SINGLE(6, 1 << 6),

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MAX1363_MODE_SINGLE(6, 1 << 6),

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MAX1363_MODE_SINGLE(7, 1 << 7),

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MAX1363_MODE_SINGLE(7, 1 << 7),

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MAX1363_MODE_SINGLE(8, 1 << 8),

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MAX1363_MODE_SINGLE(8, 1 << 8),

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MAX1363_MODE_SINGLE(9, 1 << 9),

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MAX1363_MODE_SINGLE(9, 1 << 9),

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MAX1363_MODE_SINGLE(10, 1 << 10),

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MAX1363_MODE_SINGLE(10, 1 << 10),

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MAX1363_MODE_SINGLE(11, 1 << 11),

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MAX1363_MODE_SINGLE(11, 1 << 11),

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MAX1363_MODE_DIFF_SINGLE(0, 1, 1 << 12),

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MAX1363_MODE_DIFF_SINGLE(0, 1, 1 << 12),

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MAX1363_MODE_DIFF_SINGLE(2, 3, 1 << 13),

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MAX1363_MODE_DIFF_SINGLE(2, 3, 1 << 13),

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MAX1363_MODE_DIFF_SINGLE(4, 5, 1 << 14),

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MAX1363_MODE_DIFF_SINGLE(4, 5, 1 << 14),

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MAX1363_MODE_DIFF_SINGLE(6, 7, 1 << 15),

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MAX1363_MODE_DIFF_SINGLE(6, 7, 1 << 15),

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MAX1363_MODE_DIFF_SINGLE(8, 9, 1 << 16),

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MAX1363_MODE_DIFF_SINGLE(8, 9, 1 << 16),

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MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17),

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MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17),

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MAX1363_MODE_DIFF_SINGLE(1, 0, 1 << 18),

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MAX1363_MODE_DIFF_SINGLE(1, 0, 1 << 18),

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MAX1363_MODE_DIFF_SINGLE(3, 2, 1 << 19),

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MAX1363_MODE_DIFF_SINGLE(3, 2, 1 << 19),

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MAX1363_MODE_DIFF_SINGLE(5, 4, 1 << 20),

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MAX1363_MODE_DIFF_SINGLE(5, 4, 1 << 20),

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MAX1363_MODE_DIFF_SINGLE(7, 6, 1 << 21),

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MAX1363_MODE_DIFF_SINGLE(7, 6, 1 << 21),

257

MAX1363_MODE_DIFF_SINGLE(9, 8, 1 << 22),

261

MAX1363_MODE_DIFF_SINGLE(9, 8, 1 << 22),

258

MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23),

262

MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23),

259

263

260

/* The multichannel scans next */

264

/* The multichannel scans next */

261

MAX1363_MODE_SCAN_TO_CHANNEL(1, 0x003),

265

MAX1363_MODE_SCAN_TO_CHANNEL(1, 0x003),

262

MAX1363_MODE_SCAN_TO_CHANNEL(2, 0x007),

266

MAX1363_MODE_SCAN_TO_CHANNEL(2, 0x007),

263

MAX1236_MODE_SCAN_MID_TO_CHANNEL(2, 3, 0x00C),

267

MAX1236_MODE_SCAN_MID_TO_CHANNEL(2, 3, 0x00C),

264

MAX1363_MODE_SCAN_TO_CHANNEL(3, 0x00F),

268

MAX1363_MODE_SCAN_TO_CHANNEL(3, 0x00F),

265

MAX1363_MODE_SCAN_TO_CHANNEL(4, 0x01F),

269

MAX1363_MODE_SCAN_TO_CHANNEL(4, 0x01F),

266

MAX1363_MODE_SCAN_TO_CHANNEL(5, 0x03F),

270

MAX1363_MODE_SCAN_TO_CHANNEL(5, 0x03F),

267

MAX1363_MODE_SCAN_TO_CHANNEL(6, 0x07F),

271

MAX1363_MODE_SCAN_TO_CHANNEL(6, 0x07F),

268

MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 7, 0x0C0),

272

MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 7, 0x0C0),

269

MAX1363_MODE_SCAN_TO_CHANNEL(7, 0x0FF),

273

MAX1363_MODE_SCAN_TO_CHANNEL(7, 0x0FF),

270

MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 8, 0x1C0),

274

MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 8, 0x1C0),

271

MAX1363_MODE_SCAN_TO_CHANNEL(8, 0x1FF),

275

MAX1363_MODE_SCAN_TO_CHANNEL(8, 0x1FF),

272

MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 9, 0x3C0),

276

MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 9, 0x3C0),

273

MAX1363_MODE_SCAN_TO_CHANNEL(9, 0x3FF),

277

MAX1363_MODE_SCAN_TO_CHANNEL(9, 0x3FF),

274

MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10, 0x7C0),

278

MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10, 0x7C0),

275

MAX1363_MODE_SCAN_TO_CHANNEL(10, 0x7FF),

279

MAX1363_MODE_SCAN_TO_CHANNEL(10, 0x7FF),

276

MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 11, 0xFC0),

280

MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 11, 0xFC0),

277

MAX1363_MODE_SCAN_TO_CHANNEL(11, 0xFFF),

281

MAX1363_MODE_SCAN_TO_CHANNEL(11, 0xFFF),

278

282

279

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(2, 2, 0x003000),

283

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(2, 2, 0x003000),

280

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(4, 3, 0x007000),

284

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(4, 3, 0x007000),

281

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(6, 4, 0x00F000),

285

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(6, 4, 0x00F000),

282

MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(8, 2, 0x018000),

286

MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(8, 2, 0x018000),

283

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(8, 5, 0x01F000),

287

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(8, 5, 0x01F000),

284

MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(10, 3, 0x038000),

288

MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(10, 3, 0x038000),

285

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(10, 6, 0x3F000),

289

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(10, 6, 0x3F000),

286

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(3, 2, 0x0C0000),

290

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(3, 2, 0x0C0000),

287

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(5, 3, 0x1C0000),

291

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(5, 3, 0x1C0000),

288

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(7, 4, 0x3C0000),

292

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(7, 4, 0x3C0000),

289

MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(9, 2, 0x600000),

293

MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(9, 2, 0x600000),

290

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(9, 5, 0x7C0000),

294

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(9, 5, 0x7C0000),

291

MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(11, 3, 0xE00000),

295

MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(11, 3, 0xE00000),

292

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000),

296

MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000),

293

};

297

};

294

298

295

static const struct max1363_mode

299

static const struct max1363_mode

296

*max1363_match_mode(const unsigned long *mask,

300

*max1363_match_mode(const unsigned long *mask,

297

const struct max1363_chip_info *ci)

301

const struct max1363_chip_info *ci)

298

{

302

{

299

int i;

303

int i;

300

if (mask)

304

if (mask)

301

for (i = 0; i < ci->num_modes; i++)

305

for (i = 0; i < ci->num_modes; i++)

302

if (bitmap_subset(mask,

306

if (bitmap_subset(mask,

303

max1363_mode_table[ci->mode_list[i]].

307

max1363_mode_table[ci->mode_list[i]].

304

modemask,

308

modemask,

305

MAX1363_MAX_CHANNELS))

309

MAX1363_MAX_CHANNELS))

306

return &max1363_mode_table[ci->mode_list[i]];

310

return &max1363_mode_table[ci->mode_list[i]];

307

return NULL;

311

return NULL;

308

}

312

}

309

313

310

static int max1363_write_basic_config(struct i2c_client *client,

314

static int max1363_write_basic_config(struct i2c_client *client,

311

unsigned char d1,

315

unsigned char d1,

312

unsigned char d2)

316

unsigned char d2)

313

{

317

{

314

u8 tx_buf[2] = {d1, d2};

318

u8 tx_buf[2] = {d1, d2};

315

319

316

return i2c_master_send(client, tx_buf, 2);

320

return i2c_master_send(client, tx_buf, 2);

317

}

321

}

318

322

319

static int max1363_set_scan_mode(struct max1363_state *st)

323

static int max1363_set_scan_mode(struct max1363_state *st)

320

{

324

{

321

st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK

325

st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK

322

| MAX1363_SCAN_MASK

326

| MAX1363_SCAN_MASK

323

| MAX1363_SE_DE_MASK);

327

| MAX1363_SE_DE_MASK);

324

st->configbyte |= st->current_mode->conf;

328

st->configbyte |= st->current_mode->conf;

325

329

326

return max1363_write_basic_config(st->client,

330

return max1363_write_basic_config(st->client,

327

st->setupbyte,

331

st->setupbyte,

328

st->configbyte);

332

st->configbyte);

329

}

333

}

330

334

331

static int max1363_read_single_chan(struct iio_dev *indio_dev,

335

static int max1363_read_single_chan(struct iio_dev *indio_dev,

332

struct iio_chan_spec const *chan,

336

struct iio_chan_spec const *chan,

333

int *val,

337

int *val,

334

long m)

338

long m)

335

{

339

{

336

int ret = 0;

340

int ret = 0;

337

s32 data;

341

s32 data;

338

u8 rxbuf[2];

342

u8 rxbuf[2];

339

struct max1363_state *st = iio_priv(indio_dev);

343

struct max1363_state *st = iio_priv(indio_dev);

340

struct i2c_client *client = st->client;

344

struct i2c_client *client = st->client;

341

345

342

mutex_lock(&indio_dev->mlock);

346

mutex_lock(&indio_dev->mlock);

343

/*

347

/*

344

* If monitor mode is enabled, the method for reading a single

348

* If monitor mode is enabled, the method for reading a single

345

* channel will have to be rather different and has not yet

349

* channel will have to be rather different and has not yet

346

* been implemented.

350

* been implemented.

347

*

351

*

348

* Also, cannot read directly if buffered capture enabled.

352

* Also, cannot read directly if buffered capture enabled.

349

*/

353

*/

350

if (st->monitor_on || iio_buffer_enabled(indio_dev)) {

354

if (st->monitor_on || iio_buffer_enabled(indio_dev)) {

351

ret = -EBUSY;

355

ret = -EBUSY;

352

goto error_ret;

356

goto error_ret;

353

}

357

}

354

358

355

/* Check to see if current scan mode is correct */

359

/* Check to see if current scan mode is correct */

356

if (st->current_mode != &max1363_mode_table[chan->address]) {

360

if (st->current_mode != &max1363_mode_table[chan->address]) {

357

/* Update scan mode if needed */

361

/* Update scan mode if needed */

358

st->current_mode = &max1363_mode_table[chan->address];

362

st->current_mode = &max1363_mode_table[chan->address];

359

ret = max1363_set_scan_mode(st);

363

ret = max1363_set_scan_mode(st);

360

if (ret < 0)

364

if (ret < 0)

361

goto error_ret;

365

goto error_ret;

362

}

366

}

363

if (st->chip_info->bits != 8) {

367

if (st->chip_info->bits != 8) {

364

/* Get reading */

368

/* Get reading */

365

data = i2c_master_recv(client, rxbuf, 2);

369

data = i2c_master_recv(client, rxbuf, 2);

366

if (data < 0) {

370

if (data < 0) {

367

ret = data;

371

ret = data;

368

goto error_ret;

372

goto error_ret;

369

}

373

}

370

data = (rxbuf[1] | rxbuf[0] << 8) &

374

data = (rxbuf[1] | rxbuf[0] << 8) &

371

((1 << st->chip_info->bits) - 1);

375

((1 << st->chip_info->bits) - 1);

372

} else {

376

} else {

373

/* Get reading */

377

/* Get reading */

374

data = i2c_master_recv(client, rxbuf, 1);

378

data = i2c_master_recv(client, rxbuf, 1);

375

if (data < 0) {

379

if (data < 0) {

376

ret = data;

380

ret = data;

377

goto error_ret;

381

goto error_ret;

378

}

382

}

379

data = rxbuf[0];

383

data = rxbuf[0];

380

}

384

}

381

*val = data;

385

*val = data;

382

error_ret:

386

error_ret:

383

mutex_unlock(&indio_dev->mlock);

387

mutex_unlock(&indio_dev->mlock);

384

return ret;

388

return ret;

385

389

386

}

390

}

387

391

388

static int max1363_read_raw(struct iio_dev *indio_dev,

392

static int max1363_read_raw(struct iio_dev *indio_dev,

389

struct iio_chan_spec const *chan,

393

struct iio_chan_spec const *chan,

390

int *val,

394

int *val,

391

int *val2,

395

int *val2,

392

long m)

396

long m)

393

{

397

{

394

struct max1363_state *st = iio_priv(indio_dev);

398

struct max1363_state *st = iio_priv(indio_dev);

395

int ret;

399

int ret;

400

unsigned long scale_uv;

401

396

switch (m) {

402

switch (m) {

397

case IIO_CHAN_INFO_RAW:

403

case IIO_CHAN_INFO_RAW:

398

ret = max1363_read_single_chan(indio_dev, chan, val, m);

404

ret = max1363_read_single_chan(indio_dev, chan, val, m);

399

if (ret < 0)

405

if (ret < 0)

400

return ret;

406

return ret;

401

return IIO_VAL_INT;

407

return IIO_VAL_INT;

402

case IIO_CHAN_INFO_SCALE:

408

case IIO_CHAN_INFO_SCALE:

403

if ((1 << (st->chip_info->bits + 1)) >

409

scale_uv = st->vref_uv >> st->chip_info->bits;

404

st->chip_info->int_vref_mv) {

410

*val = scale_uv / 1000;

405

*val = 0;

411

*val2 = (scale_uv % 1000) * 1000;

406

*val2 = 500000;

412

return IIO_VAL_INT_PLUS_MICRO;

407

return IIO_VAL_INT_PLUS_MICRO;

408

} else {

409

*val = (st->chip_info->int_vref_mv)

410

>> st->chip_info->bits;

411

return IIO_VAL_INT;

412

}

413

default:

413

default:

414

return -EINVAL;

414

return -EINVAL;

415

}

415

}

416

return 0;

416

return 0;

417

}

417

}

418

419

/* Applies to max1363 */

419

/* Applies to max1363 */

420

static const enum max1363_modes max1363_mode_list[] = {

420

static const enum max1363_modes max1363_mode_list[] = {

421

_s0, _s1, _s2, _s3,

421

_s0, _s1, _s2, _s3,

422

s0to1, s0to2, s0to3,

422

s0to1, s0to2, s0to3,

423

d0m1, d2m3, d1m0, d3m2,

423

d0m1, d2m3, d1m0, d3m2,

424

d0m1to2m3, d1m0to3m2,

424

d0m1to2m3, d1m0to3m2,

425

};

425

};

426

427

#define MAX1363_EV_M \

427

#define MAX1363_EV_M \

428

(IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) \

428

(IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) \

429

| IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING))

429

| IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING))

430

#define MAX1363_INFO_MASK (IIO_CHAN_INFO_RAW_SEPARATE_BIT | \

430

#define MAX1363_INFO_MASK (IIO_CHAN_INFO_RAW_SEPARATE_BIT | \

431

IIO_CHAN_INFO_SCALE_SHARED_BIT)

431

IIO_CHAN_INFO_SCALE_SHARED_BIT)

432

#define MAX1363_CHAN_U(num, addr, si, bits, evmask) \

432

#define MAX1363_CHAN_U(num, addr, si, bits, evmask) \

433

{ \

433

{ \

434

.type = IIO_VOLTAGE, \

434

.type = IIO_VOLTAGE, \

435

.indexed = 1, \

435

.indexed = 1, \

436

.channel = num, \

436

.channel = num, \

437

.address = addr, \

437

.address = addr, \

438

.info_mask = MAX1363_INFO_MASK, \

438

.info_mask = MAX1363_INFO_MASK, \

439

.datasheet_name = "AIN"#num, \

439

.datasheet_name = "AIN"#num, \

440

.scan_type = { \

440

.scan_type = { \

441

.sign = 'u', \

441

.sign = 'u', \

442

.realbits = bits, \

442

.realbits = bits, \

443

.storagebits = (bits > 8) ? 16 : 8, \

443

.storagebits = (bits > 8) ? 16 : 8, \

444

.endianness = IIO_BE, \

444

.endianness = IIO_BE, \

445

}, \

445

}, \

446

.scan_index = si, \

446

.scan_index = si, \

447

.event_mask = evmask, \

447

.event_mask = evmask, \

448

}

448

}

449

450

/* bipolar channel */

450

/* bipolar channel */

451

#define MAX1363_CHAN_B(num, num2, addr, si, bits, evmask) \

451

#define MAX1363_CHAN_B(num, num2, addr, si, bits, evmask) \

452

{ \

452

{ \

453

.type = IIO_VOLTAGE, \

453

.type = IIO_VOLTAGE, \

454

.differential = 1, \

454

.differential = 1, \

455

.indexed = 1, \

455

.indexed = 1, \

456

.channel = num, \

456

.channel = num, \

457

.channel2 = num2, \

457

.channel2 = num2, \

458

.address = addr, \

458

.address = addr, \

459

.info_mask = MAX1363_INFO_MASK, \

459

.info_mask = MAX1363_INFO_MASK, \

460

.datasheet_name = "AIN"#num"-AIN"#num2, \

460

.datasheet_name = "AIN"#num"-AIN"#num2, \

461

.scan_type = { \

461

.scan_type = { \

462

.sign = 's', \

462

.sign = 's', \

463

.realbits = bits, \

463

.realbits = bits, \

464

.storagebits = (bits > 8) ? 16 : 8, \

464

.storagebits = (bits > 8) ? 16 : 8, \

465

.endianness = IIO_BE, \

465

.endianness = IIO_BE, \

466

}, \

466

}, \

467

.scan_index = si, \

467

.scan_index = si, \

468

.event_mask = evmask, \

468

.event_mask = evmask, \

469

}

469

}

470

471

#define MAX1363_4X_CHANS(bits, em) { \

471

#define MAX1363_4X_CHANS(bits, em) { \

472

MAX1363_CHAN_U(0, _s0, 0, bits, em), \

472

MAX1363_CHAN_U(0, _s0, 0, bits, em), \

473

MAX1363_CHAN_U(1, _s1, 1, bits, em), \

473

MAX1363_CHAN_U(1, _s1, 1, bits, em), \

474

MAX1363_CHAN_U(2, _s2, 2, bits, em), \

474

MAX1363_CHAN_U(2, _s2, 2, bits, em), \

475

MAX1363_CHAN_U(3, _s3, 3, bits, em), \

475

MAX1363_CHAN_U(3, _s3, 3, bits, em), \

476

MAX1363_CHAN_B(0, 1, d0m1, 4, bits, em), \

476

MAX1363_CHAN_B(0, 1, d0m1, 4, bits, em), \

477

MAX1363_CHAN_B(2, 3, d2m3, 5, bits, em), \

477

MAX1363_CHAN_B(2, 3, d2m3, 5, bits, em), \

478

MAX1363_CHAN_B(1, 0, d1m0, 6, bits, em), \

478

MAX1363_CHAN_B(1, 0, d1m0, 6, bits, em), \

479

MAX1363_CHAN_B(3, 2, d3m2, 7, bits, em), \

479

MAX1363_CHAN_B(3, 2, d3m2, 7, bits, em), \

480

IIO_CHAN_SOFT_TIMESTAMP(8) \

480

IIO_CHAN_SOFT_TIMESTAMP(8) \

481

}

481

}

482

483

static const struct iio_chan_spec max1036_channels[] = MAX1363_4X_CHANS(8, 0);

483

static const struct iio_chan_spec max1036_channels[] = MAX1363_4X_CHANS(8, 0);

484

static const struct iio_chan_spec max1136_channels[] = MAX1363_4X_CHANS(10, 0);

484

static const struct iio_chan_spec max1136_channels[] = MAX1363_4X_CHANS(10, 0);

485

static const struct iio_chan_spec max1236_channels[] = MAX1363_4X_CHANS(12, 0);

485

static const struct iio_chan_spec max1236_channels[] = MAX1363_4X_CHANS(12, 0);

486

static const struct iio_chan_spec max1361_channels[] =

486

static const struct iio_chan_spec max1361_channels[] =

487

MAX1363_4X_CHANS(10, MAX1363_EV_M);

487

MAX1363_4X_CHANS(10, MAX1363_EV_M);

488

static const struct iio_chan_spec max1363_channels[] =

488

static const struct iio_chan_spec max1363_channels[] =

489

MAX1363_4X_CHANS(12, MAX1363_EV_M);

489

MAX1363_4X_CHANS(12, MAX1363_EV_M);

490

491

/* Applies to max1236, max1237 */

491

/* Applies to max1236, max1237 */

492

static const enum max1363_modes max1236_mode_list[] = {

492

static const enum max1363_modes max1236_mode_list[] = {

493

_s0, _s1, _s2, _s3,

493

_s0, _s1, _s2, _s3,

494

s0to1, s0to2, s0to3,

494

s0to1, s0to2, s0to3,

495

d0m1, d2m3, d1m0, d3m2,

495

d0m1, d2m3, d1m0, d3m2,

496

d0m1to2m3, d1m0to3m2,

496

d0m1to2m3, d1m0to3m2,

497

s2to3,

497

s2to3,

498

};

498

};

499

500

/* Applies to max1238, max1239 */

500

/* Applies to max1238, max1239 */

501

static const enum max1363_modes max1238_mode_list[] = {

501

static const enum max1363_modes max1238_mode_list[] = {

502

_s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,

502

_s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,

503

s0to1, s0to2, s0to3, s0to4, s0to5, s0to6,

503

s0to1, s0to2, s0to3, s0to4, s0to5, s0to6,

504

s0to7, s0to8, s0to9, s0to10, s0to11,

504

s0to7, s0to8, s0to9, s0to10, s0to11,

505

d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,

505

d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,

506

d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,

506

d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,

507

d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11,

507

d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11,

508

d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10,

508

d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10,

509

s6to7, s6to8, s6to9, s6to10, s6to11,

509

s6to7, s6to8, s6to9, s6to10, s6to11,

510

d6m7to8m9, d6m7to10m11, d7m6to9m8, d7m6to11m10,

510

d6m7to8m9, d6m7to10m11, d7m6to9m8, d7m6to11m10,

511

};

511

};

512

513

#define MAX1363_12X_CHANS(bits) { \

513

#define MAX1363_12X_CHANS(bits) { \

514

MAX1363_CHAN_U(0, _s0, 0, bits, 0), \

514

MAX1363_CHAN_U(0, _s0, 0, bits, 0), \

515

MAX1363_CHAN_U(1, _s1, 1, bits, 0), \

515

MAX1363_CHAN_U(1, _s1, 1, bits, 0), \

516

MAX1363_CHAN_U(2, _s2, 2, bits, 0), \

516

MAX1363_CHAN_U(2, _s2, 2, bits, 0), \

517

MAX1363_CHAN_U(3, _s3, 3, bits, 0), \

517

MAX1363_CHAN_U(3, _s3, 3, bits, 0), \

518

MAX1363_CHAN_U(4, _s4, 4, bits, 0), \

518

MAX1363_CHAN_U(4, _s4, 4, bits, 0), \

519

MAX1363_CHAN_U(5, _s5, 5, bits, 0), \

519

MAX1363_CHAN_U(5, _s5, 5, bits, 0), \

520

MAX1363_CHAN_U(6, _s6, 6, bits, 0), \

520

MAX1363_CHAN_U(6, _s6, 6, bits, 0), \

521

MAX1363_CHAN_U(7, _s7, 7, bits, 0), \

521

MAX1363_CHAN_U(7, _s7, 7, bits, 0), \

522

MAX1363_CHAN_U(8, _s8, 8, bits, 0), \

522

MAX1363_CHAN_U(8, _s8, 8, bits, 0), \

523

MAX1363_CHAN_U(9, _s9, 9, bits, 0), \

523

MAX1363_CHAN_U(9, _s9, 9, bits, 0), \

524

MAX1363_CHAN_U(10, _s10, 10, bits, 0), \

524

MAX1363_CHAN_U(10, _s10, 10, bits, 0), \

525

MAX1363_CHAN_U(11, _s11, 11, bits, 0), \

525

MAX1363_CHAN_U(11, _s11, 11, bits, 0), \

526

MAX1363_CHAN_B(0, 1, d0m1, 12, bits, 0), \

526

MAX1363_CHAN_B(0, 1, d0m1, 12, bits, 0), \

527

MAX1363_CHAN_B(2, 3, d2m3, 13, bits, 0), \

527

MAX1363_CHAN_B(2, 3, d2m3, 13, bits, 0), \

528

MAX1363_CHAN_B(4, 5, d4m5, 14, bits, 0), \

528

MAX1363_CHAN_B(4, 5, d4m5, 14, bits, 0), \

529

MAX1363_CHAN_B(6, 7, d6m7, 15, bits, 0), \

529

MAX1363_CHAN_B(6, 7, d6m7, 15, bits, 0), \

530

MAX1363_CHAN_B(8, 9, d8m9, 16, bits, 0), \

530

MAX1363_CHAN_B(8, 9, d8m9, 16, bits, 0), \

531

MAX1363_CHAN_B(10, 11, d10m11, 17, bits, 0), \

531

MAX1363_CHAN_B(10, 11, d10m11, 17, bits, 0), \

532

MAX1363_CHAN_B(1, 0, d1m0, 18, bits, 0), \

532

MAX1363_CHAN_B(1, 0, d1m0, 18, bits, 0), \

533

MAX1363_CHAN_B(3, 2, d3m2, 19, bits, 0), \

533

MAX1363_CHAN_B(3, 2, d3m2, 19, bits, 0), \

534

MAX1363_CHAN_B(5, 4, d5m4, 20, bits, 0), \

534

MAX1363_CHAN_B(5, 4, d5m4, 20, bits, 0), \

535

MAX1363_CHAN_B(7, 6, d7m6, 21, bits, 0), \

535

MAX1363_CHAN_B(7, 6, d7m6, 21, bits, 0), \

536

MAX1363_CHAN_B(9, 8, d9m8, 22, bits, 0), \

536

MAX1363_CHAN_B(9, 8, d9m8, 22, bits, 0), \

537

MAX1363_CHAN_B(11, 10, d11m10, 23, bits, 0), \

537

MAX1363_CHAN_B(11, 10, d11m10, 23, bits, 0), \

538

IIO_CHAN_SOFT_TIMESTAMP(24) \

538

IIO_CHAN_SOFT_TIMESTAMP(24) \

539

}

539

}

540

static const struct iio_chan_spec max1038_channels[] = MAX1363_12X_CHANS(8);

540

static const struct iio_chan_spec max1038_channels[] = MAX1363_12X_CHANS(8);

541

static const struct iio_chan_spec max1138_channels[] = MAX1363_12X_CHANS(10);

541

static const struct iio_chan_spec max1138_channels[] = MAX1363_12X_CHANS(10);

542

static const struct iio_chan_spec max1238_channels[] = MAX1363_12X_CHANS(12);

542

static const struct iio_chan_spec max1238_channels[] = MAX1363_12X_CHANS(12);

543

544

static const enum max1363_modes max11607_mode_list[] = {

544

static const enum max1363_modes max11607_mode_list[] = {

545

_s0, _s1, _s2, _s3,

545

_s0, _s1, _s2, _s3,

546

s0to1, s0to2, s0to3,

546

s0to1, s0to2, s0to3,

547

s2to3,

547

s2to3,

548

d0m1, d2m3, d1m0, d3m2,

548

d0m1, d2m3, d1m0, d3m2,

549

d0m1to2m3, d1m0to3m2,

549

d0m1to2m3, d1m0to3m2,

550

};

550

};

551

552

static const enum max1363_modes max11608_mode_list[] = {

552

static const enum max1363_modes max11608_mode_list[] = {

553

_s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7,

553

_s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7,

554

s0to1, s0to2, s0to3, s0to4, s0to5, s0to6, s0to7,

554

s0to1, s0to2, s0to3, s0to4, s0to5, s0to6, s0to7,

555

s6to7,

555

s6to7,

556

d0m1, d2m3, d4m5, d6m7,

556

d0m1, d2m3, d4m5, d6m7,

557

d1m0, d3m2, d5m4, d7m6,

557

d1m0, d3m2, d5m4, d7m6,

558

d0m1to2m3, d0m1to4m5, d0m1to6m7,

558

d0m1to2m3, d0m1to4m5, d0m1to6m7,

559

d1m0to3m2, d1m0to5m4, d1m0to7m6,

559

d1m0to3m2, d1m0to5m4, d1m0to7m6,

560

};

560

};

561

562

#define MAX1363_8X_CHANS(bits) { \

562

#define MAX1363_8X_CHANS(bits) { \

563

MAX1363_CHAN_U(0, _s0, 0, bits, 0), \

563

MAX1363_CHAN_U(0, _s0, 0, bits, 0), \

564

MAX1363_CHAN_U(1, _s1, 1, bits, 0), \

564

MAX1363_CHAN_U(1, _s1, 1, bits, 0), \

565

MAX1363_CHAN_U(2, _s2, 2, bits, 0), \

565

MAX1363_CHAN_U(2, _s2, 2, bits, 0), \

566

MAX1363_CHAN_U(3, _s3, 3, bits, 0), \

566

MAX1363_CHAN_U(3, _s3, 3, bits, 0), \

567

MAX1363_CHAN_U(4, _s4, 4, bits, 0), \

567

MAX1363_CHAN_U(4, _s4, 4, bits, 0), \

568

MAX1363_CHAN_U(5, _s5, 5, bits, 0), \

568

MAX1363_CHAN_U(5, _s5, 5, bits, 0), \

569

MAX1363_CHAN_U(6, _s6, 6, bits, 0), \

569

MAX1363_CHAN_U(6, _s6, 6, bits, 0), \

570

MAX1363_CHAN_U(7, _s7, 7, bits, 0), \

570

MAX1363_CHAN_U(7, _s7, 7, bits, 0), \

571

MAX1363_CHAN_B(0, 1, d0m1, 8, bits, 0), \

571

MAX1363_CHAN_B(0, 1, d0m1, 8, bits, 0), \

572

MAX1363_CHAN_B(2, 3, d2m3, 9, bits, 0), \

572

MAX1363_CHAN_B(2, 3, d2m3, 9, bits, 0), \

573

MAX1363_CHAN_B(4, 5, d4m5, 10, bits, 0), \

573

MAX1363_CHAN_B(4, 5, d4m5, 10, bits, 0), \

574

MAX1363_CHAN_B(6, 7, d6m7, 11, bits, 0), \

574

MAX1363_CHAN_B(6, 7, d6m7, 11, bits, 0), \

575

MAX1363_CHAN_B(1, 0, d1m0, 12, bits, 0), \

575

MAX1363_CHAN_B(1, 0, d1m0, 12, bits, 0), \

576

MAX1363_CHAN_B(3, 2, d3m2, 13, bits, 0), \

576

MAX1363_CHAN_B(3, 2, d3m2, 13, bits, 0), \

577

MAX1363_CHAN_B(5, 4, d5m4, 14, bits, 0), \

577

MAX1363_CHAN_B(5, 4, d5m4, 14, bits, 0), \

578

MAX1363_CHAN_B(7, 6, d7m6, 15, bits, 0), \

578

MAX1363_CHAN_B(7, 6, d7m6, 15, bits, 0), \

579

IIO_CHAN_SOFT_TIMESTAMP(16) \

579

IIO_CHAN_SOFT_TIMESTAMP(16) \

580

}

580

}

581

static const struct iio_chan_spec max11602_channels[] = MAX1363_8X_CHANS(8);

581

static const struct iio_chan_spec max11602_channels[] = MAX1363_8X_CHANS(8);

582

static const struct iio_chan_spec max11608_channels[] = MAX1363_8X_CHANS(10);

582

static const struct iio_chan_spec max11608_channels[] = MAX1363_8X_CHANS(10);

583

static const struct iio_chan_spec max11614_channels[] = MAX1363_8X_CHANS(12);

583

static const struct iio_chan_spec max11614_channels[] = MAX1363_8X_CHANS(12);

584

585

static const enum max1363_modes max11644_mode_list[] = {

585

static const enum max1363_modes max11644_mode_list[] = {

586

_s0, _s1, s0to1, d0m1, d1m0,

586

_s0, _s1, s0to1, d0m1, d1m0,

587

};

587

};

588

589

#define MAX1363_2X_CHANS(bits) { \

589

#define MAX1363_2X_CHANS(bits) { \

590

MAX1363_CHAN_U(0, _s0, 0, bits, 0), \

590

MAX1363_CHAN_U(0, _s0, 0, bits, 0), \

591

MAX1363_CHAN_U(1, _s1, 1, bits, 0), \

591

MAX1363_CHAN_U(1, _s1, 1, bits, 0), \

592

MAX1363_CHAN_B(0, 1, d0m1, 2, bits, 0), \

592

MAX1363_CHAN_B(0, 1, d0m1, 2, bits, 0), \

593

MAX1363_CHAN_B(1, 0, d1m0, 3, bits, 0), \

593

MAX1363_CHAN_B(1, 0, d1m0, 3, bits, 0), \

594

IIO_CHAN_SOFT_TIMESTAMP(4) \

594

IIO_CHAN_SOFT_TIMESTAMP(4) \

595

}

595

}

596

597

static const struct iio_chan_spec max11646_channels[] = MAX1363_2X_CHANS(10);

597

static const struct iio_chan_spec max11646_channels[] = MAX1363_2X_CHANS(10);

598

static const struct iio_chan_spec max11644_channels[] = MAX1363_2X_CHANS(12);

598

static const struct iio_chan_spec max11644_channels[] = MAX1363_2X_CHANS(12);

599

600

enum { max1361,

600

enum { max1361,

601

max1362,

601

max1362,

602

max1363,

602

max1363,

603

max1364,

603

max1364,

604

max1036,

604

max1036,

605

max1037,

605

max1037,

606

max1038,

606

max1038,

607

max1039,

607

max1039,

608

max1136,

608

max1136,

609

max1137,

609

max1137,

610

max1138,

610

max1138,

611

max1139,

611

max1139,

612

max1236,

612

max1236,

613

max1237,

613

max1237,

614

max1238,

614

max1238,

615

max1239,

615

max1239,

616

max11600,

616

max11600,

617

max11601,

617

max11601,

618

max11602,

618

max11602,

619

max11603,

619

max11603,

620

max11604,

620

max11604,

621

max11605,

621

max11605,

622

max11606,

622

max11606,

623

max11607,

623

max11607,

624

max11608,

624

max11608,

625

max11609,

625

max11609,

626

max11610,

626

max11610,

627

max11611,

627

max11611,

628

max11612,

628

max11612,

629

max11613,

629

max11613,

630

max11614,

630

max11614,

631

max11615,

631

max11615,

632

max11616,

632

max11616,

633

max11617,

633

max11617,

634

max11644,

634

max11644,

635

max11645,

635

max11645,

636

max11646,

636

max11646,

637

max11647

637

max11647

638

};

638

};

639

640

static const int max1363_monitor_speeds[] = { 133000, 665000, 33300, 16600,

640

static const int max1363_monitor_speeds[] = { 133000, 665000, 33300, 16600,

641

8300, 4200, 2000, 1000 };

641

8300, 4200, 2000, 1000 };

642

643

static ssize_t max1363_monitor_show_freq(struct device *dev,

643

static ssize_t max1363_monitor_show_freq(struct device *dev,

644

struct device_attribute *attr,

644

struct device_attribute *attr,

645

char *buf)

645

char *buf)

646

{

646

{

647

struct max1363_state *st = iio_priv(dev_to_iio_dev(dev));

647

struct max1363_state *st = iio_priv(dev_to_iio_dev(dev));

648

return sprintf(buf, "%d\n", max1363_monitor_speeds[st->monitor_speed]);

648

return sprintf(buf, "%d\n", max1363_monitor_speeds[st->monitor_speed]);

649

}

649

}

650

651

static ssize_t max1363_monitor_store_freq(struct device *dev,

651

static ssize_t max1363_monitor_store_freq(struct device *dev,

652

struct device_attribute *attr,

652

struct device_attribute *attr,

653

const char *buf,

653

const char *buf,

654

size_t len)

654

size_t len)

655

{

655

{

656

struct iio_dev *indio_dev = dev_to_iio_dev(dev);

656

struct iio_dev *indio_dev = dev_to_iio_dev(dev);

657

struct max1363_state *st = iio_priv(indio_dev);

657

struct max1363_state *st = iio_priv(indio_dev);

658

int i, ret;

658

int i, ret;

659

unsigned long val;

659

unsigned long val;

660

bool found = false;

660

bool found = false;

661

662

ret = strict_strtoul(buf, 10, &val);

662

ret = strict_strtoul(buf, 10, &val);

663

if (ret)

663

if (ret)

664

return -EINVAL;

664

return -EINVAL;

665

for (i = 0; i < ARRAY_SIZE(max1363_monitor_speeds); i++)

665

for (i = 0; i < ARRAY_SIZE(max1363_monitor_speeds); i++)

666

if (val == max1363_monitor_speeds[i]) {

666

if (val == max1363_monitor_speeds[i]) {

667

found = true;

667

found = true;

668

break;

668

break;

669

}

669

}

670

if (!found)

670

if (!found)

671

return -EINVAL;

671

return -EINVAL;

672

673

mutex_lock(&indio_dev->mlock);

673

mutex_lock(&indio_dev->mlock);

674

st->monitor_speed = i;

674

st->monitor_speed = i;

675

mutex_unlock(&indio_dev->mlock);

675

mutex_unlock(&indio_dev->mlock);

676

677

return 0;

677

return 0;

678

}

678

}

679

680

static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR,

680

static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR,

681

max1363_monitor_show_freq,

681

max1363_monitor_show_freq,

682

max1363_monitor_store_freq);

682

max1363_monitor_store_freq);

683

684

static IIO_CONST_ATTR(sampling_frequency_available,

684

static IIO_CONST_ATTR(sampling_frequency_available,

685

"133000 665000 33300 16600 8300 4200 2000 1000");

685

"133000 665000 33300 16600 8300 4200 2000 1000");

686

687

static int max1363_read_thresh(struct iio_dev *indio_dev,

687

static int max1363_read_thresh(struct iio_dev *indio_dev,

688

u64 event_code,

688

u64 event_code,

689

int *val)

689

int *val)

690

{

690

{

691

struct max1363_state *st = iio_priv(indio_dev);

691

struct max1363_state *st = iio_priv(indio_dev);

692

if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)

692

if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)

693

*val = st->thresh_low[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)];

693

*val = st->thresh_low[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)];

694

else

694

else

695

*val = st->thresh_high[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)];

695

*val = st->thresh_high[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)];

696

return 0;

696

return 0;

697

}

697

}

698

699

static int max1363_write_thresh(struct iio_dev *indio_dev,

699

static int max1363_write_thresh(struct iio_dev *indio_dev,

700

u64 event_code,

700

u64 event_code,

701

int val)

701

int val)

702

{

702

{

703

struct max1363_state *st = iio_priv(indio_dev);

703

struct max1363_state *st = iio_priv(indio_dev);

704

/* make it handle signed correctly as well */

704

/* make it handle signed correctly as well */

705

switch (st->chip_info->bits) {

705

switch (st->chip_info->bits) {

706

case 10:

706

case 10:

707

if (val > 0x3FF)

707

if (val > 0x3FF)

708

return -EINVAL;

708

return -EINVAL;

709

break;

709

break;

710

case 12:

710

case 12:

711

if (val > 0xFFF)

711

if (val > 0xFFF)

712

return -EINVAL;

712

return -EINVAL;

713

break;

713

break;

714

}

714

}

715

716

switch (IIO_EVENT_CODE_EXTRACT_DIR(event_code)) {

716

switch (IIO_EVENT_CODE_EXTRACT_DIR(event_code)) {

717

case IIO_EV_DIR_FALLING:

717

case IIO_EV_DIR_FALLING:

718

st->thresh_low[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)] = val;

718

st->thresh_low[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)] = val;

719

break;

719

break;

720

case IIO_EV_DIR_RISING:

720

case IIO_EV_DIR_RISING:

721

st->thresh_high[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)] = val;

721

st->thresh_high[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)] = val;

722

break;

722

break;

723

}

723

}

724

725

return 0;

725

return 0;

726

}

726

}

727

728

static const u64 max1363_event_codes[] = {

728

static const u64 max1363_event_codes[] = {

729

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,

729

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,

730

IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),

730

IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),

731

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,

731

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,

732

IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),

732

IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),

733

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,

733

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,

734

IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),

734

IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),

735

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,

735

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,

736

IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),

736

IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),

737

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,

737

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,

738

IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),

738

IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),

739

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,

739

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,

740

IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),

740

IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),

741

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,

741

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,

742

IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),

742

IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),

743

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,

743

IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,

744

IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),

744

IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),

745

};

745

};

746

747

static irqreturn_t max1363_event_handler(int irq, void *private)

747

static irqreturn_t max1363_event_handler(int irq, void *private)

748

{

748

{

749

struct iio_dev *indio_dev = private;

749

struct iio_dev *indio_dev = private;

750

struct max1363_state *st = iio_priv(indio_dev);

750

struct max1363_state *st = iio_priv(indio_dev);

751

s64 timestamp = iio_get_time_ns();

751

s64 timestamp = iio_get_time_ns();

752

unsigned long mask, loc;

752

unsigned long mask, loc;

753

u8 rx;

753

u8 rx;

754

u8 tx[2] = { st->setupbyte,

754

u8 tx[2] = { st->setupbyte,

755

MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0 };

755

MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0 };

756

757

i2c_master_recv(st->client, &rx, 1);

757

i2c_master_recv(st->client, &rx, 1);

758

mask = rx;

758

mask = rx;

759

for_each_set_bit(loc, &mask, 8)

759

for_each_set_bit(loc, &mask, 8)

760

iio_push_event(indio_dev, max1363_event_codes[loc], timestamp);

760

iio_push_event(indio_dev, max1363_event_codes[loc], timestamp);

761

i2c_master_send(st->client, tx, 2);

761

i2c_master_send(st->client, tx, 2);

762

763

return IRQ_HANDLED;

763

return IRQ_HANDLED;

764

}

764

}

765

766

static int max1363_read_event_config(struct iio_dev *indio_dev,

766

static int max1363_read_event_config(struct iio_dev *indio_dev,

767

u64 event_code)

767

u64 event_code)

768

{

768

{

769

struct max1363_state *st = iio_priv(indio_dev);

769

struct max1363_state *st = iio_priv(indio_dev);

770

int val;

770

int val;

771

int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);

771

int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);

772

773

mutex_lock(&indio_dev->mlock);

773

mutex_lock(&indio_dev->mlock);

774

if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)

774

if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)

775

val = (1 << number) & st->mask_low;

775

val = (1 << number) & st->mask_low;

776

else

776

else

777

val = (1 << number) & st->mask_high;

777

val = (1 << number) & st->mask_high;

778

mutex_unlock(&indio_dev->mlock);

778

mutex_unlock(&indio_dev->mlock);

779

780

return val;

780

return val;

781

}

781

}

782

783

static int max1363_monitor_mode_update(struct max1363_state *st, int enabled)

783

static int max1363_monitor_mode_update(struct max1363_state *st, int enabled)

784

{

784

{

785

u8 *tx_buf;

785

u8 *tx_buf;

786

int ret, i = 3, j;

786

int ret, i = 3, j;

787

unsigned long numelements;

787

unsigned long numelements;

788

int len;

788

int len;

789

const long *modemask;

789

const long *modemask;

790

791

if (!enabled) {

791

if (!enabled) {

792

/* transition to buffered capture is not currently supported */

792

/* transition to buffered capture is not currently supported */

793

st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP;

793

st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP;

794

st->configbyte &= ~MAX1363_SCAN_MASK;

794

st->configbyte &= ~MAX1363_SCAN_MASK;

795

st->monitor_on = false;

795

st->monitor_on = false;

796

return max1363_write_basic_config(st->client,

796

return max1363_write_basic_config(st->client,

797

st->setupbyte,

797

st->setupbyte,

798

st->configbyte);

798

st->configbyte);

799

}

799

}

800

801

/* Ensure we are in the relevant mode */

801

/* Ensure we are in the relevant mode */

802

st->setupbyte |= MAX1363_SETUP_MONITOR_SETUP;

802

st->setupbyte |= MAX1363_SETUP_MONITOR_SETUP;

803

st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK

803

st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK

804

| MAX1363_SCAN_MASK

804

| MAX1363_SCAN_MASK

805

| MAX1363_SE_DE_MASK);

805

| MAX1363_SE_DE_MASK);

806

st->configbyte |= MAX1363_CONFIG_SCAN_MONITOR_MODE;

806

st->configbyte |= MAX1363_CONFIG_SCAN_MONITOR_MODE;

807

if ((st->mask_low | st->mask_high) & 0x0F) {

807

if ((st->mask_low | st->mask_high) & 0x0F) {

808

st->configbyte |= max1363_mode_table[s0to3].conf;

808

st->configbyte |= max1363_mode_table[s0to3].conf;

809

modemask = max1363_mode_table[s0to3].modemask;

809

modemask = max1363_mode_table[s0to3].modemask;

810

} else if ((st->mask_low | st->mask_high) & 0x30) {

810

} else if ((st->mask_low | st->mask_high) & 0x30) {

811

st->configbyte |= max1363_mode_table[d0m1to2m3].conf;

811

st->configbyte |= max1363_mode_table[d0m1to2m3].conf;

812

modemask = max1363_mode_table[d0m1to2m3].modemask;

812

modemask = max1363_mode_table[d0m1to2m3].modemask;

813

} else {

813

} else {

814

st->configbyte |= max1363_mode_table[d1m0to3m2].conf;

814

st->configbyte |= max1363_mode_table[d1m0to3m2].conf;

815

modemask = max1363_mode_table[d1m0to3m2].modemask;

815

modemask = max1363_mode_table[d1m0to3m2].modemask;

816

}

816

}

817

numelements = bitmap_weight(modemask, MAX1363_MAX_CHANNELS);

817

numelements = bitmap_weight(modemask, MAX1363_MAX_CHANNELS);

818

len = 3 * numelements + 3;

818

len = 3 * numelements + 3;

819

tx_buf = kmalloc(len, GFP_KERNEL);

819

tx_buf = kmalloc(len, GFP_KERNEL);

820

if (!tx_buf) {

820

if (!tx_buf) {

821

ret = -ENOMEM;

821

ret = -ENOMEM;

822

goto error_ret;

822

goto error_ret;

823

}

823

}

824

tx_buf[0] = st->configbyte;

824

tx_buf[0] = st->configbyte;

825

tx_buf[1] = st->setupbyte;

825

tx_buf[1] = st->setupbyte;

826

tx_buf[2] = (st->monitor_speed << 1);

826

tx_buf[2] = (st->monitor_speed << 1);

827

828

/*

828

/*

829

* So we need to do yet another bit of nefarious scan mode

829

* So we need to do yet another bit of nefarious scan mode

830

* setup to match what we need.

830

* setup to match what we need.

831

*/

831

*/

832

for (j = 0; j < 8; j++)

832

for (j = 0; j < 8; j++)

833

if (test_bit(j, modemask)) {

833

if (test_bit(j, modemask)) {

834

/* Establish the mode is in the scan */

834

/* Establish the mode is in the scan */

835

if (st->mask_low & (1 << j)) {

835

if (st->mask_low & (1 << j)) {

836

tx_buf[i] = (st->thresh_low[j] >> 4) & 0xFF;

836

tx_buf[i] = (st->thresh_low[j] >> 4) & 0xFF;

837

tx_buf[i + 1] = (st->thresh_low[j] << 4) & 0xF0;

837

tx_buf[i + 1] = (st->thresh_low[j] << 4) & 0xF0;

838

} else if (j < 4) {

838

} else if (j < 4) {

839

tx_buf[i] = 0;

839

tx_buf[i] = 0;

840

tx_buf[i + 1] = 0;

840

tx_buf[i + 1] = 0;

841

} else {

841

} else {

842

tx_buf[i] = 0x80;

842

tx_buf[i] = 0x80;

843

tx_buf[i + 1] = 0;

843

tx_buf[i + 1] = 0;

844

}

844

}

845

if (st->mask_high & (1 << j)) {

845

if (st->mask_high & (1 << j)) {

846

tx_buf[i + 1] |=

846

tx_buf[i + 1] |=

847

(st->thresh_high[j] >> 8) & 0x0F;

847

(st->thresh_high[j] >> 8) & 0x0F;

848

tx_buf[i + 2] = st->thresh_high[j] & 0xFF;

848

tx_buf[i + 2] = st->thresh_high[j] & 0xFF;

849

} else if (j < 4) {

849

} else if (j < 4) {

850

tx_buf[i + 1] |= 0x0F;

850

tx_buf[i + 1] |= 0x0F;

851

tx_buf[i + 2] = 0xFF;

851

tx_buf[i + 2] = 0xFF;

852

} else {

852

} else {

853

tx_buf[i + 1] |= 0x07;

853

tx_buf[i + 1] |= 0x07;

854

tx_buf[i + 2] = 0xFF;

854

tx_buf[i + 2] = 0xFF;

855

}

855

}

856

i += 3;

856

i += 3;

857

}

857

}

858

859

860

ret = i2c_master_send(st->client, tx_buf, len);

860

ret = i2c_master_send(st->client, tx_buf, len);

861

if (ret < 0)

861

if (ret < 0)

862

goto error_ret;

862

goto error_ret;

863

if (ret != len) {

863

if (ret != len) {

864

ret = -EIO;

864

ret = -EIO;

865

goto error_ret;

865

goto error_ret;

866

}

866

}

867

868

/*

868

/*

869

* Now that we hopefully have sensible thresholds in place it is

869

* Now that we hopefully have sensible thresholds in place it is

870

* time to turn the interrupts on.

870

* time to turn the interrupts on.

871

* It is unclear from the data sheet if this should be necessary

871

* It is unclear from the data sheet if this should be necessary

872

* (i.e. whether monitor mode setup is atomic) but it appears to

872

* (i.e. whether monitor mode setup is atomic) but it appears to

873

* be in practice.

873

* be in practice.

874

*/

874

*/

875

tx_buf[0] = st->setupbyte;

875

tx_buf[0] = st->setupbyte;

876

tx_buf[1] = MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0;

876

tx_buf[1] = MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0;

877

ret = i2c_master_send(st->client, tx_buf, 2);

877

ret = i2c_master_send(st->client, tx_buf, 2);

878

if (ret < 0)

878

if (ret < 0)

879

goto error_ret;

879

goto error_ret;

880

if (ret != 2) {

880

if (ret != 2) {

881

ret = -EIO;

881

ret = -EIO;

882

goto error_ret;

882

goto error_ret;

883

}

883

}

884

ret = 0;

884

ret = 0;

885

st->monitor_on = true;

885

st->monitor_on = true;

886

error_ret:

886

error_ret:

887

888

kfree(tx_buf);

888

kfree(tx_buf);

889

890

return ret;

890

return ret;

891

}

891

}

892

893

/*

893

/*

894

* To keep this manageable we always use one of 3 scan modes.

894

* To keep this manageable we always use one of 3 scan modes.

895

* Scan 0...3, 0-1,2-3 and 1-0,3-2

895

* Scan 0...3, 0-1,2-3 and 1-0,3-2

896

*/

896

*/

897

898

static inline int __max1363_check_event_mask(int thismask, int checkmask)

898

static inline int __max1363_check_event_mask(int thismask, int checkmask)

899

{

899

{

900

int ret = 0;

900

int ret = 0;

901

/* Is it unipolar */

901

/* Is it unipolar */

902

if (thismask < 4) {

902

if (thismask < 4) {

903

if (checkmask & ~0x0F) {

903

if (checkmask & ~0x0F) {

904

ret = -EBUSY;

904

ret = -EBUSY;

905

goto error_ret;

905

goto error_ret;

906

}

906

}

907

} else if (thismask < 6) {

907

} else if (thismask < 6) {

908

if (checkmask & ~0x30) {

908

if (checkmask & ~0x30) {

909

ret = -EBUSY;

909

ret = -EBUSY;

910

goto error_ret;

910

goto error_ret;

911

}

911

}

912

} else if (checkmask & ~0xC0)

912

} else if (checkmask & ~0xC0)

913

ret = -EBUSY;

913

ret = -EBUSY;

914

error_ret:

914

error_ret:

915

return ret;

915

return ret;

916

}

916

}

917

918

static int max1363_write_event_config(struct iio_dev *indio_dev,

918

static int max1363_write_event_config(struct iio_dev *indio_dev,

919

u64 event_code,

919

u64 event_code,

920

int state)

920

int state)

921

{

921

{

922

int ret = 0;

922

int ret = 0;

923

struct max1363_state *st = iio_priv(indio_dev);

923

struct max1363_state *st = iio_priv(indio_dev);

924

u16 unifiedmask;

924

u16 unifiedmask;

925

int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);

925

int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);

926

927

mutex_lock(&indio_dev->mlock);

927

mutex_lock(&indio_dev->mlock);

928

unifiedmask = st->mask_low | st->mask_high;

928

unifiedmask = st->mask_low | st->mask_high;

929

if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING) {

929

if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING) {

930

931

if (state == 0)

931

if (state == 0)

932

st->mask_low &= ~(1 << number);

932

st->mask_low &= ~(1 << number);

933

else {

933

else {

934

ret = __max1363_check_event_mask((1 << number),

934

ret = __max1363_check_event_mask((1 << number),

935

unifiedmask);

935

unifiedmask);

936

if (ret)

936

if (ret)

937

goto error_ret;

937

goto error_ret;

938

st->mask_low |= (1 << number);

938

st->mask_low |= (1 << number);

939

}

939

}

940

} else {

940

} else {

941

if (state == 0)

941

if (state == 0)

942

st->mask_high &= ~(1 << number);

942

st->mask_high &= ~(1 << number);

943

else {

943

else {

944

ret = __max1363_check_event_mask((1 << number),

944

ret = __max1363_check_event_mask((1 << number),

945

unifiedmask);

945

unifiedmask);

946

if (ret)

946

if (ret)

947

goto error_ret;

947

goto error_ret;

948

st->mask_high |= (1 << number);

948

st->mask_high |= (1 << number);

949

}

949

}

950

}

950

}

951

952

max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low));

952

max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low));

953

error_ret:

953

error_ret:

954

mutex_unlock(&indio_dev->mlock);

954

mutex_unlock(&indio_dev->mlock);

955

956

return ret;

956

return ret;

957

}

957

}

958

959

/*

959

/*

960

* As with scan_elements, only certain sets of these can

960

* As with scan_elements, only certain sets of these can

961

* be combined.

961

* be combined.

962

*/

962

*/

963

static struct attribute *max1363_event_attributes[] = {

963

static struct attribute *max1363_event_attributes[] = {

964

&iio_dev_attr_sampling_frequency.dev_attr.attr,

964

&iio_dev_attr_sampling_frequency.dev_attr.attr,

965

&iio_const_attr_sampling_frequency_available.dev_attr.attr,

965

&iio_const_attr_sampling_frequency_available.dev_attr.attr,

966

NULL,

966

NULL,

967

};

967

};

968

969

static struct attribute_group max1363_event_attribute_group = {

969

static struct attribute_group max1363_event_attribute_group = {

970

.attrs = max1363_event_attributes,

970

.attrs = max1363_event_attributes,

971

.name = "events",

971

.name = "events",

972

};

972

};

973

974

static int max1363_update_scan_mode(struct iio_dev *indio_dev,

974

static int max1363_update_scan_mode(struct iio_dev *indio_dev,

975

const unsigned long *scan_mask)

975

const unsigned long *scan_mask)

976

{

976

{

977

struct max1363_state *st = iio_priv(indio_dev);

977

struct max1363_state *st = iio_priv(indio_dev);

978

979

/*

979

/*

980

* Need to figure out the current mode based upon the requested

980

* Need to figure out the current mode based upon the requested

981

* scan mask in iio_dev

981

* scan mask in iio_dev

982

*/

982

*/

983

st->current_mode = max1363_match_mode(scan_mask, st->chip_info);

983

st->current_mode = max1363_match_mode(scan_mask, st->chip_info);

984

if (!st->current_mode)

984

if (!st->current_mode)

985

return -EINVAL;

985

return -EINVAL;

986

max1363_set_scan_mode(st);

986

max1363_set_scan_mode(st);

987

return 0;

987

return 0;

988

}

988

}

989

990

static const struct iio_info max1238_info = {

990

static const struct iio_info max1238_info = {

991

.read_raw = &max1363_read_raw,

991

.read_raw = &max1363_read_raw,

992

.driver_module = THIS_MODULE,

992

.driver_module = THIS_MODULE,

993

.update_scan_mode = &max1363_update_scan_mode,

993

.update_scan_mode = &max1363_update_scan_mode,

994

};

994

};

995

996

static const struct iio_info max1363_info = {

996

static const struct iio_info max1363_info = {

997

.read_event_value = &max1363_read_thresh,

997

.read_event_value = &max1363_read_thresh,

998

.write_event_value = &max1363_write_thresh,

998

.write_event_value = &max1363_write_thresh,

999

.read_event_config = &max1363_read_event_config,

999

.read_event_config = &max1363_read_event_config,

1000

.write_event_config = &max1363_write_event_config,

1000

.write_event_config = &max1363_write_event_config,

1001

.read_raw = &max1363_read_raw,

1001

.read_raw = &max1363_read_raw,

1002

.update_scan_mode = &max1363_update_scan_mode,

1002

.update_scan_mode = &max1363_update_scan_mode,

1003

.driver_module = THIS_MODULE,

1003

.driver_module = THIS_MODULE,

1004

.event_attrs = &max1363_event_attribute_group,

1004

.event_attrs = &max1363_event_attribute_group,

1005

};

1005

};

1006

1007

/* max1363 and max1368 tested - rest from data sheet */

1007

/* max1363 and max1368 tested - rest from data sheet */

1008

static const struct max1363_chip_info max1363_chip_info_tbl[] = {

1008

static const struct max1363_chip_info max1363_chip_info_tbl[] = {

1009

[max1361] = {

1009

[max1361] = {

1010

.bits = 10,

1010

.bits = 10,

1011

.int_vref_mv = 2048,

1011

.int_vref_mv = 2048,

1012

.mode_list = max1363_mode_list,

1012

.mode_list = max1363_mode_list,

1013

.num_modes = ARRAY_SIZE(max1363_mode_list),

1013

.num_modes = ARRAY_SIZE(max1363_mode_list),

1014

.default_mode = s0to3,

1014

.default_mode = s0to3,

1015

.channels = max1361_channels,

1015

.channels = max1361_channels,

1016

.num_channels = ARRAY_SIZE(max1361_channels),

1016

.num_channels = ARRAY_SIZE(max1361_channels),

1017

.info = &max1363_info,

1017

.info = &max1363_info,

1018

},

1018

},

1019

[max1362] = {

1019

[max1362] = {

1020

.bits = 10,

1020

.bits = 10,

1021

.int_vref_mv = 4096,

1021

.int_vref_mv = 4096,

1022

.mode_list = max1363_mode_list,

1022

.mode_list = max1363_mode_list,

1023

.num_modes = ARRAY_SIZE(max1363_mode_list),

1023

.num_modes = ARRAY_SIZE(max1363_mode_list),

1024

.default_mode = s0to3,

1024

.default_mode = s0to3,

1025

.channels = max1361_channels,

1025

.channels = max1361_channels,

1026

.num_channels = ARRAY_SIZE(max1361_channels),

1026

.num_channels = ARRAY_SIZE(max1361_channels),

1027

.info = &max1363_info,

1027

.info = &max1363_info,

1028

},

1028

},

1029

[max1363] = {

1029

[max1363] = {

1030

.bits = 12,

1030

.bits = 12,

1031

.int_vref_mv = 2048,

1031

.int_vref_mv = 2048,

1032

.mode_list = max1363_mode_list,

1032

.mode_list = max1363_mode_list,

1033

.num_modes = ARRAY_SIZE(max1363_mode_list),

1033

.num_modes = ARRAY_SIZE(max1363_mode_list),

1034

.default_mode = s0to3,

1034

.default_mode = s0to3,

1035

.channels = max1363_channels,

1035

.channels = max1363_channels,

1036

.num_channels = ARRAY_SIZE(max1363_channels),

1036

.num_channels = ARRAY_SIZE(max1363_channels),

1037

.info = &max1363_info,

1037

.info = &max1363_info,

1038

},

1038

},

1039

[max1364] = {

1039

[max1364] = {

1040

.bits = 12,

1040

.bits = 12,

1041

.int_vref_mv = 4096,

1041

.int_vref_mv = 4096,

1042

.mode_list = max1363_mode_list,

1042

.mode_list = max1363_mode_list,

1043

.num_modes = ARRAY_SIZE(max1363_mode_list),

1043

.num_modes = ARRAY_SIZE(max1363_mode_list),

1044

.default_mode = s0to3,

1044

.default_mode = s0to3,

1045

.channels = max1363_channels,

1045

.channels = max1363_channels,

1046

.num_channels = ARRAY_SIZE(max1363_channels),

1046

.num_channels = ARRAY_SIZE(max1363_channels),

1047

.info = &max1363_info,

1047

.info = &max1363_info,

1048

},

1048

},

1049

[max1036] = {

1049

[max1036] = {

1050

.bits = 8,

1050

.bits = 8,

1051

.int_vref_mv = 4096,

1051

.int_vref_mv = 4096,

1052

.mode_list = max1236_mode_list,

1052

.mode_list = max1236_mode_list,

1053

.num_modes = ARRAY_SIZE(max1236_mode_list),

1053

.num_modes = ARRAY_SIZE(max1236_mode_list),

1054

.default_mode = s0to3,

1054

.default_mode = s0to3,

1055

.info = &max1238_info,

1055

.info = &max1238_info,

1056

.channels = max1036_channels,

1056

.channels = max1036_channels,

1057

.num_channels = ARRAY_SIZE(max1036_channels),

1057

.num_channels = ARRAY_SIZE(max1036_channels),

1058

},

1058

},

1059

[max1037] = {

1059

[max1037] = {

1060

.bits = 8,

1060

.bits = 8,

1061

.int_vref_mv = 2048,

1061

.int_vref_mv = 2048,

1062

.mode_list = max1236_mode_list,

1062

.mode_list = max1236_mode_list,

1063

.num_modes = ARRAY_SIZE(max1236_mode_list),

1063

.num_modes = ARRAY_SIZE(max1236_mode_list),

1064

.default_mode = s0to3,

1064

.default_mode = s0to3,

1065

.info = &max1238_info,

1065

.info = &max1238_info,

1066

.channels = max1036_channels,

1066

.channels = max1036_channels,

1067

.num_channels = ARRAY_SIZE(max1036_channels),

1067

.num_channels = ARRAY_SIZE(max1036_channels),

1068

},

1068

},

1069

[max1038] = {

1069

[max1038] = {

1070

.bits = 8,

1070

.bits = 8,

1071

.int_vref_mv = 4096,

1071

.int_vref_mv = 4096,

1072

.mode_list = max1238_mode_list,

1072

.mode_list = max1238_mode_list,

1073

.num_modes = ARRAY_SIZE(max1238_mode_list),

1073

.num_modes = ARRAY_SIZE(max1238_mode_list),

1074

.default_mode = s0to11,

1074

.default_mode = s0to11,

1075

.info = &max1238_info,

1075

.info = &max1238_info,

1076

.channels = max1038_channels,

1076

.channels = max1038_channels,

1077

.num_channels = ARRAY_SIZE(max1038_channels),

1077

.num_channels = ARRAY_SIZE(max1038_channels),

1078

},

1078

},

1079

[max1039] = {

1079

[max1039] = {

1080

.bits = 8,

1080

.bits = 8,

1081

.int_vref_mv = 2048,

1081

.int_vref_mv = 2048,

1082

.mode_list = max1238_mode_list,

1082

.mode_list = max1238_mode_list,

1083

.num_modes = ARRAY_SIZE(max1238_mode_list),

1083

.num_modes = ARRAY_SIZE(max1238_mode_list),

1084

.default_mode = s0to11,

1084

.default_mode = s0to11,

1085

.info = &max1238_info,

1085

.info = &max1238_info,

1086

.channels = max1038_channels,

1086

.channels = max1038_channels,

1087

.num_channels = ARRAY_SIZE(max1038_channels),

1087

.num_channels = ARRAY_SIZE(max1038_channels),

1088

},

1088

},

1089

[max1136] = {

1089

[max1136] = {

1090

.bits = 10,

1090

.bits = 10,

1091

.int_vref_mv = 4096,

1091

.int_vref_mv = 4096,

1092

.mode_list = max1236_mode_list,

1092

.mode_list = max1236_mode_list,

1093

.num_modes = ARRAY_SIZE(max1236_mode_list),

1093

.num_modes = ARRAY_SIZE(max1236_mode_list),

1094

.default_mode = s0to3,

1094

.default_mode = s0to3,

1095

.info = &max1238_info,

1095

.info = &max1238_info,

1096

.channels = max1136_channels,

1096

.channels = max1136_channels,

1097

.num_channels = ARRAY_SIZE(max1136_channels),

1097

.num_channels = ARRAY_SIZE(max1136_channels),

1098

},

1098

},

1099

[max1137] = {

1099

[max1137] = {

1100

.bits = 10,

1100

.bits = 10,

1101

.int_vref_mv = 2048,

1101

.int_vref_mv = 2048,

1102

.mode_list = max1236_mode_list,

1102

.mode_list = max1236_mode_list,

1103

.num_modes = ARRAY_SIZE(max1236_mode_list),

1103

.num_modes = ARRAY_SIZE(max1236_mode_list),

1104

.default_mode = s0to3,

1104

.default_mode = s0to3,

1105

.info = &max1238_info,

1105

.info = &max1238_info,

1106

.channels = max1136_channels,

1106

.channels = max1136_channels,

1107

.num_channels = ARRAY_SIZE(max1136_channels),

1107

.num_channels = ARRAY_SIZE(max1136_channels),

1108

},

1108

},

1109

[max1138] = {

1109

[max1138] = {

1110

.bits = 10,

1110

.bits = 10,

1111

.int_vref_mv = 4096,

1111

.int_vref_mv = 4096,

1112

.mode_list = max1238_mode_list,

1112

.mode_list = max1238_mode_list,

1113

.num_modes = ARRAY_SIZE(max1238_mode_list),

1113

.num_modes = ARRAY_SIZE(max1238_mode_list),

1114

.default_mode = s0to11,

1114

.default_mode = s0to11,

1115

.info = &max1238_info,

1115

.info = &max1238_info,

1116

.channels = max1138_channels,

1116

.channels = max1138_channels,

1117

.num_channels = ARRAY_SIZE(max1138_channels),

1117

.num_channels = ARRAY_SIZE(max1138_channels),

1118

},

1118

},

1119

[max1139] = {

1119

[max1139] = {

1120

.bits = 10,

1120

.bits = 10,

1121

.int_vref_mv = 2048,

1121

.int_vref_mv = 2048,

1122

.mode_list = max1238_mode_list,

1122

.mode_list = max1238_mode_list,

1123

.num_modes = ARRAY_SIZE(max1238_mode_list),

1123

.num_modes = ARRAY_SIZE(max1238_mode_list),

1124

.default_mode = s0to11,

1124

.default_mode = s0to11,

1125

.info = &max1238_info,

1125

.info = &max1238_info,

1126

.channels = max1138_channels,

1126

.channels = max1138_channels,

1127

.num_channels = ARRAY_SIZE(max1138_channels),

1127

.num_channels = ARRAY_SIZE(max1138_channels),

1128

},

1128

},

1129

[max1236] = {

1129

[max1236] = {

1130

.bits = 12,

1130

.bits = 12,

1131

.int_vref_mv = 4096,

1131

.int_vref_mv = 4096,

1132

.mode_list = max1236_mode_list,

1132

.mode_list = max1236_mode_list,

1133

.num_modes = ARRAY_SIZE(max1236_mode_list),

1133

.num_modes = ARRAY_SIZE(max1236_mode_list),

1134

.default_mode = s0to3,

1134

.default_mode = s0to3,

1135

.info = &max1238_info,

1135

.info = &max1238_info,

1136

.channels = max1236_channels,

1136

.channels = max1236_channels,

1137

.num_channels = ARRAY_SIZE(max1236_channels),

1137

.num_channels = ARRAY_SIZE(max1236_channels),

1138

},

1138

},

1139

[max1237] = {

1139

[max1237] = {

1140

.bits = 12,

1140

.bits = 12,

1141

.int_vref_mv = 2048,

1141

.int_vref_mv = 2048,

1142

.mode_list = max1236_mode_list,

1142

.mode_list = max1236_mode_list,

1143

.num_modes = ARRAY_SIZE(max1236_mode_list),

1143

.num_modes = ARRAY_SIZE(max1236_mode_list),

1144

.default_mode = s0to3,

1144

.default_mode = s0to3,

1145

.info = &max1238_info,

1145

.info = &max1238_info,

1146

.channels = max1236_channels,

1146

.channels = max1236_channels,

1147

.num_channels = ARRAY_SIZE(max1236_channels),

1147

.num_channels = ARRAY_SIZE(max1236_channels),

1148

},

1148

},

1149

[max1238] = {

1149

[max1238] = {

1150

.bits = 12,

1150

.bits = 12,

1151

.int_vref_mv = 4096,

1151

.int_vref_mv = 4096,

1152

.mode_list = max1238_mode_list,

1152

.mode_list = max1238_mode_list,

1153

.num_modes = ARRAY_SIZE(max1238_mode_list),

1153

.num_modes = ARRAY_SIZE(max1238_mode_list),

1154

.default_mode = s0to11,

1154

.default_mode = s0to11,

1155

.info = &max1238_info,

1155

.info = &max1238_info,

1156

.channels = max1238_channels,

1156

.channels = max1238_channels,

1157

.num_channels = ARRAY_SIZE(max1238_channels),

1157

.num_channels = ARRAY_SIZE(max1238_channels),

1158

},

1158

},

1159

[max1239] = {

1159

[max1239] = {

1160

.bits = 12,

1160

.bits = 12,

1161

.int_vref_mv = 2048,

1161

.int_vref_mv = 2048,

1162

.mode_list = max1238_mode_list,

1162

.mode_list = max1238_mode_list,

1163

.num_modes = ARRAY_SIZE(max1238_mode_list),

1163

.num_modes = ARRAY_SIZE(max1238_mode_list),

1164

.default_mode = s0to11,

1164

.default_mode = s0to11,

1165

.info = &max1238_info,

1165

.info = &max1238_info,

1166

.channels = max1238_channels,

1166

.channels = max1238_channels,

1167

.num_channels = ARRAY_SIZE(max1238_channels),

1167

.num_channels = ARRAY_SIZE(max1238_channels),

1168

},

1168

},

1169

[max11600] = {

1169

[max11600] = {

1170

.bits = 8,

1170

.bits = 8,

1171

.int_vref_mv = 4096,

1171

.int_vref_mv = 4096,

1172

.mode_list = max11607_mode_list,

1172

.mode_list = max11607_mode_list,

1173

.num_modes = ARRAY_SIZE(max11607_mode_list),

1173

.num_modes = ARRAY_SIZE(max11607_mode_list),

1174

.default_mode = s0to3,

1174

.default_mode = s0to3,

1175

.info = &max1238_info,

1175

.info = &max1238_info,

1176

.channels = max1036_channels,

1176

.channels = max1036_channels,

1177

.num_channels = ARRAY_SIZE(max1036_channels),

1177

.num_channels = ARRAY_SIZE(max1036_channels),

1178

},

1178

},

1179

[max11601] = {

1179

[max11601] = {

1180

.bits = 8,

1180

.bits = 8,

1181

.int_vref_mv = 2048,

1181

.int_vref_mv = 2048,

1182

.mode_list = max11607_mode_list,

1182

.mode_list = max11607_mode_list,

1183

.num_modes = ARRAY_SIZE(max11607_mode_list),

1183

.num_modes = ARRAY_SIZE(max11607_mode_list),

1184

.default_mode = s0to3,

1184

.default_mode = s0to3,

1185

.info = &max1238_info,

1185

.info = &max1238_info,

1186

.channels = max1036_channels,

1186

.channels = max1036_channels,

1187

.num_channels = ARRAY_SIZE(max1036_channels),

1187

.num_channels = ARRAY_SIZE(max1036_channels),

1188

},

1188

},

1189

[max11602] = {

1189

[max11602] = {

1190

.bits = 8,

1190

.bits = 8,

1191

.int_vref_mv = 4096,

1191

.int_vref_mv = 4096,

1192

.mode_list = max11608_mode_list,

1192

.mode_list = max11608_mode_list,

1193

.num_modes = ARRAY_SIZE(max11608_mode_list),

1193

.num_modes = ARRAY_SIZE(max11608_mode_list),

1194

.default_mode = s0to7,

1194

.default_mode = s0to7,

1195

.info = &max1238_info,

1195

.info = &max1238_info,

1196

.channels = max11602_channels,

1196

.channels = max11602_channels,

1197

.num_channels = ARRAY_SIZE(max11602_channels),

1197

.num_channels = ARRAY_SIZE(max11602_channels),

1198

},

1198

},

1199

[max11603] = {

1199

[max11603] = {

1200

.bits = 8,

1200

.bits = 8,

1201

.int_vref_mv = 2048,

1201

.int_vref_mv = 2048,

1202

.mode_list = max11608_mode_list,

1202

.mode_list = max11608_mode_list,

1203

.num_modes = ARRAY_SIZE(max11608_mode_list),

1203

.num_modes = ARRAY_SIZE(max11608_mode_list),

1204

.default_mode = s0to7,

1204

.default_mode = s0to7,

1205

.info = &max1238_info,

1205

.info = &max1238_info,

1206

.channels = max11602_channels,

1206

.channels = max11602_channels,

1207

.num_channels = ARRAY_SIZE(max11602_channels),

1207

.num_channels = ARRAY_SIZE(max11602_channels),

1208

},

1208

},

1209

[max11604] = {

1209

[max11604] = {

1210

.bits = 8,

1210

.bits = 8,

1211

.int_vref_mv = 4098,

1211

.int_vref_mv = 4098,

1212

.mode_list = max1238_mode_list,

1212

.mode_list = max1238_mode_list,

1213

.num_modes = ARRAY_SIZE(max1238_mode_list),

1213

.num_modes = ARRAY_SIZE(max1238_mode_list),

1214

.default_mode = s0to11,

1214

.default_mode = s0to11,

1215

.info = &max1238_info,

1215

.info = &max1238_info,

1216

.channels = max1238_channels,

1216

.channels = max1238_channels,

1217

.num_channels = ARRAY_SIZE(max1238_channels),

1217

.num_channels = ARRAY_SIZE(max1238_channels),

1218

},

1218

},

1219

[max11605] = {

1219

[max11605] = {

1220

.bits = 8,

1220

.bits = 8,

1221

.int_vref_mv = 2048,

1221

.int_vref_mv = 2048,

1222

.mode_list = max1238_mode_list,

1222

.mode_list = max1238_mode_list,

1223

.num_modes = ARRAY_SIZE(max1238_mode_list),

1223

.num_modes = ARRAY_SIZE(max1238_mode_list),

1224

.default_mode = s0to11,

1224

.default_mode = s0to11,

1225

.info = &max1238_info,

1225

.info = &max1238_info,

1226

.channels = max1238_channels,

1226

.channels = max1238_channels,

1227

.num_channels = ARRAY_SIZE(max1238_channels),

1227

.num_channels = ARRAY_SIZE(max1238_channels),

1228

},

1228

},

1229

[max11606] = {

1229

[max11606] = {

1230

.bits = 10,

1230

.bits = 10,

1231

.int_vref_mv = 4096,

1231

.int_vref_mv = 4096,

1232

.mode_list = max11607_mode_list,

1232

.mode_list = max11607_mode_list,

1233

.num_modes = ARRAY_SIZE(max11607_mode_list),

1233

.num_modes = ARRAY_SIZE(max11607_mode_list),

1234

.default_mode = s0to3,

1234

.default_mode = s0to3,

1235

.info = &max1238_info,

1235

.info = &max1238_info,

1236

.channels = max1136_channels,

1236

.channels = max1136_channels,

1237

.num_channels = ARRAY_SIZE(max1136_channels),

1237

.num_channels = ARRAY_SIZE(max1136_channels),

1238

},

1238

},

1239

[max11607] = {

1239

[max11607] = {

1240

.bits = 10,

1240

.bits = 10,

1241

.int_vref_mv = 2048,

1241

.int_vref_mv = 2048,

1242

.mode_list = max11607_mode_list,

1242

.mode_list = max11607_mode_list,

1243

.num_modes = ARRAY_SIZE(max11607_mode_list),

1243

.num_modes = ARRAY_SIZE(max11607_mode_list),

1244

.default_mode = s0to3,

1244

.default_mode = s0to3,

1245

.info = &max1238_info,

1245

.info = &max1238_info,

1246

.channels = max1136_channels,

1246

.channels = max1136_channels,

1247

.num_channels = ARRAY_SIZE(max1136_channels),

1247

.num_channels = ARRAY_SIZE(max1136_channels),

1248

},

1248

},

1249

[max11608] = {

1249

[max11608] = {

1250

.bits = 10,

1250

.bits = 10,

1251

.int_vref_mv = 4096,

1251

.int_vref_mv = 4096,

1252

.mode_list = max11608_mode_list,

1252

.mode_list = max11608_mode_list,

1253

.num_modes = ARRAY_SIZE(max11608_mode_list),

1253

.num_modes = ARRAY_SIZE(max11608_mode_list),

1254

.default_mode = s0to7,

1254

.default_mode = s0to7,

1255

.info = &max1238_info,

1255

.info = &max1238_info,

1256

.channels = max11608_channels,

1256

.channels = max11608_channels,

1257

.num_channels = ARRAY_SIZE(max11608_channels),

1257

.num_channels = ARRAY_SIZE(max11608_channels),

1258

},

1258

},

1259

[max11609] = {

1259

[max11609] = {

1260

.bits = 10,

1260

.bits = 10,

1261

.int_vref_mv = 2048,

1261

.int_vref_mv = 2048,

1262

.mode_list = max11608_mode_list,

1262

.mode_list = max11608_mode_list,

1263

.num_modes = ARRAY_SIZE(max11608_mode_list),

1263

.num_modes = ARRAY_SIZE(max11608_mode_list),

1264

.default_mode = s0to7,

1264

.default_mode = s0to7,

1265

.info = &max1238_info,

1265

.info = &max1238_info,

1266

.channels = max11608_channels,

1266

.channels = max11608_channels,

1267

.num_channels = ARRAY_SIZE(max11608_channels),

1267

.num_channels = ARRAY_SIZE(max11608_channels),

1268

},

1268

},

1269

[max11610] = {

1269

[max11610] = {

1270

.bits = 10,

1270

.bits = 10,

1271

.int_vref_mv = 4098,

1271

.int_vref_mv = 4098,

1272

.mode_list = max1238_mode_list,

1272

.mode_list = max1238_mode_list,

1273

.num_modes = ARRAY_SIZE(max1238_mode_list),

1273

.num_modes = ARRAY_SIZE(max1238_mode_list),

1274

.default_mode = s0to11,

1274

.default_mode = s0to11,

1275

.info = &max1238_info,

1275

.info = &max1238_info,

1276

.channels = max1238_channels,

1276

.channels = max1238_channels,

1277

.num_channels = ARRAY_SIZE(max1238_channels),

1277

.num_channels = ARRAY_SIZE(max1238_channels),

1278

},

1278

},

1279

[max11611] = {

1279

[max11611] = {

1280

.bits = 10,

1280

.bits = 10,

1281

.int_vref_mv = 2048,

1281

.int_vref_mv = 2048,

1282

.mode_list = max1238_mode_list,

1282

.mode_list = max1238_mode_list,

1283

.num_modes = ARRAY_SIZE(max1238_mode_list),

1283

.num_modes = ARRAY_SIZE(max1238_mode_list),

1284

.default_mode = s0to11,

1284

.default_mode = s0to11,

1285

.info = &max1238_info,

1285

.info = &max1238_info,

1286

.channels = max1238_channels,

1286

.channels = max1238_channels,

1287

.num_channels = ARRAY_SIZE(max1238_channels),

1287

.num_channels = ARRAY_SIZE(max1238_channels),

1288

},

1288

},

1289

[max11612] = {

1289

[max11612] = {

1290

.bits = 12,

1290

.bits = 12,

1291

.int_vref_mv = 4096,

1291

.int_vref_mv = 4096,

1292

.mode_list = max11607_mode_list,

1292

.mode_list = max11607_mode_list,

1293

.num_modes = ARRAY_SIZE(max11607_mode_list),

1293

.num_modes = ARRAY_SIZE(max11607_mode_list),

1294

.default_mode = s0to3,

1294

.default_mode = s0to3,

1295

.info = &max1238_info,

1295

.info = &max1238_info,

1296

.channels = max1363_channels,

1296

.channels = max1363_channels,

1297

.num_channels = ARRAY_SIZE(max1363_channels),

1297

.num_channels = ARRAY_SIZE(max1363_channels),

1298

},

1298

},

1299

[max11613] = {

1299

[max11613] = {

1300

.bits = 12,

1300

.bits = 12,

1301

.int_vref_mv = 2048,

1301

.int_vref_mv = 2048,

1302

.mode_list = max11607_mode_list,

1302

.mode_list = max11607_mode_list,

1303

.num_modes = ARRAY_SIZE(max11607_mode_list),

1303

.num_modes = ARRAY_SIZE(max11607_mode_list),

1304

.default_mode = s0to3,

1304

.default_mode = s0to3,

1305

.info = &max1238_info,

1305

.info = &max1238_info,

1306

.channels = max1363_channels,

1306

.channels = max1363_channels,

1307

.num_channels = ARRAY_SIZE(max1363_channels),

1307

.num_channels = ARRAY_SIZE(max1363_channels),

1308

},

1308

},

1309

[max11614] = {

1309

[max11614] = {

1310

.bits = 12,

1310

.bits = 12,

1311

.int_vref_mv = 4096,

1311

.int_vref_mv = 4096,

1312

.mode_list = max11608_mode_list,

1312

.mode_list = max11608_mode_list,

1313

.num_modes = ARRAY_SIZE(max11608_mode_list),

1313

.num_modes = ARRAY_SIZE(max11608_mode_list),

1314

.default_mode = s0to7,

1314

.default_mode = s0to7,

1315

.info = &max1238_info,

1315

.info = &max1238_info,

1316

.channels = max11614_channels,

1316

.channels = max11614_channels,

1317

.num_channels = ARRAY_SIZE(max11614_channels),

1317

.num_channels = ARRAY_SIZE(max11614_channels),

1318

},

1318

},

1319

[max11615] = {

1319

[max11615] = {

1320

.bits = 12,

1320

.bits = 12,

1321

.int_vref_mv = 2048,

1321

.int_vref_mv = 2048,

1322

.mode_list = max11608_mode_list,

1322

.mode_list = max11608_mode_list,

1323

.num_modes = ARRAY_SIZE(max11608_mode_list),

1323

.num_modes = ARRAY_SIZE(max11608_mode_list),

1324

.default_mode = s0to7,

1324

.default_mode = s0to7,

1325

.info = &max1238_info,

1325

.info = &max1238_info,

1326

.channels = max11614_channels,

1326

.channels = max11614_channels,

1327

.num_channels = ARRAY_SIZE(max11614_channels),

1327

.num_channels = ARRAY_SIZE(max11614_channels),

1328

},

1328

},

1329

[max11616] = {

1329

[max11616] = {

1330

.bits = 12,

1330

.bits = 12,

1331

.int_vref_mv = 4098,

1331

.int_vref_mv = 4098,

1332

.mode_list = max1238_mode_list,

1332

.mode_list = max1238_mode_list,

1333

.num_modes = ARRAY_SIZE(max1238_mode_list),

1333

.num_modes = ARRAY_SIZE(max1238_mode_list),

1334

.default_mode = s0to11,

1334

.default_mode = s0to11,

1335

.info = &max1238_info,

1335

.info = &max1238_info,

1336

.channels = max1238_channels,

1336

.channels = max1238_channels,

1337

.num_channels = ARRAY_SIZE(max1238_channels),

1337

.num_channels = ARRAY_SIZE(max1238_channels),

1338

},

1338

},

1339

[max11617] = {

1339

[max11617] = {

1340

.bits = 12,

1340

.bits = 12,

1341

.int_vref_mv = 2048,

1341

.int_vref_mv = 2048,

1342

.mode_list = max1238_mode_list,

1342

.mode_list = max1238_mode_list,

1343

.num_modes = ARRAY_SIZE(max1238_mode_list),

1343

.num_modes = ARRAY_SIZE(max1238_mode_list),

1344

.default_mode = s0to11,

1344

.default_mode = s0to11,

1345

.info = &max1238_info,

1345

.info = &max1238_info,

1346

.channels = max1238_channels,

1346

.channels = max1238_channels,

1347

.num_channels = ARRAY_SIZE(max1238_channels),

1347

.num_channels = ARRAY_SIZE(max1238_channels),

1348

},

1348

},

1349

[max11644] = {

1349

[max11644] = {

1350

.bits = 12,

1350

.bits = 12,

1351

.int_vref_mv = 2048,

1351

.int_vref_mv = 2048,

1352

.mode_list = max11644_mode_list,

1352

.mode_list = max11644_mode_list,

1353

.num_modes = ARRAY_SIZE(max11644_mode_list),

1353

.num_modes = ARRAY_SIZE(max11644_mode_list),

1354

.default_mode = s0to1,

1354

.default_mode = s0to1,

1355

.info = &max1238_info,

1355

.info = &max1238_info,

1356

.channels = max11644_channels,

1356

.channels = max11644_channels,

1357

.num_channels = ARRAY_SIZE(max11644_channels),

1357

.num_channels = ARRAY_SIZE(max11644_channels),

1358

},

1358

},

1359

[max11645] = {

1359

[max11645] = {

1360

.bits = 12,

1360

.bits = 12,

1361

.int_vref_mv = 4096,

1361

.int_vref_mv = 4096,

1362

.mode_list = max11644_mode_list,

1362

.mode_list = max11644_mode_list,

1363

.num_modes = ARRAY_SIZE(max11644_mode_list),

1363

.num_modes = ARRAY_SIZE(max11644_mode_list),

1364

.default_mode = s0to1,

1364

.default_mode = s0to1,

1365

.info = &max1238_info,

1365

.info = &max1238_info,

1366

.channels = max11644_channels,

1366

.channels = max11644_channels,

1367

.num_channels = ARRAY_SIZE(max11644_channels),

1367

.num_channels = ARRAY_SIZE(max11644_channels),

1368

},

1368

},

1369

[max11646] = {

1369

[max11646] = {

1370

.bits = 10,

1370

.bits = 10,

1371

.int_vref_mv = 2048,

1371

.int_vref_mv = 2048,

1372

.mode_list = max11644_mode_list,

1372

.mode_list = max11644_mode_list,

1373

.num_modes = ARRAY_SIZE(max11644_mode_list),

1373

.num_modes = ARRAY_SIZE(max11644_mode_list),

1374

.default_mode = s0to1,

1374

.default_mode = s0to1,

1375

.info = &max1238_info,

1375

.info = &max1238_info,

1376

.channels = max11646_channels,

1376

.channels = max11646_channels,

1377

.num_channels = ARRAY_SIZE(max11646_channels),

1377

.num_channels = ARRAY_SIZE(max11646_channels),

1378

},

1378

},

1379

[max11647] = {

1379

[max11647] = {

1380

.bits = 10,

1380

.bits = 10,

1381

.int_vref_mv = 4096,

1381

.int_vref_mv = 4096,

1382

.mode_list = max11644_mode_list,

1382

.mode_list = max11644_mode_list,

1383

.num_modes = ARRAY_SIZE(max11644_mode_list),

1383

.num_modes = ARRAY_SIZE(max11644_mode_list),

1384

.default_mode = s0to1,

1384

.default_mode = s0to1,

1385

.info = &max1238_info,

1385

.info = &max1238_info,

1386

.channels = max11646_channels,

1386

.channels = max11646_channels,

1387

.num_channels = ARRAY_SIZE(max11646_channels),

1387

.num_channels = ARRAY_SIZE(max11646_channels),

1388

},

1388

},

1389

};

1389

};

1390

1391

static int max1363_initial_setup(struct max1363_state *st)

1391

static int max1363_initial_setup(struct max1363_state *st)

1392

{

1392

{

1393

st->setupbyte = MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD

1393

st->setupbyte = MAX1363_SETUP_INT_CLOCK

1394

| MAX1363_SETUP_POWER_UP_INT_REF

1395

| MAX1363_SETUP_INT_CLOCK

1396

| MAX1363_SETUP_UNIPOLAR

1394

| MAX1363_SETUP_UNIPOLAR

1397

| MAX1363_SETUP_NORESET;

1395

| MAX1363_SETUP_NORESET;

1398

1396

1397

if (st->vref)

1398

st->setupbyte |= MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF;

1399

else

1400

st->setupbyte |= MAX1363_SETUP_POWER_UP_INT_REF

1401

| MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_INT;

1402

1399

/* Set scan mode writes the config anyway so wait until then */

1403

/* Set scan mode writes the config anyway so wait until then */

1400

st->setupbyte = MAX1363_SETUP_BYTE(st->setupbyte);

1404

st->setupbyte = MAX1363_SETUP_BYTE(st->setupbyte);

1401

st->current_mode = &max1363_mode_table[st->chip_info->default_mode];

1405

st->current_mode = &max1363_mode_table[st->chip_info->default_mode];

1402

st->configbyte = MAX1363_CONFIG_BYTE(st->configbyte);

1406

st->configbyte = MAX1363_CONFIG_BYTE(st->configbyte);

1403

1407

1404

return max1363_set_scan_mode(st);

1408

return max1363_set_scan_mode(st);

1405

}

1409

}

1406

1410

1407

static int max1363_alloc_scan_masks(struct iio_dev *indio_dev)

1411

static int max1363_alloc_scan_masks(struct iio_dev *indio_dev)

1408

{

1412

{

1409

struct max1363_state *st = iio_priv(indio_dev);

1413

struct max1363_state *st = iio_priv(indio_dev);

1410

unsigned long *masks;

1414

unsigned long *masks;

1411

int i;

1415

int i;

1412

1416

1413

masks = devm_kzalloc(&indio_dev->dev,

1417

masks = devm_kzalloc(&indio_dev->dev,

1414

BITS_TO_LONGS(MAX1363_MAX_CHANNELS) * sizeof(long) *

1418

BITS_TO_LONGS(MAX1363_MAX_CHANNELS) * sizeof(long) *

1415

(st->chip_info->num_modes + 1), GFP_KERNEL);

1419

(st->chip_info->num_modes + 1), GFP_KERNEL);

1416

if (!masks)

1420

if (!masks)

1417

return -ENOMEM;

1421

return -ENOMEM;

1418

1422

1419

for (i = 0; i < st->chip_info->num_modes; i++)

1423

for (i = 0; i < st->chip_info->num_modes; i++)

1420

bitmap_copy(masks + BITS_TO_LONGS(MAX1363_MAX_CHANNELS)*i,

1424

bitmap_copy(masks + BITS_TO_LONGS(MAX1363_MAX_CHANNELS)*i,

1421

max1363_mode_table[st->chip_info->mode_list[i]]

1425

max1363_mode_table[st->chip_info->mode_list[i]]

1422

.modemask, MAX1363_MAX_CHANNELS);

1426

.modemask, MAX1363_MAX_CHANNELS);

1423

1427

1424

indio_dev->available_scan_masks = masks;

1428

indio_dev->available_scan_masks = masks;

1425

1429

1426

return 0;

1430

return 0;

1427

}

1431

}

1428

1432

1429

static irqreturn_t max1363_trigger_handler(int irq, void *p)

1433

static irqreturn_t max1363_trigger_handler(int irq, void *p)

1430

{

1434

{

1431

struct iio_poll_func *pf = p;

1435

struct iio_poll_func *pf = p;

1432

struct iio_dev *indio_dev = pf->indio_dev;

1436

struct iio_dev *indio_dev = pf->indio_dev;

1433

struct max1363_state *st = iio_priv(indio_dev);

1437

struct max1363_state *st = iio_priv(indio_dev);

1434

s64 time_ns;

1438

s64 time_ns;

1435

__u8 *rxbuf;

1439

__u8 *rxbuf;

1436

int b_sent;

1440

int b_sent;

1437

size_t d_size;

1441

size_t d_size;

1438

unsigned long numvals = bitmap_weight(st->current_mode->modemask,

1442

unsigned long numvals = bitmap_weight(st->current_mode->modemask,

1439

MAX1363_MAX_CHANNELS);

1443

MAX1363_MAX_CHANNELS);

1440

1444

1441

/* Ensure the timestamp is 8 byte aligned */

1445

/* Ensure the timestamp is 8 byte aligned */

1442

if (st->chip_info->bits != 8)

1446

if (st->chip_info->bits != 8)

1443

d_size = numvals*2;

1447

d_size = numvals*2;

1444

else

1448

else

1445

d_size = numvals;

1449

d_size = numvals;

1446

if (indio_dev->scan_timestamp) {

1450

if (indio_dev->scan_timestamp) {

1447

d_size += sizeof(s64);

1451

d_size += sizeof(s64);

1448

if (d_size % sizeof(s64))

1452

if (d_size % sizeof(s64))

1449

d_size += sizeof(s64) - (d_size % sizeof(s64));

1453

d_size += sizeof(s64) - (d_size % sizeof(s64));

1450

}

1454

}

1451

/* Monitor mode prevents reading. Whilst not currently implemented

1455

/* Monitor mode prevents reading. Whilst not currently implemented

1452

* might as well have this test in here in the meantime as it does

1456

* might as well have this test in here in the meantime as it does

1453

* no harm.

1457

* no harm.

1454

*/

1458

*/

1455

if (numvals == 0)

1459

if (numvals == 0)

1456

goto done;

1460

goto done;

1457

1461

1458

rxbuf = kmalloc(d_size, GFP_KERNEL);

1462

rxbuf = kmalloc(d_size, GFP_KERNEL);

1459

if (rxbuf == NULL)

1463

if (rxbuf == NULL)

1460

goto done;

1464

goto done;

1461

if (st->chip_info->bits != 8)

1465

if (st->chip_info->bits != 8)

1462

b_sent = i2c_master_recv(st->client, rxbuf, numvals*2);

1466

b_sent = i2c_master_recv(st->client, rxbuf, numvals*2);

1463

else

1467

else

1464

b_sent = i2c_master_recv(st->client, rxbuf, numvals);

1468

b_sent = i2c_master_recv(st->client, rxbuf, numvals);

1465

if (b_sent < 0)

1469

if (b_sent < 0)

1466

goto done_free;

1470

goto done_free;

1467

1471

1468

time_ns = iio_get_time_ns();

1472

time_ns = iio_get_time_ns();

1469

1473

1470

if (indio_dev->scan_timestamp)

1474

if (indio_dev->scan_timestamp)

1471

memcpy(rxbuf + d_size - sizeof(s64), &time_ns, sizeof(time_ns));

1475

memcpy(rxbuf + d_size - sizeof(s64), &time_ns, sizeof(time_ns));

1472

iio_push_to_buffers(indio_dev, rxbuf);

1476

iio_push_to_buffers(indio_dev, rxbuf);

1473

1477

1474

done_free:

1478

done_free:

1475

kfree(rxbuf);

1479

kfree(rxbuf);

1476

done:

1480

done:

1477

iio_trigger_notify_done(indio_dev->trig);

1481

iio_trigger_notify_done(indio_dev->trig);

1478

1482

1479

return IRQ_HANDLED;

1483

return IRQ_HANDLED;

1480

}

1484

}

1481

1485

1482

static const struct iio_buffer_setup_ops max1363_buffered_setup_ops = {

1486

static const struct iio_buffer_setup_ops max1363_buffered_setup_ops = {

1483

.postenable = &iio_triggered_buffer_postenable,

1487

.postenable = &iio_triggered_buffer_postenable,

1484

.preenable = &iio_sw_buffer_preenable,

1488

.preenable = &iio_sw_buffer_preenable,

1485

.predisable = &iio_triggered_buffer_predisable,

1489

.predisable = &iio_triggered_buffer_predisable,

1486

};

1490

};

1487

1491

1488

static int max1363_probe(struct i2c_client *client,

1492

static int max1363_probe(struct i2c_client *client,

1489

const struct i2c_device_id *id)

1493

const struct i2c_device_id *id)

1490

{

1494

{

1491

int ret;

1495

int ret;

1492

struct max1363_state *st;

1496

struct max1363_state *st;

1493

struct iio_dev *indio_dev;

1497

struct iio_dev *indio_dev;

1498

struct regulator *vref;

1494

1499

1495

indio_dev = iio_device_alloc(sizeof(struct max1363_state));

1500

indio_dev = iio_device_alloc(sizeof(struct max1363_state));

1496

if (indio_dev == NULL) {

1501

if (indio_dev == NULL) {

1497

ret = -ENOMEM;

1502

ret = -ENOMEM;

1498

goto error_out;

1503

goto error_out;

1499

}

1504

}

1500

1505

1501

indio_dev->dev.of_node = client->dev.of_node;

1506

indio_dev->dev.of_node = client->dev.of_node;

1502

ret = iio_map_array_register(indio_dev, client->dev.platform_data);

1507

ret = iio_map_array_register(indio_dev, client->dev.platform_data);

1503

if (ret < 0)

1508

if (ret < 0)

1504

goto error_free_device;

1509

goto error_free_device;

1505

1510

1506

st = iio_priv(indio_dev);

1511

st = iio_priv(indio_dev);

1507

1512

1508

st->reg = devm_regulator_get(&client->dev, "vcc");

1513

st->reg = devm_regulator_get(&client->dev, "vcc");

1509

if (IS_ERR(st->reg)) {

1514

if (IS_ERR(st->reg)) {

1510

ret = PTR_ERR(st->reg);

1515

ret = PTR_ERR(st->reg);

1511

goto error_unregister_map;

1516

goto error_unregister_map;

1512

}

1517

}

1513

1518

1514

ret = regulator_enable(st->reg);

1519

ret = regulator_enable(st->reg);

1515

if (ret)

1520

if (ret)

1516

goto error_unregister_map;

1521

goto error_unregister_map;

1517

1522

1518

/* this is only used for device removal purposes */

1523

/* this is only used for device removal purposes */

1519

i2c_set_clientdata(client, indio_dev);

1524

i2c_set_clientdata(client, indio_dev);

1520

1525

1521

st->chip_info = &max1363_chip_info_tbl[id->driver_data];

1526

st->chip_info = &max1363_chip_info_tbl[id->driver_data];

1522

st->client = client;

1527

st->client = client;

1523

1528

1529

st->vref_uv = st->chip_info->int_vref_mv * 1000;

1530

vref = devm_regulator_get(&client->dev, "vref");

1531

if (!IS_ERR(vref)) {

1532

int vref_uv;

1533

1534

ret = regulator_enable(vref);

1535

if (ret)

1536

goto error_disable_reg;

1537

st->vref = vref;

1538

vref_uv = regulator_get_voltage(vref);

1539

if (vref_uv <= 0) {

1540

ret = -EINVAL;

1541

goto error_disable_reg;

1542

}

1543

st->vref_uv = vref_uv;

1544

}

1545

1524

ret = max1363_alloc_scan_masks(indio_dev);

1546

ret = max1363_alloc_scan_masks(indio_dev);

1525

if (ret)

1547

if (ret)

1526

goto error_disable_reg;

1548

goto error_disable_reg;

1527

1549

1528

/* Establish that the iio_dev is a child of the i2c device */

1550

/* Establish that the iio_dev is a child of the i2c device */

1529

indio_dev->dev.parent = &client->dev;

1551

indio_dev->dev.parent = &client->dev;

1530

indio_dev->name = id->name;

1552

indio_dev->name = id->name;

1531

indio_dev->channels = st->chip_info->channels;

1553

indio_dev->channels = st->chip_info->channels;

1532

indio_dev->num_channels = st->chip_info->num_channels;

1554

indio_dev->num_channels = st->chip_info->num_channels;

1533

indio_dev->info = st->chip_info->info;

1555

indio_dev->info = st->chip_info->info;

1534

indio_dev->modes = INDIO_DIRECT_MODE;

1556

indio_dev->modes = INDIO_DIRECT_MODE;

1535

ret = max1363_initial_setup(st);

1557

ret = max1363_initial_setup(st);

1536

if (ret < 0)

1558

if (ret < 0)

1537

goto error_disable_reg;

1559

goto error_disable_reg;

1538

1560

1539

ret = iio_triggered_buffer_setup(indio_dev, NULL,

1561

ret = iio_triggered_buffer_setup(indio_dev, NULL,

1540

&max1363_trigger_handler, &max1363_buffered_setup_ops);

1562

&max1363_trigger_handler, &max1363_buffered_setup_ops);

1541

if (ret)

1563

if (ret)

1542

goto error_disable_reg;

1564

goto error_disable_reg;

1543

1565

1544

if (client->irq) {

1566

if (client->irq) {

1545

ret = devm_request_threaded_irq(&client->dev, st->client->irq,

1567

ret = devm_request_threaded_irq(&client->dev, st->client->irq,

1546

NULL,

1568

NULL,

1547

&max1363_event_handler,

1569

&max1363_event_handler,

1548

IRQF_TRIGGER_RISING | IRQF_ONESHOT,

1570

IRQF_TRIGGER_RISING | IRQF_ONESHOT,

1549

"max1363_event",

1571

"max1363_event",

1550

indio_dev);

1572

indio_dev);

1551

1573

1552

if (ret)

1574

if (ret)

1553

goto error_uninit_buffer;

1575

goto error_uninit_buffer;

1554

}

1576

}

1555

1577

1556

ret = iio_device_register(indio_dev);

1578

ret = iio_device_register(indio_dev);

1557

if (ret < 0)

1579

if (ret < 0)

1558

goto error_uninit_buffer;

1580

goto error_uninit_buffer;

1559

1581

1560

return 0;

1582

return 0;

1561

1583

1562

error_uninit_buffer:

1584

error_uninit_buffer:

1563

iio_triggered_buffer_cleanup(indio_dev);

1585

iio_triggered_buffer_cleanup(indio_dev);

1564

error_disable_reg:

1586

error_disable_reg:

1587

if (st->vref)

1588

regulator_disable(st->vref);

1565

regulator_disable(st->reg);

1589

regulator_disable(st->reg);

1566

error_unregister_map:

1590

error_unregister_map:

1567

iio_map_array_unregister(indio_dev);

1591

iio_map_array_unregister(indio_dev);

1568

error_free_device:

1592

error_free_device:

1569

iio_device_free(indio_dev);

1593

iio_device_free(indio_dev);

1570

error_out:

1594

error_out:

1571

return ret;

1595

return ret;

1572

}

1596

}

1573

1597

1574

static int max1363_remove(struct i2c_client *client)

1598

static int max1363_remove(struct i2c_client *client)

1575

{

1599

{

1576

struct iio_dev *indio_dev = i2c_get_clientdata(client);

1600

struct iio_dev *indio_dev = i2c_get_clientdata(client);

1577

struct max1363_state *st = iio_priv(indio_dev);

1601

struct max1363_state *st = iio_priv(indio_dev);

1578

1602

1579

iio_device_unregister(indio_dev);

1603

iio_device_unregister(indio_dev);

1580

iio_triggered_buffer_cleanup(indio_dev);

1604

iio_triggered_buffer_cleanup(indio_dev);

1605

if (st->vref)

1606

regulator_disable(st->vref);

1581

regulator_disable(st->reg);

1607

regulator_disable(st->reg);

1582

iio_map_array_unregister(indio_dev);

1608

iio_map_array_unregister(indio_dev);

1583

iio_device_free(indio_dev);

1609

iio_device_free(indio_dev);

1584

1610

1585

return 0;

1611

return 0;

1586

}

1612

}

1587

1613

1588

static const struct i2c_device_id max1363_id[] = {

1614

static const struct i2c_device_id max1363_id[] = {

1589

{ "max1361", max1361 },

1615

{ "max1361", max1361 },

1590

{ "max1362", max1362 },

1616

{ "max1362", max1362 },

1591

{ "max1363", max1363 },

1617

{ "max1363", max1363 },

1592

{ "max1364", max1364 },

1618

{ "max1364", max1364 },

1593

{ "max1036", max1036 },

1619

{ "max1036", max1036 },

1594

{ "max1037", max1037 },

1620

{ "max1037", max1037 },

1595

{ "max1038", max1038 },

1621

{ "max1038", max1038 },

1596

{ "max1039", max1039 },

1622

{ "max1039", max1039 },

1597

{ "max1136", max1136 },

1623

{ "max1136", max1136 },

1598

{ "max1137", max1137 },

1624

{ "max1137", max1137 },

1599

{ "max1138", max1138 },

1625

{ "max1138", max1138 },

1600

{ "max1139", max1139 },

1626

{ "max1139", max1139 },

1601

{ "max1236", max1236 },

1627

{ "max1236", max1236 },

1602

{ "max1237", max1237 },

1628

{ "max1237", max1237 },

1603

{ "max1238", max1238 },

1629

{ "max1238", max1238 },

1604

{ "max1239", max1239 },

1630

{ "max1239", max1239 },

1605

{ "max11600", max11600 },

1631

{ "max11600", max11600 },

1606

{ "max11601", max11601 },

1632

{ "max11601", max11601 },

1607

{ "max11602", max11602 },

1633

{ "max11602", max11602 },

1608

{ "max11603", max11603 },

1634

{ "max11603", max11603 },

1609

{ "max11604", max11604 },

1635

{ "max11604", max11604 },

1610

{ "max11605", max11605 },

1636

{ "max11605", max11605 },

1611

{ "max11606", max11606 },

1637

{ "max11606", max11606 },

1612

{ "max11607", max11607 },

1638

{ "max11607", max11607 },

1613

{ "max11608", max11608 },

1639

{ "max11608", max11608 },

1614

{ "max11609", max11609 },

1640

{ "max11609", max11609 },

1615

{ "max11610", max11610 },

1641

{ "max11610", max11610 },

1616

{ "max11611", max11611 },

1642

{ "max11611", max11611 },

1617

{ "max11612", max11612 },

1643

{ "max11612", max11612 },

1618

{ "max11613", max11613 },

1644

{ "max11613", max11613 },

1619

{ "max11614", max11614 },

1645

{ "max11614", max11614 },

1620

{ "max11615", max11615 },

1646

{ "max11615", max11615 },

1621

{ "max11616", max11616 },

1647

{ "max11616", max11616 },

1622

{ "max11617", max11617 },

1648

{ "max11617", max11617 },

1623

{}

1649

{}

1624

};

1650

};

1625

1651

1626

MODULE_DEVICE_TABLE(i2c, max1363_id);

1652

MODULE_DEVICE_TABLE(i2c, max1363_id);

1627

1653

1628

static struct i2c_driver max1363_driver = {

1654

static struct i2c_driver max1363_driver = {

1629

.driver = {

1655

.driver = {

1630

.name = "max1363",

1656

.name = "max1363",

1631

},

1657

},

1632

.probe = max1363_probe,

1658

.probe = max1363_probe,

1633

.remove = max1363_remove,

1659

.remove = max1363_remove,

GITLAB

iio/adc: (max1363) Add support for external reference voltage

  /*
   * iio/adc/max1363.c
   * Copyright (C) 2008-2010 Jonathan Cameron
   *
   * based on linux/drivers/i2c/chips/max123x
   * Copyright (C) 2002-2004 Stefan Eletzhofer
   *
   * based on linux/drivers/acron/char/pcf8583.c
   * Copyright (C) 2000 Russell King
   *
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License version 2 as
   * published by the Free Software Foundation.
   *
   * max1363.c
   *
   * Partial support for max1363 and similar chips.
   *
   * Not currently implemented.
   *
   * - Control of internal reference.
   */
 #include <linux/interrupt.h>
 #include <linux/device.h>
 #include <linux/kernel.h>
 #include <linux/sysfs.h>
 #include <linux/list.h>
 #include <linux/i2c.h>
 #include <linux/regulator/consumer.h>
 #include <linux/slab.h>
 #include <linux/err.h>
 #include <linux/module.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 #include <linux/iio/events.h>
 #include <linux/iio/buffer.h>
 #include <linux/iio/driver.h>
 #include <linux/iio/kfifo_buf.h>
 #include <linux/iio/trigger_consumer.h>
 #include <linux/iio/triggered_buffer.h>
 #define MAX1363_SETUP_BYTE(a) ((a) | 0x80)
 /* There is a fair bit more defined here than currently
  * used, but the intention is to support everything these
  * chips do in the long run */
 /* see data sheets */
 /* max1363 and max1236, max1237, max1238, max1239 */
 #define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD	0x00
 #define MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF	0x20
 #define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_INT	0x40
 #define MAX1363_SETUP_AIN3_IS_REF_REF_IS_INT	0x60
 #define MAX1363_SETUP_POWER_UP_INT_REF		0x10
 #define MAX1363_SETUP_POWER_DOWN_INT_REF	0x00
 /* think about including max11600 etc - more settings */
 #define MAX1363_SETUP_EXT_CLOCK			0x08
 #define MAX1363_SETUP_INT_CLOCK			0x00
 #define MAX1363_SETUP_UNIPOLAR			0x00
 #define MAX1363_SETUP_BIPOLAR			0x04
 #define MAX1363_SETUP_RESET			0x00
 #define MAX1363_SETUP_NORESET			0x02
 /* max1363 only - though don't care on others.
  * For now monitor modes are not implemented as the relevant
  * line is not connected on my test board.
  * The definitions are here as I intend to add this soon.
  */
 #define MAX1363_SETUP_MONITOR_SETUP		0x01
 /* Specific to the max1363 */
 #define MAX1363_MON_RESET_CHAN(a) (1 << ((a) + 4))
 #define MAX1363_MON_INT_ENABLE			0x01
 /* defined for readability reasons */
 /* All chips */
 #define MAX1363_CONFIG_BYTE(a) ((a))
 #define MAX1363_CONFIG_SE			0x01
 #define MAX1363_CONFIG_DE			0x00
 #define MAX1363_CONFIG_SCAN_TO_CS		0x00
 #define MAX1363_CONFIG_SCAN_SINGLE_8		0x20
 #define MAX1363_CONFIG_SCAN_MONITOR_MODE	0x40
 #define MAX1363_CONFIG_SCAN_SINGLE_1		0x60
 /* max123{6-9} only */
 #define MAX1236_SCAN_MID_TO_CHANNEL		0x40
 /* max1363 only - merely part of channel selects or don't care for others */
 #define MAX1363_CONFIG_EN_MON_MODE_READ 0x18
 #define MAX1363_CHANNEL_SEL(a) ((a) << 1)
 /* max1363 strictly 0x06 - but doesn't matter */
 #define MAX1363_CHANNEL_SEL_MASK		0x1E
 #define MAX1363_SCAN_MASK			0x60
 #define MAX1363_SE_DE_MASK			0x01
 #define MAX1363_MAX_CHANNELS 25
 /**
  * struct max1363_mode - scan mode information
  * @conf:	The corresponding value of the configuration register
  * @modemask:	Bit mask corresponding to channels enabled in this mode
  */
 struct max1363_mode {
 	int8_t		conf;
 	DECLARE_BITMAP(modemask, MAX1363_MAX_CHANNELS);
 };
 /* This must be maintained along side the max1363_mode_table in max1363_core */
 enum max1363_modes {
 	/* Single read of a single channel */
 	_s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
 	/* Differential single read */
 	d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
 	d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
 	/* Scan to channel and mid to channel where overlapping */
 	s0to1, s0to2, s2to3, s0to3, s0to4, s0to5, s0to6,
 	s6to7, s0to7, s6to8, s0to8, s6to9,
 	s0to9, s6to10, s0to10, s6to11, s0to11,
 	/* Differential scan to channel and mid to channel where overlapping */
 	d0m1to2m3, d0m1to4m5, d0m1to6m7, d6m7to8m9,
 	d0m1to8m9, d6m7to10m11, d0m1to10m11, d1m0to3m2,
 	d1m0to5m4, d1m0to7m6, d7m6to9m8, d1m0to9m8,
 	d7m6to11m10, d1m0to11m10,
 };
 /**
  * struct max1363_chip_info - chip specifc information
  * @info:		iio core function callbacks structure
  * @channels:		channel specification
  * @num_channels:       number of channels
  * @mode_list:		array of available scan modes
  * @default_mode:	the scan mode in which the chip starts up
  * @int_vref_mv:	the internal reference voltage
  * @num_modes:		number of modes
  * @bits:		accuracy of the adc in bits
  */
 struct max1363_chip_info {
 	const struct iio_info		*info;
 	const struct iio_chan_spec	*channels;
 	int				num_channels;
 	const enum max1363_modes	*mode_list;
 	enum max1363_modes		default_mode;
 	u16				int_vref_mv;
 	u8				num_modes;
 	u8				bits;
 };
 /**
  * struct max1363_state - driver instance specific data
  * @client:		i2c_client
  * @setupbyte:		cache of current device setup byte
  * @configbyte:		cache of current device config byte
  * @chip_info:		chip model specific constants, available modes, etc.
  * @current_mode:	the scan mode of this chip
  * @requestedmask:	a valid requested set of channels
  * @reg:		supply regulator
  * @monitor_on:		whether monitor mode is enabled
  * @monitor_speed:	parameter corresponding to device monitor speed setting
  * @mask_high:		bitmask for enabled high thresholds
  * @mask_low:		bitmask for enabled low thresholds
  * @thresh_high:	high threshold values
  * @thresh_low:		low threshold values
+ * @vref:		Reference voltage regulator
+ * @vref_uv:		Actual (external or internal) reference voltage
  */
 struct max1363_state {
 	struct i2c_client		*client;
 	u8				setupbyte;
 	u8				configbyte;
 	const struct max1363_chip_info	*chip_info;
 	const struct max1363_mode	*current_mode;
 	u32				requestedmask;
 	struct regulator		*reg;
 	/* Using monitor modes and buffer at the same time is
 	   currently not supported */
 	bool				monitor_on;
 	unsigned int			monitor_speed:3;
 	u8				mask_high;
 	u8				mask_low;
 	/* 4x unipolar first then the fours bipolar ones */
 	s16				thresh_high[8];
 	s16				thresh_low[8];
+	struct regulator		*vref;
+	u32				vref_uv;
 };
 #define MAX1363_MODE_SINGLE(_num, _mask) {				\
 		.conf = MAX1363_CHANNEL_SEL(_num)			\
 			| MAX1363_CONFIG_SCAN_SINGLE_1			\
 			| MAX1363_CONFIG_SE,				\
 			.modemask[0] = _mask,				\
 			}
 #define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) {			\
 		.conf = MAX1363_CHANNEL_SEL(_num)			\
 			| MAX1363_CONFIG_SCAN_TO_CS			\
 			| MAX1363_CONFIG_SE,				\
 			.modemask[0] = _mask,				\
 			}
 /* note not available for max1363 hence naming */
 #define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) {		\
 		.conf = MAX1363_CHANNEL_SEL(_num)			\
 			| MAX1236_SCAN_MID_TO_CHANNEL			\
 			| MAX1363_CONFIG_SE,				\
 			.modemask[0] = _mask				\
 }
 #define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) {			\
 		.conf = MAX1363_CHANNEL_SEL(_nump)			\
 			| MAX1363_CONFIG_SCAN_SINGLE_1			\
 			| MAX1363_CONFIG_DE,				\
 			.modemask[0] = _mask				\
 			}
 /* Can't think how to automate naming so specify for now */
 #define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) {	\
 		.conf = MAX1363_CHANNEL_SEL(_num)			\
 			| MAX1363_CONFIG_SCAN_TO_CS			\
 			| MAX1363_CONFIG_DE,				\
 			.modemask[0] = _mask				\
 			}
 /* note only available for max1363 hence naming */
 #define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(_num, _numvals, _mask) {	\
 		.conf = MAX1363_CHANNEL_SEL(_num)			\
 			| MAX1236_SCAN_MID_TO_CHANNEL			\
 			| MAX1363_CONFIG_SE,				\
 			.modemask[0] = _mask				\
 }
 static const struct max1363_mode max1363_mode_table[] = {
 	/* All of the single channel options first */
 	MAX1363_MODE_SINGLE(0, 1 << 0),
 	MAX1363_MODE_SINGLE(1, 1 << 1),
 	MAX1363_MODE_SINGLE(2, 1 << 2),
 	MAX1363_MODE_SINGLE(3, 1 << 3),
 	MAX1363_MODE_SINGLE(4, 1 << 4),
 	MAX1363_MODE_SINGLE(5, 1 << 5),
 	MAX1363_MODE_SINGLE(6, 1 << 6),
 	MAX1363_MODE_SINGLE(7, 1 << 7),
 	MAX1363_MODE_SINGLE(8, 1 << 8),
 	MAX1363_MODE_SINGLE(9, 1 << 9),
 	MAX1363_MODE_SINGLE(10, 1 << 10),
 	MAX1363_MODE_SINGLE(11, 1 << 11),
 	MAX1363_MODE_DIFF_SINGLE(0, 1, 1 << 12),
 	MAX1363_MODE_DIFF_SINGLE(2, 3, 1 << 13),
 	MAX1363_MODE_DIFF_SINGLE(4, 5, 1 << 14),
 	MAX1363_MODE_DIFF_SINGLE(6, 7, 1 << 15),
 	MAX1363_MODE_DIFF_SINGLE(8, 9, 1 << 16),
 	MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17),
 	MAX1363_MODE_DIFF_SINGLE(1, 0, 1 << 18),
 	MAX1363_MODE_DIFF_SINGLE(3, 2, 1 << 19),
 	MAX1363_MODE_DIFF_SINGLE(5, 4, 1 << 20),
 	MAX1363_MODE_DIFF_SINGLE(7, 6, 1 << 21),
 	MAX1363_MODE_DIFF_SINGLE(9, 8, 1 << 22),
 	MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23),
 	/* The multichannel scans next */
 	MAX1363_MODE_SCAN_TO_CHANNEL(1, 0x003),
 	MAX1363_MODE_SCAN_TO_CHANNEL(2, 0x007),
 	MAX1236_MODE_SCAN_MID_TO_CHANNEL(2, 3, 0x00C),
 	MAX1363_MODE_SCAN_TO_CHANNEL(3, 0x00F),
 	MAX1363_MODE_SCAN_TO_CHANNEL(4, 0x01F),
 	MAX1363_MODE_SCAN_TO_CHANNEL(5, 0x03F),
 	MAX1363_MODE_SCAN_TO_CHANNEL(6, 0x07F),
 	MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 7, 0x0C0),
 	MAX1363_MODE_SCAN_TO_CHANNEL(7, 0x0FF),
 	MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 8, 0x1C0),
 	MAX1363_MODE_SCAN_TO_CHANNEL(8, 0x1FF),
 	MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 9, 0x3C0),
 	MAX1363_MODE_SCAN_TO_CHANNEL(9, 0x3FF),
 	MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10, 0x7C0),
 	MAX1363_MODE_SCAN_TO_CHANNEL(10, 0x7FF),
 	MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 11, 0xFC0),
 	MAX1363_MODE_SCAN_TO_CHANNEL(11, 0xFFF),
 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(2, 2, 0x003000),
 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(4, 3, 0x007000),
 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(6, 4, 0x00F000),
 	MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(8, 2, 0x018000),
 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(8, 5, 0x01F000),
 	MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(10, 3, 0x038000),
 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(10, 6, 0x3F000),
 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(3, 2, 0x0C0000),
 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(5, 3, 0x1C0000),
 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(7, 4, 0x3C0000),
 	MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(9, 2, 0x600000),
 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(9, 5, 0x7C0000),
 	MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(11, 3, 0xE00000),
 	MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000),
 };
 static const struct max1363_mode
 *max1363_match_mode(const unsigned long *mask,
 	const struct max1363_chip_info *ci)
 {
 	int i;
 	if (mask)
 		for (i = 0; i < ci->num_modes; i++)
 			if (bitmap_subset(mask,
 					  max1363_mode_table[ci->mode_list[i]].
 					  modemask,
 					  MAX1363_MAX_CHANNELS))
 				return &max1363_mode_table[ci->mode_list[i]];
 	return NULL;
 }
 static int max1363_write_basic_config(struct i2c_client *client,
 				      unsigned char d1,
 				      unsigned char d2)
 {
 	u8 tx_buf[2] = {d1, d2};
 	return i2c_master_send(client, tx_buf, 2);
 }
 static int max1363_set_scan_mode(struct max1363_state *st)
 {
 	st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
 			    | MAX1363_SCAN_MASK
 			    | MAX1363_SE_DE_MASK);
 	st->configbyte |= st->current_mode->conf;
 	return max1363_write_basic_config(st->client,
 					  st->setupbyte,
 					  st->configbyte);
 }
 static int max1363_read_single_chan(struct iio_dev *indio_dev,
 				    struct iio_chan_spec const *chan,
 				    int *val,
 				    long m)
 {
 	int ret = 0;
 	s32 data;
 	u8 rxbuf[2];
 	struct max1363_state *st = iio_priv(indio_dev);
 	struct i2c_client *client = st->client;
 	mutex_lock(&indio_dev->mlock);
 	/*
 	 * If monitor mode is enabled, the method for reading a single
 	 * channel will have to be rather different and has not yet
 	 * been implemented.
 	 *
 	 * Also, cannot read directly if buffered capture enabled.
 	 */
 	if (st->monitor_on || iio_buffer_enabled(indio_dev)) {
 		ret = -EBUSY;
 		goto error_ret;
 	}
 	/* Check to see if current scan mode is correct */
 	if (st->current_mode != &max1363_mode_table[chan->address]) {
 		/* Update scan mode if needed */
 		st->current_mode = &max1363_mode_table[chan->address];
 		ret = max1363_set_scan_mode(st);
 		if (ret < 0)
 			goto error_ret;
 	}
 	if (st->chip_info->bits != 8) {
 		/* Get reading */
 		data = i2c_master_recv(client, rxbuf, 2);
 		if (data < 0) {
 			ret = data;
 			goto error_ret;
 		}
 		data = (rxbuf[1] | rxbuf[0] << 8) &
 		  ((1 << st->chip_info->bits) - 1);
 	} else {
 		/* Get reading */
 		data = i2c_master_recv(client, rxbuf, 1);
 		if (data < 0) {
 			ret = data;
 			goto error_ret;
 		}
 		data = rxbuf[0];
 	}
 	*val = data;
 error_ret:
 	mutex_unlock(&indio_dev->mlock);
 	return ret;
 }
 static int max1363_read_raw(struct iio_dev *indio_dev,
 			    struct iio_chan_spec const *chan,
 			    int *val,
 			    int *val2,
 			    long m)
 {
 	struct max1363_state *st = iio_priv(indio_dev);
 	int ret;
+	unsigned long scale_uv;
 	switch (m) {
 	case IIO_CHAN_INFO_RAW:
 		ret = max1363_read_single_chan(indio_dev, chan, val, m);
 		if (ret < 0)
 			return ret;
 		return IIO_VAL_INT;
 	case IIO_CHAN_INFO_SCALE:
-		if ((1 << (st->chip_info->bits + 1)) >
+		scale_uv = st->vref_uv >> st->chip_info->bits;
-		    st->chip_info->int_vref_mv) {
+		*val = scale_uv / 1000;
-			*val = 0;
+		*val2 = (scale_uv % 1000) * 1000;
-			*val2 = 500000;
+		return IIO_VAL_INT_PLUS_MICRO;
-			return IIO_VAL_INT_PLUS_MICRO;
-		} else {
-			*val = (st->chip_info->int_vref_mv)
-				>> st->chip_info->bits;
-			return IIO_VAL_INT;
-		}
 	default:
 		return -EINVAL;
 	}
 	return 0;
 }
 /* Applies to max1363 */
 static const enum max1363_modes max1363_mode_list[] = {
 	_s0, _s1, _s2, _s3,
 	s0to1, s0to2, s0to3,
 	d0m1, d2m3, d1m0, d3m2,
 	d0m1to2m3, d1m0to3m2,
 };
 #define MAX1363_EV_M						\
 	(IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING)	\
 	 | IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING))
 #define MAX1363_INFO_MASK (IIO_CHAN_INFO_RAW_SEPARATE_BIT |	\
 			   IIO_CHAN_INFO_SCALE_SHARED_BIT)
 #define MAX1363_CHAN_U(num, addr, si, bits, evmask)			\
 	{								\
 		.type = IIO_VOLTAGE,					\
 		.indexed = 1,						\
 		.channel = num,						\
 		.address = addr,					\
 		.info_mask = MAX1363_INFO_MASK,				\
 		.datasheet_name = "AIN"#num,				\
 		.scan_type = {						\
 			.sign = 'u',					\
 			.realbits = bits,				\
 			.storagebits = (bits > 8) ? 16 : 8,		\
 			.endianness = IIO_BE,				\
 		},							\
 		.scan_index = si,					\
 		.event_mask = evmask,					\
 	}
 /* bipolar channel */
 #define MAX1363_CHAN_B(num, num2, addr, si, bits, evmask)		\
 	{								\
 		.type = IIO_VOLTAGE,					\
 		.differential = 1,					\
 		.indexed = 1,						\
 		.channel = num,						\
 		.channel2 = num2,					\
 		.address = addr,					\
 		.info_mask = MAX1363_INFO_MASK,				\
 		.datasheet_name = "AIN"#num"-AIN"#num2,			\
 		.scan_type = {						\
 			.sign = 's',					\
 			.realbits = bits,				\
 			.storagebits = (bits > 8) ? 16 : 8,		\
 			.endianness = IIO_BE,				\
 		},							\
 		.scan_index = si,					\
 		.event_mask = evmask,					\
 	}
 #define MAX1363_4X_CHANS(bits, em) {			\
 	MAX1363_CHAN_U(0, _s0, 0, bits, em),		\
 	MAX1363_CHAN_U(1, _s1, 1, bits, em),		\
 	MAX1363_CHAN_U(2, _s2, 2, bits, em),		\
 	MAX1363_CHAN_U(3, _s3, 3, bits, em),		\
 	MAX1363_CHAN_B(0, 1, d0m1, 4, bits, em),	\
 	MAX1363_CHAN_B(2, 3, d2m3, 5, bits, em),	\
 	MAX1363_CHAN_B(1, 0, d1m0, 6, bits, em),	\
 	MAX1363_CHAN_B(3, 2, d3m2, 7, bits, em),	\
 	IIO_CHAN_SOFT_TIMESTAMP(8)			\
 	}
 static const struct iio_chan_spec max1036_channels[] = MAX1363_4X_CHANS(8, 0);
 static const struct iio_chan_spec max1136_channels[] = MAX1363_4X_CHANS(10, 0);
 static const struct iio_chan_spec max1236_channels[] = MAX1363_4X_CHANS(12, 0);
 static const struct iio_chan_spec max1361_channels[] =
 	MAX1363_4X_CHANS(10, MAX1363_EV_M);
 static const struct iio_chan_spec max1363_channels[] =
 	MAX1363_4X_CHANS(12, MAX1363_EV_M);
 /* Applies to max1236, max1237 */
 static const enum max1363_modes max1236_mode_list[] = {
 	_s0, _s1, _s2, _s3,
 	s0to1, s0to2, s0to3,
 	d0m1, d2m3, d1m0, d3m2,
 	d0m1to2m3, d1m0to3m2,
 	s2to3,
 };
 /* Applies to max1238, max1239 */
 static const enum max1363_modes max1238_mode_list[] = {
 	_s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
 	s0to1, s0to2, s0to3, s0to4, s0to5, s0to6,
 	s0to7, s0to8, s0to9, s0to10, s0to11,
 	d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
 	d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
 	d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11,
 	d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10,
 	s6to7, s6to8, s6to9, s6to10, s6to11,
 	d6m7to8m9, d6m7to10m11, d7m6to9m8, d7m6to11m10,
 };
 #define MAX1363_12X_CHANS(bits) {			\
 	MAX1363_CHAN_U(0, _s0, 0, bits, 0),		\
 	MAX1363_CHAN_U(1, _s1, 1, bits, 0),		\
 	MAX1363_CHAN_U(2, _s2, 2, bits, 0),		\
 	MAX1363_CHAN_U(3, _s3, 3, bits, 0),		\
 	MAX1363_CHAN_U(4, _s4, 4, bits, 0),		\
 	MAX1363_CHAN_U(5, _s5, 5, bits, 0),		\
 	MAX1363_CHAN_U(6, _s6, 6, bits, 0),		\
 	MAX1363_CHAN_U(7, _s7, 7, bits, 0),		\
 	MAX1363_CHAN_U(8, _s8, 8, bits, 0),		\
 	MAX1363_CHAN_U(9, _s9, 9, bits, 0),		\
 	MAX1363_CHAN_U(10, _s10, 10, bits, 0),		\
 	MAX1363_CHAN_U(11, _s11, 11, bits, 0),		\
 	MAX1363_CHAN_B(0, 1, d0m1, 12, bits, 0),	\
 	MAX1363_CHAN_B(2, 3, d2m3, 13, bits, 0),	\
 	MAX1363_CHAN_B(4, 5, d4m5, 14, bits, 0),	\
 	MAX1363_CHAN_B(6, 7, d6m7, 15, bits, 0),	\
 	MAX1363_CHAN_B(8, 9, d8m9, 16, bits, 0),	\
 	MAX1363_CHAN_B(10, 11, d10m11, 17, bits, 0),	\
 	MAX1363_CHAN_B(1, 0, d1m0, 18, bits, 0),	\
 	MAX1363_CHAN_B(3, 2, d3m2, 19, bits, 0),	\
 	MAX1363_CHAN_B(5, 4, d5m4, 20, bits, 0),	\
 	MAX1363_CHAN_B(7, 6, d7m6, 21, bits, 0),	\
 	MAX1363_CHAN_B(9, 8, d9m8, 22, bits, 0),	\
 	MAX1363_CHAN_B(11, 10, d11m10, 23, bits, 0),	\
 	IIO_CHAN_SOFT_TIMESTAMP(24)			\
 	}
 static const struct iio_chan_spec max1038_channels[] = MAX1363_12X_CHANS(8);
 static const struct iio_chan_spec max1138_channels[] = MAX1363_12X_CHANS(10);
 static const struct iio_chan_spec max1238_channels[] = MAX1363_12X_CHANS(12);
 static const enum max1363_modes max11607_mode_list[] = {
 	_s0, _s1, _s2, _s3,
 	s0to1, s0to2, s0to3,
 	s2to3,
 	d0m1, d2m3, d1m0, d3m2,
 	d0m1to2m3, d1m0to3m2,
 };
 static const enum max1363_modes max11608_mode_list[] = {
 	_s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7,
 	s0to1, s0to2, s0to3, s0to4, s0to5, s0to6, s0to7,
 	s6to7,
 	d0m1, d2m3, d4m5, d6m7,
 	d1m0, d3m2, d5m4, d7m6,
 	d0m1to2m3, d0m1to4m5, d0m1to6m7,
 	d1m0to3m2, d1m0to5m4, d1m0to7m6,
 };
 #define MAX1363_8X_CHANS(bits) {			\
 	MAX1363_CHAN_U(0, _s0, 0, bits, 0),		\
 	MAX1363_CHAN_U(1, _s1, 1, bits, 0),		\
 	MAX1363_CHAN_U(2, _s2, 2, bits, 0),		\
 	MAX1363_CHAN_U(3, _s3, 3, bits, 0),		\
 	MAX1363_CHAN_U(4, _s4, 4, bits, 0),		\
 	MAX1363_CHAN_U(5, _s5, 5, bits, 0),		\
 	MAX1363_CHAN_U(6, _s6, 6, bits, 0),		\
 	MAX1363_CHAN_U(7, _s7, 7, bits, 0),		\
 	MAX1363_CHAN_B(0, 1, d0m1, 8, bits, 0),	\
 	MAX1363_CHAN_B(2, 3, d2m3, 9, bits, 0),	\
 	MAX1363_CHAN_B(4, 5, d4m5, 10, bits, 0),	\
 	MAX1363_CHAN_B(6, 7, d6m7, 11, bits, 0),	\
 	MAX1363_CHAN_B(1, 0, d1m0, 12, bits, 0),	\
 	MAX1363_CHAN_B(3, 2, d3m2, 13, bits, 0),	\
 	MAX1363_CHAN_B(5, 4, d5m4, 14, bits, 0),	\
 	MAX1363_CHAN_B(7, 6, d7m6, 15, bits, 0),	\
 	IIO_CHAN_SOFT_TIMESTAMP(16)			\
 }
 static const struct iio_chan_spec max11602_channels[] = MAX1363_8X_CHANS(8);
 static const struct iio_chan_spec max11608_channels[] = MAX1363_8X_CHANS(10);
 static const struct iio_chan_spec max11614_channels[] = MAX1363_8X_CHANS(12);
 static const enum max1363_modes max11644_mode_list[] = {
 	_s0, _s1, s0to1, d0m1, d1m0,
 };
 #define MAX1363_2X_CHANS(bits) {			\
 	MAX1363_CHAN_U(0, _s0, 0, bits, 0),		\
 	MAX1363_CHAN_U(1, _s1, 1, bits, 0),		\
 	MAX1363_CHAN_B(0, 1, d0m1, 2, bits, 0),	\
 	MAX1363_CHAN_B(1, 0, d1m0, 3, bits, 0),	\
 	IIO_CHAN_SOFT_TIMESTAMP(4)			\
 	}
 static const struct iio_chan_spec max11646_channels[] = MAX1363_2X_CHANS(10);
 static const struct iio_chan_spec max11644_channels[] = MAX1363_2X_CHANS(12);
 enum { max1361,
        max1362,
        max1363,
        max1364,
        max1036,
        max1037,
        max1038,
        max1039,
        max1136,
        max1137,
        max1138,
        max1139,
        max1236,
        max1237,
        max1238,
        max1239,
        max11600,
        max11601,
        max11602,
        max11603,
        max11604,
        max11605,
        max11606,
        max11607,
        max11608,
        max11609,
        max11610,
        max11611,
        max11612,
        max11613,
        max11614,
        max11615,
        max11616,
        max11617,
        max11644,
        max11645,
        max11646,
        max11647
 };
 static const int max1363_monitor_speeds[] = { 133000, 665000, 33300, 16600,
 					      8300, 4200, 2000, 1000 };
 static ssize_t max1363_monitor_show_freq(struct device *dev,
 					struct device_attribute *attr,
 					char *buf)
 {
 	struct max1363_state *st = iio_priv(dev_to_iio_dev(dev));
 	return sprintf(buf, "%d\n", max1363_monitor_speeds[st->monitor_speed]);
 }
 static ssize_t max1363_monitor_store_freq(struct device *dev,
 					struct device_attribute *attr,
 					const char *buf,
 					size_t len)
 {
 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 	struct max1363_state *st = iio_priv(indio_dev);
 	int i, ret;
 	unsigned long val;
 	bool found = false;
 	ret = strict_strtoul(buf, 10, &val);
 	if (ret)
 		return -EINVAL;
 	for (i = 0; i < ARRAY_SIZE(max1363_monitor_speeds); i++)
 		if (val == max1363_monitor_speeds[i]) {
 			found = true;
 			break;
 		}
 	if (!found)
 		return -EINVAL;
 	mutex_lock(&indio_dev->mlock);
 	st->monitor_speed = i;
 	mutex_unlock(&indio_dev->mlock);
 	return 0;
 }
 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR,
 			max1363_monitor_show_freq,
 			max1363_monitor_store_freq);
 static IIO_CONST_ATTR(sampling_frequency_available,
 		"133000 665000 33300 16600 8300 4200 2000 1000");
 static int max1363_read_thresh(struct iio_dev *indio_dev,
 			       u64 event_code,
 			       int *val)
 {
 	struct max1363_state *st = iio_priv(indio_dev);
 	if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)
 		*val = st->thresh_low[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)];
 	else
 		*val = st->thresh_high[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)];
 	return 0;
 }
 static int max1363_write_thresh(struct iio_dev *indio_dev,
 				u64 event_code,
 				int val)
 {
 	struct max1363_state *st = iio_priv(indio_dev);
 	/* make it handle signed correctly as well */
 	switch (st->chip_info->bits) {
 	case 10:
 		if (val > 0x3FF)
 			return -EINVAL;
 		break;
 	case 12:
 		if (val > 0xFFF)
 			return -EINVAL;
 		break;
 	}
 	switch (IIO_EVENT_CODE_EXTRACT_DIR(event_code)) {
 	case IIO_EV_DIR_FALLING:
 		st->thresh_low[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)] = val;
 		break;
 	case IIO_EV_DIR_RISING:
 		st->thresh_high[IIO_EVENT_CODE_EXTRACT_CHAN(event_code)] = val;
 		break;
 	}
 	return 0;
 }
 static const u64 max1363_event_codes[] = {
 	IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,
 			     IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 	IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,
 			     IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 	IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,
 			     IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 	IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,
 			     IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 	IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,
 			     IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 	IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,
 			     IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 	IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,
 			     IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 	IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,
 			     IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 };
 static irqreturn_t max1363_event_handler(int irq, void *private)
 {
 	struct iio_dev *indio_dev = private;
 	struct max1363_state *st = iio_priv(indio_dev);
 	s64 timestamp = iio_get_time_ns();
 	unsigned long mask, loc;
 	u8 rx;
 	u8 tx[2] = { st->setupbyte,
 		     MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0 };
 	i2c_master_recv(st->client, &rx, 1);
 	mask = rx;
 	for_each_set_bit(loc, &mask, 8)
 		iio_push_event(indio_dev, max1363_event_codes[loc], timestamp);
 	i2c_master_send(st->client, tx, 2);
 	return IRQ_HANDLED;
 }
 static int max1363_read_event_config(struct iio_dev *indio_dev,
 				     u64 event_code)
 {
 	struct max1363_state *st = iio_priv(indio_dev);
 	int val;
 	int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);
 	mutex_lock(&indio_dev->mlock);
 	if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)
 		val = (1 << number) & st->mask_low;
 	else
 		val = (1 << number) & st->mask_high;
 	mutex_unlock(&indio_dev->mlock);
 	return val;
 }
 static int max1363_monitor_mode_update(struct max1363_state *st, int enabled)
 {
 	u8 *tx_buf;
 	int ret, i = 3, j;
 	unsigned long numelements;
 	int len;
 	const long *modemask;
 	if (!enabled) {
 		/* transition to buffered capture is not currently supported */
 		st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP;
 		st->configbyte &= ~MAX1363_SCAN_MASK;
 		st->monitor_on = false;
 		return max1363_write_basic_config(st->client,
 						st->setupbyte,
 						st->configbyte);
 	}
 	/* Ensure we are in the relevant mode */
 	st->setupbyte |= MAX1363_SETUP_MONITOR_SETUP;
 	st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
 			    | MAX1363_SCAN_MASK
 			| MAX1363_SE_DE_MASK);
 	st->configbyte |= MAX1363_CONFIG_SCAN_MONITOR_MODE;
 	if ((st->mask_low | st->mask_high) & 0x0F) {
 		st->configbyte |= max1363_mode_table[s0to3].conf;
 		modemask = max1363_mode_table[s0to3].modemask;
 	} else if ((st->mask_low | st->mask_high) & 0x30) {
 		st->configbyte |= max1363_mode_table[d0m1to2m3].conf;
 		modemask = max1363_mode_table[d0m1to2m3].modemask;
 	} else {
 		st->configbyte |= max1363_mode_table[d1m0to3m2].conf;
 		modemask = max1363_mode_table[d1m0to3m2].modemask;
 	}
 	numelements = bitmap_weight(modemask, MAX1363_MAX_CHANNELS);
 	len = 3 * numelements + 3;
 	tx_buf = kmalloc(len, GFP_KERNEL);
 	if (!tx_buf) {
 		ret = -ENOMEM;
 		goto error_ret;
 	}
 	tx_buf[0] = st->configbyte;
 	tx_buf[1] = st->setupbyte;
 	tx_buf[2] = (st->monitor_speed << 1);
 	/*
 	 * So we need to do yet another bit of nefarious scan mode
 	 * setup to match what we need.
 	 */
 	for (j = 0; j < 8; j++)
 		if (test_bit(j, modemask)) {
 			/* Establish the mode is in the scan */
 			if (st->mask_low & (1 << j)) {
 				tx_buf[i] = (st->thresh_low[j] >> 4) & 0xFF;
 				tx_buf[i + 1] = (st->thresh_low[j] << 4) & 0xF0;
 			} else if (j < 4) {
 				tx_buf[i] = 0;
 				tx_buf[i + 1] = 0;
 			} else {
 				tx_buf[i] = 0x80;
 				tx_buf[i + 1] = 0;
 			}
 			if (st->mask_high & (1 << j)) {
 				tx_buf[i + 1] |=
 					(st->thresh_high[j] >> 8) & 0x0F;
 				tx_buf[i + 2] = st->thresh_high[j] & 0xFF;
 			} else if (j < 4) {
 				tx_buf[i + 1] |= 0x0F;
 				tx_buf[i + 2] = 0xFF;
 			} else {
 				tx_buf[i + 1] |= 0x07;
 				tx_buf[i + 2] = 0xFF;
 			}
 			i += 3;
 		}
 	ret = i2c_master_send(st->client, tx_buf, len);
 	if (ret < 0)
 		goto error_ret;
 	if (ret != len) {
 		ret = -EIO;
 		goto error_ret;
 	}
 	/*
 	 * Now that we hopefully have sensible thresholds in place it is
 	 * time to turn the interrupts on.
 	 * It is unclear from the data sheet if this should be necessary
 	 * (i.e. whether monitor mode setup is atomic) but it appears to
 	 * be in practice.
 	 */
 	tx_buf[0] = st->setupbyte;
 	tx_buf[1] = MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0;
 	ret = i2c_master_send(st->client, tx_buf, 2);
 	if (ret < 0)
 		goto error_ret;
 	if (ret != 2) {
 		ret = -EIO;
 		goto error_ret;
 	}
 	ret = 0;
 	st->monitor_on = true;
 error_ret:
 	kfree(tx_buf);
 	return ret;
 }
 /*
  * To keep this manageable we always use one of 3 scan modes.
  * Scan 0...3, 0-1,2-3 and 1-0,3-2
  */
 static inline int __max1363_check_event_mask(int thismask, int checkmask)
 {
 	int ret = 0;
 	/* Is it unipolar */
 	if (thismask < 4) {
 		if (checkmask & ~0x0F) {
 			ret = -EBUSY;
 			goto error_ret;
 		}
 	} else if (thismask < 6) {
 		if (checkmask & ~0x30) {
 			ret = -EBUSY;
 			goto error_ret;
 		}
 	} else if (checkmask & ~0xC0)
 		ret = -EBUSY;
 error_ret:
 	return ret;
 }
 static int max1363_write_event_config(struct iio_dev *indio_dev,
 				      u64 event_code,
 				      int state)
 {
 	int ret = 0;
 	struct max1363_state *st = iio_priv(indio_dev);
 	u16 unifiedmask;
 	int number = IIO_EVENT_CODE_EXTRACT_CHAN(event_code);
 	mutex_lock(&indio_dev->mlock);
 	unifiedmask = st->mask_low | st->mask_high;
 	if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING) {
 		if (state == 0)
 			st->mask_low &= ~(1 << number);
 		else {
 			ret = __max1363_check_event_mask((1 << number),
 							 unifiedmask);
 			if (ret)
 				goto error_ret;
 			st->mask_low |= (1 << number);
 		}
 	} else {
 		if (state == 0)
 			st->mask_high &= ~(1 << number);
 		else {
 			ret = __max1363_check_event_mask((1 << number),
 							 unifiedmask);
 			if (ret)
 				goto error_ret;
 			st->mask_high |= (1 << number);
 		}
 	}
 	max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low));
 error_ret:
 	mutex_unlock(&indio_dev->mlock);
 	return ret;
 }
 /*
  * As with scan_elements, only certain sets of these can
  * be combined.
  */
 static struct attribute *max1363_event_attributes[] = {
 	&iio_dev_attr_sampling_frequency.dev_attr.attr,
 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
 	NULL,
 };
 static struct attribute_group max1363_event_attribute_group = {
 	.attrs = max1363_event_attributes,
 	.name = "events",
 };
 static int max1363_update_scan_mode(struct iio_dev *indio_dev,
 				    const unsigned long *scan_mask)
 {
 	struct max1363_state *st = iio_priv(indio_dev);
 	/*
 	 * Need to figure out the current mode based upon the requested
 	 * scan mask in iio_dev
 	 */
 	st->current_mode = max1363_match_mode(scan_mask, st->chip_info);
 	if (!st->current_mode)
 		return -EINVAL;
 	max1363_set_scan_mode(st);
 	return 0;
 }
 static const struct iio_info max1238_info = {
 	.read_raw = &max1363_read_raw,
 	.driver_module = THIS_MODULE,
 	.update_scan_mode = &max1363_update_scan_mode,
 };
 static const struct iio_info max1363_info = {
 	.read_event_value = &max1363_read_thresh,
 	.write_event_value = &max1363_write_thresh,
 	.read_event_config = &max1363_read_event_config,
 	.write_event_config = &max1363_write_event_config,
 	.read_raw = &max1363_read_raw,
 	.update_scan_mode = &max1363_update_scan_mode,
 	.driver_module = THIS_MODULE,
 	.event_attrs = &max1363_event_attribute_group,
 };
 /* max1363 and max1368 tested - rest from data sheet */
 static const struct max1363_chip_info max1363_chip_info_tbl[] = {
 	[max1361] = {
 		.bits = 10,
 		.int_vref_mv = 2048,
 		.mode_list = max1363_mode_list,
 		.num_modes = ARRAY_SIZE(max1363_mode_list),
 		.default_mode = s0to3,
 		.channels = max1361_channels,
 		.num_channels = ARRAY_SIZE(max1361_channels),
 		.info = &max1363_info,
 	},
 	[max1362] = {
 		.bits = 10,
 		.int_vref_mv = 4096,
 		.mode_list = max1363_mode_list,
 		.num_modes = ARRAY_SIZE(max1363_mode_list),
 		.default_mode = s0to3,
 		.channels = max1361_channels,
 		.num_channels = ARRAY_SIZE(max1361_channels),
 		.info = &max1363_info,
 	},
 	[max1363] = {
 		.bits = 12,
 		.int_vref_mv = 2048,
 		.mode_list = max1363_mode_list,
 		.num_modes = ARRAY_SIZE(max1363_mode_list),
 		.default_mode = s0to3,
 		.channels = max1363_channels,
 		.num_channels = ARRAY_SIZE(max1363_channels),
 		.info = &max1363_info,
 	},
 	[max1364] = {
 		.bits = 12,
 		.int_vref_mv = 4096,
 		.mode_list = max1363_mode_list,
 		.num_modes = ARRAY_SIZE(max1363_mode_list),
 		.default_mode = s0to3,
 		.channels = max1363_channels,
 		.num_channels = ARRAY_SIZE(max1363_channels),
 		.info = &max1363_info,
 	},
 	[max1036] = {
 		.bits = 8,
 		.int_vref_mv = 4096,
 		.mode_list = max1236_mode_list,
 		.num_modes = ARRAY_SIZE(max1236_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1036_channels,
 		.num_channels = ARRAY_SIZE(max1036_channels),
 	},
 	[max1037] = {
 		.bits = 8,
 		.int_vref_mv = 2048,
 		.mode_list = max1236_mode_list,
 		.num_modes = ARRAY_SIZE(max1236_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1036_channels,
 		.num_channels = ARRAY_SIZE(max1036_channels),
 	},
 	[max1038] = {
 		.bits = 8,
 		.int_vref_mv = 4096,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1038_channels,
 		.num_channels = ARRAY_SIZE(max1038_channels),
 	},
 	[max1039] = {
 		.bits = 8,
 		.int_vref_mv = 2048,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1038_channels,
 		.num_channels = ARRAY_SIZE(max1038_channels),
 	},
 	[max1136] = {
 		.bits = 10,
 		.int_vref_mv = 4096,
 		.mode_list = max1236_mode_list,
 		.num_modes = ARRAY_SIZE(max1236_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1136_channels,
 		.num_channels = ARRAY_SIZE(max1136_channels),
 	},
 	[max1137] = {
 		.bits = 10,
 		.int_vref_mv = 2048,
 		.mode_list = max1236_mode_list,
 		.num_modes = ARRAY_SIZE(max1236_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1136_channels,
 		.num_channels = ARRAY_SIZE(max1136_channels),
 	},
 	[max1138] = {
 		.bits = 10,
 		.int_vref_mv = 4096,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1138_channels,
 		.num_channels = ARRAY_SIZE(max1138_channels),
 	},
 	[max1139] = {
 		.bits = 10,
 		.int_vref_mv = 2048,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1138_channels,
 		.num_channels = ARRAY_SIZE(max1138_channels),
 	},
 	[max1236] = {
 		.bits = 12,
 		.int_vref_mv = 4096,
 		.mode_list = max1236_mode_list,
 		.num_modes = ARRAY_SIZE(max1236_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1236_channels,
 		.num_channels = ARRAY_SIZE(max1236_channels),
 	},
 	[max1237] = {
 		.bits = 12,
 		.int_vref_mv = 2048,
 		.mode_list = max1236_mode_list,
 		.num_modes = ARRAY_SIZE(max1236_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1236_channels,
 		.num_channels = ARRAY_SIZE(max1236_channels),
 	},
 	[max1238] = {
 		.bits = 12,
 		.int_vref_mv = 4096,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1238_channels,
 		.num_channels = ARRAY_SIZE(max1238_channels),
 	},
 	[max1239] = {
 		.bits = 12,
 		.int_vref_mv = 2048,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1238_channels,
 		.num_channels = ARRAY_SIZE(max1238_channels),
 	},
 	[max11600] = {
 		.bits = 8,
 		.int_vref_mv = 4096,
 		.mode_list = max11607_mode_list,
 		.num_modes = ARRAY_SIZE(max11607_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1036_channels,
 		.num_channels = ARRAY_SIZE(max1036_channels),
 	},
 	[max11601] = {
 		.bits = 8,
 		.int_vref_mv = 2048,
 		.mode_list = max11607_mode_list,
 		.num_modes = ARRAY_SIZE(max11607_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1036_channels,
 		.num_channels = ARRAY_SIZE(max1036_channels),
 	},
 	[max11602] = {
 		.bits = 8,
 		.int_vref_mv = 4096,
 		.mode_list = max11608_mode_list,
 		.num_modes = ARRAY_SIZE(max11608_mode_list),
 		.default_mode = s0to7,
 		.info = &max1238_info,
 		.channels = max11602_channels,
 		.num_channels = ARRAY_SIZE(max11602_channels),
 	},
 	[max11603] = {
 		.bits = 8,
 		.int_vref_mv = 2048,
 		.mode_list = max11608_mode_list,
 		.num_modes = ARRAY_SIZE(max11608_mode_list),
 		.default_mode = s0to7,
 		.info = &max1238_info,
 		.channels = max11602_channels,
 		.num_channels = ARRAY_SIZE(max11602_channels),
 	},
 	[max11604] = {
 		.bits = 8,
 		.int_vref_mv = 4098,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1238_channels,
 		.num_channels = ARRAY_SIZE(max1238_channels),
 	},
 	[max11605] = {
 		.bits = 8,
 		.int_vref_mv = 2048,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1238_channels,
 		.num_channels = ARRAY_SIZE(max1238_channels),
 	},
 	[max11606] = {
 		.bits = 10,
 		.int_vref_mv = 4096,
 		.mode_list = max11607_mode_list,
 		.num_modes = ARRAY_SIZE(max11607_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1136_channels,
 		.num_channels = ARRAY_SIZE(max1136_channels),
 	},
 	[max11607] = {
 		.bits = 10,
 		.int_vref_mv = 2048,
 		.mode_list = max11607_mode_list,
 		.num_modes = ARRAY_SIZE(max11607_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1136_channels,
 		.num_channels = ARRAY_SIZE(max1136_channels),
 	},
 	[max11608] = {
 		.bits = 10,
 		.int_vref_mv = 4096,
 		.mode_list = max11608_mode_list,
 		.num_modes = ARRAY_SIZE(max11608_mode_list),
 		.default_mode = s0to7,
 		.info = &max1238_info,
 		.channels = max11608_channels,
 		.num_channels = ARRAY_SIZE(max11608_channels),
 	},
 	[max11609] = {
 		.bits = 10,
 		.int_vref_mv = 2048,
 		.mode_list = max11608_mode_list,
 		.num_modes = ARRAY_SIZE(max11608_mode_list),
 		.default_mode = s0to7,
 		.info = &max1238_info,
 		.channels = max11608_channels,
 		.num_channels = ARRAY_SIZE(max11608_channels),
 	},
 	[max11610] = {
 		.bits = 10,
 		.int_vref_mv = 4098,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1238_channels,
 		.num_channels = ARRAY_SIZE(max1238_channels),
 	},
 	[max11611] = {
 		.bits = 10,
 		.int_vref_mv = 2048,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1238_channels,
 		.num_channels = ARRAY_SIZE(max1238_channels),
 	},
 	[max11612] = {
 		.bits = 12,
 		.int_vref_mv = 4096,
 		.mode_list = max11607_mode_list,
 		.num_modes = ARRAY_SIZE(max11607_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1363_channels,
 		.num_channels = ARRAY_SIZE(max1363_channels),
 	},
 	[max11613] = {
 		.bits = 12,
 		.int_vref_mv = 2048,
 		.mode_list = max11607_mode_list,
 		.num_modes = ARRAY_SIZE(max11607_mode_list),
 		.default_mode = s0to3,
 		.info = &max1238_info,
 		.channels = max1363_channels,
 		.num_channels = ARRAY_SIZE(max1363_channels),
 	},
 	[max11614] = {
 		.bits = 12,
 		.int_vref_mv = 4096,
 		.mode_list = max11608_mode_list,
 		.num_modes = ARRAY_SIZE(max11608_mode_list),
 		.default_mode = s0to7,
 		.info = &max1238_info,
 		.channels = max11614_channels,
 		.num_channels = ARRAY_SIZE(max11614_channels),
 	},
 	[max11615] = {
 		.bits = 12,
 		.int_vref_mv = 2048,
 		.mode_list = max11608_mode_list,
 		.num_modes = ARRAY_SIZE(max11608_mode_list),
 		.default_mode = s0to7,
 		.info = &max1238_info,
 		.channels = max11614_channels,
 		.num_channels = ARRAY_SIZE(max11614_channels),
 	},
 	[max11616] = {
 		.bits = 12,
 		.int_vref_mv = 4098,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1238_channels,
 		.num_channels = ARRAY_SIZE(max1238_channels),
 	},
 	[max11617] = {
 		.bits = 12,
 		.int_vref_mv = 2048,
 		.mode_list = max1238_mode_list,
 		.num_modes = ARRAY_SIZE(max1238_mode_list),
 		.default_mode = s0to11,
 		.info = &max1238_info,
 		.channels = max1238_channels,
 		.num_channels = ARRAY_SIZE(max1238_channels),
 	},
 	[max11644] = {
 		.bits = 12,
 		.int_vref_mv = 2048,
 		.mode_list = max11644_mode_list,
 		.num_modes = ARRAY_SIZE(max11644_mode_list),
 		.default_mode = s0to1,
 		.info = &max1238_info,
 		.channels = max11644_channels,
 		.num_channels = ARRAY_SIZE(max11644_channels),
 	},
 	[max11645] = {
 		.bits = 12,
 		.int_vref_mv = 4096,
 		.mode_list = max11644_mode_list,
 		.num_modes = ARRAY_SIZE(max11644_mode_list),
 		.default_mode = s0to1,
 		.info = &max1238_info,
 		.channels = max11644_channels,
 		.num_channels = ARRAY_SIZE(max11644_channels),
 	},
 	[max11646] = {
 		.bits = 10,
 		.int_vref_mv = 2048,
 		.mode_list = max11644_mode_list,
 		.num_modes = ARRAY_SIZE(max11644_mode_list),
 		.default_mode = s0to1,
 		.info = &max1238_info,
 		.channels = max11646_channels,
 		.num_channels = ARRAY_SIZE(max11646_channels),
 	},
 	[max11647] = {
 		.bits = 10,
 		.int_vref_mv = 4096,
 		.mode_list = max11644_mode_list,
 		.num_modes = ARRAY_SIZE(max11644_mode_list),
 		.default_mode = s0to1,
 		.info = &max1238_info,
 		.channels = max11646_channels,
 		.num_channels = ARRAY_SIZE(max11646_channels),
 	},
 };
 static int max1363_initial_setup(struct max1363_state *st)
 {
-	st->setupbyte = MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD
+	st->setupbyte = MAX1363_SETUP_INT_CLOCK
-		| MAX1363_SETUP_POWER_UP_INT_REF
-		| MAX1363_SETUP_INT_CLOCK
 		| MAX1363_SETUP_UNIPOLAR
 		| MAX1363_SETUP_NORESET;
+	if (st->vref)
+		st->setupbyte |= MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF;
+	else
+		st->setupbyte |= MAX1363_SETUP_POWER_UP_INT_REF
+		  | MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_INT;
 	/* Set scan mode writes the config anyway so wait until then */
 	st->setupbyte = MAX1363_SETUP_BYTE(st->setupbyte);
 	st->current_mode = &max1363_mode_table[st->chip_info->default_mode];
 	st->configbyte = MAX1363_CONFIG_BYTE(st->configbyte);
 	return max1363_set_scan_mode(st);
 }
 static int max1363_alloc_scan_masks(struct iio_dev *indio_dev)
 {
 	struct max1363_state *st = iio_priv(indio_dev);
 	unsigned long *masks;
 	int i;
 	masks = devm_kzalloc(&indio_dev->dev,
 			BITS_TO_LONGS(MAX1363_MAX_CHANNELS) * sizeof(long) *
 			(st->chip_info->num_modes + 1), GFP_KERNEL);
 	if (!masks)
 		return -ENOMEM;
 	for (i = 0; i < st->chip_info->num_modes; i++)
 		bitmap_copy(masks + BITS_TO_LONGS(MAX1363_MAX_CHANNELS)*i,
 			    max1363_mode_table[st->chip_info->mode_list[i]]
 			    .modemask, MAX1363_MAX_CHANNELS);
 	indio_dev->available_scan_masks = masks;
 	return 0;
 }
 static irqreturn_t max1363_trigger_handler(int irq, void *p)
 {
 	struct iio_poll_func *pf = p;
 	struct iio_dev *indio_dev = pf->indio_dev;
 	struct max1363_state *st = iio_priv(indio_dev);
 	s64 time_ns;
 	__u8 *rxbuf;
 	int b_sent;
 	size_t d_size;
 	unsigned long numvals = bitmap_weight(st->current_mode->modemask,
 					      MAX1363_MAX_CHANNELS);
 	/* Ensure the timestamp is 8 byte aligned */
 	if (st->chip_info->bits != 8)
 		d_size = numvals*2;
 	else
 		d_size = numvals;
 	if (indio_dev->scan_timestamp) {
 		d_size += sizeof(s64);
 		if (d_size % sizeof(s64))
 			d_size += sizeof(s64) - (d_size % sizeof(s64));
 	}
 	/* Monitor mode prevents reading. Whilst not currently implemented
 	 * might as well have this test in here in the meantime as it does
 	 * no harm.
 	 */
 	if (numvals == 0)
 		goto done;
 	rxbuf = kmalloc(d_size,	GFP_KERNEL);
 	if (rxbuf == NULL)
 		goto done;
 	if (st->chip_info->bits != 8)
 		b_sent = i2c_master_recv(st->client, rxbuf, numvals*2);
 	else
 		b_sent = i2c_master_recv(st->client, rxbuf, numvals);
 	if (b_sent < 0)
 		goto done_free;
 	time_ns = iio_get_time_ns();
 	if (indio_dev->scan_timestamp)
 		memcpy(rxbuf + d_size - sizeof(s64), &time_ns, sizeof(time_ns));
 	iio_push_to_buffers(indio_dev, rxbuf);
 done_free:
 	kfree(rxbuf);
 done:
 	iio_trigger_notify_done(indio_dev->trig);
 	return IRQ_HANDLED;
 }
 static const struct iio_buffer_setup_ops max1363_buffered_setup_ops = {
 	.postenable = &iio_triggered_buffer_postenable,
 	.preenable = &iio_sw_buffer_preenable,
 	.predisable = &iio_triggered_buffer_predisable,
 };
 static int max1363_probe(struct i2c_client *client,
 			 const struct i2c_device_id *id)
 {
 	int ret;
 	struct max1363_state *st;
 	struct iio_dev *indio_dev;
+	struct regulator *vref;
 	indio_dev = iio_device_alloc(sizeof(struct max1363_state));
 	if (indio_dev == NULL) {
 		ret = -ENOMEM;
 		goto error_out;
 	}
 	indio_dev->dev.of_node = client->dev.of_node;
 	ret = iio_map_array_register(indio_dev, client->dev.platform_data);
 	if (ret < 0)
 		goto error_free_device;
 	st = iio_priv(indio_dev);
 	st->reg = devm_regulator_get(&client->dev, "vcc");
 	if (IS_ERR(st->reg)) {
 		ret = PTR_ERR(st->reg);
 		goto error_unregister_map;
 	}
 	ret = regulator_enable(st->reg);
 	if (ret)
 		goto error_unregister_map;
 	/* this is only used for device removal purposes */
 	i2c_set_clientdata(client, indio_dev);
 	st->chip_info = &max1363_chip_info_tbl[id->driver_data];
 	st->client = client;
+	st->vref_uv = st->chip_info->int_vref_mv * 1000;
+	vref = devm_regulator_get(&client->dev, "vref");
+	if (!IS_ERR(vref)) {
+		int vref_uv;
+		ret = regulator_enable(vref);
+		if (ret)
+			goto error_disable_reg;
+		st->vref = vref;
+		vref_uv = regulator_get_voltage(vref);
+		if (vref_uv <= 0) {
+			ret = -EINVAL;
+			goto error_disable_reg;
+		}
+		st->vref_uv = vref_uv;
+	}
 	ret = max1363_alloc_scan_masks(indio_dev);
 	if (ret)
 		goto error_disable_reg;
 	/* Establish that the iio_dev is a child of the i2c device */
 	indio_dev->dev.parent = &client->dev;
 	indio_dev->name = id->name;
 	indio_dev->channels = st->chip_info->channels;
 	indio_dev->num_channels = st->chip_info->num_channels;
 	indio_dev->info = st->chip_info->info;
 	indio_dev->modes = INDIO_DIRECT_MODE;
 	ret = max1363_initial_setup(st);
 	if (ret < 0)
 		goto error_disable_reg;
 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
 		&max1363_trigger_handler, &max1363_buffered_setup_ops);
 	if (ret)
 		goto error_disable_reg;
 	if (client->irq) {
 		ret = devm_request_threaded_irq(&client->dev, st->client->irq,
 					   NULL,
 					   &max1363_event_handler,
 					   IRQF_TRIGGER_RISING | IRQF_ONESHOT,
 					   "max1363_event",
 					   indio_dev);
 		if (ret)
 			goto error_uninit_buffer;
 	}
 	ret = iio_device_register(indio_dev);
 	if (ret < 0)
 		goto error_uninit_buffer;
 	return 0;
 error_uninit_buffer:
 	iio_triggered_buffer_cleanup(indio_dev);
 error_disable_reg:
+	if (st->vref)
+		regulator_disable(st->vref);
 	regulator_disable(st->reg);
 error_unregister_map:
 	iio_map_array_unregister(indio_dev);
 error_free_device:
 	iio_device_free(indio_dev);
 error_out:
 	return ret;
 }
 static int max1363_remove(struct i2c_client *client)
 {
 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
 	struct max1363_state *st = iio_priv(indio_dev);
 	iio_device_unregister(indio_dev);
 	iio_triggered_buffer_cleanup(indio_dev);
+	if (st->vref)
+		regulator_disable(st->vref);
 	regulator_disable(st->reg);
 	iio_map_array_unregister(indio_dev);
 	iio_device_free(indio_dev);
 	return 0;
 }
 static const struct i2c_device_id max1363_id[] = {
 	{ "max1361", max1361 },
 	{ "max1362", max1362 },
 	{ "max1363", max1363 },
 	{ "max1364", max1364 },
 	{ "max1036", max1036 },
 	{ "max1037", max1037 },
 	{ "max1038", max1038 },
 	{ "max1039", max1039 },
 	{ "max1136", max1136 },
 	{ "max1137", max1137 },
 	{ "max1138", max1138 },
 	{ "max1139", max1139 },
 	{ "max1236", max1236 },
 	{ "max1237", max1237 },
 	{ "max1238", max1238 },
 	{ "max1239", max1239 },
 	{ "max11600", max11600 },
 	{ "max11601", max11601 },
 	{ "max11602", max11602 },
 	{ "max11603", max11603 },
 	{ "max11604", max11604 },
 	{ "max11605", max11605 },
 	{ "max11606", max11606 },
 	{ "max11607", max11607 },
 	{ "max11608", max11608 },
 	{ "max11609", max11609 },
 	{ "max11610", max11610 },
 	{ "max11611", max11611 },
 	{ "max11612", max11612 },
 	{ "max11613", max11613 },
 	{ "max11614", max11614 },
 	{ "max11615", max11615 },
 	{ "max11616", max11616 },
 	{ "max11617", max11617 },
 	{}
 };
 MODULE_DEVICE_TABLE(i2c, max1363_id);
 static struct i2c_driver max1363_driver = {
 	.driver = {
 		.name = "max1363",
 	},
 	.probe = max1363_probe,
 	.remove = max1363_remove,