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Commit b50cac55bf859d5b2fdcc1803a553a251b703456

Authored by Neil Horman
Committed by Jesse Barnes
1 parent 8e8da023f5
Exists in master and in 6 other branches imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

PCI/sysfs: add per pci device msi[x] irq listing (v5) 

This patch adds a per-pci-device subdirectory in sysfs called:
/sys/bus/pci/devices/<device>/msi_irqs

This sub-directory exports the set of msi vectors allocated by a given
pci device, by creating a numbered sub-directory for each vector beneath
msi_irqs.  For each vector various attributes can be exported.
Currently the only attribute is called mode, which tracks the
operational mode of that vector (msi vs. msix)

Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Showing 4 changed files with 133 additions and 0 deletions Inline Diff

Documentation/ABI/testing/sysfs-bus-pci
Diff comments   View file @ b50cac5
1 What: /sys/bus/pci/drivers/.../bind 1 What: /sys/bus/pci/drivers/.../bind
2 Date: December 2003 2 Date: December 2003
3 Contact: linux-pci@vger.kernel.org 3 Contact: linux-pci@vger.kernel.org
4 Description: 4 Description:
5 Writing a device location to this file will cause 5 Writing a device location to this file will cause
6 the driver to attempt to bind to the device found at 6 the driver to attempt to bind to the device found at
7 this location. This is useful for overriding default 7 this location. This is useful for overriding default
8 bindings. The format for the location is: DDDD:BB:DD.F. 8 bindings. The format for the location is: DDDD:BB:DD.F.
9 That is Domain:Bus:Device.Function and is the same as 9 That is Domain:Bus:Device.Function and is the same as
10 found in /sys/bus/pci/devices/. For example: 10 found in /sys/bus/pci/devices/. For example:
11 # echo 0000:00:19.0 > /sys/bus/pci/drivers/foo/bind 11 # echo 0000:00:19.0 > /sys/bus/pci/drivers/foo/bind
12 (Note: kernels before 2.6.28 may require echo -n). 12 (Note: kernels before 2.6.28 may require echo -n).
13 13
14 What: /sys/bus/pci/drivers/.../unbind 14 What: /sys/bus/pci/drivers/.../unbind
15 Date: December 2003 15 Date: December 2003
16 Contact: linux-pci@vger.kernel.org 16 Contact: linux-pci@vger.kernel.org
17 Description: 17 Description:
18 Writing a device location to this file will cause the 18 Writing a device location to this file will cause the
19 driver to attempt to unbind from the device found at 19 driver to attempt to unbind from the device found at
20 this location. This may be useful when overriding default 20 this location. This may be useful when overriding default
21 bindings. The format for the location is: DDDD:BB:DD.F. 21 bindings. The format for the location is: DDDD:BB:DD.F.
22 That is Domain:Bus:Device.Function and is the same as 22 That is Domain:Bus:Device.Function and is the same as
23 found in /sys/bus/pci/devices/. For example: 23 found in /sys/bus/pci/devices/. For example:
24 # echo 0000:00:19.0 > /sys/bus/pci/drivers/foo/unbind 24 # echo 0000:00:19.0 > /sys/bus/pci/drivers/foo/unbind
25 (Note: kernels before 2.6.28 may require echo -n). 25 (Note: kernels before 2.6.28 may require echo -n).
26 26
27 What: /sys/bus/pci/drivers/.../new_id 27 What: /sys/bus/pci/drivers/.../new_id
28 Date: December 2003 28 Date: December 2003
29 Contact: linux-pci@vger.kernel.org 29 Contact: linux-pci@vger.kernel.org
30 Description: 30 Description:
31 Writing a device ID to this file will attempt to 31 Writing a device ID to this file will attempt to
32 dynamically add a new device ID to a PCI device driver. 32 dynamically add a new device ID to a PCI device driver.
33 This may allow the driver to support more hardware than 33 This may allow the driver to support more hardware than
34 was included in the driver's static device ID support 34 was included in the driver's static device ID support
35 table at compile time. The format for the device ID is: 35 table at compile time. The format for the device ID is:
36 VVVV DDDD SVVV SDDD CCCC MMMM PPPP. That is Vendor ID, 36 VVVV DDDD SVVV SDDD CCCC MMMM PPPP. That is Vendor ID,
37 Device ID, Subsystem Vendor ID, Subsystem Device ID, 37 Device ID, Subsystem Vendor ID, Subsystem Device ID,
38 Class, Class Mask, and Private Driver Data. The Vendor ID 38 Class, Class Mask, and Private Driver Data. The Vendor ID
39 and Device ID fields are required, the rest are optional. 39 and Device ID fields are required, the rest are optional.
40 Upon successfully adding an ID, the driver will probe 40 Upon successfully adding an ID, the driver will probe
41 for the device and attempt to bind to it. For example: 41 for the device and attempt to bind to it. For example:
42 # echo "8086 10f5" > /sys/bus/pci/drivers/foo/new_id 42 # echo "8086 10f5" > /sys/bus/pci/drivers/foo/new_id
43 43
44 What: /sys/bus/pci/drivers/.../remove_id 44 What: /sys/bus/pci/drivers/.../remove_id
45 Date: February 2009 45 Date: February 2009
46 Contact: Chris Wright <chrisw@sous-sol.org> 46 Contact: Chris Wright <chrisw@sous-sol.org>
47 Description: 47 Description:
48 Writing a device ID to this file will remove an ID 48 Writing a device ID to this file will remove an ID
49 that was dynamically added via the new_id sysfs entry. 49 that was dynamically added via the new_id sysfs entry.
50 The format for the device ID is: 50 The format for the device ID is:
51 VVVV DDDD SVVV SDDD CCCC MMMM. That is Vendor ID, Device 51 VVVV DDDD SVVV SDDD CCCC MMMM. That is Vendor ID, Device
52 ID, Subsystem Vendor ID, Subsystem Device ID, Class, 52 ID, Subsystem Vendor ID, Subsystem Device ID, Class,
53 and Class Mask. The Vendor ID and Device ID fields are 53 and Class Mask. The Vendor ID and Device ID fields are
54 required, the rest are optional. After successfully 54 required, the rest are optional. After successfully
55 removing an ID, the driver will no longer support the 55 removing an ID, the driver will no longer support the
56 device. This is useful to ensure auto probing won't 56 device. This is useful to ensure auto probing won't
57 match the driver to the device. For example: 57 match the driver to the device. For example:
58 # echo "8086 10f5" > /sys/bus/pci/drivers/foo/remove_id 58 # echo "8086 10f5" > /sys/bus/pci/drivers/foo/remove_id
59 59
60 What: /sys/bus/pci/rescan 60 What: /sys/bus/pci/rescan
61 Date: January 2009 61 Date: January 2009
62 Contact: Linux PCI developers <linux-pci@vger.kernel.org> 62 Contact: Linux PCI developers <linux-pci@vger.kernel.org>
63 Description: 63 Description:
64 Writing a non-zero value to this attribute will 64 Writing a non-zero value to this attribute will
65 force a rescan of all PCI buses in the system, and 65 force a rescan of all PCI buses in the system, and
66 re-discover previously removed devices. 66 re-discover previously removed devices.
67 Depends on CONFIG_HOTPLUG. 67 Depends on CONFIG_HOTPLUG.
68 68
69 What: /sys/bus/pci/devices/.../msi_irqs/
70 Date: September, 2011
71 Contact: Neil Horman <nhorman@tuxdriver.com>
72 Description:
73 The /sys/devices/.../msi_irqs directory contains a variable set
74 of sub-directories, with each sub-directory being named after a
75 corresponding msi irq vector allocated to that device. Each
76 numbered sub-directory N contains attributes of that irq.
77 Note that this directory is not created for device drivers which
78 do not support msi irqs
79
80 What: /sys/bus/pci/devices/.../msi_irqs/<N>/mode
81 Date: September 2011
82 Contact: Neil Horman <nhorman@tuxdriver.com>
83 Description:
84 This attribute indicates the mode that the irq vector named by
85 the parent directory is in (msi vs. msix)
86
69 What: /sys/bus/pci/devices/.../remove 87 What: /sys/bus/pci/devices/.../remove
70 Date: January 2009 88 Date: January 2009
71 Contact: Linux PCI developers <linux-pci@vger.kernel.org> 89 Contact: Linux PCI developers <linux-pci@vger.kernel.org>
72 Description: 90 Description:
73 Writing a non-zero value to this attribute will 91 Writing a non-zero value to this attribute will
74 hot-remove the PCI device and any of its children. 92 hot-remove the PCI device and any of its children.
75 Depends on CONFIG_HOTPLUG. 93 Depends on CONFIG_HOTPLUG.
76 94
77 What: /sys/bus/pci/devices/.../pci_bus/.../rescan 95 What: /sys/bus/pci/devices/.../pci_bus/.../rescan
78 Date: May 2011 96 Date: May 2011
79 Contact: Linux PCI developers <linux-pci@vger.kernel.org> 97 Contact: Linux PCI developers <linux-pci@vger.kernel.org>
80 Description: 98 Description:
81 Writing a non-zero value to this attribute will 99 Writing a non-zero value to this attribute will
82 force a rescan of the bus and all child buses, 100 force a rescan of the bus and all child buses,
83 and re-discover devices removed earlier from this 101 and re-discover devices removed earlier from this
84 part of the device tree. Depends on CONFIG_HOTPLUG. 102 part of the device tree. Depends on CONFIG_HOTPLUG.
85 103
86 What: /sys/bus/pci/devices/.../rescan 104 What: /sys/bus/pci/devices/.../rescan
87 Date: January 2009 105 Date: January 2009
88 Contact: Linux PCI developers <linux-pci@vger.kernel.org> 106 Contact: Linux PCI developers <linux-pci@vger.kernel.org>
89 Description: 107 Description:
90 Writing a non-zero value to this attribute will 108 Writing a non-zero value to this attribute will
91 force a rescan of the device's parent bus and all 109 force a rescan of the device's parent bus and all
92 child buses, and re-discover devices removed earlier 110 child buses, and re-discover devices removed earlier
93 from this part of the device tree. 111 from this part of the device tree.
94 Depends on CONFIG_HOTPLUG. 112 Depends on CONFIG_HOTPLUG.
95 113
96 What: /sys/bus/pci/devices/.../reset 114 What: /sys/bus/pci/devices/.../reset
97 Date: July 2009 115 Date: July 2009
98 Contact: Michael S. Tsirkin <mst@redhat.com> 116 Contact: Michael S. Tsirkin <mst@redhat.com>
99 Description: 117 Description:
100 Some devices allow an individual function to be reset 118 Some devices allow an individual function to be reset
101 without affecting other functions in the same device. 119 without affecting other functions in the same device.
102 For devices that have this support, a file named reset 120 For devices that have this support, a file named reset
103 will be present in sysfs. Writing 1 to this file 121 will be present in sysfs. Writing 1 to this file
104 will perform reset. 122 will perform reset.
105 123
106 What: /sys/bus/pci/devices/.../vpd 124 What: /sys/bus/pci/devices/.../vpd
107 Date: February 2008 125 Date: February 2008
108 Contact: Ben Hutchings <bhutchings@solarflare.com> 126 Contact: Ben Hutchings <bhutchings@solarflare.com>
109 Description: 127 Description:
110 A file named vpd in a device directory will be a 128 A file named vpd in a device directory will be a
111 binary file containing the Vital Product Data for the 129 binary file containing the Vital Product Data for the
112 device. It should follow the VPD format defined in 130 device. It should follow the VPD format defined in
113 PCI Specification 2.1 or 2.2, but users should consider 131 PCI Specification 2.1 or 2.2, but users should consider
114 that some devices may have malformatted data. If the 132 that some devices may have malformatted data. If the
115 underlying VPD has a writable section then the 133 underlying VPD has a writable section then the
116 corresponding section of this file will be writable. 134 corresponding section of this file will be writable.
117 135
118 What: /sys/bus/pci/devices/.../virtfnN 136 What: /sys/bus/pci/devices/.../virtfnN
119 Date: March 2009 137 Date: March 2009
120 Contact: Yu Zhao <yu.zhao@intel.com> 138 Contact: Yu Zhao <yu.zhao@intel.com>
121 Description: 139 Description:
122 This symbolic link appears when hardware supports the SR-IOV 140 This symbolic link appears when hardware supports the SR-IOV
123 capability and the Physical Function driver has enabled it. 141 capability and the Physical Function driver has enabled it.
124 The symbolic link points to the PCI device sysfs entry of the 142 The symbolic link points to the PCI device sysfs entry of the
125 Virtual Function whose index is N (0...MaxVFs-1). 143 Virtual Function whose index is N (0...MaxVFs-1).
126 144
127 What: /sys/bus/pci/devices/.../dep_link 145 What: /sys/bus/pci/devices/.../dep_link
128 Date: March 2009 146 Date: March 2009
129 Contact: Yu Zhao <yu.zhao@intel.com> 147 Contact: Yu Zhao <yu.zhao@intel.com>
130 Description: 148 Description:
131 This symbolic link appears when hardware supports the SR-IOV 149 This symbolic link appears when hardware supports the SR-IOV
132 capability and the Physical Function driver has enabled it, 150 capability and the Physical Function driver has enabled it,
133 and this device has vendor specific dependencies with others. 151 and this device has vendor specific dependencies with others.
134 The symbolic link points to the PCI device sysfs entry of 152 The symbolic link points to the PCI device sysfs entry of
135 Physical Function this device depends on. 153 Physical Function this device depends on.
136 154
137 What: /sys/bus/pci/devices/.../physfn 155 What: /sys/bus/pci/devices/.../physfn
138 Date: March 2009 156 Date: March 2009
139 Contact: Yu Zhao <yu.zhao@intel.com> 157 Contact: Yu Zhao <yu.zhao@intel.com>
140 Description: 158 Description:
141 This symbolic link appears when a device is a Virtual Function. 159 This symbolic link appears when a device is a Virtual Function.
142 The symbolic link points to the PCI device sysfs entry of the 160 The symbolic link points to the PCI device sysfs entry of the
143 Physical Function this device associates with. 161 Physical Function this device associates with.
144 162
145 What: /sys/bus/pci/slots/.../module 163 What: /sys/bus/pci/slots/.../module
146 Date: June 2009 164 Date: June 2009
147 Contact: linux-pci@vger.kernel.org 165 Contact: linux-pci@vger.kernel.org
148 Description: 166 Description:
149 This symbolic link points to the PCI hotplug controller driver 167 This symbolic link points to the PCI hotplug controller driver
150 module that manages the hotplug slot. 168 module that manages the hotplug slot.
151 169
152 What: /sys/bus/pci/devices/.../label 170 What: /sys/bus/pci/devices/.../label
153 Date: July 2010 171 Date: July 2010
154 Contact: Narendra K <narendra_k@dell.com>, linux-bugs@dell.com 172 Contact: Narendra K <narendra_k@dell.com>, linux-bugs@dell.com
155 Description: 173 Description:
156 Reading this attribute will provide the firmware 174 Reading this attribute will provide the firmware
157 given name (SMBIOS type 41 string or ACPI _DSM string) of 175 given name (SMBIOS type 41 string or ACPI _DSM string) of
158 the PCI device. The attribute will be created only 176 the PCI device. The attribute will be created only
159 if the firmware has given a name to the PCI device. 177 if the firmware has given a name to the PCI device.
160 ACPI _DSM string name will be given priority if the 178 ACPI _DSM string name will be given priority if the
161 system firmware provides SMBIOS type 41 string also. 179 system firmware provides SMBIOS type 41 string also.
162 Users: 180 Users:
163 Userspace applications interested in knowing the 181 Userspace applications interested in knowing the
164 firmware assigned name of the PCI device. 182 firmware assigned name of the PCI device.
165 183
166 What: /sys/bus/pci/devices/.../index 184 What: /sys/bus/pci/devices/.../index
167 Date: July 2010 185 Date: July 2010
168 Contact: Narendra K <narendra_k@dell.com>, linux-bugs@dell.com 186 Contact: Narendra K <narendra_k@dell.com>, linux-bugs@dell.com
169 Description: 187 Description:
170 Reading this attribute will provide the firmware 188 Reading this attribute will provide the firmware
171 given instance (SMBIOS type 41 device type instance) of the 189 given instance (SMBIOS type 41 device type instance) of the
172 PCI device. The attribute will be created only if the firmware 190 PCI device. The attribute will be created only if the firmware
173 has given an instance number to the PCI device. 191 has given an instance number to the PCI device.
174 Users: 192 Users:
175 Userspace applications interested in knowing the 193 Userspace applications interested in knowing the
176 firmware assigned device type instance of the PCI 194 firmware assigned device type instance of the PCI
177 device that can help in understanding the firmware 195 device that can help in understanding the firmware
178 intended order of the PCI device. 196 intended order of the PCI device.
179 197
180 What: /sys/bus/pci/devices/.../acpi_index 198 What: /sys/bus/pci/devices/.../acpi_index
181 Date: July 2010 199 Date: July 2010
182 Contact: Narendra K <narendra_k@dell.com>, linux-bugs@dell.com 200 Contact: Narendra K <narendra_k@dell.com>, linux-bugs@dell.com
183 Description: 201 Description:
184 Reading this attribute will provide the firmware 202 Reading this attribute will provide the firmware
185 given instance (ACPI _DSM instance number) of the PCI device. 203 given instance (ACPI _DSM instance number) of the PCI device.
186 The attribute will be created only if the firmware has given 204 The attribute will be created only if the firmware has given
187 an instance number to the PCI device. ACPI _DSM instance number 205 an instance number to the PCI device. ACPI _DSM instance number
188 will be given priority if the system firmware provides SMBIOS 206 will be given priority if the system firmware provides SMBIOS
189 type 41 device type instance also. 207 type 41 device type instance also.
190 Users: 208 Users:
191 Userspace applications interested in knowing the 209 Userspace applications interested in knowing the
192 firmware assigned instance number of the PCI 210 firmware assigned instance number of the PCI
193 device that can help in understanding the firmware 211 device that can help in understanding the firmware
194 intended order of the PCI device. 212 intended order of the PCI device.
195 213
1 /* 1 /*
2 * File: msi.c 2 * File: msi.c
3 * Purpose: PCI Message Signaled Interrupt (MSI) 3 * Purpose: PCI Message Signaled Interrupt (MSI)
4 * 4 *
5 * Copyright (C) 2003-2004 Intel 5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) 6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */ 7 */
8 8
9 #include <linux/err.h> 9 #include <linux/err.h>
10 #include <linux/mm.h> 10 #include <linux/mm.h>
11 #include <linux/irq.h> 11 #include <linux/irq.h>
12 #include <linux/interrupt.h> 12 #include <linux/interrupt.h>
13 #include <linux/init.h> 13 #include <linux/init.h>
14 #include <linux/export.h> 14 #include <linux/export.h>
15 #include <linux/ioport.h> 15 #include <linux/ioport.h>
16 #include <linux/pci.h> 16 #include <linux/pci.h>
17 #include <linux/proc_fs.h> 17 #include <linux/proc_fs.h>
18 #include <linux/msi.h> 18 #include <linux/msi.h>
19 #include <linux/smp.h> 19 #include <linux/smp.h>
20 #include <linux/errno.h> 20 #include <linux/errno.h>
21 #include <linux/io.h> 21 #include <linux/io.h>
22 #include <linux/slab.h> 22 #include <linux/slab.h>
23 23
24 #include "pci.h" 24 #include "pci.h"
25 #include "msi.h" 25 #include "msi.h"
26 26
27 static int pci_msi_enable = 1; 27 static int pci_msi_enable = 1;
28 28
29 /* Arch hooks */ 29 /* Arch hooks */
30 30
31 #ifndef arch_msi_check_device 31 #ifndef arch_msi_check_device
32 int arch_msi_check_device(struct pci_dev *dev, int nvec, int type) 32 int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
33 { 33 {
34 return 0; 34 return 0;
35 } 35 }
36 #endif 36 #endif
37 37
38 #ifndef arch_setup_msi_irqs 38 #ifndef arch_setup_msi_irqs
39 # define arch_setup_msi_irqs default_setup_msi_irqs 39 # define arch_setup_msi_irqs default_setup_msi_irqs
40 # define HAVE_DEFAULT_MSI_SETUP_IRQS 40 # define HAVE_DEFAULT_MSI_SETUP_IRQS
41 #endif 41 #endif
42 42
43 #ifdef HAVE_DEFAULT_MSI_SETUP_IRQS 43 #ifdef HAVE_DEFAULT_MSI_SETUP_IRQS
44 int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 44 int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
45 { 45 {
46 struct msi_desc *entry; 46 struct msi_desc *entry;
47 int ret; 47 int ret;
48 48
49 /* 49 /*
50 * If an architecture wants to support multiple MSI, it needs to 50 * If an architecture wants to support multiple MSI, it needs to
51 * override arch_setup_msi_irqs() 51 * override arch_setup_msi_irqs()
52 */ 52 */
53 if (type == PCI_CAP_ID_MSI && nvec > 1) 53 if (type == PCI_CAP_ID_MSI && nvec > 1)
54 return 1; 54 return 1;
55 55
56 list_for_each_entry(entry, &dev->msi_list, list) { 56 list_for_each_entry(entry, &dev->msi_list, list) {
57 ret = arch_setup_msi_irq(dev, entry); 57 ret = arch_setup_msi_irq(dev, entry);
58 if (ret < 0) 58 if (ret < 0)
59 return ret; 59 return ret;
60 if (ret > 0) 60 if (ret > 0)
61 return -ENOSPC; 61 return -ENOSPC;
62 } 62 }
63 63
64 return 0; 64 return 0;
65 } 65 }
66 #endif 66 #endif
67 67
68 #ifndef arch_teardown_msi_irqs 68 #ifndef arch_teardown_msi_irqs
69 # define arch_teardown_msi_irqs default_teardown_msi_irqs 69 # define arch_teardown_msi_irqs default_teardown_msi_irqs
70 # define HAVE_DEFAULT_MSI_TEARDOWN_IRQS 70 # define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
71 #endif 71 #endif
72 72
73 #ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS 73 #ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS
74 void default_teardown_msi_irqs(struct pci_dev *dev) 74 void default_teardown_msi_irqs(struct pci_dev *dev)
75 { 75 {
76 struct msi_desc *entry; 76 struct msi_desc *entry;
77 77
78 list_for_each_entry(entry, &dev->msi_list, list) { 78 list_for_each_entry(entry, &dev->msi_list, list) {
79 int i, nvec; 79 int i, nvec;
80 if (entry->irq == 0) 80 if (entry->irq == 0)
81 continue; 81 continue;
82 nvec = 1 << entry->msi_attrib.multiple; 82 nvec = 1 << entry->msi_attrib.multiple;
83 for (i = 0; i < nvec; i++) 83 for (i = 0; i < nvec; i++)
84 arch_teardown_msi_irq(entry->irq + i); 84 arch_teardown_msi_irq(entry->irq + i);
85 } 85 }
86 } 86 }
87 #endif 87 #endif
88 88
89 static void msi_set_enable(struct pci_dev *dev, int pos, int enable) 89 static void msi_set_enable(struct pci_dev *dev, int pos, int enable)
90 { 90 {
91 u16 control; 91 u16 control;
92 92
93 BUG_ON(!pos); 93 BUG_ON(!pos);
94 94
95 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); 95 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
96 control &= ~PCI_MSI_FLAGS_ENABLE; 96 control &= ~PCI_MSI_FLAGS_ENABLE;
97 if (enable) 97 if (enable)
98 control |= PCI_MSI_FLAGS_ENABLE; 98 control |= PCI_MSI_FLAGS_ENABLE;
99 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); 99 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
100 } 100 }
101 101
102 static void msix_set_enable(struct pci_dev *dev, int enable) 102 static void msix_set_enable(struct pci_dev *dev, int enable)
103 { 103 {
104 int pos; 104 int pos;
105 u16 control; 105 u16 control;
106 106
107 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); 107 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
108 if (pos) { 108 if (pos) {
109 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); 109 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
110 control &= ~PCI_MSIX_FLAGS_ENABLE; 110 control &= ~PCI_MSIX_FLAGS_ENABLE;
111 if (enable) 111 if (enable)
112 control |= PCI_MSIX_FLAGS_ENABLE; 112 control |= PCI_MSIX_FLAGS_ENABLE;
113 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); 113 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
114 } 114 }
115 } 115 }
116 116
117 static inline __attribute_const__ u32 msi_mask(unsigned x) 117 static inline __attribute_const__ u32 msi_mask(unsigned x)
118 { 118 {
119 /* Don't shift by >= width of type */ 119 /* Don't shift by >= width of type */
120 if (x >= 5) 120 if (x >= 5)
121 return 0xffffffff; 121 return 0xffffffff;
122 return (1 << (1 << x)) - 1; 122 return (1 << (1 << x)) - 1;
123 } 123 }
124 124
125 static inline __attribute_const__ u32 msi_capable_mask(u16 control) 125 static inline __attribute_const__ u32 msi_capable_mask(u16 control)
126 { 126 {
127 return msi_mask((control >> 1) & 7); 127 return msi_mask((control >> 1) & 7);
128 } 128 }
129 129
130 static inline __attribute_const__ u32 msi_enabled_mask(u16 control) 130 static inline __attribute_const__ u32 msi_enabled_mask(u16 control)
131 { 131 {
132 return msi_mask((control >> 4) & 7); 132 return msi_mask((control >> 4) & 7);
133 } 133 }
134 134
135 /* 135 /*
136 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to 136 * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to
137 * mask all MSI interrupts by clearing the MSI enable bit does not work 137 * mask all MSI interrupts by clearing the MSI enable bit does not work
138 * reliably as devices without an INTx disable bit will then generate a 138 * reliably as devices without an INTx disable bit will then generate a
139 * level IRQ which will never be cleared. 139 * level IRQ which will never be cleared.
140 */ 140 */
141 static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) 141 static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
142 { 142 {
143 u32 mask_bits = desc->masked; 143 u32 mask_bits = desc->masked;
144 144
145 if (!desc->msi_attrib.maskbit) 145 if (!desc->msi_attrib.maskbit)
146 return 0; 146 return 0;
147 147
148 mask_bits &= ~mask; 148 mask_bits &= ~mask;
149 mask_bits |= flag; 149 mask_bits |= flag;
150 pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits); 150 pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits);
151 151
152 return mask_bits; 152 return mask_bits;
153 } 153 }
154 154
155 static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) 155 static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
156 { 156 {
157 desc->masked = __msi_mask_irq(desc, mask, flag); 157 desc->masked = __msi_mask_irq(desc, mask, flag);
158 } 158 }
159 159
160 /* 160 /*
161 * This internal function does not flush PCI writes to the device. 161 * This internal function does not flush PCI writes to the device.
162 * All users must ensure that they read from the device before either 162 * All users must ensure that they read from the device before either
163 * assuming that the device state is up to date, or returning out of this 163 * assuming that the device state is up to date, or returning out of this
164 * file. This saves a few milliseconds when initialising devices with lots 164 * file. This saves a few milliseconds when initialising devices with lots
165 * of MSI-X interrupts. 165 * of MSI-X interrupts.
166 */ 166 */
167 static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag) 167 static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
168 { 168 {
169 u32 mask_bits = desc->masked; 169 u32 mask_bits = desc->masked;
170 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + 170 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
171 PCI_MSIX_ENTRY_VECTOR_CTRL; 171 PCI_MSIX_ENTRY_VECTOR_CTRL;
172 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; 172 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
173 if (flag) 173 if (flag)
174 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; 174 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
175 writel(mask_bits, desc->mask_base + offset); 175 writel(mask_bits, desc->mask_base + offset);
176 176
177 return mask_bits; 177 return mask_bits;
178 } 178 }
179 179
180 static void msix_mask_irq(struct msi_desc *desc, u32 flag) 180 static void msix_mask_irq(struct msi_desc *desc, u32 flag)
181 { 181 {
182 desc->masked = __msix_mask_irq(desc, flag); 182 desc->masked = __msix_mask_irq(desc, flag);
183 } 183 }
184 184
185 static void msi_set_mask_bit(struct irq_data *data, u32 flag) 185 static void msi_set_mask_bit(struct irq_data *data, u32 flag)
186 { 186 {
187 struct msi_desc *desc = irq_data_get_msi(data); 187 struct msi_desc *desc = irq_data_get_msi(data);
188 188
189 if (desc->msi_attrib.is_msix) { 189 if (desc->msi_attrib.is_msix) {
190 msix_mask_irq(desc, flag); 190 msix_mask_irq(desc, flag);
191 readl(desc->mask_base); /* Flush write to device */ 191 readl(desc->mask_base); /* Flush write to device */
192 } else { 192 } else {
193 unsigned offset = data->irq - desc->dev->irq; 193 unsigned offset = data->irq - desc->dev->irq;
194 msi_mask_irq(desc, 1 << offset, flag << offset); 194 msi_mask_irq(desc, 1 << offset, flag << offset);
195 } 195 }
196 } 196 }
197 197
198 void mask_msi_irq(struct irq_data *data) 198 void mask_msi_irq(struct irq_data *data)
199 { 199 {
200 msi_set_mask_bit(data, 1); 200 msi_set_mask_bit(data, 1);
201 } 201 }
202 202
203 void unmask_msi_irq(struct irq_data *data) 203 void unmask_msi_irq(struct irq_data *data)
204 { 204 {
205 msi_set_mask_bit(data, 0); 205 msi_set_mask_bit(data, 0);
206 } 206 }
207 207
208 void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg) 208 void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
209 { 209 {
210 BUG_ON(entry->dev->current_state != PCI_D0); 210 BUG_ON(entry->dev->current_state != PCI_D0);
211 211
212 if (entry->msi_attrib.is_msix) { 212 if (entry->msi_attrib.is_msix) {
213 void __iomem *base = entry->mask_base + 213 void __iomem *base = entry->mask_base +
214 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; 214 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
215 215
216 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR); 216 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
217 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR); 217 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
218 msg->data = readl(base + PCI_MSIX_ENTRY_DATA); 218 msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
219 } else { 219 } else {
220 struct pci_dev *dev = entry->dev; 220 struct pci_dev *dev = entry->dev;
221 int pos = entry->msi_attrib.pos; 221 int pos = entry->msi_attrib.pos;
222 u16 data; 222 u16 data;
223 223
224 pci_read_config_dword(dev, msi_lower_address_reg(pos), 224 pci_read_config_dword(dev, msi_lower_address_reg(pos),
225 &msg->address_lo); 225 &msg->address_lo);
226 if (entry->msi_attrib.is_64) { 226 if (entry->msi_attrib.is_64) {
227 pci_read_config_dword(dev, msi_upper_address_reg(pos), 227 pci_read_config_dword(dev, msi_upper_address_reg(pos),
228 &msg->address_hi); 228 &msg->address_hi);
229 pci_read_config_word(dev, msi_data_reg(pos, 1), &data); 229 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
230 } else { 230 } else {
231 msg->address_hi = 0; 231 msg->address_hi = 0;
232 pci_read_config_word(dev, msi_data_reg(pos, 0), &data); 232 pci_read_config_word(dev, msi_data_reg(pos, 0), &data);
233 } 233 }
234 msg->data = data; 234 msg->data = data;
235 } 235 }
236 } 236 }
237 237
238 void read_msi_msg(unsigned int irq, struct msi_msg *msg) 238 void read_msi_msg(unsigned int irq, struct msi_msg *msg)
239 { 239 {
240 struct msi_desc *entry = irq_get_msi_desc(irq); 240 struct msi_desc *entry = irq_get_msi_desc(irq);
241 241
242 __read_msi_msg(entry, msg); 242 __read_msi_msg(entry, msg);
243 } 243 }
244 244
245 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg) 245 void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
246 { 246 {
247 /* Assert that the cache is valid, assuming that 247 /* Assert that the cache is valid, assuming that
248 * valid messages are not all-zeroes. */ 248 * valid messages are not all-zeroes. */
249 BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo | 249 BUG_ON(!(entry->msg.address_hi | entry->msg.address_lo |
250 entry->msg.data)); 250 entry->msg.data));
251 251
252 *msg = entry->msg; 252 *msg = entry->msg;
253 } 253 }
254 254
255 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) 255 void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
256 { 256 {
257 struct msi_desc *entry = irq_get_msi_desc(irq); 257 struct msi_desc *entry = irq_get_msi_desc(irq);
258 258
259 __get_cached_msi_msg(entry, msg); 259 __get_cached_msi_msg(entry, msg);
260 } 260 }
261 261
262 void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) 262 void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
263 { 263 {
264 if (entry->dev->current_state != PCI_D0) { 264 if (entry->dev->current_state != PCI_D0) {
265 /* Don't touch the hardware now */ 265 /* Don't touch the hardware now */
266 } else if (entry->msi_attrib.is_msix) { 266 } else if (entry->msi_attrib.is_msix) {
267 void __iomem *base; 267 void __iomem *base;
268 base = entry->mask_base + 268 base = entry->mask_base +
269 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; 269 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
270 270
271 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR); 271 writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
272 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR); 272 writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
273 writel(msg->data, base + PCI_MSIX_ENTRY_DATA); 273 writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
274 } else { 274 } else {
275 struct pci_dev *dev = entry->dev; 275 struct pci_dev *dev = entry->dev;
276 int pos = entry->msi_attrib.pos; 276 int pos = entry->msi_attrib.pos;
277 u16 msgctl; 277 u16 msgctl;
278 278
279 pci_read_config_word(dev, msi_control_reg(pos), &msgctl); 279 pci_read_config_word(dev, msi_control_reg(pos), &msgctl);
280 msgctl &= ~PCI_MSI_FLAGS_QSIZE; 280 msgctl &= ~PCI_MSI_FLAGS_QSIZE;
281 msgctl |= entry->msi_attrib.multiple << 4; 281 msgctl |= entry->msi_attrib.multiple << 4;
282 pci_write_config_word(dev, msi_control_reg(pos), msgctl); 282 pci_write_config_word(dev, msi_control_reg(pos), msgctl);
283 283
284 pci_write_config_dword(dev, msi_lower_address_reg(pos), 284 pci_write_config_dword(dev, msi_lower_address_reg(pos),
285 msg->address_lo); 285 msg->address_lo);
286 if (entry->msi_attrib.is_64) { 286 if (entry->msi_attrib.is_64) {
287 pci_write_config_dword(dev, msi_upper_address_reg(pos), 287 pci_write_config_dword(dev, msi_upper_address_reg(pos),
288 msg->address_hi); 288 msg->address_hi);
289 pci_write_config_word(dev, msi_data_reg(pos, 1), 289 pci_write_config_word(dev, msi_data_reg(pos, 1),
290 msg->data); 290 msg->data);
291 } else { 291 } else {
292 pci_write_config_word(dev, msi_data_reg(pos, 0), 292 pci_write_config_word(dev, msi_data_reg(pos, 0),
293 msg->data); 293 msg->data);
294 } 294 }
295 } 295 }
296 entry->msg = *msg; 296 entry->msg = *msg;
297 } 297 }
298 298
299 void write_msi_msg(unsigned int irq, struct msi_msg *msg) 299 void write_msi_msg(unsigned int irq, struct msi_msg *msg)
300 { 300 {
301 struct msi_desc *entry = irq_get_msi_desc(irq); 301 struct msi_desc *entry = irq_get_msi_desc(irq);
302 302
303 __write_msi_msg(entry, msg); 303 __write_msi_msg(entry, msg);
304 } 304 }
305 305
306 static void free_msi_irqs(struct pci_dev *dev) 306 static void free_msi_irqs(struct pci_dev *dev)
307 { 307 {
308 struct msi_desc *entry, *tmp; 308 struct msi_desc *entry, *tmp;
309 309
310 list_for_each_entry(entry, &dev->msi_list, list) { 310 list_for_each_entry(entry, &dev->msi_list, list) {
311 int i, nvec; 311 int i, nvec;
312 if (!entry->irq) 312 if (!entry->irq)
313 continue; 313 continue;
314 nvec = 1 << entry->msi_attrib.multiple; 314 nvec = 1 << entry->msi_attrib.multiple;
315 for (i = 0; i < nvec; i++) 315 for (i = 0; i < nvec; i++)
316 BUG_ON(irq_has_action(entry->irq + i)); 316 BUG_ON(irq_has_action(entry->irq + i));
317 } 317 }
318 318
319 arch_teardown_msi_irqs(dev); 319 arch_teardown_msi_irqs(dev);
320 320
321 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { 321 list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) {
322 if (entry->msi_attrib.is_msix) { 322 if (entry->msi_attrib.is_msix) {
323 if (list_is_last(&entry->list, &dev->msi_list)) 323 if (list_is_last(&entry->list, &dev->msi_list))
324 iounmap(entry->mask_base); 324 iounmap(entry->mask_base);
325 } 325 }
326 kobject_del(&entry->kobj);
327 kobject_put(&entry->kobj);
326 list_del(&entry->list); 328 list_del(&entry->list);
327 kfree(entry); 329 kfree(entry);
328 } 330 }
329 } 331 }
330 332
331 static struct msi_desc *alloc_msi_entry(struct pci_dev *dev) 333 static struct msi_desc *alloc_msi_entry(struct pci_dev *dev)
332 { 334 {
333 struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL); 335 struct msi_desc *desc = kzalloc(sizeof(*desc), GFP_KERNEL);
334 if (!desc) 336 if (!desc)
335 return NULL; 337 return NULL;
336 338
337 INIT_LIST_HEAD(&desc->list); 339 INIT_LIST_HEAD(&desc->list);
338 desc->dev = dev; 340 desc->dev = dev;
339 341
340 return desc; 342 return desc;
341 } 343 }
342 344
343 static void pci_intx_for_msi(struct pci_dev *dev, int enable) 345 static void pci_intx_for_msi(struct pci_dev *dev, int enable)
344 { 346 {
345 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG)) 347 if (!(dev->dev_flags & PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG))
346 pci_intx(dev, enable); 348 pci_intx(dev, enable);
347 } 349 }
348 350
349 static void __pci_restore_msi_state(struct pci_dev *dev) 351 static void __pci_restore_msi_state(struct pci_dev *dev)
350 { 352 {
351 int pos; 353 int pos;
352 u16 control; 354 u16 control;
353 struct msi_desc *entry; 355 struct msi_desc *entry;
354 356
355 if (!dev->msi_enabled) 357 if (!dev->msi_enabled)
356 return; 358 return;
357 359
358 entry = irq_get_msi_desc(dev->irq); 360 entry = irq_get_msi_desc(dev->irq);
359 pos = entry->msi_attrib.pos; 361 pos = entry->msi_attrib.pos;
360 362
361 pci_intx_for_msi(dev, 0); 363 pci_intx_for_msi(dev, 0);
362 msi_set_enable(dev, pos, 0); 364 msi_set_enable(dev, pos, 0);
363 write_msi_msg(dev->irq, &entry->msg); 365 write_msi_msg(dev->irq, &entry->msg);
364 366
365 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); 367 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
366 msi_mask_irq(entry, msi_capable_mask(control), entry->masked); 368 msi_mask_irq(entry, msi_capable_mask(control), entry->masked);
367 control &= ~PCI_MSI_FLAGS_QSIZE; 369 control &= ~PCI_MSI_FLAGS_QSIZE;
368 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE; 370 control |= (entry->msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
369 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); 371 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
370 } 372 }
371 373
372 static void __pci_restore_msix_state(struct pci_dev *dev) 374 static void __pci_restore_msix_state(struct pci_dev *dev)
373 { 375 {
374 int pos; 376 int pos;
375 struct msi_desc *entry; 377 struct msi_desc *entry;
376 u16 control; 378 u16 control;
377 379
378 if (!dev->msix_enabled) 380 if (!dev->msix_enabled)
379 return; 381 return;
380 BUG_ON(list_empty(&dev->msi_list)); 382 BUG_ON(list_empty(&dev->msi_list));
381 entry = list_first_entry(&dev->msi_list, struct msi_desc, list); 383 entry = list_first_entry(&dev->msi_list, struct msi_desc, list);
382 pos = entry->msi_attrib.pos; 384 pos = entry->msi_attrib.pos;
383 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); 385 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
384 386
385 /* route the table */ 387 /* route the table */
386 pci_intx_for_msi(dev, 0); 388 pci_intx_for_msi(dev, 0);
387 control |= PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL; 389 control |= PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL;
388 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); 390 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
389 391
390 list_for_each_entry(entry, &dev->msi_list, list) { 392 list_for_each_entry(entry, &dev->msi_list, list) {
391 write_msi_msg(entry->irq, &entry->msg); 393 write_msi_msg(entry->irq, &entry->msg);
392 msix_mask_irq(entry, entry->masked); 394 msix_mask_irq(entry, entry->masked);
393 } 395 }
394 396
395 control &= ~PCI_MSIX_FLAGS_MASKALL; 397 control &= ~PCI_MSIX_FLAGS_MASKALL;
396 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); 398 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
397 } 399 }
398 400
399 void pci_restore_msi_state(struct pci_dev *dev) 401 void pci_restore_msi_state(struct pci_dev *dev)
400 { 402 {
401 __pci_restore_msi_state(dev); 403 __pci_restore_msi_state(dev);
402 __pci_restore_msix_state(dev); 404 __pci_restore_msix_state(dev);
403 } 405 }
404 EXPORT_SYMBOL_GPL(pci_restore_msi_state); 406 EXPORT_SYMBOL_GPL(pci_restore_msi_state);
405 407
408
409 #define to_msi_attr(obj) container_of(obj, struct msi_attribute, attr)
410 #define to_msi_desc(obj) container_of(obj, struct msi_desc, kobj)
411
412 struct msi_attribute {
413 struct attribute attr;
414 ssize_t (*show)(struct msi_desc *entry, struct msi_attribute *attr,
415 char *buf);
416 ssize_t (*store)(struct msi_desc *entry, struct msi_attribute *attr,
417 const char *buf, size_t count);
418 };
419
420 static ssize_t show_msi_mode(struct msi_desc *entry, struct msi_attribute *atr,
421 char *buf)
422 {
423 return sprintf(buf, "%s\n", entry->msi_attrib.is_msix ? "msix" : "msi");
424 }
425
426 static ssize_t msi_irq_attr_show(struct kobject *kobj,
427 struct attribute *attr, char *buf)
428 {
429 struct msi_attribute *attribute = to_msi_attr(attr);
430 struct msi_desc *entry = to_msi_desc(kobj);
431
432 if (!attribute->show)
433 return -EIO;
434
435 return attribute->show(entry, attribute, buf);
436 }
437
438 static const struct sysfs_ops msi_irq_sysfs_ops = {
439 .show = msi_irq_attr_show,
440 };
441
442 static struct msi_attribute mode_attribute =
443 __ATTR(mode, S_IRUGO, show_msi_mode, NULL);
444
445
446 struct attribute *msi_irq_default_attrs[] = {
447 &mode_attribute.attr,
448 NULL
449 };
450
451 void msi_kobj_release(struct kobject *kobj)
452 {
453 struct msi_desc *entry = to_msi_desc(kobj);
454
455 pci_dev_put(entry->dev);
456 }
457
458 static struct kobj_type msi_irq_ktype = {
459 .release = msi_kobj_release,
460 .sysfs_ops = &msi_irq_sysfs_ops,
461 .default_attrs = msi_irq_default_attrs,
462 };
463
464 static int populate_msi_sysfs(struct pci_dev *pdev)
465 {
466 struct msi_desc *entry;
467 struct kobject *kobj;
468 int ret;
469 int count = 0;
470
471 pdev->msi_kset = kset_create_and_add("msi_irqs", NULL, &pdev->dev.kobj);
472 if (!pdev->msi_kset)
473 return -ENOMEM;
474
475 list_for_each_entry(entry, &pdev->msi_list, list) {
476 kobj = &entry->kobj;
477 kobj->kset = pdev->msi_kset;
478 pci_dev_get(pdev);
479 ret = kobject_init_and_add(kobj, &msi_irq_ktype, NULL,
480 "%u", entry->irq);
481 if (ret)
482 goto out_unroll;
483
484 count++;
485 }
486
487 return 0;
488
489 out_unroll:
490 list_for_each_entry(entry, &pdev->msi_list, list) {
491 if (!count)
492 break;
493 kobject_del(&entry->kobj);
494 kobject_put(&entry->kobj);
495 count--;
496 }
497 return ret;
498 }
499
406 /** 500 /**
407 * msi_capability_init - configure device's MSI capability structure 501 * msi_capability_init - configure device's MSI capability structure
408 * @dev: pointer to the pci_dev data structure of MSI device function 502 * @dev: pointer to the pci_dev data structure of MSI device function
409 * @nvec: number of interrupts to allocate 503 * @nvec: number of interrupts to allocate
410 * 504 *
411 * Setup the MSI capability structure of the device with the requested 505 * Setup the MSI capability structure of the device with the requested
412 * number of interrupts. A return value of zero indicates the successful 506 * number of interrupts. A return value of zero indicates the successful
413 * setup of an entry with the new MSI irq. A negative return value indicates 507 * setup of an entry with the new MSI irq. A negative return value indicates
414 * an error, and a positive return value indicates the number of interrupts 508 * an error, and a positive return value indicates the number of interrupts
415 * which could have been allocated. 509 * which could have been allocated.
416 */ 510 */
417 static int msi_capability_init(struct pci_dev *dev, int nvec) 511 static int msi_capability_init(struct pci_dev *dev, int nvec)
418 { 512 {
419 struct msi_desc *entry; 513 struct msi_desc *entry;
420 int pos, ret; 514 int pos, ret;
421 u16 control; 515 u16 control;
422 unsigned mask; 516 unsigned mask;
423 517
424 pos = pci_find_capability(dev, PCI_CAP_ID_MSI); 518 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
425 msi_set_enable(dev, pos, 0); /* Disable MSI during set up */ 519 msi_set_enable(dev, pos, 0); /* Disable MSI during set up */
426 520
427 pci_read_config_word(dev, msi_control_reg(pos), &control); 521 pci_read_config_word(dev, msi_control_reg(pos), &control);
428 /* MSI Entry Initialization */ 522 /* MSI Entry Initialization */
429 entry = alloc_msi_entry(dev); 523 entry = alloc_msi_entry(dev);
430 if (!entry) 524 if (!entry)
431 return -ENOMEM; 525 return -ENOMEM;
432 526
433 entry->msi_attrib.is_msix = 0; 527 entry->msi_attrib.is_msix = 0;
434 entry->msi_attrib.is_64 = is_64bit_address(control); 528 entry->msi_attrib.is_64 = is_64bit_address(control);
435 entry->msi_attrib.entry_nr = 0; 529 entry->msi_attrib.entry_nr = 0;
436 entry->msi_attrib.maskbit = is_mask_bit_support(control); 530 entry->msi_attrib.maskbit = is_mask_bit_support(control);
437 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ 531 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
438 entry->msi_attrib.pos = pos; 532 entry->msi_attrib.pos = pos;
439 533
440 entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64); 534 entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64);
441 /* All MSIs are unmasked by default, Mask them all */ 535 /* All MSIs are unmasked by default, Mask them all */
442 if (entry->msi_attrib.maskbit) 536 if (entry->msi_attrib.maskbit)
443 pci_read_config_dword(dev, entry->mask_pos, &entry->masked); 537 pci_read_config_dword(dev, entry->mask_pos, &entry->masked);
444 mask = msi_capable_mask(control); 538 mask = msi_capable_mask(control);
445 msi_mask_irq(entry, mask, mask); 539 msi_mask_irq(entry, mask, mask);
446 540
447 list_add_tail(&entry->list, &dev->msi_list); 541 list_add_tail(&entry->list, &dev->msi_list);
448 542
449 /* Configure MSI capability structure */ 543 /* Configure MSI capability structure */
450 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); 544 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI);
451 if (ret) { 545 if (ret) {
452 msi_mask_irq(entry, mask, ~mask); 546 msi_mask_irq(entry, mask, ~mask);
453 free_msi_irqs(dev); 547 free_msi_irqs(dev);
454 return ret; 548 return ret;
455 } 549 }
456 550
551 ret = populate_msi_sysfs(dev);
552 if (ret) {
553 msi_mask_irq(entry, mask, ~mask);
554 free_msi_irqs(dev);
555 return ret;
556 }
557
457 /* Set MSI enabled bits */ 558 /* Set MSI enabled bits */
458 pci_intx_for_msi(dev, 0); 559 pci_intx_for_msi(dev, 0);
459 msi_set_enable(dev, pos, 1); 560 msi_set_enable(dev, pos, 1);
460 dev->msi_enabled = 1; 561 dev->msi_enabled = 1;
461 562
462 dev->irq = entry->irq; 563 dev->irq = entry->irq;
463 return 0; 564 return 0;
464 } 565 }
465 566
466 static void __iomem *msix_map_region(struct pci_dev *dev, unsigned pos, 567 static void __iomem *msix_map_region(struct pci_dev *dev, unsigned pos,
467 unsigned nr_entries) 568 unsigned nr_entries)
468 { 569 {
469 resource_size_t phys_addr; 570 resource_size_t phys_addr;
470 u32 table_offset; 571 u32 table_offset;
471 u8 bir; 572 u8 bir;
472 573
473 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset); 574 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
474 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK); 575 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
475 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK; 576 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
476 phys_addr = pci_resource_start(dev, bir) + table_offset; 577 phys_addr = pci_resource_start(dev, bir) + table_offset;
477 578
478 return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE); 579 return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
479 } 580 }
480 581
481 static int msix_setup_entries(struct pci_dev *dev, unsigned pos, 582 static int msix_setup_entries(struct pci_dev *dev, unsigned pos,
482 void __iomem *base, struct msix_entry *entries, 583 void __iomem *base, struct msix_entry *entries,
483 int nvec) 584 int nvec)
484 { 585 {
485 struct msi_desc *entry; 586 struct msi_desc *entry;
486 int i; 587 int i;
487 588
488 for (i = 0; i < nvec; i++) { 589 for (i = 0; i < nvec; i++) {
489 entry = alloc_msi_entry(dev); 590 entry = alloc_msi_entry(dev);
490 if (!entry) { 591 if (!entry) {
491 if (!i) 592 if (!i)
492 iounmap(base); 593 iounmap(base);
493 else 594 else
494 free_msi_irqs(dev); 595 free_msi_irqs(dev);
495 /* No enough memory. Don't try again */ 596 /* No enough memory. Don't try again */
496 return -ENOMEM; 597 return -ENOMEM;
497 } 598 }
498 599
499 entry->msi_attrib.is_msix = 1; 600 entry->msi_attrib.is_msix = 1;
500 entry->msi_attrib.is_64 = 1; 601 entry->msi_attrib.is_64 = 1;
501 entry->msi_attrib.entry_nr = entries[i].entry; 602 entry->msi_attrib.entry_nr = entries[i].entry;
502 entry->msi_attrib.default_irq = dev->irq; 603 entry->msi_attrib.default_irq = dev->irq;
503 entry->msi_attrib.pos = pos; 604 entry->msi_attrib.pos = pos;
504 entry->mask_base = base; 605 entry->mask_base = base;
505 606
506 list_add_tail(&entry->list, &dev->msi_list); 607 list_add_tail(&entry->list, &dev->msi_list);
507 } 608 }
508 609
509 return 0; 610 return 0;
510 } 611 }
511 612
512 static void msix_program_entries(struct pci_dev *dev, 613 static void msix_program_entries(struct pci_dev *dev,
513 struct msix_entry *entries) 614 struct msix_entry *entries)
514 { 615 {
515 struct msi_desc *entry; 616 struct msi_desc *entry;
516 int i = 0; 617 int i = 0;
517 618
518 list_for_each_entry(entry, &dev->msi_list, list) { 619 list_for_each_entry(entry, &dev->msi_list, list) {
519 int offset = entries[i].entry * PCI_MSIX_ENTRY_SIZE + 620 int offset = entries[i].entry * PCI_MSIX_ENTRY_SIZE +
520 PCI_MSIX_ENTRY_VECTOR_CTRL; 621 PCI_MSIX_ENTRY_VECTOR_CTRL;
521 622
522 entries[i].vector = entry->irq; 623 entries[i].vector = entry->irq;
523 irq_set_msi_desc(entry->irq, entry); 624 irq_set_msi_desc(entry->irq, entry);
524 entry->masked = readl(entry->mask_base + offset); 625 entry->masked = readl(entry->mask_base + offset);
525 msix_mask_irq(entry, 1); 626 msix_mask_irq(entry, 1);
526 i++; 627 i++;
527 } 628 }
528 } 629 }
529 630
530 /** 631 /**
531 * msix_capability_init - configure device's MSI-X capability 632 * msix_capability_init - configure device's MSI-X capability
532 * @dev: pointer to the pci_dev data structure of MSI-X device function 633 * @dev: pointer to the pci_dev data structure of MSI-X device function
533 * @entries: pointer to an array of struct msix_entry entries 634 * @entries: pointer to an array of struct msix_entry entries
534 * @nvec: number of @entries 635 * @nvec: number of @entries
535 * 636 *
536 * Setup the MSI-X capability structure of device function with a 637 * Setup the MSI-X capability structure of device function with a
537 * single MSI-X irq. A return of zero indicates the successful setup of 638 * single MSI-X irq. A return of zero indicates the successful setup of
538 * requested MSI-X entries with allocated irqs or non-zero for otherwise. 639 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
539 **/ 640 **/
540 static int msix_capability_init(struct pci_dev *dev, 641 static int msix_capability_init(struct pci_dev *dev,
541 struct msix_entry *entries, int nvec) 642 struct msix_entry *entries, int nvec)
542 { 643 {
543 int pos, ret; 644 int pos, ret;
544 u16 control; 645 u16 control;
545 void __iomem *base; 646 void __iomem *base;
546 647
547 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); 648 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
548 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control); 649 pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
549 650
550 /* Ensure MSI-X is disabled while it is set up */ 651 /* Ensure MSI-X is disabled while it is set up */
551 control &= ~PCI_MSIX_FLAGS_ENABLE; 652 control &= ~PCI_MSIX_FLAGS_ENABLE;
552 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); 653 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
553 654
554 /* Request & Map MSI-X table region */ 655 /* Request & Map MSI-X table region */
555 base = msix_map_region(dev, pos, multi_msix_capable(control)); 656 base = msix_map_region(dev, pos, multi_msix_capable(control));
556 if (!base) 657 if (!base)
557 return -ENOMEM; 658 return -ENOMEM;
558 659
559 ret = msix_setup_entries(dev, pos, base, entries, nvec); 660 ret = msix_setup_entries(dev, pos, base, entries, nvec);
560 if (ret) 661 if (ret)
561 return ret; 662 return ret;
562 663
563 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX); 664 ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSIX);
564 if (ret) 665 if (ret)
565 goto error; 666 goto error;
566 667
567 /* 668 /*
568 * Some devices require MSI-X to be enabled before we can touch the 669 * Some devices require MSI-X to be enabled before we can touch the
569 * MSI-X registers. We need to mask all the vectors to prevent 670 * MSI-X registers. We need to mask all the vectors to prevent
570 * interrupts coming in before they're fully set up. 671 * interrupts coming in before they're fully set up.
571 */ 672 */
572 control |= PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE; 673 control |= PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE;
573 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); 674 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
574 675
575 msix_program_entries(dev, entries); 676 msix_program_entries(dev, entries);
576 677
678 ret = populate_msi_sysfs(dev);
679 if (ret) {
680 ret = 0;
681 goto error;
682 }
683
577 /* Set MSI-X enabled bits and unmask the function */ 684 /* Set MSI-X enabled bits and unmask the function */
578 pci_intx_for_msi(dev, 0); 685 pci_intx_for_msi(dev, 0);
579 dev->msix_enabled = 1; 686 dev->msix_enabled = 1;
580 687
581 control &= ~PCI_MSIX_FLAGS_MASKALL; 688 control &= ~PCI_MSIX_FLAGS_MASKALL;
582 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control); 689 pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
583 690
584 return 0; 691 return 0;
585 692
586 error: 693 error:
587 if (ret < 0) { 694 if (ret < 0) {
588 /* 695 /*
589 * If we had some success, report the number of irqs 696 * If we had some success, report the number of irqs
590 * we succeeded in setting up. 697 * we succeeded in setting up.
591 */ 698 */
592 struct msi_desc *entry; 699 struct msi_desc *entry;
593 int avail = 0; 700 int avail = 0;
594 701
595 list_for_each_entry(entry, &dev->msi_list, list) { 702 list_for_each_entry(entry, &dev->msi_list, list) {
596 if (entry->irq != 0) 703 if (entry->irq != 0)
597 avail++; 704 avail++;
598 } 705 }
599 if (avail != 0) 706 if (avail != 0)
600 ret = avail; 707 ret = avail;
601 } 708 }
602 709
603 free_msi_irqs(dev); 710 free_msi_irqs(dev);
604 711
605 return ret; 712 return ret;
606 } 713 }
607 714
608 /** 715 /**
609 * pci_msi_check_device - check whether MSI may be enabled on a device 716 * pci_msi_check_device - check whether MSI may be enabled on a device
610 * @dev: pointer to the pci_dev data structure of MSI device function 717 * @dev: pointer to the pci_dev data structure of MSI device function
611 * @nvec: how many MSIs have been requested ? 718 * @nvec: how many MSIs have been requested ?
612 * @type: are we checking for MSI or MSI-X ? 719 * @type: are we checking for MSI or MSI-X ?
613 * 720 *
614 * Look at global flags, the device itself, and its parent busses 721 * Look at global flags, the device itself, and its parent busses
615 * to determine if MSI/-X are supported for the device. If MSI/-X is 722 * to determine if MSI/-X are supported for the device. If MSI/-X is
616 * supported return 0, else return an error code. 723 * supported return 0, else return an error code.
617 **/ 724 **/
618 static int pci_msi_check_device(struct pci_dev *dev, int nvec, int type) 725 static int pci_msi_check_device(struct pci_dev *dev, int nvec, int type)
619 { 726 {
620 struct pci_bus *bus; 727 struct pci_bus *bus;
621 int ret; 728 int ret;
622 729
623 /* MSI must be globally enabled and supported by the device */ 730 /* MSI must be globally enabled and supported by the device */
624 if (!pci_msi_enable || !dev || dev->no_msi) 731 if (!pci_msi_enable || !dev || dev->no_msi)
625 return -EINVAL; 732 return -EINVAL;
626 733
627 /* 734 /*
628 * You can't ask to have 0 or less MSIs configured. 735 * You can't ask to have 0 or less MSIs configured.
629 * a) it's stupid .. 736 * a) it's stupid ..
630 * b) the list manipulation code assumes nvec >= 1. 737 * b) the list manipulation code assumes nvec >= 1.
631 */ 738 */
632 if (nvec < 1) 739 if (nvec < 1)
633 return -ERANGE; 740 return -ERANGE;
634 741
635 /* 742 /*
636 * Any bridge which does NOT route MSI transactions from its 743 * Any bridge which does NOT route MSI transactions from its
637 * secondary bus to its primary bus must set NO_MSI flag on 744 * secondary bus to its primary bus must set NO_MSI flag on
638 * the secondary pci_bus. 745 * the secondary pci_bus.
639 * We expect only arch-specific PCI host bus controller driver 746 * We expect only arch-specific PCI host bus controller driver
640 * or quirks for specific PCI bridges to be setting NO_MSI. 747 * or quirks for specific PCI bridges to be setting NO_MSI.
641 */ 748 */
642 for (bus = dev->bus; bus; bus = bus->parent) 749 for (bus = dev->bus; bus; bus = bus->parent)
643 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI) 750 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
644 return -EINVAL; 751 return -EINVAL;
645 752
646 ret = arch_msi_check_device(dev, nvec, type); 753 ret = arch_msi_check_device(dev, nvec, type);
647 if (ret) 754 if (ret)
648 return ret; 755 return ret;
649 756
650 if (!pci_find_capability(dev, type)) 757 if (!pci_find_capability(dev, type))
651 return -EINVAL; 758 return -EINVAL;
652 759
653 return 0; 760 return 0;
654 } 761 }
655 762
656 /** 763 /**
657 * pci_enable_msi_block - configure device's MSI capability structure 764 * pci_enable_msi_block - configure device's MSI capability structure
658 * @dev: device to configure 765 * @dev: device to configure
659 * @nvec: number of interrupts to configure 766 * @nvec: number of interrupts to configure
660 * 767 *
661 * Allocate IRQs for a device with the MSI capability. 768 * Allocate IRQs for a device with the MSI capability.
662 * This function returns a negative errno if an error occurs. If it 769 * This function returns a negative errno if an error occurs. If it
663 * is unable to allocate the number of interrupts requested, it returns 770 * is unable to allocate the number of interrupts requested, it returns
664 * the number of interrupts it might be able to allocate. If it successfully 771 * the number of interrupts it might be able to allocate. If it successfully
665 * allocates at least the number of interrupts requested, it returns 0 and 772 * allocates at least the number of interrupts requested, it returns 0 and
666 * updates the @dev's irq member to the lowest new interrupt number; the 773 * updates the @dev's irq member to the lowest new interrupt number; the
667 * other interrupt numbers allocated to this device are consecutive. 774 * other interrupt numbers allocated to this device are consecutive.
668 */ 775 */
669 int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec) 776 int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
670 { 777 {
671 int status, pos, maxvec; 778 int status, pos, maxvec;
672 u16 msgctl; 779 u16 msgctl;
673 780
674 pos = pci_find_capability(dev, PCI_CAP_ID_MSI); 781 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
675 if (!pos) 782 if (!pos)
676 return -EINVAL; 783 return -EINVAL;
677 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl); 784 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
678 maxvec = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1); 785 maxvec = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
679 if (nvec > maxvec) 786 if (nvec > maxvec)
680 return maxvec; 787 return maxvec;
681 788
682 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSI); 789 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSI);
683 if (status) 790 if (status)
684 return status; 791 return status;
685 792
686 WARN_ON(!!dev->msi_enabled); 793 WARN_ON(!!dev->msi_enabled);
687 794
688 /* Check whether driver already requested MSI-X irqs */ 795 /* Check whether driver already requested MSI-X irqs */
689 if (dev->msix_enabled) { 796 if (dev->msix_enabled) {
690 dev_info(&dev->dev, "can't enable MSI " 797 dev_info(&dev->dev, "can't enable MSI "
691 "(MSI-X already enabled)\n"); 798 "(MSI-X already enabled)\n");
692 return -EINVAL; 799 return -EINVAL;
693 } 800 }
694 801
695 status = msi_capability_init(dev, nvec); 802 status = msi_capability_init(dev, nvec);
696 return status; 803 return status;
697 } 804 }
698 EXPORT_SYMBOL(pci_enable_msi_block); 805 EXPORT_SYMBOL(pci_enable_msi_block);
699 806
700 void pci_msi_shutdown(struct pci_dev *dev) 807 void pci_msi_shutdown(struct pci_dev *dev)
701 { 808 {
702 struct msi_desc *desc; 809 struct msi_desc *desc;
703 u32 mask; 810 u32 mask;
704 u16 ctrl; 811 u16 ctrl;
705 unsigned pos; 812 unsigned pos;
706 813
707 if (!pci_msi_enable || !dev || !dev->msi_enabled) 814 if (!pci_msi_enable || !dev || !dev->msi_enabled)
708 return; 815 return;
709 816
710 BUG_ON(list_empty(&dev->msi_list)); 817 BUG_ON(list_empty(&dev->msi_list));
711 desc = list_first_entry(&dev->msi_list, struct msi_desc, list); 818 desc = list_first_entry(&dev->msi_list, struct msi_desc, list);
712 pos = desc->msi_attrib.pos; 819 pos = desc->msi_attrib.pos;
713 820
714 msi_set_enable(dev, pos, 0); 821 msi_set_enable(dev, pos, 0);
715 pci_intx_for_msi(dev, 1); 822 pci_intx_for_msi(dev, 1);
716 dev->msi_enabled = 0; 823 dev->msi_enabled = 0;
717 824
718 /* Return the device with MSI unmasked as initial states */ 825 /* Return the device with MSI unmasked as initial states */
719 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &ctrl); 826 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &ctrl);
720 mask = msi_capable_mask(ctrl); 827 mask = msi_capable_mask(ctrl);
721 /* Keep cached state to be restored */ 828 /* Keep cached state to be restored */
722 __msi_mask_irq(desc, mask, ~mask); 829 __msi_mask_irq(desc, mask, ~mask);
723 830
724 /* Restore dev->irq to its default pin-assertion irq */ 831 /* Restore dev->irq to its default pin-assertion irq */
725 dev->irq = desc->msi_attrib.default_irq; 832 dev->irq = desc->msi_attrib.default_irq;
726 } 833 }
727 834
728 void pci_disable_msi(struct pci_dev *dev) 835 void pci_disable_msi(struct pci_dev *dev)
729 { 836 {
730 if (!pci_msi_enable || !dev || !dev->msi_enabled) 837 if (!pci_msi_enable || !dev || !dev->msi_enabled)
731 return; 838 return;
732 839
733 pci_msi_shutdown(dev); 840 pci_msi_shutdown(dev);
734 free_msi_irqs(dev); 841 free_msi_irqs(dev);
842 kset_unregister(dev->msi_kset);
843 dev->msi_kset = NULL;
735 } 844 }
736 EXPORT_SYMBOL(pci_disable_msi); 845 EXPORT_SYMBOL(pci_disable_msi);
737 846
738 /** 847 /**
739 * pci_msix_table_size - return the number of device's MSI-X table entries 848 * pci_msix_table_size - return the number of device's MSI-X table entries
740 * @dev: pointer to the pci_dev data structure of MSI-X device function 849 * @dev: pointer to the pci_dev data structure of MSI-X device function
741 */ 850 */
742 int pci_msix_table_size(struct pci_dev *dev) 851 int pci_msix_table_size(struct pci_dev *dev)
743 { 852 {
744 int pos; 853 int pos;
745 u16 control; 854 u16 control;
746 855
747 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); 856 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
748 if (!pos) 857 if (!pos)
749 return 0; 858 return 0;
750 859
751 pci_read_config_word(dev, msi_control_reg(pos), &control); 860 pci_read_config_word(dev, msi_control_reg(pos), &control);
752 return multi_msix_capable(control); 861 return multi_msix_capable(control);
753 } 862 }
754 863
755 /** 864 /**
756 * pci_enable_msix - configure device's MSI-X capability structure 865 * pci_enable_msix - configure device's MSI-X capability structure
757 * @dev: pointer to the pci_dev data structure of MSI-X device function 866 * @dev: pointer to the pci_dev data structure of MSI-X device function
758 * @entries: pointer to an array of MSI-X entries 867 * @entries: pointer to an array of MSI-X entries
759 * @nvec: number of MSI-X irqs requested for allocation by device driver 868 * @nvec: number of MSI-X irqs requested for allocation by device driver
760 * 869 *
761 * Setup the MSI-X capability structure of device function with the number 870 * Setup the MSI-X capability structure of device function with the number
762 * of requested irqs upon its software driver call to request for 871 * of requested irqs upon its software driver call to request for
763 * MSI-X mode enabled on its hardware device function. A return of zero 872 * MSI-X mode enabled on its hardware device function. A return of zero
764 * indicates the successful configuration of MSI-X capability structure 873 * indicates the successful configuration of MSI-X capability structure
765 * with new allocated MSI-X irqs. A return of < 0 indicates a failure. 874 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
766 * Or a return of > 0 indicates that driver request is exceeding the number 875 * Or a return of > 0 indicates that driver request is exceeding the number
767 * of irqs or MSI-X vectors available. Driver should use the returned value to 876 * of irqs or MSI-X vectors available. Driver should use the returned value to
768 * re-send its request. 877 * re-send its request.
769 **/ 878 **/
770 int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec) 879 int pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, int nvec)
771 { 880 {
772 int status, nr_entries; 881 int status, nr_entries;
773 int i, j; 882 int i, j;
774 883
775 if (!entries) 884 if (!entries)
776 return -EINVAL; 885 return -EINVAL;
777 886
778 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX); 887 status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSIX);
779 if (status) 888 if (status)
780 return status; 889 return status;
781 890
782 nr_entries = pci_msix_table_size(dev); 891 nr_entries = pci_msix_table_size(dev);
783 if (nvec > nr_entries) 892 if (nvec > nr_entries)
784 return nr_entries; 893 return nr_entries;
785 894
786 /* Check for any invalid entries */ 895 /* Check for any invalid entries */
787 for (i = 0; i < nvec; i++) { 896 for (i = 0; i < nvec; i++) {
788 if (entries[i].entry >= nr_entries) 897 if (entries[i].entry >= nr_entries)
789 return -EINVAL; /* invalid entry */ 898 return -EINVAL; /* invalid entry */
790 for (j = i + 1; j < nvec; j++) { 899 for (j = i + 1; j < nvec; j++) {
791 if (entries[i].entry == entries[j].entry) 900 if (entries[i].entry == entries[j].entry)
792 return -EINVAL; /* duplicate entry */ 901 return -EINVAL; /* duplicate entry */
793 } 902 }
794 } 903 }
795 WARN_ON(!!dev->msix_enabled); 904 WARN_ON(!!dev->msix_enabled);
796 905
797 /* Check whether driver already requested for MSI irq */ 906 /* Check whether driver already requested for MSI irq */
798 if (dev->msi_enabled) { 907 if (dev->msi_enabled) {
799 dev_info(&dev->dev, "can't enable MSI-X " 908 dev_info(&dev->dev, "can't enable MSI-X "
800 "(MSI IRQ already assigned)\n"); 909 "(MSI IRQ already assigned)\n");
801 return -EINVAL; 910 return -EINVAL;
802 } 911 }
803 status = msix_capability_init(dev, entries, nvec); 912 status = msix_capability_init(dev, entries, nvec);
804 return status; 913 return status;
805 } 914 }
806 EXPORT_SYMBOL(pci_enable_msix); 915 EXPORT_SYMBOL(pci_enable_msix);
807 916
808 void pci_msix_shutdown(struct pci_dev *dev) 917 void pci_msix_shutdown(struct pci_dev *dev)
809 { 918 {
810 struct msi_desc *entry; 919 struct msi_desc *entry;
811 920
812 if (!pci_msi_enable || !dev || !dev->msix_enabled) 921 if (!pci_msi_enable || !dev || !dev->msix_enabled)
813 return; 922 return;
814 923
815 /* Return the device with MSI-X masked as initial states */ 924 /* Return the device with MSI-X masked as initial states */
816 list_for_each_entry(entry, &dev->msi_list, list) { 925 list_for_each_entry(entry, &dev->msi_list, list) {
817 /* Keep cached states to be restored */ 926 /* Keep cached states to be restored */
818 __msix_mask_irq(entry, 1); 927 __msix_mask_irq(entry, 1);
819 } 928 }
820 929
821 msix_set_enable(dev, 0); 930 msix_set_enable(dev, 0);
822 pci_intx_for_msi(dev, 1); 931 pci_intx_for_msi(dev, 1);
823 dev->msix_enabled = 0; 932 dev->msix_enabled = 0;
824 } 933 }
825 934
826 void pci_disable_msix(struct pci_dev *dev) 935 void pci_disable_msix(struct pci_dev *dev)
827 { 936 {
828 if (!pci_msi_enable || !dev || !dev->msix_enabled) 937 if (!pci_msi_enable || !dev || !dev->msix_enabled)
829 return; 938 return;
830 939
831 pci_msix_shutdown(dev); 940 pci_msix_shutdown(dev);
832 free_msi_irqs(dev); 941 free_msi_irqs(dev);
942 kset_unregister(dev->msi_kset);
943 dev->msi_kset = NULL;
833 } 944 }
834 EXPORT_SYMBOL(pci_disable_msix); 945 EXPORT_SYMBOL(pci_disable_msix);
835 946
836 /** 947 /**
837 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state 948 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
838 * @dev: pointer to the pci_dev data structure of MSI(X) device function 949 * @dev: pointer to the pci_dev data structure of MSI(X) device function
839 * 950 *
840 * Being called during hotplug remove, from which the device function 951 * Being called during hotplug remove, from which the device function
841 * is hot-removed. All previous assigned MSI/MSI-X irqs, if 952 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
842 * allocated for this device function, are reclaimed to unused state, 953 * allocated for this device function, are reclaimed to unused state,
843 * which may be used later on. 954 * which may be used later on.
844 **/ 955 **/
845 void msi_remove_pci_irq_vectors(struct pci_dev *dev) 956 void msi_remove_pci_irq_vectors(struct pci_dev *dev)
846 { 957 {
847 if (!pci_msi_enable || !dev) 958 if (!pci_msi_enable || !dev)
848 return; 959 return;
849 960
850 if (dev->msi_enabled || dev->msix_enabled) 961 if (dev->msi_enabled || dev->msix_enabled)
851 free_msi_irqs(dev); 962 free_msi_irqs(dev);
852 } 963 }
853 964
854 void pci_no_msi(void) 965 void pci_no_msi(void)
855 { 966 {
856 pci_msi_enable = 0; 967 pci_msi_enable = 0;
857 } 968 }
858 969
859 /** 970 /**
860 * pci_msi_enabled - is MSI enabled? 971 * pci_msi_enabled - is MSI enabled?
861 * 972 *
862 * Returns true if MSI has not been disabled by the command-line option 973 * Returns true if MSI has not been disabled by the command-line option
863 * pci=nomsi. 974 * pci=nomsi.
864 **/ 975 **/
865 int pci_msi_enabled(void) 976 int pci_msi_enabled(void)
866 { 977 {
867 return pci_msi_enable; 978 return pci_msi_enable;
868 } 979 }
869 EXPORT_SYMBOL(pci_msi_enabled); 980 EXPORT_SYMBOL(pci_msi_enabled);
870 981
871 void pci_msi_init_pci_dev(struct pci_dev *dev) 982 void pci_msi_init_pci_dev(struct pci_dev *dev)
872 { 983 {
873 INIT_LIST_HEAD(&dev->msi_list); 984 INIT_LIST_HEAD(&dev->msi_list);
874 } 985 }
875 986
1 #ifndef LINUX_MSI_H 1 #ifndef LINUX_MSI_H
2 #define LINUX_MSI_H 2 #define LINUX_MSI_H
3 3
4 #include <linux/kobject.h>
4 #include <linux/list.h> 5 #include <linux/list.h>
5 6
6 struct msi_msg { 7 struct msi_msg {
7 u32 address_lo; /* low 32 bits of msi message address */ 8 u32 address_lo; /* low 32 bits of msi message address */
8 u32 address_hi; /* high 32 bits of msi message address */ 9 u32 address_hi; /* high 32 bits of msi message address */
9 u32 data; /* 16 bits of msi message data */ 10 u32 data; /* 16 bits of msi message data */
10 }; 11 };
11 12
12 /* Helper functions */ 13 /* Helper functions */
13 struct irq_data; 14 struct irq_data;
14 struct msi_desc; 15 struct msi_desc;
15 extern void mask_msi_irq(struct irq_data *data); 16 extern void mask_msi_irq(struct irq_data *data);
16 extern void unmask_msi_irq(struct irq_data *data); 17 extern void unmask_msi_irq(struct irq_data *data);
17 extern void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg); 18 extern void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
18 extern void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg); 19 extern void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
19 extern void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg); 20 extern void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
20 extern void read_msi_msg(unsigned int irq, struct msi_msg *msg); 21 extern void read_msi_msg(unsigned int irq, struct msi_msg *msg);
21 extern void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg); 22 extern void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
22 extern void write_msi_msg(unsigned int irq, struct msi_msg *msg); 23 extern void write_msi_msg(unsigned int irq, struct msi_msg *msg);
23 24
24 struct msi_desc { 25 struct msi_desc {
25 struct { 26 struct {
26 __u8 is_msix : 1; 27 __u8 is_msix : 1;
27 __u8 multiple: 3; /* log2 number of messages */ 28 __u8 multiple: 3; /* log2 number of messages */
28 __u8 maskbit : 1; /* mask-pending bit supported ? */ 29 __u8 maskbit : 1; /* mask-pending bit supported ? */
29 __u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */ 30 __u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */
30 __u8 pos; /* Location of the msi capability */ 31 __u8 pos; /* Location of the msi capability */
31 __u16 entry_nr; /* specific enabled entry */ 32 __u16 entry_nr; /* specific enabled entry */
32 unsigned default_irq; /* default pre-assigned irq */ 33 unsigned default_irq; /* default pre-assigned irq */
33 } msi_attrib; 34 } msi_attrib;
34 35
35 u32 masked; /* mask bits */ 36 u32 masked; /* mask bits */
36 unsigned int irq; 37 unsigned int irq;
37 struct list_head list; 38 struct list_head list;
38 39
39 union { 40 union {
40 void __iomem *mask_base; 41 void __iomem *mask_base;
41 u8 mask_pos; 42 u8 mask_pos;
42 }; 43 };
43 struct pci_dev *dev; 44 struct pci_dev *dev;
44 45
45 /* Last set MSI message */ 46 /* Last set MSI message */
46 struct msi_msg msg; 47 struct msi_msg msg;
48
49 struct kobject kobj;
47 }; 50 };
48 51
49 /* 52 /*
50 * The arch hook for setup up msi irqs 53 * The arch hook for setup up msi irqs
51 */ 54 */
52 int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc); 55 int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
53 void arch_teardown_msi_irq(unsigned int irq); 56 void arch_teardown_msi_irq(unsigned int irq);
54 extern int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); 57 extern int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
55 extern void arch_teardown_msi_irqs(struct pci_dev *dev); 58 extern void arch_teardown_msi_irqs(struct pci_dev *dev);
56 extern int arch_msi_check_device(struct pci_dev* dev, int nvec, int type); 59 extern int arch_msi_check_device(struct pci_dev* dev, int nvec, int type);
57 60
58 61
59 #endif /* LINUX_MSI_H */ 62 #endif /* LINUX_MSI_H */
60 63
1 /* 1 /*
2 * pci.h 2 * pci.h
3 * 3 *
4 * PCI defines and function prototypes 4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt 5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz> 6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
7 * 7 *
8 * For more information, please consult the following manuals (look at 8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them): 9 * http://www.pcisig.com/ for how to get them):
10 * 10 *
11 * PCI BIOS Specification 11 * PCI BIOS Specification
12 * PCI Local Bus Specification 12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification 13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide 14 * PCI System Design Guide
15 */ 15 */
16 16
17 #ifndef LINUX_PCI_H 17 #ifndef LINUX_PCI_H
18 #define LINUX_PCI_H 18 #define LINUX_PCI_H
19 19
20 #include <linux/pci_regs.h> /* The pci register defines */ 20 #include <linux/pci_regs.h> /* The pci register defines */
21 21
22 /* 22 /*
23 * The PCI interface treats multi-function devices as independent 23 * The PCI interface treats multi-function devices as independent
24 * devices. The slot/function address of each device is encoded 24 * devices. The slot/function address of each device is encoded
25 * in a single byte as follows: 25 * in a single byte as follows:
26 * 26 *
27 * 7:3 = slot 27 * 7:3 = slot
28 * 2:0 = function 28 * 2:0 = function
29 */ 29 */
30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 30 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07) 32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
33 33
34 /* Ioctls for /proc/bus/pci/X/Y nodes. */ 34 /* Ioctls for /proc/bus/pci/X/Y nodes. */
35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8) 35 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */ 36 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */ 37 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */ 38 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */ 39 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
40 40
41 #ifdef __KERNEL__ 41 #ifdef __KERNEL__
42 42
43 #include <linux/mod_devicetable.h> 43 #include <linux/mod_devicetable.h>
44 44
45 #include <linux/types.h> 45 #include <linux/types.h>
46 #include <linux/init.h> 46 #include <linux/init.h>
47 #include <linux/ioport.h> 47 #include <linux/ioport.h>
48 #include <linux/list.h> 48 #include <linux/list.h>
49 #include <linux/compiler.h> 49 #include <linux/compiler.h>
50 #include <linux/errno.h> 50 #include <linux/errno.h>
51 #include <linux/kobject.h> 51 #include <linux/kobject.h>
52 #include <linux/atomic.h> 52 #include <linux/atomic.h>
53 #include <linux/device.h> 53 #include <linux/device.h>
54 #include <linux/io.h> 54 #include <linux/io.h>
55 #include <linux/irqreturn.h> 55 #include <linux/irqreturn.h>
56 56
57 /* Include the ID list */ 57 /* Include the ID list */
58 #include <linux/pci_ids.h> 58 #include <linux/pci_ids.h>
59 59
60 /* pci_slot represents a physical slot */ 60 /* pci_slot represents a physical slot */
61 struct pci_slot { 61 struct pci_slot {
62 struct pci_bus *bus; /* The bus this slot is on */ 62 struct pci_bus *bus; /* The bus this slot is on */
63 struct list_head list; /* node in list of slots on this bus */ 63 struct list_head list; /* node in list of slots on this bus */
64 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ 64 struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */
65 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ 65 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
66 struct kobject kobj; 66 struct kobject kobj;
67 }; 67 };
68 68
69 static inline const char *pci_slot_name(const struct pci_slot *slot) 69 static inline const char *pci_slot_name(const struct pci_slot *slot)
70 { 70 {
71 return kobject_name(&slot->kobj); 71 return kobject_name(&slot->kobj);
72 } 72 }
73 73
74 /* File state for mmap()s on /proc/bus/pci/X/Y */ 74 /* File state for mmap()s on /proc/bus/pci/X/Y */
75 enum pci_mmap_state { 75 enum pci_mmap_state {
76 pci_mmap_io, 76 pci_mmap_io,
77 pci_mmap_mem 77 pci_mmap_mem
78 }; 78 };
79 79
80 /* This defines the direction arg to the DMA mapping routines. */ 80 /* This defines the direction arg to the DMA mapping routines. */
81 #define PCI_DMA_BIDIRECTIONAL 0 81 #define PCI_DMA_BIDIRECTIONAL 0
82 #define PCI_DMA_TODEVICE 1 82 #define PCI_DMA_TODEVICE 1
83 #define PCI_DMA_FROMDEVICE 2 83 #define PCI_DMA_FROMDEVICE 2
84 #define PCI_DMA_NONE 3 84 #define PCI_DMA_NONE 3
85 85
86 /* 86 /*
87 * For PCI devices, the region numbers are assigned this way: 87 * For PCI devices, the region numbers are assigned this way:
88 */ 88 */
89 enum { 89 enum {
90 /* #0-5: standard PCI resources */ 90 /* #0-5: standard PCI resources */
91 PCI_STD_RESOURCES, 91 PCI_STD_RESOURCES,
92 PCI_STD_RESOURCE_END = 5, 92 PCI_STD_RESOURCE_END = 5,
93 93
94 /* #6: expansion ROM resource */ 94 /* #6: expansion ROM resource */
95 PCI_ROM_RESOURCE, 95 PCI_ROM_RESOURCE,
96 96
97 /* device specific resources */ 97 /* device specific resources */
98 #ifdef CONFIG_PCI_IOV 98 #ifdef CONFIG_PCI_IOV
99 PCI_IOV_RESOURCES, 99 PCI_IOV_RESOURCES,
100 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, 100 PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1,
101 #endif 101 #endif
102 102
103 /* resources assigned to buses behind the bridge */ 103 /* resources assigned to buses behind the bridge */
104 #define PCI_BRIDGE_RESOURCE_NUM 4 104 #define PCI_BRIDGE_RESOURCE_NUM 4
105 105
106 PCI_BRIDGE_RESOURCES, 106 PCI_BRIDGE_RESOURCES,
107 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES + 107 PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES +
108 PCI_BRIDGE_RESOURCE_NUM - 1, 108 PCI_BRIDGE_RESOURCE_NUM - 1,
109 109
110 /* total resources associated with a PCI device */ 110 /* total resources associated with a PCI device */
111 PCI_NUM_RESOURCES, 111 PCI_NUM_RESOURCES,
112 112
113 /* preserve this for compatibility */ 113 /* preserve this for compatibility */
114 DEVICE_COUNT_RESOURCE 114 DEVICE_COUNT_RESOURCE
115 }; 115 };
116 116
117 typedef int __bitwise pci_power_t; 117 typedef int __bitwise pci_power_t;
118 118
119 #define PCI_D0 ((pci_power_t __force) 0) 119 #define PCI_D0 ((pci_power_t __force) 0)
120 #define PCI_D1 ((pci_power_t __force) 1) 120 #define PCI_D1 ((pci_power_t __force) 1)
121 #define PCI_D2 ((pci_power_t __force) 2) 121 #define PCI_D2 ((pci_power_t __force) 2)
122 #define PCI_D3hot ((pci_power_t __force) 3) 122 #define PCI_D3hot ((pci_power_t __force) 3)
123 #define PCI_D3cold ((pci_power_t __force) 4) 123 #define PCI_D3cold ((pci_power_t __force) 4)
124 #define PCI_UNKNOWN ((pci_power_t __force) 5) 124 #define PCI_UNKNOWN ((pci_power_t __force) 5)
125 #define PCI_POWER_ERROR ((pci_power_t __force) -1) 125 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
126 126
127 /* Remember to update this when the list above changes! */ 127 /* Remember to update this when the list above changes! */
128 extern const char *pci_power_names[]; 128 extern const char *pci_power_names[];
129 129
130 static inline const char *pci_power_name(pci_power_t state) 130 static inline const char *pci_power_name(pci_power_t state)
131 { 131 {
132 return pci_power_names[1 + (int) state]; 132 return pci_power_names[1 + (int) state];
133 } 133 }
134 134
135 #define PCI_PM_D2_DELAY 200 135 #define PCI_PM_D2_DELAY 200
136 #define PCI_PM_D3_WAIT 10 136 #define PCI_PM_D3_WAIT 10
137 #define PCI_PM_BUS_WAIT 50 137 #define PCI_PM_BUS_WAIT 50
138 138
139 /** The pci_channel state describes connectivity between the CPU and 139 /** The pci_channel state describes connectivity between the CPU and
140 * the pci device. If some PCI bus between here and the pci device 140 * the pci device. If some PCI bus between here and the pci device
141 * has crashed or locked up, this info is reflected here. 141 * has crashed or locked up, this info is reflected here.
142 */ 142 */
143 typedef unsigned int __bitwise pci_channel_state_t; 143 typedef unsigned int __bitwise pci_channel_state_t;
144 144
145 enum pci_channel_state { 145 enum pci_channel_state {
146 /* I/O channel is in normal state */ 146 /* I/O channel is in normal state */
147 pci_channel_io_normal = (__force pci_channel_state_t) 1, 147 pci_channel_io_normal = (__force pci_channel_state_t) 1,
148 148
149 /* I/O to channel is blocked */ 149 /* I/O to channel is blocked */
150 pci_channel_io_frozen = (__force pci_channel_state_t) 2, 150 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
151 151
152 /* PCI card is dead */ 152 /* PCI card is dead */
153 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, 153 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
154 }; 154 };
155 155
156 typedef unsigned int __bitwise pcie_reset_state_t; 156 typedef unsigned int __bitwise pcie_reset_state_t;
157 157
158 enum pcie_reset_state { 158 enum pcie_reset_state {
159 /* Reset is NOT asserted (Use to deassert reset) */ 159 /* Reset is NOT asserted (Use to deassert reset) */
160 pcie_deassert_reset = (__force pcie_reset_state_t) 1, 160 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
161 161
162 /* Use #PERST to reset PCI-E device */ 162 /* Use #PERST to reset PCI-E device */
163 pcie_warm_reset = (__force pcie_reset_state_t) 2, 163 pcie_warm_reset = (__force pcie_reset_state_t) 2,
164 164
165 /* Use PCI-E Hot Reset to reset device */ 165 /* Use PCI-E Hot Reset to reset device */
166 pcie_hot_reset = (__force pcie_reset_state_t) 3 166 pcie_hot_reset = (__force pcie_reset_state_t) 3
167 }; 167 };
168 168
169 typedef unsigned short __bitwise pci_dev_flags_t; 169 typedef unsigned short __bitwise pci_dev_flags_t;
170 enum pci_dev_flags { 170 enum pci_dev_flags {
171 /* INTX_DISABLE in PCI_COMMAND register disables MSI 171 /* INTX_DISABLE in PCI_COMMAND register disables MSI
172 * generation too. 172 * generation too.
173 */ 173 */
174 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1, 174 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
175 /* Device configuration is irrevocably lost if disabled into D3 */ 175 /* Device configuration is irrevocably lost if disabled into D3 */
176 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2, 176 PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2,
177 /* Provide indication device is assigned by a Virtual Machine Manager */ 177 /* Provide indication device is assigned by a Virtual Machine Manager */
178 PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) 4, 178 PCI_DEV_FLAGS_ASSIGNED = (__force pci_dev_flags_t) 4,
179 }; 179 };
180 180
181 enum pci_irq_reroute_variant { 181 enum pci_irq_reroute_variant {
182 INTEL_IRQ_REROUTE_VARIANT = 1, 182 INTEL_IRQ_REROUTE_VARIANT = 1,
183 MAX_IRQ_REROUTE_VARIANTS = 3 183 MAX_IRQ_REROUTE_VARIANTS = 3
184 }; 184 };
185 185
186 typedef unsigned short __bitwise pci_bus_flags_t; 186 typedef unsigned short __bitwise pci_bus_flags_t;
187 enum pci_bus_flags { 187 enum pci_bus_flags {
188 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, 188 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
189 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, 189 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
190 }; 190 };
191 191
192 /* Based on the PCI Hotplug Spec, but some values are made up by us */ 192 /* Based on the PCI Hotplug Spec, but some values are made up by us */
193 enum pci_bus_speed { 193 enum pci_bus_speed {
194 PCI_SPEED_33MHz = 0x00, 194 PCI_SPEED_33MHz = 0x00,
195 PCI_SPEED_66MHz = 0x01, 195 PCI_SPEED_66MHz = 0x01,
196 PCI_SPEED_66MHz_PCIX = 0x02, 196 PCI_SPEED_66MHz_PCIX = 0x02,
197 PCI_SPEED_100MHz_PCIX = 0x03, 197 PCI_SPEED_100MHz_PCIX = 0x03,
198 PCI_SPEED_133MHz_PCIX = 0x04, 198 PCI_SPEED_133MHz_PCIX = 0x04,
199 PCI_SPEED_66MHz_PCIX_ECC = 0x05, 199 PCI_SPEED_66MHz_PCIX_ECC = 0x05,
200 PCI_SPEED_100MHz_PCIX_ECC = 0x06, 200 PCI_SPEED_100MHz_PCIX_ECC = 0x06,
201 PCI_SPEED_133MHz_PCIX_ECC = 0x07, 201 PCI_SPEED_133MHz_PCIX_ECC = 0x07,
202 PCI_SPEED_66MHz_PCIX_266 = 0x09, 202 PCI_SPEED_66MHz_PCIX_266 = 0x09,
203 PCI_SPEED_100MHz_PCIX_266 = 0x0a, 203 PCI_SPEED_100MHz_PCIX_266 = 0x0a,
204 PCI_SPEED_133MHz_PCIX_266 = 0x0b, 204 PCI_SPEED_133MHz_PCIX_266 = 0x0b,
205 AGP_UNKNOWN = 0x0c, 205 AGP_UNKNOWN = 0x0c,
206 AGP_1X = 0x0d, 206 AGP_1X = 0x0d,
207 AGP_2X = 0x0e, 207 AGP_2X = 0x0e,
208 AGP_4X = 0x0f, 208 AGP_4X = 0x0f,
209 AGP_8X = 0x10, 209 AGP_8X = 0x10,
210 PCI_SPEED_66MHz_PCIX_533 = 0x11, 210 PCI_SPEED_66MHz_PCIX_533 = 0x11,
211 PCI_SPEED_100MHz_PCIX_533 = 0x12, 211 PCI_SPEED_100MHz_PCIX_533 = 0x12,
212 PCI_SPEED_133MHz_PCIX_533 = 0x13, 212 PCI_SPEED_133MHz_PCIX_533 = 0x13,
213 PCIE_SPEED_2_5GT = 0x14, 213 PCIE_SPEED_2_5GT = 0x14,
214 PCIE_SPEED_5_0GT = 0x15, 214 PCIE_SPEED_5_0GT = 0x15,
215 PCIE_SPEED_8_0GT = 0x16, 215 PCIE_SPEED_8_0GT = 0x16,
216 PCI_SPEED_UNKNOWN = 0xff, 216 PCI_SPEED_UNKNOWN = 0xff,
217 }; 217 };
218 218
219 struct pci_cap_saved_data { 219 struct pci_cap_saved_data {
220 char cap_nr; 220 char cap_nr;
221 unsigned int size; 221 unsigned int size;
222 u32 data[0]; 222 u32 data[0];
223 }; 223 };
224 224
225 struct pci_cap_saved_state { 225 struct pci_cap_saved_state {
226 struct hlist_node next; 226 struct hlist_node next;
227 struct pci_cap_saved_data cap; 227 struct pci_cap_saved_data cap;
228 }; 228 };
229 229
230 struct pcie_link_state; 230 struct pcie_link_state;
231 struct pci_vpd; 231 struct pci_vpd;
232 struct pci_sriov; 232 struct pci_sriov;
233 struct pci_ats; 233 struct pci_ats;
234 234
235 /* 235 /*
236 * The pci_dev structure is used to describe PCI devices. 236 * The pci_dev structure is used to describe PCI devices.
237 */ 237 */
238 struct pci_dev { 238 struct pci_dev {
239 struct list_head bus_list; /* node in per-bus list */ 239 struct list_head bus_list; /* node in per-bus list */
240 struct pci_bus *bus; /* bus this device is on */ 240 struct pci_bus *bus; /* bus this device is on */
241 struct pci_bus *subordinate; /* bus this device bridges to */ 241 struct pci_bus *subordinate; /* bus this device bridges to */
242 242
243 void *sysdata; /* hook for sys-specific extension */ 243 void *sysdata; /* hook for sys-specific extension */
244 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ 244 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
245 struct pci_slot *slot; /* Physical slot this device is in */ 245 struct pci_slot *slot; /* Physical slot this device is in */
246 246
247 unsigned int devfn; /* encoded device & function index */ 247 unsigned int devfn; /* encoded device & function index */
248 unsigned short vendor; 248 unsigned short vendor;
249 unsigned short device; 249 unsigned short device;
250 unsigned short subsystem_vendor; 250 unsigned short subsystem_vendor;
251 unsigned short subsystem_device; 251 unsigned short subsystem_device;
252 unsigned int class; /* 3 bytes: (base,sub,prog-if) */ 252 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
253 u8 revision; /* PCI revision, low byte of class word */ 253 u8 revision; /* PCI revision, low byte of class word */
254 u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 254 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
255 u8 pcie_cap; /* PCI-E capability offset */ 255 u8 pcie_cap; /* PCI-E capability offset */
256 u8 pcie_type:4; /* PCI-E device/port type */ 256 u8 pcie_type:4; /* PCI-E device/port type */
257 u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */ 257 u8 pcie_mpss:3; /* PCI-E Max Payload Size Supported */
258 u8 rom_base_reg; /* which config register controls the ROM */ 258 u8 rom_base_reg; /* which config register controls the ROM */
259 u8 pin; /* which interrupt pin this device uses */ 259 u8 pin; /* which interrupt pin this device uses */
260 260
261 struct pci_driver *driver; /* which driver has allocated this device */ 261 struct pci_driver *driver; /* which driver has allocated this device */
262 u64 dma_mask; /* Mask of the bits of bus address this 262 u64 dma_mask; /* Mask of the bits of bus address this
263 device implements. Normally this is 263 device implements. Normally this is
264 0xffffffff. You only need to change 264 0xffffffff. You only need to change
265 this if your device has broken DMA 265 this if your device has broken DMA
266 or supports 64-bit transfers. */ 266 or supports 64-bit transfers. */
267 267
268 struct device_dma_parameters dma_parms; 268 struct device_dma_parameters dma_parms;
269 269
270 pci_power_t current_state; /* Current operating state. In ACPI-speak, 270 pci_power_t current_state; /* Current operating state. In ACPI-speak,
271 this is D0-D3, D0 being fully functional, 271 this is D0-D3, D0 being fully functional,
272 and D3 being off. */ 272 and D3 being off. */
273 int pm_cap; /* PM capability offset in the 273 int pm_cap; /* PM capability offset in the
274 configuration space */ 274 configuration space */
275 unsigned int pme_support:5; /* Bitmask of states from which PME# 275 unsigned int pme_support:5; /* Bitmask of states from which PME#
276 can be generated */ 276 can be generated */
277 unsigned int pme_interrupt:1; 277 unsigned int pme_interrupt:1;
278 unsigned int pme_poll:1; /* Poll device's PME status bit */ 278 unsigned int pme_poll:1; /* Poll device's PME status bit */
279 unsigned int d1_support:1; /* Low power state D1 is supported */ 279 unsigned int d1_support:1; /* Low power state D1 is supported */
280 unsigned int d2_support:1; /* Low power state D2 is supported */ 280 unsigned int d2_support:1; /* Low power state D2 is supported */
281 unsigned int no_d1d2:1; /* Only allow D0 and D3 */ 281 unsigned int no_d1d2:1; /* Only allow D0 and D3 */
282 unsigned int mmio_always_on:1; /* disallow turning off io/mem 282 unsigned int mmio_always_on:1; /* disallow turning off io/mem
283 decoding during bar sizing */ 283 decoding during bar sizing */
284 unsigned int wakeup_prepared:1; 284 unsigned int wakeup_prepared:1;
285 unsigned int d3_delay; /* D3->D0 transition time in ms */ 285 unsigned int d3_delay; /* D3->D0 transition time in ms */
286 286
287 #ifdef CONFIG_PCIEASPM 287 #ifdef CONFIG_PCIEASPM
288 struct pcie_link_state *link_state; /* ASPM link state. */ 288 struct pcie_link_state *link_state; /* ASPM link state. */
289 #endif 289 #endif
290 290
291 pci_channel_state_t error_state; /* current connectivity state */ 291 pci_channel_state_t error_state; /* current connectivity state */
292 struct device dev; /* Generic device interface */ 292 struct device dev; /* Generic device interface */
293 293
294 int cfg_size; /* Size of configuration space */ 294 int cfg_size; /* Size of configuration space */
295 295
296 /* 296 /*
297 * Instead of touching interrupt line and base address registers 297 * Instead of touching interrupt line and base address registers
298 * directly, use the values stored here. They might be different! 298 * directly, use the values stored here. They might be different!
299 */ 299 */
300 unsigned int irq; 300 unsigned int irq;
301 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ 301 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
302 resource_size_t fw_addr[DEVICE_COUNT_RESOURCE]; /* FW-assigned addr */ 302 resource_size_t fw_addr[DEVICE_COUNT_RESOURCE]; /* FW-assigned addr */
303 303
304 /* These fields are used by common fixups */ 304 /* These fields are used by common fixups */
305 unsigned int transparent:1; /* Transparent PCI bridge */ 305 unsigned int transparent:1; /* Transparent PCI bridge */
306 unsigned int multifunction:1;/* Part of multi-function device */ 306 unsigned int multifunction:1;/* Part of multi-function device */
307 /* keep track of device state */ 307 /* keep track of device state */
308 unsigned int is_added:1; 308 unsigned int is_added:1;
309 unsigned int is_busmaster:1; /* device is busmaster */ 309 unsigned int is_busmaster:1; /* device is busmaster */
310 unsigned int no_msi:1; /* device may not use msi */ 310 unsigned int no_msi:1; /* device may not use msi */
311 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */ 311 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
312 unsigned int broken_parity_status:1; /* Device generates false positive parity */ 312 unsigned int broken_parity_status:1; /* Device generates false positive parity */
313 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */ 313 unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
314 unsigned int msi_enabled:1; 314 unsigned int msi_enabled:1;
315 unsigned int msix_enabled:1; 315 unsigned int msix_enabled:1;
316 unsigned int ari_enabled:1; /* ARI forwarding */ 316 unsigned int ari_enabled:1; /* ARI forwarding */
317 unsigned int is_managed:1; 317 unsigned int is_managed:1;
318 unsigned int is_pcie:1; /* Obsolete. Will be removed. 318 unsigned int is_pcie:1; /* Obsolete. Will be removed.
319 Use pci_is_pcie() instead */ 319 Use pci_is_pcie() instead */
320 unsigned int needs_freset:1; /* Dev requires fundamental reset */ 320 unsigned int needs_freset:1; /* Dev requires fundamental reset */
321 unsigned int state_saved:1; 321 unsigned int state_saved:1;
322 unsigned int is_physfn:1; 322 unsigned int is_physfn:1;
323 unsigned int is_virtfn:1; 323 unsigned int is_virtfn:1;
324 unsigned int reset_fn:1; 324 unsigned int reset_fn:1;
325 unsigned int is_hotplug_bridge:1; 325 unsigned int is_hotplug_bridge:1;
326 unsigned int __aer_firmware_first_valid:1; 326 unsigned int __aer_firmware_first_valid:1;
327 unsigned int __aer_firmware_first:1; 327 unsigned int __aer_firmware_first:1;
328 pci_dev_flags_t dev_flags; 328 pci_dev_flags_t dev_flags;
329 atomic_t enable_cnt; /* pci_enable_device has been called */ 329 atomic_t enable_cnt; /* pci_enable_device has been called */
330 330
331 u32 saved_config_space[16]; /* config space saved at suspend time */ 331 u32 saved_config_space[16]; /* config space saved at suspend time */
332 struct hlist_head saved_cap_space; 332 struct hlist_head saved_cap_space;
333 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ 333 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
334 int rom_attr_enabled; /* has display of the rom attribute been enabled? */ 334 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
335 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */ 335 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
336 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */ 336 struct bin_attribute *res_attr_wc[DEVICE_COUNT_RESOURCE]; /* sysfs file for WC mapping of resources */
337 #ifdef CONFIG_PCI_MSI 337 #ifdef CONFIG_PCI_MSI
338 struct list_head msi_list; 338 struct list_head msi_list;
339 struct kset *msi_kset;
339 #endif 340 #endif
340 struct pci_vpd *vpd; 341 struct pci_vpd *vpd;
341 #ifdef CONFIG_PCI_ATS 342 #ifdef CONFIG_PCI_ATS
342 union { 343 union {
343 struct pci_sriov *sriov; /* SR-IOV capability related */ 344 struct pci_sriov *sriov; /* SR-IOV capability related */
344 struct pci_dev *physfn; /* the PF this VF is associated with */ 345 struct pci_dev *physfn; /* the PF this VF is associated with */
345 }; 346 };
346 struct pci_ats *ats; /* Address Translation Service */ 347 struct pci_ats *ats; /* Address Translation Service */
347 #endif 348 #endif
348 }; 349 };
349 350
350 static inline struct pci_dev *pci_physfn(struct pci_dev *dev) 351 static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
351 { 352 {
352 #ifdef CONFIG_PCI_IOV 353 #ifdef CONFIG_PCI_IOV
353 if (dev->is_virtfn) 354 if (dev->is_virtfn)
354 dev = dev->physfn; 355 dev = dev->physfn;
355 #endif 356 #endif
356 357
357 return dev; 358 return dev;
358 } 359 }
359 360
360 extern struct pci_dev *alloc_pci_dev(void); 361 extern struct pci_dev *alloc_pci_dev(void);
361 362
362 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) 363 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
363 #define to_pci_dev(n) container_of(n, struct pci_dev, dev) 364 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
364 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) 365 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
365 366
366 static inline int pci_channel_offline(struct pci_dev *pdev) 367 static inline int pci_channel_offline(struct pci_dev *pdev)
367 { 368 {
368 return (pdev->error_state != pci_channel_io_normal); 369 return (pdev->error_state != pci_channel_io_normal);
369 } 370 }
370 371
371 static inline struct pci_cap_saved_state *pci_find_saved_cap( 372 static inline struct pci_cap_saved_state *pci_find_saved_cap(
372 struct pci_dev *pci_dev, char cap) 373 struct pci_dev *pci_dev, char cap)
373 { 374 {
374 struct pci_cap_saved_state *tmp; 375 struct pci_cap_saved_state *tmp;
375 struct hlist_node *pos; 376 struct hlist_node *pos;
376 377
377 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) { 378 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
378 if (tmp->cap.cap_nr == cap) 379 if (tmp->cap.cap_nr == cap)
379 return tmp; 380 return tmp;
380 } 381 }
381 return NULL; 382 return NULL;
382 } 383 }
383 384
384 static inline void pci_add_saved_cap(struct pci_dev *pci_dev, 385 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
385 struct pci_cap_saved_state *new_cap) 386 struct pci_cap_saved_state *new_cap)
386 { 387 {
387 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space); 388 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
388 } 389 }
389 390
390 /* 391 /*
391 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond 392 * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
392 * to P2P or CardBus bridge windows) go in a table. Additional ones (for 393 * to P2P or CardBus bridge windows) go in a table. Additional ones (for
393 * buses below host bridges or subtractive decode bridges) go in the list. 394 * buses below host bridges or subtractive decode bridges) go in the list.
394 * Use pci_bus_for_each_resource() to iterate through all the resources. 395 * Use pci_bus_for_each_resource() to iterate through all the resources.
395 */ 396 */
396 397
397 /* 398 /*
398 * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly 399 * PCI_SUBTRACTIVE_DECODE means the bridge forwards the window implicitly
399 * and there's no way to program the bridge with the details of the window. 400 * and there's no way to program the bridge with the details of the window.
400 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive- 401 * This does not apply to ACPI _CRS windows, even with the _DEC subtractive-
401 * decode bit set, because they are explicit and can be programmed with _SRS. 402 * decode bit set, because they are explicit and can be programmed with _SRS.
402 */ 403 */
403 #define PCI_SUBTRACTIVE_DECODE 0x1 404 #define PCI_SUBTRACTIVE_DECODE 0x1
404 405
405 struct pci_bus_resource { 406 struct pci_bus_resource {
406 struct list_head list; 407 struct list_head list;
407 struct resource *res; 408 struct resource *res;
408 unsigned int flags; 409 unsigned int flags;
409 }; 410 };
410 411
411 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ 412 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
412 413
413 struct pci_bus { 414 struct pci_bus {
414 struct list_head node; /* node in list of buses */ 415 struct list_head node; /* node in list of buses */
415 struct pci_bus *parent; /* parent bus this bridge is on */ 416 struct pci_bus *parent; /* parent bus this bridge is on */
416 struct list_head children; /* list of child buses */ 417 struct list_head children; /* list of child buses */
417 struct list_head devices; /* list of devices on this bus */ 418 struct list_head devices; /* list of devices on this bus */
418 struct pci_dev *self; /* bridge device as seen by parent */ 419 struct pci_dev *self; /* bridge device as seen by parent */
419 struct list_head slots; /* list of slots on this bus */ 420 struct list_head slots; /* list of slots on this bus */
420 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM]; 421 struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
421 struct list_head resources; /* address space routed to this bus */ 422 struct list_head resources; /* address space routed to this bus */
422 423
423 struct pci_ops *ops; /* configuration access functions */ 424 struct pci_ops *ops; /* configuration access functions */
424 void *sysdata; /* hook for sys-specific extension */ 425 void *sysdata; /* hook for sys-specific extension */
425 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ 426 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
426 427
427 unsigned char number; /* bus number */ 428 unsigned char number; /* bus number */
428 unsigned char primary; /* number of primary bridge */ 429 unsigned char primary; /* number of primary bridge */
429 unsigned char secondary; /* number of secondary bridge */ 430 unsigned char secondary; /* number of secondary bridge */
430 unsigned char subordinate; /* max number of subordinate buses */ 431 unsigned char subordinate; /* max number of subordinate buses */
431 unsigned char max_bus_speed; /* enum pci_bus_speed */ 432 unsigned char max_bus_speed; /* enum pci_bus_speed */
432 unsigned char cur_bus_speed; /* enum pci_bus_speed */ 433 unsigned char cur_bus_speed; /* enum pci_bus_speed */
433 434
434 char name[48]; 435 char name[48];
435 436
436 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ 437 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
437 pci_bus_flags_t bus_flags; /* Inherited by child busses */ 438 pci_bus_flags_t bus_flags; /* Inherited by child busses */
438 struct device *bridge; 439 struct device *bridge;
439 struct device dev; 440 struct device dev;
440 struct bin_attribute *legacy_io; /* legacy I/O for this bus */ 441 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
441 struct bin_attribute *legacy_mem; /* legacy mem */ 442 struct bin_attribute *legacy_mem; /* legacy mem */
442 unsigned int is_added:1; 443 unsigned int is_added:1;
443 }; 444 };
444 445
445 #define pci_bus_b(n) list_entry(n, struct pci_bus, node) 446 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
446 #define to_pci_bus(n) container_of(n, struct pci_bus, dev) 447 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
447 448
448 /* 449 /*
449 * Returns true if the pci bus is root (behind host-pci bridge), 450 * Returns true if the pci bus is root (behind host-pci bridge),
450 * false otherwise 451 * false otherwise
451 */ 452 */
452 static inline bool pci_is_root_bus(struct pci_bus *pbus) 453 static inline bool pci_is_root_bus(struct pci_bus *pbus)
453 { 454 {
454 return !(pbus->parent); 455 return !(pbus->parent);
455 } 456 }
456 457
457 #ifdef CONFIG_PCI_MSI 458 #ifdef CONFIG_PCI_MSI
458 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) 459 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
459 { 460 {
460 return pci_dev->msi_enabled || pci_dev->msix_enabled; 461 return pci_dev->msi_enabled || pci_dev->msix_enabled;
461 } 462 }
462 #else 463 #else
463 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; } 464 static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev) { return false; }
464 #endif 465 #endif
465 466
466 /* 467 /*
467 * Error values that may be returned by PCI functions. 468 * Error values that may be returned by PCI functions.
468 */ 469 */
469 #define PCIBIOS_SUCCESSFUL 0x00 470 #define PCIBIOS_SUCCESSFUL 0x00
470 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 471 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
471 #define PCIBIOS_BAD_VENDOR_ID 0x83 472 #define PCIBIOS_BAD_VENDOR_ID 0x83
472 #define PCIBIOS_DEVICE_NOT_FOUND 0x86 473 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
473 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 474 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
474 #define PCIBIOS_SET_FAILED 0x88 475 #define PCIBIOS_SET_FAILED 0x88
475 #define PCIBIOS_BUFFER_TOO_SMALL 0x89 476 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
476 477
477 /* Low-level architecture-dependent routines */ 478 /* Low-level architecture-dependent routines */
478 479
479 struct pci_ops { 480 struct pci_ops {
480 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); 481 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
481 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); 482 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
482 }; 483 };
483 484
484 /* 485 /*
485 * ACPI needs to be able to access PCI config space before we've done a 486 * ACPI needs to be able to access PCI config space before we've done a
486 * PCI bus scan and created pci_bus structures. 487 * PCI bus scan and created pci_bus structures.
487 */ 488 */
488 extern int raw_pci_read(unsigned int domain, unsigned int bus, 489 extern int raw_pci_read(unsigned int domain, unsigned int bus,
489 unsigned int devfn, int reg, int len, u32 *val); 490 unsigned int devfn, int reg, int len, u32 *val);
490 extern int raw_pci_write(unsigned int domain, unsigned int bus, 491 extern int raw_pci_write(unsigned int domain, unsigned int bus,
491 unsigned int devfn, int reg, int len, u32 val); 492 unsigned int devfn, int reg, int len, u32 val);
492 493
493 struct pci_bus_region { 494 struct pci_bus_region {
494 resource_size_t start; 495 resource_size_t start;
495 resource_size_t end; 496 resource_size_t end;
496 }; 497 };
497 498
498 struct pci_dynids { 499 struct pci_dynids {
499 spinlock_t lock; /* protects list, index */ 500 spinlock_t lock; /* protects list, index */
500 struct list_head list; /* for IDs added at runtime */ 501 struct list_head list; /* for IDs added at runtime */
501 }; 502 };
502 503
503 /* ---------------------------------------------------------------- */ 504 /* ---------------------------------------------------------------- */
504 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides 505 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
505 * a set of callbacks in struct pci_error_handlers, then that device driver 506 * a set of callbacks in struct pci_error_handlers, then that device driver
506 * will be notified of PCI bus errors, and will be driven to recovery 507 * will be notified of PCI bus errors, and will be driven to recovery
507 * when an error occurs. 508 * when an error occurs.
508 */ 509 */
509 510
510 typedef unsigned int __bitwise pci_ers_result_t; 511 typedef unsigned int __bitwise pci_ers_result_t;
511 512
512 enum pci_ers_result { 513 enum pci_ers_result {
513 /* no result/none/not supported in device driver */ 514 /* no result/none/not supported in device driver */
514 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, 515 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
515 516
516 /* Device driver can recover without slot reset */ 517 /* Device driver can recover without slot reset */
517 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, 518 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
518 519
519 /* Device driver wants slot to be reset. */ 520 /* Device driver wants slot to be reset. */
520 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, 521 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
521 522
522 /* Device has completely failed, is unrecoverable */ 523 /* Device has completely failed, is unrecoverable */
523 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, 524 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
524 525
525 /* Device driver is fully recovered and operational */ 526 /* Device driver is fully recovered and operational */
526 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, 527 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
527 }; 528 };
528 529
529 /* PCI bus error event callbacks */ 530 /* PCI bus error event callbacks */
530 struct pci_error_handlers { 531 struct pci_error_handlers {
531 /* PCI bus error detected on this device */ 532 /* PCI bus error detected on this device */
532 pci_ers_result_t (*error_detected)(struct pci_dev *dev, 533 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
533 enum pci_channel_state error); 534 enum pci_channel_state error);
534 535
535 /* MMIO has been re-enabled, but not DMA */ 536 /* MMIO has been re-enabled, but not DMA */
536 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); 537 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
537 538
538 /* PCI Express link has been reset */ 539 /* PCI Express link has been reset */
539 pci_ers_result_t (*link_reset)(struct pci_dev *dev); 540 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
540 541
541 /* PCI slot has been reset */ 542 /* PCI slot has been reset */
542 pci_ers_result_t (*slot_reset)(struct pci_dev *dev); 543 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
543 544
544 /* Device driver may resume normal operations */ 545 /* Device driver may resume normal operations */
545 void (*resume)(struct pci_dev *dev); 546 void (*resume)(struct pci_dev *dev);
546 }; 547 };
547 548
548 /* ---------------------------------------------------------------- */ 549 /* ---------------------------------------------------------------- */
549 550
550 struct module; 551 struct module;
551 struct pci_driver { 552 struct pci_driver {
552 struct list_head node; 553 struct list_head node;
553 const char *name; 554 const char *name;
554 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ 555 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
555 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ 556 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
556 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ 557 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
557 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ 558 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
558 int (*suspend_late) (struct pci_dev *dev, pm_message_t state); 559 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
559 int (*resume_early) (struct pci_dev *dev); 560 int (*resume_early) (struct pci_dev *dev);
560 int (*resume) (struct pci_dev *dev); /* Device woken up */ 561 int (*resume) (struct pci_dev *dev); /* Device woken up */
561 void (*shutdown) (struct pci_dev *dev); 562 void (*shutdown) (struct pci_dev *dev);
562 struct pci_error_handlers *err_handler; 563 struct pci_error_handlers *err_handler;
563 struct device_driver driver; 564 struct device_driver driver;
564 struct pci_dynids dynids; 565 struct pci_dynids dynids;
565 }; 566 };
566 567
567 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) 568 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
568 569
569 /** 570 /**
570 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table 571 * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table
571 * @_table: device table name 572 * @_table: device table name
572 * 573 *
573 * This macro is used to create a struct pci_device_id array (a device table) 574 * This macro is used to create a struct pci_device_id array (a device table)
574 * in a generic manner. 575 * in a generic manner.
575 */ 576 */
576 #define DEFINE_PCI_DEVICE_TABLE(_table) \ 577 #define DEFINE_PCI_DEVICE_TABLE(_table) \
577 const struct pci_device_id _table[] __devinitconst 578 const struct pci_device_id _table[] __devinitconst
578 579
579 /** 580 /**
580 * PCI_DEVICE - macro used to describe a specific pci device 581 * PCI_DEVICE - macro used to describe a specific pci device
581 * @vend: the 16 bit PCI Vendor ID 582 * @vend: the 16 bit PCI Vendor ID
582 * @dev: the 16 bit PCI Device ID 583 * @dev: the 16 bit PCI Device ID
583 * 584 *
584 * This macro is used to create a struct pci_device_id that matches a 585 * This macro is used to create a struct pci_device_id that matches a
585 * specific device. The subvendor and subdevice fields will be set to 586 * specific device. The subvendor and subdevice fields will be set to
586 * PCI_ANY_ID. 587 * PCI_ANY_ID.
587 */ 588 */
588 #define PCI_DEVICE(vend,dev) \ 589 #define PCI_DEVICE(vend,dev) \
589 .vendor = (vend), .device = (dev), \ 590 .vendor = (vend), .device = (dev), \
590 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 591 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
591 592
592 /** 593 /**
593 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class 594 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
594 * @dev_class: the class, subclass, prog-if triple for this device 595 * @dev_class: the class, subclass, prog-if triple for this device
595 * @dev_class_mask: the class mask for this device 596 * @dev_class_mask: the class mask for this device
596 * 597 *
597 * This macro is used to create a struct pci_device_id that matches a 598 * This macro is used to create a struct pci_device_id that matches a
598 * specific PCI class. The vendor, device, subvendor, and subdevice 599 * specific PCI class. The vendor, device, subvendor, and subdevice
599 * fields will be set to PCI_ANY_ID. 600 * fields will be set to PCI_ANY_ID.
600 */ 601 */
601 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ 602 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
602 .class = (dev_class), .class_mask = (dev_class_mask), \ 603 .class = (dev_class), .class_mask = (dev_class_mask), \
603 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ 604 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
604 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID 605 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
605 606
606 /** 607 /**
607 * PCI_VDEVICE - macro used to describe a specific pci device in short form 608 * PCI_VDEVICE - macro used to describe a specific pci device in short form
608 * @vendor: the vendor name 609 * @vendor: the vendor name
609 * @device: the 16 bit PCI Device ID 610 * @device: the 16 bit PCI Device ID
610 * 611 *
611 * This macro is used to create a struct pci_device_id that matches a 612 * This macro is used to create a struct pci_device_id that matches a
612 * specific PCI device. The subvendor, and subdevice fields will be set 613 * specific PCI device. The subvendor, and subdevice fields will be set
613 * to PCI_ANY_ID. The macro allows the next field to follow as the device 614 * to PCI_ANY_ID. The macro allows the next field to follow as the device
614 * private data. 615 * private data.
615 */ 616 */
616 617
617 #define PCI_VDEVICE(vendor, device) \ 618 #define PCI_VDEVICE(vendor, device) \
618 PCI_VENDOR_ID_##vendor, (device), \ 619 PCI_VENDOR_ID_##vendor, (device), \
619 PCI_ANY_ID, PCI_ANY_ID, 0, 0 620 PCI_ANY_ID, PCI_ANY_ID, 0, 0
620 621
621 /* these external functions are only available when PCI support is enabled */ 622 /* these external functions are only available when PCI support is enabled */
622 #ifdef CONFIG_PCI 623 #ifdef CONFIG_PCI
623 624
624 extern void pcie_bus_configure_settings(struct pci_bus *bus, u8 smpss); 625 extern void pcie_bus_configure_settings(struct pci_bus *bus, u8 smpss);
625 626
626 enum pcie_bus_config_types { 627 enum pcie_bus_config_types {
627 PCIE_BUS_TUNE_OFF, 628 PCIE_BUS_TUNE_OFF,
628 PCIE_BUS_SAFE, 629 PCIE_BUS_SAFE,
629 PCIE_BUS_PERFORMANCE, 630 PCIE_BUS_PERFORMANCE,
630 PCIE_BUS_PEER2PEER, 631 PCIE_BUS_PEER2PEER,
631 }; 632 };
632 633
633 extern enum pcie_bus_config_types pcie_bus_config; 634 extern enum pcie_bus_config_types pcie_bus_config;
634 635
635 extern struct bus_type pci_bus_type; 636 extern struct bus_type pci_bus_type;
636 637
637 /* Do NOT directly access these two variables, unless you are arch specific pci 638 /* Do NOT directly access these two variables, unless you are arch specific pci
638 * code, or pci core code. */ 639 * code, or pci core code. */
639 extern struct list_head pci_root_buses; /* list of all known PCI buses */ 640 extern struct list_head pci_root_buses; /* list of all known PCI buses */
640 /* Some device drivers need know if pci is initiated */ 641 /* Some device drivers need know if pci is initiated */
641 extern int no_pci_devices(void); 642 extern int no_pci_devices(void);
642 643
643 void pcibios_fixup_bus(struct pci_bus *); 644 void pcibios_fixup_bus(struct pci_bus *);
644 int __must_check pcibios_enable_device(struct pci_dev *, int mask); 645 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
645 char *pcibios_setup(char *str); 646 char *pcibios_setup(char *str);
646 647
647 /* Used only when drivers/pci/setup.c is used */ 648 /* Used only when drivers/pci/setup.c is used */
648 resource_size_t pcibios_align_resource(void *, const struct resource *, 649 resource_size_t pcibios_align_resource(void *, const struct resource *,
649 resource_size_t, 650 resource_size_t,
650 resource_size_t); 651 resource_size_t);
651 void pcibios_update_irq(struct pci_dev *, int irq); 652 void pcibios_update_irq(struct pci_dev *, int irq);
652 653
653 /* Weak but can be overriden by arch */ 654 /* Weak but can be overriden by arch */
654 void pci_fixup_cardbus(struct pci_bus *); 655 void pci_fixup_cardbus(struct pci_bus *);
655 656
656 /* Generic PCI functions used internally */ 657 /* Generic PCI functions used internally */
657 658
658 void pcibios_scan_specific_bus(int busn); 659 void pcibios_scan_specific_bus(int busn);
659 extern struct pci_bus *pci_find_bus(int domain, int busnr); 660 extern struct pci_bus *pci_find_bus(int domain, int busnr);
660 void pci_bus_add_devices(const struct pci_bus *bus); 661 void pci_bus_add_devices(const struct pci_bus *bus);
661 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, 662 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
662 struct pci_ops *ops, void *sysdata); 663 struct pci_ops *ops, void *sysdata);
663 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops, 664 static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
664 void *sysdata) 665 void *sysdata)
665 { 666 {
666 struct pci_bus *root_bus; 667 struct pci_bus *root_bus;
667 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata); 668 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
668 if (root_bus) 669 if (root_bus)
669 pci_bus_add_devices(root_bus); 670 pci_bus_add_devices(root_bus);
670 return root_bus; 671 return root_bus;
671 } 672 }
672 struct pci_bus *pci_create_bus(struct device *parent, int bus, 673 struct pci_bus *pci_create_bus(struct device *parent, int bus,
673 struct pci_ops *ops, void *sysdata); 674 struct pci_ops *ops, void *sysdata);
674 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, 675 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
675 int busnr); 676 int busnr);
676 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); 677 void pcie_update_link_speed(struct pci_bus *bus, u16 link_status);
677 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, 678 struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr,
678 const char *name, 679 const char *name,
679 struct hotplug_slot *hotplug); 680 struct hotplug_slot *hotplug);
680 void pci_destroy_slot(struct pci_slot *slot); 681 void pci_destroy_slot(struct pci_slot *slot);
681 void pci_renumber_slot(struct pci_slot *slot, int slot_nr); 682 void pci_renumber_slot(struct pci_slot *slot, int slot_nr);
682 int pci_scan_slot(struct pci_bus *bus, int devfn); 683 int pci_scan_slot(struct pci_bus *bus, int devfn);
683 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); 684 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
684 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); 685 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
685 unsigned int pci_scan_child_bus(struct pci_bus *bus); 686 unsigned int pci_scan_child_bus(struct pci_bus *bus);
686 int __must_check pci_bus_add_device(struct pci_dev *dev); 687 int __must_check pci_bus_add_device(struct pci_dev *dev);
687 void pci_read_bridge_bases(struct pci_bus *child); 688 void pci_read_bridge_bases(struct pci_bus *child);
688 struct resource *pci_find_parent_resource(const struct pci_dev *dev, 689 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
689 struct resource *res); 690 struct resource *res);
690 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin); 691 u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin);
691 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); 692 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
692 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp); 693 u8 pci_common_swizzle(struct pci_dev *dev, u8 *pinp);
693 extern struct pci_dev *pci_dev_get(struct pci_dev *dev); 694 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
694 extern void pci_dev_put(struct pci_dev *dev); 695 extern void pci_dev_put(struct pci_dev *dev);
695 extern void pci_remove_bus(struct pci_bus *b); 696 extern void pci_remove_bus(struct pci_bus *b);
696 extern void pci_remove_bus_device(struct pci_dev *dev); 697 extern void pci_remove_bus_device(struct pci_dev *dev);
697 extern void pci_stop_bus_device(struct pci_dev *dev); 698 extern void pci_stop_bus_device(struct pci_dev *dev);
698 void pci_setup_cardbus(struct pci_bus *bus); 699 void pci_setup_cardbus(struct pci_bus *bus);
699 extern void pci_sort_breadthfirst(void); 700 extern void pci_sort_breadthfirst(void);
700 #define dev_is_pci(d) ((d)->bus == &pci_bus_type) 701 #define dev_is_pci(d) ((d)->bus == &pci_bus_type)
701 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false)) 702 #define dev_is_pf(d) ((dev_is_pci(d) ? to_pci_dev(d)->is_physfn : false))
702 #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0)) 703 #define dev_num_vf(d) ((dev_is_pci(d) ? pci_num_vf(to_pci_dev(d)) : 0))
703 704
704 /* Generic PCI functions exported to card drivers */ 705 /* Generic PCI functions exported to card drivers */
705 706
706 enum pci_lost_interrupt_reason { 707 enum pci_lost_interrupt_reason {
707 PCI_LOST_IRQ_NO_INFORMATION = 0, 708 PCI_LOST_IRQ_NO_INFORMATION = 0,
708 PCI_LOST_IRQ_DISABLE_MSI, 709 PCI_LOST_IRQ_DISABLE_MSI,
709 PCI_LOST_IRQ_DISABLE_MSIX, 710 PCI_LOST_IRQ_DISABLE_MSIX,
710 PCI_LOST_IRQ_DISABLE_ACPI, 711 PCI_LOST_IRQ_DISABLE_ACPI,
711 }; 712 };
712 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev); 713 enum pci_lost_interrupt_reason pci_lost_interrupt(struct pci_dev *dev);
713 int pci_find_capability(struct pci_dev *dev, int cap); 714 int pci_find_capability(struct pci_dev *dev, int cap);
714 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); 715 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
715 int pci_find_ext_capability(struct pci_dev *dev, int cap); 716 int pci_find_ext_capability(struct pci_dev *dev, int cap);
716 int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn, 717 int pci_bus_find_ext_capability(struct pci_bus *bus, unsigned int devfn,
717 int cap); 718 int cap);
718 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); 719 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
719 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); 720 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
720 struct pci_bus *pci_find_next_bus(const struct pci_bus *from); 721 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
721 722
722 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, 723 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
723 struct pci_dev *from); 724 struct pci_dev *from);
724 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, 725 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
725 unsigned int ss_vendor, unsigned int ss_device, 726 unsigned int ss_vendor, unsigned int ss_device,
726 struct pci_dev *from); 727 struct pci_dev *from);
727 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); 728 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
728 struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus, 729 struct pci_dev *pci_get_domain_bus_and_slot(int domain, unsigned int bus,
729 unsigned int devfn); 730 unsigned int devfn);
730 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, 731 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
731 unsigned int devfn) 732 unsigned int devfn)
732 { 733 {
733 return pci_get_domain_bus_and_slot(0, bus, devfn); 734 return pci_get_domain_bus_and_slot(0, bus, devfn);
734 } 735 }
735 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); 736 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
736 int pci_dev_present(const struct pci_device_id *ids); 737 int pci_dev_present(const struct pci_device_id *ids);
737 738
738 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, 739 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
739 int where, u8 *val); 740 int where, u8 *val);
740 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, 741 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
741 int where, u16 *val); 742 int where, u16 *val);
742 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn, 743 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
743 int where, u32 *val); 744 int where, u32 *val);
744 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn, 745 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
745 int where, u8 val); 746 int where, u8 val);
746 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn, 747 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
747 int where, u16 val); 748 int where, u16 val);
748 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, 749 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
749 int where, u32 val); 750 int where, u32 val);
750 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops); 751 struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
751 752
752 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val) 753 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
753 { 754 {
754 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val); 755 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
755 } 756 }
756 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val) 757 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
757 { 758 {
758 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val); 759 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
759 } 760 }
760 static inline int pci_read_config_dword(struct pci_dev *dev, int where, 761 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
761 u32 *val) 762 u32 *val)
762 { 763 {
763 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val); 764 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
764 } 765 }
765 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val) 766 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
766 { 767 {
767 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val); 768 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
768 } 769 }
769 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val) 770 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
770 { 771 {
771 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val); 772 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
772 } 773 }
773 static inline int pci_write_config_dword(struct pci_dev *dev, int where, 774 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
774 u32 val) 775 u32 val)
775 { 776 {
776 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); 777 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
777 } 778 }
778 779
779 int __must_check pci_enable_device(struct pci_dev *dev); 780 int __must_check pci_enable_device(struct pci_dev *dev);
780 int __must_check pci_enable_device_io(struct pci_dev *dev); 781 int __must_check pci_enable_device_io(struct pci_dev *dev);
781 int __must_check pci_enable_device_mem(struct pci_dev *dev); 782 int __must_check pci_enable_device_mem(struct pci_dev *dev);
782 int __must_check pci_reenable_device(struct pci_dev *); 783 int __must_check pci_reenable_device(struct pci_dev *);
783 int __must_check pcim_enable_device(struct pci_dev *pdev); 784 int __must_check pcim_enable_device(struct pci_dev *pdev);
784 void pcim_pin_device(struct pci_dev *pdev); 785 void pcim_pin_device(struct pci_dev *pdev);
785 786
786 static inline int pci_is_enabled(struct pci_dev *pdev) 787 static inline int pci_is_enabled(struct pci_dev *pdev)
787 { 788 {
788 return (atomic_read(&pdev->enable_cnt) > 0); 789 return (atomic_read(&pdev->enable_cnt) > 0);
789 } 790 }
790 791
791 static inline int pci_is_managed(struct pci_dev *pdev) 792 static inline int pci_is_managed(struct pci_dev *pdev)
792 { 793 {
793 return pdev->is_managed; 794 return pdev->is_managed;
794 } 795 }
795 796
796 void pci_disable_device(struct pci_dev *dev); 797 void pci_disable_device(struct pci_dev *dev);
797 void pci_set_master(struct pci_dev *dev); 798 void pci_set_master(struct pci_dev *dev);
798 void pci_clear_master(struct pci_dev *dev); 799 void pci_clear_master(struct pci_dev *dev);
799 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); 800 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
800 int pci_set_cacheline_size(struct pci_dev *dev); 801 int pci_set_cacheline_size(struct pci_dev *dev);
801 #define HAVE_PCI_SET_MWI 802 #define HAVE_PCI_SET_MWI
802 int __must_check pci_set_mwi(struct pci_dev *dev); 803 int __must_check pci_set_mwi(struct pci_dev *dev);
803 int pci_try_set_mwi(struct pci_dev *dev); 804 int pci_try_set_mwi(struct pci_dev *dev);
804 void pci_clear_mwi(struct pci_dev *dev); 805 void pci_clear_mwi(struct pci_dev *dev);
805 void pci_intx(struct pci_dev *dev, int enable); 806 void pci_intx(struct pci_dev *dev, int enable);
806 void pci_msi_off(struct pci_dev *dev); 807 void pci_msi_off(struct pci_dev *dev);
807 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size); 808 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
808 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask); 809 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
809 int pcix_get_max_mmrbc(struct pci_dev *dev); 810 int pcix_get_max_mmrbc(struct pci_dev *dev);
810 int pcix_get_mmrbc(struct pci_dev *dev); 811 int pcix_get_mmrbc(struct pci_dev *dev);
811 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); 812 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
812 int pcie_get_readrq(struct pci_dev *dev); 813 int pcie_get_readrq(struct pci_dev *dev);
813 int pcie_set_readrq(struct pci_dev *dev, int rq); 814 int pcie_set_readrq(struct pci_dev *dev, int rq);
814 int pcie_get_mps(struct pci_dev *dev); 815 int pcie_get_mps(struct pci_dev *dev);
815 int pcie_set_mps(struct pci_dev *dev, int mps); 816 int pcie_set_mps(struct pci_dev *dev, int mps);
816 int __pci_reset_function(struct pci_dev *dev); 817 int __pci_reset_function(struct pci_dev *dev);
817 int pci_reset_function(struct pci_dev *dev); 818 int pci_reset_function(struct pci_dev *dev);
818 void pci_update_resource(struct pci_dev *dev, int resno); 819 void pci_update_resource(struct pci_dev *dev, int resno);
819 int __must_check pci_assign_resource(struct pci_dev *dev, int i); 820 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
820 int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align); 821 int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resource_size_t add_size, resource_size_t align);
821 int pci_select_bars(struct pci_dev *dev, unsigned long flags); 822 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
822 823
823 /* ROM control related routines */ 824 /* ROM control related routines */
824 int pci_enable_rom(struct pci_dev *pdev); 825 int pci_enable_rom(struct pci_dev *pdev);
825 void pci_disable_rom(struct pci_dev *pdev); 826 void pci_disable_rom(struct pci_dev *pdev);
826 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); 827 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
827 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); 828 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
828 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size); 829 size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
829 830
830 /* Power management related routines */ 831 /* Power management related routines */
831 int pci_save_state(struct pci_dev *dev); 832 int pci_save_state(struct pci_dev *dev);
832 void pci_restore_state(struct pci_dev *dev); 833 void pci_restore_state(struct pci_dev *dev);
833 struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev); 834 struct pci_saved_state *pci_store_saved_state(struct pci_dev *dev);
834 int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state); 835 int pci_load_saved_state(struct pci_dev *dev, struct pci_saved_state *state);
835 int pci_load_and_free_saved_state(struct pci_dev *dev, 836 int pci_load_and_free_saved_state(struct pci_dev *dev,
836 struct pci_saved_state **state); 837 struct pci_saved_state **state);
837 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state); 838 int __pci_complete_power_transition(struct pci_dev *dev, pci_power_t state);
838 int pci_set_power_state(struct pci_dev *dev, pci_power_t state); 839 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
839 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); 840 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
840 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state); 841 bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
841 void pci_pme_active(struct pci_dev *dev, bool enable); 842 void pci_pme_active(struct pci_dev *dev, bool enable);
842 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state, 843 int __pci_enable_wake(struct pci_dev *dev, pci_power_t state,
843 bool runtime, bool enable); 844 bool runtime, bool enable);
844 int pci_wake_from_d3(struct pci_dev *dev, bool enable); 845 int pci_wake_from_d3(struct pci_dev *dev, bool enable);
845 pci_power_t pci_target_state(struct pci_dev *dev); 846 pci_power_t pci_target_state(struct pci_dev *dev);
846 int pci_prepare_to_sleep(struct pci_dev *dev); 847 int pci_prepare_to_sleep(struct pci_dev *dev);
847 int pci_back_from_sleep(struct pci_dev *dev); 848 int pci_back_from_sleep(struct pci_dev *dev);
848 bool pci_dev_run_wake(struct pci_dev *dev); 849 bool pci_dev_run_wake(struct pci_dev *dev);
849 bool pci_check_pme_status(struct pci_dev *dev); 850 bool pci_check_pme_status(struct pci_dev *dev);
850 void pci_pme_wakeup_bus(struct pci_bus *bus); 851 void pci_pme_wakeup_bus(struct pci_bus *bus);
851 852
852 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, 853 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
853 bool enable) 854 bool enable)
854 { 855 {
855 return __pci_enable_wake(dev, state, false, enable); 856 return __pci_enable_wake(dev, state, false, enable);
856 } 857 }
857 858
858 #define PCI_EXP_IDO_REQUEST (1<<0) 859 #define PCI_EXP_IDO_REQUEST (1<<0)
859 #define PCI_EXP_IDO_COMPLETION (1<<1) 860 #define PCI_EXP_IDO_COMPLETION (1<<1)
860 void pci_enable_ido(struct pci_dev *dev, unsigned long type); 861 void pci_enable_ido(struct pci_dev *dev, unsigned long type);
861 void pci_disable_ido(struct pci_dev *dev, unsigned long type); 862 void pci_disable_ido(struct pci_dev *dev, unsigned long type);
862 863
863 enum pci_obff_signal_type { 864 enum pci_obff_signal_type {
864 PCI_EXP_OBFF_SIGNAL_L0 = 0, 865 PCI_EXP_OBFF_SIGNAL_L0 = 0,
865 PCI_EXP_OBFF_SIGNAL_ALWAYS = 1, 866 PCI_EXP_OBFF_SIGNAL_ALWAYS = 1,
866 }; 867 };
867 int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type); 868 int pci_enable_obff(struct pci_dev *dev, enum pci_obff_signal_type);
868 void pci_disable_obff(struct pci_dev *dev); 869 void pci_disable_obff(struct pci_dev *dev);
869 870
870 bool pci_ltr_supported(struct pci_dev *dev); 871 bool pci_ltr_supported(struct pci_dev *dev);
871 int pci_enable_ltr(struct pci_dev *dev); 872 int pci_enable_ltr(struct pci_dev *dev);
872 void pci_disable_ltr(struct pci_dev *dev); 873 void pci_disable_ltr(struct pci_dev *dev);
873 int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns); 874 int pci_set_ltr(struct pci_dev *dev, int snoop_lat_ns, int nosnoop_lat_ns);
874 875
875 /* For use by arch with custom probe code */ 876 /* For use by arch with custom probe code */
876 void set_pcie_port_type(struct pci_dev *pdev); 877 void set_pcie_port_type(struct pci_dev *pdev);
877 void set_pcie_hotplug_bridge(struct pci_dev *pdev); 878 void set_pcie_hotplug_bridge(struct pci_dev *pdev);
878 879
879 /* Functions for PCI Hotplug drivers to use */ 880 /* Functions for PCI Hotplug drivers to use */
880 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap); 881 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
881 #ifdef CONFIG_HOTPLUG 882 #ifdef CONFIG_HOTPLUG
882 unsigned int pci_rescan_bus(struct pci_bus *bus); 883 unsigned int pci_rescan_bus(struct pci_bus *bus);
883 #endif 884 #endif
884 885
885 /* Vital product data routines */ 886 /* Vital product data routines */
886 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf); 887 ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
887 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf); 888 ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
888 int pci_vpd_truncate(struct pci_dev *dev, size_t size); 889 int pci_vpd_truncate(struct pci_dev *dev, size_t size);
889 890
890 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ 891 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
891 void pci_bus_assign_resources(const struct pci_bus *bus); 892 void pci_bus_assign_resources(const struct pci_bus *bus);
892 void pci_bus_size_bridges(struct pci_bus *bus); 893 void pci_bus_size_bridges(struct pci_bus *bus);
893 int pci_claim_resource(struct pci_dev *, int); 894 int pci_claim_resource(struct pci_dev *, int);
894 void pci_assign_unassigned_resources(void); 895 void pci_assign_unassigned_resources(void);
895 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge); 896 void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge);
896 void pdev_enable_device(struct pci_dev *); 897 void pdev_enable_device(struct pci_dev *);
897 void pdev_sort_resources(struct pci_dev *, struct resource_list *); 898 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
898 int pci_enable_resources(struct pci_dev *, int mask); 899 int pci_enable_resources(struct pci_dev *, int mask);
899 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), 900 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
900 int (*)(const struct pci_dev *, u8, u8)); 901 int (*)(const struct pci_dev *, u8, u8));
901 #define HAVE_PCI_REQ_REGIONS 2 902 #define HAVE_PCI_REQ_REGIONS 2
902 int __must_check pci_request_regions(struct pci_dev *, const char *); 903 int __must_check pci_request_regions(struct pci_dev *, const char *);
903 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *); 904 int __must_check pci_request_regions_exclusive(struct pci_dev *, const char *);
904 void pci_release_regions(struct pci_dev *); 905 void pci_release_regions(struct pci_dev *);
905 int __must_check pci_request_region(struct pci_dev *, int, const char *); 906 int __must_check pci_request_region(struct pci_dev *, int, const char *);
906 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *); 907 int __must_check pci_request_region_exclusive(struct pci_dev *, int, const char *);
907 void pci_release_region(struct pci_dev *, int); 908 void pci_release_region(struct pci_dev *, int);
908 int pci_request_selected_regions(struct pci_dev *, int, const char *); 909 int pci_request_selected_regions(struct pci_dev *, int, const char *);
909 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *); 910 int pci_request_selected_regions_exclusive(struct pci_dev *, int, const char *);
910 void pci_release_selected_regions(struct pci_dev *, int); 911 void pci_release_selected_regions(struct pci_dev *, int);
911 912
912 /* drivers/pci/bus.c */ 913 /* drivers/pci/bus.c */
913 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags); 914 void pci_bus_add_resource(struct pci_bus *bus, struct resource *res, unsigned int flags);
914 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n); 915 struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n);
915 void pci_bus_remove_resources(struct pci_bus *bus); 916 void pci_bus_remove_resources(struct pci_bus *bus);
916 917
917 #define pci_bus_for_each_resource(bus, res, i) \ 918 #define pci_bus_for_each_resource(bus, res, i) \
918 for (i = 0; \ 919 for (i = 0; \
919 (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \ 920 (res = pci_bus_resource_n(bus, i)) || i < PCI_BRIDGE_RESOURCE_NUM; \
920 i++) 921 i++)
921 922
922 int __must_check pci_bus_alloc_resource(struct pci_bus *bus, 923 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
923 struct resource *res, resource_size_t size, 924 struct resource *res, resource_size_t size,
924 resource_size_t align, resource_size_t min, 925 resource_size_t align, resource_size_t min,
925 unsigned int type_mask, 926 unsigned int type_mask,
926 resource_size_t (*alignf)(void *, 927 resource_size_t (*alignf)(void *,
927 const struct resource *, 928 const struct resource *,
928 resource_size_t, 929 resource_size_t,
929 resource_size_t), 930 resource_size_t),
930 void *alignf_data); 931 void *alignf_data);
931 void pci_enable_bridges(struct pci_bus *bus); 932 void pci_enable_bridges(struct pci_bus *bus);
932 933
933 /* Proper probing supporting hot-pluggable devices */ 934 /* Proper probing supporting hot-pluggable devices */
934 int __must_check __pci_register_driver(struct pci_driver *, struct module *, 935 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
935 const char *mod_name); 936 const char *mod_name);
936 937
937 /* 938 /*
938 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded 939 * pci_register_driver must be a macro so that KBUILD_MODNAME can be expanded
939 */ 940 */
940 #define pci_register_driver(driver) \ 941 #define pci_register_driver(driver) \
941 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME) 942 __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME)
942 943
943 void pci_unregister_driver(struct pci_driver *dev); 944 void pci_unregister_driver(struct pci_driver *dev);
944 void pci_remove_behind_bridge(struct pci_dev *dev); 945 void pci_remove_behind_bridge(struct pci_dev *dev);
945 struct pci_driver *pci_dev_driver(const struct pci_dev *dev); 946 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
946 int pci_add_dynid(struct pci_driver *drv, 947 int pci_add_dynid(struct pci_driver *drv,
947 unsigned int vendor, unsigned int device, 948 unsigned int vendor, unsigned int device,
948 unsigned int subvendor, unsigned int subdevice, 949 unsigned int subvendor, unsigned int subdevice,
949 unsigned int class, unsigned int class_mask, 950 unsigned int class, unsigned int class_mask,
950 unsigned long driver_data); 951 unsigned long driver_data);
951 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, 952 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
952 struct pci_dev *dev); 953 struct pci_dev *dev);
953 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, 954 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
954 int pass); 955 int pass);
955 956
956 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), 957 void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
957 void *userdata); 958 void *userdata);
958 int pci_cfg_space_size_ext(struct pci_dev *dev); 959 int pci_cfg_space_size_ext(struct pci_dev *dev);
959 int pci_cfg_space_size(struct pci_dev *dev); 960 int pci_cfg_space_size(struct pci_dev *dev);
960 unsigned char pci_bus_max_busnr(struct pci_bus *bus); 961 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
961 void pci_setup_bridge(struct pci_bus *bus); 962 void pci_setup_bridge(struct pci_bus *bus);
962 963
963 #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0) 964 #define PCI_VGA_STATE_CHANGE_BRIDGE (1 << 0)
964 #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1) 965 #define PCI_VGA_STATE_CHANGE_DECODES (1 << 1)
965 966
966 int pci_set_vga_state(struct pci_dev *pdev, bool decode, 967 int pci_set_vga_state(struct pci_dev *pdev, bool decode,
967 unsigned int command_bits, u32 flags); 968 unsigned int command_bits, u32 flags);
968 /* kmem_cache style wrapper around pci_alloc_consistent() */ 969 /* kmem_cache style wrapper around pci_alloc_consistent() */
969 970
970 #include <linux/pci-dma.h> 971 #include <linux/pci-dma.h>
971 #include <linux/dmapool.h> 972 #include <linux/dmapool.h>
972 973
973 #define pci_pool dma_pool 974 #define pci_pool dma_pool
974 #define pci_pool_create(name, pdev, size, align, allocation) \ 975 #define pci_pool_create(name, pdev, size, align, allocation) \
975 dma_pool_create(name, &pdev->dev, size, align, allocation) 976 dma_pool_create(name, &pdev->dev, size, align, allocation)
976 #define pci_pool_destroy(pool) dma_pool_destroy(pool) 977 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
977 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) 978 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
978 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) 979 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
979 980
980 enum pci_dma_burst_strategy { 981 enum pci_dma_burst_strategy {
981 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible, 982 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
982 strategy_parameter is N/A */ 983 strategy_parameter is N/A */
983 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter 984 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
984 byte boundaries */ 985 byte boundaries */
985 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of 986 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
986 strategy_parameter byte boundaries */ 987 strategy_parameter byte boundaries */
987 }; 988 };
988 989
989 struct msix_entry { 990 struct msix_entry {
990 u32 vector; /* kernel uses to write allocated vector */ 991 u32 vector; /* kernel uses to write allocated vector */
991 u16 entry; /* driver uses to specify entry, OS writes */ 992 u16 entry; /* driver uses to specify entry, OS writes */
992 }; 993 };
993 994
994 995
995 #ifndef CONFIG_PCI_MSI 996 #ifndef CONFIG_PCI_MSI
996 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec) 997 static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
997 { 998 {
998 return -1; 999 return -1;
999 } 1000 }
1000 1001
1001 static inline void pci_msi_shutdown(struct pci_dev *dev) 1002 static inline void pci_msi_shutdown(struct pci_dev *dev)
1002 { } 1003 { }
1003 static inline void pci_disable_msi(struct pci_dev *dev) 1004 static inline void pci_disable_msi(struct pci_dev *dev)
1004 { } 1005 { }
1005 1006
1006 static inline int pci_msix_table_size(struct pci_dev *dev) 1007 static inline int pci_msix_table_size(struct pci_dev *dev)
1007 { 1008 {
1008 return 0; 1009 return 0;
1009 } 1010 }
1010 static inline int pci_enable_msix(struct pci_dev *dev, 1011 static inline int pci_enable_msix(struct pci_dev *dev,
1011 struct msix_entry *entries, int nvec) 1012 struct msix_entry *entries, int nvec)
1012 { 1013 {
1013 return -1; 1014 return -1;
1014 } 1015 }
1015 1016
1016 static inline void pci_msix_shutdown(struct pci_dev *dev) 1017 static inline void pci_msix_shutdown(struct pci_dev *dev)
1017 { } 1018 { }
1018 static inline void pci_disable_msix(struct pci_dev *dev) 1019 static inline void pci_disable_msix(struct pci_dev *dev)
1019 { } 1020 { }
1020 1021
1021 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) 1022 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
1022 { } 1023 { }
1023 1024
1024 static inline void pci_restore_msi_state(struct pci_dev *dev) 1025 static inline void pci_restore_msi_state(struct pci_dev *dev)
1025 { } 1026 { }
1026 static inline int pci_msi_enabled(void) 1027 static inline int pci_msi_enabled(void)
1027 { 1028 {
1028 return 0; 1029 return 0;
1029 } 1030 }
1030 #else 1031 #else
1031 extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec); 1032 extern int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec);
1032 extern void pci_msi_shutdown(struct pci_dev *dev); 1033 extern void pci_msi_shutdown(struct pci_dev *dev);
1033 extern void pci_disable_msi(struct pci_dev *dev); 1034 extern void pci_disable_msi(struct pci_dev *dev);
1034 extern int pci_msix_table_size(struct pci_dev *dev); 1035 extern int pci_msix_table_size(struct pci_dev *dev);
1035 extern int pci_enable_msix(struct pci_dev *dev, 1036 extern int pci_enable_msix(struct pci_dev *dev,
1036 struct msix_entry *entries, int nvec); 1037 struct msix_entry *entries, int nvec);
1037 extern void pci_msix_shutdown(struct pci_dev *dev); 1038 extern void pci_msix_shutdown(struct pci_dev *dev);
1038 extern void pci_disable_msix(struct pci_dev *dev); 1039 extern void pci_disable_msix(struct pci_dev *dev);
1039 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev); 1040 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
1040 extern void pci_restore_msi_state(struct pci_dev *dev); 1041 extern void pci_restore_msi_state(struct pci_dev *dev);
1041 extern int pci_msi_enabled(void); 1042 extern int pci_msi_enabled(void);
1042 #endif 1043 #endif
1043 1044
1044 #ifdef CONFIG_PCIEPORTBUS 1045 #ifdef CONFIG_PCIEPORTBUS
1045 extern bool pcie_ports_disabled; 1046 extern bool pcie_ports_disabled;
1046 extern bool pcie_ports_auto; 1047 extern bool pcie_ports_auto;
1047 #else 1048 #else
1048 #define pcie_ports_disabled true 1049 #define pcie_ports_disabled true
1049 #define pcie_ports_auto false 1050 #define pcie_ports_auto false
1050 #endif 1051 #endif
1051 1052
1052 #ifndef CONFIG_PCIEASPM 1053 #ifndef CONFIG_PCIEASPM
1053 static inline int pcie_aspm_enabled(void) { return 0; } 1054 static inline int pcie_aspm_enabled(void) { return 0; }
1054 static inline bool pcie_aspm_support_enabled(void) { return false; } 1055 static inline bool pcie_aspm_support_enabled(void) { return false; }
1055 #else 1056 #else
1056 extern int pcie_aspm_enabled(void); 1057 extern int pcie_aspm_enabled(void);
1057 extern bool pcie_aspm_support_enabled(void); 1058 extern bool pcie_aspm_support_enabled(void);
1058 #endif 1059 #endif
1059 1060
1060 #ifdef CONFIG_PCIEAER 1061 #ifdef CONFIG_PCIEAER
1061 void pci_no_aer(void); 1062 void pci_no_aer(void);
1062 bool pci_aer_available(void); 1063 bool pci_aer_available(void);
1063 #else 1064 #else
1064 static inline void pci_no_aer(void) { } 1065 static inline void pci_no_aer(void) { }
1065 static inline bool pci_aer_available(void) { return false; } 1066 static inline bool pci_aer_available(void) { return false; }
1066 #endif 1067 #endif
1067 1068
1068 #ifndef CONFIG_PCIE_ECRC 1069 #ifndef CONFIG_PCIE_ECRC
1069 static inline void pcie_set_ecrc_checking(struct pci_dev *dev) 1070 static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
1070 { 1071 {
1071 return; 1072 return;
1072 } 1073 }
1073 static inline void pcie_ecrc_get_policy(char *str) {}; 1074 static inline void pcie_ecrc_get_policy(char *str) {};
1074 #else 1075 #else
1075 extern void pcie_set_ecrc_checking(struct pci_dev *dev); 1076 extern void pcie_set_ecrc_checking(struct pci_dev *dev);
1076 extern void pcie_ecrc_get_policy(char *str); 1077 extern void pcie_ecrc_get_policy(char *str);
1077 #endif 1078 #endif
1078 1079
1079 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1) 1080 #define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
1080 1081
1081 #ifdef CONFIG_HT_IRQ 1082 #ifdef CONFIG_HT_IRQ
1082 /* The functions a driver should call */ 1083 /* The functions a driver should call */
1083 int ht_create_irq(struct pci_dev *dev, int idx); 1084 int ht_create_irq(struct pci_dev *dev, int idx);
1084 void ht_destroy_irq(unsigned int irq); 1085 void ht_destroy_irq(unsigned int irq);
1085 #endif /* CONFIG_HT_IRQ */ 1086 #endif /* CONFIG_HT_IRQ */
1086 1087
1087 extern void pci_block_user_cfg_access(struct pci_dev *dev); 1088 extern void pci_block_user_cfg_access(struct pci_dev *dev);
1088 extern void pci_unblock_user_cfg_access(struct pci_dev *dev); 1089 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
1089 1090
1090 /* 1091 /*
1091 * PCI domain support. Sometimes called PCI segment (eg by ACPI), 1092 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
1092 * a PCI domain is defined to be a set of PCI busses which share 1093 * a PCI domain is defined to be a set of PCI busses which share
1093 * configuration space. 1094 * configuration space.
1094 */ 1095 */
1095 #ifdef CONFIG_PCI_DOMAINS 1096 #ifdef CONFIG_PCI_DOMAINS
1096 extern int pci_domains_supported; 1097 extern int pci_domains_supported;
1097 #else 1098 #else
1098 enum { pci_domains_supported = 0 }; 1099 enum { pci_domains_supported = 0 };
1099 static inline int pci_domain_nr(struct pci_bus *bus) 1100 static inline int pci_domain_nr(struct pci_bus *bus)
1100 { 1101 {
1101 return 0; 1102 return 0;
1102 } 1103 }
1103 1104
1104 static inline int pci_proc_domain(struct pci_bus *bus) 1105 static inline int pci_proc_domain(struct pci_bus *bus)
1105 { 1106 {
1106 return 0; 1107 return 0;
1107 } 1108 }
1108 #endif /* CONFIG_PCI_DOMAINS */ 1109 #endif /* CONFIG_PCI_DOMAINS */
1109 1110
1110 /* some architectures require additional setup to direct VGA traffic */ 1111 /* some architectures require additional setup to direct VGA traffic */
1111 typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode, 1112 typedef int (*arch_set_vga_state_t)(struct pci_dev *pdev, bool decode,
1112 unsigned int command_bits, u32 flags); 1113 unsigned int command_bits, u32 flags);
1113 extern void pci_register_set_vga_state(arch_set_vga_state_t func); 1114 extern void pci_register_set_vga_state(arch_set_vga_state_t func);
1114 1115
1115 #else /* CONFIG_PCI is not enabled */ 1116 #else /* CONFIG_PCI is not enabled */
1116 1117
1117 /* 1118 /*
1118 * If the system does not have PCI, clearly these return errors. Define 1119 * If the system does not have PCI, clearly these return errors. Define
1119 * these as simple inline functions to avoid hair in drivers. 1120 * these as simple inline functions to avoid hair in drivers.
1120 */ 1121 */
1121 1122
1122 #define _PCI_NOP(o, s, t) \ 1123 #define _PCI_NOP(o, s, t) \
1123 static inline int pci_##o##_config_##s(struct pci_dev *dev, \ 1124 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
1124 int where, t val) \ 1125 int where, t val) \
1125 { return PCIBIOS_FUNC_NOT_SUPPORTED; } 1126 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
1126 1127
1127 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ 1128 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
1128 _PCI_NOP(o, word, u16 x) \ 1129 _PCI_NOP(o, word, u16 x) \
1129 _PCI_NOP(o, dword, u32 x) 1130 _PCI_NOP(o, dword, u32 x)
1130 _PCI_NOP_ALL(read, *) 1131 _PCI_NOP_ALL(read, *)
1131 _PCI_NOP_ALL(write,) 1132 _PCI_NOP_ALL(write,)
1132 1133
1133 static inline struct pci_dev *pci_get_device(unsigned int vendor, 1134 static inline struct pci_dev *pci_get_device(unsigned int vendor,
1134 unsigned int device, 1135 unsigned int device,
1135 struct pci_dev *from) 1136 struct pci_dev *from)
1136 { 1137 {
1137 return NULL; 1138 return NULL;
1138 } 1139 }
1139 1140
1140 static inline struct pci_dev *pci_get_subsys(unsigned int vendor, 1141 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
1141 unsigned int device, 1142 unsigned int device,
1142 unsigned int ss_vendor, 1143 unsigned int ss_vendor,
1143 unsigned int ss_device, 1144 unsigned int ss_device,
1144 struct pci_dev *from) 1145 struct pci_dev *from)
1145 { 1146 {
1146 return NULL; 1147 return NULL;
1147 } 1148 }
1148 1149
1149 static inline struct pci_dev *pci_get_class(unsigned int class, 1150 static inline struct pci_dev *pci_get_class(unsigned int class,
1150 struct pci_dev *from) 1151 struct pci_dev *from)
1151 { 1152 {
1152 return NULL; 1153 return NULL;
1153 } 1154 }
1154 1155
1155 #define pci_dev_present(ids) (0) 1156 #define pci_dev_present(ids) (0)
1156 #define no_pci_devices() (1) 1157 #define no_pci_devices() (1)
1157 #define pci_dev_put(dev) do { } while (0) 1158 #define pci_dev_put(dev) do { } while (0)
1158 1159
1159 static inline void pci_set_master(struct pci_dev *dev) 1160 static inline void pci_set_master(struct pci_dev *dev)
1160 { } 1161 { }
1161 1162
1162 static inline int pci_enable_device(struct pci_dev *dev) 1163 static inline int pci_enable_device(struct pci_dev *dev)
1163 { 1164 {
1164 return -EIO; 1165 return -EIO;
1165 } 1166 }
1166 1167
1167 static inline void pci_disable_device(struct pci_dev *dev) 1168 static inline void pci_disable_device(struct pci_dev *dev)
1168 { } 1169 { }
1169 1170
1170 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) 1171 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
1171 { 1172 {
1172 return -EIO; 1173 return -EIO;
1173 } 1174 }
1174 1175
1175 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) 1176 static inline int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
1176 { 1177 {
1177 return -EIO; 1178 return -EIO;
1178 } 1179 }
1179 1180
1180 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev, 1181 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
1181 unsigned int size) 1182 unsigned int size)
1182 { 1183 {
1183 return -EIO; 1184 return -EIO;
1184 } 1185 }
1185 1186
1186 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev, 1187 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
1187 unsigned long mask) 1188 unsigned long mask)
1188 { 1189 {
1189 return -EIO; 1190 return -EIO;
1190 } 1191 }
1191 1192
1192 static inline int pci_assign_resource(struct pci_dev *dev, int i) 1193 static inline int pci_assign_resource(struct pci_dev *dev, int i)
1193 { 1194 {
1194 return -EBUSY; 1195 return -EBUSY;
1195 } 1196 }
1196 1197
1197 static inline int __pci_register_driver(struct pci_driver *drv, 1198 static inline int __pci_register_driver(struct pci_driver *drv,
1198 struct module *owner) 1199 struct module *owner)
1199 { 1200 {
1200 return 0; 1201 return 0;
1201 } 1202 }
1202 1203
1203 static inline int pci_register_driver(struct pci_driver *drv) 1204 static inline int pci_register_driver(struct pci_driver *drv)
1204 { 1205 {
1205 return 0; 1206 return 0;
1206 } 1207 }
1207 1208
1208 static inline void pci_unregister_driver(struct pci_driver *drv) 1209 static inline void pci_unregister_driver(struct pci_driver *drv)
1209 { } 1210 { }
1210 1211
1211 static inline int pci_find_capability(struct pci_dev *dev, int cap) 1212 static inline int pci_find_capability(struct pci_dev *dev, int cap)
1212 { 1213 {
1213 return 0; 1214 return 0;
1214 } 1215 }
1215 1216
1216 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, 1217 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
1217 int cap) 1218 int cap)
1218 { 1219 {
1219 return 0; 1220 return 0;
1220 } 1221 }
1221 1222
1222 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) 1223 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
1223 { 1224 {
1224 return 0; 1225 return 0;
1225 } 1226 }
1226 1227
1227 /* Power management related routines */ 1228 /* Power management related routines */
1228 static inline int pci_save_state(struct pci_dev *dev) 1229 static inline int pci_save_state(struct pci_dev *dev)
1229 { 1230 {
1230 return 0; 1231 return 0;
1231 } 1232 }
1232 1233
1233 static inline void pci_restore_state(struct pci_dev *dev) 1234 static inline void pci_restore_state(struct pci_dev *dev)
1234 { } 1235 { }
1235 1236
1236 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) 1237 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
1237 { 1238 {
1238 return 0; 1239 return 0;
1239 } 1240 }
1240 1241
1241 static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable) 1242 static inline int pci_wake_from_d3(struct pci_dev *dev, bool enable)
1242 { 1243 {
1243 return 0; 1244 return 0;
1244 } 1245 }
1245 1246
1246 static inline pci_power_t pci_choose_state(struct pci_dev *dev, 1247 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
1247 pm_message_t state) 1248 pm_message_t state)
1248 { 1249 {
1249 return PCI_D0; 1250 return PCI_D0;
1250 } 1251 }
1251 1252
1252 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, 1253 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
1253 int enable) 1254 int enable)
1254 { 1255 {
1255 return 0; 1256 return 0;
1256 } 1257 }
1257 1258
1258 static inline void pci_enable_ido(struct pci_dev *dev, unsigned long type) 1259 static inline void pci_enable_ido(struct pci_dev *dev, unsigned long type)
1259 { 1260 {
1260 } 1261 }
1261 1262
1262 static inline void pci_disable_ido(struct pci_dev *dev, unsigned long type) 1263 static inline void pci_disable_ido(struct pci_dev *dev, unsigned long type)
1263 { 1264 {
1264 } 1265 }
1265 1266
1266 static inline int pci_enable_obff(struct pci_dev *dev, unsigned long type) 1267 static inline int pci_enable_obff(struct pci_dev *dev, unsigned long type)
1267 { 1268 {
1268 return 0; 1269 return 0;
1269 } 1270 }
1270 1271
1271 static inline void pci_disable_obff(struct pci_dev *dev) 1272 static inline void pci_disable_obff(struct pci_dev *dev)
1272 { 1273 {
1273 } 1274 }
1274 1275
1275 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) 1276 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
1276 { 1277 {
1277 return -EIO; 1278 return -EIO;
1278 } 1279 }
1279 1280
1280 static inline void pci_release_regions(struct pci_dev *dev) 1281 static inline void pci_release_regions(struct pci_dev *dev)
1281 { } 1282 { }
1282 1283
1283 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) 1284 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
1284 1285
1285 static inline void pci_block_user_cfg_access(struct pci_dev *dev) 1286 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
1286 { } 1287 { }
1287 1288
1288 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) 1289 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
1289 { } 1290 { }
1290 1291
1291 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) 1292 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
1292 { return NULL; } 1293 { return NULL; }
1293 1294
1294 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, 1295 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
1295 unsigned int devfn) 1296 unsigned int devfn)
1296 { return NULL; } 1297 { return NULL; }
1297 1298
1298 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, 1299 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
1299 unsigned int devfn) 1300 unsigned int devfn)
1300 { return NULL; } 1301 { return NULL; }
1301 1302
1302 static inline int pci_domain_nr(struct pci_bus *bus) 1303 static inline int pci_domain_nr(struct pci_bus *bus)
1303 { return 0; } 1304 { return 0; }
1304 1305
1305 #define dev_is_pci(d) (false) 1306 #define dev_is_pci(d) (false)
1306 #define dev_is_pf(d) (false) 1307 #define dev_is_pf(d) (false)
1307 #define dev_num_vf(d) (0) 1308 #define dev_num_vf(d) (0)
1308 #endif /* CONFIG_PCI */ 1309 #endif /* CONFIG_PCI */
1309 1310
1310 /* Include architecture-dependent settings and functions */ 1311 /* Include architecture-dependent settings and functions */
1311 1312
1312 #include <asm/pci.h> 1313 #include <asm/pci.h>
1313 1314
1314 #ifndef PCIBIOS_MAX_MEM_32 1315 #ifndef PCIBIOS_MAX_MEM_32
1315 #define PCIBIOS_MAX_MEM_32 (-1) 1316 #define PCIBIOS_MAX_MEM_32 (-1)
1316 #endif 1317 #endif
1317 1318
1318 /* these helpers provide future and backwards compatibility 1319 /* these helpers provide future and backwards compatibility
1319 * for accessing popular PCI BAR info */ 1320 * for accessing popular PCI BAR info */
1320 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) 1321 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
1321 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) 1322 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
1322 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) 1323 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
1323 #define pci_resource_len(dev,bar) \ 1324 #define pci_resource_len(dev,bar) \
1324 ((pci_resource_start((dev), (bar)) == 0 && \ 1325 ((pci_resource_start((dev), (bar)) == 0 && \
1325 pci_resource_end((dev), (bar)) == \ 1326 pci_resource_end((dev), (bar)) == \
1326 pci_resource_start((dev), (bar))) ? 0 : \ 1327 pci_resource_start((dev), (bar))) ? 0 : \
1327 \ 1328 \
1328 (pci_resource_end((dev), (bar)) - \ 1329 (pci_resource_end((dev), (bar)) - \
1329 pci_resource_start((dev), (bar)) + 1)) 1330 pci_resource_start((dev), (bar)) + 1))
1330 1331
1331 /* Similar to the helpers above, these manipulate per-pci_dev 1332 /* Similar to the helpers above, these manipulate per-pci_dev
1332 * driver-specific data. They are really just a wrapper around 1333 * driver-specific data. They are really just a wrapper around
1333 * the generic device structure functions of these calls. 1334 * the generic device structure functions of these calls.
1334 */ 1335 */
1335 static inline void *pci_get_drvdata(struct pci_dev *pdev) 1336 static inline void *pci_get_drvdata(struct pci_dev *pdev)
1336 { 1337 {
1337 return dev_get_drvdata(&pdev->dev); 1338 return dev_get_drvdata(&pdev->dev);
1338 } 1339 }
1339 1340
1340 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) 1341 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
1341 { 1342 {
1342 dev_set_drvdata(&pdev->dev, data); 1343 dev_set_drvdata(&pdev->dev, data);
1343 } 1344 }
1344 1345
1345 /* If you want to know what to call your pci_dev, ask this function. 1346 /* If you want to know what to call your pci_dev, ask this function.
1346 * Again, it's a wrapper around the generic device. 1347 * Again, it's a wrapper around the generic device.
1347 */ 1348 */
1348 static inline const char *pci_name(const struct pci_dev *pdev) 1349 static inline const char *pci_name(const struct pci_dev *pdev)
1349 { 1350 {
1350 return dev_name(&pdev->dev); 1351 return dev_name(&pdev->dev);
1351 } 1352 }
1352 1353
1353 1354
1354 /* Some archs don't want to expose struct resource to userland as-is 1355 /* Some archs don't want to expose struct resource to userland as-is
1355 * in sysfs and /proc 1356 * in sysfs and /proc
1356 */ 1357 */
1357 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER 1358 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
1358 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, 1359 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
1359 const struct resource *rsrc, resource_size_t *start, 1360 const struct resource *rsrc, resource_size_t *start,
1360 resource_size_t *end) 1361 resource_size_t *end)
1361 { 1362 {
1362 *start = rsrc->start; 1363 *start = rsrc->start;
1363 *end = rsrc->end; 1364 *end = rsrc->end;
1364 } 1365 }
1365 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */ 1366 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
1366 1367
1367 1368
1368 /* 1369 /*
1369 * The world is not perfect and supplies us with broken PCI devices. 1370 * The world is not perfect and supplies us with broken PCI devices.
1370 * For at least a part of these bugs we need a work-around, so both 1371 * For at least a part of these bugs we need a work-around, so both
1371 * generic (drivers/pci/quirks.c) and per-architecture code can define 1372 * generic (drivers/pci/quirks.c) and per-architecture code can define
1372 * fixup hooks to be called for particular buggy devices. 1373 * fixup hooks to be called for particular buggy devices.
1373 */ 1374 */
1374 1375
1375 struct pci_fixup { 1376 struct pci_fixup {
1376 u16 vendor, device; /* You can use PCI_ANY_ID here of course */ 1377 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
1377 void (*hook)(struct pci_dev *dev); 1378 void (*hook)(struct pci_dev *dev);
1378 }; 1379 };
1379 1380
1380 enum pci_fixup_pass { 1381 enum pci_fixup_pass {
1381 pci_fixup_early, /* Before probing BARs */ 1382 pci_fixup_early, /* Before probing BARs */
1382 pci_fixup_header, /* After reading configuration header */ 1383 pci_fixup_header, /* After reading configuration header */
1383 pci_fixup_final, /* Final phase of device fixups */ 1384 pci_fixup_final, /* Final phase of device fixups */
1384 pci_fixup_enable, /* pci_enable_device() time */ 1385 pci_fixup_enable, /* pci_enable_device() time */
1385 pci_fixup_resume, /* pci_device_resume() */ 1386 pci_fixup_resume, /* pci_device_resume() */
1386 pci_fixup_suspend, /* pci_device_suspend */ 1387 pci_fixup_suspend, /* pci_device_suspend */
1387 pci_fixup_resume_early, /* pci_device_resume_early() */ 1388 pci_fixup_resume_early, /* pci_device_resume_early() */
1388 }; 1389 };
1389 1390
1390 /* Anonymous variables would be nice... */ 1391 /* Anonymous variables would be nice... */
1391 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \ 1392 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1392 static const struct pci_fixup __pci_fixup_##name __used \ 1393 static const struct pci_fixup __pci_fixup_##name __used \
1393 __attribute__((__section__(#section))) = { vendor, device, hook }; 1394 __attribute__((__section__(#section))) = { vendor, device, hook };
1394 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ 1395 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1395 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ 1396 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1396 vendor##device##hook, vendor, device, hook) 1397 vendor##device##hook, vendor, device, hook)
1397 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ 1398 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1398 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ 1399 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1399 vendor##device##hook, vendor, device, hook) 1400 vendor##device##hook, vendor, device, hook)
1400 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ 1401 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1401 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ 1402 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1402 vendor##device##hook, vendor, device, hook) 1403 vendor##device##hook, vendor, device, hook)
1403 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ 1404 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1404 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ 1405 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1405 vendor##device##hook, vendor, device, hook) 1406 vendor##device##hook, vendor, device, hook)
1406 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ 1407 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1407 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ 1408 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1408 resume##vendor##device##hook, vendor, device, hook) 1409 resume##vendor##device##hook, vendor, device, hook)
1409 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ 1410 #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \
1410 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ 1411 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \
1411 resume_early##vendor##device##hook, vendor, device, hook) 1412 resume_early##vendor##device##hook, vendor, device, hook)
1412 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ 1413 #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \
1413 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ 1414 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \
1414 suspend##vendor##device##hook, vendor, device, hook) 1415 suspend##vendor##device##hook, vendor, device, hook)
1415 1416
1416 #ifdef CONFIG_PCI_QUIRKS 1417 #ifdef CONFIG_PCI_QUIRKS
1417 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); 1418 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1418 #else 1419 #else
1419 static inline void pci_fixup_device(enum pci_fixup_pass pass, 1420 static inline void pci_fixup_device(enum pci_fixup_pass pass,
1420 struct pci_dev *dev) {} 1421 struct pci_dev *dev) {}
1421 #endif 1422 #endif
1422 1423
1423 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); 1424 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1424 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); 1425 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1425 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); 1426 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1426 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name); 1427 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1427 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask, 1428 int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask,
1428 const char *name); 1429 const char *name);
1429 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask); 1430 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1430 1431
1431 extern int pci_pci_problems; 1432 extern int pci_pci_problems;
1432 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */ 1433 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1433 #define PCIPCI_TRITON 2 1434 #define PCIPCI_TRITON 2
1434 #define PCIPCI_NATOMA 4 1435 #define PCIPCI_NATOMA 4
1435 #define PCIPCI_VIAETBF 8 1436 #define PCIPCI_VIAETBF 8
1436 #define PCIPCI_VSFX 16 1437 #define PCIPCI_VSFX 16
1437 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */ 1438 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1438 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */ 1439 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1439 1440
1440 extern unsigned long pci_cardbus_io_size; 1441 extern unsigned long pci_cardbus_io_size;
1441 extern unsigned long pci_cardbus_mem_size; 1442 extern unsigned long pci_cardbus_mem_size;
1442 extern u8 __devinitdata pci_dfl_cache_line_size; 1443 extern u8 __devinitdata pci_dfl_cache_line_size;
1443 extern u8 pci_cache_line_size; 1444 extern u8 pci_cache_line_size;
1444 1445
1445 extern unsigned long pci_hotplug_io_size; 1446 extern unsigned long pci_hotplug_io_size;
1446 extern unsigned long pci_hotplug_mem_size; 1447 extern unsigned long pci_hotplug_mem_size;
1447 1448
1448 int pcibios_add_platform_entries(struct pci_dev *dev); 1449 int pcibios_add_platform_entries(struct pci_dev *dev);
1449 void pcibios_disable_device(struct pci_dev *dev); 1450 void pcibios_disable_device(struct pci_dev *dev);
1450 int pcibios_set_pcie_reset_state(struct pci_dev *dev, 1451 int pcibios_set_pcie_reset_state(struct pci_dev *dev,
1451 enum pcie_reset_state state); 1452 enum pcie_reset_state state);
1452 1453
1453 #ifdef CONFIG_PCI_MMCONFIG 1454 #ifdef CONFIG_PCI_MMCONFIG
1454 extern void __init pci_mmcfg_early_init(void); 1455 extern void __init pci_mmcfg_early_init(void);
1455 extern void __init pci_mmcfg_late_init(void); 1456 extern void __init pci_mmcfg_late_init(void);
1456 #else 1457 #else
1457 static inline void pci_mmcfg_early_init(void) { } 1458 static inline void pci_mmcfg_early_init(void) { }
1458 static inline void pci_mmcfg_late_init(void) { } 1459 static inline void pci_mmcfg_late_init(void) { }
1459 #endif 1460 #endif
1460 1461
1461 int pci_ext_cfg_avail(struct pci_dev *dev); 1462 int pci_ext_cfg_avail(struct pci_dev *dev);
1462 1463
1463 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar); 1464 void __iomem *pci_ioremap_bar(struct pci_dev *pdev, int bar);
1464 1465
1465 #ifdef CONFIG_PCI_IOV 1466 #ifdef CONFIG_PCI_IOV
1466 extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn); 1467 extern int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
1467 extern void pci_disable_sriov(struct pci_dev *dev); 1468 extern void pci_disable_sriov(struct pci_dev *dev);
1468 extern irqreturn_t pci_sriov_migration(struct pci_dev *dev); 1469 extern irqreturn_t pci_sriov_migration(struct pci_dev *dev);
1469 extern int pci_num_vf(struct pci_dev *dev); 1470 extern int pci_num_vf(struct pci_dev *dev);
1470 #else 1471 #else
1471 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn) 1472 static inline int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
1472 { 1473 {
1473 return -ENODEV; 1474 return -ENODEV;
1474 } 1475 }
1475 static inline void pci_disable_sriov(struct pci_dev *dev) 1476 static inline void pci_disable_sriov(struct pci_dev *dev)
1476 { 1477 {
1477 } 1478 }
1478 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev) 1479 static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
1479 { 1480 {
1480 return IRQ_NONE; 1481 return IRQ_NONE;
1481 } 1482 }
1482 static inline int pci_num_vf(struct pci_dev *dev) 1483 static inline int pci_num_vf(struct pci_dev *dev)
1483 { 1484 {
1484 return 0; 1485 return 0;
1485 } 1486 }
1486 #endif 1487 #endif
1487 1488
1488 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE) 1489 #if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
1489 extern void pci_hp_create_module_link(struct pci_slot *pci_slot); 1490 extern void pci_hp_create_module_link(struct pci_slot *pci_slot);
1490 extern void pci_hp_remove_module_link(struct pci_slot *pci_slot); 1491 extern void pci_hp_remove_module_link(struct pci_slot *pci_slot);
1491 #endif 1492 #endif
1492 1493
1493 /** 1494 /**
1494 * pci_pcie_cap - get the saved PCIe capability offset 1495 * pci_pcie_cap - get the saved PCIe capability offset
1495 * @dev: PCI device 1496 * @dev: PCI device
1496 * 1497 *
1497 * PCIe capability offset is calculated at PCI device initialization 1498 * PCIe capability offset is calculated at PCI device initialization
1498 * time and saved in the data structure. This function returns saved 1499 * time and saved in the data structure. This function returns saved
1499 * PCIe capability offset. Using this instead of pci_find_capability() 1500 * PCIe capability offset. Using this instead of pci_find_capability()
1500 * reduces unnecessary search in the PCI configuration space. If you 1501 * reduces unnecessary search in the PCI configuration space. If you
1501 * need to calculate PCIe capability offset from raw device for some 1502 * need to calculate PCIe capability offset from raw device for some
1502 * reasons, please use pci_find_capability() instead. 1503 * reasons, please use pci_find_capability() instead.
1503 */ 1504 */
1504 static inline int pci_pcie_cap(struct pci_dev *dev) 1505 static inline int pci_pcie_cap(struct pci_dev *dev)
1505 { 1506 {
1506 return dev->pcie_cap; 1507 return dev->pcie_cap;
1507 } 1508 }
1508 1509
1509 /** 1510 /**
1510 * pci_is_pcie - check if the PCI device is PCI Express capable 1511 * pci_is_pcie - check if the PCI device is PCI Express capable
1511 * @dev: PCI device 1512 * @dev: PCI device
1512 * 1513 *
1513 * Retrun true if the PCI device is PCI Express capable, false otherwise. 1514 * Retrun true if the PCI device is PCI Express capable, false otherwise.
1514 */ 1515 */
1515 static inline bool pci_is_pcie(struct pci_dev *dev) 1516 static inline bool pci_is_pcie(struct pci_dev *dev)
1516 { 1517 {
1517 return !!pci_pcie_cap(dev); 1518 return !!pci_pcie_cap(dev);
1518 } 1519 }
1519 1520
1520 void pci_request_acs(void); 1521 void pci_request_acs(void);
1521 1522
1522 1523
1523 #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */ 1524 #define PCI_VPD_LRDT 0x80 /* Large Resource Data Type */
1524 #define PCI_VPD_LRDT_ID(x) (x | PCI_VPD_LRDT) 1525 #define PCI_VPD_LRDT_ID(x) (x | PCI_VPD_LRDT)
1525 1526
1526 /* Large Resource Data Type Tag Item Names */ 1527 /* Large Resource Data Type Tag Item Names */
1527 #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */ 1528 #define PCI_VPD_LTIN_ID_STRING 0x02 /* Identifier String */
1528 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */ 1529 #define PCI_VPD_LTIN_RO_DATA 0x10 /* Read-Only Data */
1529 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */ 1530 #define PCI_VPD_LTIN_RW_DATA 0x11 /* Read-Write Data */
1530 1531
1531 #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING) 1532 #define PCI_VPD_LRDT_ID_STRING PCI_VPD_LRDT_ID(PCI_VPD_LTIN_ID_STRING)
1532 #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA) 1533 #define PCI_VPD_LRDT_RO_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RO_DATA)
1533 #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA) 1534 #define PCI_VPD_LRDT_RW_DATA PCI_VPD_LRDT_ID(PCI_VPD_LTIN_RW_DATA)
1534 1535
1535 /* Small Resource Data Type Tag Item Names */ 1536 /* Small Resource Data Type Tag Item Names */
1536 #define PCI_VPD_STIN_END 0x78 /* End */ 1537 #define PCI_VPD_STIN_END 0x78 /* End */
1537 1538
1538 #define PCI_VPD_SRDT_END PCI_VPD_STIN_END 1539 #define PCI_VPD_SRDT_END PCI_VPD_STIN_END
1539 1540
1540 #define PCI_VPD_SRDT_TIN_MASK 0x78 1541 #define PCI_VPD_SRDT_TIN_MASK 0x78
1541 #define PCI_VPD_SRDT_LEN_MASK 0x07 1542 #define PCI_VPD_SRDT_LEN_MASK 0x07
1542 1543
1543 #define PCI_VPD_LRDT_TAG_SIZE 3 1544 #define PCI_VPD_LRDT_TAG_SIZE 3
1544 #define PCI_VPD_SRDT_TAG_SIZE 1 1545 #define PCI_VPD_SRDT_TAG_SIZE 1
1545 1546
1546 #define PCI_VPD_INFO_FLD_HDR_SIZE 3 1547 #define PCI_VPD_INFO_FLD_HDR_SIZE 3
1547 1548
1548 #define PCI_VPD_RO_KEYWORD_PARTNO "PN" 1549 #define PCI_VPD_RO_KEYWORD_PARTNO "PN"
1549 #define PCI_VPD_RO_KEYWORD_MFR_ID "MN" 1550 #define PCI_VPD_RO_KEYWORD_MFR_ID "MN"
1550 #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0" 1551 #define PCI_VPD_RO_KEYWORD_VENDOR0 "V0"
1551 #define PCI_VPD_RO_KEYWORD_CHKSUM "RV" 1552 #define PCI_VPD_RO_KEYWORD_CHKSUM "RV"
1552 1553
1553 /** 1554 /**
1554 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length 1555 * pci_vpd_lrdt_size - Extracts the Large Resource Data Type length
1555 * @lrdt: Pointer to the beginning of the Large Resource Data Type tag 1556 * @lrdt: Pointer to the beginning of the Large Resource Data Type tag
1556 * 1557 *
1557 * Returns the extracted Large Resource Data Type length. 1558 * Returns the extracted Large Resource Data Type length.
1558 */ 1559 */
1559 static inline u16 pci_vpd_lrdt_size(const u8 *lrdt) 1560 static inline u16 pci_vpd_lrdt_size(const u8 *lrdt)
1560 { 1561 {
1561 return (u16)lrdt[1] + ((u16)lrdt[2] << 8); 1562 return (u16)lrdt[1] + ((u16)lrdt[2] << 8);
1562 } 1563 }
1563 1564
1564 /** 1565 /**
1565 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length 1566 * pci_vpd_srdt_size - Extracts the Small Resource Data Type length
1566 * @lrdt: Pointer to the beginning of the Small Resource Data Type tag 1567 * @lrdt: Pointer to the beginning of the Small Resource Data Type tag
1567 * 1568 *
1568 * Returns the extracted Small Resource Data Type length. 1569 * Returns the extracted Small Resource Data Type length.
1569 */ 1570 */
1570 static inline u8 pci_vpd_srdt_size(const u8 *srdt) 1571 static inline u8 pci_vpd_srdt_size(const u8 *srdt)
1571 { 1572 {
1572 return (*srdt) & PCI_VPD_SRDT_LEN_MASK; 1573 return (*srdt) & PCI_VPD_SRDT_LEN_MASK;
1573 } 1574 }
1574 1575
1575 /** 1576 /**
1576 * pci_vpd_info_field_size - Extracts the information field length 1577 * pci_vpd_info_field_size - Extracts the information field length
1577 * @lrdt: Pointer to the beginning of an information field header 1578 * @lrdt: Pointer to the beginning of an information field header
1578 * 1579 *
1579 * Returns the extracted information field length. 1580 * Returns the extracted information field length.
1580 */ 1581 */
1581 static inline u8 pci_vpd_info_field_size(const u8 *info_field) 1582 static inline u8 pci_vpd_info_field_size(const u8 *info_field)
1582 { 1583 {
1583 return info_field[2]; 1584 return info_field[2];
1584 } 1585 }
1585 1586
1586 /** 1587 /**
1587 * pci_vpd_find_tag - Locates the Resource Data Type tag provided 1588 * pci_vpd_find_tag - Locates the Resource Data Type tag provided
1588 * @buf: Pointer to buffered vpd data 1589 * @buf: Pointer to buffered vpd data
1589 * @off: The offset into the buffer at which to begin the search 1590 * @off: The offset into the buffer at which to begin the search
1590 * @len: The length of the vpd buffer 1591 * @len: The length of the vpd buffer
1591 * @rdt: The Resource Data Type to search for 1592 * @rdt: The Resource Data Type to search for
1592 * 1593 *
1593 * Returns the index where the Resource Data Type was found or 1594 * Returns the index where the Resource Data Type was found or
1594 * -ENOENT otherwise. 1595 * -ENOENT otherwise.
1595 */ 1596 */
1596 int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt); 1597 int pci_vpd_find_tag(const u8 *buf, unsigned int off, unsigned int len, u8 rdt);
1597 1598
1598 /** 1599 /**
1599 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD 1600 * pci_vpd_find_info_keyword - Locates an information field keyword in the VPD
1600 * @buf: Pointer to buffered vpd data 1601 * @buf: Pointer to buffered vpd data
1601 * @off: The offset into the buffer at which to begin the search 1602 * @off: The offset into the buffer at which to begin the search
1602 * @len: The length of the buffer area, relative to off, in which to search 1603 * @len: The length of the buffer area, relative to off, in which to search
1603 * @kw: The keyword to search for 1604 * @kw: The keyword to search for
1604 * 1605 *
1605 * Returns the index where the information field keyword was found or 1606 * Returns the index where the information field keyword was found or
1606 * -ENOENT otherwise. 1607 * -ENOENT otherwise.
1607 */ 1608 */
1608 int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off, 1609 int pci_vpd_find_info_keyword(const u8 *buf, unsigned int off,
1609 unsigned int len, const char *kw); 1610 unsigned int len, const char *kw);
1610 1611
1611 /* PCI <-> OF binding helpers */ 1612 /* PCI <-> OF binding helpers */
1612 #ifdef CONFIG_OF 1613 #ifdef CONFIG_OF
1613 struct device_node; 1614 struct device_node;
1614 extern void pci_set_of_node(struct pci_dev *dev); 1615 extern void pci_set_of_node(struct pci_dev *dev);
1615 extern void pci_release_of_node(struct pci_dev *dev); 1616 extern void pci_release_of_node(struct pci_dev *dev);
1616 extern void pci_set_bus_of_node(struct pci_bus *bus); 1617 extern void pci_set_bus_of_node(struct pci_bus *bus);
1617 extern void pci_release_bus_of_node(struct pci_bus *bus); 1618 extern void pci_release_bus_of_node(struct pci_bus *bus);
1618 1619
1619 /* Arch may override this (weak) */ 1620 /* Arch may override this (weak) */
1620 extern struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus); 1621 extern struct device_node * __weak pcibios_get_phb_of_node(struct pci_bus *bus);
1621 1622
1622 static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev) 1623 static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
1623 { 1624 {
1624 return pdev ? pdev->dev.of_node : NULL; 1625 return pdev ? pdev->dev.of_node : NULL;
1625 } 1626 }
1626 1627
1627 static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) 1628 static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
1628 { 1629 {
1629 return bus ? bus->dev.of_node : NULL; 1630 return bus ? bus->dev.of_node : NULL;
1630 } 1631 }
1631 1632
1632 #else /* CONFIG_OF */ 1633 #else /* CONFIG_OF */
1633 static inline void pci_set_of_node(struct pci_dev *dev) { } 1634 static inline void pci_set_of_node(struct pci_dev *dev) { }
1634 static inline void pci_release_of_node(struct pci_dev *dev) { } 1635 static inline void pci_release_of_node(struct pci_dev *dev) { }
1635 static inline void pci_set_bus_of_node(struct pci_bus *bus) { } 1636 static inline void pci_set_bus_of_node(struct pci_bus *bus) { }
1636 static inline void pci_release_bus_of_node(struct pci_bus *bus) { } 1637 static inline void pci_release_bus_of_node(struct pci_bus *bus) { }
1637 #endif /* CONFIG_OF */ 1638 #endif /* CONFIG_OF */
1638 1639
1639 /** 1640 /**
1640 * pci_find_upstream_pcie_bridge - find upstream PCIe-to-PCI bridge of a device 1641 * pci_find_upstream_pcie_bridge - find upstream PCIe-to-PCI bridge of a device
1641 * @pdev: the PCI device 1642 * @pdev: the PCI device
1642 * 1643 *
1643 * if the device is PCIE, return NULL 1644 * if the device is PCIE, return NULL
1644 * if the device isn't connected to a PCIe bridge (that is its parent is a 1645 * if the device isn't connected to a PCIe bridge (that is its parent is a
1645 * legacy PCI bridge and the bridge is directly connected to bus 0), return its 1646 * legacy PCI bridge and the bridge is directly connected to bus 0), return its
1646 * parent 1647 * parent
1647 */ 1648 */
1648 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev); 1649 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
1649 1650
1650 #endif /* __KERNEL__ */ 1651 #endif /* __KERNEL__ */
1651 #endif /* LINUX_PCI_H */ 1652 #endif /* LINUX_PCI_H */
1652 1653