Commit b7fb7105b2f11ae33b57404dc9a0295908c6faf6
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213a8404c4
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smarc-imx_3.14.28_1.0.0_ga
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ARM: dts: imx: add LVDS panel for imx6qdl-sabresd
Add HannStar HSD100PXN1 XGA panel support on LVDS1 port of imx6qdl-sabresd board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Showing 1 changed file with 25 additions and 0 deletions Inline Diff
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
1 | /* | 1 | /* |
2 | * Copyright 2012 Freescale Semiconductor, Inc. | 2 | * Copyright 2012 Freescale Semiconductor, Inc. |
3 | * Copyright 2011 Linaro Ltd. | 3 | * Copyright 2011 Linaro Ltd. |
4 | * | 4 | * |
5 | * The code contained herein is licensed under the GNU General Public | 5 | * The code contained herein is licensed under the GNU General Public |
6 | * License. You may obtain a copy of the GNU General Public License | 6 | * License. You may obtain a copy of the GNU General Public License |
7 | * Version 2 or later at the following locations: | 7 | * Version 2 or later at the following locations: |
8 | * | 8 | * |
9 | * http://www.opensource.org/licenses/gpl-license.html | 9 | * http://www.opensource.org/licenses/gpl-license.html |
10 | * http://www.gnu.org/copyleft/gpl.html | 10 | * http://www.gnu.org/copyleft/gpl.html |
11 | */ | 11 | */ |
12 | 12 | ||
13 | / { | 13 | / { |
14 | memory { | 14 | memory { |
15 | reg = <0x10000000 0x40000000>; | 15 | reg = <0x10000000 0x40000000>; |
16 | }; | 16 | }; |
17 | 17 | ||
18 | regulators { | 18 | regulators { |
19 | compatible = "simple-bus"; | 19 | compatible = "simple-bus"; |
20 | 20 | ||
21 | reg_usb_otg_vbus: usb_otg_vbus { | 21 | reg_usb_otg_vbus: usb_otg_vbus { |
22 | compatible = "regulator-fixed"; | 22 | compatible = "regulator-fixed"; |
23 | regulator-name = "usb_otg_vbus"; | 23 | regulator-name = "usb_otg_vbus"; |
24 | regulator-min-microvolt = <5000000>; | 24 | regulator-min-microvolt = <5000000>; |
25 | regulator-max-microvolt = <5000000>; | 25 | regulator-max-microvolt = <5000000>; |
26 | gpio = <&gpio3 22 0>; | 26 | gpio = <&gpio3 22 0>; |
27 | enable-active-high; | 27 | enable-active-high; |
28 | }; | 28 | }; |
29 | 29 | ||
30 | reg_audio: wm8962_supply { | 30 | reg_audio: wm8962_supply { |
31 | compatible = "regulator-fixed"; | 31 | compatible = "regulator-fixed"; |
32 | regulator-name = "wm8962-supply"; | 32 | regulator-name = "wm8962-supply"; |
33 | gpio = <&gpio4 10 0>; | 33 | gpio = <&gpio4 10 0>; |
34 | enable-active-high; | 34 | enable-active-high; |
35 | }; | 35 | }; |
36 | }; | 36 | }; |
37 | 37 | ||
38 | gpio-keys { | 38 | gpio-keys { |
39 | compatible = "gpio-keys"; | 39 | compatible = "gpio-keys"; |
40 | 40 | ||
41 | volume-up { | 41 | volume-up { |
42 | label = "Volume Up"; | 42 | label = "Volume Up"; |
43 | gpios = <&gpio1 4 0>; | 43 | gpios = <&gpio1 4 0>; |
44 | linux,code = <115>; /* KEY_VOLUMEUP */ | 44 | linux,code = <115>; /* KEY_VOLUMEUP */ |
45 | }; | 45 | }; |
46 | 46 | ||
47 | volume-down { | 47 | volume-down { |
48 | label = "Volume Down"; | 48 | label = "Volume Down"; |
49 | gpios = <&gpio1 5 0>; | 49 | gpios = <&gpio1 5 0>; |
50 | linux,code = <114>; /* KEY_VOLUMEDOWN */ | 50 | linux,code = <114>; /* KEY_VOLUMEDOWN */ |
51 | }; | 51 | }; |
52 | }; | 52 | }; |
53 | 53 | ||
54 | sound { | 54 | sound { |
55 | compatible = "fsl,imx6q-sabresd-wm8962", | 55 | compatible = "fsl,imx6q-sabresd-wm8962", |
56 | "fsl,imx-audio-wm8962"; | 56 | "fsl,imx-audio-wm8962"; |
57 | model = "wm8962-audio"; | 57 | model = "wm8962-audio"; |
58 | ssi-controller = <&ssi2>; | 58 | ssi-controller = <&ssi2>; |
59 | audio-codec = <&codec>; | 59 | audio-codec = <&codec>; |
60 | audio-routing = | 60 | audio-routing = |
61 | "Headphone Jack", "HPOUTL", | 61 | "Headphone Jack", "HPOUTL", |
62 | "Headphone Jack", "HPOUTR", | 62 | "Headphone Jack", "HPOUTR", |
63 | "Ext Spk", "SPKOUTL", | 63 | "Ext Spk", "SPKOUTL", |
64 | "Ext Spk", "SPKOUTR", | 64 | "Ext Spk", "SPKOUTR", |
65 | "MICBIAS", "AMIC", | 65 | "MICBIAS", "AMIC", |
66 | "IN3R", "MICBIAS", | 66 | "IN3R", "MICBIAS", |
67 | "DMIC", "MICBIAS", | 67 | "DMIC", "MICBIAS", |
68 | "DMICDAT", "DMIC"; | 68 | "DMICDAT", "DMIC"; |
69 | mux-int-port = <2>; | 69 | mux-int-port = <2>; |
70 | mux-ext-port = <3>; | 70 | mux-ext-port = <3>; |
71 | }; | 71 | }; |
72 | }; | 72 | }; |
73 | 73 | ||
74 | &audmux { | 74 | &audmux { |
75 | pinctrl-names = "default"; | 75 | pinctrl-names = "default"; |
76 | pinctrl-0 = <&pinctrl_audmux_2>; | 76 | pinctrl-0 = <&pinctrl_audmux_2>; |
77 | status = "okay"; | 77 | status = "okay"; |
78 | }; | 78 | }; |
79 | 79 | ||
80 | &ecspi1 { | 80 | &ecspi1 { |
81 | fsl,spi-num-chipselects = <1>; | 81 | fsl,spi-num-chipselects = <1>; |
82 | cs-gpios = <&gpio4 9 0>; | 82 | cs-gpios = <&gpio4 9 0>; |
83 | pinctrl-names = "default"; | 83 | pinctrl-names = "default"; |
84 | pinctrl-0 = <&pinctrl_ecspi1_2>; | 84 | pinctrl-0 = <&pinctrl_ecspi1_2>; |
85 | status = "okay"; | 85 | status = "okay"; |
86 | 86 | ||
87 | flash: m25p80@0 { | 87 | flash: m25p80@0 { |
88 | #address-cells = <1>; | 88 | #address-cells = <1>; |
89 | #size-cells = <1>; | 89 | #size-cells = <1>; |
90 | compatible = "st,m25p32"; | 90 | compatible = "st,m25p32"; |
91 | spi-max-frequency = <20000000>; | 91 | spi-max-frequency = <20000000>; |
92 | reg = <0>; | 92 | reg = <0>; |
93 | }; | 93 | }; |
94 | }; | 94 | }; |
95 | 95 | ||
96 | &fec { | 96 | &fec { |
97 | pinctrl-names = "default"; | 97 | pinctrl-names = "default"; |
98 | pinctrl-0 = <&pinctrl_enet_1>; | 98 | pinctrl-0 = <&pinctrl_enet_1>; |
99 | phy-mode = "rgmii"; | 99 | phy-mode = "rgmii"; |
100 | status = "okay"; | 100 | status = "okay"; |
101 | }; | 101 | }; |
102 | 102 | ||
103 | &i2c1 { | 103 | &i2c1 { |
104 | clock-frequency = <100000>; | 104 | clock-frequency = <100000>; |
105 | pinctrl-names = "default"; | 105 | pinctrl-names = "default"; |
106 | pinctrl-0 = <&pinctrl_i2c1_2>; | 106 | pinctrl-0 = <&pinctrl_i2c1_2>; |
107 | status = "okay"; | 107 | status = "okay"; |
108 | 108 | ||
109 | codec: wm8962@1a { | 109 | codec: wm8962@1a { |
110 | compatible = "wlf,wm8962"; | 110 | compatible = "wlf,wm8962"; |
111 | reg = <0x1a>; | 111 | reg = <0x1a>; |
112 | clocks = <&clks 169>; | 112 | clocks = <&clks 169>; |
113 | DCVDD-supply = <®_audio>; | 113 | DCVDD-supply = <®_audio>; |
114 | DBVDD-supply = <®_audio>; | 114 | DBVDD-supply = <®_audio>; |
115 | AVDD-supply = <®_audio>; | 115 | AVDD-supply = <®_audio>; |
116 | CPVDD-supply = <®_audio>; | 116 | CPVDD-supply = <®_audio>; |
117 | MICVDD-supply = <®_audio>; | 117 | MICVDD-supply = <®_audio>; |
118 | PLLVDD-supply = <®_audio>; | 118 | PLLVDD-supply = <®_audio>; |
119 | SPKVDD1-supply = <®_audio>; | 119 | SPKVDD1-supply = <®_audio>; |
120 | SPKVDD2-supply = <®_audio>; | 120 | SPKVDD2-supply = <®_audio>; |
121 | gpio-cfg = < | 121 | gpio-cfg = < |
122 | 0x0000 /* 0:Default */ | 122 | 0x0000 /* 0:Default */ |
123 | 0x0000 /* 1:Default */ | 123 | 0x0000 /* 1:Default */ |
124 | 0x0013 /* 2:FN_DMICCLK */ | 124 | 0x0013 /* 2:FN_DMICCLK */ |
125 | 0x0000 /* 3:Default */ | 125 | 0x0000 /* 3:Default */ |
126 | 0x8014 /* 4:FN_DMICCDAT */ | 126 | 0x8014 /* 4:FN_DMICCDAT */ |
127 | 0x0000 /* 5:Default */ | 127 | 0x0000 /* 5:Default */ |
128 | >; | 128 | >; |
129 | }; | 129 | }; |
130 | }; | 130 | }; |
131 | 131 | ||
132 | &iomuxc { | 132 | &iomuxc { |
133 | pinctrl-names = "default"; | 133 | pinctrl-names = "default"; |
134 | pinctrl-0 = <&pinctrl_hog>; | 134 | pinctrl-0 = <&pinctrl_hog>; |
135 | 135 | ||
136 | hog { | 136 | hog { |
137 | pinctrl_hog: hoggrp { | 137 | pinctrl_hog: hoggrp { |
138 | fsl,pins = < | 138 | fsl,pins = < |
139 | MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 | 139 | MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 |
140 | MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 | 140 | MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 |
141 | MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 | 141 | MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 |
142 | MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 | 142 | MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 |
143 | MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 | 143 | MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 |
144 | MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 | 144 | MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 |
145 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 | 145 | MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 |
146 | >; | 146 | >; |
147 | }; | 147 | }; |
148 | }; | 148 | }; |
149 | }; | 149 | }; |
150 | 150 | ||
151 | &ldb { | ||
152 | status = "okay"; | ||
153 | |||
154 | lvds-channel@1 { | ||
155 | fsl,data-mapping = "spwg"; | ||
156 | fsl,data-width = <18>; | ||
157 | status = "okay"; | ||
158 | |||
159 | display-timings { | ||
160 | native-mode = <&timing0>; | ||
161 | timing0: hsd100pxn1 { | ||
162 | clock-frequency = <65000000>; | ||
163 | hactive = <1024>; | ||
164 | vactive = <768>; | ||
165 | hback-porch = <220>; | ||
166 | hfront-porch = <40>; | ||
167 | vback-porch = <21>; | ||
168 | vfront-porch = <7>; | ||
169 | hsync-len = <60>; | ||
170 | vsync-len = <10>; | ||
171 | }; | ||
172 | }; | ||
173 | }; | ||
174 | }; | ||
175 | |||
151 | &ssi2 { | 176 | &ssi2 { |
152 | fsl,mode = "i2s-slave"; | 177 | fsl,mode = "i2s-slave"; |
153 | status = "okay"; | 178 | status = "okay"; |
154 | }; | 179 | }; |
155 | 180 | ||
156 | &uart1 { | 181 | &uart1 { |
157 | pinctrl-names = "default"; | 182 | pinctrl-names = "default"; |
158 | pinctrl-0 = <&pinctrl_uart1_1>; | 183 | pinctrl-0 = <&pinctrl_uart1_1>; |
159 | status = "okay"; | 184 | status = "okay"; |
160 | }; | 185 | }; |
161 | 186 | ||
162 | &usbh1 { | 187 | &usbh1 { |
163 | status = "okay"; | 188 | status = "okay"; |
164 | }; | 189 | }; |
165 | 190 | ||
166 | &usbotg { | 191 | &usbotg { |
167 | vbus-supply = <®_usb_otg_vbus>; | 192 | vbus-supply = <®_usb_otg_vbus>; |
168 | pinctrl-names = "default"; | 193 | pinctrl-names = "default"; |
169 | pinctrl-0 = <&pinctrl_usbotg_2>; | 194 | pinctrl-0 = <&pinctrl_usbotg_2>; |
170 | disable-over-current; | 195 | disable-over-current; |
171 | status = "okay"; | 196 | status = "okay"; |
172 | }; | 197 | }; |
173 | 198 | ||
174 | &usdhc2 { | 199 | &usdhc2 { |
175 | pinctrl-names = "default"; | 200 | pinctrl-names = "default"; |
176 | pinctrl-0 = <&pinctrl_usdhc2_1>; | 201 | pinctrl-0 = <&pinctrl_usdhc2_1>; |
177 | cd-gpios = <&gpio2 2 0>; | 202 | cd-gpios = <&gpio2 2 0>; |
178 | wp-gpios = <&gpio2 3 0>; | 203 | wp-gpios = <&gpio2 3 0>; |
179 | status = "okay"; | 204 | status = "okay"; |
180 | }; | 205 | }; |
181 | 206 | ||
182 | &usdhc3 { | 207 | &usdhc3 { |
183 | pinctrl-names = "default"; | 208 | pinctrl-names = "default"; |
184 | pinctrl-0 = <&pinctrl_usdhc3_1>; | 209 | pinctrl-0 = <&pinctrl_usdhc3_1>; |
185 | cd-gpios = <&gpio2 0 0>; | 210 | cd-gpios = <&gpio2 0 0>; |
186 | wp-gpios = <&gpio2 1 0>; | 211 | wp-gpios = <&gpio2 1 0>; |
187 | status = "okay"; | 212 | status = "okay"; |
188 | }; | 213 | }; |
189 | 214 |