Commit ba66ddfa613886cbb554f7b064dc05bdc2c7138b

Authored by Sam Ravnborg
Committed by Linus Torvalds
1 parent ed49f5d001

pcmcia: silence section mismatch warnings from pci_driver variables

Silence following warnings:
WARNING: drivers/pcmcia/built-in.o(.data+0x14e0): Section mismatch in reference from the variable pd6729_pci_drv to the function .devinit.text:pd6729_pci_probe()
WARNING: drivers/pcmcia/built-in.o(.data+0x14e8): Section mismatch in reference from the variable pd6729_pci_drv to the function .devexit.text:pd6729_pci_remove()
WARNING: drivers/pcmcia/built-in.o(.data+0x16c0): Section mismatch in reference from the variable i82092aa_pci_drv to the function .devinit.text:i82092aa_pci_probe()
WARNING: drivers/pcmcia/built-in.o(.data+0x16c8): Section mismatch in reference from the variable i82092aa_pci_drv to the function .devexit.text:i82092aa_pci_remove()

Rename the variables from *_drv to *_driver so modpost ignore the OK
references to __devinit/__devexit functions.

Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Showing 2 changed files with 6 additions and 6 deletions Inline Diff

drivers/pcmcia/i82092.c
1 /* 1 /*
2 * Driver for Intel I82092AA PCI-PCMCIA bridge. 2 * Driver for Intel I82092AA PCI-PCMCIA bridge.
3 * 3 *
4 * (C) 2001 Red Hat, Inc. 4 * (C) 2001 Red Hat, Inc.
5 * 5 *
6 * Author: Arjan Van De Ven <arjanv@redhat.com> 6 * Author: Arjan Van De Ven <arjanv@redhat.com>
7 * Loosly based on i82365.c from the pcmcia-cs package 7 * Loosly based on i82365.c from the pcmcia-cs package
8 * 8 *
9 * $Id: i82092aa.c,v 1.2 2001/10/23 14:43:34 arjanv Exp $ 9 * $Id: i82092aa.c,v 1.2 2001/10/23 14:43:34 arjanv Exp $
10 */ 10 */
11 11
12 #include <linux/kernel.h> 12 #include <linux/kernel.h>
13 #include <linux/module.h> 13 #include <linux/module.h>
14 #include <linux/pci.h> 14 #include <linux/pci.h>
15 #include <linux/init.h> 15 #include <linux/init.h>
16 #include <linux/workqueue.h> 16 #include <linux/workqueue.h>
17 #include <linux/interrupt.h> 17 #include <linux/interrupt.h>
18 #include <linux/device.h> 18 #include <linux/device.h>
19 19
20 #include <pcmcia/cs_types.h> 20 #include <pcmcia/cs_types.h>
21 #include <pcmcia/ss.h> 21 #include <pcmcia/ss.h>
22 #include <pcmcia/cs.h> 22 #include <pcmcia/cs.h>
23 23
24 #include <asm/system.h> 24 #include <asm/system.h>
25 #include <asm/io.h> 25 #include <asm/io.h>
26 26
27 #include "i82092aa.h" 27 #include "i82092aa.h"
28 #include "i82365.h" 28 #include "i82365.h"
29 29
30 MODULE_LICENSE("GPL"); 30 MODULE_LICENSE("GPL");
31 31
32 /* PCI core routines */ 32 /* PCI core routines */
33 static struct pci_device_id i82092aa_pci_ids[] = { 33 static struct pci_device_id i82092aa_pci_ids[] = {
34 { 34 {
35 .vendor = PCI_VENDOR_ID_INTEL, 35 .vendor = PCI_VENDOR_ID_INTEL,
36 .device = PCI_DEVICE_ID_INTEL_82092AA_0, 36 .device = PCI_DEVICE_ID_INTEL_82092AA_0,
37 .subvendor = PCI_ANY_ID, 37 .subvendor = PCI_ANY_ID,
38 .subdevice = PCI_ANY_ID, 38 .subdevice = PCI_ANY_ID,
39 }, 39 },
40 {} 40 {}
41 }; 41 };
42 MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids); 42 MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids);
43 43
44 #ifdef CONFIG_PM 44 #ifdef CONFIG_PM
45 static int i82092aa_socket_suspend (struct pci_dev *dev, pm_message_t state) 45 static int i82092aa_socket_suspend (struct pci_dev *dev, pm_message_t state)
46 { 46 {
47 return pcmcia_socket_dev_suspend(&dev->dev, state); 47 return pcmcia_socket_dev_suspend(&dev->dev, state);
48 } 48 }
49 49
50 static int i82092aa_socket_resume (struct pci_dev *dev) 50 static int i82092aa_socket_resume (struct pci_dev *dev)
51 { 51 {
52 return pcmcia_socket_dev_resume(&dev->dev); 52 return pcmcia_socket_dev_resume(&dev->dev);
53 } 53 }
54 #endif 54 #endif
55 55
56 static struct pci_driver i82092aa_pci_drv = { 56 static struct pci_driver i82092aa_pci_driver = {
57 .name = "i82092aa", 57 .name = "i82092aa",
58 .id_table = i82092aa_pci_ids, 58 .id_table = i82092aa_pci_ids,
59 .probe = i82092aa_pci_probe, 59 .probe = i82092aa_pci_probe,
60 .remove = __devexit_p(i82092aa_pci_remove), 60 .remove = __devexit_p(i82092aa_pci_remove),
61 #ifdef CONFIG_PM 61 #ifdef CONFIG_PM
62 .suspend = i82092aa_socket_suspend, 62 .suspend = i82092aa_socket_suspend,
63 .resume = i82092aa_socket_resume, 63 .resume = i82092aa_socket_resume,
64 #endif 64 #endif
65 }; 65 };
66 66
67 67
68 /* the pccard structure and its functions */ 68 /* the pccard structure and its functions */
69 static struct pccard_operations i82092aa_operations = { 69 static struct pccard_operations i82092aa_operations = {
70 .init = i82092aa_init, 70 .init = i82092aa_init,
71 .get_status = i82092aa_get_status, 71 .get_status = i82092aa_get_status,
72 .set_socket = i82092aa_set_socket, 72 .set_socket = i82092aa_set_socket,
73 .set_io_map = i82092aa_set_io_map, 73 .set_io_map = i82092aa_set_io_map,
74 .set_mem_map = i82092aa_set_mem_map, 74 .set_mem_map = i82092aa_set_mem_map,
75 }; 75 };
76 76
77 /* The card can do upto 4 sockets, allocate a structure for each of them */ 77 /* The card can do upto 4 sockets, allocate a structure for each of them */
78 78
79 struct socket_info { 79 struct socket_info {
80 int number; 80 int number;
81 int card_state; /* 0 = no socket, 81 int card_state; /* 0 = no socket,
82 1 = empty socket, 82 1 = empty socket,
83 2 = card but not initialized, 83 2 = card but not initialized,
84 3 = operational card */ 84 3 = operational card */
85 unsigned int io_base; /* base io address of the socket */ 85 unsigned int io_base; /* base io address of the socket */
86 86
87 struct pcmcia_socket socket; 87 struct pcmcia_socket socket;
88 struct pci_dev *dev; /* The PCI device for the socket */ 88 struct pci_dev *dev; /* The PCI device for the socket */
89 }; 89 };
90 90
91 #define MAX_SOCKETS 4 91 #define MAX_SOCKETS 4
92 static struct socket_info sockets[MAX_SOCKETS]; 92 static struct socket_info sockets[MAX_SOCKETS];
93 static int socket_count; /* shortcut */ 93 static int socket_count; /* shortcut */
94 94
95 95
96 static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 96 static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
97 { 97 {
98 unsigned char configbyte; 98 unsigned char configbyte;
99 int i, ret; 99 int i, ret;
100 100
101 enter("i82092aa_pci_probe"); 101 enter("i82092aa_pci_probe");
102 102
103 if ((ret = pci_enable_device(dev))) 103 if ((ret = pci_enable_device(dev)))
104 return ret; 104 return ret;
105 105
106 pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */ 106 pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */
107 switch(configbyte&6) { 107 switch(configbyte&6) {
108 case 0: 108 case 0:
109 socket_count = 2; 109 socket_count = 2;
110 break; 110 break;
111 case 2: 111 case 2:
112 socket_count = 1; 112 socket_count = 1;
113 break; 113 break;
114 case 4: 114 case 4:
115 case 6: 115 case 6:
116 socket_count = 4; 116 socket_count = 4;
117 break; 117 break;
118 118
119 default: 119 default:
120 printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n"); 120 printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n");
121 ret = -EIO; 121 ret = -EIO;
122 goto err_out_disable; 122 goto err_out_disable;
123 } 123 }
124 printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count); 124 printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count);
125 125
126 if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) { 126 if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) {
127 ret = -EBUSY; 127 ret = -EBUSY;
128 goto err_out_disable; 128 goto err_out_disable;
129 } 129 }
130 130
131 for (i = 0;i<socket_count;i++) { 131 for (i = 0;i<socket_count;i++) {
132 sockets[i].card_state = 1; /* 1 = present but empty */ 132 sockets[i].card_state = 1; /* 1 = present but empty */
133 sockets[i].io_base = pci_resource_start(dev, 0); 133 sockets[i].io_base = pci_resource_start(dev, 0);
134 sockets[i].socket.features |= SS_CAP_PCCARD; 134 sockets[i].socket.features |= SS_CAP_PCCARD;
135 sockets[i].socket.map_size = 0x1000; 135 sockets[i].socket.map_size = 0x1000;
136 sockets[i].socket.irq_mask = 0; 136 sockets[i].socket.irq_mask = 0;
137 sockets[i].socket.pci_irq = dev->irq; 137 sockets[i].socket.pci_irq = dev->irq;
138 sockets[i].socket.owner = THIS_MODULE; 138 sockets[i].socket.owner = THIS_MODULE;
139 139
140 sockets[i].number = i; 140 sockets[i].number = i;
141 141
142 if (card_present(i)) { 142 if (card_present(i)) {
143 sockets[i].card_state = 3; 143 sockets[i].card_state = 3;
144 dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i); 144 dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i);
145 } else { 145 } else {
146 dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i); 146 dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i);
147 } 147 }
148 } 148 }
149 149
150 /* Now, specifiy that all interrupts are to be done as PCI interrupts */ 150 /* Now, specifiy that all interrupts are to be done as PCI interrupts */
151 configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */ 151 configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */
152 pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */ 152 pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */
153 153
154 /* Register the interrupt handler */ 154 /* Register the interrupt handler */
155 dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq); 155 dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq);
156 if ((ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED, "i82092aa", i82092aa_interrupt))) { 156 if ((ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED, "i82092aa", i82092aa_interrupt))) {
157 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq); 157 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq);
158 goto err_out_free_res; 158 goto err_out_free_res;
159 } 159 }
160 160
161 pci_set_drvdata(dev, &sockets[i].socket); 161 pci_set_drvdata(dev, &sockets[i].socket);
162 162
163 for (i = 0; i<socket_count; i++) { 163 for (i = 0; i<socket_count; i++) {
164 sockets[i].socket.dev.parent = &dev->dev; 164 sockets[i].socket.dev.parent = &dev->dev;
165 sockets[i].socket.ops = &i82092aa_operations; 165 sockets[i].socket.ops = &i82092aa_operations;
166 sockets[i].socket.resource_ops = &pccard_nonstatic_ops; 166 sockets[i].socket.resource_ops = &pccard_nonstatic_ops;
167 ret = pcmcia_register_socket(&sockets[i].socket); 167 ret = pcmcia_register_socket(&sockets[i].socket);
168 if (ret) { 168 if (ret) {
169 goto err_out_free_sockets; 169 goto err_out_free_sockets;
170 } 170 }
171 } 171 }
172 172
173 leave("i82092aa_pci_probe"); 173 leave("i82092aa_pci_probe");
174 return 0; 174 return 0;
175 175
176 err_out_free_sockets: 176 err_out_free_sockets:
177 if (i) { 177 if (i) {
178 for (i--;i>=0;i--) { 178 for (i--;i>=0;i--) {
179 pcmcia_unregister_socket(&sockets[i].socket); 179 pcmcia_unregister_socket(&sockets[i].socket);
180 } 180 }
181 } 181 }
182 free_irq(dev->irq, i82092aa_interrupt); 182 free_irq(dev->irq, i82092aa_interrupt);
183 err_out_free_res: 183 err_out_free_res:
184 release_region(pci_resource_start(dev, 0), 2); 184 release_region(pci_resource_start(dev, 0), 2);
185 err_out_disable: 185 err_out_disable:
186 pci_disable_device(dev); 186 pci_disable_device(dev);
187 return ret; 187 return ret;
188 } 188 }
189 189
190 static void __devexit i82092aa_pci_remove(struct pci_dev *dev) 190 static void __devexit i82092aa_pci_remove(struct pci_dev *dev)
191 { 191 {
192 struct pcmcia_socket *socket = pci_get_drvdata(dev); 192 struct pcmcia_socket *socket = pci_get_drvdata(dev);
193 193
194 enter("i82092aa_pci_remove"); 194 enter("i82092aa_pci_remove");
195 195
196 free_irq(dev->irq, i82092aa_interrupt); 196 free_irq(dev->irq, i82092aa_interrupt);
197 197
198 if (socket) 198 if (socket)
199 pcmcia_unregister_socket(socket); 199 pcmcia_unregister_socket(socket);
200 200
201 leave("i82092aa_pci_remove"); 201 leave("i82092aa_pci_remove");
202 } 202 }
203 203
204 static DEFINE_SPINLOCK(port_lock); 204 static DEFINE_SPINLOCK(port_lock);
205 205
206 /* basic value read/write functions */ 206 /* basic value read/write functions */
207 207
208 static unsigned char indirect_read(int socket, unsigned short reg) 208 static unsigned char indirect_read(int socket, unsigned short reg)
209 { 209 {
210 unsigned short int port; 210 unsigned short int port;
211 unsigned char val; 211 unsigned char val;
212 unsigned long flags; 212 unsigned long flags;
213 spin_lock_irqsave(&port_lock,flags); 213 spin_lock_irqsave(&port_lock,flags);
214 reg += socket * 0x40; 214 reg += socket * 0x40;
215 port = sockets[socket].io_base; 215 port = sockets[socket].io_base;
216 outb(reg,port); 216 outb(reg,port);
217 val = inb(port+1); 217 val = inb(port+1);
218 spin_unlock_irqrestore(&port_lock,flags); 218 spin_unlock_irqrestore(&port_lock,flags);
219 return val; 219 return val;
220 } 220 }
221 221
222 #if 0 222 #if 0
223 static unsigned short indirect_read16(int socket, unsigned short reg) 223 static unsigned short indirect_read16(int socket, unsigned short reg)
224 { 224 {
225 unsigned short int port; 225 unsigned short int port;
226 unsigned short tmp; 226 unsigned short tmp;
227 unsigned long flags; 227 unsigned long flags;
228 spin_lock_irqsave(&port_lock,flags); 228 spin_lock_irqsave(&port_lock,flags);
229 reg = reg + socket * 0x40; 229 reg = reg + socket * 0x40;
230 port = sockets[socket].io_base; 230 port = sockets[socket].io_base;
231 outb(reg,port); 231 outb(reg,port);
232 tmp = inb(port+1); 232 tmp = inb(port+1);
233 reg++; 233 reg++;
234 outb(reg,port); 234 outb(reg,port);
235 tmp = tmp | (inb(port+1)<<8); 235 tmp = tmp | (inb(port+1)<<8);
236 spin_unlock_irqrestore(&port_lock,flags); 236 spin_unlock_irqrestore(&port_lock,flags);
237 return tmp; 237 return tmp;
238 } 238 }
239 #endif 239 #endif
240 240
241 static void indirect_write(int socket, unsigned short reg, unsigned char value) 241 static void indirect_write(int socket, unsigned short reg, unsigned char value)
242 { 242 {
243 unsigned short int port; 243 unsigned short int port;
244 unsigned long flags; 244 unsigned long flags;
245 spin_lock_irqsave(&port_lock,flags); 245 spin_lock_irqsave(&port_lock,flags);
246 reg = reg + socket * 0x40; 246 reg = reg + socket * 0x40;
247 port = sockets[socket].io_base; 247 port = sockets[socket].io_base;
248 outb(reg,port); 248 outb(reg,port);
249 outb(value,port+1); 249 outb(value,port+1);
250 spin_unlock_irqrestore(&port_lock,flags); 250 spin_unlock_irqrestore(&port_lock,flags);
251 } 251 }
252 252
253 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask) 253 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask)
254 { 254 {
255 unsigned short int port; 255 unsigned short int port;
256 unsigned char val; 256 unsigned char val;
257 unsigned long flags; 257 unsigned long flags;
258 spin_lock_irqsave(&port_lock,flags); 258 spin_lock_irqsave(&port_lock,flags);
259 reg = reg + socket * 0x40; 259 reg = reg + socket * 0x40;
260 port = sockets[socket].io_base; 260 port = sockets[socket].io_base;
261 outb(reg,port); 261 outb(reg,port);
262 val = inb(port+1); 262 val = inb(port+1);
263 val |= mask; 263 val |= mask;
264 outb(reg,port); 264 outb(reg,port);
265 outb(val,port+1); 265 outb(val,port+1);
266 spin_unlock_irqrestore(&port_lock,flags); 266 spin_unlock_irqrestore(&port_lock,flags);
267 } 267 }
268 268
269 269
270 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask) 270 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask)
271 { 271 {
272 unsigned short int port; 272 unsigned short int port;
273 unsigned char val; 273 unsigned char val;
274 unsigned long flags; 274 unsigned long flags;
275 spin_lock_irqsave(&port_lock,flags); 275 spin_lock_irqsave(&port_lock,flags);
276 reg = reg + socket * 0x40; 276 reg = reg + socket * 0x40;
277 port = sockets[socket].io_base; 277 port = sockets[socket].io_base;
278 outb(reg,port); 278 outb(reg,port);
279 val = inb(port+1); 279 val = inb(port+1);
280 val &= ~mask; 280 val &= ~mask;
281 outb(reg,port); 281 outb(reg,port);
282 outb(val,port+1); 282 outb(val,port+1);
283 spin_unlock_irqrestore(&port_lock,flags); 283 spin_unlock_irqrestore(&port_lock,flags);
284 } 284 }
285 285
286 static void indirect_write16(int socket, unsigned short reg, unsigned short value) 286 static void indirect_write16(int socket, unsigned short reg, unsigned short value)
287 { 287 {
288 unsigned short int port; 288 unsigned short int port;
289 unsigned char val; 289 unsigned char val;
290 unsigned long flags; 290 unsigned long flags;
291 spin_lock_irqsave(&port_lock,flags); 291 spin_lock_irqsave(&port_lock,flags);
292 reg = reg + socket * 0x40; 292 reg = reg + socket * 0x40;
293 port = sockets[socket].io_base; 293 port = sockets[socket].io_base;
294 294
295 outb(reg,port); 295 outb(reg,port);
296 val = value & 255; 296 val = value & 255;
297 outb(val,port+1); 297 outb(val,port+1);
298 298
299 reg++; 299 reg++;
300 300
301 outb(reg,port); 301 outb(reg,port);
302 val = value>>8; 302 val = value>>8;
303 outb(val,port+1); 303 outb(val,port+1);
304 spin_unlock_irqrestore(&port_lock,flags); 304 spin_unlock_irqrestore(&port_lock,flags);
305 } 305 }
306 306
307 /* simple helper functions */ 307 /* simple helper functions */
308 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */ 308 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */
309 static int cycle_time = 120; 309 static int cycle_time = 120;
310 310
311 static int to_cycles(int ns) 311 static int to_cycles(int ns)
312 { 312 {
313 if (cycle_time!=0) 313 if (cycle_time!=0)
314 return ns/cycle_time; 314 return ns/cycle_time;
315 else 315 else
316 return 0; 316 return 0;
317 } 317 }
318 318
319 319
320 /* Interrupt handler functionality */ 320 /* Interrupt handler functionality */
321 321
322 static irqreturn_t i82092aa_interrupt(int irq, void *dev) 322 static irqreturn_t i82092aa_interrupt(int irq, void *dev)
323 { 323 {
324 int i; 324 int i;
325 int loopcount = 0; 325 int loopcount = 0;
326 int handled = 0; 326 int handled = 0;
327 327
328 unsigned int events, active=0; 328 unsigned int events, active=0;
329 329
330 /* enter("i82092aa_interrupt");*/ 330 /* enter("i82092aa_interrupt");*/
331 331
332 while (1) { 332 while (1) {
333 loopcount++; 333 loopcount++;
334 if (loopcount>20) { 334 if (loopcount>20) {
335 printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n"); 335 printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n");
336 break; 336 break;
337 } 337 }
338 338
339 active = 0; 339 active = 0;
340 340
341 for (i=0;i<socket_count;i++) { 341 for (i=0;i<socket_count;i++) {
342 int csc; 342 int csc;
343 if (sockets[i].card_state==0) /* Inactive socket, should not happen */ 343 if (sockets[i].card_state==0) /* Inactive socket, should not happen */
344 continue; 344 continue;
345 345
346 csc = indirect_read(i,I365_CSC); /* card status change register */ 346 csc = indirect_read(i,I365_CSC); /* card status change register */
347 347
348 if (csc==0) /* no events on this socket */ 348 if (csc==0) /* no events on this socket */
349 continue; 349 continue;
350 handled = 1; 350 handled = 1;
351 events = 0; 351 events = 0;
352 352
353 if (csc & I365_CSC_DETECT) { 353 if (csc & I365_CSC_DETECT) {
354 events |= SS_DETECT; 354 events |= SS_DETECT;
355 printk("Card detected in socket %i!\n",i); 355 printk("Card detected in socket %i!\n",i);
356 } 356 }
357 357
358 if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) { 358 if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) {
359 /* For IO/CARDS, bit 0 means "read the card" */ 359 /* For IO/CARDS, bit 0 means "read the card" */
360 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0; 360 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
361 } else { 361 } else {
362 /* Check for battery/ready events */ 362 /* Check for battery/ready events */
363 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0; 363 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
364 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0; 364 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
365 events |= (csc & I365_CSC_READY) ? SS_READY : 0; 365 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
366 } 366 }
367 367
368 if (events) { 368 if (events) {
369 pcmcia_parse_events(&sockets[i].socket, events); 369 pcmcia_parse_events(&sockets[i].socket, events);
370 } 370 }
371 active |= events; 371 active |= events;
372 } 372 }
373 373
374 if (active==0) /* no more events to handle */ 374 if (active==0) /* no more events to handle */
375 break; 375 break;
376 376
377 } 377 }
378 return IRQ_RETVAL(handled); 378 return IRQ_RETVAL(handled);
379 /* leave("i82092aa_interrupt");*/ 379 /* leave("i82092aa_interrupt");*/
380 } 380 }
381 381
382 382
383 383
384 /* socket functions */ 384 /* socket functions */
385 385
386 static int card_present(int socketno) 386 static int card_present(int socketno)
387 { 387 {
388 unsigned int val; 388 unsigned int val;
389 enter("card_present"); 389 enter("card_present");
390 390
391 if ((socketno<0) || (socketno >= MAX_SOCKETS)) 391 if ((socketno<0) || (socketno >= MAX_SOCKETS))
392 return 0; 392 return 0;
393 if (sockets[socketno].io_base == 0) 393 if (sockets[socketno].io_base == 0)
394 return 0; 394 return 0;
395 395
396 396
397 val = indirect_read(socketno, 1); /* Interface status register */ 397 val = indirect_read(socketno, 1); /* Interface status register */
398 if ((val&12)==12) { 398 if ((val&12)==12) {
399 leave("card_present 1"); 399 leave("card_present 1");
400 return 1; 400 return 1;
401 } 401 }
402 402
403 leave("card_present 0"); 403 leave("card_present 0");
404 return 0; 404 return 0;
405 } 405 }
406 406
407 static void set_bridge_state(int sock) 407 static void set_bridge_state(int sock)
408 { 408 {
409 enter("set_bridge_state"); 409 enter("set_bridge_state");
410 indirect_write(sock, I365_GBLCTL,0x00); 410 indirect_write(sock, I365_GBLCTL,0x00);
411 indirect_write(sock, I365_GENCTL,0x00); 411 indirect_write(sock, I365_GENCTL,0x00);
412 412
413 indirect_setbit(sock, I365_INTCTL,0x08); 413 indirect_setbit(sock, I365_INTCTL,0x08);
414 leave("set_bridge_state"); 414 leave("set_bridge_state");
415 } 415 }
416 416
417 417
418 418
419 419
420 420
421 421
422 static int i82092aa_init(struct pcmcia_socket *sock) 422 static int i82092aa_init(struct pcmcia_socket *sock)
423 { 423 {
424 int i; 424 int i;
425 struct resource res = { .start = 0, .end = 0x0fff }; 425 struct resource res = { .start = 0, .end = 0x0fff };
426 pccard_io_map io = { 0, 0, 0, 0, 1 }; 426 pccard_io_map io = { 0, 0, 0, 0, 1 };
427 pccard_mem_map mem = { .res = &res, }; 427 pccard_mem_map mem = { .res = &res, };
428 428
429 enter("i82092aa_init"); 429 enter("i82092aa_init");
430 430
431 for (i = 0; i < 2; i++) { 431 for (i = 0; i < 2; i++) {
432 io.map = i; 432 io.map = i;
433 i82092aa_set_io_map(sock, &io); 433 i82092aa_set_io_map(sock, &io);
434 } 434 }
435 for (i = 0; i < 5; i++) { 435 for (i = 0; i < 5; i++) {
436 mem.map = i; 436 mem.map = i;
437 i82092aa_set_mem_map(sock, &mem); 437 i82092aa_set_mem_map(sock, &mem);
438 } 438 }
439 439
440 leave("i82092aa_init"); 440 leave("i82092aa_init");
441 return 0; 441 return 0;
442 } 442 }
443 443
444 static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value) 444 static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value)
445 { 445 {
446 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 446 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
447 unsigned int status; 447 unsigned int status;
448 448
449 enter("i82092aa_get_status"); 449 enter("i82092aa_get_status");
450 450
451 status = indirect_read(sock,I365_STATUS); /* Interface Status Register */ 451 status = indirect_read(sock,I365_STATUS); /* Interface Status Register */
452 *value = 0; 452 *value = 0;
453 453
454 if ((status & I365_CS_DETECT) == I365_CS_DETECT) { 454 if ((status & I365_CS_DETECT) == I365_CS_DETECT) {
455 *value |= SS_DETECT; 455 *value |= SS_DETECT;
456 } 456 }
457 457
458 /* IO cards have a different meaning of bits 0,1 */ 458 /* IO cards have a different meaning of bits 0,1 */
459 /* Also notice the inverse-logic on the bits */ 459 /* Also notice the inverse-logic on the bits */
460 if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) { 460 if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) {
461 /* IO card */ 461 /* IO card */
462 if (!(status & I365_CS_STSCHG)) 462 if (!(status & I365_CS_STSCHG))
463 *value |= SS_STSCHG; 463 *value |= SS_STSCHG;
464 } else { /* non I/O card */ 464 } else { /* non I/O card */
465 if (!(status & I365_CS_BVD1)) 465 if (!(status & I365_CS_BVD1))
466 *value |= SS_BATDEAD; 466 *value |= SS_BATDEAD;
467 if (!(status & I365_CS_BVD2)) 467 if (!(status & I365_CS_BVD2))
468 *value |= SS_BATWARN; 468 *value |= SS_BATWARN;
469 469
470 } 470 }
471 471
472 if (status & I365_CS_WRPROT) 472 if (status & I365_CS_WRPROT)
473 (*value) |= SS_WRPROT; /* card is write protected */ 473 (*value) |= SS_WRPROT; /* card is write protected */
474 474
475 if (status & I365_CS_READY) 475 if (status & I365_CS_READY)
476 (*value) |= SS_READY; /* card is not busy */ 476 (*value) |= SS_READY; /* card is not busy */
477 477
478 if (status & I365_CS_POWERON) 478 if (status & I365_CS_POWERON)
479 (*value) |= SS_POWERON; /* power is applied to the card */ 479 (*value) |= SS_POWERON; /* power is applied to the card */
480 480
481 481
482 leave("i82092aa_get_status"); 482 leave("i82092aa_get_status");
483 return 0; 483 return 0;
484 } 484 }
485 485
486 486
487 static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state) 487 static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state)
488 { 488 {
489 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 489 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
490 unsigned char reg; 490 unsigned char reg;
491 491
492 enter("i82092aa_set_socket"); 492 enter("i82092aa_set_socket");
493 493
494 /* First, set the global controller options */ 494 /* First, set the global controller options */
495 495
496 set_bridge_state(sock); 496 set_bridge_state(sock);
497 497
498 /* Values for the IGENC register */ 498 /* Values for the IGENC register */
499 499
500 reg = 0; 500 reg = 0;
501 if (!(state->flags & SS_RESET)) /* The reset bit has "inverse" logic */ 501 if (!(state->flags & SS_RESET)) /* The reset bit has "inverse" logic */
502 reg = reg | I365_PC_RESET; 502 reg = reg | I365_PC_RESET;
503 if (state->flags & SS_IOCARD) 503 if (state->flags & SS_IOCARD)
504 reg = reg | I365_PC_IOCARD; 504 reg = reg | I365_PC_IOCARD;
505 505
506 indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */ 506 indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */
507 507
508 /* Power registers */ 508 /* Power registers */
509 509
510 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ 510 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
511 511
512 if (state->flags & SS_PWR_AUTO) { 512 if (state->flags & SS_PWR_AUTO) {
513 printk("Auto power\n"); 513 printk("Auto power\n");
514 reg |= I365_PWR_AUTO; /* automatic power mngmnt */ 514 reg |= I365_PWR_AUTO; /* automatic power mngmnt */
515 } 515 }
516 if (state->flags & SS_OUTPUT_ENA) { 516 if (state->flags & SS_OUTPUT_ENA) {
517 printk("Power Enabled \n"); 517 printk("Power Enabled \n");
518 reg |= I365_PWR_OUT; /* enable power */ 518 reg |= I365_PWR_OUT; /* enable power */
519 } 519 }
520 520
521 switch (state->Vcc) { 521 switch (state->Vcc) {
522 case 0: 522 case 0:
523 break; 523 break;
524 case 50: 524 case 50:
525 printk("setting voltage to Vcc to 5V on socket %i\n",sock); 525 printk("setting voltage to Vcc to 5V on socket %i\n",sock);
526 reg |= I365_VCC_5V; 526 reg |= I365_VCC_5V;
527 break; 527 break;
528 default: 528 default:
529 printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc); 529 printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc);
530 leave("i82092aa_set_socket"); 530 leave("i82092aa_set_socket");
531 return -EINVAL; 531 return -EINVAL;
532 } 532 }
533 533
534 534
535 switch (state->Vpp) { 535 switch (state->Vpp) {
536 case 0: 536 case 0:
537 printk("not setting Vpp on socket %i\n",sock); 537 printk("not setting Vpp on socket %i\n",sock);
538 break; 538 break;
539 case 50: 539 case 50:
540 printk("setting Vpp to 5.0 for socket %i\n",sock); 540 printk("setting Vpp to 5.0 for socket %i\n",sock);
541 reg |= I365_VPP1_5V | I365_VPP2_5V; 541 reg |= I365_VPP1_5V | I365_VPP2_5V;
542 break; 542 break;
543 case 120: 543 case 120:
544 printk("setting Vpp to 12.0\n"); 544 printk("setting Vpp to 12.0\n");
545 reg |= I365_VPP1_12V | I365_VPP2_12V; 545 reg |= I365_VPP1_12V | I365_VPP2_12V;
546 break; 546 break;
547 default: 547 default:
548 printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc); 548 printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc);
549 leave("i82092aa_set_socket"); 549 leave("i82092aa_set_socket");
550 return -EINVAL; 550 return -EINVAL;
551 } 551 }
552 552
553 if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */ 553 if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */
554 indirect_write(sock,I365_POWER,reg); 554 indirect_write(sock,I365_POWER,reg);
555 555
556 /* Enable specific interrupt events */ 556 /* Enable specific interrupt events */
557 557
558 reg = 0x00; 558 reg = 0x00;
559 if (state->csc_mask & SS_DETECT) { 559 if (state->csc_mask & SS_DETECT) {
560 reg |= I365_CSC_DETECT; 560 reg |= I365_CSC_DETECT;
561 } 561 }
562 if (state->flags & SS_IOCARD) { 562 if (state->flags & SS_IOCARD) {
563 if (state->csc_mask & SS_STSCHG) 563 if (state->csc_mask & SS_STSCHG)
564 reg |= I365_CSC_STSCHG; 564 reg |= I365_CSC_STSCHG;
565 } else { 565 } else {
566 if (state->csc_mask & SS_BATDEAD) 566 if (state->csc_mask & SS_BATDEAD)
567 reg |= I365_CSC_BVD1; 567 reg |= I365_CSC_BVD1;
568 if (state->csc_mask & SS_BATWARN) 568 if (state->csc_mask & SS_BATWARN)
569 reg |= I365_CSC_BVD2; 569 reg |= I365_CSC_BVD2;
570 if (state->csc_mask & SS_READY) 570 if (state->csc_mask & SS_READY)
571 reg |= I365_CSC_READY; 571 reg |= I365_CSC_READY;
572 572
573 } 573 }
574 574
575 /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/ 575 /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/
576 576
577 indirect_write(sock,I365_CSCINT,reg); 577 indirect_write(sock,I365_CSCINT,reg);
578 (void)indirect_read(sock,I365_CSC); 578 (void)indirect_read(sock,I365_CSC);
579 579
580 leave("i82092aa_set_socket"); 580 leave("i82092aa_set_socket");
581 return 0; 581 return 0;
582 } 582 }
583 583
584 static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io) 584 static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io)
585 { 585 {
586 unsigned int sock = container_of(socket, struct socket_info, socket)->number; 586 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
587 unsigned char map, ioctl; 587 unsigned char map, ioctl;
588 588
589 enter("i82092aa_set_io_map"); 589 enter("i82092aa_set_io_map");
590 590
591 map = io->map; 591 map = io->map;
592 592
593 /* Check error conditions */ 593 /* Check error conditions */
594 if (map > 1) { 594 if (map > 1) {
595 leave("i82092aa_set_io_map with invalid map"); 595 leave("i82092aa_set_io_map with invalid map");
596 return -EINVAL; 596 return -EINVAL;
597 } 597 }
598 if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){ 598 if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){
599 leave("i82092aa_set_io_map with invalid io"); 599 leave("i82092aa_set_io_map with invalid io");
600 return -EINVAL; 600 return -EINVAL;
601 } 601 }
602 602
603 /* Turn off the window before changing anything */ 603 /* Turn off the window before changing anything */
604 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map)) 604 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map))
605 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map)); 605 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map));
606 606
607 /* printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop); */ 607 /* printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop); */
608 608
609 /* write the new values */ 609 /* write the new values */
610 indirect_write16(sock,I365_IO(map)+I365_W_START,io->start); 610 indirect_write16(sock,I365_IO(map)+I365_W_START,io->start);
611 indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop); 611 indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop);
612 612
613 ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map); 613 ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map);
614 614
615 if (io->flags & (MAP_16BIT|MAP_AUTOSZ)) 615 if (io->flags & (MAP_16BIT|MAP_AUTOSZ))
616 ioctl |= I365_IOCTL_16BIT(map); 616 ioctl |= I365_IOCTL_16BIT(map);
617 617
618 indirect_write(sock,I365_IOCTL,ioctl); 618 indirect_write(sock,I365_IOCTL,ioctl);
619 619
620 /* Turn the window back on if needed */ 620 /* Turn the window back on if needed */
621 if (io->flags & MAP_ACTIVE) 621 if (io->flags & MAP_ACTIVE)
622 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map)); 622 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map));
623 623
624 leave("i82092aa_set_io_map"); 624 leave("i82092aa_set_io_map");
625 return 0; 625 return 0;
626 } 626 }
627 627
628 static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem) 628 static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem)
629 { 629 {
630 struct socket_info *sock_info = container_of(socket, struct socket_info, socket); 630 struct socket_info *sock_info = container_of(socket, struct socket_info, socket);
631 unsigned int sock = sock_info->number; 631 unsigned int sock = sock_info->number;
632 struct pci_bus_region region; 632 struct pci_bus_region region;
633 unsigned short base, i; 633 unsigned short base, i;
634 unsigned char map; 634 unsigned char map;
635 635
636 enter("i82092aa_set_mem_map"); 636 enter("i82092aa_set_mem_map");
637 637
638 pcibios_resource_to_bus(sock_info->dev, &region, mem->res); 638 pcibios_resource_to_bus(sock_info->dev, &region, mem->res);
639 639
640 map = mem->map; 640 map = mem->map;
641 if (map > 4) { 641 if (map > 4) {
642 leave("i82092aa_set_mem_map: invalid map"); 642 leave("i82092aa_set_mem_map: invalid map");
643 return -EINVAL; 643 return -EINVAL;
644 } 644 }
645 645
646 646
647 if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) || 647 if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) ||
648 (mem->speed > 1000) ) { 648 (mem->speed > 1000) ) {
649 leave("i82092aa_set_mem_map: invalid address / speed"); 649 leave("i82092aa_set_mem_map: invalid address / speed");
650 printk("invalid mem map for socket %i: %llx to %llx with a " 650 printk("invalid mem map for socket %i: %llx to %llx with a "
651 "start of %x\n", 651 "start of %x\n",
652 sock, 652 sock,
653 (unsigned long long)region.start, 653 (unsigned long long)region.start,
654 (unsigned long long)region.end, 654 (unsigned long long)region.end,
655 mem->card_start); 655 mem->card_start);
656 return -EINVAL; 656 return -EINVAL;
657 } 657 }
658 658
659 /* Turn off the window before changing anything */ 659 /* Turn off the window before changing anything */
660 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map)) 660 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
661 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 661 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
662 662
663 663
664 /* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE); */ 664 /* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE); */
665 665
666 /* write the start address */ 666 /* write the start address */
667 base = I365_MEM(map); 667 base = I365_MEM(map);
668 i = (region.start >> 12) & 0x0fff; 668 i = (region.start >> 12) & 0x0fff;
669 if (mem->flags & MAP_16BIT) 669 if (mem->flags & MAP_16BIT)
670 i |= I365_MEM_16BIT; 670 i |= I365_MEM_16BIT;
671 if (mem->flags & MAP_0WS) 671 if (mem->flags & MAP_0WS)
672 i |= I365_MEM_0WS; 672 i |= I365_MEM_0WS;
673 indirect_write16(sock,base+I365_W_START,i); 673 indirect_write16(sock,base+I365_W_START,i);
674 674
675 /* write the stop address */ 675 /* write the stop address */
676 676
677 i= (region.end >> 12) & 0x0fff; 677 i= (region.end >> 12) & 0x0fff;
678 switch (to_cycles(mem->speed)) { 678 switch (to_cycles(mem->speed)) {
679 case 0: 679 case 0:
680 break; 680 break;
681 case 1: 681 case 1:
682 i |= I365_MEM_WS0; 682 i |= I365_MEM_WS0;
683 break; 683 break;
684 case 2: 684 case 2:
685 i |= I365_MEM_WS1; 685 i |= I365_MEM_WS1;
686 break; 686 break;
687 default: 687 default:
688 i |= I365_MEM_WS1 | I365_MEM_WS0; 688 i |= I365_MEM_WS1 | I365_MEM_WS0;
689 break; 689 break;
690 } 690 }
691 691
692 indirect_write16(sock,base+I365_W_STOP,i); 692 indirect_write16(sock,base+I365_W_STOP,i);
693 693
694 /* card start */ 694 /* card start */
695 695
696 i = ((mem->card_start - region.start) >> 12) & 0x3fff; 696 i = ((mem->card_start - region.start) >> 12) & 0x3fff;
697 if (mem->flags & MAP_WRPROT) 697 if (mem->flags & MAP_WRPROT)
698 i |= I365_MEM_WRPROT; 698 i |= I365_MEM_WRPROT;
699 if (mem->flags & MAP_ATTRIB) { 699 if (mem->flags & MAP_ATTRIB) {
700 /* printk("requesting attribute memory for socket %i\n",sock);*/ 700 /* printk("requesting attribute memory for socket %i\n",sock);*/
701 i |= I365_MEM_REG; 701 i |= I365_MEM_REG;
702 } else { 702 } else {
703 /* printk("requesting normal memory for socket %i\n",sock);*/ 703 /* printk("requesting normal memory for socket %i\n",sock);*/
704 } 704 }
705 indirect_write16(sock,base+I365_W_OFF,i); 705 indirect_write16(sock,base+I365_W_OFF,i);
706 706
707 /* Enable the window if necessary */ 707 /* Enable the window if necessary */
708 if (mem->flags & MAP_ACTIVE) 708 if (mem->flags & MAP_ACTIVE)
709 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map)); 709 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
710 710
711 leave("i82092aa_set_mem_map"); 711 leave("i82092aa_set_mem_map");
712 return 0; 712 return 0;
713 } 713 }
714 714
715 static int i82092aa_module_init(void) 715 static int i82092aa_module_init(void)
716 { 716 {
717 return pci_register_driver(&i82092aa_pci_drv); 717 return pci_register_driver(&i82092aa_pci_driver);
718 } 718 }
719 719
720 static void i82092aa_module_exit(void) 720 static void i82092aa_module_exit(void)
721 { 721 {
722 enter("i82092aa_module_exit"); 722 enter("i82092aa_module_exit");
723 pci_unregister_driver(&i82092aa_pci_drv); 723 pci_unregister_driver(&i82092aa_pci_driver);
724 if (sockets[0].io_base>0) 724 if (sockets[0].io_base>0)
725 release_region(sockets[0].io_base, 2); 725 release_region(sockets[0].io_base, 2);
726 leave("i82092aa_module_exit"); 726 leave("i82092aa_module_exit");
727 } 727 }
728 728
729 module_init(i82092aa_module_init); 729 module_init(i82092aa_module_init);
730 module_exit(i82092aa_module_exit); 730 module_exit(i82092aa_module_exit);
731 731
732 732
drivers/pcmcia/pd6729.c
1 /* 1 /*
2 * Driver for the Cirrus PD6729 PCI-PCMCIA bridge. 2 * Driver for the Cirrus PD6729 PCI-PCMCIA bridge.
3 * 3 *
4 * Based on the i82092.c driver. 4 * Based on the i82092.c driver.
5 * 5 *
6 * This software may be used and distributed according to the terms of 6 * This software may be used and distributed according to the terms of
7 * the GNU General Public License, incorporated herein by reference. 7 * the GNU General Public License, incorporated herein by reference.
8 */ 8 */
9 9
10 #include <linux/kernel.h> 10 #include <linux/kernel.h>
11 #include <linux/module.h> 11 #include <linux/module.h>
12 #include <linux/pci.h> 12 #include <linux/pci.h>
13 #include <linux/init.h> 13 #include <linux/init.h>
14 #include <linux/workqueue.h> 14 #include <linux/workqueue.h>
15 #include <linux/interrupt.h> 15 #include <linux/interrupt.h>
16 #include <linux/device.h> 16 #include <linux/device.h>
17 17
18 #include <pcmcia/cs_types.h> 18 #include <pcmcia/cs_types.h>
19 #include <pcmcia/ss.h> 19 #include <pcmcia/ss.h>
20 #include <pcmcia/cs.h> 20 #include <pcmcia/cs.h>
21 21
22 #include <asm/system.h> 22 #include <asm/system.h>
23 #include <asm/io.h> 23 #include <asm/io.h>
24 24
25 #include "pd6729.h" 25 #include "pd6729.h"
26 #include "i82365.h" 26 #include "i82365.h"
27 #include "cirrus.h" 27 #include "cirrus.h"
28 28
29 MODULE_LICENSE("GPL"); 29 MODULE_LICENSE("GPL");
30 MODULE_DESCRIPTION("Driver for the Cirrus PD6729 PCI-PCMCIA bridge"); 30 MODULE_DESCRIPTION("Driver for the Cirrus PD6729 PCI-PCMCIA bridge");
31 MODULE_AUTHOR("Jun Komuro <komurojun-mbn@nifty.com>"); 31 MODULE_AUTHOR("Jun Komuro <komurojun-mbn@nifty.com>");
32 32
33 #define MAX_SOCKETS 2 33 #define MAX_SOCKETS 2
34 34
35 /* 35 /*
36 * simple helper functions 36 * simple helper functions
37 * External clock time, in nanoseconds. 120 ns = 8.33 MHz 37 * External clock time, in nanoseconds. 120 ns = 8.33 MHz
38 */ 38 */
39 #define to_cycles(ns) ((ns)/120) 39 #define to_cycles(ns) ((ns)/120)
40 40
41 #ifndef NO_IRQ 41 #ifndef NO_IRQ
42 #define NO_IRQ ((unsigned int)(0)) 42 #define NO_IRQ ((unsigned int)(0))
43 #endif 43 #endif
44 44
45 /* 45 /*
46 * PARAMETERS 46 * PARAMETERS
47 * irq_mode=n 47 * irq_mode=n
48 * Specifies the interrupt delivery mode. The default (1) is to use PCI 48 * Specifies the interrupt delivery mode. The default (1) is to use PCI
49 * interrupts; a value of 0 selects ISA interrupts. This must be set for 49 * interrupts; a value of 0 selects ISA interrupts. This must be set for
50 * correct operation of PCI card readers. 50 * correct operation of PCI card readers.
51 * 51 *
52 * irq_list=i,j,... 52 * irq_list=i,j,...
53 * This list limits the set of interrupts that can be used by PCMCIA 53 * This list limits the set of interrupts that can be used by PCMCIA
54 * cards. 54 * cards.
55 * The default list is 3,4,5,7,9,10,11. 55 * The default list is 3,4,5,7,9,10,11.
56 * (irq_list parameter is not used, if irq_mode = 1) 56 * (irq_list parameter is not used, if irq_mode = 1)
57 */ 57 */
58 58
59 static int irq_mode = 1; /* 0 = ISA interrupt, 1 = PCI interrupt */ 59 static int irq_mode = 1; /* 0 = ISA interrupt, 1 = PCI interrupt */
60 static int irq_list[16]; 60 static int irq_list[16];
61 static unsigned int irq_list_count = 0; 61 static unsigned int irq_list_count = 0;
62 62
63 module_param(irq_mode, int, 0444); 63 module_param(irq_mode, int, 0444);
64 module_param_array(irq_list, int, &irq_list_count, 0444); 64 module_param_array(irq_list, int, &irq_list_count, 0444);
65 MODULE_PARM_DESC(irq_mode, 65 MODULE_PARM_DESC(irq_mode,
66 "interrupt delivery mode. 0 = ISA, 1 = PCI. default is 1"); 66 "interrupt delivery mode. 0 = ISA, 1 = PCI. default is 1");
67 MODULE_PARM_DESC(irq_list, "interrupts that can be used by PCMCIA cards"); 67 MODULE_PARM_DESC(irq_list, "interrupts that can be used by PCMCIA cards");
68 68
69 static DEFINE_SPINLOCK(port_lock); 69 static DEFINE_SPINLOCK(port_lock);
70 70
71 /* basic value read/write functions */ 71 /* basic value read/write functions */
72 72
73 static unsigned char indirect_read(struct pd6729_socket *socket, 73 static unsigned char indirect_read(struct pd6729_socket *socket,
74 unsigned short reg) 74 unsigned short reg)
75 { 75 {
76 unsigned long port; 76 unsigned long port;
77 unsigned char val; 77 unsigned char val;
78 unsigned long flags; 78 unsigned long flags;
79 79
80 spin_lock_irqsave(&port_lock, flags); 80 spin_lock_irqsave(&port_lock, flags);
81 reg += socket->number * 0x40; 81 reg += socket->number * 0x40;
82 port = socket->io_base; 82 port = socket->io_base;
83 outb(reg, port); 83 outb(reg, port);
84 val = inb(port + 1); 84 val = inb(port + 1);
85 spin_unlock_irqrestore(&port_lock, flags); 85 spin_unlock_irqrestore(&port_lock, flags);
86 86
87 return val; 87 return val;
88 } 88 }
89 89
90 static unsigned short indirect_read16(struct pd6729_socket *socket, 90 static unsigned short indirect_read16(struct pd6729_socket *socket,
91 unsigned short reg) 91 unsigned short reg)
92 { 92 {
93 unsigned long port; 93 unsigned long port;
94 unsigned short tmp; 94 unsigned short tmp;
95 unsigned long flags; 95 unsigned long flags;
96 96
97 spin_lock_irqsave(&port_lock, flags); 97 spin_lock_irqsave(&port_lock, flags);
98 reg = reg + socket->number * 0x40; 98 reg = reg + socket->number * 0x40;
99 port = socket->io_base; 99 port = socket->io_base;
100 outb(reg, port); 100 outb(reg, port);
101 tmp = inb(port + 1); 101 tmp = inb(port + 1);
102 reg++; 102 reg++;
103 outb(reg, port); 103 outb(reg, port);
104 tmp = tmp | (inb(port + 1) << 8); 104 tmp = tmp | (inb(port + 1) << 8);
105 spin_unlock_irqrestore(&port_lock, flags); 105 spin_unlock_irqrestore(&port_lock, flags);
106 106
107 return tmp; 107 return tmp;
108 } 108 }
109 109
110 static void indirect_write(struct pd6729_socket *socket, unsigned short reg, 110 static void indirect_write(struct pd6729_socket *socket, unsigned short reg,
111 unsigned char value) 111 unsigned char value)
112 { 112 {
113 unsigned long port; 113 unsigned long port;
114 unsigned long flags; 114 unsigned long flags;
115 115
116 spin_lock_irqsave(&port_lock, flags); 116 spin_lock_irqsave(&port_lock, flags);
117 reg = reg + socket->number * 0x40; 117 reg = reg + socket->number * 0x40;
118 port = socket->io_base; 118 port = socket->io_base;
119 outb(reg, port); 119 outb(reg, port);
120 outb(value, port + 1); 120 outb(value, port + 1);
121 spin_unlock_irqrestore(&port_lock, flags); 121 spin_unlock_irqrestore(&port_lock, flags);
122 } 122 }
123 123
124 static void indirect_setbit(struct pd6729_socket *socket, unsigned short reg, 124 static void indirect_setbit(struct pd6729_socket *socket, unsigned short reg,
125 unsigned char mask) 125 unsigned char mask)
126 { 126 {
127 unsigned long port; 127 unsigned long port;
128 unsigned char val; 128 unsigned char val;
129 unsigned long flags; 129 unsigned long flags;
130 130
131 spin_lock_irqsave(&port_lock, flags); 131 spin_lock_irqsave(&port_lock, flags);
132 reg = reg + socket->number * 0x40; 132 reg = reg + socket->number * 0x40;
133 port = socket->io_base; 133 port = socket->io_base;
134 outb(reg, port); 134 outb(reg, port);
135 val = inb(port + 1); 135 val = inb(port + 1);
136 val |= mask; 136 val |= mask;
137 outb(reg, port); 137 outb(reg, port);
138 outb(val, port + 1); 138 outb(val, port + 1);
139 spin_unlock_irqrestore(&port_lock, flags); 139 spin_unlock_irqrestore(&port_lock, flags);
140 } 140 }
141 141
142 static void indirect_resetbit(struct pd6729_socket *socket, unsigned short reg, 142 static void indirect_resetbit(struct pd6729_socket *socket, unsigned short reg,
143 unsigned char mask) 143 unsigned char mask)
144 { 144 {
145 unsigned long port; 145 unsigned long port;
146 unsigned char val; 146 unsigned char val;
147 unsigned long flags; 147 unsigned long flags;
148 148
149 spin_lock_irqsave(&port_lock, flags); 149 spin_lock_irqsave(&port_lock, flags);
150 reg = reg + socket->number * 0x40; 150 reg = reg + socket->number * 0x40;
151 port = socket->io_base; 151 port = socket->io_base;
152 outb(reg, port); 152 outb(reg, port);
153 val = inb(port + 1); 153 val = inb(port + 1);
154 val &= ~mask; 154 val &= ~mask;
155 outb(reg, port); 155 outb(reg, port);
156 outb(val, port + 1); 156 outb(val, port + 1);
157 spin_unlock_irqrestore(&port_lock, flags); 157 spin_unlock_irqrestore(&port_lock, flags);
158 } 158 }
159 159
160 static void indirect_write16(struct pd6729_socket *socket, unsigned short reg, 160 static void indirect_write16(struct pd6729_socket *socket, unsigned short reg,
161 unsigned short value) 161 unsigned short value)
162 { 162 {
163 unsigned long port; 163 unsigned long port;
164 unsigned char val; 164 unsigned char val;
165 unsigned long flags; 165 unsigned long flags;
166 166
167 spin_lock_irqsave(&port_lock, flags); 167 spin_lock_irqsave(&port_lock, flags);
168 reg = reg + socket->number * 0x40; 168 reg = reg + socket->number * 0x40;
169 port = socket->io_base; 169 port = socket->io_base;
170 170
171 outb(reg, port); 171 outb(reg, port);
172 val = value & 255; 172 val = value & 255;
173 outb(val, port + 1); 173 outb(val, port + 1);
174 174
175 reg++; 175 reg++;
176 176
177 outb(reg, port); 177 outb(reg, port);
178 val = value >> 8; 178 val = value >> 8;
179 outb(val, port + 1); 179 outb(val, port + 1);
180 spin_unlock_irqrestore(&port_lock, flags); 180 spin_unlock_irqrestore(&port_lock, flags);
181 } 181 }
182 182
183 /* Interrupt handler functionality */ 183 /* Interrupt handler functionality */
184 184
185 static irqreturn_t pd6729_interrupt(int irq, void *dev) 185 static irqreturn_t pd6729_interrupt(int irq, void *dev)
186 { 186 {
187 struct pd6729_socket *socket = (struct pd6729_socket *)dev; 187 struct pd6729_socket *socket = (struct pd6729_socket *)dev;
188 int i; 188 int i;
189 int loopcount = 0; 189 int loopcount = 0;
190 int handled = 0; 190 int handled = 0;
191 unsigned int events, active = 0; 191 unsigned int events, active = 0;
192 192
193 while (1) { 193 while (1) {
194 loopcount++; 194 loopcount++;
195 if (loopcount > 20) { 195 if (loopcount > 20) {
196 printk(KERN_ERR "pd6729: infinite eventloop " 196 printk(KERN_ERR "pd6729: infinite eventloop "
197 "in interrupt\n"); 197 "in interrupt\n");
198 break; 198 break;
199 } 199 }
200 200
201 active = 0; 201 active = 0;
202 202
203 for (i = 0; i < MAX_SOCKETS; i++) { 203 for (i = 0; i < MAX_SOCKETS; i++) {
204 unsigned int csc; 204 unsigned int csc;
205 205
206 /* card status change register */ 206 /* card status change register */
207 csc = indirect_read(&socket[i], I365_CSC); 207 csc = indirect_read(&socket[i], I365_CSC);
208 if (csc == 0) /* no events on this socket */ 208 if (csc == 0) /* no events on this socket */
209 continue; 209 continue;
210 210
211 handled = 1; 211 handled = 1;
212 events = 0; 212 events = 0;
213 213
214 if (csc & I365_CSC_DETECT) { 214 if (csc & I365_CSC_DETECT) {
215 events |= SS_DETECT; 215 events |= SS_DETECT;
216 dprintk("Card detected in socket %i!\n", i); 216 dprintk("Card detected in socket %i!\n", i);
217 } 217 }
218 218
219 if (indirect_read(&socket[i], I365_INTCTL) 219 if (indirect_read(&socket[i], I365_INTCTL)
220 & I365_PC_IOCARD) { 220 & I365_PC_IOCARD) {
221 /* For IO/CARDS, bit 0 means "read the card" */ 221 /* For IO/CARDS, bit 0 means "read the card" */
222 events |= (csc & I365_CSC_STSCHG) 222 events |= (csc & I365_CSC_STSCHG)
223 ? SS_STSCHG : 0; 223 ? SS_STSCHG : 0;
224 } else { 224 } else {
225 /* Check for battery/ready events */ 225 /* Check for battery/ready events */
226 events |= (csc & I365_CSC_BVD1) 226 events |= (csc & I365_CSC_BVD1)
227 ? SS_BATDEAD : 0; 227 ? SS_BATDEAD : 0;
228 events |= (csc & I365_CSC_BVD2) 228 events |= (csc & I365_CSC_BVD2)
229 ? SS_BATWARN : 0; 229 ? SS_BATWARN : 0;
230 events |= (csc & I365_CSC_READY) 230 events |= (csc & I365_CSC_READY)
231 ? SS_READY : 0; 231 ? SS_READY : 0;
232 } 232 }
233 233
234 if (events) { 234 if (events) {
235 pcmcia_parse_events(&socket[i].socket, events); 235 pcmcia_parse_events(&socket[i].socket, events);
236 } 236 }
237 active |= events; 237 active |= events;
238 } 238 }
239 239
240 if (active == 0) /* no more events to handle */ 240 if (active == 0) /* no more events to handle */
241 break; 241 break;
242 } 242 }
243 return IRQ_RETVAL(handled); 243 return IRQ_RETVAL(handled);
244 } 244 }
245 245
246 /* socket functions */ 246 /* socket functions */
247 247
248 static void pd6729_interrupt_wrapper(unsigned long data) 248 static void pd6729_interrupt_wrapper(unsigned long data)
249 { 249 {
250 struct pd6729_socket *socket = (struct pd6729_socket *) data; 250 struct pd6729_socket *socket = (struct pd6729_socket *) data;
251 251
252 pd6729_interrupt(0, (void *)socket); 252 pd6729_interrupt(0, (void *)socket);
253 mod_timer(&socket->poll_timer, jiffies + HZ); 253 mod_timer(&socket->poll_timer, jiffies + HZ);
254 } 254 }
255 255
256 static int pd6729_get_status(struct pcmcia_socket *sock, u_int *value) 256 static int pd6729_get_status(struct pcmcia_socket *sock, u_int *value)
257 { 257 {
258 struct pd6729_socket *socket 258 struct pd6729_socket *socket
259 = container_of(sock, struct pd6729_socket, socket); 259 = container_of(sock, struct pd6729_socket, socket);
260 unsigned int status; 260 unsigned int status;
261 unsigned int data; 261 unsigned int data;
262 struct pd6729_socket *t; 262 struct pd6729_socket *t;
263 263
264 /* Interface Status Register */ 264 /* Interface Status Register */
265 status = indirect_read(socket, I365_STATUS); 265 status = indirect_read(socket, I365_STATUS);
266 *value = 0; 266 *value = 0;
267 267
268 if ((status & I365_CS_DETECT) == I365_CS_DETECT) { 268 if ((status & I365_CS_DETECT) == I365_CS_DETECT) {
269 *value |= SS_DETECT; 269 *value |= SS_DETECT;
270 } 270 }
271 271
272 /* 272 /*
273 * IO cards have a different meaning of bits 0,1 273 * IO cards have a different meaning of bits 0,1
274 * Also notice the inverse-logic on the bits 274 * Also notice the inverse-logic on the bits
275 */ 275 */
276 if (indirect_read(socket, I365_INTCTL) & I365_PC_IOCARD) { 276 if (indirect_read(socket, I365_INTCTL) & I365_PC_IOCARD) {
277 /* IO card */ 277 /* IO card */
278 if (!(status & I365_CS_STSCHG)) 278 if (!(status & I365_CS_STSCHG))
279 *value |= SS_STSCHG; 279 *value |= SS_STSCHG;
280 } else { 280 } else {
281 /* non I/O card */ 281 /* non I/O card */
282 if (!(status & I365_CS_BVD1)) 282 if (!(status & I365_CS_BVD1))
283 *value |= SS_BATDEAD; 283 *value |= SS_BATDEAD;
284 if (!(status & I365_CS_BVD2)) 284 if (!(status & I365_CS_BVD2))
285 *value |= SS_BATWARN; 285 *value |= SS_BATWARN;
286 } 286 }
287 287
288 if (status & I365_CS_WRPROT) 288 if (status & I365_CS_WRPROT)
289 *value |= SS_WRPROT; /* card is write protected */ 289 *value |= SS_WRPROT; /* card is write protected */
290 290
291 if (status & I365_CS_READY) 291 if (status & I365_CS_READY)
292 *value |= SS_READY; /* card is not busy */ 292 *value |= SS_READY; /* card is not busy */
293 293
294 if (status & I365_CS_POWERON) 294 if (status & I365_CS_POWERON)
295 *value |= SS_POWERON; /* power is applied to the card */ 295 *value |= SS_POWERON; /* power is applied to the card */
296 296
297 t = (socket->number) ? socket : socket + 1; 297 t = (socket->number) ? socket : socket + 1;
298 indirect_write(t, PD67_EXT_INDEX, PD67_EXTERN_DATA); 298 indirect_write(t, PD67_EXT_INDEX, PD67_EXTERN_DATA);
299 data = indirect_read16(t, PD67_EXT_DATA); 299 data = indirect_read16(t, PD67_EXT_DATA);
300 *value |= (data & PD67_EXD_VS1(socket->number)) ? 0 : SS_3VCARD; 300 *value |= (data & PD67_EXD_VS1(socket->number)) ? 0 : SS_3VCARD;
301 301
302 return 0; 302 return 0;
303 } 303 }
304 304
305 305
306 static int pd6729_set_socket(struct pcmcia_socket *sock, socket_state_t *state) 306 static int pd6729_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
307 { 307 {
308 struct pd6729_socket *socket 308 struct pd6729_socket *socket
309 = container_of(sock, struct pd6729_socket, socket); 309 = container_of(sock, struct pd6729_socket, socket);
310 unsigned char reg, data; 310 unsigned char reg, data;
311 311
312 /* First, set the global controller options */ 312 /* First, set the global controller options */
313 indirect_write(socket, I365_GBLCTL, 0x00); 313 indirect_write(socket, I365_GBLCTL, 0x00);
314 indirect_write(socket, I365_GENCTL, 0x00); 314 indirect_write(socket, I365_GENCTL, 0x00);
315 315
316 /* Values for the IGENC register */ 316 /* Values for the IGENC register */
317 socket->card_irq = state->io_irq; 317 socket->card_irq = state->io_irq;
318 318
319 reg = 0; 319 reg = 0;
320 /* The reset bit has "inverse" logic */ 320 /* The reset bit has "inverse" logic */
321 if (!(state->flags & SS_RESET)) 321 if (!(state->flags & SS_RESET))
322 reg |= I365_PC_RESET; 322 reg |= I365_PC_RESET;
323 if (state->flags & SS_IOCARD) 323 if (state->flags & SS_IOCARD)
324 reg |= I365_PC_IOCARD; 324 reg |= I365_PC_IOCARD;
325 325
326 /* IGENC, Interrupt and General Control Register */ 326 /* IGENC, Interrupt and General Control Register */
327 indirect_write(socket, I365_INTCTL, reg); 327 indirect_write(socket, I365_INTCTL, reg);
328 328
329 /* Power registers */ 329 /* Power registers */
330 330
331 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */ 331 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
332 332
333 if (state->flags & SS_PWR_AUTO) { 333 if (state->flags & SS_PWR_AUTO) {
334 dprintk("Auto power\n"); 334 dprintk("Auto power\n");
335 reg |= I365_PWR_AUTO; /* automatic power mngmnt */ 335 reg |= I365_PWR_AUTO; /* automatic power mngmnt */
336 } 336 }
337 if (state->flags & SS_OUTPUT_ENA) { 337 if (state->flags & SS_OUTPUT_ENA) {
338 dprintk("Power Enabled\n"); 338 dprintk("Power Enabled\n");
339 reg |= I365_PWR_OUT; /* enable power */ 339 reg |= I365_PWR_OUT; /* enable power */
340 } 340 }
341 341
342 switch (state->Vcc) { 342 switch (state->Vcc) {
343 case 0: 343 case 0:
344 break; 344 break;
345 case 33: 345 case 33:
346 dprintk("setting voltage to Vcc to 3.3V on socket %i\n", 346 dprintk("setting voltage to Vcc to 3.3V on socket %i\n",
347 socket->number); 347 socket->number);
348 reg |= I365_VCC_5V; 348 reg |= I365_VCC_5V;
349 indirect_setbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); 349 indirect_setbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
350 break; 350 break;
351 case 50: 351 case 50:
352 dprintk("setting voltage to Vcc to 5V on socket %i\n", 352 dprintk("setting voltage to Vcc to 5V on socket %i\n",
353 socket->number); 353 socket->number);
354 reg |= I365_VCC_5V; 354 reg |= I365_VCC_5V;
355 indirect_resetbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V); 355 indirect_resetbit(socket, PD67_MISC_CTL_1, PD67_MC1_VCC_3V);
356 break; 356 break;
357 default: 357 default:
358 dprintk("pd6729: pd6729_set_socket called with " 358 dprintk("pd6729: pd6729_set_socket called with "
359 "invalid VCC power value: %i\n", 359 "invalid VCC power value: %i\n",
360 state->Vcc); 360 state->Vcc);
361 return -EINVAL; 361 return -EINVAL;
362 } 362 }
363 363
364 switch (state->Vpp) { 364 switch (state->Vpp) {
365 case 0: 365 case 0:
366 dprintk("not setting Vpp on socket %i\n", socket->number); 366 dprintk("not setting Vpp on socket %i\n", socket->number);
367 break; 367 break;
368 case 33: 368 case 33:
369 case 50: 369 case 50:
370 dprintk("setting Vpp to Vcc for socket %i\n", socket->number); 370 dprintk("setting Vpp to Vcc for socket %i\n", socket->number);
371 reg |= I365_VPP1_5V; 371 reg |= I365_VPP1_5V;
372 break; 372 break;
373 case 120: 373 case 120:
374 dprintk("setting Vpp to 12.0\n"); 374 dprintk("setting Vpp to 12.0\n");
375 reg |= I365_VPP1_12V; 375 reg |= I365_VPP1_12V;
376 break; 376 break;
377 default: 377 default:
378 dprintk("pd6729: pd6729_set_socket called with invalid VPP power value: %i\n", 378 dprintk("pd6729: pd6729_set_socket called with invalid VPP power value: %i\n",
379 state->Vpp); 379 state->Vpp);
380 return -EINVAL; 380 return -EINVAL;
381 } 381 }
382 382
383 /* only write if changed */ 383 /* only write if changed */
384 if (reg != indirect_read(socket, I365_POWER)) 384 if (reg != indirect_read(socket, I365_POWER))
385 indirect_write(socket, I365_POWER, reg); 385 indirect_write(socket, I365_POWER, reg);
386 386
387 if (irq_mode == 1) { 387 if (irq_mode == 1) {
388 /* all interrupts are to be done as PCI interrupts */ 388 /* all interrupts are to be done as PCI interrupts */
389 data = PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ; 389 data = PD67_EC1_INV_MGMT_IRQ | PD67_EC1_INV_CARD_IRQ;
390 } else 390 } else
391 data = 0; 391 data = 0;
392 392
393 indirect_write(socket, PD67_EXT_INDEX, PD67_EXT_CTL_1); 393 indirect_write(socket, PD67_EXT_INDEX, PD67_EXT_CTL_1);
394 indirect_write(socket, PD67_EXT_DATA, data); 394 indirect_write(socket, PD67_EXT_DATA, data);
395 395
396 /* Enable specific interrupt events */ 396 /* Enable specific interrupt events */
397 397
398 reg = 0x00; 398 reg = 0x00;
399 if (state->csc_mask & SS_DETECT) { 399 if (state->csc_mask & SS_DETECT) {
400 reg |= I365_CSC_DETECT; 400 reg |= I365_CSC_DETECT;
401 } 401 }
402 if (state->flags & SS_IOCARD) { 402 if (state->flags & SS_IOCARD) {
403 if (state->csc_mask & SS_STSCHG) 403 if (state->csc_mask & SS_STSCHG)
404 reg |= I365_CSC_STSCHG; 404 reg |= I365_CSC_STSCHG;
405 } else { 405 } else {
406 if (state->csc_mask & SS_BATDEAD) 406 if (state->csc_mask & SS_BATDEAD)
407 reg |= I365_CSC_BVD1; 407 reg |= I365_CSC_BVD1;
408 if (state->csc_mask & SS_BATWARN) 408 if (state->csc_mask & SS_BATWARN)
409 reg |= I365_CSC_BVD2; 409 reg |= I365_CSC_BVD2;
410 if (state->csc_mask & SS_READY) 410 if (state->csc_mask & SS_READY)
411 reg |= I365_CSC_READY; 411 reg |= I365_CSC_READY;
412 } 412 }
413 if (irq_mode == 1) 413 if (irq_mode == 1)
414 reg |= 0x30; /* management IRQ: PCI INTA# = "irq 3" */ 414 reg |= 0x30; /* management IRQ: PCI INTA# = "irq 3" */
415 indirect_write(socket, I365_CSCINT, reg); 415 indirect_write(socket, I365_CSCINT, reg);
416 416
417 reg = indirect_read(socket, I365_INTCTL); 417 reg = indirect_read(socket, I365_INTCTL);
418 if (irq_mode == 1) 418 if (irq_mode == 1)
419 reg |= 0x03; /* card IRQ: PCI INTA# = "irq 3" */ 419 reg |= 0x03; /* card IRQ: PCI INTA# = "irq 3" */
420 else 420 else
421 reg |= socket->card_irq; 421 reg |= socket->card_irq;
422 indirect_write(socket, I365_INTCTL, reg); 422 indirect_write(socket, I365_INTCTL, reg);
423 423
424 /* now clear the (probably bogus) pending stuff by doing a dummy read */ 424 /* now clear the (probably bogus) pending stuff by doing a dummy read */
425 (void)indirect_read(socket, I365_CSC); 425 (void)indirect_read(socket, I365_CSC);
426 426
427 return 0; 427 return 0;
428 } 428 }
429 429
430 static int pd6729_set_io_map(struct pcmcia_socket *sock, 430 static int pd6729_set_io_map(struct pcmcia_socket *sock,
431 struct pccard_io_map *io) 431 struct pccard_io_map *io)
432 { 432 {
433 struct pd6729_socket *socket 433 struct pd6729_socket *socket
434 = container_of(sock, struct pd6729_socket, socket); 434 = container_of(sock, struct pd6729_socket, socket);
435 unsigned char map, ioctl; 435 unsigned char map, ioctl;
436 436
437 map = io->map; 437 map = io->map;
438 438
439 /* Check error conditions */ 439 /* Check error conditions */
440 if (map > 1) { 440 if (map > 1) {
441 dprintk("pd6729_set_io_map with invalid map"); 441 dprintk("pd6729_set_io_map with invalid map");
442 return -EINVAL; 442 return -EINVAL;
443 } 443 }
444 444
445 /* Turn off the window before changing anything */ 445 /* Turn off the window before changing anything */
446 if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_IO(map)) 446 if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_IO(map))
447 indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_IO(map)); 447 indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_IO(map));
448 448
449 /* dprintk("set_io_map: Setting range to %x - %x\n", 449 /* dprintk("set_io_map: Setting range to %x - %x\n",
450 io->start, io->stop);*/ 450 io->start, io->stop);*/
451 451
452 /* write the new values */ 452 /* write the new values */
453 indirect_write16(socket, I365_IO(map)+I365_W_START, io->start); 453 indirect_write16(socket, I365_IO(map)+I365_W_START, io->start);
454 indirect_write16(socket, I365_IO(map)+I365_W_STOP, io->stop); 454 indirect_write16(socket, I365_IO(map)+I365_W_STOP, io->stop);
455 455
456 ioctl = indirect_read(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map); 456 ioctl = indirect_read(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
457 457
458 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map); 458 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
459 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map); 459 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
460 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map); 460 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
461 461
462 indirect_write(socket, I365_IOCTL, ioctl); 462 indirect_write(socket, I365_IOCTL, ioctl);
463 463
464 /* Turn the window back on if needed */ 464 /* Turn the window back on if needed */
465 if (io->flags & MAP_ACTIVE) 465 if (io->flags & MAP_ACTIVE)
466 indirect_setbit(socket, I365_ADDRWIN, I365_ENA_IO(map)); 466 indirect_setbit(socket, I365_ADDRWIN, I365_ENA_IO(map));
467 467
468 return 0; 468 return 0;
469 } 469 }
470 470
471 static int pd6729_set_mem_map(struct pcmcia_socket *sock, 471 static int pd6729_set_mem_map(struct pcmcia_socket *sock,
472 struct pccard_mem_map *mem) 472 struct pccard_mem_map *mem)
473 { 473 {
474 struct pd6729_socket *socket 474 struct pd6729_socket *socket
475 = container_of(sock, struct pd6729_socket, socket); 475 = container_of(sock, struct pd6729_socket, socket);
476 unsigned short base, i; 476 unsigned short base, i;
477 unsigned char map; 477 unsigned char map;
478 478
479 map = mem->map; 479 map = mem->map;
480 if (map > 4) { 480 if (map > 4) {
481 printk("pd6729_set_mem_map: invalid map"); 481 printk("pd6729_set_mem_map: invalid map");
482 return -EINVAL; 482 return -EINVAL;
483 } 483 }
484 484
485 if ((mem->res->start > mem->res->end) || (mem->speed > 1000)) { 485 if ((mem->res->start > mem->res->end) || (mem->speed > 1000)) {
486 printk("pd6729_set_mem_map: invalid address / speed"); 486 printk("pd6729_set_mem_map: invalid address / speed");
487 return -EINVAL; 487 return -EINVAL;
488 } 488 }
489 489
490 /* Turn off the window before changing anything */ 490 /* Turn off the window before changing anything */
491 if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_MEM(map)) 491 if (indirect_read(socket, I365_ADDRWIN) & I365_ENA_MEM(map))
492 indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_MEM(map)); 492 indirect_resetbit(socket, I365_ADDRWIN, I365_ENA_MEM(map));
493 493
494 /* write the start address */ 494 /* write the start address */
495 base = I365_MEM(map); 495 base = I365_MEM(map);
496 i = (mem->res->start >> 12) & 0x0fff; 496 i = (mem->res->start >> 12) & 0x0fff;
497 if (mem->flags & MAP_16BIT) 497 if (mem->flags & MAP_16BIT)
498 i |= I365_MEM_16BIT; 498 i |= I365_MEM_16BIT;
499 if (mem->flags & MAP_0WS) 499 if (mem->flags & MAP_0WS)
500 i |= I365_MEM_0WS; 500 i |= I365_MEM_0WS;
501 indirect_write16(socket, base + I365_W_START, i); 501 indirect_write16(socket, base + I365_W_START, i);
502 502
503 /* write the stop address */ 503 /* write the stop address */
504 504
505 i= (mem->res->end >> 12) & 0x0fff; 505 i= (mem->res->end >> 12) & 0x0fff;
506 switch (to_cycles(mem->speed)) { 506 switch (to_cycles(mem->speed)) {
507 case 0: 507 case 0:
508 break; 508 break;
509 case 1: 509 case 1:
510 i |= I365_MEM_WS0; 510 i |= I365_MEM_WS0;
511 break; 511 break;
512 case 2: 512 case 2:
513 i |= I365_MEM_WS1; 513 i |= I365_MEM_WS1;
514 break; 514 break;
515 default: 515 default:
516 i |= I365_MEM_WS1 | I365_MEM_WS0; 516 i |= I365_MEM_WS1 | I365_MEM_WS0;
517 break; 517 break;
518 } 518 }
519 519
520 indirect_write16(socket, base + I365_W_STOP, i); 520 indirect_write16(socket, base + I365_W_STOP, i);
521 521
522 /* Take care of high byte */ 522 /* Take care of high byte */
523 indirect_write(socket, PD67_EXT_INDEX, PD67_MEM_PAGE(map)); 523 indirect_write(socket, PD67_EXT_INDEX, PD67_MEM_PAGE(map));
524 indirect_write(socket, PD67_EXT_DATA, mem->res->start >> 24); 524 indirect_write(socket, PD67_EXT_DATA, mem->res->start >> 24);
525 525
526 /* card start */ 526 /* card start */
527 527
528 i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff; 528 i = ((mem->card_start - mem->res->start) >> 12) & 0x3fff;
529 if (mem->flags & MAP_WRPROT) 529 if (mem->flags & MAP_WRPROT)
530 i |= I365_MEM_WRPROT; 530 i |= I365_MEM_WRPROT;
531 if (mem->flags & MAP_ATTRIB) { 531 if (mem->flags & MAP_ATTRIB) {
532 /* dprintk("requesting attribute memory for socket %i\n", 532 /* dprintk("requesting attribute memory for socket %i\n",
533 socket->number);*/ 533 socket->number);*/
534 i |= I365_MEM_REG; 534 i |= I365_MEM_REG;
535 } else { 535 } else {
536 /* dprintk("requesting normal memory for socket %i\n", 536 /* dprintk("requesting normal memory for socket %i\n",
537 socket->number);*/ 537 socket->number);*/
538 } 538 }
539 indirect_write16(socket, base + I365_W_OFF, i); 539 indirect_write16(socket, base + I365_W_OFF, i);
540 540
541 /* Enable the window if necessary */ 541 /* Enable the window if necessary */
542 if (mem->flags & MAP_ACTIVE) 542 if (mem->flags & MAP_ACTIVE)
543 indirect_setbit(socket, I365_ADDRWIN, I365_ENA_MEM(map)); 543 indirect_setbit(socket, I365_ADDRWIN, I365_ENA_MEM(map));
544 544
545 return 0; 545 return 0;
546 } 546 }
547 547
548 static int pd6729_init(struct pcmcia_socket *sock) 548 static int pd6729_init(struct pcmcia_socket *sock)
549 { 549 {
550 int i; 550 int i;
551 struct resource res = { .end = 0x0fff }; 551 struct resource res = { .end = 0x0fff };
552 pccard_io_map io = { 0, 0, 0, 0, 1 }; 552 pccard_io_map io = { 0, 0, 0, 0, 1 };
553 pccard_mem_map mem = { .res = &res, }; 553 pccard_mem_map mem = { .res = &res, };
554 554
555 pd6729_set_socket(sock, &dead_socket); 555 pd6729_set_socket(sock, &dead_socket);
556 for (i = 0; i < 2; i++) { 556 for (i = 0; i < 2; i++) {
557 io.map = i; 557 io.map = i;
558 pd6729_set_io_map(sock, &io); 558 pd6729_set_io_map(sock, &io);
559 } 559 }
560 for (i = 0; i < 5; i++) { 560 for (i = 0; i < 5; i++) {
561 mem.map = i; 561 mem.map = i;
562 pd6729_set_mem_map(sock, &mem); 562 pd6729_set_mem_map(sock, &mem);
563 } 563 }
564 564
565 return 0; 565 return 0;
566 } 566 }
567 567
568 568
569 /* the pccard structure and its functions */ 569 /* the pccard structure and its functions */
570 static struct pccard_operations pd6729_operations = { 570 static struct pccard_operations pd6729_operations = {
571 .init = pd6729_init, 571 .init = pd6729_init,
572 .get_status = pd6729_get_status, 572 .get_status = pd6729_get_status,
573 .set_socket = pd6729_set_socket, 573 .set_socket = pd6729_set_socket,
574 .set_io_map = pd6729_set_io_map, 574 .set_io_map = pd6729_set_io_map,
575 .set_mem_map = pd6729_set_mem_map, 575 .set_mem_map = pd6729_set_mem_map,
576 }; 576 };
577 577
578 static irqreturn_t pd6729_test(int irq, void *dev) 578 static irqreturn_t pd6729_test(int irq, void *dev)
579 { 579 {
580 dprintk("-> hit on irq %d\n", irq); 580 dprintk("-> hit on irq %d\n", irq);
581 return IRQ_HANDLED; 581 return IRQ_HANDLED;
582 } 582 }
583 583
584 static int pd6729_check_irq(int irq) 584 static int pd6729_check_irq(int irq)
585 { 585 {
586 if (request_irq(irq, pd6729_test, IRQF_PROBE_SHARED, "x", pd6729_test) 586 if (request_irq(irq, pd6729_test, IRQF_PROBE_SHARED, "x", pd6729_test)
587 != 0) return -1; 587 != 0) return -1;
588 free_irq(irq, pd6729_test); 588 free_irq(irq, pd6729_test);
589 return 0; 589 return 0;
590 } 590 }
591 591
592 static u_int __devinit pd6729_isa_scan(void) 592 static u_int __devinit pd6729_isa_scan(void)
593 { 593 {
594 u_int mask0, mask = 0; 594 u_int mask0, mask = 0;
595 int i; 595 int i;
596 596
597 if (irq_mode == 1) { 597 if (irq_mode == 1) {
598 printk(KERN_INFO "pd6729: PCI card interrupts, " 598 printk(KERN_INFO "pd6729: PCI card interrupts, "
599 "PCI status changes\n"); 599 "PCI status changes\n");
600 return 0; 600 return 0;
601 } 601 }
602 602
603 if (irq_list_count == 0) 603 if (irq_list_count == 0)
604 mask0 = 0xffff; 604 mask0 = 0xffff;
605 else 605 else
606 for (i = mask0 = 0; i < irq_list_count; i++) 606 for (i = mask0 = 0; i < irq_list_count; i++)
607 mask0 |= (1<<irq_list[i]); 607 mask0 |= (1<<irq_list[i]);
608 608
609 mask0 &= PD67_MASK; 609 mask0 &= PD67_MASK;
610 610
611 /* just find interrupts that aren't in use */ 611 /* just find interrupts that aren't in use */
612 for (i = 0; i < 16; i++) 612 for (i = 0; i < 16; i++)
613 if ((mask0 & (1 << i)) && (pd6729_check_irq(i) == 0)) 613 if ((mask0 & (1 << i)) && (pd6729_check_irq(i) == 0))
614 mask |= (1 << i); 614 mask |= (1 << i);
615 615
616 printk(KERN_INFO "pd6729: ISA irqs = "); 616 printk(KERN_INFO "pd6729: ISA irqs = ");
617 for (i = 0; i < 16; i++) 617 for (i = 0; i < 16; i++)
618 if (mask & (1<<i)) 618 if (mask & (1<<i))
619 printk("%s%d", ((mask & ((1<<i)-1)) ? "," : ""), i); 619 printk("%s%d", ((mask & ((1<<i)-1)) ? "," : ""), i);
620 620
621 if (mask == 0) printk("none!"); 621 if (mask == 0) printk("none!");
622 622
623 printk(" polling status changes.\n"); 623 printk(" polling status changes.\n");
624 624
625 return mask; 625 return mask;
626 } 626 }
627 627
628 static int __devinit pd6729_pci_probe(struct pci_dev *dev, 628 static int __devinit pd6729_pci_probe(struct pci_dev *dev,
629 const struct pci_device_id *id) 629 const struct pci_device_id *id)
630 { 630 {
631 int i, j, ret; 631 int i, j, ret;
632 u_int mask; 632 u_int mask;
633 char configbyte; 633 char configbyte;
634 struct pd6729_socket *socket; 634 struct pd6729_socket *socket;
635 635
636 socket = kzalloc(sizeof(struct pd6729_socket) * MAX_SOCKETS, 636 socket = kzalloc(sizeof(struct pd6729_socket) * MAX_SOCKETS,
637 GFP_KERNEL); 637 GFP_KERNEL);
638 if (!socket) 638 if (!socket)
639 return -ENOMEM; 639 return -ENOMEM;
640 640
641 if ((ret = pci_enable_device(dev))) 641 if ((ret = pci_enable_device(dev)))
642 goto err_out_free_mem; 642 goto err_out_free_mem;
643 643
644 printk(KERN_INFO "pd6729: Cirrus PD6729 PCI to PCMCIA Bridge " 644 printk(KERN_INFO "pd6729: Cirrus PD6729 PCI to PCMCIA Bridge "
645 "at 0x%llx on irq %d\n", 645 "at 0x%llx on irq %d\n",
646 (unsigned long long)pci_resource_start(dev, 0), dev->irq); 646 (unsigned long long)pci_resource_start(dev, 0), dev->irq);
647 /* 647 /*
648 * Since we have no memory BARs some firmware may not 648 * Since we have no memory BARs some firmware may not
649 * have had PCI_COMMAND_MEMORY enabled, yet the device needs it. 649 * have had PCI_COMMAND_MEMORY enabled, yet the device needs it.
650 */ 650 */
651 pci_read_config_byte(dev, PCI_COMMAND, &configbyte); 651 pci_read_config_byte(dev, PCI_COMMAND, &configbyte);
652 if (!(configbyte & PCI_COMMAND_MEMORY)) { 652 if (!(configbyte & PCI_COMMAND_MEMORY)) {
653 printk(KERN_DEBUG "pd6729: Enabling PCI_COMMAND_MEMORY.\n"); 653 printk(KERN_DEBUG "pd6729: Enabling PCI_COMMAND_MEMORY.\n");
654 configbyte |= PCI_COMMAND_MEMORY; 654 configbyte |= PCI_COMMAND_MEMORY;
655 pci_write_config_byte(dev, PCI_COMMAND, configbyte); 655 pci_write_config_byte(dev, PCI_COMMAND, configbyte);
656 } 656 }
657 657
658 ret = pci_request_regions(dev, "pd6729"); 658 ret = pci_request_regions(dev, "pd6729");
659 if (ret) { 659 if (ret) {
660 printk(KERN_INFO "pd6729: pci request region failed.\n"); 660 printk(KERN_INFO "pd6729: pci request region failed.\n");
661 goto err_out_disable; 661 goto err_out_disable;
662 } 662 }
663 663
664 if (dev->irq == NO_IRQ) 664 if (dev->irq == NO_IRQ)
665 irq_mode = 0; /* fall back to ISA interrupt mode */ 665 irq_mode = 0; /* fall back to ISA interrupt mode */
666 666
667 mask = pd6729_isa_scan(); 667 mask = pd6729_isa_scan();
668 if (irq_mode == 0 && mask == 0) { 668 if (irq_mode == 0 && mask == 0) {
669 printk(KERN_INFO "pd6729: no ISA interrupt is available.\n"); 669 printk(KERN_INFO "pd6729: no ISA interrupt is available.\n");
670 goto err_out_free_res; 670 goto err_out_free_res;
671 } 671 }
672 672
673 for (i = 0; i < MAX_SOCKETS; i++) { 673 for (i = 0; i < MAX_SOCKETS; i++) {
674 socket[i].io_base = pci_resource_start(dev, 0); 674 socket[i].io_base = pci_resource_start(dev, 0);
675 socket[i].socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD; 675 socket[i].socket.features |= SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
676 socket[i].socket.map_size = 0x1000; 676 socket[i].socket.map_size = 0x1000;
677 socket[i].socket.irq_mask = mask; 677 socket[i].socket.irq_mask = mask;
678 socket[i].socket.pci_irq = dev->irq; 678 socket[i].socket.pci_irq = dev->irq;
679 socket[i].socket.owner = THIS_MODULE; 679 socket[i].socket.owner = THIS_MODULE;
680 680
681 socket[i].number = i; 681 socket[i].number = i;
682 682
683 socket[i].socket.ops = &pd6729_operations; 683 socket[i].socket.ops = &pd6729_operations;
684 socket[i].socket.resource_ops = &pccard_nonstatic_ops; 684 socket[i].socket.resource_ops = &pccard_nonstatic_ops;
685 socket[i].socket.dev.parent = &dev->dev; 685 socket[i].socket.dev.parent = &dev->dev;
686 socket[i].socket.driver_data = &socket[i]; 686 socket[i].socket.driver_data = &socket[i];
687 } 687 }
688 688
689 pci_set_drvdata(dev, socket); 689 pci_set_drvdata(dev, socket);
690 if (irq_mode == 1) { 690 if (irq_mode == 1) {
691 /* Register the interrupt handler */ 691 /* Register the interrupt handler */
692 if ((ret = request_irq(dev->irq, pd6729_interrupt, IRQF_SHARED, 692 if ((ret = request_irq(dev->irq, pd6729_interrupt, IRQF_SHARED,
693 "pd6729", socket))) { 693 "pd6729", socket))) {
694 printk(KERN_ERR "pd6729: Failed to register irq %d, " 694 printk(KERN_ERR "pd6729: Failed to register irq %d, "
695 "aborting\n", dev->irq); 695 "aborting\n", dev->irq);
696 goto err_out_free_res; 696 goto err_out_free_res;
697 } 697 }
698 } else { 698 } else {
699 /* poll Card status change */ 699 /* poll Card status change */
700 init_timer(&socket->poll_timer); 700 init_timer(&socket->poll_timer);
701 socket->poll_timer.function = pd6729_interrupt_wrapper; 701 socket->poll_timer.function = pd6729_interrupt_wrapper;
702 socket->poll_timer.data = (unsigned long)socket; 702 socket->poll_timer.data = (unsigned long)socket;
703 socket->poll_timer.expires = jiffies + HZ; 703 socket->poll_timer.expires = jiffies + HZ;
704 add_timer(&socket->poll_timer); 704 add_timer(&socket->poll_timer);
705 } 705 }
706 706
707 for (i = 0; i < MAX_SOCKETS; i++) { 707 for (i = 0; i < MAX_SOCKETS; i++) {
708 ret = pcmcia_register_socket(&socket[i].socket); 708 ret = pcmcia_register_socket(&socket[i].socket);
709 if (ret) { 709 if (ret) {
710 printk(KERN_INFO "pd6729: pcmcia_register_socket " 710 printk(KERN_INFO "pd6729: pcmcia_register_socket "
711 "failed.\n"); 711 "failed.\n");
712 for (j = 0; j < i ; j++) 712 for (j = 0; j < i ; j++)
713 pcmcia_unregister_socket(&socket[j].socket); 713 pcmcia_unregister_socket(&socket[j].socket);
714 goto err_out_free_res2; 714 goto err_out_free_res2;
715 } 715 }
716 } 716 }
717 717
718 return 0; 718 return 0;
719 719
720 err_out_free_res2: 720 err_out_free_res2:
721 if (irq_mode == 1) 721 if (irq_mode == 1)
722 free_irq(dev->irq, socket); 722 free_irq(dev->irq, socket);
723 else 723 else
724 del_timer_sync(&socket->poll_timer); 724 del_timer_sync(&socket->poll_timer);
725 err_out_free_res: 725 err_out_free_res:
726 pci_release_regions(dev); 726 pci_release_regions(dev);
727 err_out_disable: 727 err_out_disable:
728 pci_disable_device(dev); 728 pci_disable_device(dev);
729 729
730 err_out_free_mem: 730 err_out_free_mem:
731 kfree(socket); 731 kfree(socket);
732 return ret; 732 return ret;
733 } 733 }
734 734
735 static void __devexit pd6729_pci_remove(struct pci_dev *dev) 735 static void __devexit pd6729_pci_remove(struct pci_dev *dev)
736 { 736 {
737 int i; 737 int i;
738 struct pd6729_socket *socket = pci_get_drvdata(dev); 738 struct pd6729_socket *socket = pci_get_drvdata(dev);
739 739
740 for (i = 0; i < MAX_SOCKETS; i++) { 740 for (i = 0; i < MAX_SOCKETS; i++) {
741 /* Turn off all interrupt sources */ 741 /* Turn off all interrupt sources */
742 indirect_write(&socket[i], I365_CSCINT, 0); 742 indirect_write(&socket[i], I365_CSCINT, 0);
743 indirect_write(&socket[i], I365_INTCTL, 0); 743 indirect_write(&socket[i], I365_INTCTL, 0);
744 744
745 pcmcia_unregister_socket(&socket[i].socket); 745 pcmcia_unregister_socket(&socket[i].socket);
746 } 746 }
747 747
748 if (irq_mode == 1) 748 if (irq_mode == 1)
749 free_irq(dev->irq, socket); 749 free_irq(dev->irq, socket);
750 else 750 else
751 del_timer_sync(&socket->poll_timer); 751 del_timer_sync(&socket->poll_timer);
752 pci_release_regions(dev); 752 pci_release_regions(dev);
753 pci_disable_device(dev); 753 pci_disable_device(dev);
754 754
755 kfree(socket); 755 kfree(socket);
756 } 756 }
757 757
758 #ifdef CONFIG_PM 758 #ifdef CONFIG_PM
759 static int pd6729_socket_suspend(struct pci_dev *dev, pm_message_t state) 759 static int pd6729_socket_suspend(struct pci_dev *dev, pm_message_t state)
760 { 760 {
761 return pcmcia_socket_dev_suspend(&dev->dev, state); 761 return pcmcia_socket_dev_suspend(&dev->dev, state);
762 } 762 }
763 763
764 static int pd6729_socket_resume(struct pci_dev *dev) 764 static int pd6729_socket_resume(struct pci_dev *dev)
765 { 765 {
766 return pcmcia_socket_dev_resume(&dev->dev); 766 return pcmcia_socket_dev_resume(&dev->dev);
767 } 767 }
768 #endif 768 #endif
769 769
770 static struct pci_device_id pd6729_pci_ids[] = { 770 static struct pci_device_id pd6729_pci_ids[] = {
771 { 771 {
772 .vendor = PCI_VENDOR_ID_CIRRUS, 772 .vendor = PCI_VENDOR_ID_CIRRUS,
773 .device = PCI_DEVICE_ID_CIRRUS_6729, 773 .device = PCI_DEVICE_ID_CIRRUS_6729,
774 .subvendor = PCI_ANY_ID, 774 .subvendor = PCI_ANY_ID,
775 .subdevice = PCI_ANY_ID, 775 .subdevice = PCI_ANY_ID,
776 }, 776 },
777 { } 777 { }
778 }; 778 };
779 MODULE_DEVICE_TABLE(pci, pd6729_pci_ids); 779 MODULE_DEVICE_TABLE(pci, pd6729_pci_ids);
780 780
781 static struct pci_driver pd6729_pci_drv = { 781 static struct pci_driver pd6729_pci_driver = {
782 .name = "pd6729", 782 .name = "pd6729",
783 .id_table = pd6729_pci_ids, 783 .id_table = pd6729_pci_ids,
784 .probe = pd6729_pci_probe, 784 .probe = pd6729_pci_probe,
785 .remove = __devexit_p(pd6729_pci_remove), 785 .remove = __devexit_p(pd6729_pci_remove),
786 #ifdef CONFIG_PM 786 #ifdef CONFIG_PM
787 .suspend = pd6729_socket_suspend, 787 .suspend = pd6729_socket_suspend,
788 .resume = pd6729_socket_resume, 788 .resume = pd6729_socket_resume,
789 #endif 789 #endif
790 }; 790 };
791 791
792 static int pd6729_module_init(void) 792 static int pd6729_module_init(void)
793 { 793 {
794 return pci_register_driver(&pd6729_pci_drv); 794 return pci_register_driver(&pd6729_pci_driver);
795 } 795 }
796 796
797 static void pd6729_module_exit(void) 797 static void pd6729_module_exit(void)
798 { 798 {
799 pci_unregister_driver(&pd6729_pci_drv); 799 pci_unregister_driver(&pd6729_pci_driver);
800 } 800 }
801 801
802 module_init(pd6729_module_init); 802 module_init(pd6729_module_init);
803 module_exit(pd6729_module_exit); 803 module_exit(pd6729_module_exit);
804 804