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Commit bbc8d77db655be61a21d7623428c46c578a866d3

Authored by Rob Herring 2013-01-17 07:57:33 +0800

Committed by Nicolas Pitre 2013-05-30 03:50:34 +0800

Exists in smarc-imx_3.14.28_1.0.0_ga and in 1 other branch

ARM: introduce common set_auxcr/get_auxcr functions

Move the private set_auxcr/get_auxcr functions from
drivers/cpuidle/cpuidle-calxeda.c so they can be used across platforms.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>

Showing 2 changed files with 14 additions and 14 deletions Inline Diff

arch/arm/include/asm/cp15.h
drivers/cpuidle/cpuidle-calxeda.c

arch/arm/include/asm/cp15.h

Diff comments View file @ bbc8d77

 #ifndef __ASM_ARM_CP15_H
 #define __ASM_ARM_CP15_H
 #include <asm/barrier.h>
 /*
  * CR1 bits (CP#15 CR1)
  */
 #define CR_M	(1 << 0)	/* MMU enable				*/
 #define CR_A	(1 << 1)	/* Alignment abort enable		*/
 #define CR_C	(1 << 2)	/* Dcache enable			*/
 #define CR_W	(1 << 3)	/* Write buffer enable			*/
 #define CR_P	(1 << 4)	/* 32-bit exception handler		*/
 #define CR_D	(1 << 5)	/* 32-bit data address range		*/
 #define CR_L	(1 << 6)	/* Implementation defined		*/
 #define CR_B	(1 << 7)	/* Big endian				*/
 #define CR_S	(1 << 8)	/* System MMU protection		*/
 #define CR_R	(1 << 9)	/* ROM MMU protection			*/
 #define CR_F	(1 << 10)	/* Implementation defined		*/
 #define CR_Z	(1 << 11)	/* Implementation defined		*/
 #define CR_I	(1 << 12)	/* Icache enable			*/
 #define CR_V	(1 << 13)	/* Vectors relocated to 0xffff0000	*/
 #define CR_RR	(1 << 14)	/* Round Robin cache replacement	*/
 #define CR_L4	(1 << 15)	/* LDR pc can set T bit			*/
 #define CR_DT	(1 << 16)
 #define CR_IT	(1 << 18)
 #define CR_ST	(1 << 19)
 #define CR_FI	(1 << 21)	/* Fast interrupt (lower latency mode)	*/
 #define CR_U	(1 << 22)	/* Unaligned access operation		*/
 #define CR_XP	(1 << 23)	/* Extended page tables			*/
 #define CR_VE	(1 << 24)	/* Vectored interrupts			*/
 #define CR_EE	(1 << 25)	/* Exception (Big) Endian		*/
 #define CR_TRE	(1 << 28)	/* TEX remap enable			*/
 #define CR_AFE	(1 << 29)	/* Access flag enable			*/
 #define CR_TE	(1 << 30)	/* Thumb exception enable		*/
 #ifndef __ASSEMBLY__
 #if __LINUX_ARM_ARCH__ >= 4
 #define vectors_high()	(cr_alignment & CR_V)
 #else
 #define vectors_high()	(0)
 #endif
 #ifdef CONFIG_CPU_CP15
 extern unsigned long cr_no_alignment;	/* defined in entry-armv.S */
 extern unsigned long cr_alignment;	/* defined in entry-armv.S */
 static inline unsigned int get_cr(void)
 {
 	unsigned int val;
 	asm("mrc p15, 0, %0, c1, c0, 0	@ get CR" : "=r" (val) : : "cc");
 	return val;
 }
 static inline void set_cr(unsigned int val)
 {
 	asm volatile("mcr p15, 0, %0, c1, c0, 0	@ set CR"
 	  : : "r" (val) : "cc");
 	isb();
 }
+static inline unsigned int get_auxcr(void)
+{
+	unsigned int val;
+	asm("mrc p15, 0, %0, c1, c0, 1	@ get AUXCR" : "=r" (val));
+	return val;
+}
+static inline void set_auxcr(unsigned int val)
+{
+	asm volatile("mcr p15, 0, %0, c1, c0, 1	@ set AUXCR"
+	  : : "r" (val));
+	isb();
+}
 #ifndef CONFIG_SMP
 extern void adjust_cr(unsigned long mask, unsigned long set);
 #endif
 #define CPACC_FULL(n)		(3 << (n * 2))
 #define CPACC_SVC(n)		(1 << (n * 2))
 #define CPACC_DISABLE(n)	(0 << (n * 2))
 static inline unsigned int get_copro_access(void)
 {
 	unsigned int val;
 	asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access"
 	  : "=r" (val) : : "cc");
 	return val;
 }
 static inline void set_copro_access(unsigned int val)
 {
 	asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access"
 	  : : "r" (val) : "cc");
 	isb();
 }
 #else /* ifdef CONFIG_CPU_CP15 */
 /*
  * cr_alignment and cr_no_alignment are tightly coupled to cp15 (at least in the
  * minds of the developers). Yielding 0 for machines without a cp15 (and making
  * it read-only) is fine for most cases and saves quite some #ifdeffery.
  */
 #define cr_no_alignment	UL(0)
 #define cr_alignment	UL(0)
 #endif /* ifdef CONFIG_CPU_CP15 / else */
 #endif /* ifndef __ASSEMBLY__ */
 #endif

drivers/cpuidle/cpuidle-calxeda.c

Diff comments View file @ bbc8d77

 /*
  * Copyright 2012 Calxeda, Inc.
  *
  * Based on arch/arm/plat-mxc/cpuidle.c: #v3.7
  * Copyright 2012 Freescale Semiconductor, Inc.
  * Copyright 2012 Linaro Ltd.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
  *
  * This program is distributed in the hope it will be useful, but WITHOUT
  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  * more details.
  *
  * You should have received a copy of the GNU General Public License along with
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  *
  * Maintainer: Rob Herring <rob.herring@calxeda.com>
  */
 #include <linux/cpuidle.h>
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/time.h>
 #include <linux/delay.h>
 #include <linux/suspend.h>
 #include <asm/cpuidle.h>
 #include <asm/proc-fns.h>
 #include <asm/smp_scu.h>
 #include <asm/suspend.h>
 #include <asm/cacheflush.h>
 #include <asm/cp15.h>
 extern void highbank_set_cpu_jump(int cpu, void *jump_addr);
 extern void *scu_base_addr;
-static inline unsigned int get_auxcr(void)
-{
-	unsigned int val;
-	asm("mrc p15, 0, %0, c1, c0, 1	@ get AUXCR" : "=r" (val) : : "cc");
-	return val;
-}
-static inline void set_auxcr(unsigned int val)
-{
-	asm volatile("mcr p15, 0, %0, c1, c0, 1	@ set AUXCR"
-	  : : "r" (val) : "cc");
-	isb();
-}
 static noinline void calxeda_idle_restore(void)
 {
 	set_cr(get_cr() | CR_C);
 	set_auxcr(get_auxcr() | 0x40);
 	scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
 }
 static int calxeda_idle_finish(unsigned long val)
 {
 	/* Already flushed cache, but do it again as the outer cache functions
 	 * dirty the cache with spinlocks */
 	flush_cache_all();
 	set_auxcr(get_auxcr() & ~0x40);
 	set_cr(get_cr() & ~CR_C);
 	scu_power_mode(scu_base_addr, SCU_PM_DORMANT);
 	cpu_do_idle();
 	/* Restore things if we didn't enter power-gating */
 	calxeda_idle_restore();
 	return 1;
 }
 static int calxeda_pwrdown_idle(struct cpuidle_device *dev,
 				struct cpuidle_driver *drv,
 				int index)
 {
 	highbank_set_cpu_jump(smp_processor_id(), cpu_resume);
 	cpu_suspend(0, calxeda_idle_finish);
 	return index;
 }
 static struct cpuidle_driver calxeda_idle_driver = {
 	.name = "calxeda_idle",
 	.states = {
 		ARM_CPUIDLE_WFI_STATE,
 		{
 			.name = "PG",
 			.desc = "Power Gate",
 			.flags = CPUIDLE_FLAG_TIME_VALID,
 			.exit_latency = 30,
 			.power_usage = 50,
 			.target_residency = 200,
 			.enter = calxeda_pwrdown_idle,
 		},
 	},
 	.state_count = 2,
 };
 static int __init calxeda_cpuidle_init(void)
 {
 	if (!of_machine_is_compatible("calxeda,highbank"))
 		return -ENODEV;
 	return cpuidle_register(&calxeda_idle_driver, NULL);
 }
 module_init(calxeda_cpuidle_init);