Doug / smarc-fsl-linux-kernel

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/*

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/*

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* linux/drivers/char/8250.c

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* linux/drivers/char/8250.c

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*

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*

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* Driver for 8250/16550-type serial ports

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* Driver for 8250/16550-type serial ports

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*

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*

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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.

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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.

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*

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*

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*

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*

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* This program is free software; you can redistribute it and/or modify

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* This program is free software; you can redistribute it and/or modify

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* it under the terms of the GNU General Public License as published by

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* it under the terms of the GNU General Public License as published by

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* the Free Software Foundation; either version 2 of the License, or

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* the Free Software Foundation; either version 2 of the License, or

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* (at your option) any later version.

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* (at your option) any later version.

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*

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*

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* A note about mapbase / membase

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* A note about mapbase / membase

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*

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*

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* mapbase is the physical address of the IO port.

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* mapbase is the physical address of the IO port.

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* membase is an 'ioremapped' cookie.

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* membase is an 'ioremapped' cookie.

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*/

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*/

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#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)

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#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)

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#define SUPPORT_SYSRQ

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#define SUPPORT_SYSRQ

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#endif

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#endif

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#include <linux/module.h>

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#include <linux/module.h>

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#include <linux/moduleparam.h>

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#include <linux/moduleparam.h>

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#include <linux/ioport.h>

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#include <linux/ioport.h>

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#include <linux/init.h>

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#include <linux/init.h>

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#include <linux/console.h>

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#include <linux/console.h>

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#include <linux/sysrq.h>

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#include <linux/sysrq.h>

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#include <linux/delay.h>

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#include <linux/delay.h>

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#include <linux/platform_device.h>

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#include <linux/platform_device.h>

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#include <linux/tty.h>

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#include <linux/tty.h>

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#include <linux/tty_flip.h>

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#include <linux/tty_flip.h>

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#include <linux/serial_reg.h>

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#include <linux/serial_reg.h>

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#include <linux/serial_core.h>

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#include <linux/serial_core.h>

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#include <linux/serial.h>

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#include <linux/serial.h>

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#include <linux/serial_8250.h>

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#include <linux/serial_8250.h>

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#include <linux/nmi.h>

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#include <linux/nmi.h>

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#include <linux/mutex.h>

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#include <linux/mutex.h>

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#include <asm/io.h>

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#include <asm/io.h>

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#include <asm/irq.h>

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#include <asm/irq.h>

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#include "8250.h"

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#include "8250.h"

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#ifdef CONFIG_SPARC

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#ifdef CONFIG_SPARC

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#include "suncore.h"

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#include "suncore.h"

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#endif

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#endif

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/*

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/*

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* Configuration:

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* Configuration:

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* share_irqs - whether we pass IRQF_SHARED to request_irq(). This option

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* share_irqs - whether we pass IRQF_SHARED to request_irq(). This option

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* is unsafe when used on edge-triggered interrupts.

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* is unsafe when used on edge-triggered interrupts.

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*/

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*/

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static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;

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static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;

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static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;

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static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;

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static struct uart_driver serial8250_reg;

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static struct uart_driver serial8250_reg;

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static int serial_index(struct uart_port *port)

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static int serial_index(struct uart_port *port)

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{

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{

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return (serial8250_reg.minor - 64) + port->line;

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return (serial8250_reg.minor - 64) + port->line;

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}

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}

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static unsigned int skip_txen_test; /* force skip of txen test at init time */

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static unsigned int skip_txen_test; /* force skip of txen test at init time */

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/*

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/*

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* Debugging.

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* Debugging.

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*/

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*/

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#if 0

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#if 0

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#define DEBUG_AUTOCONF(fmt...) printk(fmt)

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#define DEBUG_AUTOCONF(fmt...) printk(fmt)

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#else

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#else

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#define DEBUG_AUTOCONF(fmt...) do { } while (0)

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#define DEBUG_AUTOCONF(fmt...) do { } while (0)

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#endif

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#endif

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#if 0

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#if 0

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#define DEBUG_INTR(fmt...) printk(fmt)

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#define DEBUG_INTR(fmt...) printk(fmt)

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#else

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#else

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#define DEBUG_INTR(fmt...) do { } while (0)

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#define DEBUG_INTR(fmt...) do { } while (0)

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#endif

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#endif

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#define PASS_LIMIT 256

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#define PASS_LIMIT 256

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#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)

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/*

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/*

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* We default to IRQ0 for the "no irq" hack. Some

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* We default to IRQ0 for the "no irq" hack. Some

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* machine types want others as well - they're free

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* machine types want others as well - they're free

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* to redefine this in their header file.

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* to redefine this in their header file.

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*/

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*/

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#define is_real_interrupt(irq) ((irq) != 0)

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#define is_real_interrupt(irq) ((irq) != 0)

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#ifdef CONFIG_SERIAL_8250_DETECT_IRQ

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#ifdef CONFIG_SERIAL_8250_DETECT_IRQ

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#define CONFIG_SERIAL_DETECT_IRQ 1

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#define CONFIG_SERIAL_DETECT_IRQ 1

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#endif

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#endif

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#ifdef CONFIG_SERIAL_8250_MANY_PORTS

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#ifdef CONFIG_SERIAL_8250_MANY_PORTS

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#define CONFIG_SERIAL_MANY_PORTS 1

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#define CONFIG_SERIAL_MANY_PORTS 1

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#endif

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#endif

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/*

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/*

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* HUB6 is always on. This will be removed once the header

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* HUB6 is always on. This will be removed once the header

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* files have been cleaned.

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* files have been cleaned.

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*/

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*/

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#define CONFIG_HUB6 1

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#define CONFIG_HUB6 1

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#include <asm/serial.h>

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#include <asm/serial.h>

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/*

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/*

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* SERIAL_PORT_DFNS tells us about built-in ports that have no

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* SERIAL_PORT_DFNS tells us about built-in ports that have no

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* standard enumeration mechanism. Platforms that can find all

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* standard enumeration mechanism. Platforms that can find all

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* serial ports via mechanisms like ACPI or PCI need not supply it.

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* serial ports via mechanisms like ACPI or PCI need not supply it.

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*/

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*/

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#ifndef SERIAL_PORT_DFNS

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#ifndef SERIAL_PORT_DFNS

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#define SERIAL_PORT_DFNS

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#define SERIAL_PORT_DFNS

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#endif

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#endif

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static const struct old_serial_port old_serial_port[] = {

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static const struct old_serial_port old_serial_port[] = {

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SERIAL_PORT_DFNS /* defined in asm/serial.h */

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SERIAL_PORT_DFNS /* defined in asm/serial.h */

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};

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};

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#define UART_NR CONFIG_SERIAL_8250_NR_UARTS

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#define UART_NR CONFIG_SERIAL_8250_NR_UARTS

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#ifdef CONFIG_SERIAL_8250_RSA

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#ifdef CONFIG_SERIAL_8250_RSA

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#define PORT_RSA_MAX 4

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#define PORT_RSA_MAX 4

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static unsigned long probe_rsa[PORT_RSA_MAX];

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static unsigned long probe_rsa[PORT_RSA_MAX];

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static unsigned int probe_rsa_count;

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static unsigned int probe_rsa_count;

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#endif /* CONFIG_SERIAL_8250_RSA */

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#endif /* CONFIG_SERIAL_8250_RSA */

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struct uart_8250_port {

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struct uart_8250_port {

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struct uart_port port;

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struct uart_port port;

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struct timer_list timer; /* "no irq" timer */

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struct timer_list timer; /* "no irq" timer */

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struct list_head list; /* ports on this IRQ */

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struct list_head list; /* ports on this IRQ */

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unsigned short capabilities; /* port capabilities */

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unsigned short capabilities; /* port capabilities */

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unsigned short bugs; /* port bugs */

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unsigned short bugs; /* port bugs */

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unsigned int tx_loadsz; /* transmit fifo load size */

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unsigned int tx_loadsz; /* transmit fifo load size */

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unsigned char acr;

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unsigned char acr;

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unsigned char ier;

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unsigned char ier;

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unsigned char lcr;

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unsigned char lcr;

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unsigned char mcr;

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unsigned char mcr;

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unsigned char mcr_mask; /* mask of user bits */

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unsigned char mcr_mask; /* mask of user bits */

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unsigned char mcr_force; /* mask of forced bits */

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unsigned char mcr_force; /* mask of forced bits */

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unsigned char cur_iotype; /* Running I/O type */

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unsigned char cur_iotype; /* Running I/O type */

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/*

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/*

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* Some bits in registers are cleared on a read, so they must

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* Some bits in registers are cleared on a read, so they must

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* be saved whenever the register is read but the bits will not

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* be saved whenever the register is read but the bits will not

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* be immediately processed.

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* be immediately processed.

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*/

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*/

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#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS

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#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS

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unsigned char lsr_saved_flags;

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unsigned char lsr_saved_flags;

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#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA

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#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA

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unsigned char msr_saved_flags;

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unsigned char msr_saved_flags;

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/*

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/*

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* We provide a per-port pm hook.

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* We provide a per-port pm hook.

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*/

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*/

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void (*pm)(struct uart_port *port,

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void (*pm)(struct uart_port *port,

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unsigned int state, unsigned int old);

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unsigned int state, unsigned int old);

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};

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};

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struct irq_info {

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struct irq_info {

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struct hlist_node node;

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struct hlist_node node;

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int irq;

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int irq;

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spinlock_t lock; /* Protects list not the hash */

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spinlock_t lock; /* Protects list not the hash */

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struct list_head *head;

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struct list_head *head;

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};

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};

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#define NR_IRQ_HASH 32 /* Can be adjusted later */

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#define NR_IRQ_HASH 32 /* Can be adjusted later */

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static struct hlist_head irq_lists[NR_IRQ_HASH];

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static struct hlist_head irq_lists[NR_IRQ_HASH];

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static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */

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static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */

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/*

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/*

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* Here we define the default xmit fifo size used for each type of UART.

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* Here we define the default xmit fifo size used for each type of UART.

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*/

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*/

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static const struct serial8250_config uart_config[] = {

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static const struct serial8250_config uart_config[] = {

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[PORT_UNKNOWN] = {

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[PORT_UNKNOWN] = {

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.name = "unknown",

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.name = "unknown",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_8250] = {

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[PORT_8250] = {

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.name = "8250",

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.name = "8250",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_16450] = {

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[PORT_16450] = {

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.name = "16450",

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.name = "16450",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_16550] = {

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[PORT_16550] = {

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.name = "16550",

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.name = "16550",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_16550A] = {

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[PORT_16550A] = {

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.name = "16550A",

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.name = "16550A",

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.fifo_size = 16,

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.fifo_size = 16,

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.tx_loadsz = 16,

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.tx_loadsz = 16,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO,

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.flags = UART_CAP_FIFO,

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},

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},

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[PORT_CIRRUS] = {

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[PORT_CIRRUS] = {

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.name = "Cirrus",

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.name = "Cirrus",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_16650] = {

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[PORT_16650] = {

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.name = "ST16650",

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.name = "ST16650",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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},

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},

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[PORT_16650V2] = {

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[PORT_16650V2] = {

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.name = "ST16650V2",

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.name = "ST16650V2",

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.fifo_size = 32,

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.fifo_size = 32,

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.tx_loadsz = 16,

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.tx_loadsz = 16,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |

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UART_FCR_T_TRIG_00,

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UART_FCR_T_TRIG_00,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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},

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},

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[PORT_16750] = {

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[PORT_16750] = {

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.name = "TI16750",

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.name = "TI16750",

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.fifo_size = 64,

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.fifo_size = 64,

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.tx_loadsz = 64,

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.tx_loadsz = 64,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |

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UART_FCR7_64BYTE,

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UART_FCR7_64BYTE,

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.flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,

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.flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,

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},

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},

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[PORT_STARTECH] = {

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[PORT_STARTECH] = {

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.name = "Startech",

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.name = "Startech",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_16C950] = {

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[PORT_16C950] = {

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.name = "16C950/954",

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.name = "16C950/954",

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.fifo_size = 128,

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.fifo_size = 128,

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.tx_loadsz = 128,

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.tx_loadsz = 128,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO,

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.flags = UART_CAP_FIFO,

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},

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},

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[PORT_16654] = {

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[PORT_16654] = {

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.name = "ST16654",

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.name = "ST16654",

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.fifo_size = 64,

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.fifo_size = 64,

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.tx_loadsz = 32,

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.tx_loadsz = 32,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |

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UART_FCR_T_TRIG_10,

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UART_FCR_T_TRIG_10,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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},

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},

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[PORT_16850] = {

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[PORT_16850] = {

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.name = "XR16850",

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.name = "XR16850",

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.fifo_size = 128,

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.fifo_size = 128,

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.tx_loadsz = 128,

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.tx_loadsz = 128,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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},

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},

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[PORT_RSA] = {

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[PORT_RSA] = {

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.name = "RSA",

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.name = "RSA",

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.fifo_size = 2048,

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.fifo_size = 2048,

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.tx_loadsz = 2048,

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.tx_loadsz = 2048,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,

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.flags = UART_CAP_FIFO,

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.flags = UART_CAP_FIFO,

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},

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},

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[PORT_NS16550A] = {

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[PORT_NS16550A] = {

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.name = "NS16550A",

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.name = "NS16550A",

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.fifo_size = 16,

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.fifo_size = 16,

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.tx_loadsz = 16,

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.tx_loadsz = 16,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO | UART_NATSEMI,

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.flags = UART_CAP_FIFO | UART_NATSEMI,

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},

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},

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[PORT_XSCALE] = {

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[PORT_XSCALE] = {

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.name = "XScale",

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.name = "XScale",

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.fifo_size = 32,

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.fifo_size = 32,

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.tx_loadsz = 32,

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.tx_loadsz = 32,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO | UART_CAP_UUE,

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.flags = UART_CAP_FIFO | UART_CAP_UUE,

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},

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},

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[PORT_RM9000] = {

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[PORT_RM9000] = {

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.name = "RM9000",

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.name = "RM9000",

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.fifo_size = 16,

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.fifo_size = 16,

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.tx_loadsz = 16,

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.tx_loadsz = 16,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO,

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.flags = UART_CAP_FIFO,

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},

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},

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[PORT_OCTEON] = {

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[PORT_OCTEON] = {

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.name = "OCTEON",

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.name = "OCTEON",

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.fifo_size = 64,

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.fifo_size = 64,

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.tx_loadsz = 64,

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.tx_loadsz = 64,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO,

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.flags = UART_CAP_FIFO,

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},

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},

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[PORT_AR7] = {

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[PORT_AR7] = {

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.name = "AR7",

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.name = "AR7",

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.fifo_size = 16,

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.fifo_size = 16,

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.tx_loadsz = 16,

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.tx_loadsz = 16,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,

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.flags = UART_CAP_FIFO | UART_CAP_AFE,

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.flags = UART_CAP_FIFO | UART_CAP_AFE,

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},

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},

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};

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};

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#if defined (CONFIG_SERIAL_8250_AU1X00)

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#if defined (CONFIG_SERIAL_8250_AU1X00)

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/* Au1x00 UART hardware has a weird register layout */

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/* Au1x00 UART hardware has a weird register layout */

304

static const u8 au_io_in_map[] = {

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static const u8 au_io_in_map[] = {

305

[UART_RX] = 0,

308

[UART_RX] = 0,

306

[UART_IER] = 2,

309

[UART_IER] = 2,

307

[UART_IIR] = 3,

310

[UART_IIR] = 3,

308

[UART_LCR] = 5,

311

[UART_LCR] = 5,

309

[UART_MCR] = 6,

312

[UART_MCR] = 6,

310

[UART_LSR] = 7,

313

[UART_LSR] = 7,

311

[UART_MSR] = 8,

314

[UART_MSR] = 8,

312

};

315

};

313

316

314

static const u8 au_io_out_map[] = {

317

static const u8 au_io_out_map[] = {

315

[UART_TX] = 1,

318

[UART_TX] = 1,

316

[UART_IER] = 2,

319

[UART_IER] = 2,

317

[UART_FCR] = 4,

320

[UART_FCR] = 4,

318

[UART_LCR] = 5,

321

[UART_LCR] = 5,

319

[UART_MCR] = 6,

322

[UART_MCR] = 6,

320

};

323

};

321

324

322

/* sane hardware needs no mapping */

325

/* sane hardware needs no mapping */

323

static inline int map_8250_in_reg(struct uart_port *p, int offset)

326

static inline int map_8250_in_reg(struct uart_port *p, int offset)

324

{

327

{

325

if (p->iotype != UPIO_AU)

328

if (p->iotype != UPIO_AU)

326

return offset;

329

return offset;

327

return au_io_in_map[offset];

330

return au_io_in_map[offset];

328

}

331

}

329

332

330

static inline int map_8250_out_reg(struct uart_port *p, int offset)

333

static inline int map_8250_out_reg(struct uart_port *p, int offset)

331

{

334

{

332

if (p->iotype != UPIO_AU)

335

if (p->iotype != UPIO_AU)

333

return offset;

336

return offset;

334

return au_io_out_map[offset];

337

return au_io_out_map[offset];

335

}

338

}

336

339

337

#elif defined(CONFIG_SERIAL_8250_RM9K)

340

#elif defined(CONFIG_SERIAL_8250_RM9K)

338

341

339

static const u8

342

static const u8

340

regmap_in[8] = {

343

regmap_in[8] = {

341

[UART_RX] = 0x00,

344

[UART_RX] = 0x00,

342

[UART_IER] = 0x0c,

345

[UART_IER] = 0x0c,

343

[UART_IIR] = 0x14,

346

[UART_IIR] = 0x14,

344

[UART_LCR] = 0x1c,

347

[UART_LCR] = 0x1c,

345

[UART_MCR] = 0x20,

348

[UART_MCR] = 0x20,

346

[UART_LSR] = 0x24,

349

[UART_LSR] = 0x24,

347

[UART_MSR] = 0x28,

350

[UART_MSR] = 0x28,

348

[UART_SCR] = 0x2c

351

[UART_SCR] = 0x2c

349

},

352

},

350

regmap_out[8] = {

353

regmap_out[8] = {

351

[UART_TX] = 0x04,

354

[UART_TX] = 0x04,

352

[UART_IER] = 0x0c,

355

[UART_IER] = 0x0c,

353

[UART_FCR] = 0x18,

356

[UART_FCR] = 0x18,

354

[UART_LCR] = 0x1c,

357

[UART_LCR] = 0x1c,

355

[UART_MCR] = 0x20,

358

[UART_MCR] = 0x20,

356

[UART_LSR] = 0x24,

359

[UART_LSR] = 0x24,

357

[UART_MSR] = 0x28,

360

[UART_MSR] = 0x28,

358

[UART_SCR] = 0x2c

361

[UART_SCR] = 0x2c

359

};

362

};

360

363

361

static inline int map_8250_in_reg(struct uart_port *p, int offset)

364

static inline int map_8250_in_reg(struct uart_port *p, int offset)

362

{

365

{

363

if (p->iotype != UPIO_RM9000)

366

if (p->iotype != UPIO_RM9000)

364

return offset;

367

return offset;

365

return regmap_in[offset];

368

return regmap_in[offset];

366

}

369

}

367

370

368

static inline int map_8250_out_reg(struct uart_port *p, int offset)

371

static inline int map_8250_out_reg(struct uart_port *p, int offset)

369

{

372

{

370

if (p->iotype != UPIO_RM9000)

373

if (p->iotype != UPIO_RM9000)

371

return offset;

374

return offset;

372

return regmap_out[offset];

375

return regmap_out[offset];

373

}

376

}

374

377

375

#else

378

#else

376

379

377

/* sane hardware needs no mapping */

380

/* sane hardware needs no mapping */

378

#define map_8250_in_reg(up, offset) (offset)

381

#define map_8250_in_reg(up, offset) (offset)

379

#define map_8250_out_reg(up, offset) (offset)

382

#define map_8250_out_reg(up, offset) (offset)

380

383

381

#endif

384

#endif

382

385

383

static unsigned int hub6_serial_in(struct uart_port *p, int offset)

386

static unsigned int hub6_serial_in(struct uart_port *p, int offset)

384

{

387

{

385

offset = map_8250_in_reg(p, offset) << p->regshift;

388

offset = map_8250_in_reg(p, offset) << p->regshift;

386

outb(p->hub6 - 1 + offset, p->iobase);

389

outb(p->hub6 - 1 + offset, p->iobase);

387

return inb(p->iobase + 1);

390

return inb(p->iobase + 1);

388

}

391

}

389

392

390

static void hub6_serial_out(struct uart_port *p, int offset, int value)

393

static void hub6_serial_out(struct uart_port *p, int offset, int value)

391

{

394

{

392

offset = map_8250_out_reg(p, offset) << p->regshift;

395

offset = map_8250_out_reg(p, offset) << p->regshift;

393

outb(p->hub6 - 1 + offset, p->iobase);

396

outb(p->hub6 - 1 + offset, p->iobase);

394

outb(value, p->iobase + 1);

397

outb(value, p->iobase + 1);

395

}

398

}

396

399

397

static unsigned int mem_serial_in(struct uart_port *p, int offset)

400

static unsigned int mem_serial_in(struct uart_port *p, int offset)

398

{

401

{

399

offset = map_8250_in_reg(p, offset) << p->regshift;

402

offset = map_8250_in_reg(p, offset) << p->regshift;

400

return readb(p->membase + offset);

403

return readb(p->membase + offset);

401

}

404

}

402

405

403

static void mem_serial_out(struct uart_port *p, int offset, int value)

406

static void mem_serial_out(struct uart_port *p, int offset, int value)

404

{

407

{

405

offset = map_8250_out_reg(p, offset) << p->regshift;

408

offset = map_8250_out_reg(p, offset) << p->regshift;

406

writeb(value, p->membase + offset);

409

writeb(value, p->membase + offset);

407

}

410

}

408

411

409

static void mem32_serial_out(struct uart_port *p, int offset, int value)

412

static void mem32_serial_out(struct uart_port *p, int offset, int value)

410

{

413

{

411

offset = map_8250_out_reg(p, offset) << p->regshift;

414

offset = map_8250_out_reg(p, offset) << p->regshift;

412

writel(value, p->membase + offset);

415

writel(value, p->membase + offset);

413

}

416

}

414

417

415

static unsigned int mem32_serial_in(struct uart_port *p, int offset)

418

static unsigned int mem32_serial_in(struct uart_port *p, int offset)

416

{

419

{

417

offset = map_8250_in_reg(p, offset) << p->regshift;

420

offset = map_8250_in_reg(p, offset) << p->regshift;

418

return readl(p->membase + offset);

421

return readl(p->membase + offset);

419

}

422

}

420

423

421

#ifdef CONFIG_SERIAL_8250_AU1X00

424

#ifdef CONFIG_SERIAL_8250_AU1X00

422

static unsigned int au_serial_in(struct uart_port *p, int offset)

425

static unsigned int au_serial_in(struct uart_port *p, int offset)

423

{

426

{

424

offset = map_8250_in_reg(p, offset) << p->regshift;

427

offset = map_8250_in_reg(p, offset) << p->regshift;

425

return __raw_readl(p->membase + offset);

428

return __raw_readl(p->membase + offset);

426

}

429

}

427

430

428

static void au_serial_out(struct uart_port *p, int offset, int value)

431

static void au_serial_out(struct uart_port *p, int offset, int value)

429

{

432

{

430

offset = map_8250_out_reg(p, offset) << p->regshift;

433

offset = map_8250_out_reg(p, offset) << p->regshift;

431

__raw_writel(value, p->membase + offset);

434

__raw_writel(value, p->membase + offset);

432

}

435

}

433

#endif

436

#endif

434

437

435

static unsigned int tsi_serial_in(struct uart_port *p, int offset)

438

static unsigned int tsi_serial_in(struct uart_port *p, int offset)

436

{

439

{

437

unsigned int tmp;

440

unsigned int tmp;

438

offset = map_8250_in_reg(p, offset) << p->regshift;

441

offset = map_8250_in_reg(p, offset) << p->regshift;

439

if (offset == UART_IIR) {

442

if (offset == UART_IIR) {

440

tmp = readl(p->membase + (UART_IIR & ~3));

443

tmp = readl(p->membase + (UART_IIR & ~3));

441

return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */

444

return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */

442

} else

445

} else

443

return readb(p->membase + offset);

446

return readb(p->membase + offset);

444

}

447

}

445

448

446

static void tsi_serial_out(struct uart_port *p, int offset, int value)

449

static void tsi_serial_out(struct uart_port *p, int offset, int value)

447

{

450

{

448

offset = map_8250_out_reg(p, offset) << p->regshift;

451

offset = map_8250_out_reg(p, offset) << p->regshift;

449

if (!((offset == UART_IER) && (value & UART_IER_UUE)))

452

if (!((offset == UART_IER) && (value & UART_IER_UUE)))

450

writeb(value, p->membase + offset);

453

writeb(value, p->membase + offset);

451

}

454

}

452

455

453

static void dwapb_serial_out(struct uart_port *p, int offset, int value)

456

static void dwapb_serial_out(struct uart_port *p, int offset, int value)

454

{

457

{

455

int save_offset = offset;

458

int save_offset = offset;

456

offset = map_8250_out_reg(p, offset) << p->regshift;

459

offset = map_8250_out_reg(p, offset) << p->regshift;

457

/* Save the LCR value so it can be re-written when a

460

/* Save the LCR value so it can be re-written when a

458

* Busy Detect interrupt occurs. */

461

* Busy Detect interrupt occurs. */

459

if (save_offset == UART_LCR) {

462

if (save_offset == UART_LCR) {

460

struct uart_8250_port *up = (struct uart_8250_port *)p;

463

struct uart_8250_port *up = (struct uart_8250_port *)p;

461

up->lcr = value;

464

up->lcr = value;

462

}

465

}

463

writeb(value, p->membase + offset);

466

writeb(value, p->membase + offset);

464

/* Read the IER to ensure any interrupt is cleared before

467

/* Read the IER to ensure any interrupt is cleared before

465

* returning from ISR. */

468

* returning from ISR. */

466

if (save_offset == UART_TX || save_offset == UART_IER)

469

if (save_offset == UART_TX || save_offset == UART_IER)

467

value = p->serial_in(p, UART_IER);

470

value = p->serial_in(p, UART_IER);

468

}

471

}

469

472

470

static unsigned int io_serial_in(struct uart_port *p, int offset)

473

static unsigned int io_serial_in(struct uart_port *p, int offset)

471

{

474

{

472

offset = map_8250_in_reg(p, offset) << p->regshift;

475

offset = map_8250_in_reg(p, offset) << p->regshift;

473

return inb(p->iobase + offset);

476

return inb(p->iobase + offset);

474

}

477

}

475

478

476

static void io_serial_out(struct uart_port *p, int offset, int value)

479

static void io_serial_out(struct uart_port *p, int offset, int value)

477

{

480

{

478

offset = map_8250_out_reg(p, offset) << p->regshift;

481

offset = map_8250_out_reg(p, offset) << p->regshift;

479

outb(value, p->iobase + offset);

482

outb(value, p->iobase + offset);

480

}

483

}

481

484

482

static void set_io_from_upio(struct uart_port *p)

485

static void set_io_from_upio(struct uart_port *p)

483

{

486

{

484

struct uart_8250_port *up = (struct uart_8250_port *)p;

487

struct uart_8250_port *up = (struct uart_8250_port *)p;

485

switch (p->iotype) {

488

switch (p->iotype) {

486

case UPIO_HUB6:

489

case UPIO_HUB6:

487

p->serial_in = hub6_serial_in;

490

p->serial_in = hub6_serial_in;

488

p->serial_out = hub6_serial_out;

491

p->serial_out = hub6_serial_out;

489

break;

492

break;

490

493

491

case UPIO_MEM:

494

case UPIO_MEM:

492

p->serial_in = mem_serial_in;

495

p->serial_in = mem_serial_in;

493

p->serial_out = mem_serial_out;

496

p->serial_out = mem_serial_out;

494

break;

497

break;

495

498

496

case UPIO_RM9000:

499

case UPIO_RM9000:

497

case UPIO_MEM32:

500

case UPIO_MEM32:

498

p->serial_in = mem32_serial_in;

501

p->serial_in = mem32_serial_in;

499

p->serial_out = mem32_serial_out;

502

p->serial_out = mem32_serial_out;

500

break;

503

break;

501

504

502

#ifdef CONFIG_SERIAL_8250_AU1X00

505

#ifdef CONFIG_SERIAL_8250_AU1X00

503

case UPIO_AU:

506

case UPIO_AU:

504

p->serial_in = au_serial_in;

507

p->serial_in = au_serial_in;

505

p->serial_out = au_serial_out;

508

p->serial_out = au_serial_out;

506

break;

509

break;

507

#endif

510

#endif

508

case UPIO_TSI:

511

case UPIO_TSI:

509

p->serial_in = tsi_serial_in;

512

p->serial_in = tsi_serial_in;

510

p->serial_out = tsi_serial_out;

513

p->serial_out = tsi_serial_out;

511

break;

514

break;

512

515

513

case UPIO_DWAPB:

516

case UPIO_DWAPB:

514

p->serial_in = mem_serial_in;

517

p->serial_in = mem_serial_in;

515

p->serial_out = dwapb_serial_out;

518

p->serial_out = dwapb_serial_out;

516

break;

519

break;

517

520

518

default:

521

default:

519

p->serial_in = io_serial_in;

522

p->serial_in = io_serial_in;

520

p->serial_out = io_serial_out;

523

p->serial_out = io_serial_out;

521

break;

524

break;

522

}

525

}

523

/* Remember loaded iotype */

526

/* Remember loaded iotype */

524

up->cur_iotype = p->iotype;

527

up->cur_iotype = p->iotype;

525

}

528

}

526

529

527

static void

530

static void

528

serial_out_sync(struct uart_8250_port *up, int offset, int value)

531

serial_out_sync(struct uart_8250_port *up, int offset, int value)

529

{

532

{

530

struct uart_port *p = &up->port;

533

struct uart_port *p = &up->port;

531

switch (p->iotype) {

534

switch (p->iotype) {

532

case UPIO_MEM:

535

case UPIO_MEM:

533

case UPIO_MEM32:

536

case UPIO_MEM32:

534

#ifdef CONFIG_SERIAL_8250_AU1X00

537

#ifdef CONFIG_SERIAL_8250_AU1X00

535

case UPIO_AU:

538

case UPIO_AU:

536

#endif

539

#endif

537

case UPIO_DWAPB:

540

case UPIO_DWAPB:

538

p->serial_out(p, offset, value);

541

p->serial_out(p, offset, value);

539

p->serial_in(p, UART_LCR); /* safe, no side-effects */

542

p->serial_in(p, UART_LCR); /* safe, no side-effects */

540

break;

543

break;

541

default:

544

default:

542

p->serial_out(p, offset, value);

545

p->serial_out(p, offset, value);

543

}

546

}

544

}

547

}

545

548

546

#define serial_in(up, offset) \

549

#define serial_in(up, offset) \

547

(up->port.serial_in(&(up)->port, (offset)))

550

(up->port.serial_in(&(up)->port, (offset)))

548

#define serial_out(up, offset, value) \

551

#define serial_out(up, offset, value) \

549

(up->port.serial_out(&(up)->port, (offset), (value)))

552

(up->port.serial_out(&(up)->port, (offset), (value)))

550

/*

553

/*

551

* We used to support using pause I/O for certain machines. We

554

* We used to support using pause I/O for certain machines. We

552

* haven't supported this for a while, but just in case it's badly

555

* haven't supported this for a while, but just in case it's badly

553

* needed for certain old 386 machines, I've left these #define's

556

* needed for certain old 386 machines, I've left these #define's

554

* in....

557

* in....

555

*/

558

*/

556

#define serial_inp(up, offset) serial_in(up, offset)

559

#define serial_inp(up, offset) serial_in(up, offset)

557

#define serial_outp(up, offset, value) serial_out(up, offset, value)

560

#define serial_outp(up, offset, value) serial_out(up, offset, value)

558

561

559

/* Uart divisor latch read */

562

/* Uart divisor latch read */

560

static inline int _serial_dl_read(struct uart_8250_port *up)

563

static inline int _serial_dl_read(struct uart_8250_port *up)

561

{

564

{

562

return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;

565

return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;

563

}

566

}

564

567

565

/* Uart divisor latch write */

568

/* Uart divisor latch write */

566

static inline void _serial_dl_write(struct uart_8250_port *up, int value)

569

static inline void _serial_dl_write(struct uart_8250_port *up, int value)

567

{

570

{

568

serial_outp(up, UART_DLL, value & 0xff);

571

serial_outp(up, UART_DLL, value & 0xff);

569

serial_outp(up, UART_DLM, value >> 8 & 0xff);

572

serial_outp(up, UART_DLM, value >> 8 & 0xff);

570

}

573

}

571

574

572

#if defined(CONFIG_SERIAL_8250_AU1X00)

575

#if defined(CONFIG_SERIAL_8250_AU1X00)

573

/* Au1x00 haven't got a standard divisor latch */

576

/* Au1x00 haven't got a standard divisor latch */

574

static int serial_dl_read(struct uart_8250_port *up)

577

static int serial_dl_read(struct uart_8250_port *up)

575

{

578

{

576

if (up->port.iotype == UPIO_AU)

579

if (up->port.iotype == UPIO_AU)

577

return __raw_readl(up->port.membase + 0x28);

580

return __raw_readl(up->port.membase + 0x28);

578

else

581

else

579

return _serial_dl_read(up);

582

return _serial_dl_read(up);

580

}

583

}

581

584

582

static void serial_dl_write(struct uart_8250_port *up, int value)

585

static void serial_dl_write(struct uart_8250_port *up, int value)

583

{

586

{

584

if (up->port.iotype == UPIO_AU)

587

if (up->port.iotype == UPIO_AU)

585

__raw_writel(value, up->port.membase + 0x28);

588

__raw_writel(value, up->port.membase + 0x28);

586

else

589

else

587

_serial_dl_write(up, value);

590

_serial_dl_write(up, value);

588

}

591

}

589

#elif defined(CONFIG_SERIAL_8250_RM9K)

592

#elif defined(CONFIG_SERIAL_8250_RM9K)

590

static int serial_dl_read(struct uart_8250_port *up)

593

static int serial_dl_read(struct uart_8250_port *up)

591

{

594

{

592

return (up->port.iotype == UPIO_RM9000) ?

595

return (up->port.iotype == UPIO_RM9000) ?

593

(((__raw_readl(up->port.membase + 0x10) << 8) |

596

(((__raw_readl(up->port.membase + 0x10) << 8) |

594

(__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :

597

(__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :

595

_serial_dl_read(up);

598

_serial_dl_read(up);

596

}

599

}

597

600

598

static void serial_dl_write(struct uart_8250_port *up, int value)

601

static void serial_dl_write(struct uart_8250_port *up, int value)

599

{

602

{

600

if (up->port.iotype == UPIO_RM9000) {

603

if (up->port.iotype == UPIO_RM9000) {

601

__raw_writel(value, up->port.membase + 0x08);

604

__raw_writel(value, up->port.membase + 0x08);

602

__raw_writel(value >> 8, up->port.membase + 0x10);

605

__raw_writel(value >> 8, up->port.membase + 0x10);

603

} else {

606

} else {

604

_serial_dl_write(up, value);

607

_serial_dl_write(up, value);

605

}

608

}

606

}

609

}

607

#else

610

#else

608

#define serial_dl_read(up) _serial_dl_read(up)

611

#define serial_dl_read(up) _serial_dl_read(up)

609

#define serial_dl_write(up, value) _serial_dl_write(up, value)

612

#define serial_dl_write(up, value) _serial_dl_write(up, value)

610

#endif

613

#endif

611

614

612

/*

615

/*

613

* For the 16C950

616

* For the 16C950

614

*/

617

*/

615

static void serial_icr_write(struct uart_8250_port *up, int offset, int value)

618

static void serial_icr_write(struct uart_8250_port *up, int offset, int value)

616

{

619

{

617

serial_out(up, UART_SCR, offset);

620

serial_out(up, UART_SCR, offset);

618

serial_out(up, UART_ICR, value);

621

serial_out(up, UART_ICR, value);

619

}

622

}

620

623

621

static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)

624

static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)

622

{

625

{

623

unsigned int value;

626

unsigned int value;

624

627

625

serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);

628

serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);

626

serial_out(up, UART_SCR, offset);

629

serial_out(up, UART_SCR, offset);

627

value = serial_in(up, UART_ICR);

630

value = serial_in(up, UART_ICR);

628

serial_icr_write(up, UART_ACR, up->acr);

631

serial_icr_write(up, UART_ACR, up->acr);

629

632

630

return value;

633

return value;

631

}

634

}

632

635

633

/*

636

/*

634

* FIFO support.

637

* FIFO support.

635

*/

638

*/

636

static void serial8250_clear_fifos(struct uart_8250_port *p)

639

static void serial8250_clear_fifos(struct uart_8250_port *p)

637

{

640

{

638

if (p->capabilities & UART_CAP_FIFO) {

641

if (p->capabilities & UART_CAP_FIFO) {

639

serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);

642

serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);

640

serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |

643

serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |

641

UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);

644

UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);

642

serial_outp(p, UART_FCR, 0);

645

serial_outp(p, UART_FCR, 0);

643

}

646

}

644

}

647

}

645

648

646

/*

649

/*

647

* IER sleep support. UARTs which have EFRs need the "extended

650

* IER sleep support. UARTs which have EFRs need the "extended

648

* capability" bit enabled. Note that on XR16C850s, we need to

651

* capability" bit enabled. Note that on XR16C850s, we need to

649

* reset LCR to write to IER.

652

* reset LCR to write to IER.

650

*/

653

*/

651

static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)

654

static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)

652

{

655

{

653

if (p->capabilities & UART_CAP_SLEEP) {

656

if (p->capabilities & UART_CAP_SLEEP) {

654

if (p->capabilities & UART_CAP_EFR) {

657

if (p->capabilities & UART_CAP_EFR) {

655

serial_outp(p, UART_LCR, 0xBF);

658

serial_outp(p, UART_LCR, 0xBF);

656

serial_outp(p, UART_EFR, UART_EFR_ECB);

659

serial_outp(p, UART_EFR, UART_EFR_ECB);

657

serial_outp(p, UART_LCR, 0);

660

serial_outp(p, UART_LCR, 0);

658

}

661

}

659

serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);

662

serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);

660

if (p->capabilities & UART_CAP_EFR) {

663

if (p->capabilities & UART_CAP_EFR) {

661

serial_outp(p, UART_LCR, 0xBF);

664

serial_outp(p, UART_LCR, 0xBF);

662

serial_outp(p, UART_EFR, 0);

665

serial_outp(p, UART_EFR, 0);

663

serial_outp(p, UART_LCR, 0);

666

serial_outp(p, UART_LCR, 0);

664

}

667

}

665

}

668

}

666

}

669

}

667

670

668

#ifdef CONFIG_SERIAL_8250_RSA

671

#ifdef CONFIG_SERIAL_8250_RSA

669

/*

672

/*

670

* Attempts to turn on the RSA FIFO. Returns zero on failure.

673

* Attempts to turn on the RSA FIFO. Returns zero on failure.

671

* We set the port uart clock rate if we succeed.

674

* We set the port uart clock rate if we succeed.

672

*/

675

*/

673

static int __enable_rsa(struct uart_8250_port *up)

676

static int __enable_rsa(struct uart_8250_port *up)

674

{

677

{

675

unsigned char mode;

678

unsigned char mode;

676

int result;

679

int result;

677

680

678

mode = serial_inp(up, UART_RSA_MSR);

681

mode = serial_inp(up, UART_RSA_MSR);

679

result = mode & UART_RSA_MSR_FIFO;

682

result = mode & UART_RSA_MSR_FIFO;

680

683

681

if (!result) {

684

if (!result) {

682

serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);

685

serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);

683

mode = serial_inp(up, UART_RSA_MSR);

686

mode = serial_inp(up, UART_RSA_MSR);

684

result = mode & UART_RSA_MSR_FIFO;

687

result = mode & UART_RSA_MSR_FIFO;

685

}

688

}

686

689

687

if (result)

690

if (result)

688

up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;

691

up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;

689

692

690

return result;

693

return result;

691

}

694

}

692

695

693

static void enable_rsa(struct uart_8250_port *up)

696

static void enable_rsa(struct uart_8250_port *up)

694

{

697

{

695

if (up->port.type == PORT_RSA) {

698

if (up->port.type == PORT_RSA) {

696

if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {

699

if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {

697

spin_lock_irq(&up->port.lock);

700

spin_lock_irq(&up->port.lock);

698

__enable_rsa(up);

701

__enable_rsa(up);

699

spin_unlock_irq(&up->port.lock);

702

spin_unlock_irq(&up->port.lock);

700

}

703

}

701

if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)

704

if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)

702

serial_outp(up, UART_RSA_FRR, 0);

705

serial_outp(up, UART_RSA_FRR, 0);

703

}

706

}

704

}

707

}

705

708

706

/*

709

/*

707

* Attempts to turn off the RSA FIFO. Returns zero on failure.

710

* Attempts to turn off the RSA FIFO. Returns zero on failure.

708

* It is unknown why interrupts were disabled in here. However,

711

* It is unknown why interrupts were disabled in here. However,

709

* the caller is expected to preserve this behaviour by grabbing

712

* the caller is expected to preserve this behaviour by grabbing

710

* the spinlock before calling this function.

713

* the spinlock before calling this function.

711

*/

714

*/

712

static void disable_rsa(struct uart_8250_port *up)

715

static void disable_rsa(struct uart_8250_port *up)

713

{

716

{

714

unsigned char mode;

717

unsigned char mode;

715

int result;

718

int result;

716

719

717

if (up->port.type == PORT_RSA &&

720

if (up->port.type == PORT_RSA &&

718

up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {

721

up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {

719

spin_lock_irq(&up->port.lock);

722

spin_lock_irq(&up->port.lock);

720

723

721

mode = serial_inp(up, UART_RSA_MSR);

724

mode = serial_inp(up, UART_RSA_MSR);

722

result = !(mode & UART_RSA_MSR_FIFO);

725

result = !(mode & UART_RSA_MSR_FIFO);

723

726

724

if (!result) {

727

if (!result) {

725

serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);

728

serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);

726

mode = serial_inp(up, UART_RSA_MSR);

729

mode = serial_inp(up, UART_RSA_MSR);

727

result = !(mode & UART_RSA_MSR_FIFO);

730

result = !(mode & UART_RSA_MSR_FIFO);

728

}

731

}

729

732

730

if (result)

733

if (result)

731

up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;

734

up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;

732

spin_unlock_irq(&up->port.lock);

735

spin_unlock_irq(&up->port.lock);

733

}

736

}

734

}

737

}

735

#endif /* CONFIG_SERIAL_8250_RSA */

738

#endif /* CONFIG_SERIAL_8250_RSA */

736

739

737

/*

740

/*

738

* This is a quickie test to see how big the FIFO is.

741

* This is a quickie test to see how big the FIFO is.

739

* It doesn't work at all the time, more's the pity.

742

* It doesn't work at all the time, more's the pity.

740

*/

743

*/

741

static int size_fifo(struct uart_8250_port *up)

744

static int size_fifo(struct uart_8250_port *up)

742

{

745

{

743

unsigned char old_fcr, old_mcr, old_lcr;

746

unsigned char old_fcr, old_mcr, old_lcr;

744

unsigned short old_dl;

747

unsigned short old_dl;

745

int count;

748

int count;

746

749

747

old_lcr = serial_inp(up, UART_LCR);

750

old_lcr = serial_inp(up, UART_LCR);

748

serial_outp(up, UART_LCR, 0);

751

serial_outp(up, UART_LCR, 0);

749

old_fcr = serial_inp(up, UART_FCR);

752

old_fcr = serial_inp(up, UART_FCR);

750

old_mcr = serial_inp(up, UART_MCR);

753

old_mcr = serial_inp(up, UART_MCR);

751

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |

754

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |

752

UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);

755

UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);

753

serial_outp(up, UART_MCR, UART_MCR_LOOP);

756

serial_outp(up, UART_MCR, UART_MCR_LOOP);

754

serial_outp(up, UART_LCR, UART_LCR_DLAB);

757

serial_outp(up, UART_LCR, UART_LCR_DLAB);

755

old_dl = serial_dl_read(up);

758

old_dl = serial_dl_read(up);

756

serial_dl_write(up, 0x0001);

759

serial_dl_write(up, 0x0001);

757

serial_outp(up, UART_LCR, 0x03);

760

serial_outp(up, UART_LCR, 0x03);

758

for (count = 0; count < 256; count++)

761

for (count = 0; count < 256; count++)

759

serial_outp(up, UART_TX, count);

762

serial_outp(up, UART_TX, count);

760

mdelay(20);/* FIXME - schedule_timeout */

763

mdelay(20);/* FIXME - schedule_timeout */

761

for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&

764

for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&

762

(count < 256); count++)

765

(count < 256); count++)

763

serial_inp(up, UART_RX);

766

serial_inp(up, UART_RX);

764

serial_outp(up, UART_FCR, old_fcr);

767

serial_outp(up, UART_FCR, old_fcr);

765

serial_outp(up, UART_MCR, old_mcr);

768

serial_outp(up, UART_MCR, old_mcr);

766

serial_outp(up, UART_LCR, UART_LCR_DLAB);

769

serial_outp(up, UART_LCR, UART_LCR_DLAB);

767

serial_dl_write(up, old_dl);

770

serial_dl_write(up, old_dl);

768

serial_outp(up, UART_LCR, old_lcr);

771

serial_outp(up, UART_LCR, old_lcr);

769

772

770

return count;

773

return count;

771

}

774

}

772

775

773

/*

776

/*

774

* Read UART ID using the divisor method - set DLL and DLM to zero

777

* Read UART ID using the divisor method - set DLL and DLM to zero

775

* and the revision will be in DLL and device type in DLM. We

778

* and the revision will be in DLL and device type in DLM. We

776

* preserve the device state across this.

779

* preserve the device state across this.

777

*/

780

*/

778

static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)

781

static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)

779

{

782

{

780

unsigned char old_dll, old_dlm, old_lcr;

783

unsigned char old_dll, old_dlm, old_lcr;

781

unsigned int id;

784

unsigned int id;

782

785

783

old_lcr = serial_inp(p, UART_LCR);

786

old_lcr = serial_inp(p, UART_LCR);

784

serial_outp(p, UART_LCR, UART_LCR_DLAB);

787

serial_outp(p, UART_LCR, UART_LCR_DLAB);

785

788

786

old_dll = serial_inp(p, UART_DLL);

789

old_dll = serial_inp(p, UART_DLL);

787

old_dlm = serial_inp(p, UART_DLM);

790

old_dlm = serial_inp(p, UART_DLM);

788

791

789

serial_outp(p, UART_DLL, 0);

792

serial_outp(p, UART_DLL, 0);

790

serial_outp(p, UART_DLM, 0);

793

serial_outp(p, UART_DLM, 0);

791

794

792

id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;

795

id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;

793

796

794

serial_outp(p, UART_DLL, old_dll);

797

serial_outp(p, UART_DLL, old_dll);

795

serial_outp(p, UART_DLM, old_dlm);

798

serial_outp(p, UART_DLM, old_dlm);

796

serial_outp(p, UART_LCR, old_lcr);

799

serial_outp(p, UART_LCR, old_lcr);

797

800

798

return id;

801

return id;

799

}

802

}

800

803

801

/*

804

/*

802

* This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.

805

* This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.

803

* When this function is called we know it is at least a StarTech

806

* When this function is called we know it is at least a StarTech

804

* 16650 V2, but it might be one of several StarTech UARTs, or one of

807

* 16650 V2, but it might be one of several StarTech UARTs, or one of

805

* its clones. (We treat the broken original StarTech 16650 V1 as a

808

* its clones. (We treat the broken original StarTech 16650 V1 as a

806

* 16550, and why not? Startech doesn't seem to even acknowledge its

809

* 16550, and why not? Startech doesn't seem to even acknowledge its

807

* existence.)

810

* existence.)

808

*

811

*

809

* What evil have men's minds wrought...

812

* What evil have men's minds wrought...

810

*/

813

*/

811

static void autoconfig_has_efr(struct uart_8250_port *up)

814

static void autoconfig_has_efr(struct uart_8250_port *up)

812

{

815

{

813

unsigned int id1, id2, id3, rev;

816

unsigned int id1, id2, id3, rev;

814

817

815

/*

818

/*

816

* Everything with an EFR has SLEEP

819

* Everything with an EFR has SLEEP

817

*/

820

*/

818

up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;

821

up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;

819

822

820

/*

823

/*

821

* First we check to see if it's an Oxford Semiconductor UART.

824

* First we check to see if it's an Oxford Semiconductor UART.

822

*

825

*

823

* If we have to do this here because some non-National

826

* If we have to do this here because some non-National

824

* Semiconductor clone chips lock up if you try writing to the

827

* Semiconductor clone chips lock up if you try writing to the

825

* LSR register (which serial_icr_read does)

828

* LSR register (which serial_icr_read does)

826

*/

829

*/

827

830

828

/*

831

/*

829

* Check for Oxford Semiconductor 16C950.

832

* Check for Oxford Semiconductor 16C950.

830

*

833

*

831

* EFR [4] must be set else this test fails.

834

* EFR [4] must be set else this test fails.

832

*

835

*

833

* This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)

836

* This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)

834

* claims that it's needed for 952 dual UART's (which are not

837

* claims that it's needed for 952 dual UART's (which are not

835

* recommended for new designs).

838

* recommended for new designs).

836

*/

839

*/

837

up->acr = 0;

840

up->acr = 0;

838

serial_out(up, UART_LCR, 0xBF);

841

serial_out(up, UART_LCR, 0xBF);

839

serial_out(up, UART_EFR, UART_EFR_ECB);

842

serial_out(up, UART_EFR, UART_EFR_ECB);

840

serial_out(up, UART_LCR, 0x00);

843

serial_out(up, UART_LCR, 0x00);

841

id1 = serial_icr_read(up, UART_ID1);

844

id1 = serial_icr_read(up, UART_ID1);

842

id2 = serial_icr_read(up, UART_ID2);

845

id2 = serial_icr_read(up, UART_ID2);

843

id3 = serial_icr_read(up, UART_ID3);

846

id3 = serial_icr_read(up, UART_ID3);

844

rev = serial_icr_read(up, UART_REV);

847

rev = serial_icr_read(up, UART_REV);

845

848

846

DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);

849

DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);

847

850

848

if (id1 == 0x16 && id2 == 0xC9 &&

851

if (id1 == 0x16 && id2 == 0xC9 &&

849

(id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {

852

(id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {

850

up->port.type = PORT_16C950;

853

up->port.type = PORT_16C950;

851

854

852

/*

855

/*

853

* Enable work around for the Oxford Semiconductor 952 rev B

856

* Enable work around for the Oxford Semiconductor 952 rev B

854

* chip which causes it to seriously miscalculate baud rates

857

* chip which causes it to seriously miscalculate baud rates

855

* when DLL is 0.

858

* when DLL is 0.

856

*/

859

*/

857

if (id3 == 0x52 && rev == 0x01)

860

if (id3 == 0x52 && rev == 0x01)

858

up->bugs |= UART_BUG_QUOT;

861

up->bugs |= UART_BUG_QUOT;

859

return;

862

return;

860

}

863

}

861

864

862

/*

865

/*

863

* We check for a XR16C850 by setting DLL and DLM to 0, and then

866

* We check for a XR16C850 by setting DLL and DLM to 0, and then

864

* reading back DLL and DLM. The chip type depends on the DLM

867

* reading back DLL and DLM. The chip type depends on the DLM

865

* value read back:

868

* value read back:

866

* 0x10 - XR16C850 and the DLL contains the chip revision.

869

* 0x10 - XR16C850 and the DLL contains the chip revision.

867

* 0x12 - XR16C2850.

870

* 0x12 - XR16C2850.

868

* 0x14 - XR16C854.

871

* 0x14 - XR16C854.

869

*/

872

*/

870

id1 = autoconfig_read_divisor_id(up);

873

id1 = autoconfig_read_divisor_id(up);

871

DEBUG_AUTOCONF("850id=%04x ", id1);

874

DEBUG_AUTOCONF("850id=%04x ", id1);

872

875

873

id2 = id1 >> 8;

876

id2 = id1 >> 8;

874

if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {

877

if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {

875

up->port.type = PORT_16850;

878

up->port.type = PORT_16850;

876

return;

879

return;

877

}

880

}

878

881

879

/*

882

/*

880

* It wasn't an XR16C850.

883

* It wasn't an XR16C850.

881

*

884

*

882

* We distinguish between the '654 and the '650 by counting

885

* We distinguish between the '654 and the '650 by counting

883

* how many bytes are in the FIFO. I'm using this for now,

886

* how many bytes are in the FIFO. I'm using this for now,

884

* since that's the technique that was sent to me in the

887

* since that's the technique that was sent to me in the

885

* serial driver update, but I'm not convinced this works.

888

* serial driver update, but I'm not convinced this works.

886

* I've had problems doing this in the past. -TYT

889

* I've had problems doing this in the past. -TYT

887

*/

890

*/

888

if (size_fifo(up) == 64)

891

if (size_fifo(up) == 64)

889

up->port.type = PORT_16654;

892

up->port.type = PORT_16654;

890

else

893

else

891

up->port.type = PORT_16650V2;

894

up->port.type = PORT_16650V2;

892

}

895

}

893

896

894

/*

897

/*

895

* We detected a chip without a FIFO. Only two fall into

898

* We detected a chip without a FIFO. Only two fall into

896

* this category - the original 8250 and the 16450. The

899

* this category - the original 8250 and the 16450. The

897

* 16450 has a scratch register (accessible with LCR=0)

900

* 16450 has a scratch register (accessible with LCR=0)

898

*/

901

*/

899

static void autoconfig_8250(struct uart_8250_port *up)

902

static void autoconfig_8250(struct uart_8250_port *up)

900

{

903

{

901

unsigned char scratch, status1, status2;

904

unsigned char scratch, status1, status2;

902

905

903

up->port.type = PORT_8250;

906

up->port.type = PORT_8250;

904

907

905

scratch = serial_in(up, UART_SCR);

908

scratch = serial_in(up, UART_SCR);

906

serial_outp(up, UART_SCR, 0xa5);

909

serial_outp(up, UART_SCR, 0xa5);

907

status1 = serial_in(up, UART_SCR);

910

status1 = serial_in(up, UART_SCR);

908

serial_outp(up, UART_SCR, 0x5a);

911

serial_outp(up, UART_SCR, 0x5a);

909

status2 = serial_in(up, UART_SCR);

912

status2 = serial_in(up, UART_SCR);

910

serial_outp(up, UART_SCR, scratch);

913

serial_outp(up, UART_SCR, scratch);

911

914

912

if (status1 == 0xa5 && status2 == 0x5a)

915

if (status1 == 0xa5 && status2 == 0x5a)

913

up->port.type = PORT_16450;

916

up->port.type = PORT_16450;

914

}

917

}

915

918

916

static int broken_efr(struct uart_8250_port *up)

919

static int broken_efr(struct uart_8250_port *up)

917

{

920

{

918

/*

921

/*

919

* Exar ST16C2550 "A2" devices incorrectly detect as

922

* Exar ST16C2550 "A2" devices incorrectly detect as

920

* having an EFR, and report an ID of 0x0201. See

923

* having an EFR, and report an ID of 0x0201. See

921

* http://www.exar.com/info.php?pdf=dan180_oct2004.pdf

924

* http://www.exar.com/info.php?pdf=dan180_oct2004.pdf

922

*/

925

*/

923

if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)

926

if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)

924

return 1;

927

return 1;

925

928

926

return 0;

929

return 0;

927

}

930

}

928

931

929

/*

932

/*

930

* We know that the chip has FIFOs. Does it have an EFR? The

933

* We know that the chip has FIFOs. Does it have an EFR? The

931

* EFR is located in the same register position as the IIR and

934

* EFR is located in the same register position as the IIR and

932

* we know the top two bits of the IIR are currently set. The

935

* we know the top two bits of the IIR are currently set. The

933

* EFR should contain zero. Try to read the EFR.

936

* EFR should contain zero. Try to read the EFR.

934

*/

937

*/

935

static void autoconfig_16550a(struct uart_8250_port *up)

938

static void autoconfig_16550a(struct uart_8250_port *up)

936

{

939

{

937

unsigned char status1, status2;

940

unsigned char status1, status2;

938

unsigned int iersave;

941

unsigned int iersave;

939

942

940

up->port.type = PORT_16550A;

943

up->port.type = PORT_16550A;

941

up->capabilities |= UART_CAP_FIFO;

944

up->capabilities |= UART_CAP_FIFO;

942

945

943

/*

946

/*

944

* Check for presence of the EFR when DLAB is set.

947

* Check for presence of the EFR when DLAB is set.

945

* Only ST16C650V1 UARTs pass this test.

948

* Only ST16C650V1 UARTs pass this test.

946

*/

949

*/

947

serial_outp(up, UART_LCR, UART_LCR_DLAB);

950

serial_outp(up, UART_LCR, UART_LCR_DLAB);

948

if (serial_in(up, UART_EFR) == 0) {

951

if (serial_in(up, UART_EFR) == 0) {

949

serial_outp(up, UART_EFR, 0xA8);

952

serial_outp(up, UART_EFR, 0xA8);

950

if (serial_in(up, UART_EFR) != 0) {

953

if (serial_in(up, UART_EFR) != 0) {

951

DEBUG_AUTOCONF("EFRv1 ");

954

DEBUG_AUTOCONF("EFRv1 ");

952

up->port.type = PORT_16650;

955

up->port.type = PORT_16650;

953

up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;

956

up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;

954

} else {

957

} else {

955

DEBUG_AUTOCONF("Motorola 8xxx DUART ");

958

DEBUG_AUTOCONF("Motorola 8xxx DUART ");

956

}

959

}

957

serial_outp(up, UART_EFR, 0);

960

serial_outp(up, UART_EFR, 0);

958

return;

961

return;

959

}

962

}

960

963

961

/*

964

/*

962

* Maybe it requires 0xbf to be written to the LCR.

965

* Maybe it requires 0xbf to be written to the LCR.

963

* (other ST16C650V2 UARTs, TI16C752A, etc)

966

* (other ST16C650V2 UARTs, TI16C752A, etc)

964

*/

967

*/

965

serial_outp(up, UART_LCR, 0xBF);

968

serial_outp(up, UART_LCR, 0xBF);

966

if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {

969

if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {

967

DEBUG_AUTOCONF("EFRv2 ");

970

DEBUG_AUTOCONF("EFRv2 ");

968

autoconfig_has_efr(up);

971

autoconfig_has_efr(up);

969

return;

972

return;

970

}

973

}

971

974

972

/*

975

/*

973

* Check for a National Semiconductor SuperIO chip.

976

* Check for a National Semiconductor SuperIO chip.

974

* Attempt to switch to bank 2, read the value of the LOOP bit

977

* Attempt to switch to bank 2, read the value of the LOOP bit

975

* from EXCR1. Switch back to bank 0, change it in MCR. Then

978

* from EXCR1. Switch back to bank 0, change it in MCR. Then

976

* switch back to bank 2, read it from EXCR1 again and check

979

* switch back to bank 2, read it from EXCR1 again and check

977

* it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2

980

* it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2

978

*/

981

*/

979

serial_outp(up, UART_LCR, 0);

982

serial_outp(up, UART_LCR, 0);

980

status1 = serial_in(up, UART_MCR);

983

status1 = serial_in(up, UART_MCR);

981

serial_outp(up, UART_LCR, 0xE0);

984

serial_outp(up, UART_LCR, 0xE0);

982

status2 = serial_in(up, 0x02); /* EXCR1 */

985

status2 = serial_in(up, 0x02); /* EXCR1 */

983

986

984

if (!((status2 ^ status1) & UART_MCR_LOOP)) {

987

if (!((status2 ^ status1) & UART_MCR_LOOP)) {

985

serial_outp(up, UART_LCR, 0);

988

serial_outp(up, UART_LCR, 0);

986

serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);

989

serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);

987

serial_outp(up, UART_LCR, 0xE0);

990

serial_outp(up, UART_LCR, 0xE0);

988

status2 = serial_in(up, 0x02); /* EXCR1 */

991

status2 = serial_in(up, 0x02); /* EXCR1 */

989

serial_outp(up, UART_LCR, 0);

992

serial_outp(up, UART_LCR, 0);

990

serial_outp(up, UART_MCR, status1);

993

serial_outp(up, UART_MCR, status1);

991

994

992

if ((status2 ^ status1) & UART_MCR_LOOP) {

995

if ((status2 ^ status1) & UART_MCR_LOOP) {

993

unsigned short quot;

996

unsigned short quot;

994

997

995

serial_outp(up, UART_LCR, 0xE0);

998

serial_outp(up, UART_LCR, 0xE0);

996

999

997

quot = serial_dl_read(up);

1000

quot = serial_dl_read(up);

998

quot <<= 3;

1001

quot <<= 3;

999

1002

1000

status1 = serial_in(up, 0x04); /* EXCR2 */

1003

status1 = serial_in(up, 0x04); /* EXCR2 */

1001

status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */

1004

status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */

1002

status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */

1005

status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */

1003

serial_outp(up, 0x04, status1);

1006

serial_outp(up, 0x04, status1);

1004

1007

1005

serial_dl_write(up, quot);

1008

serial_dl_write(up, quot);

1006

1009

1007

serial_outp(up, UART_LCR, 0);

1010

serial_outp(up, UART_LCR, 0);

1008

1011

1009

up->port.uartclk = 921600*16;

1012

up->port.uartclk = 921600*16;

1010

up->port.type = PORT_NS16550A;

1013

up->port.type = PORT_NS16550A;

1011

up->capabilities |= UART_NATSEMI;

1014

up->capabilities |= UART_NATSEMI;

1012

return;

1015

return;

1013

}

1016

}

1014

}

1017

}

1015

1018

1016

/*

1019

/*

1017

* No EFR. Try to detect a TI16750, which only sets bit 5 of

1020

* No EFR. Try to detect a TI16750, which only sets bit 5 of

1018

* the IIR when 64 byte FIFO mode is enabled when DLAB is set.

1021

* the IIR when 64 byte FIFO mode is enabled when DLAB is set.

1019

* Try setting it with and without DLAB set. Cheap clones

1022

* Try setting it with and without DLAB set. Cheap clones

1020

* set bit 5 without DLAB set.

1023

* set bit 5 without DLAB set.

1021

*/

1024

*/

1022

serial_outp(up, UART_LCR, 0);

1025

serial_outp(up, UART_LCR, 0);

1023

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1026

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1024

status1 = serial_in(up, UART_IIR) >> 5;

1027

status1 = serial_in(up, UART_IIR) >> 5;

1025

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1028

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1026

serial_outp(up, UART_LCR, UART_LCR_DLAB);

1029

serial_outp(up, UART_LCR, UART_LCR_DLAB);

1027

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1030

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1028

status2 = serial_in(up, UART_IIR) >> 5;

1031

status2 = serial_in(up, UART_IIR) >> 5;

1029

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1032

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1030

serial_outp(up, UART_LCR, 0);

1033

serial_outp(up, UART_LCR, 0);

1031

1034

1032

DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);

1035

DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);

1033

1036

1034

if (status1 == 6 && status2 == 7) {

1037

if (status1 == 6 && status2 == 7) {

1035

up->port.type = PORT_16750;

1038

up->port.type = PORT_16750;

1036

up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;

1039

up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;

1037

return;

1040

return;

1038

}

1041

}

1039

1042

1040

/*

1043

/*

1041

* Try writing and reading the UART_IER_UUE bit (b6).

1044

* Try writing and reading the UART_IER_UUE bit (b6).

1042

* If it works, this is probably one of the Xscale platform's

1045

* If it works, this is probably one of the Xscale platform's

1043

* internal UARTs.

1046

* internal UARTs.

1044

* We're going to explicitly set the UUE bit to 0 before

1047

* We're going to explicitly set the UUE bit to 0 before

1045

* trying to write and read a 1 just to make sure it's not

1048

* trying to write and read a 1 just to make sure it's not

1046

* already a 1 and maybe locked there before we even start start.

1049

* already a 1 and maybe locked there before we even start start.

1047

*/

1050

*/

1048

iersave = serial_in(up, UART_IER);

1051

iersave = serial_in(up, UART_IER);

1049

serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);

1052

serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);

1050

if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {

1053

if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {

1051

/*

1054

/*

1052

* OK it's in a known zero state, try writing and reading

1055

* OK it's in a known zero state, try writing and reading

1053

* without disturbing the current state of the other bits.

1056

* without disturbing the current state of the other bits.

1054

*/

1057

*/

1055

serial_outp(up, UART_IER, iersave | UART_IER_UUE);

1058

serial_outp(up, UART_IER, iersave | UART_IER_UUE);

1056

if (serial_in(up, UART_IER) & UART_IER_UUE) {

1059

if (serial_in(up, UART_IER) & UART_IER_UUE) {

1057

/*

1060

/*

1058

* It's an Xscale.

1061

* It's an Xscale.

1059

* We'll leave the UART_IER_UUE bit set to 1 (enabled).

1062

* We'll leave the UART_IER_UUE bit set to 1 (enabled).

1060

*/

1063

*/

1061

DEBUG_AUTOCONF("Xscale ");

1064

DEBUG_AUTOCONF("Xscale ");

1062

up->port.type = PORT_XSCALE;

1065

up->port.type = PORT_XSCALE;

1063

up->capabilities |= UART_CAP_UUE;

1066

up->capabilities |= UART_CAP_UUE;

1064

return;

1067

return;

1065

}

1068

}

1066

} else {

1069

} else {

1067

/*

1070

/*

1068

* If we got here we couldn't force the IER_UUE bit to 0.

1071

* If we got here we couldn't force the IER_UUE bit to 0.

1069

* Log it and continue.

1072

* Log it and continue.

1070

*/

1073

*/

1071

DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");

1074

DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");

1072

}

1075

}

1073

serial_outp(up, UART_IER, iersave);

1076

serial_outp(up, UART_IER, iersave);

1074

}

1077

}

1075

1078

1076

/*

1079

/*

1077

* This routine is called by rs_init() to initialize a specific serial

1080

* This routine is called by rs_init() to initialize a specific serial

1078

* port. It determines what type of UART chip this serial port is

1081

* port. It determines what type of UART chip this serial port is

1079

* using: 8250, 16450, 16550, 16550A. The important question is

1082

* using: 8250, 16450, 16550, 16550A. The important question is

1080

* whether or not this UART is a 16550A or not, since this will

1083

* whether or not this UART is a 16550A or not, since this will

1081

* determine whether or not we can use its FIFO features or not.

1084

* determine whether or not we can use its FIFO features or not.

1082

*/

1085

*/

1083

static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)

1086

static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)

1084

{

1087

{

1085

unsigned char status1, scratch, scratch2, scratch3;

1088

unsigned char status1, scratch, scratch2, scratch3;

1086

unsigned char save_lcr, save_mcr;

1089

unsigned char save_lcr, save_mcr;

1087

unsigned long flags;

1090

unsigned long flags;

1088

1091

1089

if (!up->port.iobase && !up->port.mapbase && !up->port.membase)

1092

if (!up->port.iobase && !up->port.mapbase && !up->port.membase)

1090

return;

1093

return;

1091

1094

1092

DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",

1095

DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",

1093

serial_index(&up->port), up->port.iobase, up->port.membase);

1096

serial_index(&up->port), up->port.iobase, up->port.membase);

1094

1097

1095

/*

1098

/*

1096

* We really do need global IRQs disabled here - we're going to

1099

* We really do need global IRQs disabled here - we're going to

1097

* be frobbing the chips IRQ enable register to see if it exists.

1100

* be frobbing the chips IRQ enable register to see if it exists.

1098

*/

1101

*/

1099

spin_lock_irqsave(&up->port.lock, flags);

1102

spin_lock_irqsave(&up->port.lock, flags);

1100

1103

1101

up->capabilities = 0;

1104

up->capabilities = 0;

1102

up->bugs = 0;

1105

up->bugs = 0;

1103

1106

1104

if (!(up->port.flags & UPF_BUGGY_UART)) {

1107

if (!(up->port.flags & UPF_BUGGY_UART)) {

1105

/*

1108

/*

1106

* Do a simple existence test first; if we fail this,

1109

* Do a simple existence test first; if we fail this,

1107

* there's no point trying anything else.

1110

* there's no point trying anything else.

1108

*

1111

*

1109

* 0x80 is used as a nonsense port to prevent against

1112

* 0x80 is used as a nonsense port to prevent against

1110

* false positives due to ISA bus float. The

1113

* false positives due to ISA bus float. The

1111

* assumption is that 0x80 is a non-existent port;

1114

* assumption is that 0x80 is a non-existent port;

1112

* which should be safe since include/asm/io.h also

1115

* which should be safe since include/asm/io.h also

1113

* makes this assumption.

1116

* makes this assumption.

1114

*

1117

*

1115

* Note: this is safe as long as MCR bit 4 is clear

1118

* Note: this is safe as long as MCR bit 4 is clear

1116

* and the device is in "PC" mode.

1119

* and the device is in "PC" mode.

1117

*/

1120

*/

1118

scratch = serial_inp(up, UART_IER);

1121

scratch = serial_inp(up, UART_IER);

1119

serial_outp(up, UART_IER, 0);

1122

serial_outp(up, UART_IER, 0);

1120

#ifdef __i386__

1123

#ifdef __i386__

1121

outb(0xff, 0x080);

1124

outb(0xff, 0x080);

1122

#endif

1125

#endif

1123

/*

1126

/*

1124

* Mask out IER[7:4] bits for test as some UARTs (e.g. TL

1127

* Mask out IER[7:4] bits for test as some UARTs (e.g. TL

1125

* 16C754B) allow only to modify them if an EFR bit is set.

1128

* 16C754B) allow only to modify them if an EFR bit is set.

1126

*/

1129

*/

1127

scratch2 = serial_inp(up, UART_IER) & 0x0f;

1130

scratch2 = serial_inp(up, UART_IER) & 0x0f;

1128

serial_outp(up, UART_IER, 0x0F);

1131

serial_outp(up, UART_IER, 0x0F);

1129

#ifdef __i386__

1132

#ifdef __i386__

1130

outb(0, 0x080);

1133

outb(0, 0x080);

1131

#endif

1134

#endif

1132

scratch3 = serial_inp(up, UART_IER) & 0x0f;

1135

scratch3 = serial_inp(up, UART_IER) & 0x0f;

1133

serial_outp(up, UART_IER, scratch);

1136

serial_outp(up, UART_IER, scratch);

1134

if (scratch2 != 0 || scratch3 != 0x0F) {

1137

if (scratch2 != 0 || scratch3 != 0x0F) {

1135

/*

1138

/*

1136

* We failed; there's nothing here

1139

* We failed; there's nothing here

1137

*/

1140

*/

1138

DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",

1141

DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",

1139

scratch2, scratch3);

1142

scratch2, scratch3);

1140

goto out;

1143

goto out;

1141

}

1144

}

1142

}

1145

}

1143

1146

1144

save_mcr = serial_in(up, UART_MCR);

1147

save_mcr = serial_in(up, UART_MCR);

1145

save_lcr = serial_in(up, UART_LCR);

1148

save_lcr = serial_in(up, UART_LCR);

1146

1149

1147

/*

1150

/*

1148

* Check to see if a UART is really there. Certain broken

1151

* Check to see if a UART is really there. Certain broken

1149

* internal modems based on the Rockwell chipset fail this

1152

* internal modems based on the Rockwell chipset fail this

1150

* test, because they apparently don't implement the loopback

1153

* test, because they apparently don't implement the loopback

1151

* test mode. So this test is skipped on the COM 1 through

1154

* test mode. So this test is skipped on the COM 1 through

1152

* COM 4 ports. This *should* be safe, since no board

1155

* COM 4 ports. This *should* be safe, since no board

1153

* manufacturer would be stupid enough to design a board

1156

* manufacturer would be stupid enough to design a board

1154

* that conflicts with COM 1-4 --- we hope!

1157

* that conflicts with COM 1-4 --- we hope!

1155

*/

1158

*/

1156

if (!(up->port.flags & UPF_SKIP_TEST)) {

1159

if (!(up->port.flags & UPF_SKIP_TEST)) {

1157

serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);

1160

serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);

1158

status1 = serial_inp(up, UART_MSR) & 0xF0;

1161

status1 = serial_inp(up, UART_MSR) & 0xF0;

1159

serial_outp(up, UART_MCR, save_mcr);

1162

serial_outp(up, UART_MCR, save_mcr);

1160

if (status1 != 0x90) {

1163

if (status1 != 0x90) {

1161

DEBUG_AUTOCONF("LOOP test failed (%02x) ",

1164

DEBUG_AUTOCONF("LOOP test failed (%02x) ",

1162

status1);

1165

status1);

1163

goto out;

1166

goto out;

1164

}

1167

}

1165

}

1168

}

1166

1169

1167

/*

1170

/*

1168

* We're pretty sure there's a port here. Lets find out what

1171

* We're pretty sure there's a port here. Lets find out what

1169

* type of port it is. The IIR top two bits allows us to find

1172

* type of port it is. The IIR top two bits allows us to find

1170

* out if it's 8250 or 16450, 16550, 16550A or later. This

1173

* out if it's 8250 or 16450, 16550, 16550A or later. This

1171

* determines what we test for next.

1174

* determines what we test for next.

1172

*

1175

*

1173

* We also initialise the EFR (if any) to zero for later. The

1176

* We also initialise the EFR (if any) to zero for later. The

1174

* EFR occupies the same register location as the FCR and IIR.

1177

* EFR occupies the same register location as the FCR and IIR.

1175

*/

1178

*/

1176

serial_outp(up, UART_LCR, 0xBF);

1179

serial_outp(up, UART_LCR, 0xBF);

1177

serial_outp(up, UART_EFR, 0);

1180

serial_outp(up, UART_EFR, 0);

1178

serial_outp(up, UART_LCR, 0);

1181

serial_outp(up, UART_LCR, 0);

1179

1182

1180

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1183

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1181

scratch = serial_in(up, UART_IIR) >> 6;

1184

scratch = serial_in(up, UART_IIR) >> 6;

1182

1185

1183

DEBUG_AUTOCONF("iir=%d ", scratch);

1186

DEBUG_AUTOCONF("iir=%d ", scratch);

1184

1187

1185

switch (scratch) {

1188

switch (scratch) {

1186

case 0:

1189

case 0:

1187

autoconfig_8250(up);

1190

autoconfig_8250(up);

1188

break;

1191

break;

1189

case 1:

1192

case 1:

1190

up->port.type = PORT_UNKNOWN;

1193

up->port.type = PORT_UNKNOWN;

1191

break;

1194

break;

1192

case 2:

1195

case 2:

1193

up->port.type = PORT_16550;

1196

up->port.type = PORT_16550;

1194

break;

1197

break;

1195

case 3:

1198

case 3:

1196

autoconfig_16550a(up);

1199

autoconfig_16550a(up);

1197

break;

1200

break;

1198

}

1201

}

1199

1202

1200

#ifdef CONFIG_SERIAL_8250_RSA

1203

#ifdef CONFIG_SERIAL_8250_RSA

1201

/*

1204

/*

1202

* Only probe for RSA ports if we got the region.

1205

* Only probe for RSA ports if we got the region.

1203

*/

1206

*/

1204

if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {

1207

if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {

1205

int i;

1208

int i;

1206

1209

1207

for (i = 0 ; i < probe_rsa_count; ++i) {

1210

for (i = 0 ; i < probe_rsa_count; ++i) {

1208

if (probe_rsa[i] == up->port.iobase &&

1211

if (probe_rsa[i] == up->port.iobase &&

1209

__enable_rsa(up)) {

1212

__enable_rsa(up)) {

1210

up->port.type = PORT_RSA;

1213

up->port.type = PORT_RSA;

1211

break;

1214

break;

1212

}

1215

}

1213

}

1216

}

1214

}

1217

}

1215

#endif

1218

#endif

1216

1219

1217

#ifdef CONFIG_SERIAL_8250_AU1X00

1220

#ifdef CONFIG_SERIAL_8250_AU1X00

1218

/* if access method is AU, it is a 16550 with a quirk */

1221

/* if access method is AU, it is a 16550 with a quirk */

1219

if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)

1222

if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)

1220

up->bugs |= UART_BUG_NOMSR;

1223

up->bugs |= UART_BUG_NOMSR;

1221

#endif

1224

#endif

1222

1225

1223

serial_outp(up, UART_LCR, save_lcr);

1226

serial_outp(up, UART_LCR, save_lcr);

1224

1227

1225

if (up->capabilities != uart_config[up->port.type].flags) {

1228

if (up->capabilities != uart_config[up->port.type].flags) {

1226

printk(KERN_WARNING

1229

printk(KERN_WARNING

1227

"ttyS%d: detected caps %08x should be %08x\n",

1230

"ttyS%d: detected caps %08x should be %08x\n",

1228

serial_index(&up->port), up->capabilities,

1231

serial_index(&up->port), up->capabilities,

1229

uart_config[up->port.type].flags);

1232

uart_config[up->port.type].flags);

1230

}

1233

}

1231

1234

1232

up->port.fifosize = uart_config[up->port.type].fifo_size;

1235

up->port.fifosize = uart_config[up->port.type].fifo_size;

1233

up->capabilities = uart_config[up->port.type].flags;

1236

up->capabilities = uart_config[up->port.type].flags;

1234

up->tx_loadsz = uart_config[up->port.type].tx_loadsz;

1237

up->tx_loadsz = uart_config[up->port.type].tx_loadsz;

1235

1238

1236

if (up->port.type == PORT_UNKNOWN)

1239

if (up->port.type == PORT_UNKNOWN)

1237

goto out;

1240

goto out;

1238

1241

1239

/*

1242

/*

1240

* Reset the UART.

1243

* Reset the UART.

1241

*/

1244

*/

1242

#ifdef CONFIG_SERIAL_8250_RSA

1245

#ifdef CONFIG_SERIAL_8250_RSA

1243

if (up->port.type == PORT_RSA)

1246

if (up->port.type == PORT_RSA)

1244

serial_outp(up, UART_RSA_FRR, 0);

1247

serial_outp(up, UART_RSA_FRR, 0);

1245

#endif

1248

#endif

1246

serial_outp(up, UART_MCR, save_mcr);

1249

serial_outp(up, UART_MCR, save_mcr);

1247

serial8250_clear_fifos(up);

1250

serial8250_clear_fifos(up);

1248

serial_in(up, UART_RX);

1251

serial_in(up, UART_RX);

1249

if (up->capabilities & UART_CAP_UUE)

1252

if (up->capabilities & UART_CAP_UUE)

1250

serial_outp(up, UART_IER, UART_IER_UUE);

1253

serial_outp(up, UART_IER, UART_IER_UUE);

1251

else

1254

else

1252

serial_outp(up, UART_IER, 0);

1255

serial_outp(up, UART_IER, 0);

1253

1256

1254

out:

1257

out:

1255

spin_unlock_irqrestore(&up->port.lock, flags);

1258

spin_unlock_irqrestore(&up->port.lock, flags);

1256

DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);

1259

DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);

1257

}

1260

}

1258

1261

1259

static void autoconfig_irq(struct uart_8250_port *up)

1262

static void autoconfig_irq(struct uart_8250_port *up)

1260

{

1263

{

1261

unsigned char save_mcr, save_ier;

1264

unsigned char save_mcr, save_ier;

1262

unsigned char save_ICP = 0;

1265

unsigned char save_ICP = 0;

1263

unsigned int ICP = 0;

1266

unsigned int ICP = 0;

1264

unsigned long irqs;

1267

unsigned long irqs;

1265

int irq;

1268

int irq;

1266

1269

1267

if (up->port.flags & UPF_FOURPORT) {

1270

if (up->port.flags & UPF_FOURPORT) {

1268

ICP = (up->port.iobase & 0xfe0) | 0x1f;

1271

ICP = (up->port.iobase & 0xfe0) | 0x1f;

1269

save_ICP = inb_p(ICP);

1272

save_ICP = inb_p(ICP);

1270

outb_p(0x80, ICP);

1273

outb_p(0x80, ICP);

1271

(void) inb_p(ICP);

1274

(void) inb_p(ICP);

1272

}

1275

}

1273

1276

1274

/* forget possible initially masked and pending IRQ */

1277

/* forget possible initially masked and pending IRQ */

1275

probe_irq_off(probe_irq_on());

1278

probe_irq_off(probe_irq_on());

1276

save_mcr = serial_inp(up, UART_MCR);

1279

save_mcr = serial_inp(up, UART_MCR);

1277

save_ier = serial_inp(up, UART_IER);

1280

save_ier = serial_inp(up, UART_IER);

1278

serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);

1281

serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);

1279

1282

1280

irqs = probe_irq_on();

1283

irqs = probe_irq_on();

1281

serial_outp(up, UART_MCR, 0);

1284

serial_outp(up, UART_MCR, 0);

1282

udelay(10);

1285

udelay(10);

1283

if (up->port.flags & UPF_FOURPORT) {

1286

if (up->port.flags & UPF_FOURPORT) {

1284

serial_outp(up, UART_MCR,

1287

serial_outp(up, UART_MCR,

1285

UART_MCR_DTR | UART_MCR_RTS);

1288

UART_MCR_DTR | UART_MCR_RTS);

1286

} else {

1289

} else {

1287

serial_outp(up, UART_MCR,

1290

serial_outp(up, UART_MCR,

1288

UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);

1291

UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);

1289

}

1292

}

1290

serial_outp(up, UART_IER, 0x0f); /* enable all intrs */

1293

serial_outp(up, UART_IER, 0x0f); /* enable all intrs */

1291

(void)serial_inp(up, UART_LSR);

1294

(void)serial_inp(up, UART_LSR);

1292

(void)serial_inp(up, UART_RX);

1295

(void)serial_inp(up, UART_RX);

1293

(void)serial_inp(up, UART_IIR);

1296

(void)serial_inp(up, UART_IIR);

1294

(void)serial_inp(up, UART_MSR);

1297

(void)serial_inp(up, UART_MSR);

1295

serial_outp(up, UART_TX, 0xFF);

1298

serial_outp(up, UART_TX, 0xFF);

1296

udelay(20);

1299

udelay(20);

1297

irq = probe_irq_off(irqs);

1300

irq = probe_irq_off(irqs);

1298

1301

1299

serial_outp(up, UART_MCR, save_mcr);

1302

serial_outp(up, UART_MCR, save_mcr);

1300

serial_outp(up, UART_IER, save_ier);

1303

serial_outp(up, UART_IER, save_ier);

1301

1304

1302

if (up->port.flags & UPF_FOURPORT)

1305

if (up->port.flags & UPF_FOURPORT)

1303

outb_p(save_ICP, ICP);

1306

outb_p(save_ICP, ICP);

1304

1307

1305

up->port.irq = (irq > 0) ? irq : 0;

1308

up->port.irq = (irq > 0) ? irq : 0;

1306

}

1309

}

1307

1310

1308

static inline void __stop_tx(struct uart_8250_port *p)

1311

static inline void __stop_tx(struct uart_8250_port *p)

1309

{

1312

{

1310

if (p->ier & UART_IER_THRI) {

1313

if (p->ier & UART_IER_THRI) {

1311

p->ier &= ~UART_IER_THRI;

1314

p->ier &= ~UART_IER_THRI;

1312

serial_out(p, UART_IER, p->ier);

1315

serial_out(p, UART_IER, p->ier);

1313

}

1316

}

1314

}

1317

}

1315

1318

1316

static void serial8250_stop_tx(struct uart_port *port)

1319

static void serial8250_stop_tx(struct uart_port *port)

1317

{

1320

{

1318

struct uart_8250_port *up = (struct uart_8250_port *)port;

1321

struct uart_8250_port *up = (struct uart_8250_port *)port;

1319

1322

1320

__stop_tx(up);

1323

__stop_tx(up);

1321

1324

1322

/*

1325

/*

1323

* We really want to stop the transmitter from sending.

1326

* We really want to stop the transmitter from sending.

1324

*/

1327

*/

1325

if (up->port.type == PORT_16C950) {

1328

if (up->port.type == PORT_16C950) {

1326

up->acr |= UART_ACR_TXDIS;

1329

up->acr |= UART_ACR_TXDIS;

1327

serial_icr_write(up, UART_ACR, up->acr);

1330

serial_icr_write(up, UART_ACR, up->acr);

1328

}

1331

}

1329

}

1332

}

1330

1333

1331

static void transmit_chars(struct uart_8250_port *up);

1334

static void transmit_chars(struct uart_8250_port *up);

1332

1335

1333

static void serial8250_start_tx(struct uart_port *port)

1336

static void serial8250_start_tx(struct uart_port *port)

1334

{

1337

{

1335

struct uart_8250_port *up = (struct uart_8250_port *)port;

1338

struct uart_8250_port *up = (struct uart_8250_port *)port;

1336

1339

1337

if (!(up->ier & UART_IER_THRI)) {

1340

if (!(up->ier & UART_IER_THRI)) {

1338

up->ier |= UART_IER_THRI;

1341

up->ier |= UART_IER_THRI;

1339

serial_out(up, UART_IER, up->ier);

1342

serial_out(up, UART_IER, up->ier);

1340

1343

1341

if (up->bugs & UART_BUG_TXEN) {

1344

if (up->bugs & UART_BUG_TXEN) {

1342

unsigned char lsr;

1345

unsigned char lsr;

1343

lsr = serial_in(up, UART_LSR);

1346

lsr = serial_in(up, UART_LSR);

1344

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1347

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1345

if ((up->port.type == PORT_RM9000) ?

1348

if ((up->port.type == PORT_RM9000) ?

1346

(lsr & UART_LSR_THRE) :

1349

(lsr & UART_LSR_THRE) :

1347

(lsr & UART_LSR_TEMT))

1350

(lsr & UART_LSR_TEMT))

1348

transmit_chars(up);

1351

transmit_chars(up);

1349

}

1352

}

1350

}

1353

}

1351

1354

1352

/*

1355

/*

1353

* Re-enable the transmitter if we disabled it.

1356

* Re-enable the transmitter if we disabled it.

1354

*/

1357

*/

1355

if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {

1358

if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {

1356

up->acr &= ~UART_ACR_TXDIS;

1359

up->acr &= ~UART_ACR_TXDIS;

1357

serial_icr_write(up, UART_ACR, up->acr);

1360

serial_icr_write(up, UART_ACR, up->acr);

1358

}

1361

}

1359

}

1362

}

1360

1363

1361

static void serial8250_stop_rx(struct uart_port *port)

1364

static void serial8250_stop_rx(struct uart_port *port)

1362

{

1365

{

1363

struct uart_8250_port *up = (struct uart_8250_port *)port;

1366

struct uart_8250_port *up = (struct uart_8250_port *)port;

1364

1367

1365

up->ier &= ~UART_IER_RLSI;

1368

up->ier &= ~UART_IER_RLSI;

1366

up->port.read_status_mask &= ~UART_LSR_DR;

1369

up->port.read_status_mask &= ~UART_LSR_DR;

1367

serial_out(up, UART_IER, up->ier);

1370

serial_out(up, UART_IER, up->ier);

1368

}

1371

}

1369

1372

1370

static void serial8250_enable_ms(struct uart_port *port)

1373

static void serial8250_enable_ms(struct uart_port *port)

1371

{

1374

{

1372

struct uart_8250_port *up = (struct uart_8250_port *)port;

1375

struct uart_8250_port *up = (struct uart_8250_port *)port;

1373

1376

1374

/* no MSR capabilities */

1377

/* no MSR capabilities */

1375

if (up->bugs & UART_BUG_NOMSR)

1378

if (up->bugs & UART_BUG_NOMSR)

1376

return;

1379

return;

1377

1380

1378

up->ier |= UART_IER_MSI;

1381

up->ier |= UART_IER_MSI;

1379

serial_out(up, UART_IER, up->ier);

1382

serial_out(up, UART_IER, up->ier);

1380

}

1383

}

1381

1384

1382

static void

1385

static void

1383

receive_chars(struct uart_8250_port *up, unsigned int *status)

1386

receive_chars(struct uart_8250_port *up, unsigned int *status)

1384

{

1387

{

1385

struct tty_struct *tty = up->port.state->port.tty;

1388

struct tty_struct *tty = up->port.state->port.tty;

1386

unsigned char ch, lsr = *status;

1389

unsigned char ch, lsr = *status;

1387

int max_count = 256;

1390

int max_count = 256;

1388

char flag;

1391

char flag;

1389

1392

1390

do {

1393

do {

1391

if (likely(lsr & UART_LSR_DR))

1394

if (likely(lsr & UART_LSR_DR))

1392

ch = serial_inp(up, UART_RX);

1395

ch = serial_inp(up, UART_RX);

1393

else

1396

else

1394

/*

1397

/*

1395

* Intel 82571 has a Serial Over Lan device that will

1398

* Intel 82571 has a Serial Over Lan device that will

1396

* set UART_LSR_BI without setting UART_LSR_DR when

1399

* set UART_LSR_BI without setting UART_LSR_DR when

1397

* it receives a break. To avoid reading from the

1400

* it receives a break. To avoid reading from the

1398

* receive buffer without UART_LSR_DR bit set, we

1401

* receive buffer without UART_LSR_DR bit set, we

1399

* just force the read character to be 0

1402

* just force the read character to be 0

1400

*/

1403

*/

1401

ch = 0;

1404

ch = 0;

1402

1405

1403

flag = TTY_NORMAL;

1406

flag = TTY_NORMAL;

1404

up->port.icount.rx++;

1407

up->port.icount.rx++;

1405

1408

1406

lsr |= up->lsr_saved_flags;

1409

lsr |= up->lsr_saved_flags;

1407

up->lsr_saved_flags = 0;

1410

up->lsr_saved_flags = 0;

1408

1411

1409

if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {

1412

if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {

1410

/*

1413

/*

1411

* For statistics only

1414

* For statistics only

1412

*/

1415

*/

1413

if (lsr & UART_LSR_BI) {

1416

if (lsr & UART_LSR_BI) {

1414

lsr &= ~(UART_LSR_FE | UART_LSR_PE);

1417

lsr &= ~(UART_LSR_FE | UART_LSR_PE);

1415

up->port.icount.brk++;

1418

up->port.icount.brk++;

1416

/*

1419

/*

1417

* We do the SysRQ and SAK checking

1420

* We do the SysRQ and SAK checking

1418

* here because otherwise the break

1421

* here because otherwise the break

1419

* may get masked by ignore_status_mask

1422

* may get masked by ignore_status_mask

1420

* or read_status_mask.

1423

* or read_status_mask.

1421

*/

1424

*/

1422

if (uart_handle_break(&up->port))

1425

if (uart_handle_break(&up->port))

1423

goto ignore_char;

1426

goto ignore_char;

1424

} else if (lsr & UART_LSR_PE)

1427

} else if (lsr & UART_LSR_PE)

1425

up->port.icount.parity++;

1428

up->port.icount.parity++;

1426

else if (lsr & UART_LSR_FE)

1429

else if (lsr & UART_LSR_FE)

1427

up->port.icount.frame++;

1430

up->port.icount.frame++;

1428

if (lsr & UART_LSR_OE)

1431

if (lsr & UART_LSR_OE)

1429

up->port.icount.overrun++;

1432

up->port.icount.overrun++;

1430

1433

1431

/*

1434

/*

1432

* Mask off conditions which should be ignored.

1435

* Mask off conditions which should be ignored.

1433

*/

1436

*/

1434

lsr &= up->port.read_status_mask;

1437

lsr &= up->port.read_status_mask;

1435

1438

1436

if (lsr & UART_LSR_BI) {

1439

if (lsr & UART_LSR_BI) {

1437

DEBUG_INTR("handling break....");

1440

DEBUG_INTR("handling break....");

1438

flag = TTY_BREAK;

1441

flag = TTY_BREAK;

1439

} else if (lsr & UART_LSR_PE)

1442

} else if (lsr & UART_LSR_PE)

1440

flag = TTY_PARITY;

1443

flag = TTY_PARITY;

1441

else if (lsr & UART_LSR_FE)

1444

else if (lsr & UART_LSR_FE)

1442

flag = TTY_FRAME;

1445

flag = TTY_FRAME;

1443

}

1446

}

1444

if (uart_handle_sysrq_char(&up->port, ch))

1447

if (uart_handle_sysrq_char(&up->port, ch))

1445

goto ignore_char;

1448

goto ignore_char;

1446

1449

1447

uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);

1450

uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);

1448

1451

1449

ignore_char:

1452

ignore_char:

1450

lsr = serial_inp(up, UART_LSR);

1453

lsr = serial_inp(up, UART_LSR);

1451

} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));

1454

} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));

1452

spin_unlock(&up->port.lock);

1455

spin_unlock(&up->port.lock);

1453

tty_flip_buffer_push(tty);

1456

tty_flip_buffer_push(tty);

1454

spin_lock(&up->port.lock);

1457

spin_lock(&up->port.lock);

1455

*status = lsr;

1458

*status = lsr;

1456

}

1459

}

1457

1460

1458

static void transmit_chars(struct uart_8250_port *up)

1461

static void transmit_chars(struct uart_8250_port *up)

1459

{

1462

{

1460

struct circ_buf *xmit = &up->port.state->xmit;

1463

struct circ_buf *xmit = &up->port.state->xmit;

1461

int count;

1464

int count;

1462

1465

1463

if (up->port.x_char) {

1466

if (up->port.x_char) {

1464

serial_outp(up, UART_TX, up->port.x_char);

1467

serial_outp(up, UART_TX, up->port.x_char);

1465

up->port.icount.tx++;

1468

up->port.icount.tx++;

1466

up->port.x_char = 0;

1469

up->port.x_char = 0;

1467

return;

1470

return;

1468

}

1471

}

1469

if (uart_tx_stopped(&up->port)) {

1472

if (uart_tx_stopped(&up->port)) {

1470

serial8250_stop_tx(&up->port);

1473

serial8250_stop_tx(&up->port);

1471

return;

1474

return;

1472

}

1475

}

1473

if (uart_circ_empty(xmit)) {

1476

if (uart_circ_empty(xmit)) {

1474

__stop_tx(up);

1477

__stop_tx(up);

1475

return;

1478

return;

1476

}

1479

}

1477

1480

1478

count = up->tx_loadsz;

1481

count = up->tx_loadsz;

1479

do {

1482

do {

1480

serial_out(up, UART_TX, xmit->buf[xmit->tail]);

1483

serial_out(up, UART_TX, xmit->buf[xmit->tail]);

1481

xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);

1484

xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);

1482

up->port.icount.tx++;

1485

up->port.icount.tx++;

1483

if (uart_circ_empty(xmit))

1486

if (uart_circ_empty(xmit))

1484

break;

1487

break;

1485

} while (--count > 0);

1488

} while (--count > 0);

1486

1489

1487

if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)

1490

if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)

1488

uart_write_wakeup(&up->port);

1491

uart_write_wakeup(&up->port);

1489

1492

1490

DEBUG_INTR("THRE...");

1493

DEBUG_INTR("THRE...");

1491

1494

1492

if (uart_circ_empty(xmit))

1495

if (uart_circ_empty(xmit))

1493

__stop_tx(up);

1496

__stop_tx(up);

1494

}

1497

}

1495

1498

1496

static unsigned int check_modem_status(struct uart_8250_port *up)

1499

static unsigned int check_modem_status(struct uart_8250_port *up)

1497

{

1500

{

1498

unsigned int status = serial_in(up, UART_MSR);

1501

unsigned int status = serial_in(up, UART_MSR);

1499

1502

1500

status |= up->msr_saved_flags;

1503

status |= up->msr_saved_flags;

1501

up->msr_saved_flags = 0;

1504

up->msr_saved_flags = 0;

1502

if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&

1505

if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&

1503

up->port.state != NULL) {

1506

up->port.state != NULL) {

1504

if (status & UART_MSR_TERI)

1507

if (status & UART_MSR_TERI)

1505

up->port.icount.rng++;

1508

up->port.icount.rng++;

1506

if (status & UART_MSR_DDSR)

1509

if (status & UART_MSR_DDSR)

1507

up->port.icount.dsr++;

1510

up->port.icount.dsr++;

1508

if (status & UART_MSR_DDCD)

1511

if (status & UART_MSR_DDCD)

1509

uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);

1512

uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);

1510

if (status & UART_MSR_DCTS)

1513

if (status & UART_MSR_DCTS)

1511

uart_handle_cts_change(&up->port, status & UART_MSR_CTS);

1514

uart_handle_cts_change(&up->port, status & UART_MSR_CTS);

1512

1515

1513

wake_up_interruptible(&up->port.state->port.delta_msr_wait);

1516

wake_up_interruptible(&up->port.state->port.delta_msr_wait);

1514

}

1517

}

1515

1518

1516

return status;

1519

return status;

1517

}

1520

}

1518

1521

1519

/*

1522

/*

1520

* This handles the interrupt from one port.

1523

* This handles the interrupt from one port.

1521

*/

1524

*/

1522

static void serial8250_handle_port(struct uart_8250_port *up)

1525

static void serial8250_handle_port(struct uart_8250_port *up)

1523

{

1526

{

1524

unsigned int status;

1527

unsigned int status;

1525

unsigned long flags;

1528

unsigned long flags;

1526

1529

1527

spin_lock_irqsave(&up->port.lock, flags);

1530

spin_lock_irqsave(&up->port.lock, flags);

1528

1531

1529

status = serial_inp(up, UART_LSR);

1532

status = serial_inp(up, UART_LSR);

1530

1533

1531

DEBUG_INTR("status = %x...", status);

1534

DEBUG_INTR("status = %x...", status);

1532

1535

1533

if (status & (UART_LSR_DR | UART_LSR_BI))

1536

if (status & (UART_LSR_DR | UART_LSR_BI))

1534

receive_chars(up, &status);

1537

receive_chars(up, &status);

1535

check_modem_status(up);

1538

check_modem_status(up);

1536

if (status & UART_LSR_THRE)

1539

if (status & UART_LSR_THRE)

1537

transmit_chars(up);

1540

transmit_chars(up);

1538

1541

1539

spin_unlock_irqrestore(&up->port.lock, flags);

1542

spin_unlock_irqrestore(&up->port.lock, flags);

1540

}

1543

}

1541

1544

1542

/*

1545

/*

1543

* This is the serial driver's interrupt routine.

1546

* This is the serial driver's interrupt routine.

1544

*

1547

*

1545

* Arjan thinks the old way was overly complex, so it got simplified.

1548

* Arjan thinks the old way was overly complex, so it got simplified.

1546

* Alan disagrees, saying that need the complexity to handle the weird

1549

* Alan disagrees, saying that need the complexity to handle the weird

1547

* nature of ISA shared interrupts. (This is a special exception.)

1550

* nature of ISA shared interrupts. (This is a special exception.)

1548

*

1551

*

1549

* In order to handle ISA shared interrupts properly, we need to check

1552

* In order to handle ISA shared interrupts properly, we need to check

1550

* that all ports have been serviced, and therefore the ISA interrupt

1553

* that all ports have been serviced, and therefore the ISA interrupt

1551

* line has been de-asserted.

1554

* line has been de-asserted.

1552

*

1555

*

1553

* This means we need to loop through all ports. checking that they

1556

* This means we need to loop through all ports. checking that they

1554

* don't have an interrupt pending.

1557

* don't have an interrupt pending.

1555

*/

1558

*/

1556

static irqreturn_t serial8250_interrupt(int irq, void *dev_id)

1559

static irqreturn_t serial8250_interrupt(int irq, void *dev_id)

1557

{

1560

{

1558

struct irq_info *i = dev_id;

1561

struct irq_info *i = dev_id;

1559

struct list_head *l, *end = NULL;

1562

struct list_head *l, *end = NULL;

1560

int pass_counter = 0, handled = 0;

1563

int pass_counter = 0, handled = 0;

1561

1564

1562

DEBUG_INTR("serial8250_interrupt(%d)...", irq);

1565

DEBUG_INTR("serial8250_interrupt(%d)...", irq);

1563

1566

1564

spin_lock(&i->lock);

1567

spin_lock(&i->lock);

1565

1568

1566

l = i->head;

1569

l = i->head;

1567

do {

1570

do {

1568

struct uart_8250_port *up;

1571

struct uart_8250_port *up;

1569

unsigned int iir;

1572

unsigned int iir;

1570

1573

1571

up = list_entry(l, struct uart_8250_port, list);

1574

up = list_entry(l, struct uart_8250_port, list);

1572

1575

1573

iir = serial_in(up, UART_IIR);

1576

iir = serial_in(up, UART_IIR);

1574

if (!(iir & UART_IIR_NO_INT)) {

1577

if (!(iir & UART_IIR_NO_INT)) {

1575

serial8250_handle_port(up);

1578

serial8250_handle_port(up);

1576

1579

1577

handled = 1;

1580

handled = 1;

1578

1581

1579

end = NULL;

1582

end = NULL;

1580

} else if (up->port.iotype == UPIO_DWAPB &&

1583

} else if (up->port.iotype == UPIO_DWAPB &&

1581

(iir & UART_IIR_BUSY) == UART_IIR_BUSY) {

1584

(iir & UART_IIR_BUSY) == UART_IIR_BUSY) {

1582

/* The DesignWare APB UART has an Busy Detect (0x07)

1585

/* The DesignWare APB UART has an Busy Detect (0x07)

1583

* interrupt meaning an LCR write attempt occured while the

1586

* interrupt meaning an LCR write attempt occured while the

1584

* UART was busy. The interrupt must be cleared by reading

1587

* UART was busy. The interrupt must be cleared by reading

1585

* the UART status register (USR) and the LCR re-written. */

1588

* the UART status register (USR) and the LCR re-written. */

1586

unsigned int status;

1589

unsigned int status;

1587

status = *(volatile u32 *)up->port.private_data;

1590

status = *(volatile u32 *)up->port.private_data;

1588

serial_out(up, UART_LCR, up->lcr);

1591

serial_out(up, UART_LCR, up->lcr);

1589

1592

1590

handled = 1;

1593

handled = 1;

1591

1594

1592

end = NULL;

1595

end = NULL;

1593

} else if (end == NULL)

1596

} else if (end == NULL)

1594

end = l;

1597

end = l;

1595

1598

1596

l = l->next;

1599

l = l->next;

1597

1600

1598

if (l == i->head && pass_counter++ > PASS_LIMIT) {

1601

if (l == i->head && pass_counter++ > PASS_LIMIT) {

1599

/* If we hit this, we're dead. */

1602

/* If we hit this, we're dead. */

1600

printk(KERN_ERR "serial8250: too much work for "

1603

printk(KERN_ERR "serial8250: too much work for "

1601

"irq%d\n", irq);

1604

"irq%d\n", irq);

1602

break;

1605

break;

1603

}

1606

}

1604

} while (l != end);

1607

} while (l != end);

1605

1608

1606

spin_unlock(&i->lock);

1609

spin_unlock(&i->lock);

1607

1610

1608

DEBUG_INTR("end.\n");

1611

DEBUG_INTR("end.\n");

1609

1612

1610

return IRQ_RETVAL(handled);

1613

return IRQ_RETVAL(handled);

1611

}

1614

}

1612

1615

1613

/*

1616

/*

1614

* To support ISA shared interrupts, we need to have one interrupt

1617

* To support ISA shared interrupts, we need to have one interrupt

1615

* handler that ensures that the IRQ line has been deasserted

1618

* handler that ensures that the IRQ line has been deasserted

1616

* before returning. Failing to do this will result in the IRQ

1619

* before returning. Failing to do this will result in the IRQ

1617

* line being stuck active, and, since ISA irqs are edge triggered,

1620

* line being stuck active, and, since ISA irqs are edge triggered,

1618

* no more IRQs will be seen.

1621

* no more IRQs will be seen.

1619

*/

1622

*/

1620

static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)

1623

static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)

1621

{

1624

{

1622

spin_lock_irq(&i->lock);

1625

spin_lock_irq(&i->lock);

1623

1626

1624

if (!list_empty(i->head)) {

1627

if (!list_empty(i->head)) {

1625

if (i->head == &up->list)

1628

if (i->head == &up->list)

1626

i->head = i->head->next;

1629

i->head = i->head->next;

1627

list_del(&up->list);

1630

list_del(&up->list);

1628

} else {

1631

} else {

1629

BUG_ON(i->head != &up->list);

1632

BUG_ON(i->head != &up->list);

1630

i->head = NULL;

1633

i->head = NULL;

1631

}

1634

}

1632

spin_unlock_irq(&i->lock);

1635

spin_unlock_irq(&i->lock);

1633

/* List empty so throw away the hash node */

1636

/* List empty so throw away the hash node */

1634

if (i->head == NULL) {

1637

if (i->head == NULL) {

1635

hlist_del(&i->node);

1638

hlist_del(&i->node);

1636

kfree(i);

1639

kfree(i);

1637

}

1640

}

1638

}

1641

}

1639

1642

1640

static int serial_link_irq_chain(struct uart_8250_port *up)

1643

static int serial_link_irq_chain(struct uart_8250_port *up)

1641

{

1644

{

1642

struct hlist_head *h;

1645

struct hlist_head *h;

1643

struct hlist_node *n;

1646

struct hlist_node *n;

1644

struct irq_info *i;

1647

struct irq_info *i;

1645

int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;

1648

int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;

1646

1649

1647

mutex_lock(&hash_mutex);

1650

mutex_lock(&hash_mutex);

1648

1651

1649

h = &irq_lists[up->port.irq % NR_IRQ_HASH];

1652

h = &irq_lists[up->port.irq % NR_IRQ_HASH];

1650

1653

1651

hlist_for_each(n, h) {

1654

hlist_for_each(n, h) {

1652

i = hlist_entry(n, struct irq_info, node);

1655

i = hlist_entry(n, struct irq_info, node);

1653

if (i->irq == up->port.irq)

1656

if (i->irq == up->port.irq)

1654

break;

1657

break;

1655

}

1658

}

1656

1659

1657

if (n == NULL) {

1660

if (n == NULL) {

1658

i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);

1661

i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);

1659

if (i == NULL) {

1662

if (i == NULL) {

1660

mutex_unlock(&hash_mutex);

1663

mutex_unlock(&hash_mutex);

1661

return -ENOMEM;

1664

return -ENOMEM;

1662

}

1665

}

1663

spin_lock_init(&i->lock);

1666

spin_lock_init(&i->lock);

1664

i->irq = up->port.irq;

1667

i->irq = up->port.irq;

1665

hlist_add_head(&i->node, h);

1668

hlist_add_head(&i->node, h);

1666

}

1669

}

1667

mutex_unlock(&hash_mutex);

1670

mutex_unlock(&hash_mutex);

1668

1671

1669

spin_lock_irq(&i->lock);

1672

spin_lock_irq(&i->lock);

1670

1673

1671

if (i->head) {

1674

if (i->head) {

1672

list_add(&up->list, i->head);

1675

list_add(&up->list, i->head);

1673

spin_unlock_irq(&i->lock);

1676

spin_unlock_irq(&i->lock);

1674

1677

1675

ret = 0;

1678

ret = 0;

1676

} else {

1679

} else {

1677

INIT_LIST_HEAD(&up->list);

1680

INIT_LIST_HEAD(&up->list);

1678

i->head = &up->list;

1681

i->head = &up->list;

1679

spin_unlock_irq(&i->lock);

1682

spin_unlock_irq(&i->lock);

1680

irq_flags |= up->port.irqflags;

1683

irq_flags |= up->port.irqflags;

1681

ret = request_irq(up->port.irq, serial8250_interrupt,

1684

ret = request_irq(up->port.irq, serial8250_interrupt,

1682

irq_flags, "serial", i);

1685

irq_flags, "serial", i);

1683

if (ret < 0)

1686

if (ret < 0)

1684

serial_do_unlink(i, up);

1687

serial_do_unlink(i, up);

1685

}

1688

}

1686

1689

1687

return ret;

1690

return ret;

1688

}

1691

}

1689

1692

1690

static void serial_unlink_irq_chain(struct uart_8250_port *up)

1693

static void serial_unlink_irq_chain(struct uart_8250_port *up)

1691

{

1694

{

1692

struct irq_info *i;

1695

struct irq_info *i;

1693

struct hlist_node *n;

1696

struct hlist_node *n;

1694

struct hlist_head *h;

1697

struct hlist_head *h;

1695

1698

1696

mutex_lock(&hash_mutex);

1699

mutex_lock(&hash_mutex);

1697

1700

1698

h = &irq_lists[up->port.irq % NR_IRQ_HASH];

1701

h = &irq_lists[up->port.irq % NR_IRQ_HASH];

1699

1702

1700

hlist_for_each(n, h) {

1703

hlist_for_each(n, h) {

1701

i = hlist_entry(n, struct irq_info, node);

1704

i = hlist_entry(n, struct irq_info, node);

1702

if (i->irq == up->port.irq)

1705

if (i->irq == up->port.irq)

1703

break;

1706

break;

1704

}

1707

}

1705

1708

1706

BUG_ON(n == NULL);

1709

BUG_ON(n == NULL);

1707

BUG_ON(i->head == NULL);

1710

BUG_ON(i->head == NULL);

1708

1711

1709

if (list_empty(i->head))

1712

if (list_empty(i->head))

1710

free_irq(up->port.irq, i);

1713

free_irq(up->port.irq, i);

1711

1714

1712

serial_do_unlink(i, up);

1715

serial_do_unlink(i, up);

1713

mutex_unlock(&hash_mutex);

1716

mutex_unlock(&hash_mutex);

1714

}

1717

}

1715

1718

1716

/* Base timer interval for polling */

1719

/* Base timer interval for polling */

1717

static inline int poll_timeout(int timeout)

1720

static inline int poll_timeout(int timeout)

1718

{

1721

{

1719

return timeout > 6 ? (timeout / 2 - 2) : 1;

1722

return timeout > 6 ? (timeout / 2 - 2) : 1;

1720

}

1723

}

1721

1724

1722

/*

1725

/*

1723

* This function is used to handle ports that do not have an

1726

* This function is used to handle ports that do not have an

1724

* interrupt. This doesn't work very well for 16450's, but gives

1727

* interrupt. This doesn't work very well for 16450's, but gives

1725

* barely passable results for a 16550A. (Although at the expense

1728

* barely passable results for a 16550A. (Although at the expense

1726

* of much CPU overhead).

1729

* of much CPU overhead).

1727

*/

1730

*/

1728

static void serial8250_timeout(unsigned long data)

1731

static void serial8250_timeout(unsigned long data)

1729

{

1732

{

1730

struct uart_8250_port *up = (struct uart_8250_port *)data;

1733

struct uart_8250_port *up = (struct uart_8250_port *)data;

1731

unsigned int iir;

1734

unsigned int iir;

1732

1735

1733

iir = serial_in(up, UART_IIR);

1736

iir = serial_in(up, UART_IIR);

1734

if (!(iir & UART_IIR_NO_INT))

1737

if (!(iir & UART_IIR_NO_INT))

1735

serial8250_handle_port(up);

1738

serial8250_handle_port(up);

1736

mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));

1739

mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));

1737

}

1740

}

1738

1741

1739

static void serial8250_backup_timeout(unsigned long data)

1742

static void serial8250_backup_timeout(unsigned long data)

1740

{

1743

{

1741

struct uart_8250_port *up = (struct uart_8250_port *)data;

1744

struct uart_8250_port *up = (struct uart_8250_port *)data;

1742

unsigned int iir, ier = 0, lsr;

1745

unsigned int iir, ier = 0, lsr;

1743

unsigned long flags;

1746

unsigned long flags;

1744

1747

1745

/*

1748

/*

1746

* Must disable interrupts or else we risk racing with the interrupt

1749

* Must disable interrupts or else we risk racing with the interrupt

1747

* based handler.

1750

* based handler.

1748

*/

1751

*/

1749

if (is_real_interrupt(up->port.irq)) {

1752

if (is_real_interrupt(up->port.irq)) {

1750

ier = serial_in(up, UART_IER);

1753

ier = serial_in(up, UART_IER);

1751

serial_out(up, UART_IER, 0);

1754

serial_out(up, UART_IER, 0);

1752

}

1755

}

1753

1756

1754

iir = serial_in(up, UART_IIR);

1757

iir = serial_in(up, UART_IIR);

1755

1758

1756

/*

1759

/*

1757

* This should be a safe test for anyone who doesn't trust the

1760

* This should be a safe test for anyone who doesn't trust the

1758

* IIR bits on their UART, but it's specifically designed for

1761

* IIR bits on their UART, but it's specifically designed for

1759

* the "Diva" UART used on the management processor on many HP

1762

* the "Diva" UART used on the management processor on many HP

1760

* ia64 and parisc boxes.

1763

* ia64 and parisc boxes.

1761

*/

1764

*/

1762

spin_lock_irqsave(&up->port.lock, flags);

1765

spin_lock_irqsave(&up->port.lock, flags);

1763

lsr = serial_in(up, UART_LSR);

1766

lsr = serial_in(up, UART_LSR);

1764

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1767

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1765

spin_unlock_irqrestore(&up->port.lock, flags);

1768

spin_unlock_irqrestore(&up->port.lock, flags);

1766

if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&

1769

if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&

1767

(!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&

1770

(!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&

1768

(lsr & UART_LSR_THRE)) {

1771

(lsr & UART_LSR_THRE)) {

1769

iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);

1772

iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);

1770

iir |= UART_IIR_THRI;

1773

iir |= UART_IIR_THRI;

1771

}

1774

}

1772

1775

1773

if (!(iir & UART_IIR_NO_INT))

1776

if (!(iir & UART_IIR_NO_INT))

1774

serial8250_handle_port(up);

1777

serial8250_handle_port(up);

1775

1778

1776

if (is_real_interrupt(up->port.irq))

1779

if (is_real_interrupt(up->port.irq))

1777

serial_out(up, UART_IER, ier);

1780

serial_out(up, UART_IER, ier);

1778

1781

1779

/* Standard timer interval plus 0.2s to keep the port running */

1782

/* Standard timer interval plus 0.2s to keep the port running */

1780

mod_timer(&up->timer,

1783

mod_timer(&up->timer,

1781

jiffies + poll_timeout(up->port.timeout) + HZ / 5);

1784

jiffies + poll_timeout(up->port.timeout) + HZ / 5);

1782

}

1785

}

1783

1786

1784

static unsigned int serial8250_tx_empty(struct uart_port *port)

1787

static unsigned int serial8250_tx_empty(struct uart_port *port)

1785

{

1788

{

1786

struct uart_8250_port *up = (struct uart_8250_port *)port;

1789

struct uart_8250_port *up = (struct uart_8250_port *)port;

1787

unsigned long flags;

1790

unsigned long flags;

1788

unsigned int lsr;

1791

unsigned int lsr;

1789

1792

1790

spin_lock_irqsave(&up->port.lock, flags);

1793

spin_lock_irqsave(&up->port.lock, flags);

1791

lsr = serial_in(up, UART_LSR);

1794

lsr = serial_in(up, UART_LSR);

1792

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1795

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1793

spin_unlock_irqrestore(&up->port.lock, flags);

1796

spin_unlock_irqrestore(&up->port.lock, flags);

1794

1797

1795

return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;

1798

return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;

1796

}

1799

}

1797

1800

1798

static unsigned int serial8250_get_mctrl(struct uart_port *port)

1801

static unsigned int serial8250_get_mctrl(struct uart_port *port)

1799

{

1802

{

1800

struct uart_8250_port *up = (struct uart_8250_port *)port;

1803

struct uart_8250_port *up = (struct uart_8250_port *)port;

1801

unsigned int status;

1804

unsigned int status;

1802

unsigned int ret;

1805

unsigned int ret;

1803

1806

1804

status = check_modem_status(up);

1807

status = check_modem_status(up);

1805

1808

1806

ret = 0;

1809

ret = 0;

1807

if (status & UART_MSR_DCD)

1810

if (status & UART_MSR_DCD)

1808

ret |= TIOCM_CAR;

1811

ret |= TIOCM_CAR;

1809

if (status & UART_MSR_RI)

1812

if (status & UART_MSR_RI)

1810

ret |= TIOCM_RNG;

1813

ret |= TIOCM_RNG;

1811

if (status & UART_MSR_DSR)

1814

if (status & UART_MSR_DSR)

1812

ret |= TIOCM_DSR;

1815

ret |= TIOCM_DSR;

1813

if (status & UART_MSR_CTS)

1816

if (status & UART_MSR_CTS)

1814

ret |= TIOCM_CTS;

1817

ret |= TIOCM_CTS;

1815

return ret;

1818

return ret;

1816

}

1819

}

1817

1820

1818

static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)

1821

static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)

1819

{

1822

{

1820

struct uart_8250_port *up = (struct uart_8250_port *)port;

1823

struct uart_8250_port *up = (struct uart_8250_port *)port;

1821

unsigned char mcr = 0;

1824

unsigned char mcr = 0;

1822

1825

1823

if (mctrl & TIOCM_RTS)

1826

if (mctrl & TIOCM_RTS)

1824

mcr |= UART_MCR_RTS;

1827

mcr |= UART_MCR_RTS;

1825

if (mctrl & TIOCM_DTR)

1828

if (mctrl & TIOCM_DTR)

1826

mcr |= UART_MCR_DTR;

1829

mcr |= UART_MCR_DTR;

1827

if (mctrl & TIOCM_OUT1)

1830

if (mctrl & TIOCM_OUT1)

1828

mcr |= UART_MCR_OUT1;

1831

mcr |= UART_MCR_OUT1;

1829

if (mctrl & TIOCM_OUT2)

1832

if (mctrl & TIOCM_OUT2)

1830

mcr |= UART_MCR_OUT2;

1833

mcr |= UART_MCR_OUT2;

1831

if (mctrl & TIOCM_LOOP)

1834

if (mctrl & TIOCM_LOOP)

1832

mcr |= UART_MCR_LOOP;

1835

mcr |= UART_MCR_LOOP;

1833

1836

1834

mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;

1837

mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;

1835

1838

1836

serial_out(up, UART_MCR, mcr);

1839

serial_out(up, UART_MCR, mcr);

1837

}

1840

}

1838

1841

1839

static void serial8250_break_ctl(struct uart_port *port, int break_state)

1842

static void serial8250_break_ctl(struct uart_port *port, int break_state)

1840

{

1843

{

1841

struct uart_8250_port *up = (struct uart_8250_port *)port;

1844

struct uart_8250_port *up = (struct uart_8250_port *)port;

1842

unsigned long flags;

1845

unsigned long flags;

1843

1846

1844

spin_lock_irqsave(&up->port.lock, flags);

1847

spin_lock_irqsave(&up->port.lock, flags);

1845

if (break_state == -1)

1848

if (break_state == -1)

1846

up->lcr |= UART_LCR_SBC;

1849

up->lcr |= UART_LCR_SBC;

1847

else

1850

else

1848

up->lcr &= ~UART_LCR_SBC;

1851

up->lcr &= ~UART_LCR_SBC;

1849

serial_out(up, UART_LCR, up->lcr);

1852

serial_out(up, UART_LCR, up->lcr);

1850

spin_unlock_irqrestore(&up->port.lock, flags);

1853

spin_unlock_irqrestore(&up->port.lock, flags);

1851

}

1854

}

1852

1853

#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)

1854

1855

/*

1856

/*

1856

* Wait for transmitter & holding register to empty

1857

* Wait for transmitter & holding register to empty

1857

*/

1858

*/

1858

static void wait_for_xmitr(struct uart_8250_port *up, int bits)

1859

static void wait_for_xmitr(struct uart_8250_port *up, int bits)

1859

{

1860

{

1860

unsigned int status, tmout = 10000;

1861

unsigned int status, tmout = 10000;

1861

1862

/* Wait up to 10ms for the character(s) to be sent. */

1863

/* Wait up to 10ms for the character(s) to be sent. */

1863

do {

1864

do {

1864

status = serial_in(up, UART_LSR);

1865

status = serial_in(up, UART_LSR);

1865

1866

up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;

1867

up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;

1867

1868

if (--tmout == 0)

1869

if (--tmout == 0)

1869

break;

1870

break;

1870

udelay(1);

1871

udelay(1);

1871

} while ((status & bits) != bits);

1872

} while ((status & bits) != bits);

1872

1873

/* Wait up to 1s for flow control if necessary */

1874

/* Wait up to 1s for flow control if necessary */

1874

if (up->port.flags & UPF_CONS_FLOW) {

1875

if (up->port.flags & UPF_CONS_FLOW) {

1875

unsigned int tmout;

1876

unsigned int tmout;

1876

for (tmout = 1000000; tmout; tmout--) {

1877

for (tmout = 1000000; tmout; tmout--) {

1877

unsigned int msr = serial_in(up, UART_MSR);

1878

unsigned int msr = serial_in(up, UART_MSR);

1878

up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;

1879

up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;

1879

if (msr & UART_MSR_CTS)

1880

if (msr & UART_MSR_CTS)

1880

break;

1881

break;

1881

udelay(1);

1882

udelay(1);

1882

touch_nmi_watchdog();

1883

touch_nmi_watchdog();

1883

}

1884

}

1884

}

1885

}

1885

}

1886

}

1886

1887

#ifdef CONFIG_CONSOLE_POLL

1888

#ifdef CONFIG_CONSOLE_POLL

1888

/*

1889

/*

1889

* Console polling routines for writing and reading from the uart while

1890

* Console polling routines for writing and reading from the uart while

1890

* in an interrupt or debug context.

1891

* in an interrupt or debug context.

1891

*/

1892

*/

1892

1893

static int serial8250_get_poll_char(struct uart_port *port)

1894

static int serial8250_get_poll_char(struct uart_port *port)

1894

{

1895

{

1895

struct uart_8250_port *up = (struct uart_8250_port *)port;

1896

struct uart_8250_port *up = (struct uart_8250_port *)port;

1896

unsigned char lsr = serial_inp(up, UART_LSR);

1897

unsigned char lsr = serial_inp(up, UART_LSR);

1897

1898

while (!(lsr & UART_LSR_DR))

1899

while (!(lsr & UART_LSR_DR))

1899

lsr = serial_inp(up, UART_LSR);

1900

lsr = serial_inp(up, UART_LSR);

1900

1901

return serial_inp(up, UART_RX);

1902

return serial_inp(up, UART_RX);

1902

}

1903

}

1903

1904

1905

static void serial8250_put_poll_char(struct uart_port *port,

1906

static void serial8250_put_poll_char(struct uart_port *port,

1906

unsigned char c)

1907

unsigned char c)

1907

{

1908

{

1908

unsigned int ier;

1909

unsigned int ier;

1909

struct uart_8250_port *up = (struct uart_8250_port *)port;

1910

struct uart_8250_port *up = (struct uart_8250_port *)port;

1910

1911

/*

1912

/*

1912

* First save the IER then disable the interrupts

1913

* First save the IER then disable the interrupts

1913

*/

1914

*/

1914

ier = serial_in(up, UART_IER);

1915

ier = serial_in(up, UART_IER);

1915

if (up->capabilities & UART_CAP_UUE)

1916

if (up->capabilities & UART_CAP_UUE)

1916

serial_out(up, UART_IER, UART_IER_UUE);

1917

serial_out(up, UART_IER, UART_IER_UUE);

1917

else

1918

else

1918

serial_out(up, UART_IER, 0);

1919

serial_out(up, UART_IER, 0);

1919

1920

wait_for_xmitr(up, BOTH_EMPTY);

1921

wait_for_xmitr(up, BOTH_EMPTY);

1921

/*

1922

/*

1922

* Send the character out.

1923

* Send the character out.

1923

* If a LF, also do CR...

1924

* If a LF, also do CR...

1924

*/

1925

*/

1925

serial_out(up, UART_TX, c);

1926

serial_out(up, UART_TX, c);

1926

if (c == 10) {

1927

if (c == 10) {

1927

wait_for_xmitr(up, BOTH_EMPTY);

1928

wait_for_xmitr(up, BOTH_EMPTY);

1928

serial_out(up, UART_TX, 13);

1929

serial_out(up, UART_TX, 13);

1929

}

1930

}

1930

1931

/*

1932

/*

1932

* Finally, wait for transmitter to become empty

1933

* Finally, wait for transmitter to become empty

1933

* and restore the IER

1934

* and restore the IER

1934

*/

1935

*/

1935

wait_for_xmitr(up, BOTH_EMPTY);

1936

wait_for_xmitr(up, BOTH_EMPTY);

1936

serial_out(up, UART_IER, ier);

1937

serial_out(up, UART_IER, ier);

1937

}

1938

}

1938

1939

#endif /* CONFIG_CONSOLE_POLL */

1940

#endif /* CONFIG_CONSOLE_POLL */

1940

1941

static int serial8250_startup(struct uart_port *port)

1942

static int serial8250_startup(struct uart_port *port)

1942

{

1943

{

1943

struct uart_8250_port *up = (struct uart_8250_port *)port;

1944

struct uart_8250_port *up = (struct uart_8250_port *)port;

1944

unsigned long flags;

1945

unsigned long flags;

1945

unsigned char lsr, iir;

1946

unsigned char lsr, iir;

1946

int retval;

1947

int retval;

1947

1948

up->capabilities = uart_config[up->port.type].flags;

1949

up->capabilities = uart_config[up->port.type].flags;

1949

up->mcr = 0;

1950

up->mcr = 0;

1950

1951

if (up->port.iotype != up->cur_iotype)

1952

if (up->port.iotype != up->cur_iotype)

1952

set_io_from_upio(port);

1953

set_io_from_upio(port);

1953

1954

if (up->port.type == PORT_16C950) {

1955

if (up->port.type == PORT_16C950) {

1955

/* Wake up and initialize UART */

1956

/* Wake up and initialize UART */

1956

up->acr = 0;

1957

up->acr = 0;

1957

serial_outp(up, UART_LCR, 0xBF);

1958

serial_outp(up, UART_LCR, 0xBF);

1958

serial_outp(up, UART_EFR, UART_EFR_ECB);

1959

serial_outp(up, UART_EFR, UART_EFR_ECB);

1959

serial_outp(up, UART_IER, 0);

1960

serial_outp(up, UART_IER, 0);

1960

serial_outp(up, UART_LCR, 0);

1961

serial_outp(up, UART_LCR, 0);

1961

serial_icr_write(up, UART_CSR, 0); /* Reset the UART */

1962

serial_icr_write(up, UART_CSR, 0); /* Reset the UART */

1962

serial_outp(up, UART_LCR, 0xBF);

1963

serial_outp(up, UART_LCR, 0xBF);

1963

serial_outp(up, UART_EFR, UART_EFR_ECB);

1964

serial_outp(up, UART_EFR, UART_EFR_ECB);

1964

serial_outp(up, UART_LCR, 0);

1965

serial_outp(up, UART_LCR, 0);

1965

}

1966

}

1966

1967

#ifdef CONFIG_SERIAL_8250_RSA

1968

#ifdef CONFIG_SERIAL_8250_RSA

1968

/*

1969

/*

1969

* If this is an RSA port, see if we can kick it up to the

1970

* If this is an RSA port, see if we can kick it up to the

1970

* higher speed clock.

1971

* higher speed clock.

1971

*/

1972

*/

1972

enable_rsa(up);

1973

enable_rsa(up);

1973

#endif

1974

#endif

1974

1975

/*

1976

/*

1976

* Clear the FIFO buffers and disable them.

1977

* Clear the FIFO buffers and disable them.

1977

* (they will be reenabled in set_termios())

1978

* (they will be reenabled in set_termios())

1978

*/

1979

*/

1979

serial8250_clear_fifos(up);

1980

serial8250_clear_fifos(up);

1980

1981

/*

1982

/*

1982

* Clear the interrupt registers.

1983

* Clear the interrupt registers.

1983

*/

1984

*/

1984

(void) serial_inp(up, UART_LSR);

1985

(void) serial_inp(up, UART_LSR);

1985

(void) serial_inp(up, UART_RX);

1986

(void) serial_inp(up, UART_RX);

1986

(void) serial_inp(up, UART_IIR);

1987

(void) serial_inp(up, UART_IIR);

1987

(void) serial_inp(up, UART_MSR);

1988

(void) serial_inp(up, UART_MSR);

1988

1989

/*

1990

/*

1990

* At this point, there's no way the LSR could still be 0xff;

1991

* At this point, there's no way the LSR could still be 0xff;

1991

* if it is, then bail out, because there's likely no UART

1992

* if it is, then bail out, because there's likely no UART

1992

* here.

1993

* here.

1993

*/

1994

*/

1994

if (!(up->port.flags & UPF_BUGGY_UART) &&

1995

if (!(up->port.flags & UPF_BUGGY_UART) &&

1995

(serial_inp(up, UART_LSR) == 0xff)) {

1996

(serial_inp(up, UART_LSR) == 0xff)) {

1996

printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",

1997

printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",

1997

serial_index(&up->port));

1998

serial_index(&up->port));

1998

return -ENODEV;

1999

return -ENODEV;

1999

}

2000

}

2000

2001

/*

2002

/*

2002

* For a XR16C850, we need to set the trigger levels

2003

* For a XR16C850, we need to set the trigger levels

2003

*/

2004

*/

2004

if (up->port.type == PORT_16850) {

2005

if (up->port.type == PORT_16850) {

2005

unsigned char fctr;

2006

unsigned char fctr;

2006

2007

serial_outp(up, UART_LCR, 0xbf);

2008

serial_outp(up, UART_LCR, 0xbf);

2008

2009

fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);

2010

fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);

2010

serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);

2011

serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);

2011

serial_outp(up, UART_TRG, UART_TRG_96);

2012

serial_outp(up, UART_TRG, UART_TRG_96);

2012

serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);

2013

serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);

2013

serial_outp(up, UART_TRG, UART_TRG_96);

2014

serial_outp(up, UART_TRG, UART_TRG_96);

2014

2015

serial_outp(up, UART_LCR, 0);

2016

serial_outp(up, UART_LCR, 0);

2016

}

2017

}

2017

2018

if (is_real_interrupt(up->port.irq)) {

2019

if (is_real_interrupt(up->port.irq)) {

2019

unsigned char iir1;

2020

unsigned char iir1;

2020

/*

2021

/*

2021

* Test for UARTs that do not reassert THRE when the

2022

* Test for UARTs that do not reassert THRE when the

2022

* transmitter is idle and the interrupt has already

2023

* transmitter is idle and the interrupt has already

2023

* been cleared. Real 16550s should always reassert

2024

* been cleared. Real 16550s should always reassert

2024

* this interrupt whenever the transmitter is idle and

2025

* this interrupt whenever the transmitter is idle and

2025

* the interrupt is enabled. Delays are necessary to

2026

* the interrupt is enabled. Delays are necessary to

2026

* allow register changes to become visible.

2027

* allow register changes to become visible.

2027

*/

2028

*/

2028

spin_lock_irqsave(&up->port.lock, flags);

2029

spin_lock_irqsave(&up->port.lock, flags);

2029

if (up->port.irqflags & IRQF_SHARED)

2030

if (up->port.irqflags & IRQF_SHARED)

2030

disable_irq_nosync(up->port.irq);

2031

disable_irq_nosync(up->port.irq);

2031

2032

wait_for_xmitr(up, UART_LSR_THRE);

2033

wait_for_xmitr(up, UART_LSR_THRE);

2033

serial_out_sync(up, UART_IER, UART_IER_THRI);

2034

serial_out_sync(up, UART_IER, UART_IER_THRI);

2034

udelay(1); /* allow THRE to set */

2035

udelay(1); /* allow THRE to set */

2035

iir1 = serial_in(up, UART_IIR);

2036

iir1 = serial_in(up, UART_IIR);

2036

serial_out(up, UART_IER, 0);

2037

serial_out(up, UART_IER, 0);

2037

serial_out_sync(up, UART_IER, UART_IER_THRI);

2038

serial_out_sync(up, UART_IER, UART_IER_THRI);

2038

udelay(1); /* allow a working UART time to re-assert THRE */

2039

udelay(1); /* allow a working UART time to re-assert THRE */

2039

iir = serial_in(up, UART_IIR);

2040

iir = serial_in(up, UART_IIR);

2040

serial_out(up, UART_IER, 0);

2041

serial_out(up, UART_IER, 0);

2041

2042

if (up->port.irqflags & IRQF_SHARED)

2043

if (up->port.irqflags & IRQF_SHARED)

2043

enable_irq(up->port.irq);

2044

enable_irq(up->port.irq);

2044

spin_unlock_irqrestore(&up->port.lock, flags);

2045

spin_unlock_irqrestore(&up->port.lock, flags);

2045

2046

/*

2047

/*

2047

* If the interrupt is not reasserted, setup a timer to

2048

* If the interrupt is not reasserted, setup a timer to

2048

* kick the UART on a regular basis.

2049

* kick the UART on a regular basis.

2049

*/

2050

*/

2050

if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {

2051

if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {

2051

up->bugs |= UART_BUG_THRE;

2052

up->bugs |= UART_BUG_THRE;

2052

pr_debug("ttyS%d - using backup timer\n",

2053

pr_debug("ttyS%d - using backup timer\n",

2053

serial_index(port));

2054

serial_index(port));

2054

}

2055

}

2055

}

2056

}

2056

2057

/*

2058

/*

2058

* The above check will only give an accurate result the first time

2059

* The above check will only give an accurate result the first time

2059

* the port is opened so this value needs to be preserved.

2060

* the port is opened so this value needs to be preserved.

2060

*/

2061

*/

2061

if (up->bugs & UART_BUG_THRE) {

2062

if (up->bugs & UART_BUG_THRE) {

2062

up->timer.function = serial8250_backup_timeout;

2063

up->timer.function = serial8250_backup_timeout;

2063

up->timer.data = (unsigned long)up;

2064

up->timer.data = (unsigned long)up;

2064

mod_timer(&up->timer, jiffies +

2065

mod_timer(&up->timer, jiffies +

2065

poll_timeout(up->port.timeout) + HZ / 5);

2066

poll_timeout(up->port.timeout) + HZ / 5);

2066

}

2067

}

2067

2068

/*

2069

/*

2069

* If the "interrupt" for this port doesn't correspond with any

2070

* If the "interrupt" for this port doesn't correspond with any

2070

* hardware interrupt, we use a timer-based system. The original

2071

* hardware interrupt, we use a timer-based system. The original

2071

* driver used to do this with IRQ0.

2072

* driver used to do this with IRQ0.

2072

*/

2073

*/

2073

if (!is_real_interrupt(up->port.irq)) {

2074

if (!is_real_interrupt(up->port.irq)) {

2074

up->timer.data = (unsigned long)up;

2075

up->timer.data = (unsigned long)up;

2075

mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));

2076

mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));

2076

} else {

2077

} else {

2077

retval = serial_link_irq_chain(up);

2078

retval = serial_link_irq_chain(up);

2078

if (retval)

2079

if (retval)

2079

return retval;

2080

return retval;

2080

}

2081

}

2081

2082

/*

2083

/*

2083

* Now, initialize the UART

2084

* Now, initialize the UART

2084

*/

2085

*/

2085

serial_outp(up, UART_LCR, UART_LCR_WLEN8);

2086

serial_outp(up, UART_LCR, UART_LCR_WLEN8);

2086

2087

spin_lock_irqsave(&up->port.lock, flags);

2088

spin_lock_irqsave(&up->port.lock, flags);

2088

if (up->port.flags & UPF_FOURPORT) {

2089

if (up->port.flags & UPF_FOURPORT) {

2089

if (!is_real_interrupt(up->port.irq))

2090

if (!is_real_interrupt(up->port.irq))

2090

up->port.mctrl |= TIOCM_OUT1;

2091

up->port.mctrl |= TIOCM_OUT1;

2091

} else

2092

} else

2092

/*

2093

/*

2093

* Most PC uarts need OUT2 raised to enable interrupts.

2094

* Most PC uarts need OUT2 raised to enable interrupts.

2094

*/

2095

*/

2095

if (is_real_interrupt(up->port.irq))

2096

if (is_real_interrupt(up->port.irq))

2096

up->port.mctrl |= TIOCM_OUT2;

2097

up->port.mctrl |= TIOCM_OUT2;

2097

2098

serial8250_set_mctrl(&up->port, up->port.mctrl);

2099

serial8250_set_mctrl(&up->port, up->port.mctrl);

2099

2100

/* Serial over Lan (SoL) hack:

2101

/* Serial over Lan (SoL) hack:

2101

Intel 8257x Gigabit ethernet chips have a

2102

Intel 8257x Gigabit ethernet chips have a

2102

16550 emulation, to be used for Serial Over Lan.

2103

16550 emulation, to be used for Serial Over Lan.

2103

Those chips take a longer time than a normal

2104

Those chips take a longer time than a normal

2104

serial device to signalize that a transmission

2105

serial device to signalize that a transmission

2105

data was queued. Due to that, the above test generally

2106

data was queued. Due to that, the above test generally

2106

fails. One solution would be to delay the reading of

2107

fails. One solution would be to delay the reading of

2107

iir. However, this is not reliable, since the timeout

2108

iir. However, this is not reliable, since the timeout

2108

is variable. So, let's just don't test if we receive

2109

is variable. So, let's just don't test if we receive

2109

TX irq. This way, we'll never enable UART_BUG_TXEN.

2110

TX irq. This way, we'll never enable UART_BUG_TXEN.

2110

*/

2111

*/

2111

if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)

2112

if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)

2112

goto dont_test_tx_en;

2113

goto dont_test_tx_en;

2113

2114

/*

2115

/*

2115

* Do a quick test to see if we receive an

2116

* Do a quick test to see if we receive an

2116

* interrupt when we enable the TX irq.

2117

* interrupt when we enable the TX irq.

2117

*/

2118

*/

2118

serial_outp(up, UART_IER, UART_IER_THRI);

2119

serial_outp(up, UART_IER, UART_IER_THRI);

2119

lsr = serial_in(up, UART_LSR);

2120

lsr = serial_in(up, UART_LSR);

2120

iir = serial_in(up, UART_IIR);

2121

iir = serial_in(up, UART_IIR);

2121

serial_outp(up, UART_IER, 0);

2122

serial_outp(up, UART_IER, 0);

2122

2123

if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {

2124

if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {

2124

if (!(up->bugs & UART_BUG_TXEN)) {

2125

if (!(up->bugs & UART_BUG_TXEN)) {

2125

up->bugs |= UART_BUG_TXEN;

2126

up->bugs |= UART_BUG_TXEN;

2126

pr_debug("ttyS%d - enabling bad tx status workarounds\n",

2127

pr_debug("ttyS%d - enabling bad tx status workarounds\n",

2127

serial_index(port));

2128

serial_index(port));

2128

}

2129

}

2129

} else {

2130

} else {

2130

up->bugs &= ~UART_BUG_TXEN;

2131

up->bugs &= ~UART_BUG_TXEN;

2131

}

2132

}

2132

2133

dont_test_tx_en:

2134

dont_test_tx_en:

2134

spin_unlock_irqrestore(&up->port.lock, flags);

2135

spin_unlock_irqrestore(&up->port.lock, flags);

2135

2136

/*

2137

/*

2137

* Clear the interrupt registers again for luck, and clear the

2138

* Clear the interrupt registers again for luck, and clear the

2138

* saved flags to avoid getting false values from polling

2139

* saved flags to avoid getting false values from polling

2139

* routines or the previous session.

2140

* routines or the previous session.

2140

*/

2141

*/

2141

serial_inp(up, UART_LSR);

2142

serial_inp(up, UART_LSR);

2142

serial_inp(up, UART_RX);

2143

serial_inp(up, UART_RX);

2143

serial_inp(up, UART_IIR);

2144

serial_inp(up, UART_IIR);

2144

serial_inp(up, UART_MSR);

2145

serial_inp(up, UART_MSR);

2145

up->lsr_saved_flags = 0;

2146

up->lsr_saved_flags = 0;

2146

up->msr_saved_flags = 0;

2147

up->msr_saved_flags = 0;

2147

2148

/*

2149

/*

2149

* Finally, enable interrupts. Note: Modem status interrupts

2150

* Finally, enable interrupts. Note: Modem status interrupts

2150

* are set via set_termios(), which will be occurring imminently

2151

* are set via set_termios(), which will be occurring imminently

2151

* anyway, so we don't enable them here.

2152

* anyway, so we don't enable them here.

2152

*/

2153

*/

2153

up->ier = UART_IER_RLSI | UART_IER_RDI;

2154

up->ier = UART_IER_RLSI | UART_IER_RDI;

2154

serial_outp(up, UART_IER, up->ier);

2155

serial_outp(up, UART_IER, up->ier);

2155

2156

if (up->port.flags & UPF_FOURPORT) {

2157

if (up->port.flags & UPF_FOURPORT) {

2157

unsigned int icp;

2158

unsigned int icp;

2158

/*

2159

/*

2159

* Enable interrupts on the AST Fourport board

2160

* Enable interrupts on the AST Fourport board

2160

*/

2161

*/

2161

icp = (up->port.iobase & 0xfe0) | 0x01f;

2162

icp = (up->port.iobase & 0xfe0) | 0x01f;

2162

outb_p(0x80, icp);

2163

outb_p(0x80, icp);

2163

(void) inb_p(icp);

2164

(void) inb_p(icp);

2164

}

2165

}

2165

2166

return 0;

2167

return 0;

2167

}

2168

}

2168

2169

static void serial8250_shutdown(struct uart_port *port)

2170

static void serial8250_shutdown(struct uart_port *port)

2170

{

2171

{

2171

struct uart_8250_port *up = (struct uart_8250_port *)port;

2172

struct uart_8250_port *up = (struct uart_8250_port *)port;

2172

unsigned long flags;

2173

unsigned long flags;

2173

2174

/*

2175

/*

2175

* Disable interrupts from this port

2176

* Disable interrupts from this port

2176

*/

2177

*/

2177

up->ier = 0;

2178

up->ier = 0;

2178

serial_outp(up, UART_IER, 0);

2179

serial_outp(up, UART_IER, 0);

2179

2180

spin_lock_irqsave(&up->port.lock, flags);

2181

spin_lock_irqsave(&up->port.lock, flags);

2181

if (up->port.flags & UPF_FOURPORT) {

2182

if (up->port.flags & UPF_FOURPORT) {

2182

/* reset interrupts on the AST Fourport board */

2183

/* reset interrupts on the AST Fourport board */

2183

inb((up->port.iobase & 0xfe0) | 0x1f);

2184

inb((up->port.iobase & 0xfe0) | 0x1f);

2184

up->port.mctrl |= TIOCM_OUT1;

2185

up->port.mctrl |= TIOCM_OUT1;

2185

} else

2186

} else

2186

up->port.mctrl &= ~TIOCM_OUT2;

2187

up->port.mctrl &= ~TIOCM_OUT2;

2187

2188

serial8250_set_mctrl(&up->port, up->port.mctrl);

2189

serial8250_set_mctrl(&up->port, up->port.mctrl);

2189

spin_unlock_irqrestore(&up->port.lock, flags);

2190

spin_unlock_irqrestore(&up->port.lock, flags);

2190

2191

/*

2192

/*

2192

* Disable break condition and FIFOs

2193

* Disable break condition and FIFOs

2193

*/

2194

*/

2194

serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);

2195

serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);

2195

serial8250_clear_fifos(up);

2196

serial8250_clear_fifos(up);

2196

2197

#ifdef CONFIG_SERIAL_8250_RSA

2198

#ifdef CONFIG_SERIAL_8250_RSA

2198

/*

2199

/*

2199

* Reset the RSA board back to 115kbps compat mode.

2200

* Reset the RSA board back to 115kbps compat mode.

2200

*/

2201

*/

2201

disable_rsa(up);

2202

disable_rsa(up);

2202

#endif

2203

#endif

2203

2204

/*

2205

/*

2205

* Read data port to reset things, and then unlink from

2206

* Read data port to reset things, and then unlink from

2206

* the IRQ chain.

2207

* the IRQ chain.

2207

*/

2208

*/

2208

(void) serial_in(up, UART_RX);

2209

(void) serial_in(up, UART_RX);

2209

2210

del_timer_sync(&up->timer);

2211

del_timer_sync(&up->timer);

2211

up->timer.function = serial8250_timeout;

2212

up->timer.function = serial8250_timeout;

2212

if (is_real_interrupt(up->port.irq))

2213

if (is_real_interrupt(up->port.irq))

2213

serial_unlink_irq_chain(up);

2214

serial_unlink_irq_chain(up);

2214

}

2215

}

2215

2216

static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)

2217

static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)

2217

{

2218

{

2218

unsigned int quot;

2219

unsigned int quot;

2219

2220

/*

2221

/*

2221

* Handle magic divisors for baud rates above baud_base on

2222

* Handle magic divisors for baud rates above baud_base on

2222

* SMSC SuperIO chips.

2223

* SMSC SuperIO chips.

2223

*/

2224

*/

2224

if ((port->flags & UPF_MAGIC_MULTIPLIER) &&

2225

if ((port->flags & UPF_MAGIC_MULTIPLIER) &&

2225

baud == (port->uartclk/4))

2226

baud == (port->uartclk/4))

2226

quot = 0x8001;

2227

quot = 0x8001;

2227

else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&

2228

else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&

2228

baud == (port->uartclk/8))

2229

baud == (port->uartclk/8))

2229

quot = 0x8002;

2230

quot = 0x8002;

2230

else

2231

else

2231

quot = uart_get_divisor(port, baud);

2232

quot = uart_get_divisor(port, baud);

2232

2233

return quot;

2234

return quot;

2234

}

2235

}

2235

2236

static void

2237

static void

2237

serial8250_set_termios(struct uart_port *port, struct ktermios *termios,

2238

serial8250_set_termios(struct uart_port *port, struct ktermios *termios,

2238

struct ktermios *old)

2239

struct ktermios *old)

2239

{

2240

{

2240

struct uart_8250_port *up = (struct uart_8250_port *)port;

2241

struct uart_8250_port *up = (struct uart_8250_port *)port;

2241

unsigned char cval, fcr = 0;

2242

unsigned char cval, fcr = 0;

2242

unsigned long flags;

2243

unsigned long flags;

2243

unsigned int baud, quot;

2244

unsigned int baud, quot;

2244

2245

switch (termios->c_cflag & CSIZE) {

2246

switch (termios->c_cflag & CSIZE) {

2246

case CS5:

2247

case CS5:

2247

cval = UART_LCR_WLEN5;

2248

cval = UART_LCR_WLEN5;

2248

break;

2249

break;

2249

case CS6:

2250

case CS6:

2250

cval = UART_LCR_WLEN6;

2251

cval = UART_LCR_WLEN6;

2251

break;

2252

break;

2252

case CS7:

2253

case CS7:

2253

cval = UART_LCR_WLEN7;

2254

cval = UART_LCR_WLEN7;

2254

break;

2255

break;

2255

default:

2256

default:

2256

case CS8:

2257

case CS8:

2257

cval = UART_LCR_WLEN8;

2258

cval = UART_LCR_WLEN8;

2258

break;

2259

break;

2259

}

2260

}

2260

2261

if (termios->c_cflag & CSTOPB)

2262

if (termios->c_cflag & CSTOPB)

2262

cval |= UART_LCR_STOP;

2263

cval |= UART_LCR_STOP;

2263

if (termios->c_cflag & PARENB)

2264

if (termios->c_cflag & PARENB)

2264

cval |= UART_LCR_PARITY;

2265

cval |= UART_LCR_PARITY;

2265

if (!(termios->c_cflag & PARODD))

2266

if (!(termios->c_cflag & PARODD))

2266

cval |= UART_LCR_EPAR;

2267

cval |= UART_LCR_EPAR;

2267

#ifdef CMSPAR

2268

#ifdef CMSPAR

2268

if (termios->c_cflag & CMSPAR)

2269

if (termios->c_cflag & CMSPAR)

2269

cval |= UART_LCR_SPAR;

2270

cval |= UART_LCR_SPAR;

2270

#endif

2271

#endif

2271

2272

/*

2273

/*

2273

* Ask the core to calculate the divisor for us.

2274

* Ask the core to calculate the divisor for us.

2274

*/

2275

*/

2275

baud = uart_get_baud_rate(port, termios, old,

2276

baud = uart_get_baud_rate(port, termios, old,

2276

port->uartclk / 16 / 0xffff,

2277

port->uartclk / 16 / 0xffff,

2277

port->uartclk / 16);

2278

port->uartclk / 16);

2278

quot = serial8250_get_divisor(port, baud);

2279

quot = serial8250_get_divisor(port, baud);

2279

2280

/*

2281

/*

2281

* Oxford Semi 952 rev B workaround

2282

* Oxford Semi 952 rev B workaround

2282

*/

2283

*/

2283

if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)

2284

if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)

2284

quot++;

2285

quot++;

2285

2286

if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {

2287

if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {

2287

if (baud < 2400)

2288

if (baud < 2400)

2288

fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;

2289

fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;

2289

else

2290

else

2290

fcr = uart_config[up->port.type].fcr;

2291

fcr = uart_config[up->port.type].fcr;

2291

}

2292

}

2292

2293

/*

2294

/*

2294

* MCR-based auto flow control. When AFE is enabled, RTS will be

2295

* MCR-based auto flow control. When AFE is enabled, RTS will be

2295

* deasserted when the receive FIFO contains more characters than

2296

* deasserted when the receive FIFO contains more characters than

2296

* the trigger, or the MCR RTS bit is cleared. In the case where

2297

* the trigger, or the MCR RTS bit is cleared. In the case where

2297

* the remote UART is not using CTS auto flow control, we must

2298

* the remote UART is not using CTS auto flow control, we must

2298

* have sufficient FIFO entries for the latency of the remote

2299

* have sufficient FIFO entries for the latency of the remote

2299

* UART to respond. IOW, at least 32 bytes of FIFO.

2300

* UART to respond. IOW, at least 32 bytes of FIFO.

2300

*/

2301

*/

2301

if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {

2302

if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {

2302

up->mcr &= ~UART_MCR_AFE;

2303

up->mcr &= ~UART_MCR_AFE;

2303

if (termios->c_cflag & CRTSCTS)

2304

if (termios->c_cflag & CRTSCTS)

2304

up->mcr |= UART_MCR_AFE;

2305

up->mcr |= UART_MCR_AFE;

2305

}

2306

}

2306

2307

/*

2308

/*

2308

* Ok, we're now changing the port state. Do it with

2309

* Ok, we're now changing the port state. Do it with

2309

* interrupts disabled.

2310

* interrupts disabled.

2310

*/

2311

*/

2311

spin_lock_irqsave(&up->port.lock, flags);

2312

spin_lock_irqsave(&up->port.lock, flags);

2312

2313

/*

2314

/*

2314

* Update the per-port timeout.

2315

* Update the per-port timeout.

2315

*/

2316

*/

2316

uart_update_timeout(port, termios->c_cflag, baud);

2317

uart_update_timeout(port, termios->c_cflag, baud);

2317

2318

up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;

2319

up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;

2319

if (termios->c_iflag & INPCK)

2320

if (termios->c_iflag & INPCK)

2320

up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;

2321

up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;

2321

if (termios->c_iflag & (BRKINT | PARMRK))

2322

if (termios->c_iflag & (BRKINT | PARMRK))

2322

up->port.read_status_mask |= UART_LSR_BI;

2323

up->port.read_status_mask |= UART_LSR_BI;

2323

2324

/*

2325

/*

2325

* Characteres to ignore

2326

* Characteres to ignore

2326

*/

2327

*/

2327

up->port.ignore_status_mask = 0;

2328

up->port.ignore_status_mask = 0;

2328

if (termios->c_iflag & IGNPAR)

2329

if (termios->c_iflag & IGNPAR)

2329

up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;

2330

up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;

2330

if (termios->c_iflag & IGNBRK) {

2331

if (termios->c_iflag & IGNBRK) {

2331

up->port.ignore_status_mask |= UART_LSR_BI;

2332

up->port.ignore_status_mask |= UART_LSR_BI;

2332

/*

2333

/*

2333

* If we're ignoring parity and break indicators,

2334

* If we're ignoring parity and break indicators,

2334

* ignore overruns too (for real raw support).

2335

* ignore overruns too (for real raw support).

2335

*/

2336

*/

2336

if (termios->c_iflag & IGNPAR)

2337

if (termios->c_iflag & IGNPAR)

2337

up->port.ignore_status_mask |= UART_LSR_OE;

2338

up->port.ignore_status_mask |= UART_LSR_OE;

2338

}

2339

}

2339

2340

/*

2341

/*

2341

* ignore all characters if CREAD is not set

2342

* ignore all characters if CREAD is not set

2342

*/

2343

*/

2343

if ((termios->c_cflag & CREAD) == 0)

2344

if ((termios->c_cflag & CREAD) == 0)

2344

up->port.ignore_status_mask |= UART_LSR_DR;

2345

up->port.ignore_status_mask |= UART_LSR_DR;

2345

2346

/*

2347

/*

2347

* CTS flow control flag and modem status interrupts

2348

* CTS flow control flag and modem status interrupts

2348

*/

2349

*/

2349

up->ier &= ~UART_IER_MSI;

2350

up->ier &= ~UART_IER_MSI;

2350

if (!(up->bugs & UART_BUG_NOMSR) &&

2351

if (!(up->bugs & UART_BUG_NOMSR) &&

2351

UART_ENABLE_MS(&up->port, termios->c_cflag))

2352

UART_ENABLE_MS(&up->port, termios->c_cflag))

2352

up->ier |= UART_IER_MSI;

2353

up->ier |= UART_IER_MSI;

2353

if (up->capabilities & UART_CAP_UUE)

2354

if (up->capabilities & UART_CAP_UUE)

2354

up->ier |= UART_IER_UUE | UART_IER_RTOIE;

2355

up->ier |= UART_IER_UUE | UART_IER_RTOIE;

2355

2356

serial_out(up, UART_IER, up->ier);

2357

serial_out(up, UART_IER, up->ier);

2357

2358

if (up->capabilities & UART_CAP_EFR) {

2359

if (up->capabilities & UART_CAP_EFR) {

2359

unsigned char efr = 0;

2360

unsigned char efr = 0;

2360

/*

2361

/*

2361

* TI16C752/Startech hardware flow control. FIXME:

2362

* TI16C752/Startech hardware flow control. FIXME:

2362

* - TI16C752 requires control thresholds to be set.

2363

* - TI16C752 requires control thresholds to be set.

2363

* - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.

2364

* - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.

2364

*/

2365

*/

2365

if (termios->c_cflag & CRTSCTS)

2366

if (termios->c_cflag & CRTSCTS)

2366

efr |= UART_EFR_CTS;

2367

efr |= UART_EFR_CTS;

2367

2368

serial_outp(up, UART_LCR, 0xBF);

2369

serial_outp(up, UART_LCR, 0xBF);

2369

serial_outp(up, UART_EFR, efr);

2370

serial_outp(up, UART_EFR, efr);

2370

}

2371

}

2371

2372

#ifdef CONFIG_ARCH_OMAP

2373

#ifdef CONFIG_ARCH_OMAP

2373

/* Workaround to enable 115200 baud on OMAP1510 internal ports */

2374

/* Workaround to enable 115200 baud on OMAP1510 internal ports */

2374

if (cpu_is_omap1510() && is_omap_port(up)) {

2375

if (cpu_is_omap1510() && is_omap_port(up)) {

2375

if (baud == 115200) {

2376

if (baud == 115200) {

2376

quot = 1;

2377

quot = 1;

2377

serial_out(up, UART_OMAP_OSC_12M_SEL, 1);

2378

serial_out(up, UART_OMAP_OSC_12M_SEL, 1);

2378

} else

2379

} else

2379

serial_out(up, UART_OMAP_OSC_12M_SEL, 0);

2380

serial_out(up, UART_OMAP_OSC_12M_SEL, 0);

2380

}

2381

}

2381

#endif

2382

#endif

2382

2383

if (up->capabilities & UART_NATSEMI) {

2384

if (up->capabilities & UART_NATSEMI) {

2384

/* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */

2385

/* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */

2385

serial_outp(up, UART_LCR, 0xe0);

2386

serial_outp(up, UART_LCR, 0xe0);

2386

} else {

2387

} else {

2387

serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */

2388

serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */

2388

}

2389

}

2389

2390

serial_dl_write(up, quot);

2391

serial_dl_write(up, quot);

2391

2392

/*

2393

/*

2393

* LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR

2394

* LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR

2394

* is written without DLAB set, this mode will be disabled.

2395

* is written without DLAB set, this mode will be disabled.

2395

*/

2396

*/

2396

if (up->port.type == PORT_16750)

2397

if (up->port.type == PORT_16750)

2397

serial_outp(up, UART_FCR, fcr);

2398

serial_outp(up, UART_FCR, fcr);

2398

2399

serial_outp(up, UART_LCR, cval); /* reset DLAB */

2400

serial_outp(up, UART_LCR, cval); /* reset DLAB */

2400

up->lcr = cval; /* Save LCR */

2401

up->lcr = cval; /* Save LCR */

2401

if (up->port.type != PORT_16750) {

2402

if (up->port.type != PORT_16750) {

2402

if (fcr & UART_FCR_ENABLE_FIFO) {

2403

if (fcr & UART_FCR_ENABLE_FIFO) {

2403

/* emulated UARTs (Lucent Venus 167x) need two steps */

2404

/* emulated UARTs (Lucent Venus 167x) need two steps */

2404

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

2405

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

2405

}

2406

}

2406

serial_outp(up, UART_FCR, fcr); /* set fcr */

2407

serial_outp(up, UART_FCR, fcr); /* set fcr */

2407

}

2408

}

2408

serial8250_set_mctrl(&up->port, up->port.mctrl);

2409

serial8250_set_mctrl(&up->port, up->port.mctrl);

2409

spin_unlock_irqrestore(&up->port.lock, flags);

2410

spin_unlock_irqrestore(&up->port.lock, flags);

2410

/* Don't rewrite B0 */

2411

/* Don't rewrite B0 */

2411

if (tty_termios_baud_rate(termios))

2412

if (tty_termios_baud_rate(termios))

2412

tty_termios_encode_baud_rate(termios, baud, baud);

2413

tty_termios_encode_baud_rate(termios, baud, baud);

2413

}

2414

}

2414

2415

static void

2416

static void

2416

serial8250_pm(struct uart_port *port, unsigned int state,

2417

serial8250_pm(struct uart_port *port, unsigned int state,

2417

unsigned int oldstate)

2418

unsigned int oldstate)

2418

{

2419

{

2419

struct uart_8250_port *p = (struct uart_8250_port *)port;

2420

struct uart_8250_port *p = (struct uart_8250_port *)port;

2420

2421

serial8250_set_sleep(p, state != 0);

2422

serial8250_set_sleep(p, state != 0);

2422

2423

if (p->pm)

2424

if (p->pm)

2424

p->pm(port, state, oldstate);

2425

p->pm(port, state, oldstate);

2425

}

2426

}

2426

2427

static unsigned int serial8250_port_size(struct uart_8250_port *pt)

2428

static unsigned int serial8250_port_size(struct uart_8250_port *pt)

2428

{

2429

{

2429

if (pt->port.iotype == UPIO_AU)

2430

if (pt->port.iotype == UPIO_AU)

2430

return 0x100000;

2431

return 0x100000;

2431

#ifdef CONFIG_ARCH_OMAP

2432

#ifdef CONFIG_ARCH_OMAP

2432

if (is_omap_port(pt))

2433

if (is_omap_port(pt))

2433

return 0x16 << pt->port.regshift;

2434

return 0x16 << pt->port.regshift;

2434

#endif

2435

#endif

2435

return 8 << pt->port.regshift;

2436

return 8 << pt->port.regshift;

2436

}

2437

}

2437

2438

/*

2439

/*

2439

* Resource handling.

2440

* Resource handling.

2440

*/

2441

*/

2441

static int serial8250_request_std_resource(struct uart_8250_port *up)

2442

static int serial8250_request_std_resource(struct uart_8250_port *up)

2442

{

2443

{

2443

unsigned int size = serial8250_port_size(up);

2444

unsigned int size = serial8250_port_size(up);

2444

int ret = 0;

2445

int ret = 0;

2445

2446

switch (up->port.iotype) {

2447

switch (up->port.iotype) {

2447

case UPIO_AU:

2448

case UPIO_AU:

2448

case UPIO_TSI:

2449

case UPIO_TSI:

2449

case UPIO_MEM32:

2450

case UPIO_MEM32:

2450

case UPIO_MEM:

2451

case UPIO_MEM:

2451

case UPIO_DWAPB:

2452

case UPIO_DWAPB:

2452

if (!up->port.mapbase)

2453

if (!up->port.mapbase)

2453

break;

2454

break;

2454

2455

if (!request_mem_region(up->port.mapbase, size, "serial")) {

2456

if (!request_mem_region(up->port.mapbase, size, "serial")) {

2456

ret = -EBUSY;

2457

ret = -EBUSY;

2457

break;

2458

break;

2458

}

2459

}

2459

2460

if (up->port.flags & UPF_IOREMAP) {

2461

if (up->port.flags & UPF_IOREMAP) {

2461

up->port.membase = ioremap_nocache(up->port.mapbase,

2462

up->port.membase = ioremap_nocache(up->port.mapbase,

2462

size);

2463

size);

2463

if (!up->port.membase) {

2464

if (!up->port.membase) {

2464

release_mem_region(up->port.mapbase, size);

2465

release_mem_region(up->port.mapbase, size);

2465

ret = -ENOMEM;

2466

ret = -ENOMEM;

2466

}

2467

}

2467

}

2468

}

2468

break;

2469

break;

2469

2470

case UPIO_HUB6:

2471

case UPIO_HUB6:

2471

case UPIO_PORT:

2472

case UPIO_PORT:

2472

if (!request_region(up->port.iobase, size, "serial"))

2473

if (!request_region(up->port.iobase, size, "serial"))

2473

ret = -EBUSY;

2474

ret = -EBUSY;

2474

break;

2475

break;

2475

}

2476

}

2476

return ret;

2477

return ret;

2477

}

2478

}

2478

2479

static void serial8250_release_std_resource(struct uart_8250_port *up)

2480

static void serial8250_release_std_resource(struct uart_8250_port *up)

2480

{

2481

{

2481

unsigned int size = serial8250_port_size(up);

2482

unsigned int size = serial8250_port_size(up);

2482

2483

switch (up->port.iotype) {

2484

switch (up->port.iotype) {

2484

case UPIO_AU:

2485

case UPIO_AU:

2485

case UPIO_TSI:

2486

case UPIO_TSI:

2486

case UPIO_MEM32:

2487

case UPIO_MEM32:

2487

case UPIO_MEM:

2488

case UPIO_MEM:

2488

case UPIO_DWAPB:

2489

case UPIO_DWAPB:

2489

if (!up->port.mapbase)

2490

if (!up->port.mapbase)

2490

break;

2491

break;

2491

2492

if (up->port.flags & UPF_IOREMAP) {

2493

if (up->port.flags & UPF_IOREMAP) {

2493

iounmap(up->port.membase);

2494

iounmap(up->port.membase);

2494

up->port.membase = NULL;

2495

up->port.membase = NULL;

2495

}

2496

}

2496

2497

release_mem_region(up->port.mapbase, size);

2498

release_mem_region(up->port.mapbase, size);

2498

break;

2499

break;

2499

2500

case UPIO_HUB6:

2501

case UPIO_HUB6:

2501

case UPIO_PORT:

2502

case UPIO_PORT:

2502

release_region(up->port.iobase, size);

2503

release_region(up->port.iobase, size);

2503

break;

2504

break;

2504

}

2505

}

2505

}

2506

}

2506

2507

static int serial8250_request_rsa_resource(struct uart_8250_port *up)

2508

static int serial8250_request_rsa_resource(struct uart_8250_port *up)

2508

{

2509

{

2509

unsigned long start = UART_RSA_BASE << up->port.regshift;

2510

unsigned long start = UART_RSA_BASE << up->port.regshift;

2510

unsigned int size = 8 << up->port.regshift;

2511

unsigned int size = 8 << up->port.regshift;

2511

int ret = -EINVAL;

2512

int ret = -EINVAL;

2512

2513

switch (up->port.iotype) {

2514

switch (up->port.iotype) {

2514

case UPIO_HUB6:

2515

case UPIO_HUB6:

2515

case UPIO_PORT:

2516

case UPIO_PORT:

2516

start += up->port.iobase;

2517

start += up->port.iobase;

2517

if (request_region(start, size, "serial-rsa"))

2518

if (request_region(start, size, "serial-rsa"))

2518

ret = 0;

2519

ret = 0;

2519

else

2520

else

2520

ret = -EBUSY;

2521

ret = -EBUSY;

2521

break;

2522

break;

2522

}

2523

}

2523

2524

return ret;

2525

return ret;

2525

}

2526

}

2526

2527

static void serial8250_release_rsa_resource(struct uart_8250_port *up)

2528

static void serial8250_release_rsa_resource(struct uart_8250_port *up)

2528

{

2529

{

2529

unsigned long offset = UART_RSA_BASE << up->port.regshift;

2530

unsigned long offset = UART_RSA_BASE << up->port.regshift;

2530

unsigned int size = 8 << up->port.regshift;

2531

unsigned int size = 8 << up->port.regshift;

2531

2532

switch (up->port.iotype) {

2533

switch (up->port.iotype) {

2533

case UPIO_HUB6:

2534

case UPIO_HUB6:

2534

case UPIO_PORT:

2535

case UPIO_PORT:

2535

release_region(up->port.iobase + offset, size);

2536

release_region(up->port.iobase + offset, size);

2536

break;

2537

break;

2537

}

2538

}

2538

}

2539

}

2539

2540

static void serial8250_release_port(struct uart_port *port)

2541

static void serial8250_release_port(struct uart_port *port)

2541

{

2542

{

2542

struct uart_8250_port *up = (struct uart_8250_port *)port;

2543

struct uart_8250_port *up = (struct uart_8250_port *)port;

2543

2544

serial8250_release_std_resource(up);

2545

serial8250_release_std_resource(up);

2545

if (up->port.type == PORT_RSA)

2546

if (up->port.type == PORT_RSA)

2546

serial8250_release_rsa_resource(up);

2547

serial8250_release_rsa_resource(up);

2547

}

2548

}

2548

2549

static int serial8250_request_port(struct uart_port *port)

2550

static int serial8250_request_port(struct uart_port *port)

2550

{

2551

{

2551

struct uart_8250_port *up = (struct uart_8250_port *)port;

2552

struct uart_8250_port *up = (struct uart_8250_port *)port;

2552

int ret = 0;

2553

int ret = 0;

2553

2554

ret = serial8250_request_std_resource(up);

2555

ret = serial8250_request_std_resource(up);

2555

if (ret == 0 && up->port.type == PORT_RSA) {

2556

if (ret == 0 && up->port.type == PORT_RSA) {

2556

ret = serial8250_request_rsa_resource(up);

2557

ret = serial8250_request_rsa_resource(up);

2557

if (ret < 0)

2558

if (ret < 0)

2558

serial8250_release_std_resource(up);

2559

serial8250_release_std_resource(up);

2559

}

2560

}

2560

2561

return ret;

2562

return ret;

2562

}

2563

}

2563

2564

static void serial8250_config_port(struct uart_port *port, int flags)

2565

static void serial8250_config_port(struct uart_port *port, int flags)

2565

{

2566

{

2566

struct uart_8250_port *up = (struct uart_8250_port *)port;

2567

struct uart_8250_port *up = (struct uart_8250_port *)port;

2567

int probeflags = PROBE_ANY;

2568

int probeflags = PROBE_ANY;

2568

int ret;

2569

int ret;

2569

2570

/*

2571

/*

2571

* Find the region that we can probe for. This in turn

2572

* Find the region that we can probe for. This in turn

2572

* tells us whether we can probe for the type of port.

2573

* tells us whether we can probe for the type of port.

2573

*/

2574

*/

2574

ret = serial8250_request_std_resource(up);

2575

ret = serial8250_request_std_resource(up);

2575

if (ret < 0)

2576

if (ret < 0)

2576

return;

2577

return;

2577

2578

ret = serial8250_request_rsa_resource(up);

2579

ret = serial8250_request_rsa_resource(up);

2579

if (ret < 0)

2580

if (ret < 0)

2580

probeflags &= ~PROBE_RSA;

2581

probeflags &= ~PROBE_RSA;

2581

2582

if (up->port.iotype != up->cur_iotype)

2583

if (up->port.iotype != up->cur_iotype)

2583

set_io_from_upio(port);

2584

set_io_from_upio(port);

2584

2585

if (flags & UART_CONFIG_TYPE)

2586

if (flags & UART_CONFIG_TYPE)

2586

autoconfig(up, probeflags);

2587

autoconfig(up, probeflags);

2587

if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)

2588

if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)

2588

autoconfig_irq(up);

2589

autoconfig_irq(up);

2589

2590

if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)

2591

if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)

2591

serial8250_release_rsa_resource(up);

2592

serial8250_release_rsa_resource(up);

2592

if (up->port.type == PORT_UNKNOWN)

2593

if (up->port.type == PORT_UNKNOWN)

2593

serial8250_release_std_resource(up);

2594

serial8250_release_std_resource(up);

2594

}

2595

}

2595

2596

static int

2597

static int

2597

serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)

2598

serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)

2598

{

2599

{

2599

if (ser->irq >= nr_irqs || ser->irq < 0 ||

2600

if (ser->irq >= nr_irqs || ser->irq < 0 ||

2600

ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||

2601

ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||

2601

ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||

2602

ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||

2602

ser->type == PORT_STARTECH)

2603

ser->type == PORT_STARTECH)

2603

return -EINVAL;

2604

return -EINVAL;

2604

return 0;

2605

return 0;

2605

}

2606

}

2606

2607

static const char *

2608

static const char *

2608

serial8250_type(struct uart_port *port)

2609

serial8250_type(struct uart_port *port)

2609

{

2610

{

2610

int type = port->type;

2611

int type = port->type;

2611

2612

if (type >= ARRAY_SIZE(uart_config))

2613

if (type >= ARRAY_SIZE(uart_config))

2613

type = 0;

2614

type = 0;

2614

return uart_config[type].name;

2615

return uart_config[type].name;

2615

}

2616

}

2616

2617

static struct uart_ops serial8250_pops = {

2618

static struct uart_ops serial8250_pops = {

2618

.tx_empty = serial8250_tx_empty,

2619

.tx_empty = serial8250_tx_empty,

2619

.set_mctrl = serial8250_set_mctrl,

2620

.set_mctrl = serial8250_set_mctrl,

2620

.get_mctrl = serial8250_get_mctrl,

2621

.get_mctrl = serial8250_get_mctrl,

2621

.stop_tx = serial8250_stop_tx,

2622

.stop_tx = serial8250_stop_tx,

2622

.start_tx = serial8250_start_tx,

2623

.start_tx = serial8250_start_tx,

2623

.stop_rx = serial8250_stop_rx,

2624

.stop_rx = serial8250_stop_rx,

2624

.enable_ms = serial8250_enable_ms,

2625

.enable_ms = serial8250_enable_ms,

2625

.break_ctl = serial8250_break_ctl,

2626

.break_ctl = serial8250_break_ctl,

2626

.startup = serial8250_startup,

2627

.startup = serial8250_startup,

2627

.shutdown = serial8250_shutdown,

2628

.shutdown = serial8250_shutdown,

2628

.set_termios = serial8250_set_termios,

2629

.set_termios = serial8250_set_termios,

2629

.pm = serial8250_pm,

2630

.pm = serial8250_pm,

2630

.type = serial8250_type,

2631

.type = serial8250_type,

2631

.release_port = serial8250_release_port,

2632

.release_port = serial8250_release_port,

2632

.request_port = serial8250_request_port,

2633

.request_port = serial8250_request_port,

2633

.config_port = serial8250_config_port,

2634

.config_port = serial8250_config_port,

2634

.verify_port = serial8250_verify_port,

2635

.verify_port = serial8250_verify_port,

2635

#ifdef CONFIG_CONSOLE_POLL

2636

#ifdef CONFIG_CONSOLE_POLL

2636

.poll_get_char = serial8250_get_poll_char,

2637

.poll_get_char = serial8250_get_poll_char,

2637

.poll_put_char = serial8250_put_poll_char,

2638

.poll_put_char = serial8250_put_poll_char,

2638

#endif

2639

#endif

2639

};

2640

};

2640

2641

static struct uart_8250_port serial8250_ports[UART_NR];

2642

static struct uart_8250_port serial8250_ports[UART_NR];

2642

2643

static void __init serial8250_isa_init_ports(void)

2644

static void __init serial8250_isa_init_ports(void)

2644

{

2645

{

2645

struct uart_8250_port *up;

2646

struct uart_8250_port *up;

2646

static int first = 1;

2647

static int first = 1;

2647

int i, irqflag = 0;

2648

int i, irqflag = 0;

2648

2649

if (!first)

2650

if (!first)

2650

return;

2651

return;

2651

first = 0;

2652

first = 0;

2652

2653

for (i = 0; i < nr_uarts; i++) {

2654

for (i = 0; i < nr_uarts; i++) {

2654

struct uart_8250_port *up = &serial8250_ports[i];

2655

struct uart_8250_port *up = &serial8250_ports[i];

2655

2656

up->port.line = i;

2657

up->port.line = i;

2657

spin_lock_init(&up->port.lock);

2658

spin_lock_init(&up->port.lock);

2658

2659

init_timer(&up->timer);

2660

init_timer(&up->timer);

2660

up->timer.function = serial8250_timeout;

2661

up->timer.function = serial8250_timeout;

2661

2662

/*

2663

/*

2663

* ALPHA_KLUDGE_MCR needs to be killed.

2664

* ALPHA_KLUDGE_MCR needs to be killed.

2664

*/

2665

*/

2665

up->mcr_mask = ~ALPHA_KLUDGE_MCR;

2666

up->mcr_mask = ~ALPHA_KLUDGE_MCR;

2666

up->mcr_force = ALPHA_KLUDGE_MCR;

2667

up->mcr_force = ALPHA_KLUDGE_MCR;

2667

2668

up->port.ops = &serial8250_pops;

2669

up->port.ops = &serial8250_pops;

2669

}

2670

}

2670

2671

if (share_irqs)

2672

if (share_irqs)

2672

irqflag = IRQF_SHARED;

2673

irqflag = IRQF_SHARED;

2673

2674

for (i = 0, up = serial8250_ports;

2675

for (i = 0, up = serial8250_ports;

2675

i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;

2676

i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;

2676

i++, up++) {

2677

i++, up++) {

2677

up->port.iobase = old_serial_port[i].port;

2678

up->port.iobase = old_serial_port[i].port;

2678

up->port.irq = irq_canonicalize(old_serial_port[i].irq);

2679

up->port.irq = irq_canonicalize(old_serial_port[i].irq);

2679

up->port.irqflags = old_serial_port[i].irqflags;

2680

up->port.irqflags = old_serial_port[i].irqflags;

2680

up->port.uartclk = old_serial_port[i].baud_base * 16;

2681

up->port.uartclk = old_serial_port[i].baud_base * 16;

2681

up->port.flags = old_serial_port[i].flags;

2682

up->port.flags = old_serial_port[i].flags;

2682

up->port.hub6 = old_serial_port[i].hub6;

2683

up->port.hub6 = old_serial_port[i].hub6;

2683

up->port.membase = old_serial_port[i].iomem_base;

2684

up->port.membase = old_serial_port[i].iomem_base;

2684

up->port.iotype = old_serial_port[i].io_type;

2685

up->port.iotype = old_serial_port[i].io_type;

2685

up->port.regshift = old_serial_port[i].iomem_reg_shift;

2686

up->port.regshift = old_serial_port[i].iomem_reg_shift;

2686

set_io_from_upio(&up->port);

2687

set_io_from_upio(&up->port);

2687

up->port.irqflags |= irqflag;

2688

up->port.irqflags |= irqflag;

2688

}

2689

}

2689

}

2690

}

2690

2691

static void __init

2692

static void __init

2692

serial8250_register_ports(struct uart_driver *drv, struct device *dev)

2693

serial8250_register_ports(struct uart_driver *drv, struct device *dev)

2693

{

2694

{

2694

int i;

2695

int i;

2695

2696

for (i = 0; i < nr_uarts; i++) {

2697

for (i = 0; i < nr_uarts; i++) {

2697

struct uart_8250_port *up = &serial8250_ports[i];

2698

struct uart_8250_port *up = &serial8250_ports[i];

2698

up->cur_iotype = 0xFF;

2699

up->cur_iotype = 0xFF;

2699

}

2700

}

2700

2701

serial8250_isa_init_ports();

2702

serial8250_isa_init_ports();

2702

2703

for (i = 0; i < nr_uarts; i++) {

2704

for (i = 0; i < nr_uarts; i++) {

2704

struct uart_8250_port *up = &serial8250_ports[i];

2705

struct uart_8250_port *up = &serial8250_ports[i];

2705

2706

up->port.dev = dev;

2707

up->port.dev = dev;

2707

uart_add_one_port(drv, &up->port);

2708

uart_add_one_port(drv, &up->port);

2708

}

2709

}

2709

}

2710

}

2710

2711

#ifdef CONFIG_SERIAL_8250_CONSOLE

2712

#ifdef CONFIG_SERIAL_8250_CONSOLE

2712

2713

static void serial8250_console_putchar(struct uart_port *port, int ch)

2714

static void serial8250_console_putchar(struct uart_port *port, int ch)

2714

{

2715

{

2715

struct uart_8250_port *up = (struct uart_8250_port *)port;

2716

struct uart_8250_port *up = (struct uart_8250_port *)port;

2716

2717

wait_for_xmitr(up, UART_LSR_THRE);

2718

wait_for_xmitr(up, UART_LSR_THRE);

2718

serial_out(up, UART_TX, ch);

2719

serial_out(up, UART_TX, ch);

2719

}

2720

}

2720

2721

/*

2722

/*

2722

* Print a string to the serial port trying not to disturb

2723

* Print a string to the serial port trying not to disturb

2723

* any possible real use of the port...

2724

* any possible real use of the port...

2724

*

2725

*

2725

* The console_lock must be held when we get here.

2726

* The console_lock must be held when we get here.

2726

*/

2727

*/

2727

static void

2728

static void

2728

serial8250_console_write(struct console *co, const char *s, unsigned int count)

2729

serial8250_console_write(struct console *co, const char *s, unsigned int count)

2729

{

2730

{

2730

struct uart_8250_port *up = &serial8250_ports[co->index];

2731

struct uart_8250_port *up = &serial8250_ports[co->index];

2731

unsigned long flags;

2732

unsigned long flags;

2732

unsigned int ier;

2733

unsigned int ier;

2733

int locked = 1;

2734

int locked = 1;

2734

2735

touch_nmi_watchdog();

2736

touch_nmi_watchdog();

2736

2737

local_irq_save(flags);

2738

local_irq_save(flags);

2738

if (up->port.sysrq) {

2739

if (up->port.sysrq) {

2739

/* serial8250_handle_port() already took the lock */

2740

/* serial8250_handle_port() already took the lock */

2740

locked = 0;

2741

locked = 0;

2741

} else if (oops_in_progress) {

2742

} else if (oops_in_progress) {

2742

locked = spin_trylock(&up->port.lock);

2743

locked = spin_trylock(&up->port.lock);

2743

} else

2744

} else

2744

spin_lock(&up->port.lock);

2745

spin_lock(&up->port.lock);

2745

2746

/*

2747

/*

2747

* First save the IER then disable the interrupts

2748

* First save the IER then disable the interrupts

2748

*/

2749

*/

2749

ier = serial_in(up, UART_IER);

2750

ier = serial_in(up, UART_IER);

2750

2751

if (up->capabilities & UART_CAP_UUE)

2752

if (up->capabilities & UART_CAP_UUE)

2752

serial_out(up, UART_IER, UART_IER_UUE);

2753

serial_out(up, UART_IER, UART_IER_UUE);

2753

else

2754

else

2754

serial_out(up, UART_IER, 0);

2755

serial_out(up, UART_IER, 0);

2755

2756

uart_console_write(&up->port, s, count, serial8250_console_putchar);

2757

uart_console_write(&up->port, s, count, serial8250_console_putchar);

2757

2758

/*

2759

/*

2759

* Finally, wait for transmitter to become empty

2760

* Finally, wait for transmitter to become empty

2760

* and restore the IER

2761

* and restore the IER

2761

*/

2762

*/

2762

wait_for_xmitr(up, BOTH_EMPTY);

2763

wait_for_xmitr(up, BOTH_EMPTY);

2763

serial_out(up, UART_IER, ier);

2764

serial_out(up, UART_IER, ier);

2764

2765

/*

2766

/*

2766

* The receive handling will happen properly because the

2767

* The receive handling will happen properly because the

2767

* receive ready bit will still be set; it is not cleared

2768

* receive ready bit will still be set; it is not cleared

2768

* on read. However, modem control will not, we must

2769

* on read. However, modem control will not, we must

2769

* call it if we have saved something in the saved flags

2770

* call it if we have saved something in the saved flags

2770

* while processing with interrupts off.

2771

* while processing with interrupts off.

2771

*/

2772

*/

2772

if (up->msr_saved_flags)

2773

if (up->msr_saved_flags)

2773

check_modem_status(up);

2774

check_modem_status(up);

2774

2775

if (locked)

2776

if (locked)

2776

spin_unlock(&up->port.lock);

2777

spin_unlock(&up->port.lock);

2777

local_irq_restore(flags);

2778

local_irq_restore(flags);

2778

}

2779

}

2779

2780

static int __init serial8250_console_setup(struct console *co, char *options)

2781

static int __init serial8250_console_setup(struct console *co, char *options)

2781

{

2782

{

2782

struct uart_port *port;

2783

struct uart_port *port;

2783

int baud = 9600;

2784

int baud = 9600;

2784

int bits = 8;

2785

int bits = 8;

2785

int parity = 'n';

2786

int parity = 'n';

2786

int flow = 'n';

2787

int flow = 'n';

2787

2788

/*

2789

/*

2789

* Check whether an invalid uart number has been specified, and

2790

* Check whether an invalid uart number has been specified, and

2790

* if so, search for the first available port that does have

2791

* if so, search for the first available port that does have

2791

* console support.

2792

* console support.

2792

*/

2793

*/

2793

if (co->index >= nr_uarts)

2794

if (co->index >= nr_uarts)

2794

co->index = 0;

2795

co->index = 0;

2795

port = &serial8250_ports[co->index].port;

2796

port = &serial8250_ports[co->index].port;

2796

if (!port->iobase && !port->membase)

2797

if (!port->iobase && !port->membase)

2797

return -ENODEV;

2798

return -ENODEV;

2798

2799

if (options)

2800

if (options)

2800

uart_parse_options(options, &baud, &parity, &bits, &flow);

2801

uart_parse_options(options, &baud, &parity, &bits, &flow);

2801

2802

return uart_set_options(port, co, baud, parity, bits, flow);

2803

return uart_set_options(port, co, baud, parity, bits, flow);

2803

}

2804

}

2804

2805

static int serial8250_console_early_setup(void)

2806

static int serial8250_console_early_setup(void)

2806

{

2807

{

2807

return serial8250_find_port_for_earlycon();

2808

return serial8250_find_port_for_earlycon();

2808

}

2809

}

2809

2810

static struct console serial8250_console = {

2811

static struct console serial8250_console = {

2811

.name = "ttyS",

2812

.name = "ttyS",

2812

.write = serial8250_console_write,

2813

.write = serial8250_console_write,

2813

.device = uart_console_device,

2814

.device = uart_console_device,

2814

.setup = serial8250_console_setup,

2815

.setup = serial8250_console_setup,

2815

.early_setup = serial8250_console_early_setup,

2816

.early_setup = serial8250_console_early_setup,

2816

.flags = CON_PRINTBUFFER,

2817

.flags = CON_PRINTBUFFER,

2817

.index = -1,

2818

.index = -1,

2818

.data = &serial8250_reg,

2819

.data = &serial8250_reg,

2819

};

2820

};

2820

2821

static int __init serial8250_console_init(void)

2822

static int __init serial8250_console_init(void)

2822

{

2823

{

2823

if (nr_uarts > UART_NR)

2824

if (nr_uarts > UART_NR)

2824

nr_uarts = UART_NR;

2825

nr_uarts = UART_NR;

2825

2826

serial8250_isa_init_ports();

2827

serial8250_isa_init_ports();

2827

register_console(&serial8250_console);

2828

register_console(&serial8250_console);

2828

return 0;

2829

return 0;

2829

}

2830

}

2830

console_initcall(serial8250_console_init);

2831

console_initcall(serial8250_console_init);

2831

2832

int serial8250_find_port(struct uart_port *p)

2833

int serial8250_find_port(struct uart_port *p)

2833

{

2834

{

2834

int line;

2835

int line;

2835

struct uart_port *port;

2836

struct uart_port *port;

2836

2837

for (line = 0; line < nr_uarts; line++) {

2838

for (line = 0; line < nr_uarts; line++) {

2838

port = &serial8250_ports[line].port;

2839

port = &serial8250_ports[line].port;

2839

if (uart_match_port(p, port))

2840

if (uart_match_port(p, port))

2840

return line;

2841

return line;

2841

}

2842

}

2842

return -ENODEV;

2843

return -ENODEV;

2843

}

2844

}

2844

2845

#define SERIAL8250_CONSOLE &serial8250_console

2846

#define SERIAL8250_CONSOLE &serial8250_console

2846

#else

2847

#else

2847

#define SERIAL8250_CONSOLE NULL

2848

#define SERIAL8250_CONSOLE NULL

2848

#endif

2849

#endif

2849

2850

static struct uart_driver serial8250_reg = {

2851

static struct uart_driver serial8250_reg = {

2851

.owner = THIS_MODULE,

2852

.owner = THIS_MODULE,

2852

.driver_name = "serial",

2853

.driver_name = "serial",

2853

.dev_name = "ttyS",

2854

.dev_name = "ttyS",

2854

.major = TTY_MAJOR,

2855

.major = TTY_MAJOR,

2855

.minor = 64,

2856

.minor = 64,

2856

.cons = SERIAL8250_CONSOLE,

2857

.cons = SERIAL8250_CONSOLE,

2857

};

2858

};

2858

2859

/*

2860

/*

2860

* early_serial_setup - early registration for 8250 ports

2861

* early_serial_setup - early registration for 8250 ports

2861

*

2862

*

2862

* Setup an 8250 port structure prior to console initialisation. Use

2863

* Setup an 8250 port structure prior to console initialisation. Use

2863

* after console initialisation will cause undefined behaviour.

2864

* after console initialisation will cause undefined behaviour.

2864

*/

2865

*/

2865

int __init early_serial_setup(struct uart_port *port)

2866

int __init early_serial_setup(struct uart_port *port)

2866

{

2867

{

2867

struct uart_port *p;

2868

struct uart_port *p;

2868

2869

if (port->line >= ARRAY_SIZE(serial8250_ports))

2870

if (port->line >= ARRAY_SIZE(serial8250_ports))

2870

return -ENODEV;

2871

return -ENODEV;

2871

2872

serial8250_isa_init_ports();

2873

serial8250_isa_init_ports();

2873

p = &serial8250_ports[port->line].port;

2874

p = &serial8250_ports[port->line].port;

2874

p->iobase = port->iobase;

2875

p->iobase = port->iobase;

2875

p->membase = port->membase;

2876

p->membase = port->membase;

2876

p->irq = port->irq;

2877

p->irq = port->irq;

2877

p->irqflags = port->irqflags;

2878

p->irqflags = port->irqflags;

2878

p->uartclk = port->uartclk;

2879

p->uartclk = port->uartclk;

2879

p->fifosize = port->fifosize;

2880

p->fifosize = port->fifosize;

2880

p->regshift = port->regshift;

2881

p->regshift = port->regshift;

2881

p->iotype = port->iotype;

2882

p->iotype = port->iotype;

2882

p->flags = port->flags;

2883

p->flags = port->flags;

2883

p->mapbase = port->mapbase;

2884

p->mapbase = port->mapbase;

2884

p->private_data = port->private_data;

2885

p->private_data = port->private_data;

2885

p->type = port->type;

2886

p->type = port->type;

2886

p->line = port->line;

2887

p->line = port->line;

2887

2888

set_io_from_upio(p);

2889

set_io_from_upio(p);

2889

if (port->serial_in)

2890

if (port->serial_in)

2890

p->serial_in = port->serial_in;

2891

p->serial_in = port->serial_in;

2891

if (port->serial_out)

2892

if (port->serial_out)

2892

p->serial_out = port->serial_out;

2893

p->serial_out = port->serial_out;

2893

2894

return 0;

2895

return 0;

2895

}

2896

}

2896

2897

/**

2898

/**

2898

* serial8250_suspend_port - suspend one serial port

2899

* serial8250_suspend_port - suspend one serial port

2899

* @line: serial line number

2900

* @line: serial line number

2900

*

2901

*

2901

* Suspend one serial port.

2902

* Suspend one serial port.

2902

*/

2903

*/

2903

void serial8250_suspend_port(int line)

2904

void serial8250_suspend_port(int line)

2904

{

2905

{

2905

uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);

2906

uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);

2906

}

2907

}

2907

2908

/**

2909

/**

2909

* serial8250_resume_port - resume one serial port

2910

* serial8250_resume_port - resume one serial port

2910

* @line: serial line number

2911

* @line: serial line number

2911

*

2912

*

2912

* Resume one serial port.

2913

* Resume one serial port.

2913

*/

2914

*/

2914

void serial8250_resume_port(int line)

2915

void serial8250_resume_port(int line)

2915

{

2916

{

2916

struct uart_8250_port *up = &serial8250_ports[line];

2917

struct uart_8250_port *up = &serial8250_ports[line];

2917

2918

if (up->capabilities & UART_NATSEMI) {

2919

if (up->capabilities & UART_NATSEMI) {

2919

unsigned char tmp;

2920

unsigned char tmp;

2920

2921

/* Ensure it's still in high speed mode */

2922

/* Ensure it's still in high speed mode */

2922

serial_outp(up, UART_LCR, 0xE0);

2923

serial_outp(up, UART_LCR, 0xE0);

2923

2924

tmp = serial_in(up, 0x04); /* EXCR2 */

2925

tmp = serial_in(up, 0x04); /* EXCR2 */

2925

tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */

2926

tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */

2926

tmp |= 0x10; /* 1.625 divisor for baud_base --> 921600 */

2927

tmp |= 0x10; /* 1.625 divisor for baud_base --> 921600 */

2927

serial_outp(up, 0x04, tmp);

2928

serial_outp(up, 0x04, tmp);

2928

2929

serial_outp(up, UART_LCR, 0);

2930

serial_outp(up, UART_LCR, 0);

2930

}

2931

}

2931

uart_resume_port(&serial8250_reg, &up->port);

2932

uart_resume_port(&serial8250_reg, &up->port);

2932

}

2933

}

2933

2934

/*

2935

/*

2935

* Register a set of serial devices attached to a platform device. The

2936

* Register a set of serial devices attached to a platform device. The

2936

* list is terminated with a zero flags entry, which means we expect

2937

* list is terminated with a zero flags entry, which means we expect

2937

* all entries to have at least UPF_BOOT_AUTOCONF set.

2938

* all entries to have at least UPF_BOOT_AUTOCONF set.

2938

*/

2939

*/

2939

static int __devinit serial8250_probe(struct platform_device *dev)

2940

static int __devinit serial8250_probe(struct platform_device *dev)

2940

{

2941

{

2941

struct plat_serial8250_port *p = dev->dev.platform_data;

2942

struct plat_serial8250_port *p = dev->dev.platform_data;

2942

struct uart_port port;

2943

struct uart_port port;

2943

int ret, i, irqflag = 0;

2944

int ret, i, irqflag = 0;

2944

2945

memset(&port, 0, sizeof(struct uart_port));

2946

memset(&port, 0, sizeof(struct uart_port));

2946

2947

if (share_irqs)

2948

if (share_irqs)

2948

irqflag = IRQF_SHARED;

2949

irqflag = IRQF_SHARED;

2949

2950

for (i = 0; p && p->flags != 0; p++, i++) {

2951

for (i = 0; p && p->flags != 0; p++, i++) {

2951

port.iobase = p->iobase;

2952

port.iobase = p->iobase;

2952

port.membase = p->membase;

2953

port.membase = p->membase;

2953

port.irq = p->irq;

2954

port.irq = p->irq;

2954

port.irqflags = p->irqflags;

2955

port.irqflags = p->irqflags;

2955

port.uartclk = p->uartclk;

2956

port.uartclk = p->uartclk;

2956

port.regshift = p->regshift;

2957

port.regshift = p->regshift;

2957

port.iotype = p->iotype;

2958

port.iotype = p->iotype;

2958

port.flags = p->flags;

2959

port.flags = p->flags;

2959

port.mapbase = p->mapbase;

2960

port.mapbase = p->mapbase;

2960

port.hub6 = p->hub6;

2961

port.hub6 = p->hub6;

2961

port.private_data = p->private_data;

2962

port.private_data = p->private_data;

2962

port.type = p->type;

2963

port.type = p->type;

2963

port.serial_in = p->serial_in;

2964

port.serial_in = p->serial_in;

2964

port.serial_out = p->serial_out;

2965

port.serial_out = p->serial_out;

2965

port.dev = &dev->dev;

2966

port.dev = &dev->dev;

2966

port.irqflags |= irqflag;

2967

port.irqflags |= irqflag;

2967

ret = serial8250_register_port(&port);

2968

ret = serial8250_register_port(&port);

2968

if (ret < 0) {

2969

if (ret < 0) {

2969

dev_err(&dev->dev, "unable to register port at index %d "

2970

dev_err(&dev->dev, "unable to register port at index %d "

2970

"(IO%lx MEM%llx IRQ%d): %d\n", i,

2971

"(IO%lx MEM%llx IRQ%d): %d\n", i,

2971

p->iobase, (unsigned long long)p->mapbase,

2972

p->iobase, (unsigned long long)p->mapbase,

2972

p->irq, ret);

2973

p->irq, ret);

2973

}

2974

}

2974

}

2975

}

2975

return 0;

2976

return 0;

2976

}

2977

}

2977

2978

/*

2979

/*

2979

* Remove serial ports registered against a platform device.

2980

* Remove serial ports registered against a platform device.

2980

*/

2981

*/

2981

static int __devexit serial8250_remove(struct platform_device *dev)

2982

static int __devexit serial8250_remove(struct platform_device *dev)

2982

{

2983

{

2983

int i;

2984

int i;

2984

2985

for (i = 0; i < nr_uarts; i++) {

2986

for (i = 0; i < nr_uarts; i++) {

2986

struct uart_8250_port *up = &serial8250_ports[i];

2987

struct uart_8250_port *up = &serial8250_ports[i];

2987

2988

if (up->port.dev == &dev->dev)

2989

if (up->port.dev == &dev->dev)

2989

serial8250_unregister_port(i);

2990

serial8250_unregister_port(i);

2990

}

2991

}

2991

return 0;

2992

return 0;

2992

}

2993

}

2993

2994

static int serial8250_suspend(struct platform_device *dev, pm_message_t state)

2995

static int serial8250_suspend(struct platform_device *dev, pm_message_t state)

2995

{

2996

{

2996

int i;

2997

int i;

2997

2998

for (i = 0; i < UART_NR; i++) {

2999

for (i = 0; i < UART_NR; i++) {

2999

struct uart_8250_port *up = &serial8250_ports[i];

3000

struct uart_8250_port *up = &serial8250_ports[i];

3000

3001

if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)

3002

if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)

3002

uart_suspend_port(&serial8250_reg, &up->port);

3003

uart_suspend_port(&serial8250_reg, &up->port);

3003

}

3004

}

3004

3005

return 0;

3006

return 0;

3006

}

3007

}

3007

3008

static int serial8250_resume(struct platform_device *dev)

3009

static int serial8250_resume(struct platform_device *dev)

3009

{

3010

{

3010

int i;

3011

int i;

3011

3012

for (i = 0; i < UART_NR; i++) {

3013

for (i = 0; i < UART_NR; i++) {

3013

struct uart_8250_port *up = &serial8250_ports[i];

3014

struct uart_8250_port *up = &serial8250_ports[i];

3014

3015

if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)

3016

if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)

3016

serial8250_resume_port(i);

3017

serial8250_resume_port(i);

3017

}

3018

}

3018

3019

return 0;

3020

return 0;

3020

}

3021

}

3021

3022

static struct platform_driver serial8250_isa_driver = {

3023

static struct platform_driver serial8250_isa_driver = {

3023

.probe = serial8250_probe,

3024

.probe = serial8250_probe,

3024

.remove = __devexit_p(serial8250_remove),

3025

.remove = __devexit_p(serial8250_remove),

3025

.suspend = serial8250_suspend,

3026

.suspend = serial8250_suspend,

3026

.resume = serial8250_resume,

3027

.resume = serial8250_resume,

3027

.driver = {

3028

.driver = {

3028

.name = "serial8250",

3029

.name = "serial8250",

3029

.owner = THIS_MODULE,

3030

.owner = THIS_MODULE,

3030

},

3031

},

3031

};

3032

};

3032

3033

/*

3034

/*

3034

* This "device" covers _all_ ISA 8250-compatible serial devices listed

3035

* This "device" covers _all_ ISA 8250-compatible serial devices listed

3035

* in the table in include/asm/serial.h

3036

* in the table in include/asm/serial.h

3036

*/

3037

*/

3037

static struct platform_device *serial8250_isa_devs;

3038

static struct platform_device *serial8250_isa_devs;

3038

3039

/*

3040

/*

3040

* serial8250_register_port and serial8250_unregister_port allows for

3041

* serial8250_register_port and serial8250_unregister_port allows for

3041

* 16x50 serial ports to be configured at run-time, to support PCMCIA

3042

* 16x50 serial ports to be configured at run-time, to support PCMCIA

3042

* modems and PCI multiport cards.

3043

* modems and PCI multiport cards.

3043

*/

3044

*/

3044

static DEFINE_MUTEX(serial_mutex);

3045

static DEFINE_MUTEX(serial_mutex);

3045

3046

static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)

3047

static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)

3047

{

3048

{

3048

int i;

3049

int i;

3049

3050

/*

3051

/*

3051

* First, find a port entry which matches.

3052

* First, find a port entry which matches.

3052

*/

3053

*/

3053

for (i = 0; i < nr_uarts; i++)

3054

for (i = 0; i < nr_uarts; i++)

3054

if (uart_match_port(&serial8250_ports[i].port, port))

3055

if (uart_match_port(&serial8250_ports[i].port, port))

3055

return &serial8250_ports[i];

3056

return &serial8250_ports[i];

3056

3057

/*

3058

/*

3058

* We didn't find a matching entry, so look for the first

3059

* We didn't find a matching entry, so look for the first

3059

* free entry. We look for one which hasn't been previously

3060

* free entry. We look for one which hasn't been previously

3060

* used (indicated by zero iobase).

3061

* used (indicated by zero iobase).

3061

*/

3062

*/

3062

for (i = 0; i < nr_uarts; i++)

3063

for (i = 0; i < nr_uarts; i++)

3063

if (serial8250_ports[i].port.type == PORT_UNKNOWN &&

3064

if (serial8250_ports[i].port.type == PORT_UNKNOWN &&

3064

serial8250_ports[i].port.iobase == 0)

3065

serial8250_ports[i].port.iobase == 0)

3065

return &serial8250_ports[i];

3066

return &serial8250_ports[i];

3066

3067

/*

3068

/*

3068

* That also failed. Last resort is to find any entry which

3069

* That also failed. Last resort is to find any entry which

3069

* doesn't have a real port associated with it.

3070

* doesn't have a real port associated with it.

3070

*/

3071

*/

3071

for (i = 0; i < nr_uarts; i++)

3072

for (i = 0; i < nr_uarts; i++)

3072

if (serial8250_ports[i].port.type == PORT_UNKNOWN)

3073

if (serial8250_ports[i].port.type == PORT_UNKNOWN)

3073

return &serial8250_ports[i];

3074

return &serial8250_ports[i];

3074

3075

return NULL;

3076

return NULL;

3076

}

3077

}

3077

3078

/**

3079

/**

3079

* serial8250_register_port - register a serial port

3080

* serial8250_register_port - register a serial port

3080

* @port: serial port template

3081

* @port: serial port template

3081

*

3082

*

3082

* Configure the serial port specified by the request. If the

3083

* Configure the serial port specified by the request. If the

3083

* port exists and is in use, it is hung up and unregistered

3084

* port exists and is in use, it is hung up and unregistered

3084

* first.

3085

* first.

3085

*

3086

*

3086

* The port is then probed and if necessary the IRQ is autodetected

3087

* The port is then probed and if necessary the IRQ is autodetected

3087

* If this fails an error is returned.

3088

* If this fails an error is returned.

3088

*

3089

*

3089

* On success the port is ready to use and the line number is returned.

3090

* On success the port is ready to use and the line number is returned.

3090

*/

3091

*/

3091

int serial8250_register_port(struct uart_port *port)

3092

int serial8250_register_port(struct uart_port *port)

3092

{

3093

{

3093

struct uart_8250_port *uart;

3094

struct uart_8250_port *uart;

3094

int ret = -ENOSPC;

3095

int ret = -ENOSPC;

3095

3096

if (port->uartclk == 0)

3097

if (port->uartclk == 0)

3097

return -EINVAL;

3098

return -EINVAL;

3098

3099

mutex_lock(&serial_mutex);

3100

mutex_lock(&serial_mutex);

3100

3101

uart = serial8250_find_match_or_unused(port);

3102

uart = serial8250_find_match_or_unused(port);

3102

if (uart) {

3103

if (uart) {

3103

uart_remove_one_port(&serial8250_reg, &uart->port);

3104

uart_remove_one_port(&serial8250_reg, &uart->port);

3104

3105

uart->port.iobase = port->iobase;

3106

uart->port.iobase = port->iobase;

3106

uart->port.membase = port->membase;

3107

uart->port.membase = port->membase;

3107

uart->port.irq = port->irq;

3108

uart->port.irq = port->irq;

3108

uart->port.irqflags = port->irqflags;

3109

uart->port.irqflags = port->irqflags;

3109

uart->port.uartclk = port->uartclk;

3110

uart->port.uartclk = port->uartclk;

3110

uart->port.fifosize = port->fifosize;

3111

uart->port.fifosize = port->fifosize;

3111

uart->port.regshift = port->regshift;

3112

uart->port.regshift = port->regshift;

3112

uart->port.iotype = port->iotype;

3113

uart->port.iotype = port->iotype;

3113

uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;

3114

uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;

3114

uart->port.mapbase = port->mapbase;

3115

uart->port.mapbase = port->mapbase;

3115

uart->port.private_data = port->private_data;

3116

uart->port.private_data = port->private_data;

3116

if (port->dev)

3117

if (port->dev)

3117

uart->port.dev = port->dev;

3118

uart->port.dev = port->dev;

3118

3119

if (port->flags & UPF_FIXED_TYPE) {

3120

if (port->flags & UPF_FIXED_TYPE) {

3120

uart->port.type = port->type;

3121

uart->port.type = port->type;

3121

uart->port.fifosize = uart_config[port->type].fifo_size;

3122

uart->port.fifosize = uart_config[port->type].fifo_size;

3122

uart->capabilities = uart_config[port->type].flags;

3123

uart->capabilities = uart_config[port->type].flags;

3123

uart->tx_loadsz = uart_config[port->type].tx_loadsz;

3124

uart->tx_loadsz = uart_config[port->type].tx_loadsz;

3124

}

3125

}

3125

3126

set_io_from_upio(&uart->port);

3127

set_io_from_upio(&uart->port);

3127

/* Possibly override default I/O functions. */

3128

/* Possibly override default I/O functions. */

3128

if (port->serial_in)

3129

if (port->serial_in)

3129

uart->port.serial_in = port->serial_in;

3130

uart->port.serial_in = port->serial_in;

3130

if (port->serial_out)

3131

if (port->serial_out)

3131

uart->port.serial_out = port->serial_out;

3132

uart->port.serial_out = port->serial_out;

3132

3133

ret = uart_add_one_port(&serial8250_reg, &uart->port);

3134

ret = uart_add_one_port(&serial8250_reg, &uart->port);

3134

if (ret == 0)

3135

if (ret == 0)

3135

ret = uart->port.line;

3136

ret = uart->port.line;

3136

}

3137

}

3137

mutex_unlock(&serial_mutex);

3138

mutex_unlock(&serial_mutex);

3138

3139

return ret;

3140

return ret;

3140

}

3141

}

3141

EXPORT_SYMBOL(serial8250_register_port);

3142

EXPORT_SYMBOL(serial8250_register_port);

3142

3143

/**

3144

/**

3144

* serial8250_unregister_port - remove a 16x50 serial port at runtime

3145

* serial8250_unregister_port - remove a 16x50 serial port at runtime

3145

* @line: serial line number

3146

* @line: serial line number

3146

*

3147

*

3147

* Remove one serial port. This may not be called from interrupt

3148

* Remove one serial port. This may not be called from interrupt

3148

* context. We hand the port back to the our control.

3149

* context. We hand the port back to the our control.

3149

*/

3150

*/

3150

void serial8250_unregister_port(int line)

3151

void serial8250_unregister_port(int line)

3151

{

3152

{

3152

struct uart_8250_port *uart = &serial8250_ports[line];

3153

struct uart_8250_port *uart = &serial8250_ports[line];

3153

3154

mutex_lock(&serial_mutex);

3155

mutex_lock(&serial_mutex);

3155

uart_remove_one_port(&serial8250_reg, &uart->port);

3156

uart_remove_one_port(&serial8250_reg, &uart->port);

3156

if (serial8250_isa_devs) {

3157

if (serial8250_isa_devs) {

3157

uart->port.flags &= ~UPF_BOOT_AUTOCONF;

3158

uart->port.flags &= ~UPF_BOOT_AUTOCONF;

3158

uart->port.type = PORT_UNKNOWN;

3159

uart->port.type = PORT_UNKNOWN;

3159

uart->port.dev = &serial8250_isa_devs->dev;

3160

uart->port.dev = &serial8250_isa_devs->dev;

3160

uart_add_one_port(&serial8250_reg, &uart->port);

3161

uart_add_one_port(&serial8250_reg, &uart->port);

3161

} else {

3162

} else {

3162

uart->port.dev = NULL;

3163

uart->port.dev = NULL;

3163

}

3164

}

3164

mutex_unlock(&serial_mutex);

3165

mutex_unlock(&serial_mutex);

3165

}

3166

}

3166

EXPORT_SYMBOL(serial8250_unregister_port);

3167

EXPORT_SYMBOL(serial8250_unregister_port);

3167

3168

static int __init serial8250_init(void)

3169

static int __init serial8250_init(void)

3169

{

3170

{

3170

int ret;

3171

int ret;

3171

3172

if (nr_uarts > UART_NR)

3173

if (nr_uarts > UART_NR)

3173

nr_uarts = UART_NR;

3174

nr_uarts = UART_NR;

3174

3175

printk(KERN_INFO "Serial: 8250/16550 driver, "

3176

printk(KERN_INFO "Serial: 8250/16550 driver, "

3176

"%d ports, IRQ sharing %sabled\n", nr_uarts,

3177

"%d ports, IRQ sharing %sabled\n", nr_uarts,

3177

share_irqs ? "en" : "dis");

3178

share_irqs ? "en" : "dis");

3178

3179

#ifdef CONFIG_SPARC

3180

#ifdef CONFIG_SPARC

3180

ret = sunserial_register_minors(&serial8250_reg, UART_NR);

3181

ret = sunserial_register_minors(&serial8250_reg, UART_NR);

3181

#else

3182

#else

3182

serial8250_reg.nr = UART_NR;

3183

serial8250_reg.nr = UART_NR;

3183

ret = uart_register_driver(&serial8250_reg);

3184

ret = uart_register_driver(&serial8250_reg);

3184

#endif

3185

#endif

3185

if (ret)

3186

if (ret)

3186

goto out;

3187

goto out;

3187

3188

serial8250_isa_devs = platform_device_alloc("serial8250",

3189

serial8250_isa_devs = platform_device_alloc("serial8250",

3189

PLAT8250_DEV_LEGACY);

3190

PLAT8250_DEV_LEGACY);

3190

if (!serial8250_isa_devs) {

3191

if (!serial8250_isa_devs) {

3191

ret = -ENOMEM;

3192

ret = -ENOMEM;

3192

goto unreg_uart_drv;

3193

goto unreg_uart_drv;

3193

}

3194

}

3194

3195

ret = platform_device_add(serial8250_isa_devs);

3196

ret = platform_device_add(serial8250_isa_devs);

3196

if (ret)

3197

if (ret)

3197

goto put_dev;

3198

goto put_dev;

3198

3199

serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);

3200

serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);

3200

3201

ret = platform_driver_register(&serial8250_isa_driver);

3202

ret = platform_driver_register(&serial8250_isa_driver);

3202

if (ret == 0)

3203

if (ret == 0)

3203

goto out;

3204

goto out;

3204

3205

platform_device_del(serial8250_isa_devs);

3206

platform_device_del(serial8250_isa_devs);

3206

put_dev:

3207

put_dev:

3207

platform_device_put(serial8250_isa_devs);

3208

platform_device_put(serial8250_isa_devs);

3208

unreg_uart_drv:

3209

unreg_uart_drv:

3209

#ifdef CONFIG_SPARC

3210

#ifdef CONFIG_SPARC

3210

sunserial_unregister_minors(&serial8250_reg, UART_NR);

3211

sunserial_unregister_minors(&serial8250_reg, UART_NR);

3211

#else

3212

#else

3212

uart_unregister_driver(&serial8250_reg);

3213

uart_unregister_driver(&serial8250_reg);

3213

#endif

3214

#endif

3214

out:

3215

out:

3215

return ret;

3216

return ret;

3216

}

3217

}

3217

3218

static void __exit serial8250_exit(void)

3219

static void __exit serial8250_exit(void)

3219

{

3220

{

3220

struct platform_device *isa_dev = serial8250_isa_devs;

3221

struct platform_device *isa_dev = serial8250_isa_devs;

3221

3222

/*

3223

/*

3223

* This tells serial8250_unregister_port() not to re-register

3224

* This tells serial8250_unregister_port() not to re-register

3224

* the ports (thereby making serial8250_isa_driver permanently

3225

* the ports (thereby making serial8250_isa_driver permanently

3225

* in use.)

3226

* in use.)

3226

*/

3227

*/

3227

serial8250_isa_devs = NULL;

3228

serial8250_isa_devs = NULL;

3228

3229

platform_driver_unregister(&serial8250_isa_driver);

3230

platform_driver_unregister(&serial8250_isa_driver);

3230

platform_device_unregister(isa_dev);

3231

platform_device_unregister(isa_dev);

3231

3232

#ifdef CONFIG_SPARC

3233

#ifdef CONFIG_SPARC

3233

sunserial_unregister_minors(&serial8250_reg, UART_NR);

3234

sunserial_unregister_minors(&serial8250_reg, UART_NR);

3234

#else

3235

#else

3235

uart_unregister_driver(&serial8250_reg);

3236

uart_unregister_driver(&serial8250_reg);

3236

#endif

3237

#endif

3237

}

3238

}

3238

3239

module_init(serial8250_init);

3240

module_init(serial8250_init);

3240

module_exit(serial8250_exit);

3241

module_exit(serial8250_exit);

3241

3242

EXPORT_SYMBOL(serial8250_suspend_port);

3243

EXPORT_SYMBOL(serial8250_suspend_port);

3243

EXPORT_SYMBOL(serial8250_resume_port);

3244

EXPORT_SYMBOL(serial8250_resume_port);

3244

3245

MODULE_LICENSE("GPL");

3246

MODULE_LICENSE("GPL");

3246

MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");

3247

MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");

3247

3248

module_param(share_irqs, uint, 0644);

3249

module_param(share_irqs, uint, 0644);

3249

MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"

3250

MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"

3250

" (unsafe)");

3251

" (unsafe)");

3251

3252

module_param(nr_uarts, uint, 0644);

3253

module_param(nr_uarts, uint, 0644);

3253

MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");

3254

MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");

3254

3255

module_param(skip_txen_test, uint, 0644);

3256

module_param(skip_txen_test, uint, 0644);

3256

MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");

3257

MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");

3257

3258

#ifdef CONFIG_SERIAL_8250_RSA

3259

#ifdef CONFIG_SERIAL_8250_RSA

3259

module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);

3260

module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);

3260

MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");

3261

MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");

3261

#endif

3262

#endif

GITLAB

serial: 8250: add serial transmitter fully empty test

 /*
  *  linux/drivers/char/8250.c
  *
  *  Driver for 8250/16550-type serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  *
  *  Copyright (C) 2001 Russell King.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  *
  * A note about mapbase / membase
  *
  *  mapbase is the physical address of the IO port.
  *  membase is an 'ioremapped' cookie.
  */
 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
 #endif
 #include <linux/module.h>
 #include <linux/moduleparam.h>
 #include <linux/ioport.h>
 #include <linux/init.h>
 #include <linux/console.h>
 #include <linux/sysrq.h>
 #include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/tty.h>
 #include <linux/tty_flip.h>
 #include <linux/serial_reg.h>
 #include <linux/serial_core.h>
 #include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/nmi.h>
 #include <linux/mutex.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include "8250.h"
 #ifdef CONFIG_SPARC
 #include "suncore.h"
 #endif
 /*
  * Configuration:
  *   share_irqs - whether we pass IRQF_SHARED to request_irq().  This option
  *                is unsafe when used on edge-triggered interrupts.
  */
 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
 static struct uart_driver serial8250_reg;
 static int serial_index(struct uart_port *port)
 {
 	return (serial8250_reg.minor - 64) + port->line;
 }
 static unsigned int skip_txen_test; /* force skip of txen test at init time */
 /*
  * Debugging.
  */
 #if 0
 #define DEBUG_AUTOCONF(fmt...)	printk(fmt)
 #else
 #define DEBUG_AUTOCONF(fmt...)	do { } while (0)
 #endif
 #if 0
 #define DEBUG_INTR(fmt...)	printk(fmt)
 #else
 #define DEBUG_INTR(fmt...)	do { } while (0)
 #endif
 #define PASS_LIMIT	256
+#define BOTH_EMPTY 	(UART_LSR_TEMT | UART_LSR_THRE)
 /*
  * We default to IRQ0 for the "no irq" hack.   Some
  * machine types want others as well - they're free
  * to redefine this in their header file.
  */
 #define is_real_interrupt(irq)	((irq) != 0)
 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
 #define CONFIG_SERIAL_DETECT_IRQ 1
 #endif
 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
 #define CONFIG_SERIAL_MANY_PORTS 1
 #endif
 /*
  * HUB6 is always on.  This will be removed once the header
  * files have been cleaned.
  */
 #define CONFIG_HUB6 1
 #include <asm/serial.h>
 /*
  * SERIAL_PORT_DFNS tells us about built-in ports that have no
  * standard enumeration mechanism.   Platforms that can find all
  * serial ports via mechanisms like ACPI or PCI need not supply it.
  */
 #ifndef SERIAL_PORT_DFNS
 #define SERIAL_PORT_DFNS
 #endif
 static const struct old_serial_port old_serial_port[] = {
 	SERIAL_PORT_DFNS /* defined in asm/serial.h */
 };
 #define UART_NR	CONFIG_SERIAL_8250_NR_UARTS
 #ifdef CONFIG_SERIAL_8250_RSA
 #define PORT_RSA_MAX 4
 static unsigned long probe_rsa[PORT_RSA_MAX];
 static unsigned int probe_rsa_count;
 #endif /* CONFIG_SERIAL_8250_RSA  */
 struct uart_8250_port {
 	struct uart_port	port;
 	struct timer_list	timer;		/* "no irq" timer */
 	struct list_head	list;		/* ports on this IRQ */
 	unsigned short		capabilities;	/* port capabilities */
 	unsigned short		bugs;		/* port bugs */
 	unsigned int		tx_loadsz;	/* transmit fifo load size */
 	unsigned char		acr;
 	unsigned char		ier;
 	unsigned char		lcr;
 	unsigned char		mcr;
 	unsigned char		mcr_mask;	/* mask of user bits */
 	unsigned char		mcr_force;	/* mask of forced bits */
 	unsigned char		cur_iotype;	/* Running I/O type */
 	/*
 	 * Some bits in registers are cleared on a read, so they must
 	 * be saved whenever the register is read but the bits will not
 	 * be immediately processed.
 	 */
 #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
 	unsigned char		lsr_saved_flags;
 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
 	unsigned char		msr_saved_flags;
 	/*
 	 * We provide a per-port pm hook.
 	 */
 	void			(*pm)(struct uart_port *port,
 				      unsigned int state, unsigned int old);
 };
 struct irq_info {
 	struct			hlist_node node;
 	int			irq;
 	spinlock_t		lock;	/* Protects list not the hash */
 	struct list_head	*head;
 };
 #define NR_IRQ_HASH		32	/* Can be adjusted later */
 static struct hlist_head irq_lists[NR_IRQ_HASH];
 static DEFINE_MUTEX(hash_mutex);	/* Used to walk the hash */
 /*
  * Here we define the default xmit fifo size used for each type of UART.
  */
 static const struct serial8250_config uart_config[] = {
 	[PORT_UNKNOWN] = {
 		.name		= "unknown",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_8250] = {
 		.name		= "8250",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_16450] = {
 		.name		= "16450",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_16550] = {
 		.name		= "16550",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_16550A] = {
 		.name		= "16550A",
 		.fifo_size	= 16,
 		.tx_loadsz	= 16,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO,
 	},
 	[PORT_CIRRUS] = {
 		.name		= "Cirrus",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_16650] = {
 		.name		= "ST16650",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
 	},
 	[PORT_16650V2] = {
 		.name		= "ST16650V2",
 		.fifo_size	= 32,
 		.tx_loadsz	= 16,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
 				  UART_FCR_T_TRIG_00,
 		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
 	},
 	[PORT_16750] = {
 		.name		= "TI16750",
 		.fifo_size	= 64,
 		.tx_loadsz	= 64,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
 				  UART_FCR7_64BYTE,
 		.flags		= UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
 	},
 	[PORT_STARTECH] = {
 		.name		= "Startech",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_16C950] = {
 		.name		= "16C950/954",
 		.fifo_size	= 128,
 		.tx_loadsz	= 128,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO,
 	},
 	[PORT_16654] = {
 		.name		= "ST16654",
 		.fifo_size	= 64,
 		.tx_loadsz	= 32,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
 				  UART_FCR_T_TRIG_10,
 		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
 	},
 	[PORT_16850] = {
 		.name		= "XR16850",
 		.fifo_size	= 128,
 		.tx_loadsz	= 128,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
 	},
 	[PORT_RSA] = {
 		.name		= "RSA",
 		.fifo_size	= 2048,
 		.tx_loadsz	= 2048,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
 		.flags		= UART_CAP_FIFO,
 	},
 	[PORT_NS16550A] = {
 		.name		= "NS16550A",
 		.fifo_size	= 16,
 		.tx_loadsz	= 16,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO | UART_NATSEMI,
 	},
 	[PORT_XSCALE] = {
 		.name		= "XScale",
 		.fifo_size	= 32,
 		.tx_loadsz	= 32,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO | UART_CAP_UUE,
 	},
 	[PORT_RM9000] = {
 		.name		= "RM9000",
 		.fifo_size	= 16,
 		.tx_loadsz	= 16,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO,
 	},
 	[PORT_OCTEON] = {
 		.name		= "OCTEON",
 		.fifo_size	= 64,
 		.tx_loadsz	= 64,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO,
 	},
 	[PORT_AR7] = {
 		.name		= "AR7",
 		.fifo_size	= 16,
 		.tx_loadsz	= 16,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
 		.flags		= UART_CAP_FIFO | UART_CAP_AFE,
 	},
 };
 #if defined (CONFIG_SERIAL_8250_AU1X00)
 /* Au1x00 UART hardware has a weird register layout */
 static const u8 au_io_in_map[] = {
 	[UART_RX]  = 0,
 	[UART_IER] = 2,
 	[UART_IIR] = 3,
 	[UART_LCR] = 5,
 	[UART_MCR] = 6,
 	[UART_LSR] = 7,
 	[UART_MSR] = 8,
 };
 static const u8 au_io_out_map[] = {
 	[UART_TX]  = 1,
 	[UART_IER] = 2,
 	[UART_FCR] = 4,
 	[UART_LCR] = 5,
 	[UART_MCR] = 6,
 };
 /* sane hardware needs no mapping */
 static inline int map_8250_in_reg(struct uart_port *p, int offset)
 {
 	if (p->iotype != UPIO_AU)
 		return offset;
 	return au_io_in_map[offset];
 }
 static inline int map_8250_out_reg(struct uart_port *p, int offset)
 {
 	if (p->iotype != UPIO_AU)
 		return offset;
 	return au_io_out_map[offset];
 }
 #elif defined(CONFIG_SERIAL_8250_RM9K)
 static const u8
 	regmap_in[8] = {
 		[UART_RX]	= 0x00,
 		[UART_IER]	= 0x0c,
 		[UART_IIR]	= 0x14,
 		[UART_LCR]	= 0x1c,
 		[UART_MCR]	= 0x20,
 		[UART_LSR]	= 0x24,
 		[UART_MSR]	= 0x28,
 		[UART_SCR]	= 0x2c
 	},
 	regmap_out[8] = {
 		[UART_TX] 	= 0x04,
 		[UART_IER]	= 0x0c,
 		[UART_FCR]	= 0x18,
 		[UART_LCR]	= 0x1c,
 		[UART_MCR]	= 0x20,
 		[UART_LSR]	= 0x24,
 		[UART_MSR]	= 0x28,
 		[UART_SCR]	= 0x2c
 	};
 static inline int map_8250_in_reg(struct uart_port *p, int offset)
 {
 	if (p->iotype != UPIO_RM9000)
 		return offset;
 	return regmap_in[offset];
 }
 static inline int map_8250_out_reg(struct uart_port *p, int offset)
 {
 	if (p->iotype != UPIO_RM9000)
 		return offset;
 	return regmap_out[offset];
 }
 #else
 /* sane hardware needs no mapping */
 #define map_8250_in_reg(up, offset) (offset)
 #define map_8250_out_reg(up, offset) (offset)
 #endif
 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
 {
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	outb(p->hub6 - 1 + offset, p->iobase);
 	return inb(p->iobase + 1);
 }
 static void hub6_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	outb(p->hub6 - 1 + offset, p->iobase);
 	outb(value, p->iobase + 1);
 }
 static unsigned int mem_serial_in(struct uart_port *p, int offset)
 {
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	return readb(p->membase + offset);
 }
 static void mem_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	writeb(value, p->membase + offset);
 }
 static void mem32_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	writel(value, p->membase + offset);
 }
 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
 {
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	return readl(p->membase + offset);
 }
 #ifdef CONFIG_SERIAL_8250_AU1X00
 static unsigned int au_serial_in(struct uart_port *p, int offset)
 {
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	return __raw_readl(p->membase + offset);
 }
 static void au_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	__raw_writel(value, p->membase + offset);
 }
 #endif
 static unsigned int tsi_serial_in(struct uart_port *p, int offset)
 {
 	unsigned int tmp;
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	if (offset == UART_IIR) {
 		tmp = readl(p->membase + (UART_IIR & ~3));
 		return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
 	} else
 		return readb(p->membase + offset);
 }
 static void tsi_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	if (!((offset == UART_IER) && (value & UART_IER_UUE)))
 		writeb(value, p->membase + offset);
 }
 static void dwapb_serial_out(struct uart_port *p, int offset, int value)
 {
 	int save_offset = offset;
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	/* Save the LCR value so it can be re-written when a
 	 * Busy Detect interrupt occurs. */
 	if (save_offset == UART_LCR) {
 		struct uart_8250_port *up = (struct uart_8250_port *)p;
 		up->lcr = value;
 	}
 	writeb(value, p->membase + offset);
 	/* Read the IER to ensure any interrupt is cleared before
 	 * returning from ISR. */
 	if (save_offset == UART_TX || save_offset == UART_IER)
 		value = p->serial_in(p, UART_IER);
 }
 static unsigned int io_serial_in(struct uart_port *p, int offset)
 {
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	return inb(p->iobase + offset);
 }
 static void io_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	outb(value, p->iobase + offset);
 }
 static void set_io_from_upio(struct uart_port *p)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)p;
 	switch (p->iotype) {
 	case UPIO_HUB6:
 		p->serial_in = hub6_serial_in;
 		p->serial_out = hub6_serial_out;
 		break;
 	case UPIO_MEM:
 		p->serial_in = mem_serial_in;
 		p->serial_out = mem_serial_out;
 		break;
 	case UPIO_RM9000:
 	case UPIO_MEM32:
 		p->serial_in = mem32_serial_in;
 		p->serial_out = mem32_serial_out;
 		break;
 #ifdef CONFIG_SERIAL_8250_AU1X00
 	case UPIO_AU:
 		p->serial_in = au_serial_in;
 		p->serial_out = au_serial_out;
 		break;
 #endif
 	case UPIO_TSI:
 		p->serial_in = tsi_serial_in;
 		p->serial_out = tsi_serial_out;
 		break;
 	case UPIO_DWAPB:
 		p->serial_in = mem_serial_in;
 		p->serial_out = dwapb_serial_out;
 		break;
 	default:
 		p->serial_in = io_serial_in;
 		p->serial_out = io_serial_out;
 		break;
 	}
 	/* Remember loaded iotype */
 	up->cur_iotype = p->iotype;
 }
 static void
 serial_out_sync(struct uart_8250_port *up, int offset, int value)
 {
 	struct uart_port *p = &up->port;
 	switch (p->iotype) {
 	case UPIO_MEM:
 	case UPIO_MEM32:
 #ifdef CONFIG_SERIAL_8250_AU1X00
 	case UPIO_AU:
 #endif
 	case UPIO_DWAPB:
 		p->serial_out(p, offset, value);
 		p->serial_in(p, UART_LCR);	/* safe, no side-effects */
 		break;
 	default:
 		p->serial_out(p, offset, value);
 	}
 }
 #define serial_in(up, offset)		\
 	(up->port.serial_in(&(up)->port, (offset)))
 #define serial_out(up, offset, value)	\
 	(up->port.serial_out(&(up)->port, (offset), (value)))
 /*
  * We used to support using pause I/O for certain machines.  We
  * haven't supported this for a while, but just in case it's badly
  * needed for certain old 386 machines, I've left these #define's
  * in....
  */
 #define serial_inp(up, offset)		serial_in(up, offset)
 #define serial_outp(up, offset, value)	serial_out(up, offset, value)
 /* Uart divisor latch read */
 static inline int _serial_dl_read(struct uart_8250_port *up)
 {
 	return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
 }
 /* Uart divisor latch write */
 static inline void _serial_dl_write(struct uart_8250_port *up, int value)
 {
 	serial_outp(up, UART_DLL, value & 0xff);
 	serial_outp(up, UART_DLM, value >> 8 & 0xff);
 }
 #if defined(CONFIG_SERIAL_8250_AU1X00)
 /* Au1x00 haven't got a standard divisor latch */
 static int serial_dl_read(struct uart_8250_port *up)
 {
 	if (up->port.iotype == UPIO_AU)
 		return __raw_readl(up->port.membase + 0x28);
 	else
 		return _serial_dl_read(up);
 }
 static void serial_dl_write(struct uart_8250_port *up, int value)
 {
 	if (up->port.iotype == UPIO_AU)
 		__raw_writel(value, up->port.membase + 0x28);
 	else
 		_serial_dl_write(up, value);
 }
 #elif defined(CONFIG_SERIAL_8250_RM9K)
 static int serial_dl_read(struct uart_8250_port *up)
 {
 	return	(up->port.iotype == UPIO_RM9000) ?
 		(((__raw_readl(up->port.membase + 0x10) << 8) |
 		(__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
 		_serial_dl_read(up);
 }
 static void serial_dl_write(struct uart_8250_port *up, int value)
 {
 	if (up->port.iotype == UPIO_RM9000) {
 		__raw_writel(value, up->port.membase + 0x08);
 		__raw_writel(value >> 8, up->port.membase + 0x10);
 	} else {
 		_serial_dl_write(up, value);
 	}
 }
 #else
 #define serial_dl_read(up) _serial_dl_read(up)
 #define serial_dl_write(up, value) _serial_dl_write(up, value)
 #endif
 /*
  * For the 16C950
  */
 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
 {
 	serial_out(up, UART_SCR, offset);
 	serial_out(up, UART_ICR, value);
 }
 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
 {
 	unsigned int value;
 	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
 	serial_out(up, UART_SCR, offset);
 	value = serial_in(up, UART_ICR);
 	serial_icr_write(up, UART_ACR, up->acr);
 	return value;
 }
 /*
  * FIFO support.
  */
 static void serial8250_clear_fifos(struct uart_8250_port *p)
 {
 	if (p->capabilities & UART_CAP_FIFO) {
 		serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
 		serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
 			       UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 		serial_outp(p, UART_FCR, 0);
 	}
 }
 /*
  * IER sleep support.  UARTs which have EFRs need the "extended
  * capability" bit enabled.  Note that on XR16C850s, we need to
  * reset LCR to write to IER.
  */
 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
 {
 	if (p->capabilities & UART_CAP_SLEEP) {
 		if (p->capabilities & UART_CAP_EFR) {
 			serial_outp(p, UART_LCR, 0xBF);
 			serial_outp(p, UART_EFR, UART_EFR_ECB);
 			serial_outp(p, UART_LCR, 0);
 		}
 		serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
 		if (p->capabilities & UART_CAP_EFR) {
 			serial_outp(p, UART_LCR, 0xBF);
 			serial_outp(p, UART_EFR, 0);
 			serial_outp(p, UART_LCR, 0);
 		}
 	}
 }
 #ifdef CONFIG_SERIAL_8250_RSA
 /*
  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
  * We set the port uart clock rate if we succeed.
  */
 static int __enable_rsa(struct uart_8250_port *up)
 {
 	unsigned char mode;
 	int result;
 	mode = serial_inp(up, UART_RSA_MSR);
 	result = mode & UART_RSA_MSR_FIFO;
 	if (!result) {
 		serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
 		mode = serial_inp(up, UART_RSA_MSR);
 		result = mode & UART_RSA_MSR_FIFO;
 	}
 	if (result)
 		up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
 	return result;
 }
 static void enable_rsa(struct uart_8250_port *up)
 {
 	if (up->port.type == PORT_RSA) {
 		if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
 			spin_lock_irq(&up->port.lock);
 			__enable_rsa(up);
 			spin_unlock_irq(&up->port.lock);
 		}
 		if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
 			serial_outp(up, UART_RSA_FRR, 0);
 	}
 }
 /*
  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
  * It is unknown why interrupts were disabled in here.  However,
  * the caller is expected to preserve this behaviour by grabbing
  * the spinlock before calling this function.
  */
 static void disable_rsa(struct uart_8250_port *up)
 {
 	unsigned char mode;
 	int result;
 	if (up->port.type == PORT_RSA &&
 	    up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
 		spin_lock_irq(&up->port.lock);
 		mode = serial_inp(up, UART_RSA_MSR);
 		result = !(mode & UART_RSA_MSR_FIFO);
 		if (!result) {
 			serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
 			mode = serial_inp(up, UART_RSA_MSR);
 			result = !(mode & UART_RSA_MSR_FIFO);
 		}
 		if (result)
 			up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
 		spin_unlock_irq(&up->port.lock);
 	}
 }
 #endif /* CONFIG_SERIAL_8250_RSA */
 /*
  * This is a quickie test to see how big the FIFO is.
  * It doesn't work at all the time, more's the pity.
  */
 static int size_fifo(struct uart_8250_port *up)
 {
 	unsigned char old_fcr, old_mcr, old_lcr;
 	unsigned short old_dl;
 	int count;
 	old_lcr = serial_inp(up, UART_LCR);
 	serial_outp(up, UART_LCR, 0);
 	old_fcr = serial_inp(up, UART_FCR);
 	old_mcr = serial_inp(up, UART_MCR);
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 		    UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 	serial_outp(up, UART_MCR, UART_MCR_LOOP);
 	serial_outp(up, UART_LCR, UART_LCR_DLAB);
 	old_dl = serial_dl_read(up);
 	serial_dl_write(up, 0x0001);
 	serial_outp(up, UART_LCR, 0x03);
 	for (count = 0; count < 256; count++)
 		serial_outp(up, UART_TX, count);
 	mdelay(20);/* FIXME - schedule_timeout */
 	for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
 	     (count < 256); count++)
 		serial_inp(up, UART_RX);
 	serial_outp(up, UART_FCR, old_fcr);
 	serial_outp(up, UART_MCR, old_mcr);
 	serial_outp(up, UART_LCR, UART_LCR_DLAB);
 	serial_dl_write(up, old_dl);
 	serial_outp(up, UART_LCR, old_lcr);
 	return count;
 }
 /*
  * Read UART ID using the divisor method - set DLL and DLM to zero
  * and the revision will be in DLL and device type in DLM.  We
  * preserve the device state across this.
  */
 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
 {
 	unsigned char old_dll, old_dlm, old_lcr;
 	unsigned int id;
 	old_lcr = serial_inp(p, UART_LCR);
 	serial_outp(p, UART_LCR, UART_LCR_DLAB);
 	old_dll = serial_inp(p, UART_DLL);
 	old_dlm = serial_inp(p, UART_DLM);
 	serial_outp(p, UART_DLL, 0);
 	serial_outp(p, UART_DLM, 0);
 	id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
 	serial_outp(p, UART_DLL, old_dll);
 	serial_outp(p, UART_DLM, old_dlm);
 	serial_outp(p, UART_LCR, old_lcr);
 	return id;
 }
 /*
  * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
  * When this function is called we know it is at least a StarTech
  * 16650 V2, but it might be one of several StarTech UARTs, or one of
  * its clones.  (We treat the broken original StarTech 16650 V1 as a
  * 16550, and why not?  Startech doesn't seem to even acknowledge its
  * existence.)
  *
  * What evil have men's minds wrought...
  */
 static void autoconfig_has_efr(struct uart_8250_port *up)
 {
 	unsigned int id1, id2, id3, rev;
 	/*
 	 * Everything with an EFR has SLEEP
 	 */
 	up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
 	/*
 	 * First we check to see if it's an Oxford Semiconductor UART.
 	 *
 	 * If we have to do this here because some non-National
 	 * Semiconductor clone chips lock up if you try writing to the
 	 * LSR register (which serial_icr_read does)
 	 */
 	/*
 	 * Check for Oxford Semiconductor 16C950.
 	 *
 	 * EFR [4] must be set else this test fails.
 	 *
 	 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
 	 * claims that it's needed for 952 dual UART's (which are not
 	 * recommended for new designs).
 	 */
 	up->acr = 0;
 	serial_out(up, UART_LCR, 0xBF);
 	serial_out(up, UART_EFR, UART_EFR_ECB);
 	serial_out(up, UART_LCR, 0x00);
 	id1 = serial_icr_read(up, UART_ID1);
 	id2 = serial_icr_read(up, UART_ID2);
 	id3 = serial_icr_read(up, UART_ID3);
 	rev = serial_icr_read(up, UART_REV);
 	DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
 	if (id1 == 0x16 && id2 == 0xC9 &&
 	    (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
 		up->port.type = PORT_16C950;
 		/*
 		 * Enable work around for the Oxford Semiconductor 952 rev B
 		 * chip which causes it to seriously miscalculate baud rates
 		 * when DLL is 0.
 		 */
 		if (id3 == 0x52 && rev == 0x01)
 			up->bugs |= UART_BUG_QUOT;
 		return;
 	}
 	/*
 	 * We check for a XR16C850 by setting DLL and DLM to 0, and then
 	 * reading back DLL and DLM.  The chip type depends on the DLM
 	 * value read back:
 	 *  0x10 - XR16C850 and the DLL contains the chip revision.
 	 *  0x12 - XR16C2850.
 	 *  0x14 - XR16C854.
 	 */
 	id1 = autoconfig_read_divisor_id(up);
 	DEBUG_AUTOCONF("850id=%04x ", id1);
 	id2 = id1 >> 8;
 	if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
 		up->port.type = PORT_16850;
 		return;
 	}
 	/*
 	 * It wasn't an XR16C850.
 	 *
 	 * We distinguish between the '654 and the '650 by counting
 	 * how many bytes are in the FIFO.  I'm using this for now,
 	 * since that's the technique that was sent to me in the
 	 * serial driver update, but I'm not convinced this works.
 	 * I've had problems doing this in the past.  -TYT
 	 */
 	if (size_fifo(up) == 64)
 		up->port.type = PORT_16654;
 	else
 		up->port.type = PORT_16650V2;
 }
 /*
  * We detected a chip without a FIFO.  Only two fall into
  * this category - the original 8250 and the 16450.  The
  * 16450 has a scratch register (accessible with LCR=0)
  */
 static void autoconfig_8250(struct uart_8250_port *up)
 {
 	unsigned char scratch, status1, status2;
 	up->port.type = PORT_8250;
 	scratch = serial_in(up, UART_SCR);
 	serial_outp(up, UART_SCR, 0xa5);
 	status1 = serial_in(up, UART_SCR);
 	serial_outp(up, UART_SCR, 0x5a);
 	status2 = serial_in(up, UART_SCR);
 	serial_outp(up, UART_SCR, scratch);
 	if (status1 == 0xa5 && status2 == 0x5a)
 		up->port.type = PORT_16450;
 }
 static int broken_efr(struct uart_8250_port *up)
 {
 	/*
 	 * Exar ST16C2550 "A2" devices incorrectly detect as
 	 * having an EFR, and report an ID of 0x0201.  See
 	 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
 	 */
 	if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
 		return 1;
 	return 0;
 }
 /*
  * We know that the chip has FIFOs.  Does it have an EFR?  The
  * EFR is located in the same register position as the IIR and
  * we know the top two bits of the IIR are currently set.  The
  * EFR should contain zero.  Try to read the EFR.
  */
 static void autoconfig_16550a(struct uart_8250_port *up)
 {
 	unsigned char status1, status2;
 	unsigned int iersave;
 	up->port.type = PORT_16550A;
 	up->capabilities |= UART_CAP_FIFO;
 	/*
 	 * Check for presence of the EFR when DLAB is set.
 	 * Only ST16C650V1 UARTs pass this test.
 	 */
 	serial_outp(up, UART_LCR, UART_LCR_DLAB);
 	if (serial_in(up, UART_EFR) == 0) {
 		serial_outp(up, UART_EFR, 0xA8);
 		if (serial_in(up, UART_EFR) != 0) {
 			DEBUG_AUTOCONF("EFRv1 ");
 			up->port.type = PORT_16650;
 			up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
 		} else {
 			DEBUG_AUTOCONF("Motorola 8xxx DUART ");
 		}
 		serial_outp(up, UART_EFR, 0);
 		return;
 	}
 	/*
 	 * Maybe it requires 0xbf to be written to the LCR.
 	 * (other ST16C650V2 UARTs, TI16C752A, etc)
 	 */
 	serial_outp(up, UART_LCR, 0xBF);
 	if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
 		DEBUG_AUTOCONF("EFRv2 ");
 		autoconfig_has_efr(up);
 		return;
 	}
 	/*
 	 * Check for a National Semiconductor SuperIO chip.
 	 * Attempt to switch to bank 2, read the value of the LOOP bit
 	 * from EXCR1. Switch back to bank 0, change it in MCR. Then
 	 * switch back to bank 2, read it from EXCR1 again and check
 	 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
 	 */
 	serial_outp(up, UART_LCR, 0);
 	status1 = serial_in(up, UART_MCR);
 	serial_outp(up, UART_LCR, 0xE0);
 	status2 = serial_in(up, 0x02); /* EXCR1 */
 	if (!((status2 ^ status1) & UART_MCR_LOOP)) {
 		serial_outp(up, UART_LCR, 0);
 		serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
 		serial_outp(up, UART_LCR, 0xE0);
 		status2 = serial_in(up, 0x02); /* EXCR1 */
 		serial_outp(up, UART_LCR, 0);
 		serial_outp(up, UART_MCR, status1);
 		if ((status2 ^ status1) & UART_MCR_LOOP) {
 			unsigned short quot;
 			serial_outp(up, UART_LCR, 0xE0);
 			quot = serial_dl_read(up);
 			quot <<= 3;
 			status1 = serial_in(up, 0x04); /* EXCR2 */
 			status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
 			status1 |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
 			serial_outp(up, 0x04, status1);
 			serial_dl_write(up, quot);
 			serial_outp(up, UART_LCR, 0);
 			up->port.uartclk = 921600*16;
 			up->port.type = PORT_NS16550A;
 			up->capabilities |= UART_NATSEMI;
 			return;
 		}
 	}
 	/*
 	 * No EFR.  Try to detect a TI16750, which only sets bit 5 of
 	 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
 	 * Try setting it with and without DLAB set.  Cheap clones
 	 * set bit 5 without DLAB set.
 	 */
 	serial_outp(up, UART_LCR, 0);
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
 	status1 = serial_in(up, UART_IIR) >> 5;
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 	serial_outp(up, UART_LCR, UART_LCR_DLAB);
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
 	status2 = serial_in(up, UART_IIR) >> 5;
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 	serial_outp(up, UART_LCR, 0);
 	DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
 	if (status1 == 6 && status2 == 7) {
 		up->port.type = PORT_16750;
 		up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
 		return;
 	}
 	/*
 	 * Try writing and reading the UART_IER_UUE bit (b6).
 	 * If it works, this is probably one of the Xscale platform's
 	 * internal UARTs.
 	 * We're going to explicitly set the UUE bit to 0 before
 	 * trying to write and read a 1 just to make sure it's not
 	 * already a 1 and maybe locked there before we even start start.
 	 */
 	iersave = serial_in(up, UART_IER);
 	serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
 	if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
 		/*
 		 * OK it's in a known zero state, try writing and reading
 		 * without disturbing the current state of the other bits.
 		 */
 		serial_outp(up, UART_IER, iersave | UART_IER_UUE);
 		if (serial_in(up, UART_IER) & UART_IER_UUE) {
 			/*
 			 * It's an Xscale.
 			 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
 			 */
 			DEBUG_AUTOCONF("Xscale ");
 			up->port.type = PORT_XSCALE;
 			up->capabilities |= UART_CAP_UUE;
 			return;
 		}
 	} else {
 		/*
 		 * If we got here we couldn't force the IER_UUE bit to 0.
 		 * Log it and continue.
 		 */
 		DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
 	}
 	serial_outp(up, UART_IER, iersave);
 }
 /*
  * This routine is called by rs_init() to initialize a specific serial
  * port.  It determines what type of UART chip this serial port is
  * using: 8250, 16450, 16550, 16550A.  The important question is
  * whether or not this UART is a 16550A or not, since this will
  * determine whether or not we can use its FIFO features or not.
  */
 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
 {
 	unsigned char status1, scratch, scratch2, scratch3;
 	unsigned char save_lcr, save_mcr;
 	unsigned long flags;
 	if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
 		return;
 	DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
 		       serial_index(&up->port), up->port.iobase, up->port.membase);
 	/*
 	 * We really do need global IRQs disabled here - we're going to
 	 * be frobbing the chips IRQ enable register to see if it exists.
 	 */
 	spin_lock_irqsave(&up->port.lock, flags);
 	up->capabilities = 0;
 	up->bugs = 0;
 	if (!(up->port.flags & UPF_BUGGY_UART)) {
 		/*
 		 * Do a simple existence test first; if we fail this,
 		 * there's no point trying anything else.
 		 *
 		 * 0x80 is used as a nonsense port to prevent against
 		 * false positives due to ISA bus float.  The
 		 * assumption is that 0x80 is a non-existent port;
 		 * which should be safe since include/asm/io.h also
 		 * makes this assumption.
 		 *
 		 * Note: this is safe as long as MCR bit 4 is clear
 		 * and the device is in "PC" mode.
 		 */
 		scratch = serial_inp(up, UART_IER);
 		serial_outp(up, UART_IER, 0);
 #ifdef __i386__
 		outb(0xff, 0x080);
 #endif
 		/*
 		 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
 		 * 16C754B) allow only to modify them if an EFR bit is set.
 		 */
 		scratch2 = serial_inp(up, UART_IER) & 0x0f;
 		serial_outp(up, UART_IER, 0x0F);
 #ifdef __i386__
 		outb(0, 0x080);
 #endif
 		scratch3 = serial_inp(up, UART_IER) & 0x0f;
 		serial_outp(up, UART_IER, scratch);
 		if (scratch2 != 0 || scratch3 != 0x0F) {
 			/*
 			 * We failed; there's nothing here
 			 */
 			DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
 				       scratch2, scratch3);
 			goto out;
 		}
 	}
 	save_mcr = serial_in(up, UART_MCR);
 	save_lcr = serial_in(up, UART_LCR);
 	/*
 	 * Check to see if a UART is really there.  Certain broken
 	 * internal modems based on the Rockwell chipset fail this
 	 * test, because they apparently don't implement the loopback
 	 * test mode.  So this test is skipped on the COM 1 through
 	 * COM 4 ports.  This *should* be safe, since no board
 	 * manufacturer would be stupid enough to design a board
 	 * that conflicts with COM 1-4 --- we hope!
 	 */
 	if (!(up->port.flags & UPF_SKIP_TEST)) {
 		serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
 		status1 = serial_inp(up, UART_MSR) & 0xF0;
 		serial_outp(up, UART_MCR, save_mcr);
 		if (status1 != 0x90) {
 			DEBUG_AUTOCONF("LOOP test failed (%02x) ",
 				       status1);
 			goto out;
 		}
 	}
 	/*
 	 * We're pretty sure there's a port here.  Lets find out what
 	 * type of port it is.  The IIR top two bits allows us to find
 	 * out if it's 8250 or 16450, 16550, 16550A or later.  This
 	 * determines what we test for next.
 	 *
 	 * We also initialise the EFR (if any) to zero for later.  The
 	 * EFR occupies the same register location as the FCR and IIR.
 	 */
 	serial_outp(up, UART_LCR, 0xBF);
 	serial_outp(up, UART_EFR, 0);
 	serial_outp(up, UART_LCR, 0);
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 	scratch = serial_in(up, UART_IIR) >> 6;
 	DEBUG_AUTOCONF("iir=%d ", scratch);
 	switch (scratch) {
 	case 0:
 		autoconfig_8250(up);
 		break;
 	case 1:
 		up->port.type = PORT_UNKNOWN;
 		break;
 	case 2:
 		up->port.type = PORT_16550;
 		break;
 	case 3:
 		autoconfig_16550a(up);
 		break;
 	}
 #ifdef CONFIG_SERIAL_8250_RSA
 	/*
 	 * Only probe for RSA ports if we got the region.
 	 */
 	if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
 		int i;
 		for (i = 0 ; i < probe_rsa_count; ++i) {
 			if (probe_rsa[i] == up->port.iobase &&
 			    __enable_rsa(up)) {
 				up->port.type = PORT_RSA;
 				break;
 			}
 		}
 	}
 #endif
 #ifdef CONFIG_SERIAL_8250_AU1X00
 	/* if access method is AU, it is a 16550 with a quirk */
 	if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
 		up->bugs |= UART_BUG_NOMSR;
 #endif
 	serial_outp(up, UART_LCR, save_lcr);
 	if (up->capabilities != uart_config[up->port.type].flags) {
 		printk(KERN_WARNING
 		       "ttyS%d: detected caps %08x should be %08x\n",
 		       serial_index(&up->port), up->capabilities,
 		       uart_config[up->port.type].flags);
 	}
 	up->port.fifosize = uart_config[up->port.type].fifo_size;
 	up->capabilities = uart_config[up->port.type].flags;
 	up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
 	if (up->port.type == PORT_UNKNOWN)
 		goto out;
 	/*
 	 * Reset the UART.
 	 */
 #ifdef CONFIG_SERIAL_8250_RSA
 	if (up->port.type == PORT_RSA)
 		serial_outp(up, UART_RSA_FRR, 0);
 #endif
 	serial_outp(up, UART_MCR, save_mcr);
 	serial8250_clear_fifos(up);
 	serial_in(up, UART_RX);
 	if (up->capabilities & UART_CAP_UUE)
 		serial_outp(up, UART_IER, UART_IER_UUE);
 	else
 		serial_outp(up, UART_IER, 0);
  out:
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
 }
 static void autoconfig_irq(struct uart_8250_port *up)
 {
 	unsigned char save_mcr, save_ier;
 	unsigned char save_ICP = 0;
 	unsigned int ICP = 0;
 	unsigned long irqs;
 	int irq;
 	if (up->port.flags & UPF_FOURPORT) {
 		ICP = (up->port.iobase & 0xfe0) | 0x1f;
 		save_ICP = inb_p(ICP);
 		outb_p(0x80, ICP);
 		(void) inb_p(ICP);
 	}
 	/* forget possible initially masked and pending IRQ */
 	probe_irq_off(probe_irq_on());
 	save_mcr = serial_inp(up, UART_MCR);
 	save_ier = serial_inp(up, UART_IER);
 	serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
 	irqs = probe_irq_on();
 	serial_outp(up, UART_MCR, 0);
 	udelay(10);
 	if (up->port.flags & UPF_FOURPORT) {
 		serial_outp(up, UART_MCR,
 			    UART_MCR_DTR | UART_MCR_RTS);
 	} else {
 		serial_outp(up, UART_MCR,
 			    UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
 	}
 	serial_outp(up, UART_IER, 0x0f);	/* enable all intrs */
 	(void)serial_inp(up, UART_LSR);
 	(void)serial_inp(up, UART_RX);
 	(void)serial_inp(up, UART_IIR);
 	(void)serial_inp(up, UART_MSR);
 	serial_outp(up, UART_TX, 0xFF);
 	udelay(20);
 	irq = probe_irq_off(irqs);
 	serial_outp(up, UART_MCR, save_mcr);
 	serial_outp(up, UART_IER, save_ier);
 	if (up->port.flags & UPF_FOURPORT)
 		outb_p(save_ICP, ICP);
 	up->port.irq = (irq > 0) ? irq : 0;
 }
 static inline void __stop_tx(struct uart_8250_port *p)
 {
 	if (p->ier & UART_IER_THRI) {
 		p->ier &= ~UART_IER_THRI;
 		serial_out(p, UART_IER, p->ier);
 	}
 }
 static void serial8250_stop_tx(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	__stop_tx(up);
 	/*
 	 * We really want to stop the transmitter from sending.
 	 */
 	if (up->port.type == PORT_16C950) {
 		up->acr |= UART_ACR_TXDIS;
 		serial_icr_write(up, UART_ACR, up->acr);
 	}
 }
 static void transmit_chars(struct uart_8250_port *up);
 static void serial8250_start_tx(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	if (!(up->ier & UART_IER_THRI)) {
 		up->ier |= UART_IER_THRI;
 		serial_out(up, UART_IER, up->ier);
 		if (up->bugs & UART_BUG_TXEN) {
 			unsigned char lsr;
 			lsr = serial_in(up, UART_LSR);
 			up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
 			if ((up->port.type == PORT_RM9000) ?
 				(lsr & UART_LSR_THRE) :
 				(lsr & UART_LSR_TEMT))
 				transmit_chars(up);
 		}
 	}
 	/*
 	 * Re-enable the transmitter if we disabled it.
 	 */
 	if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
 		up->acr &= ~UART_ACR_TXDIS;
 		serial_icr_write(up, UART_ACR, up->acr);
 	}
 }
 static void serial8250_stop_rx(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	up->ier &= ~UART_IER_RLSI;
 	up->port.read_status_mask &= ~UART_LSR_DR;
 	serial_out(up, UART_IER, up->ier);
 }
 static void serial8250_enable_ms(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	/* no MSR capabilities */
 	if (up->bugs & UART_BUG_NOMSR)
 		return;
 	up->ier |= UART_IER_MSI;
 	serial_out(up, UART_IER, up->ier);
 }
 static void
 receive_chars(struct uart_8250_port *up, unsigned int *status)
 {
 	struct tty_struct *tty = up->port.state->port.tty;
 	unsigned char ch, lsr = *status;
 	int max_count = 256;
 	char flag;
 	do {
 		if (likely(lsr & UART_LSR_DR))
 			ch = serial_inp(up, UART_RX);
 		else
 			/*
 			 * Intel 82571 has a Serial Over Lan device that will
 			 * set UART_LSR_BI without setting UART_LSR_DR when
 			 * it receives a break. To avoid reading from the
 			 * receive buffer without UART_LSR_DR bit set, we
 			 * just force the read character to be 0
 			 */
 			ch = 0;
 		flag = TTY_NORMAL;
 		up->port.icount.rx++;
 		lsr |= up->lsr_saved_flags;
 		up->lsr_saved_flags = 0;
 		if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
 			/*
 			 * For statistics only
 			 */
 			if (lsr & UART_LSR_BI) {
 				lsr &= ~(UART_LSR_FE | UART_LSR_PE);
 				up->port.icount.brk++;
 				/*
 				 * We do the SysRQ and SAK checking
 				 * here because otherwise the break
 				 * may get masked by ignore_status_mask
 				 * or read_status_mask.
 				 */
 				if (uart_handle_break(&up->port))
 					goto ignore_char;
 			} else if (lsr & UART_LSR_PE)
 				up->port.icount.parity++;
 			else if (lsr & UART_LSR_FE)
 				up->port.icount.frame++;
 			if (lsr & UART_LSR_OE)
 				up->port.icount.overrun++;
 			/*
 			 * Mask off conditions which should be ignored.
 			 */
 			lsr &= up->port.read_status_mask;
 			if (lsr & UART_LSR_BI) {
 				DEBUG_INTR("handling break....");
 				flag = TTY_BREAK;
 			} else if (lsr & UART_LSR_PE)
 				flag = TTY_PARITY;
 			else if (lsr & UART_LSR_FE)
 				flag = TTY_FRAME;
 		}
 		if (uart_handle_sysrq_char(&up->port, ch))
 			goto ignore_char;
 		uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
 ignore_char:
 		lsr = serial_inp(up, UART_LSR);
 	} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
 	spin_unlock(&up->port.lock);
 	tty_flip_buffer_push(tty);
 	spin_lock(&up->port.lock);
 	*status = lsr;
 }
 static void transmit_chars(struct uart_8250_port *up)
 {
 	struct circ_buf *xmit = &up->port.state->xmit;
 	int count;
 	if (up->port.x_char) {
 		serial_outp(up, UART_TX, up->port.x_char);
 		up->port.icount.tx++;
 		up->port.x_char = 0;
 		return;
 	}
 	if (uart_tx_stopped(&up->port)) {
 		serial8250_stop_tx(&up->port);
 		return;
 	}
 	if (uart_circ_empty(xmit)) {
 		__stop_tx(up);
 		return;
 	}
 	count = up->tx_loadsz;
 	do {
 		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 		up->port.icount.tx++;
 		if (uart_circ_empty(xmit))
 			break;
 	} while (--count > 0);
 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 		uart_write_wakeup(&up->port);
 	DEBUG_INTR("THRE...");
 	if (uart_circ_empty(xmit))
 		__stop_tx(up);
 }
 static unsigned int check_modem_status(struct uart_8250_port *up)
 {
 	unsigned int status = serial_in(up, UART_MSR);
 	status |= up->msr_saved_flags;
 	up->msr_saved_flags = 0;
 	if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
 	    up->port.state != NULL) {
 		if (status & UART_MSR_TERI)
 			up->port.icount.rng++;
 		if (status & UART_MSR_DDSR)
 			up->port.icount.dsr++;
 		if (status & UART_MSR_DDCD)
 			uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 		if (status & UART_MSR_DCTS)
 			uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 		wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 	}
 	return status;
 }
 /*
  * This handles the interrupt from one port.
  */
 static void serial8250_handle_port(struct uart_8250_port *up)
 {
 	unsigned int status;
 	unsigned long flags;
 	spin_lock_irqsave(&up->port.lock, flags);
 	status = serial_inp(up, UART_LSR);
 	DEBUG_INTR("status = %x...", status);
 	if (status & (UART_LSR_DR | UART_LSR_BI))
 		receive_chars(up, &status);
 	check_modem_status(up);
 	if (status & UART_LSR_THRE)
 		transmit_chars(up);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
 /*
  * This is the serial driver's interrupt routine.
  *
  * Arjan thinks the old way was overly complex, so it got simplified.
  * Alan disagrees, saying that need the complexity to handle the weird
  * nature of ISA shared interrupts.  (This is a special exception.)
  *
  * In order to handle ISA shared interrupts properly, we need to check
  * that all ports have been serviced, and therefore the ISA interrupt
  * line has been de-asserted.
  *
  * This means we need to loop through all ports. checking that they
  * don't have an interrupt pending.
  */
 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
 {
 	struct irq_info *i = dev_id;
 	struct list_head *l, *end = NULL;
 	int pass_counter = 0, handled = 0;
 	DEBUG_INTR("serial8250_interrupt(%d)...", irq);
 	spin_lock(&i->lock);
 	l = i->head;
 	do {
 		struct uart_8250_port *up;
 		unsigned int iir;
 		up = list_entry(l, struct uart_8250_port, list);
 		iir = serial_in(up, UART_IIR);
 		if (!(iir & UART_IIR_NO_INT)) {
 			serial8250_handle_port(up);
 			handled = 1;
 			end = NULL;
 		} else if (up->port.iotype == UPIO_DWAPB &&
 			  (iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
 			/* The DesignWare APB UART has an Busy Detect (0x07)
 			 * interrupt meaning an LCR write attempt occured while the
 			 * UART was busy. The interrupt must be cleared by reading
 			 * the UART status register (USR) and the LCR re-written. */
 			unsigned int status;
 			status = *(volatile u32 *)up->port.private_data;
 			serial_out(up, UART_LCR, up->lcr);
 			handled = 1;
 			end = NULL;
 		} else if (end == NULL)
 			end = l;
 		l = l->next;
 		if (l == i->head && pass_counter++ > PASS_LIMIT) {
 			/* If we hit this, we're dead. */
 			printk(KERN_ERR "serial8250: too much work for "
 				"irq%d\n", irq);
 			break;
 		}
 	} while (l != end);
 	spin_unlock(&i->lock);
 	DEBUG_INTR("end.\n");
 	return IRQ_RETVAL(handled);
 }
 /*
  * To support ISA shared interrupts, we need to have one interrupt
  * handler that ensures that the IRQ line has been deasserted
  * before returning.  Failing to do this will result in the IRQ
  * line being stuck active, and, since ISA irqs are edge triggered,
  * no more IRQs will be seen.
  */
 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
 {
 	spin_lock_irq(&i->lock);
 	if (!list_empty(i->head)) {
 		if (i->head == &up->list)
 			i->head = i->head->next;
 		list_del(&up->list);
 	} else {
 		BUG_ON(i->head != &up->list);
 		i->head = NULL;
 	}
 	spin_unlock_irq(&i->lock);
 	/* List empty so throw away the hash node */
 	if (i->head == NULL) {
 		hlist_del(&i->node);
 		kfree(i);
 	}
 }
 static int serial_link_irq_chain(struct uart_8250_port *up)
 {
 	struct hlist_head *h;
 	struct hlist_node *n;
 	struct irq_info *i;
 	int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
 	mutex_lock(&hash_mutex);
 	h = &irq_lists[up->port.irq % NR_IRQ_HASH];
 	hlist_for_each(n, h) {
 		i = hlist_entry(n, struct irq_info, node);
 		if (i->irq == up->port.irq)
 			break;
 	}
 	if (n == NULL) {
 		i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
 		if (i == NULL) {
 			mutex_unlock(&hash_mutex);
 			return -ENOMEM;
 		}
 		spin_lock_init(&i->lock);
 		i->irq = up->port.irq;
 		hlist_add_head(&i->node, h);
 	}
 	mutex_unlock(&hash_mutex);
 	spin_lock_irq(&i->lock);
 	if (i->head) {
 		list_add(&up->list, i->head);
 		spin_unlock_irq(&i->lock);
 		ret = 0;
 	} else {
 		INIT_LIST_HEAD(&up->list);
 		i->head = &up->list;
 		spin_unlock_irq(&i->lock);
 		irq_flags |= up->port.irqflags;
 		ret = request_irq(up->port.irq, serial8250_interrupt,
 				  irq_flags, "serial", i);
 		if (ret < 0)
 			serial_do_unlink(i, up);
 	}
 	return ret;
 }
 static void serial_unlink_irq_chain(struct uart_8250_port *up)
 {
 	struct irq_info *i;
 	struct hlist_node *n;
 	struct hlist_head *h;
 	mutex_lock(&hash_mutex);
 	h = &irq_lists[up->port.irq % NR_IRQ_HASH];
 	hlist_for_each(n, h) {
 		i = hlist_entry(n, struct irq_info, node);
 		if (i->irq == up->port.irq)
 			break;
 	}
 	BUG_ON(n == NULL);
 	BUG_ON(i->head == NULL);
 	if (list_empty(i->head))
 		free_irq(up->port.irq, i);
 	serial_do_unlink(i, up);
 	mutex_unlock(&hash_mutex);
 }
 /* Base timer interval for polling */
 static inline int poll_timeout(int timeout)
 {
 	return timeout > 6 ? (timeout / 2 - 2) : 1;
 }
 /*
  * This function is used to handle ports that do not have an
  * interrupt.  This doesn't work very well for 16450's, but gives
  * barely passable results for a 16550A.  (Although at the expense
  * of much CPU overhead).
  */
 static void serial8250_timeout(unsigned long data)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)data;
 	unsigned int iir;
 	iir = serial_in(up, UART_IIR);
 	if (!(iir & UART_IIR_NO_INT))
 		serial8250_handle_port(up);
 	mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
 }
 static void serial8250_backup_timeout(unsigned long data)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)data;
 	unsigned int iir, ier = 0, lsr;
 	unsigned long flags;
 	/*
 	 * Must disable interrupts or else we risk racing with the interrupt
 	 * based handler.
 	 */
 	if (is_real_interrupt(up->port.irq)) {
 		ier = serial_in(up, UART_IER);
 		serial_out(up, UART_IER, 0);
 	}
 	iir = serial_in(up, UART_IIR);
 	/*
 	 * This should be a safe test for anyone who doesn't trust the
 	 * IIR bits on their UART, but it's specifically designed for
 	 * the "Diva" UART used on the management processor on many HP
 	 * ia64 and parisc boxes.
 	 */
 	spin_lock_irqsave(&up->port.lock, flags);
 	lsr = serial_in(up, UART_LSR);
 	up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
 	    (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
 	    (lsr & UART_LSR_THRE)) {
 		iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
 		iir |= UART_IIR_THRI;
 	}
 	if (!(iir & UART_IIR_NO_INT))
 		serial8250_handle_port(up);
 	if (is_real_interrupt(up->port.irq))
 		serial_out(up, UART_IER, ier);
 	/* Standard timer interval plus 0.2s to keep the port running */
 	mod_timer(&up->timer,
 		jiffies + poll_timeout(up->port.timeout) + HZ / 5);
 }
 static unsigned int serial8250_tx_empty(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned long flags;
 	unsigned int lsr;
 	spin_lock_irqsave(&up->port.lock, flags);
 	lsr = serial_in(up, UART_LSR);
 	up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
 	spin_unlock_irqrestore(&up->port.lock, flags);
-	return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
+	return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
 }
 static unsigned int serial8250_get_mctrl(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned int status;
 	unsigned int ret;
 	status = check_modem_status(up);
 	ret = 0;
 	if (status & UART_MSR_DCD)
 		ret |= TIOCM_CAR;
 	if (status & UART_MSR_RI)
 		ret |= TIOCM_RNG;
 	if (status & UART_MSR_DSR)
 		ret |= TIOCM_DSR;
 	if (status & UART_MSR_CTS)
 		ret |= TIOCM_CTS;
 	return ret;
 }
 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned char mcr = 0;
 	if (mctrl & TIOCM_RTS)
 		mcr |= UART_MCR_RTS;
 	if (mctrl & TIOCM_DTR)
 		mcr |= UART_MCR_DTR;
 	if (mctrl & TIOCM_OUT1)
 		mcr |= UART_MCR_OUT1;
 	if (mctrl & TIOCM_OUT2)
 		mcr |= UART_MCR_OUT2;
 	if (mctrl & TIOCM_LOOP)
 		mcr |= UART_MCR_LOOP;
 	mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
 	serial_out(up, UART_MCR, mcr);
 }
 static void serial8250_break_ctl(struct uart_port *port, int break_state)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned long flags;
 	spin_lock_irqsave(&up->port.lock, flags);
 	if (break_state == -1)
 		up->lcr |= UART_LCR_SBC;
 	else
 		up->lcr &= ~UART_LCR_SBC;
 	serial_out(up, UART_LCR, up->lcr);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
-#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
 /*
  *	Wait for transmitter & holding register to empty
  */
 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
 {
 	unsigned int status, tmout = 10000;
 	/* Wait up to 10ms for the character(s) to be sent. */
 	do {
 		status = serial_in(up, UART_LSR);
 		up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
 		if (--tmout == 0)
 			break;
 		udelay(1);
 	} while ((status & bits) != bits);
 	/* Wait up to 1s for flow control if necessary */
 	if (up->port.flags & UPF_CONS_FLOW) {
 		unsigned int tmout;
 		for (tmout = 1000000; tmout; tmout--) {
 			unsigned int msr = serial_in(up, UART_MSR);
 			up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
 			if (msr & UART_MSR_CTS)
 				break;
 			udelay(1);
 			touch_nmi_watchdog();
 		}
 	}
 }
 #ifdef CONFIG_CONSOLE_POLL
 /*
  * Console polling routines for writing and reading from the uart while
  * in an interrupt or debug context.
  */
 static int serial8250_get_poll_char(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned char lsr = serial_inp(up, UART_LSR);
 	while (!(lsr & UART_LSR_DR))
 		lsr = serial_inp(up, UART_LSR);
 	return serial_inp(up, UART_RX);
 }
 static void serial8250_put_poll_char(struct uart_port *port,
 			 unsigned char c)
 {
 	unsigned int ier;
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	/*
 	 *	First save the IER then disable the interrupts
 	 */
 	ier = serial_in(up, UART_IER);
 	if (up->capabilities & UART_CAP_UUE)
 		serial_out(up, UART_IER, UART_IER_UUE);
 	else
 		serial_out(up, UART_IER, 0);
 	wait_for_xmitr(up, BOTH_EMPTY);
 	/*
 	 *	Send the character out.
 	 *	If a LF, also do CR...
 	 */
 	serial_out(up, UART_TX, c);
 	if (c == 10) {
 		wait_for_xmitr(up, BOTH_EMPTY);
 		serial_out(up, UART_TX, 13);
 	}
 	/*
 	 *	Finally, wait for transmitter to become empty
 	 *	and restore the IER
 	 */
 	wait_for_xmitr(up, BOTH_EMPTY);
 	serial_out(up, UART_IER, ier);
 }
 #endif /* CONFIG_CONSOLE_POLL */
 static int serial8250_startup(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned long flags;
 	unsigned char lsr, iir;
 	int retval;
 	up->capabilities = uart_config[up->port.type].flags;
 	up->mcr = 0;
 	if (up->port.iotype != up->cur_iotype)
 		set_io_from_upio(port);
 	if (up->port.type == PORT_16C950) {
 		/* Wake up and initialize UART */
 		up->acr = 0;
 		serial_outp(up, UART_LCR, 0xBF);
 		serial_outp(up, UART_EFR, UART_EFR_ECB);
 		serial_outp(up, UART_IER, 0);
 		serial_outp(up, UART_LCR, 0);
 		serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
 		serial_outp(up, UART_LCR, 0xBF);
 		serial_outp(up, UART_EFR, UART_EFR_ECB);
 		serial_outp(up, UART_LCR, 0);
 	}
 #ifdef CONFIG_SERIAL_8250_RSA
 	/*
 	 * If this is an RSA port, see if we can kick it up to the
 	 * higher speed clock.
 	 */
 	enable_rsa(up);
 #endif
 	/*
 	 * Clear the FIFO buffers and disable them.
 	 * (they will be reenabled in set_termios())
 	 */
 	serial8250_clear_fifos(up);
 	/*
 	 * Clear the interrupt registers.
 	 */
 	(void) serial_inp(up, UART_LSR);
 	(void) serial_inp(up, UART_RX);
 	(void) serial_inp(up, UART_IIR);
 	(void) serial_inp(up, UART_MSR);
 	/*
 	 * At this point, there's no way the LSR could still be 0xff;
 	 * if it is, then bail out, because there's likely no UART
 	 * here.
 	 */
 	if (!(up->port.flags & UPF_BUGGY_UART) &&
 	    (serial_inp(up, UART_LSR) == 0xff)) {
 		printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
 		       serial_index(&up->port));
 		return -ENODEV;
 	}
 	/*
 	 * For a XR16C850, we need to set the trigger levels
 	 */
 	if (up->port.type == PORT_16850) {
 		unsigned char fctr;
 		serial_outp(up, UART_LCR, 0xbf);
 		fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
 		serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
 		serial_outp(up, UART_TRG, UART_TRG_96);
 		serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
 		serial_outp(up, UART_TRG, UART_TRG_96);
 		serial_outp(up, UART_LCR, 0);
 	}
 	if (is_real_interrupt(up->port.irq)) {
 		unsigned char iir1;
 		/*
 		 * Test for UARTs that do not reassert THRE when the
 		 * transmitter is idle and the interrupt has already
 		 * been cleared.  Real 16550s should always reassert
 		 * this interrupt whenever the transmitter is idle and
 		 * the interrupt is enabled.  Delays are necessary to
 		 * allow register changes to become visible.
 		 */
 		spin_lock_irqsave(&up->port.lock, flags);
 		if (up->port.irqflags & IRQF_SHARED)
 			disable_irq_nosync(up->port.irq);
 		wait_for_xmitr(up, UART_LSR_THRE);
 		serial_out_sync(up, UART_IER, UART_IER_THRI);
 		udelay(1); /* allow THRE to set */
 		iir1 = serial_in(up, UART_IIR);
 		serial_out(up, UART_IER, 0);
 		serial_out_sync(up, UART_IER, UART_IER_THRI);
 		udelay(1); /* allow a working UART time to re-assert THRE */
 		iir = serial_in(up, UART_IIR);
 		serial_out(up, UART_IER, 0);
 		if (up->port.irqflags & IRQF_SHARED)
 			enable_irq(up->port.irq);
 		spin_unlock_irqrestore(&up->port.lock, flags);
 		/*
 		 * If the interrupt is not reasserted, setup a timer to
 		 * kick the UART on a regular basis.
 		 */
 		if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {
 			up->bugs |= UART_BUG_THRE;
 			pr_debug("ttyS%d - using backup timer\n",
 				 serial_index(port));
 		}
 	}
 	/*
 	 * The above check will only give an accurate result the first time
 	 * the port is opened so this value needs to be preserved.
 	 */
 	if (up->bugs & UART_BUG_THRE) {
 		up->timer.function = serial8250_backup_timeout;
 		up->timer.data = (unsigned long)up;
 		mod_timer(&up->timer, jiffies +
 			  poll_timeout(up->port.timeout) + HZ / 5);
 	}
 	/*
 	 * If the "interrupt" for this port doesn't correspond with any
 	 * hardware interrupt, we use a timer-based system.  The original
 	 * driver used to do this with IRQ0.
 	 */
 	if (!is_real_interrupt(up->port.irq)) {
 		up->timer.data = (unsigned long)up;
 		mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
 	} else {
 		retval = serial_link_irq_chain(up);
 		if (retval)
 			return retval;
 	}
 	/*
 	 * Now, initialize the UART
 	 */
 	serial_outp(up, UART_LCR, UART_LCR_WLEN8);
 	spin_lock_irqsave(&up->port.lock, flags);
 	if (up->port.flags & UPF_FOURPORT) {
 		if (!is_real_interrupt(up->port.irq))
 			up->port.mctrl |= TIOCM_OUT1;
 	} else
 		/*
 		 * Most PC uarts need OUT2 raised to enable interrupts.
 		 */
 		if (is_real_interrupt(up->port.irq))
 			up->port.mctrl |= TIOCM_OUT2;
 	serial8250_set_mctrl(&up->port, up->port.mctrl);
 	/* Serial over Lan (SoL) hack:
 	   Intel 8257x Gigabit ethernet chips have a
 	   16550 emulation, to be used for Serial Over Lan.
 	   Those chips take a longer time than a normal
 	   serial device to signalize that a transmission
 	   data was queued. Due to that, the above test generally
 	   fails. One solution would be to delay the reading of
 	   iir. However, this is not reliable, since the timeout
 	   is variable. So, let's just don't test if we receive
 	   TX irq. This way, we'll never enable UART_BUG_TXEN.
 	 */
 	if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
 		goto dont_test_tx_en;
 	/*
 	 * Do a quick test to see if we receive an
 	 * interrupt when we enable the TX irq.
 	 */
 	serial_outp(up, UART_IER, UART_IER_THRI);
 	lsr = serial_in(up, UART_LSR);
 	iir = serial_in(up, UART_IIR);
 	serial_outp(up, UART_IER, 0);
 	if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
 		if (!(up->bugs & UART_BUG_TXEN)) {
 			up->bugs |= UART_BUG_TXEN;
 			pr_debug("ttyS%d - enabling bad tx status workarounds\n",
 				 serial_index(port));
 		}
 	} else {
 		up->bugs &= ~UART_BUG_TXEN;
 	}
 dont_test_tx_en:
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	/*
 	 * Clear the interrupt registers again for luck, and clear the
 	 * saved flags to avoid getting false values from polling
 	 * routines or the previous session.
 	 */
 	serial_inp(up, UART_LSR);
 	serial_inp(up, UART_RX);
 	serial_inp(up, UART_IIR);
 	serial_inp(up, UART_MSR);
 	up->lsr_saved_flags = 0;
 	up->msr_saved_flags = 0;
 	/*
 	 * Finally, enable interrupts.  Note: Modem status interrupts
 	 * are set via set_termios(), which will be occurring imminently
 	 * anyway, so we don't enable them here.
 	 */
 	up->ier = UART_IER_RLSI | UART_IER_RDI;
 	serial_outp(up, UART_IER, up->ier);
 	if (up->port.flags & UPF_FOURPORT) {
 		unsigned int icp;
 		/*
 		 * Enable interrupts on the AST Fourport board
 		 */
 		icp = (up->port.iobase & 0xfe0) | 0x01f;
 		outb_p(0x80, icp);
 		(void) inb_p(icp);
 	}
 	return 0;
 }
 static void serial8250_shutdown(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned long flags;
 	/*
 	 * Disable interrupts from this port
 	 */
 	up->ier = 0;
 	serial_outp(up, UART_IER, 0);
 	spin_lock_irqsave(&up->port.lock, flags);
 	if (up->port.flags & UPF_FOURPORT) {
 		/* reset interrupts on the AST Fourport board */
 		inb((up->port.iobase & 0xfe0) | 0x1f);
 		up->port.mctrl |= TIOCM_OUT1;
 	} else
 		up->port.mctrl &= ~TIOCM_OUT2;
 	serial8250_set_mctrl(&up->port, up->port.mctrl);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	/*
 	 * Disable break condition and FIFOs
 	 */
 	serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
 	serial8250_clear_fifos(up);
 #ifdef CONFIG_SERIAL_8250_RSA
 	/*
 	 * Reset the RSA board back to 115kbps compat mode.
 	 */
 	disable_rsa(up);
 #endif
 	/*
 	 * Read data port to reset things, and then unlink from
 	 * the IRQ chain.
 	 */
 	(void) serial_in(up, UART_RX);
 	del_timer_sync(&up->timer);
 	up->timer.function = serial8250_timeout;
 	if (is_real_interrupt(up->port.irq))
 		serial_unlink_irq_chain(up);
 }
 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
 {
 	unsigned int quot;
 	/*
 	 * Handle magic divisors for baud rates above baud_base on
 	 * SMSC SuperIO chips.
 	 */
 	if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
 	    baud == (port->uartclk/4))
 		quot = 0x8001;
 	else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
 		 baud == (port->uartclk/8))
 		quot = 0x8002;
 	else
 		quot = uart_get_divisor(port, baud);
 	return quot;
 }
 static void
 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
 		       struct ktermios *old)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned char cval, fcr = 0;
 	unsigned long flags;
 	unsigned int baud, quot;
 	switch (termios->c_cflag & CSIZE) {
 	case CS5:
 		cval = UART_LCR_WLEN5;
 		break;
 	case CS6:
 		cval = UART_LCR_WLEN6;
 		break;
 	case CS7:
 		cval = UART_LCR_WLEN7;
 		break;
 	default:
 	case CS8:
 		cval = UART_LCR_WLEN8;
 		break;
 	}
 	if (termios->c_cflag & CSTOPB)
 		cval |= UART_LCR_STOP;
 	if (termios->c_cflag & PARENB)
 		cval |= UART_LCR_PARITY;
 	if (!(termios->c_cflag & PARODD))
 		cval |= UART_LCR_EPAR;
 #ifdef CMSPAR
 	if (termios->c_cflag & CMSPAR)
 		cval |= UART_LCR_SPAR;
 #endif
 	/*
 	 * Ask the core to calculate the divisor for us.
 	 */
 	baud = uart_get_baud_rate(port, termios, old,
 				  port->uartclk / 16 / 0xffff,
 				  port->uartclk / 16);
 	quot = serial8250_get_divisor(port, baud);
 	/*
 	 * Oxford Semi 952 rev B workaround
 	 */
 	if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
 		quot++;
 	if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
 		if (baud < 2400)
 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
 		else
 			fcr = uart_config[up->port.type].fcr;
 	}
 	/*
 	 * MCR-based auto flow control.  When AFE is enabled, RTS will be
 	 * deasserted when the receive FIFO contains more characters than
 	 * the trigger, or the MCR RTS bit is cleared.  In the case where
 	 * the remote UART is not using CTS auto flow control, we must
 	 * have sufficient FIFO entries for the latency of the remote
 	 * UART to respond.  IOW, at least 32 bytes of FIFO.
 	 */
 	if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
 		up->mcr &= ~UART_MCR_AFE;
 		if (termios->c_cflag & CRTSCTS)
 			up->mcr |= UART_MCR_AFE;
 	}
 	/*
 	 * Ok, we're now changing the port state.  Do it with
 	 * interrupts disabled.
 	 */
 	spin_lock_irqsave(&up->port.lock, flags);
 	/*
 	 * Update the per-port timeout.
 	 */
 	uart_update_timeout(port, termios->c_cflag, baud);
 	up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 	if (termios->c_iflag & INPCK)
 		up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 	if (termios->c_iflag & (BRKINT | PARMRK))
 		up->port.read_status_mask |= UART_LSR_BI;
 	/*
 	 * Characteres to ignore
 	 */
 	up->port.ignore_status_mask = 0;
 	if (termios->c_iflag & IGNPAR)
 		up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 	if (termios->c_iflag & IGNBRK) {
 		up->port.ignore_status_mask |= UART_LSR_BI;
 		/*
 		 * If we're ignoring parity and break indicators,
 		 * ignore overruns too (for real raw support).
 		 */
 		if (termios->c_iflag & IGNPAR)
 			up->port.ignore_status_mask |= UART_LSR_OE;
 	}
 	/*
 	 * ignore all characters if CREAD is not set
 	 */
 	if ((termios->c_cflag & CREAD) == 0)
 		up->port.ignore_status_mask |= UART_LSR_DR;
 	/*
 	 * CTS flow control flag and modem status interrupts
 	 */
 	up->ier &= ~UART_IER_MSI;
 	if (!(up->bugs & UART_BUG_NOMSR) &&
 			UART_ENABLE_MS(&up->port, termios->c_cflag))
 		up->ier |= UART_IER_MSI;
 	if (up->capabilities & UART_CAP_UUE)
 		up->ier |= UART_IER_UUE | UART_IER_RTOIE;
 	serial_out(up, UART_IER, up->ier);
 	if (up->capabilities & UART_CAP_EFR) {
 		unsigned char efr = 0;
 		/*
 		 * TI16C752/Startech hardware flow control.  FIXME:
 		 * - TI16C752 requires control thresholds to be set.
 		 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
 		 */
 		if (termios->c_cflag & CRTSCTS)
 			efr |= UART_EFR_CTS;
 		serial_outp(up, UART_LCR, 0xBF);
 		serial_outp(up, UART_EFR, efr);
 	}
 #ifdef CONFIG_ARCH_OMAP
 	/* Workaround to enable 115200 baud on OMAP1510 internal ports */
 	if (cpu_is_omap1510() && is_omap_port(up)) {
 		if (baud == 115200) {
 			quot = 1;
 			serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
 		} else
 			serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
 	}
 #endif
 	if (up->capabilities & UART_NATSEMI) {
 		/* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
 		serial_outp(up, UART_LCR, 0xe0);
 	} else {
 		serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 	}
 	serial_dl_write(up, quot);
 	/*
 	 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
 	 * is written without DLAB set, this mode will be disabled.
 	 */
 	if (up->port.type == PORT_16750)
 		serial_outp(up, UART_FCR, fcr);
 	serial_outp(up, UART_LCR, cval);		/* reset DLAB */
 	up->lcr = cval;					/* Save LCR */
 	if (up->port.type != PORT_16750) {
 		if (fcr & UART_FCR_ENABLE_FIFO) {
 			/* emulated UARTs (Lucent Venus 167x) need two steps */
 			serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 		}
 		serial_outp(up, UART_FCR, fcr);		/* set fcr */
 	}
 	serial8250_set_mctrl(&up->port, up->port.mctrl);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	/* Don't rewrite B0 */
 	if (tty_termios_baud_rate(termios))
 		tty_termios_encode_baud_rate(termios, baud, baud);
 }
 static void
 serial8250_pm(struct uart_port *port, unsigned int state,
 	      unsigned int oldstate)
 {
 	struct uart_8250_port *p = (struct uart_8250_port *)port;
 	serial8250_set_sleep(p, state != 0);
 	if (p->pm)
 		p->pm(port, state, oldstate);
 }
 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
 {
 	if (pt->port.iotype == UPIO_AU)
 		return 0x100000;
 #ifdef CONFIG_ARCH_OMAP
 	if (is_omap_port(pt))
 		return 0x16 << pt->port.regshift;
 #endif
 	return 8 << pt->port.regshift;
 }
 /*
  * Resource handling.
  */
 static int serial8250_request_std_resource(struct uart_8250_port *up)
 {
 	unsigned int size = serial8250_port_size(up);
 	int ret = 0;
 	switch (up->port.iotype) {
 	case UPIO_AU:
 	case UPIO_TSI:
 	case UPIO_MEM32:
 	case UPIO_MEM:
 	case UPIO_DWAPB:
 		if (!up->port.mapbase)
 			break;
 		if (!request_mem_region(up->port.mapbase, size, "serial")) {
 			ret = -EBUSY;
 			break;
 		}
 		if (up->port.flags & UPF_IOREMAP) {
 			up->port.membase = ioremap_nocache(up->port.mapbase,
 									size);
 			if (!up->port.membase) {
 				release_mem_region(up->port.mapbase, size);
 				ret = -ENOMEM;
 			}
 		}
 		break;
 	case UPIO_HUB6:
 	case UPIO_PORT:
 		if (!request_region(up->port.iobase, size, "serial"))
 			ret = -EBUSY;
 		break;
 	}
 	return ret;
 }
 static void serial8250_release_std_resource(struct uart_8250_port *up)
 {
 	unsigned int size = serial8250_port_size(up);
 	switch (up->port.iotype) {
 	case UPIO_AU:
 	case UPIO_TSI:
 	case UPIO_MEM32:
 	case UPIO_MEM:
 	case UPIO_DWAPB:
 		if (!up->port.mapbase)
 			break;
 		if (up->port.flags & UPF_IOREMAP) {
 			iounmap(up->port.membase);
 			up->port.membase = NULL;
 		}
 		release_mem_region(up->port.mapbase, size);
 		break;
 	case UPIO_HUB6:
 	case UPIO_PORT:
 		release_region(up->port.iobase, size);
 		break;
 	}
 }
 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
 {
 	unsigned long start = UART_RSA_BASE << up->port.regshift;
 	unsigned int size = 8 << up->port.regshift;
 	int ret = -EINVAL;
 	switch (up->port.iotype) {
 	case UPIO_HUB6:
 	case UPIO_PORT:
 		start += up->port.iobase;
 		if (request_region(start, size, "serial-rsa"))
 			ret = 0;
 		else
 			ret = -EBUSY;
 		break;
 	}
 	return ret;
 }
 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
 {
 	unsigned long offset = UART_RSA_BASE << up->port.regshift;
 	unsigned int size = 8 << up->port.regshift;
 	switch (up->port.iotype) {
 	case UPIO_HUB6:
 	case UPIO_PORT:
 		release_region(up->port.iobase + offset, size);
 		break;
 	}
 }
 static void serial8250_release_port(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	serial8250_release_std_resource(up);
 	if (up->port.type == PORT_RSA)
 		serial8250_release_rsa_resource(up);
 }
 static int serial8250_request_port(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	int ret = 0;
 	ret = serial8250_request_std_resource(up);
 	if (ret == 0 && up->port.type == PORT_RSA) {
 		ret = serial8250_request_rsa_resource(up);
 		if (ret < 0)
 			serial8250_release_std_resource(up);
 	}
 	return ret;
 }
 static void serial8250_config_port(struct uart_port *port, int flags)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	int probeflags = PROBE_ANY;
 	int ret;
 	/*
 	 * Find the region that we can probe for.  This in turn
 	 * tells us whether we can probe for the type of port.
 	 */
 	ret = serial8250_request_std_resource(up);
 	if (ret < 0)
 		return;
 	ret = serial8250_request_rsa_resource(up);
 	if (ret < 0)
 		probeflags &= ~PROBE_RSA;
 	if (up->port.iotype != up->cur_iotype)
 		set_io_from_upio(port);
 	if (flags & UART_CONFIG_TYPE)
 		autoconfig(up, probeflags);
 	if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
 		autoconfig_irq(up);
 	if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
 		serial8250_release_rsa_resource(up);
 	if (up->port.type == PORT_UNKNOWN)
 		serial8250_release_std_resource(up);
 }
 static int
 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
 {
 	if (ser->irq >= nr_irqs || ser->irq < 0 ||
 	    ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
 	    ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
 	    ser->type == PORT_STARTECH)
 		return -EINVAL;
 	return 0;
 }
 static const char *
 serial8250_type(struct uart_port *port)
 {
 	int type = port->type;
 	if (type >= ARRAY_SIZE(uart_config))
 		type = 0;
 	return uart_config[type].name;
 }
 static struct uart_ops serial8250_pops = {
 	.tx_empty	= serial8250_tx_empty,
 	.set_mctrl	= serial8250_set_mctrl,
 	.get_mctrl	= serial8250_get_mctrl,
 	.stop_tx	= serial8250_stop_tx,
 	.start_tx	= serial8250_start_tx,
 	.stop_rx	= serial8250_stop_rx,
 	.enable_ms	= serial8250_enable_ms,
 	.break_ctl	= serial8250_break_ctl,
 	.startup	= serial8250_startup,
 	.shutdown	= serial8250_shutdown,
 	.set_termios	= serial8250_set_termios,
 	.pm		= serial8250_pm,
 	.type		= serial8250_type,
 	.release_port	= serial8250_release_port,
 	.request_port	= serial8250_request_port,
 	.config_port	= serial8250_config_port,
 	.verify_port	= serial8250_verify_port,
 #ifdef CONFIG_CONSOLE_POLL
 	.poll_get_char = serial8250_get_poll_char,
 	.poll_put_char = serial8250_put_poll_char,
 #endif
 };
 static struct uart_8250_port serial8250_ports[UART_NR];
 static void __init serial8250_isa_init_ports(void)
 {
 	struct uart_8250_port *up;
 	static int first = 1;
 	int i, irqflag = 0;
 	if (!first)
 		return;
 	first = 0;
 	for (i = 0; i < nr_uarts; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		up->port.line = i;
 		spin_lock_init(&up->port.lock);
 		init_timer(&up->timer);
 		up->timer.function = serial8250_timeout;
 		/*
 		 * ALPHA_KLUDGE_MCR needs to be killed.
 		 */
 		up->mcr_mask = ~ALPHA_KLUDGE_MCR;
 		up->mcr_force = ALPHA_KLUDGE_MCR;
 		up->port.ops = &serial8250_pops;
 	}
 	if (share_irqs)
 		irqflag = IRQF_SHARED;
 	for (i = 0, up = serial8250_ports;
 	     i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
 	     i++, up++) {
 		up->port.iobase   = old_serial_port[i].port;
 		up->port.irq      = irq_canonicalize(old_serial_port[i].irq);
 		up->port.irqflags = old_serial_port[i].irqflags;
 		up->port.uartclk  = old_serial_port[i].baud_base * 16;
 		up->port.flags    = old_serial_port[i].flags;
 		up->port.hub6     = old_serial_port[i].hub6;
 		up->port.membase  = old_serial_port[i].iomem_base;
 		up->port.iotype   = old_serial_port[i].io_type;
 		up->port.regshift = old_serial_port[i].iomem_reg_shift;
 		set_io_from_upio(&up->port);
 		up->port.irqflags |= irqflag;
 	}
 }
 static void __init
 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
 {
 	int i;
 	for (i = 0; i < nr_uarts; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		up->cur_iotype = 0xFF;
 	}
 	serial8250_isa_init_ports();
 	for (i = 0; i < nr_uarts; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		up->port.dev = dev;
 		uart_add_one_port(drv, &up->port);
 	}
 }
 #ifdef CONFIG_SERIAL_8250_CONSOLE
 static void serial8250_console_putchar(struct uart_port *port, int ch)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	wait_for_xmitr(up, UART_LSR_THRE);
 	serial_out(up, UART_TX, ch);
 }
 /*
  *	Print a string to the serial port trying not to disturb
  *	any possible real use of the port...
  *
  *	The console_lock must be held when we get here.
  */
 static void
 serial8250_console_write(struct console *co, const char *s, unsigned int count)
 {
 	struct uart_8250_port *up = &serial8250_ports[co->index];
 	unsigned long flags;
 	unsigned int ier;
 	int locked = 1;
 	touch_nmi_watchdog();
 	local_irq_save(flags);
 	if (up->port.sysrq) {
 		/* serial8250_handle_port() already took the lock */
 		locked = 0;
 	} else if (oops_in_progress) {
 		locked = spin_trylock(&up->port.lock);
 	} else
 		spin_lock(&up->port.lock);
 	/*
 	 *	First save the IER then disable the interrupts
 	 */
 	ier = serial_in(up, UART_IER);
 	if (up->capabilities & UART_CAP_UUE)
 		serial_out(up, UART_IER, UART_IER_UUE);
 	else
 		serial_out(up, UART_IER, 0);
 	uart_console_write(&up->port, s, count, serial8250_console_putchar);
 	/*
 	 *	Finally, wait for transmitter to become empty
 	 *	and restore the IER
 	 */
 	wait_for_xmitr(up, BOTH_EMPTY);
 	serial_out(up, UART_IER, ier);
 	/*
 	 *	The receive handling will happen properly because the
 	 *	receive ready bit will still be set; it is not cleared
 	 *	on read.  However, modem control will not, we must
 	 *	call it if we have saved something in the saved flags
 	 *	while processing with interrupts off.
 	 */
 	if (up->msr_saved_flags)
 		check_modem_status(up);
 	if (locked)
 		spin_unlock(&up->port.lock);
 	local_irq_restore(flags);
 }
 static int __init serial8250_console_setup(struct console *co, char *options)
 {
 	struct uart_port *port;
 	int baud = 9600;
 	int bits = 8;
 	int parity = 'n';
 	int flow = 'n';
 	/*
 	 * Check whether an invalid uart number has been specified, and
 	 * if so, search for the first available port that does have
 	 * console support.
 	 */
 	if (co->index >= nr_uarts)
 		co->index = 0;
 	port = &serial8250_ports[co->index].port;
 	if (!port->iobase && !port->membase)
 		return -ENODEV;
 	if (options)
 		uart_parse_options(options, &baud, &parity, &bits, &flow);
 	return uart_set_options(port, co, baud, parity, bits, flow);
 }
 static int serial8250_console_early_setup(void)
 {
 	return serial8250_find_port_for_earlycon();
 }
 static struct console serial8250_console = {
 	.name		= "ttyS",
 	.write		= serial8250_console_write,
 	.device		= uart_console_device,
 	.setup		= serial8250_console_setup,
 	.early_setup	= serial8250_console_early_setup,
 	.flags		= CON_PRINTBUFFER,
 	.index		= -1,
 	.data		= &serial8250_reg,
 };
 static int __init serial8250_console_init(void)
 {
 	if (nr_uarts > UART_NR)
 		nr_uarts = UART_NR;
 	serial8250_isa_init_ports();
 	register_console(&serial8250_console);
 	return 0;
 }
 console_initcall(serial8250_console_init);
 int serial8250_find_port(struct uart_port *p)
 {
 	int line;
 	struct uart_port *port;
 	for (line = 0; line < nr_uarts; line++) {
 		port = &serial8250_ports[line].port;
 		if (uart_match_port(p, port))
 			return line;
 	}
 	return -ENODEV;
 }
 #define SERIAL8250_CONSOLE	&serial8250_console
 #else
 #define SERIAL8250_CONSOLE	NULL
 #endif
 static struct uart_driver serial8250_reg = {
 	.owner			= THIS_MODULE,
 	.driver_name		= "serial",
 	.dev_name		= "ttyS",
 	.major			= TTY_MAJOR,
 	.minor			= 64,
 	.cons			= SERIAL8250_CONSOLE,
 };
 /*
  * early_serial_setup - early registration for 8250 ports
  *
  * Setup an 8250 port structure prior to console initialisation.  Use
  * after console initialisation will cause undefined behaviour.
  */
 int __init early_serial_setup(struct uart_port *port)
 {
 	struct uart_port *p;
 	if (port->line >= ARRAY_SIZE(serial8250_ports))
 		return -ENODEV;
 	serial8250_isa_init_ports();
 	p = &serial8250_ports[port->line].port;
 	p->iobase       = port->iobase;
 	p->membase      = port->membase;
 	p->irq          = port->irq;
 	p->irqflags     = port->irqflags;
 	p->uartclk      = port->uartclk;
 	p->fifosize     = port->fifosize;
 	p->regshift     = port->regshift;
 	p->iotype       = port->iotype;
 	p->flags        = port->flags;
 	p->mapbase      = port->mapbase;
 	p->private_data = port->private_data;
 	p->type		= port->type;
 	p->line		= port->line;
 	set_io_from_upio(p);
 	if (port->serial_in)
 		p->serial_in = port->serial_in;
 	if (port->serial_out)
 		p->serial_out = port->serial_out;
 	return 0;
 }
 /**
  *	serial8250_suspend_port - suspend one serial port
  *	@line:  serial line number
  *
  *	Suspend one serial port.
  */
 void serial8250_suspend_port(int line)
 {
 	uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
 }
 /**
  *	serial8250_resume_port - resume one serial port
  *	@line:  serial line number
  *
  *	Resume one serial port.
  */
 void serial8250_resume_port(int line)
 {
 	struct uart_8250_port *up = &serial8250_ports[line];
 	if (up->capabilities & UART_NATSEMI) {
 		unsigned char tmp;
 		/* Ensure it's still in high speed mode */
 		serial_outp(up, UART_LCR, 0xE0);
 		tmp = serial_in(up, 0x04); /* EXCR2 */
 		tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
 		tmp |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
 		serial_outp(up, 0x04, tmp);
 		serial_outp(up, UART_LCR, 0);
 	}
 	uart_resume_port(&serial8250_reg, &up->port);
 }
 /*
  * Register a set of serial devices attached to a platform device.  The
  * list is terminated with a zero flags entry, which means we expect
  * all entries to have at least UPF_BOOT_AUTOCONF set.
  */
 static int __devinit serial8250_probe(struct platform_device *dev)
 {
 	struct plat_serial8250_port *p = dev->dev.platform_data;
 	struct uart_port port;
 	int ret, i, irqflag = 0;
 	memset(&port, 0, sizeof(struct uart_port));
 	if (share_irqs)
 		irqflag = IRQF_SHARED;
 	for (i = 0; p && p->flags != 0; p++, i++) {
 		port.iobase		= p->iobase;
 		port.membase		= p->membase;
 		port.irq		= p->irq;
 		port.irqflags		= p->irqflags;
 		port.uartclk		= p->uartclk;
 		port.regshift		= p->regshift;
 		port.iotype		= p->iotype;
 		port.flags		= p->flags;
 		port.mapbase		= p->mapbase;
 		port.hub6		= p->hub6;
 		port.private_data	= p->private_data;
 		port.type		= p->type;
 		port.serial_in		= p->serial_in;
 		port.serial_out		= p->serial_out;
 		port.dev		= &dev->dev;
 		port.irqflags		|= irqflag;
 		ret = serial8250_register_port(&port);
 		if (ret < 0) {
 			dev_err(&dev->dev, "unable to register port at index %d "
 				"(IO%lx MEM%llx IRQ%d): %d\n", i,
 				p->iobase, (unsigned long long)p->mapbase,
 				p->irq, ret);
 		}
 	}
 	return 0;
 }
 /*
  * Remove serial ports registered against a platform device.
  */
 static int __devexit serial8250_remove(struct platform_device *dev)
 {
 	int i;
 	for (i = 0; i < nr_uarts; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		if (up->port.dev == &dev->dev)
 			serial8250_unregister_port(i);
 	}
 	return 0;
 }
 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
 {
 	int i;
 	for (i = 0; i < UART_NR; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
 			uart_suspend_port(&serial8250_reg, &up->port);
 	}
 	return 0;
 }
 static int serial8250_resume(struct platform_device *dev)
 {
 	int i;
 	for (i = 0; i < UART_NR; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
 			serial8250_resume_port(i);
 	}
 	return 0;
 }
 static struct platform_driver serial8250_isa_driver = {
 	.probe		= serial8250_probe,
 	.remove		= __devexit_p(serial8250_remove),
 	.suspend	= serial8250_suspend,
 	.resume		= serial8250_resume,
 	.driver		= {
 		.name	= "serial8250",
 		.owner	= THIS_MODULE,
 	},
 };
 /*
  * This "device" covers _all_ ISA 8250-compatible serial devices listed
  * in the table in include/asm/serial.h
  */
 static struct platform_device *serial8250_isa_devs;
 /*
  * serial8250_register_port and serial8250_unregister_port allows for
  * 16x50 serial ports to be configured at run-time, to support PCMCIA
  * modems and PCI multiport cards.
  */
 static DEFINE_MUTEX(serial_mutex);
 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
 {
 	int i;
 	/*
 	 * First, find a port entry which matches.
 	 */
 	for (i = 0; i < nr_uarts; i++)
 		if (uart_match_port(&serial8250_ports[i].port, port))
 			return &serial8250_ports[i];
 	/*
 	 * We didn't find a matching entry, so look for the first
 	 * free entry.  We look for one which hasn't been previously
 	 * used (indicated by zero iobase).
 	 */
 	for (i = 0; i < nr_uarts; i++)
 		if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
 		    serial8250_ports[i].port.iobase == 0)
 			return &serial8250_ports[i];
 	/*
 	 * That also failed.  Last resort is to find any entry which
 	 * doesn't have a real port associated with it.
 	 */
 	for (i = 0; i < nr_uarts; i++)
 		if (serial8250_ports[i].port.type == PORT_UNKNOWN)
 			return &serial8250_ports[i];
 	return NULL;
 }
 /**
  *	serial8250_register_port - register a serial port
  *	@port: serial port template
  *
  *	Configure the serial port specified by the request. If the
  *	port exists and is in use, it is hung up and unregistered
  *	first.
  *
  *	The port is then probed and if necessary the IRQ is autodetected
  *	If this fails an error is returned.
  *
  *	On success the port is ready to use and the line number is returned.
  */
 int serial8250_register_port(struct uart_port *port)
 {
 	struct uart_8250_port *uart;
 	int ret = -ENOSPC;
 	if (port->uartclk == 0)
 		return -EINVAL;
 	mutex_lock(&serial_mutex);
 	uart = serial8250_find_match_or_unused(port);
 	if (uart) {
 		uart_remove_one_port(&serial8250_reg, &uart->port);
 		uart->port.iobase       = port->iobase;
 		uart->port.membase      = port->membase;
 		uart->port.irq          = port->irq;
 		uart->port.irqflags     = port->irqflags;
 		uart->port.uartclk      = port->uartclk;
 		uart->port.fifosize     = port->fifosize;
 		uart->port.regshift     = port->regshift;
 		uart->port.iotype       = port->iotype;
 		uart->port.flags        = port->flags | UPF_BOOT_AUTOCONF;
 		uart->port.mapbase      = port->mapbase;
 		uart->port.private_data = port->private_data;
 		if (port->dev)
 			uart->port.dev = port->dev;
 		if (port->flags & UPF_FIXED_TYPE) {
 			uart->port.type = port->type;
 			uart->port.fifosize = uart_config[port->type].fifo_size;
 			uart->capabilities = uart_config[port->type].flags;
 			uart->tx_loadsz = uart_config[port->type].tx_loadsz;
 		}
 		set_io_from_upio(&uart->port);
 		/* Possibly override default I/O functions.  */
 		if (port->serial_in)
 			uart->port.serial_in = port->serial_in;
 		if (port->serial_out)
 			uart->port.serial_out = port->serial_out;
 		ret = uart_add_one_port(&serial8250_reg, &uart->port);
 		if (ret == 0)
 			ret = uart->port.line;
 	}
 	mutex_unlock(&serial_mutex);
 	return ret;
 }
 EXPORT_SYMBOL(serial8250_register_port);
 /**
  *	serial8250_unregister_port - remove a 16x50 serial port at runtime
  *	@line: serial line number
  *
  *	Remove one serial port.  This may not be called from interrupt
  *	context.  We hand the port back to the our control.
  */
 void serial8250_unregister_port(int line)
 {
 	struct uart_8250_port *uart = &serial8250_ports[line];
 	mutex_lock(&serial_mutex);
 	uart_remove_one_port(&serial8250_reg, &uart->port);
 	if (serial8250_isa_devs) {
 		uart->port.flags &= ~UPF_BOOT_AUTOCONF;
 		uart->port.type = PORT_UNKNOWN;
 		uart->port.dev = &serial8250_isa_devs->dev;
 		uart_add_one_port(&serial8250_reg, &uart->port);
 	} else {
 		uart->port.dev = NULL;
 	}
 	mutex_unlock(&serial_mutex);
 }
 EXPORT_SYMBOL(serial8250_unregister_port);
 static int __init serial8250_init(void)
 {
 	int ret;
 	if (nr_uarts > UART_NR)
 		nr_uarts = UART_NR;
 	printk(KERN_INFO "Serial: 8250/16550 driver, "
 		"%d ports, IRQ sharing %sabled\n", nr_uarts,
 		share_irqs ? "en" : "dis");
 #ifdef CONFIG_SPARC
 	ret = sunserial_register_minors(&serial8250_reg, UART_NR);
 #else
 	serial8250_reg.nr = UART_NR;
 	ret = uart_register_driver(&serial8250_reg);
 #endif
 	if (ret)
 		goto out;
 	serial8250_isa_devs = platform_device_alloc("serial8250",
 						    PLAT8250_DEV_LEGACY);
 	if (!serial8250_isa_devs) {
 		ret = -ENOMEM;
 		goto unreg_uart_drv;
 	}
 	ret = platform_device_add(serial8250_isa_devs);
 	if (ret)
 		goto put_dev;
 	serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
 	ret = platform_driver_register(&serial8250_isa_driver);
 	if (ret == 0)
 		goto out;
 	platform_device_del(serial8250_isa_devs);
 put_dev:
 	platform_device_put(serial8250_isa_devs);
 unreg_uart_drv:
 #ifdef CONFIG_SPARC
 	sunserial_unregister_minors(&serial8250_reg, UART_NR);
 #else
 	uart_unregister_driver(&serial8250_reg);
 #endif
 out:
 	return ret;
 }
 static void __exit serial8250_exit(void)
 {
 	struct platform_device *isa_dev = serial8250_isa_devs;
 	/*
 	 * This tells serial8250_unregister_port() not to re-register
 	 * the ports (thereby making serial8250_isa_driver permanently
 	 * in use.)
 	 */
 	serial8250_isa_devs = NULL;
 	platform_driver_unregister(&serial8250_isa_driver);
 	platform_device_unregister(isa_dev);
 #ifdef CONFIG_SPARC
 	sunserial_unregister_minors(&serial8250_reg, UART_NR);
 #else
 	uart_unregister_driver(&serial8250_reg);
 #endif
 }
 module_init(serial8250_init);
 module_exit(serial8250_exit);
 EXPORT_SYMBOL(serial8250_suspend_port);
 EXPORT_SYMBOL(serial8250_resume_port);
 MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
 module_param(share_irqs, uint, 0644);
 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
 	" (unsafe)");
 module_param(nr_uarts, uint, 0644);
 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
 module_param(skip_txen_test, uint, 0644);
 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
 #ifdef CONFIG_SERIAL_8250_RSA
 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
 #endif