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Commit d6bc69349915e2d58499165851a17280c97126ac

Authored by Ben Hutchings
Committed by Greg Kroah-Hartman
1 parent 47cd23fd08

media: staging: lirc_serial: Do not assume error codes returned by request_irq() 

commit affc9a0d59ac49bd304e2137bd5e4ffdd6fdfa52 upstream.

lirc_serial_probe() must fail if request_irq() returns an error, even if
it isn't EBUSY or EINVAL,

Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: Jonathan Nieder <jrnieder@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Showing 1 changed file with 9 additions and 12 deletions Inline Diff

drivers/staging/media/lirc/lirc_serial.c
Diff comments   View file @ d6bc693
1 /* 1 /*
2 * lirc_serial.c 2 * lirc_serial.c
3 * 3 *
4 * lirc_serial - Device driver that records pulse- and pause-lengths 4 * lirc_serial - Device driver that records pulse- and pause-lengths
5 * (space-lengths) between DDCD event on a serial port. 5 * (space-lengths) between DDCD event on a serial port.
6 * 6 *
7 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de> 7 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
8 * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu> 8 * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
9 * Copyright (C) 1998 Ben Pfaff <blp@gnu.org> 9 * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
10 * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de> 10 * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
11 * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support) 11 * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
12 * This program is free software; you can redistribute it and/or modify 12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by 13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or 14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version. 15 * (at your option) any later version.
16 * 16 *
17 * This program is distributed in the hope that it will be useful, 17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details. 20 * GNU General Public License for more details.
21 * 21 *
22 * You should have received a copy of the GNU General Public License 22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software 23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * 25 *
26 */ 26 */
27 27
28 /* 28 /*
29 * Steve's changes to improve transmission fidelity: 29 * Steve's changes to improve transmission fidelity:
30 * - for systems with the rdtsc instruction and the clock counter, a 30 * - for systems with the rdtsc instruction and the clock counter, a
31 * send_pule that times the pulses directly using the counter. 31 * send_pule that times the pulses directly using the counter.
32 * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is 32 * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
33 * not needed. Measurement shows very stable waveform, even where 33 * not needed. Measurement shows very stable waveform, even where
34 * PCI activity slows the access to the UART, which trips up other 34 * PCI activity slows the access to the UART, which trips up other
35 * versions. 35 * versions.
36 * - For other system, non-integer-microsecond pulse/space lengths, 36 * - For other system, non-integer-microsecond pulse/space lengths,
37 * done using fixed point binary. So, much more accurate carrier 37 * done using fixed point binary. So, much more accurate carrier
38 * frequency. 38 * frequency.
39 * - fine tuned transmitter latency, taking advantage of fractional 39 * - fine tuned transmitter latency, taking advantage of fractional
40 * microseconds in previous change 40 * microseconds in previous change
41 * - Fixed bug in the way transmitter latency was accounted for by 41 * - Fixed bug in the way transmitter latency was accounted for by
42 * tuning the pulse lengths down - the send_pulse routine ignored 42 * tuning the pulse lengths down - the send_pulse routine ignored
43 * this overhead as it timed the overall pulse length - so the 43 * this overhead as it timed the overall pulse length - so the
44 * pulse frequency was right but overall pulse length was too 44 * pulse frequency was right but overall pulse length was too
45 * long. Fixed by accounting for latency on each pulse/space 45 * long. Fixed by accounting for latency on each pulse/space
46 * iteration. 46 * iteration.
47 * 47 *
48 * Steve Davies <steve@daviesfam.org> July 2001 48 * Steve Davies <steve@daviesfam.org> July 2001
49 */ 49 */
50 50
51 #include <linux/module.h> 51 #include <linux/module.h>
52 #include <linux/errno.h> 52 #include <linux/errno.h>
53 #include <linux/signal.h> 53 #include <linux/signal.h>
54 #include <linux/sched.h> 54 #include <linux/sched.h>
55 #include <linux/fs.h> 55 #include <linux/fs.h>
56 #include <linux/interrupt.h> 56 #include <linux/interrupt.h>
57 #include <linux/ioport.h> 57 #include <linux/ioport.h>
58 #include <linux/kernel.h> 58 #include <linux/kernel.h>
59 #include <linux/serial_reg.h> 59 #include <linux/serial_reg.h>
60 #include <linux/time.h> 60 #include <linux/time.h>
61 #include <linux/string.h> 61 #include <linux/string.h>
62 #include <linux/types.h> 62 #include <linux/types.h>
63 #include <linux/wait.h> 63 #include <linux/wait.h>
64 #include <linux/mm.h> 64 #include <linux/mm.h>
65 #include <linux/delay.h> 65 #include <linux/delay.h>
66 #include <linux/poll.h> 66 #include <linux/poll.h>
67 #include <linux/platform_device.h> 67 #include <linux/platform_device.h>
68 68
69 #include <asm/system.h> 69 #include <asm/system.h>
70 #include <linux/io.h> 70 #include <linux/io.h>
71 #include <linux/irq.h> 71 #include <linux/irq.h>
72 #include <linux/fcntl.h> 72 #include <linux/fcntl.h>
73 #include <linux/spinlock.h> 73 #include <linux/spinlock.h>
74 74
75 #ifdef CONFIG_LIRC_SERIAL_NSLU2 75 #ifdef CONFIG_LIRC_SERIAL_NSLU2
76 #include <asm/hardware.h> 76 #include <asm/hardware.h>
77 #endif 77 #endif
78 /* From Intel IXP42X Developer's Manual (#252480-005): */ 78 /* From Intel IXP42X Developer's Manual (#252480-005): */
79 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */ 79 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
80 #define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */ 80 #define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */
81 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */ 81 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
82 82
83 #include <media/lirc.h> 83 #include <media/lirc.h>
84 #include <media/lirc_dev.h> 84 #include <media/lirc_dev.h>
85 85
86 #define LIRC_DRIVER_NAME "lirc_serial" 86 #define LIRC_DRIVER_NAME "lirc_serial"
87 87
88 struct lirc_serial { 88 struct lirc_serial {
89 int signal_pin; 89 int signal_pin;
90 int signal_pin_change; 90 int signal_pin_change;
91 u8 on; 91 u8 on;
92 u8 off; 92 u8 off;
93 long (*send_pulse)(unsigned long length); 93 long (*send_pulse)(unsigned long length);
94 void (*send_space)(long length); 94 void (*send_space)(long length);
95 int features; 95 int features;
96 spinlock_t lock; 96 spinlock_t lock;
97 }; 97 };
98 98
99 #define LIRC_HOMEBREW 0 99 #define LIRC_HOMEBREW 0
100 #define LIRC_IRDEO 1 100 #define LIRC_IRDEO 1
101 #define LIRC_IRDEO_REMOTE 2 101 #define LIRC_IRDEO_REMOTE 2
102 #define LIRC_ANIMAX 3 102 #define LIRC_ANIMAX 3
103 #define LIRC_IGOR 4 103 #define LIRC_IGOR 4
104 #define LIRC_NSLU2 5 104 #define LIRC_NSLU2 5
105 105
106 /*** module parameters ***/ 106 /*** module parameters ***/
107 static int type; 107 static int type;
108 static int io; 108 static int io;
109 static int irq; 109 static int irq;
110 static int iommap; 110 static int iommap;
111 static int ioshift; 111 static int ioshift;
112 static int softcarrier = 1; 112 static int softcarrier = 1;
113 static int share_irq; 113 static int share_irq;
114 static int debug; 114 static int debug;
115 static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */ 115 static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
116 static int txsense; /* 0 = active high, 1 = active low */ 116 static int txsense; /* 0 = active high, 1 = active low */
117 117
118 #define dprintk(fmt, args...) \ 118 #define dprintk(fmt, args...) \
119 do { \ 119 do { \
120 if (debug) \ 120 if (debug) \
121 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \ 121 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
122 fmt, ## args); \ 122 fmt, ## args); \
123 } while (0) 123 } while (0)
124 124
125 /* forward declarations */ 125 /* forward declarations */
126 static long send_pulse_irdeo(unsigned long length); 126 static long send_pulse_irdeo(unsigned long length);
127 static long send_pulse_homebrew(unsigned long length); 127 static long send_pulse_homebrew(unsigned long length);
128 static void send_space_irdeo(long length); 128 static void send_space_irdeo(long length);
129 static void send_space_homebrew(long length); 129 static void send_space_homebrew(long length);
130 130
131 static struct lirc_serial hardware[] = { 131 static struct lirc_serial hardware[] = {
132 [LIRC_HOMEBREW] = { 132 [LIRC_HOMEBREW] = {
133 .signal_pin = UART_MSR_DCD, 133 .signal_pin = UART_MSR_DCD,
134 .signal_pin_change = UART_MSR_DDCD, 134 .signal_pin_change = UART_MSR_DDCD,
135 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR), 135 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
136 .off = (UART_MCR_RTS | UART_MCR_OUT2), 136 .off = (UART_MCR_RTS | UART_MCR_OUT2),
137 .send_pulse = send_pulse_homebrew, 137 .send_pulse = send_pulse_homebrew,
138 .send_space = send_space_homebrew, 138 .send_space = send_space_homebrew,
139 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER 139 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
140 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | 140 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
141 LIRC_CAN_SET_SEND_CARRIER | 141 LIRC_CAN_SET_SEND_CARRIER |
142 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) 142 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
143 #else 143 #else
144 .features = LIRC_CAN_REC_MODE2 144 .features = LIRC_CAN_REC_MODE2
145 #endif 145 #endif
146 }, 146 },
147 147
148 [LIRC_IRDEO] = { 148 [LIRC_IRDEO] = {
149 .signal_pin = UART_MSR_DSR, 149 .signal_pin = UART_MSR_DSR,
150 .signal_pin_change = UART_MSR_DDSR, 150 .signal_pin_change = UART_MSR_DDSR,
151 .on = UART_MCR_OUT2, 151 .on = UART_MCR_OUT2,
152 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), 152 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
153 .send_pulse = send_pulse_irdeo, 153 .send_pulse = send_pulse_irdeo,
154 .send_space = send_space_irdeo, 154 .send_space = send_space_irdeo,
155 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | 155 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
156 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) 156 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
157 }, 157 },
158 158
159 [LIRC_IRDEO_REMOTE] = { 159 [LIRC_IRDEO_REMOTE] = {
160 .signal_pin = UART_MSR_DSR, 160 .signal_pin = UART_MSR_DSR,
161 .signal_pin_change = UART_MSR_DDSR, 161 .signal_pin_change = UART_MSR_DDSR,
162 .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), 162 .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
163 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), 163 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
164 .send_pulse = send_pulse_irdeo, 164 .send_pulse = send_pulse_irdeo,
165 .send_space = send_space_irdeo, 165 .send_space = send_space_irdeo,
166 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | 166 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
167 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) 167 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
168 }, 168 },
169 169
170 [LIRC_ANIMAX] = { 170 [LIRC_ANIMAX] = {
171 .signal_pin = UART_MSR_DCD, 171 .signal_pin = UART_MSR_DCD,
172 .signal_pin_change = UART_MSR_DDCD, 172 .signal_pin_change = UART_MSR_DDCD,
173 .on = 0, 173 .on = 0,
174 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2), 174 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
175 .send_pulse = NULL, 175 .send_pulse = NULL,
176 .send_space = NULL, 176 .send_space = NULL,
177 .features = LIRC_CAN_REC_MODE2 177 .features = LIRC_CAN_REC_MODE2
178 }, 178 },
179 179
180 [LIRC_IGOR] = { 180 [LIRC_IGOR] = {
181 .signal_pin = UART_MSR_DSR, 181 .signal_pin = UART_MSR_DSR,
182 .signal_pin_change = UART_MSR_DDSR, 182 .signal_pin_change = UART_MSR_DDSR,
183 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR), 183 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
184 .off = (UART_MCR_RTS | UART_MCR_OUT2), 184 .off = (UART_MCR_RTS | UART_MCR_OUT2),
185 .send_pulse = send_pulse_homebrew, 185 .send_pulse = send_pulse_homebrew,
186 .send_space = send_space_homebrew, 186 .send_space = send_space_homebrew,
187 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER 187 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
188 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | 188 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
189 LIRC_CAN_SET_SEND_CARRIER | 189 LIRC_CAN_SET_SEND_CARRIER |
190 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) 190 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
191 #else 191 #else
192 .features = LIRC_CAN_REC_MODE2 192 .features = LIRC_CAN_REC_MODE2
193 #endif 193 #endif
194 }, 194 },
195 195
196 #ifdef CONFIG_LIRC_SERIAL_NSLU2 196 #ifdef CONFIG_LIRC_SERIAL_NSLU2
197 /* 197 /*
198 * Modified Linksys Network Storage Link USB 2.0 (NSLU2): 198 * Modified Linksys Network Storage Link USB 2.0 (NSLU2):
199 * We receive on CTS of the 2nd serial port (R142,LHS), we 199 * We receive on CTS of the 2nd serial port (R142,LHS), we
200 * transmit with a IR diode between GPIO[1] (green status LED), 200 * transmit with a IR diode between GPIO[1] (green status LED),
201 * and ground (Matthias Goebl <matthias.goebl@goebl.net>). 201 * and ground (Matthias Goebl <matthias.goebl@goebl.net>).
202 * See also http://www.nslu2-linux.org for this device 202 * See also http://www.nslu2-linux.org for this device
203 */ 203 */
204 [LIRC_NSLU2] = { 204 [LIRC_NSLU2] = {
205 .signal_pin = UART_MSR_CTS, 205 .signal_pin = UART_MSR_CTS,
206 .signal_pin_change = UART_MSR_DCTS, 206 .signal_pin_change = UART_MSR_DCTS,
207 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR), 207 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
208 .off = (UART_MCR_RTS | UART_MCR_OUT2), 208 .off = (UART_MCR_RTS | UART_MCR_OUT2),
209 .send_pulse = send_pulse_homebrew, 209 .send_pulse = send_pulse_homebrew,
210 .send_space = send_space_homebrew, 210 .send_space = send_space_homebrew,
211 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER 211 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
212 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE | 212 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
213 LIRC_CAN_SET_SEND_CARRIER | 213 LIRC_CAN_SET_SEND_CARRIER |
214 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2) 214 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
215 #else 215 #else
216 .features = LIRC_CAN_REC_MODE2 216 .features = LIRC_CAN_REC_MODE2
217 #endif 217 #endif
218 }, 218 },
219 #endif 219 #endif
220 220
221 }; 221 };
222 222
223 #define RS_ISR_PASS_LIMIT 256 223 #define RS_ISR_PASS_LIMIT 256
224 224
225 /* 225 /*
226 * A long pulse code from a remote might take up to 300 bytes. The 226 * A long pulse code from a remote might take up to 300 bytes. The
227 * daemon should read the bytes as soon as they are generated, so take 227 * daemon should read the bytes as soon as they are generated, so take
228 * the number of keys you think you can push before the daemon runs 228 * the number of keys you think you can push before the daemon runs
229 * and multiply by 300. The driver will warn you if you overrun this 229 * and multiply by 300. The driver will warn you if you overrun this
230 * buffer. If you have a slow computer or non-busmastering IDE disks, 230 * buffer. If you have a slow computer or non-busmastering IDE disks,
231 * maybe you will need to increase this. 231 * maybe you will need to increase this.
232 */ 232 */
233 233
234 /* This MUST be a power of two! It has to be larger than 1 as well. */ 234 /* This MUST be a power of two! It has to be larger than 1 as well. */
235 235
236 #define RBUF_LEN 256 236 #define RBUF_LEN 256
237 237
238 static struct timeval lasttv = {0, 0}; 238 static struct timeval lasttv = {0, 0};
239 239
240 static struct lirc_buffer rbuf; 240 static struct lirc_buffer rbuf;
241 241
242 static unsigned int freq = 38000; 242 static unsigned int freq = 38000;
243 static unsigned int duty_cycle = 50; 243 static unsigned int duty_cycle = 50;
244 244
245 /* Initialized in init_timing_params() */ 245 /* Initialized in init_timing_params() */
246 static unsigned long period; 246 static unsigned long period;
247 static unsigned long pulse_width; 247 static unsigned long pulse_width;
248 static unsigned long space_width; 248 static unsigned long space_width;
249 249
250 #if defined(__i386__) 250 #if defined(__i386__)
251 /* 251 /*
252 * From: 252 * From:
253 * Linux I/O port programming mini-HOWTO 253 * Linux I/O port programming mini-HOWTO
254 * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi> 254 * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
255 * v, 28 December 1997 255 * v, 28 December 1997
256 * 256 *
257 * [...] 257 * [...]
258 * Actually, a port I/O instruction on most ports in the 0-0x3ff range 258 * Actually, a port I/O instruction on most ports in the 0-0x3ff range
259 * takes almost exactly 1 microsecond, so if you're, for example, using 259 * takes almost exactly 1 microsecond, so if you're, for example, using
260 * the parallel port directly, just do additional inb()s from that port 260 * the parallel port directly, just do additional inb()s from that port
261 * to delay. 261 * to delay.
262 * [...] 262 * [...]
263 */ 263 */
264 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from 264 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
265 * comment above plus trimming to match actual measured frequency. 265 * comment above plus trimming to match actual measured frequency.
266 * This will be sensitive to cpu speed, though hopefully most of the 1.5us 266 * This will be sensitive to cpu speed, though hopefully most of the 1.5us
267 * is spent in the uart access. Still - for reference test machine was a 267 * is spent in the uart access. Still - for reference test machine was a
268 * 1.13GHz Athlon system - Steve 268 * 1.13GHz Athlon system - Steve
269 */ 269 */
270 270
271 /* 271 /*
272 * changed from 400 to 450 as this works better on slower machines; 272 * changed from 400 to 450 as this works better on slower machines;
273 * faster machines will use the rdtsc code anyway 273 * faster machines will use the rdtsc code anyway
274 */ 274 */
275 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450 275 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
276 276
277 #else 277 #else
278 278
279 /* does anybody have information on other platforms ? */ 279 /* does anybody have information on other platforms ? */
280 /* 256 = 1<<8 */ 280 /* 256 = 1<<8 */
281 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256 281 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
282 282
283 #endif /* __i386__ */ 283 #endif /* __i386__ */
284 /* 284 /*
285 * FIXME: should we be using hrtimers instead of this 285 * FIXME: should we be using hrtimers instead of this
286 * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense? 286 * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
287 */ 287 */
288 288
289 /* fetch serial input packet (1 byte) from register offset */ 289 /* fetch serial input packet (1 byte) from register offset */
290 static u8 sinp(int offset) 290 static u8 sinp(int offset)
291 { 291 {
292 if (iommap != 0) 292 if (iommap != 0)
293 /* the register is memory-mapped */ 293 /* the register is memory-mapped */
294 offset <<= ioshift; 294 offset <<= ioshift;
295 295
296 return inb(io + offset); 296 return inb(io + offset);
297 } 297 }
298 298
299 /* write serial output packet (1 byte) of value to register offset */ 299 /* write serial output packet (1 byte) of value to register offset */
300 static void soutp(int offset, u8 value) 300 static void soutp(int offset, u8 value)
301 { 301 {
302 if (iommap != 0) 302 if (iommap != 0)
303 /* the register is memory-mapped */ 303 /* the register is memory-mapped */
304 offset <<= ioshift; 304 offset <<= ioshift;
305 305
306 outb(value, io + offset); 306 outb(value, io + offset);
307 } 307 }
308 308
309 static void on(void) 309 static void on(void)
310 { 310 {
311 #ifdef CONFIG_LIRC_SERIAL_NSLU2 311 #ifdef CONFIG_LIRC_SERIAL_NSLU2
312 /* 312 /*
313 * On NSLU2, we put the transmit diode between the output of the green 313 * On NSLU2, we put the transmit diode between the output of the green
314 * status LED and ground 314 * status LED and ground
315 */ 315 */
316 if (type == LIRC_NSLU2) { 316 if (type == LIRC_NSLU2) {
317 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW); 317 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_LOW);
318 return; 318 return;
319 } 319 }
320 #endif 320 #endif
321 if (txsense) 321 if (txsense)
322 soutp(UART_MCR, hardware[type].off); 322 soutp(UART_MCR, hardware[type].off);
323 else 323 else
324 soutp(UART_MCR, hardware[type].on); 324 soutp(UART_MCR, hardware[type].on);
325 } 325 }
326 326
327 static void off(void) 327 static void off(void)
328 { 328 {
329 #ifdef CONFIG_LIRC_SERIAL_NSLU2 329 #ifdef CONFIG_LIRC_SERIAL_NSLU2
330 if (type == LIRC_NSLU2) { 330 if (type == LIRC_NSLU2) {
331 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH); 331 gpio_line_set(NSLU2_LED_GRN, IXP4XX_GPIO_HIGH);
332 return; 332 return;
333 } 333 }
334 #endif 334 #endif
335 if (txsense) 335 if (txsense)
336 soutp(UART_MCR, hardware[type].on); 336 soutp(UART_MCR, hardware[type].on);
337 else 337 else
338 soutp(UART_MCR, hardware[type].off); 338 soutp(UART_MCR, hardware[type].off);
339 } 339 }
340 340
341 #ifndef MAX_UDELAY_MS 341 #ifndef MAX_UDELAY_MS
342 #define MAX_UDELAY_US 5000 342 #define MAX_UDELAY_US 5000
343 #else 343 #else
344 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000) 344 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
345 #endif 345 #endif
346 346
347 static void safe_udelay(unsigned long usecs) 347 static void safe_udelay(unsigned long usecs)
348 { 348 {
349 while (usecs > MAX_UDELAY_US) { 349 while (usecs > MAX_UDELAY_US) {
350 udelay(MAX_UDELAY_US); 350 udelay(MAX_UDELAY_US);
351 usecs -= MAX_UDELAY_US; 351 usecs -= MAX_UDELAY_US;
352 } 352 }
353 udelay(usecs); 353 udelay(usecs);
354 } 354 }
355 355
356 #ifdef USE_RDTSC 356 #ifdef USE_RDTSC
357 /* 357 /*
358 * This is an overflow/precision juggle, complicated in that we can't 358 * This is an overflow/precision juggle, complicated in that we can't
359 * do long long divide in the kernel 359 * do long long divide in the kernel
360 */ 360 */
361 361
362 /* 362 /*
363 * When we use the rdtsc instruction to measure clocks, we keep the 363 * When we use the rdtsc instruction to measure clocks, we keep the
364 * pulse and space widths as clock cycles. As this is CPU speed 364 * pulse and space widths as clock cycles. As this is CPU speed
365 * dependent, the widths must be calculated in init_port and ioctl 365 * dependent, the widths must be calculated in init_port and ioctl
366 * time 366 * time
367 */ 367 */
368 368
369 /* So send_pulse can quickly convert microseconds to clocks */ 369 /* So send_pulse can quickly convert microseconds to clocks */
370 static unsigned long conv_us_to_clocks; 370 static unsigned long conv_us_to_clocks;
371 371
372 static int init_timing_params(unsigned int new_duty_cycle, 372 static int init_timing_params(unsigned int new_duty_cycle,
373 unsigned int new_freq) 373 unsigned int new_freq)
374 { 374 {
375 __u64 loops_per_sec, work; 375 __u64 loops_per_sec, work;
376 376
377 duty_cycle = new_duty_cycle; 377 duty_cycle = new_duty_cycle;
378 freq = new_freq; 378 freq = new_freq;
379 379
380 loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy); 380 loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
381 loops_per_sec *= HZ; 381 loops_per_sec *= HZ;
382 382
383 /* How many clocks in a microsecond?, avoiding long long divide */ 383 /* How many clocks in a microsecond?, avoiding long long divide */
384 work = loops_per_sec; 384 work = loops_per_sec;
385 work *= 4295; /* 4295 = 2^32 / 1e6 */ 385 work *= 4295; /* 4295 = 2^32 / 1e6 */
386 conv_us_to_clocks = (work >> 32); 386 conv_us_to_clocks = (work >> 32);
387 387
388 /* 388 /*
389 * Carrier period in clocks, approach good up to 32GHz clock, 389 * Carrier period in clocks, approach good up to 32GHz clock,
390 * gets carrier frequency within 8Hz 390 * gets carrier frequency within 8Hz
391 */ 391 */
392 period = loops_per_sec >> 3; 392 period = loops_per_sec >> 3;
393 period /= (freq >> 3); 393 period /= (freq >> 3);
394 394
395 /* Derive pulse and space from the period */ 395 /* Derive pulse and space from the period */
396 pulse_width = period * duty_cycle / 100; 396 pulse_width = period * duty_cycle / 100;
397 space_width = period - pulse_width; 397 space_width = period - pulse_width;
398 dprintk("in init_timing_params, freq=%d, duty_cycle=%d, " 398 dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
399 "clk/jiffy=%ld, pulse=%ld, space=%ld, " 399 "clk/jiffy=%ld, pulse=%ld, space=%ld, "
400 "conv_us_to_clocks=%ld\n", 400 "conv_us_to_clocks=%ld\n",
401 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy), 401 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
402 pulse_width, space_width, conv_us_to_clocks); 402 pulse_width, space_width, conv_us_to_clocks);
403 return 0; 403 return 0;
404 } 404 }
405 #else /* ! USE_RDTSC */ 405 #else /* ! USE_RDTSC */
406 static int init_timing_params(unsigned int new_duty_cycle, 406 static int init_timing_params(unsigned int new_duty_cycle,
407 unsigned int new_freq) 407 unsigned int new_freq)
408 { 408 {
409 /* 409 /*
410 * period, pulse/space width are kept with 8 binary places - 410 * period, pulse/space width are kept with 8 binary places -
411 * IE multiplied by 256. 411 * IE multiplied by 256.
412 */ 412 */
413 if (256 * 1000000L / new_freq * new_duty_cycle / 100 <= 413 if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
414 LIRC_SERIAL_TRANSMITTER_LATENCY) 414 LIRC_SERIAL_TRANSMITTER_LATENCY)
415 return -EINVAL; 415 return -EINVAL;
416 if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <= 416 if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
417 LIRC_SERIAL_TRANSMITTER_LATENCY) 417 LIRC_SERIAL_TRANSMITTER_LATENCY)
418 return -EINVAL; 418 return -EINVAL;
419 duty_cycle = new_duty_cycle; 419 duty_cycle = new_duty_cycle;
420 freq = new_freq; 420 freq = new_freq;
421 period = 256 * 1000000L / freq; 421 period = 256 * 1000000L / freq;
422 pulse_width = period * duty_cycle / 100; 422 pulse_width = period * duty_cycle / 100;
423 space_width = period - pulse_width; 423 space_width = period - pulse_width;
424 dprintk("in init_timing_params, freq=%d pulse=%ld, " 424 dprintk("in init_timing_params, freq=%d pulse=%ld, "
425 "space=%ld\n", freq, pulse_width, space_width); 425 "space=%ld\n", freq, pulse_width, space_width);
426 return 0; 426 return 0;
427 } 427 }
428 #endif /* USE_RDTSC */ 428 #endif /* USE_RDTSC */
429 429
430 430
431 /* return value: space length delta */ 431 /* return value: space length delta */
432 432
433 static long send_pulse_irdeo(unsigned long length) 433 static long send_pulse_irdeo(unsigned long length)
434 { 434 {
435 long rawbits, ret; 435 long rawbits, ret;
436 int i; 436 int i;
437 unsigned char output; 437 unsigned char output;
438 unsigned char chunk, shifted; 438 unsigned char chunk, shifted;
439 439
440 /* how many bits have to be sent ? */ 440 /* how many bits have to be sent ? */
441 rawbits = length * 1152 / 10000; 441 rawbits = length * 1152 / 10000;
442 if (duty_cycle > 50) 442 if (duty_cycle > 50)
443 chunk = 3; 443 chunk = 3;
444 else 444 else
445 chunk = 1; 445 chunk = 1;
446 for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) { 446 for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
447 shifted = chunk << (i * 3); 447 shifted = chunk << (i * 3);
448 shifted >>= 1; 448 shifted >>= 1;
449 output &= (~shifted); 449 output &= (~shifted);
450 i++; 450 i++;
451 if (i == 3) { 451 if (i == 3) {
452 soutp(UART_TX, output); 452 soutp(UART_TX, output);
453 while (!(sinp(UART_LSR) & UART_LSR_THRE)) 453 while (!(sinp(UART_LSR) & UART_LSR_THRE))
454 ; 454 ;
455 output = 0x7f; 455 output = 0x7f;
456 i = 0; 456 i = 0;
457 } 457 }
458 } 458 }
459 if (i != 0) { 459 if (i != 0) {
460 soutp(UART_TX, output); 460 soutp(UART_TX, output);
461 while (!(sinp(UART_LSR) & UART_LSR_TEMT)) 461 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
462 ; 462 ;
463 } 463 }
464 464
465 if (i == 0) 465 if (i == 0)
466 ret = (-rawbits) * 10000 / 1152; 466 ret = (-rawbits) * 10000 / 1152;
467 else 467 else
468 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152; 468 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
469 469
470 return ret; 470 return ret;
471 } 471 }
472 472
473 #ifdef USE_RDTSC 473 #ifdef USE_RDTSC
474 /* Version that uses Pentium rdtsc instruction to measure clocks */ 474 /* Version that uses Pentium rdtsc instruction to measure clocks */
475 475
476 /* 476 /*
477 * This version does sub-microsecond timing using rdtsc instruction, 477 * This version does sub-microsecond timing using rdtsc instruction,
478 * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY 478 * and does away with the fudged LIRC_SERIAL_TRANSMITTER_LATENCY
479 * Implicitly i586 architecture... - Steve 479 * Implicitly i586 architecture... - Steve
480 */ 480 */
481 481
482 static long send_pulse_homebrew_softcarrier(unsigned long length) 482 static long send_pulse_homebrew_softcarrier(unsigned long length)
483 { 483 {
484 int flag; 484 int flag;
485 unsigned long target, start, now; 485 unsigned long target, start, now;
486 486
487 /* Get going quick as we can */ 487 /* Get going quick as we can */
488 rdtscl(start); 488 rdtscl(start);
489 on(); 489 on();
490 /* Convert length from microseconds to clocks */ 490 /* Convert length from microseconds to clocks */
491 length *= conv_us_to_clocks; 491 length *= conv_us_to_clocks;
492 /* And loop till time is up - flipping at right intervals */ 492 /* And loop till time is up - flipping at right intervals */
493 now = start; 493 now = start;
494 target = pulse_width; 494 target = pulse_width;
495 flag = 1; 495 flag = 1;
496 /* 496 /*
497 * FIXME: This looks like a hard busy wait, without even an occasional, 497 * FIXME: This looks like a hard busy wait, without even an occasional,
498 * polite, cpu_relax() call. There's got to be a better way? 498 * polite, cpu_relax() call. There's got to be a better way?
499 * 499 *
500 * The i2c code has the result of a lot of bit-banging work, I wonder if 500 * The i2c code has the result of a lot of bit-banging work, I wonder if
501 * there's something there which could be helpful here. 501 * there's something there which could be helpful here.
502 */ 502 */
503 while ((now - start) < length) { 503 while ((now - start) < length) {
504 /* Delay till flip time */ 504 /* Delay till flip time */
505 do { 505 do {
506 rdtscl(now); 506 rdtscl(now);
507 } while ((now - start) < target); 507 } while ((now - start) < target);
508 508
509 /* flip */ 509 /* flip */
510 if (flag) { 510 if (flag) {
511 rdtscl(now); 511 rdtscl(now);
512 off(); 512 off();
513 target += space_width; 513 target += space_width;
514 } else { 514 } else {
515 rdtscl(now); on(); 515 rdtscl(now); on();
516 target += pulse_width; 516 target += pulse_width;
517 } 517 }
518 flag = !flag; 518 flag = !flag;
519 } 519 }
520 rdtscl(now); 520 rdtscl(now);
521 return ((now - start) - length) / conv_us_to_clocks; 521 return ((now - start) - length) / conv_us_to_clocks;
522 } 522 }
523 #else /* ! USE_RDTSC */ 523 #else /* ! USE_RDTSC */
524 /* Version using udelay() */ 524 /* Version using udelay() */
525 525
526 /* 526 /*
527 * here we use fixed point arithmetic, with 8 527 * here we use fixed point arithmetic, with 8
528 * fractional bits. that gets us within 0.1% or so of the right average 528 * fractional bits. that gets us within 0.1% or so of the right average
529 * frequency, albeit with some jitter in pulse length - Steve 529 * frequency, albeit with some jitter in pulse length - Steve
530 */ 530 */
531 531
532 /* To match 8 fractional bits used for pulse/space length */ 532 /* To match 8 fractional bits used for pulse/space length */
533 533
534 static long send_pulse_homebrew_softcarrier(unsigned long length) 534 static long send_pulse_homebrew_softcarrier(unsigned long length)
535 { 535 {
536 int flag; 536 int flag;
537 unsigned long actual, target, d; 537 unsigned long actual, target, d;
538 length <<= 8; 538 length <<= 8;
539 539
540 actual = 0; target = 0; flag = 0; 540 actual = 0; target = 0; flag = 0;
541 while (actual < length) { 541 while (actual < length) {
542 if (flag) { 542 if (flag) {
543 off(); 543 off();
544 target += space_width; 544 target += space_width;
545 } else { 545 } else {
546 on(); 546 on();
547 target += pulse_width; 547 target += pulse_width;
548 } 548 }
549 d = (target - actual - 549 d = (target - actual -
550 LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8; 550 LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
551 /* 551 /*
552 * Note - we've checked in ioctl that the pulse/space 552 * Note - we've checked in ioctl that the pulse/space
553 * widths are big enough so that d is > 0 553 * widths are big enough so that d is > 0
554 */ 554 */
555 udelay(d); 555 udelay(d);
556 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY; 556 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
557 flag = !flag; 557 flag = !flag;
558 } 558 }
559 return (actual-length) >> 8; 559 return (actual-length) >> 8;
560 } 560 }
561 #endif /* USE_RDTSC */ 561 #endif /* USE_RDTSC */
562 562
563 static long send_pulse_homebrew(unsigned long length) 563 static long send_pulse_homebrew(unsigned long length)
564 { 564 {
565 if (length <= 0) 565 if (length <= 0)
566 return 0; 566 return 0;
567 567
568 if (softcarrier) 568 if (softcarrier)
569 return send_pulse_homebrew_softcarrier(length); 569 return send_pulse_homebrew_softcarrier(length);
570 else { 570 else {
571 on(); 571 on();
572 safe_udelay(length); 572 safe_udelay(length);
573 return 0; 573 return 0;
574 } 574 }
575 } 575 }
576 576
577 static void send_space_irdeo(long length) 577 static void send_space_irdeo(long length)
578 { 578 {
579 if (length <= 0) 579 if (length <= 0)
580 return; 580 return;
581 581
582 safe_udelay(length); 582 safe_udelay(length);
583 } 583 }
584 584
585 static void send_space_homebrew(long length) 585 static void send_space_homebrew(long length)
586 { 586 {
587 off(); 587 off();
588 if (length <= 0) 588 if (length <= 0)
589 return; 589 return;
590 safe_udelay(length); 590 safe_udelay(length);
591 } 591 }
592 592
593 static void rbwrite(int l) 593 static void rbwrite(int l)
594 { 594 {
595 if (lirc_buffer_full(&rbuf)) { 595 if (lirc_buffer_full(&rbuf)) {
596 /* no new signals will be accepted */ 596 /* no new signals will be accepted */
597 dprintk("Buffer overrun\n"); 597 dprintk("Buffer overrun\n");
598 return; 598 return;
599 } 599 }
600 lirc_buffer_write(&rbuf, (void *)&l); 600 lirc_buffer_write(&rbuf, (void *)&l);
601 } 601 }
602 602
603 static void frbwrite(int l) 603 static void frbwrite(int l)
604 { 604 {
605 /* simple noise filter */ 605 /* simple noise filter */
606 static int pulse, space; 606 static int pulse, space;
607 static unsigned int ptr; 607 static unsigned int ptr;
608 608
609 if (ptr > 0 && (l & PULSE_BIT)) { 609 if (ptr > 0 && (l & PULSE_BIT)) {
610 pulse += l & PULSE_MASK; 610 pulse += l & PULSE_MASK;
611 if (pulse > 250) { 611 if (pulse > 250) {
612 rbwrite(space); 612 rbwrite(space);
613 rbwrite(pulse | PULSE_BIT); 613 rbwrite(pulse | PULSE_BIT);
614 ptr = 0; 614 ptr = 0;
615 pulse = 0; 615 pulse = 0;
616 } 616 }
617 return; 617 return;
618 } 618 }
619 if (!(l & PULSE_BIT)) { 619 if (!(l & PULSE_BIT)) {
620 if (ptr == 0) { 620 if (ptr == 0) {
621 if (l > 20000) { 621 if (l > 20000) {
622 space = l; 622 space = l;
623 ptr++; 623 ptr++;
624 return; 624 return;
625 } 625 }
626 } else { 626 } else {
627 if (l > 20000) { 627 if (l > 20000) {
628 space += pulse; 628 space += pulse;
629 if (space > PULSE_MASK) 629 if (space > PULSE_MASK)
630 space = PULSE_MASK; 630 space = PULSE_MASK;
631 space += l; 631 space += l;
632 if (space > PULSE_MASK) 632 if (space > PULSE_MASK)
633 space = PULSE_MASK; 633 space = PULSE_MASK;
634 pulse = 0; 634 pulse = 0;
635 return; 635 return;
636 } 636 }
637 rbwrite(space); 637 rbwrite(space);
638 rbwrite(pulse | PULSE_BIT); 638 rbwrite(pulse | PULSE_BIT);
639 ptr = 0; 639 ptr = 0;
640 pulse = 0; 640 pulse = 0;
641 } 641 }
642 } 642 }
643 rbwrite(l); 643 rbwrite(l);
644 } 644 }
645 645
646 static irqreturn_t irq_handler(int i, void *blah) 646 static irqreturn_t irq_handler(int i, void *blah)
647 { 647 {
648 struct timeval tv; 648 struct timeval tv;
649 int counter, dcd; 649 int counter, dcd;
650 u8 status; 650 u8 status;
651 long deltv; 651 long deltv;
652 int data; 652 int data;
653 static int last_dcd = -1; 653 static int last_dcd = -1;
654 654
655 if ((sinp(UART_IIR) & UART_IIR_NO_INT)) { 655 if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
656 /* not our interrupt */ 656 /* not our interrupt */
657 return IRQ_NONE; 657 return IRQ_NONE;
658 } 658 }
659 659
660 counter = 0; 660 counter = 0;
661 do { 661 do {
662 counter++; 662 counter++;
663 status = sinp(UART_MSR); 663 status = sinp(UART_MSR);
664 if (counter > RS_ISR_PASS_LIMIT) { 664 if (counter > RS_ISR_PASS_LIMIT) {
665 printk(KERN_WARNING LIRC_DRIVER_NAME ": AIEEEE: " 665 printk(KERN_WARNING LIRC_DRIVER_NAME ": AIEEEE: "
666 "We're caught!\n"); 666 "We're caught!\n");
667 break; 667 break;
668 } 668 }
669 if ((status & hardware[type].signal_pin_change) 669 if ((status & hardware[type].signal_pin_change)
670 && sense != -1) { 670 && sense != -1) {
671 /* get current time */ 671 /* get current time */
672 do_gettimeofday(&tv); 672 do_gettimeofday(&tv);
673 673
674 /* New mode, written by Trent Piepho 674 /* New mode, written by Trent Piepho
675 <xyzzy@u.washington.edu>. */ 675 <xyzzy@u.washington.edu>. */
676 676
677 /* 677 /*
678 * The old format was not very portable. 678 * The old format was not very portable.
679 * We now use an int to pass pulses 679 * We now use an int to pass pulses
680 * and spaces to user space. 680 * and spaces to user space.
681 * 681 *
682 * If PULSE_BIT is set a pulse has been 682 * If PULSE_BIT is set a pulse has been
683 * received, otherwise a space has been 683 * received, otherwise a space has been
684 * received. The driver needs to know if your 684 * received. The driver needs to know if your
685 * receiver is active high or active low, or 685 * receiver is active high or active low, or
686 * the space/pulse sense could be 686 * the space/pulse sense could be
687 * inverted. The bits denoted by PULSE_MASK are 687 * inverted. The bits denoted by PULSE_MASK are
688 * the length in microseconds. Lengths greater 688 * the length in microseconds. Lengths greater
689 * than or equal to 16 seconds are clamped to 689 * than or equal to 16 seconds are clamped to
690 * PULSE_MASK. All other bits are unused. 690 * PULSE_MASK. All other bits are unused.
691 * This is a much simpler interface for user 691 * This is a much simpler interface for user
692 * programs, as well as eliminating "out of 692 * programs, as well as eliminating "out of
693 * phase" errors with space/pulse 693 * phase" errors with space/pulse
694 * autodetection. 694 * autodetection.
695 */ 695 */
696 696
697 /* calc time since last interrupt in microseconds */ 697 /* calc time since last interrupt in microseconds */
698 dcd = (status & hardware[type].signal_pin) ? 1 : 0; 698 dcd = (status & hardware[type].signal_pin) ? 1 : 0;
699 699
700 if (dcd == last_dcd) { 700 if (dcd == last_dcd) {
701 printk(KERN_WARNING LIRC_DRIVER_NAME 701 printk(KERN_WARNING LIRC_DRIVER_NAME
702 ": ignoring spike: %d %d %lx %lx %lx %lx\n", 702 ": ignoring spike: %d %d %lx %lx %lx %lx\n",
703 dcd, sense, 703 dcd, sense,
704 tv.tv_sec, lasttv.tv_sec, 704 tv.tv_sec, lasttv.tv_sec,
705 tv.tv_usec, lasttv.tv_usec); 705 tv.tv_usec, lasttv.tv_usec);
706 continue; 706 continue;
707 } 707 }
708 708
709 deltv = tv.tv_sec-lasttv.tv_sec; 709 deltv = tv.tv_sec-lasttv.tv_sec;
710 if (tv.tv_sec < lasttv.tv_sec || 710 if (tv.tv_sec < lasttv.tv_sec ||
711 (tv.tv_sec == lasttv.tv_sec && 711 (tv.tv_sec == lasttv.tv_sec &&
712 tv.tv_usec < lasttv.tv_usec)) { 712 tv.tv_usec < lasttv.tv_usec)) {
713 printk(KERN_WARNING LIRC_DRIVER_NAME 713 printk(KERN_WARNING LIRC_DRIVER_NAME
714 ": AIEEEE: your clock just jumped " 714 ": AIEEEE: your clock just jumped "
715 "backwards\n"); 715 "backwards\n");
716 printk(KERN_WARNING LIRC_DRIVER_NAME 716 printk(KERN_WARNING LIRC_DRIVER_NAME
717 ": %d %d %lx %lx %lx %lx\n", 717 ": %d %d %lx %lx %lx %lx\n",
718 dcd, sense, 718 dcd, sense,
719 tv.tv_sec, lasttv.tv_sec, 719 tv.tv_sec, lasttv.tv_sec,
720 tv.tv_usec, lasttv.tv_usec); 720 tv.tv_usec, lasttv.tv_usec);
721 data = PULSE_MASK; 721 data = PULSE_MASK;
722 } else if (deltv > 15) { 722 } else if (deltv > 15) {
723 data = PULSE_MASK; /* really long time */ 723 data = PULSE_MASK; /* really long time */
724 if (!(dcd^sense)) { 724 if (!(dcd^sense)) {
725 /* sanity check */ 725 /* sanity check */
726 printk(KERN_WARNING LIRC_DRIVER_NAME 726 printk(KERN_WARNING LIRC_DRIVER_NAME
727 ": AIEEEE: " 727 ": AIEEEE: "
728 "%d %d %lx %lx %lx %lx\n", 728 "%d %d %lx %lx %lx %lx\n",
729 dcd, sense, 729 dcd, sense,
730 tv.tv_sec, lasttv.tv_sec, 730 tv.tv_sec, lasttv.tv_sec,
731 tv.tv_usec, lasttv.tv_usec); 731 tv.tv_usec, lasttv.tv_usec);
732 /* 732 /*
733 * detecting pulse while this 733 * detecting pulse while this
734 * MUST be a space! 734 * MUST be a space!
735 */ 735 */
736 sense = sense ? 0 : 1; 736 sense = sense ? 0 : 1;
737 } 737 }
738 } else 738 } else
739 data = (int) (deltv*1000000 + 739 data = (int) (deltv*1000000 +
740 tv.tv_usec - 740 tv.tv_usec -
741 lasttv.tv_usec); 741 lasttv.tv_usec);
742 frbwrite(dcd^sense ? data : (data|PULSE_BIT)); 742 frbwrite(dcd^sense ? data : (data|PULSE_BIT));
743 lasttv = tv; 743 lasttv = tv;
744 last_dcd = dcd; 744 last_dcd = dcd;
745 wake_up_interruptible(&rbuf.wait_poll); 745 wake_up_interruptible(&rbuf.wait_poll);
746 } 746 }
747 } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */ 747 } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
748 return IRQ_HANDLED; 748 return IRQ_HANDLED;
749 } 749 }
750 750
751 751
752 static int hardware_init_port(void) 752 static int hardware_init_port(void)
753 { 753 {
754 u8 scratch, scratch2, scratch3; 754 u8 scratch, scratch2, scratch3;
755 755
756 /* 756 /*
757 * This is a simple port existence test, borrowed from the autoconfig 757 * This is a simple port existence test, borrowed from the autoconfig
758 * function in drivers/serial/8250.c 758 * function in drivers/serial/8250.c
759 */ 759 */
760 scratch = sinp(UART_IER); 760 scratch = sinp(UART_IER);
761 soutp(UART_IER, 0); 761 soutp(UART_IER, 0);
762 #ifdef __i386__ 762 #ifdef __i386__
763 outb(0xff, 0x080); 763 outb(0xff, 0x080);
764 #endif 764 #endif
765 scratch2 = sinp(UART_IER) & 0x0f; 765 scratch2 = sinp(UART_IER) & 0x0f;
766 soutp(UART_IER, 0x0f); 766 soutp(UART_IER, 0x0f);
767 #ifdef __i386__ 767 #ifdef __i386__
768 outb(0x00, 0x080); 768 outb(0x00, 0x080);
769 #endif 769 #endif
770 scratch3 = sinp(UART_IER) & 0x0f; 770 scratch3 = sinp(UART_IER) & 0x0f;
771 soutp(UART_IER, scratch); 771 soutp(UART_IER, scratch);
772 if (scratch2 != 0 || scratch3 != 0x0f) { 772 if (scratch2 != 0 || scratch3 != 0x0f) {
773 /* we fail, there's nothing here */ 773 /* we fail, there's nothing here */
774 printk(KERN_ERR LIRC_DRIVER_NAME ": port existence test " 774 printk(KERN_ERR LIRC_DRIVER_NAME ": port existence test "
775 "failed, cannot continue\n"); 775 "failed, cannot continue\n");
776 return -EINVAL; 776 return -EINVAL;
777 } 777 }
778 778
779 779
780 780
781 /* Set DLAB 0. */ 781 /* Set DLAB 0. */
782 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); 782 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
783 783
784 /* First of all, disable all interrupts */ 784 /* First of all, disable all interrupts */
785 soutp(UART_IER, sinp(UART_IER) & 785 soutp(UART_IER, sinp(UART_IER) &
786 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); 786 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
787 787
788 /* Clear registers. */ 788 /* Clear registers. */
789 sinp(UART_LSR); 789 sinp(UART_LSR);
790 sinp(UART_RX); 790 sinp(UART_RX);
791 sinp(UART_IIR); 791 sinp(UART_IIR);
792 sinp(UART_MSR); 792 sinp(UART_MSR);
793 793
794 #ifdef CONFIG_LIRC_SERIAL_NSLU2 794 #ifdef CONFIG_LIRC_SERIAL_NSLU2
795 if (type == LIRC_NSLU2) { 795 if (type == LIRC_NSLU2) {
796 /* Setup NSLU2 UART */ 796 /* Setup NSLU2 UART */
797 797
798 /* Enable UART */ 798 /* Enable UART */
799 soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE); 799 soutp(UART_IER, sinp(UART_IER) | UART_IE_IXP42X_UUE);
800 /* Disable Receiver data Time out interrupt */ 800 /* Disable Receiver data Time out interrupt */
801 soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE); 801 soutp(UART_IER, sinp(UART_IER) & ~UART_IE_IXP42X_RTOIE);
802 /* set out2 = interrupt unmask; off() doesn't set MCR 802 /* set out2 = interrupt unmask; off() doesn't set MCR
803 on NSLU2 */ 803 on NSLU2 */
804 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2); 804 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
805 } 805 }
806 #endif 806 #endif
807 807
808 /* Set line for power source */ 808 /* Set line for power source */
809 off(); 809 off();
810 810
811 /* Clear registers again to be sure. */ 811 /* Clear registers again to be sure. */
812 sinp(UART_LSR); 812 sinp(UART_LSR);
813 sinp(UART_RX); 813 sinp(UART_RX);
814 sinp(UART_IIR); 814 sinp(UART_IIR);
815 sinp(UART_MSR); 815 sinp(UART_MSR);
816 816
817 switch (type) { 817 switch (type) {
818 case LIRC_IRDEO: 818 case LIRC_IRDEO:
819 case LIRC_IRDEO_REMOTE: 819 case LIRC_IRDEO_REMOTE:
820 /* setup port to 7N1 @ 115200 Baud */ 820 /* setup port to 7N1 @ 115200 Baud */
821 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */ 821 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
822 822
823 /* Set DLAB 1. */ 823 /* Set DLAB 1. */
824 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB); 824 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
825 /* Set divisor to 1 => 115200 Baud */ 825 /* Set divisor to 1 => 115200 Baud */
826 soutp(UART_DLM, 0); 826 soutp(UART_DLM, 0);
827 soutp(UART_DLL, 1); 827 soutp(UART_DLL, 1);
828 /* Set DLAB 0 + 7N1 */ 828 /* Set DLAB 0 + 7N1 */
829 soutp(UART_LCR, UART_LCR_WLEN7); 829 soutp(UART_LCR, UART_LCR_WLEN7);
830 /* THR interrupt already disabled at this point */ 830 /* THR interrupt already disabled at this point */
831 break; 831 break;
832 default: 832 default:
833 break; 833 break;
834 } 834 }
835 835
836 return 0; 836 return 0;
837 } 837 }
838 838
839 static int __devinit lirc_serial_probe(struct platform_device *dev) 839 static int __devinit lirc_serial_probe(struct platform_device *dev)
840 { 840 {
841 int i, nlow, nhigh, result; 841 int i, nlow, nhigh, result;
842 842
843 result = request_irq(irq, irq_handler, 843 result = request_irq(irq, irq_handler,
844 (share_irq ? IRQF_SHARED : 0), 844 (share_irq ? IRQF_SHARED : 0),
845 LIRC_DRIVER_NAME, (void *)&hardware); 845 LIRC_DRIVER_NAME, (void *)&hardware);
846 846 if (result < 0) {
847 switch (result) { 847 if (result == -EBUSY)
848 case -EBUSY: 848 printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n",
849 printk(KERN_ERR LIRC_DRIVER_NAME ": IRQ %d busy\n", irq); 849 irq);
850 return -EBUSY; 850 else if (result == -EINVAL)
851 case -EINVAL: 851 printk(KERN_ERR LIRC_DRIVER_NAME
852 printk(KERN_ERR LIRC_DRIVER_NAME 852 ": Bad irq number or handler\n");
853 ": Bad irq number or handler\n"); 853 return result;
854 return -EINVAL; 854 }
855 default:
856 break;
857 };
858 855
859 /* Reserve io region. */ 856 /* Reserve io region. */
860 /* 857 /*
861 * Future MMAP-Developers: Attention! 858 * Future MMAP-Developers: Attention!
862 * For memory mapped I/O you *might* need to use ioremap() first, 859 * For memory mapped I/O you *might* need to use ioremap() first,
863 * for the NSLU2 it's done in boot code. 860 * for the NSLU2 it's done in boot code.
864 */ 861 */
865 if (((iommap != 0) 862 if (((iommap != 0)
866 && (request_mem_region(iommap, 8 << ioshift, 863 && (request_mem_region(iommap, 8 << ioshift,
867 LIRC_DRIVER_NAME) == NULL)) 864 LIRC_DRIVER_NAME) == NULL))
868 || ((iommap == 0) 865 || ((iommap == 0)
869 && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) { 866 && (request_region(io, 8, LIRC_DRIVER_NAME) == NULL))) {
870 printk(KERN_ERR LIRC_DRIVER_NAME 867 printk(KERN_ERR LIRC_DRIVER_NAME
871 ": port %04x already in use\n", io); 868 ": port %04x already in use\n", io);
872 printk(KERN_WARNING LIRC_DRIVER_NAME 869 printk(KERN_WARNING LIRC_DRIVER_NAME
873 ": use 'setserial /dev/ttySX uart none'\n"); 870 ": use 'setserial /dev/ttySX uart none'\n");
874 printk(KERN_WARNING LIRC_DRIVER_NAME 871 printk(KERN_WARNING LIRC_DRIVER_NAME
875 ": or compile the serial port driver as module and\n"); 872 ": or compile the serial port driver as module and\n");
876 printk(KERN_WARNING LIRC_DRIVER_NAME 873 printk(KERN_WARNING LIRC_DRIVER_NAME
877 ": make sure this module is loaded first\n"); 874 ": make sure this module is loaded first\n");
878 result = -EBUSY; 875 result = -EBUSY;
879 goto exit_free_irq; 876 goto exit_free_irq;
880 } 877 }
881 878
882 if (hardware_init_port() < 0) { 879 if (hardware_init_port() < 0) {
883 result = -EINVAL; 880 result = -EINVAL;
884 goto exit_release_region; 881 goto exit_release_region;
885 } 882 }
886 883
887 /* Initialize pulse/space widths */ 884 /* Initialize pulse/space widths */
888 init_timing_params(duty_cycle, freq); 885 init_timing_params(duty_cycle, freq);
889 886
890 /* If pin is high, then this must be an active low receiver. */ 887 /* If pin is high, then this must be an active low receiver. */
891 if (sense == -1) { 888 if (sense == -1) {
892 /* wait 1/2 sec for the power supply */ 889 /* wait 1/2 sec for the power supply */
893 msleep(500); 890 msleep(500);
894 891
895 /* 892 /*
896 * probe 9 times every 0.04s, collect "votes" for 893 * probe 9 times every 0.04s, collect "votes" for
897 * active high/low 894 * active high/low
898 */ 895 */
899 nlow = 0; 896 nlow = 0;
900 nhigh = 0; 897 nhigh = 0;
901 for (i = 0; i < 9; i++) { 898 for (i = 0; i < 9; i++) {
902 if (sinp(UART_MSR) & hardware[type].signal_pin) 899 if (sinp(UART_MSR) & hardware[type].signal_pin)
903 nlow++; 900 nlow++;
904 else 901 else
905 nhigh++; 902 nhigh++;
906 msleep(40); 903 msleep(40);
907 } 904 }
908 sense = (nlow >= nhigh ? 1 : 0); 905 sense = (nlow >= nhigh ? 1 : 0);
909 printk(KERN_INFO LIRC_DRIVER_NAME ": auto-detected active " 906 printk(KERN_INFO LIRC_DRIVER_NAME ": auto-detected active "
910 "%s receiver\n", sense ? "low" : "high"); 907 "%s receiver\n", sense ? "low" : "high");
911 } else 908 } else
912 printk(KERN_INFO LIRC_DRIVER_NAME ": Manually using active " 909 printk(KERN_INFO LIRC_DRIVER_NAME ": Manually using active "
913 "%s receiver\n", sense ? "low" : "high"); 910 "%s receiver\n", sense ? "low" : "high");
914 911
915 dprintk("Interrupt %d, port %04x obtained\n", irq, io); 912 dprintk("Interrupt %d, port %04x obtained\n", irq, io);
916 return 0; 913 return 0;
917 914
918 exit_release_region: 915 exit_release_region:
919 if (iommap != 0) 916 if (iommap != 0)
920 release_mem_region(iommap, 8 << ioshift); 917 release_mem_region(iommap, 8 << ioshift);
921 else 918 else
922 release_region(io, 8); 919 release_region(io, 8);
923 exit_free_irq: 920 exit_free_irq:
924 free_irq(irq, (void *)&hardware); 921 free_irq(irq, (void *)&hardware);
925 922
926 return result; 923 return result;
927 } 924 }
928 925
929 static int __devexit lirc_serial_remove(struct platform_device *dev) 926 static int __devexit lirc_serial_remove(struct platform_device *dev)
930 { 927 {
931 free_irq(irq, (void *)&hardware); 928 free_irq(irq, (void *)&hardware);
932 929
933 if (iommap != 0) 930 if (iommap != 0)
934 release_mem_region(iommap, 8 << ioshift); 931 release_mem_region(iommap, 8 << ioshift);
935 else 932 else
936 release_region(io, 8); 933 release_region(io, 8);
937 934
938 return 0; 935 return 0;
939 } 936 }
940 937
941 static int set_use_inc(void *data) 938 static int set_use_inc(void *data)
942 { 939 {
943 unsigned long flags; 940 unsigned long flags;
944 941
945 /* initialize timestamp */ 942 /* initialize timestamp */
946 do_gettimeofday(&lasttv); 943 do_gettimeofday(&lasttv);
947 944
948 spin_lock_irqsave(&hardware[type].lock, flags); 945 spin_lock_irqsave(&hardware[type].lock, flags);
949 946
950 /* Set DLAB 0. */ 947 /* Set DLAB 0. */
951 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); 948 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
952 949
953 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI); 950 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
954 951
955 spin_unlock_irqrestore(&hardware[type].lock, flags); 952 spin_unlock_irqrestore(&hardware[type].lock, flags);
956 953
957 return 0; 954 return 0;
958 } 955 }
959 956
960 static void set_use_dec(void *data) 957 static void set_use_dec(void *data)
961 { unsigned long flags; 958 { unsigned long flags;
962 959
963 spin_lock_irqsave(&hardware[type].lock, flags); 960 spin_lock_irqsave(&hardware[type].lock, flags);
964 961
965 /* Set DLAB 0. */ 962 /* Set DLAB 0. */
966 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); 963 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
967 964
968 /* First of all, disable all interrupts */ 965 /* First of all, disable all interrupts */
969 soutp(UART_IER, sinp(UART_IER) & 966 soutp(UART_IER, sinp(UART_IER) &
970 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); 967 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
971 spin_unlock_irqrestore(&hardware[type].lock, flags); 968 spin_unlock_irqrestore(&hardware[type].lock, flags);
972 } 969 }
973 970
974 static ssize_t lirc_write(struct file *file, const char *buf, 971 static ssize_t lirc_write(struct file *file, const char *buf,
975 size_t n, loff_t *ppos) 972 size_t n, loff_t *ppos)
976 { 973 {
977 int i, count; 974 int i, count;
978 unsigned long flags; 975 unsigned long flags;
979 long delta = 0; 976 long delta = 0;
980 int *wbuf; 977 int *wbuf;
981 978
982 if (!(hardware[type].features & LIRC_CAN_SEND_PULSE)) 979 if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
983 return -EBADF; 980 return -EBADF;
984 981
985 count = n / sizeof(int); 982 count = n / sizeof(int);
986 if (n % sizeof(int) || count % 2 == 0) 983 if (n % sizeof(int) || count % 2 == 0)
987 return -EINVAL; 984 return -EINVAL;
988 wbuf = memdup_user(buf, n); 985 wbuf = memdup_user(buf, n);
989 if (IS_ERR(wbuf)) 986 if (IS_ERR(wbuf))
990 return PTR_ERR(wbuf); 987 return PTR_ERR(wbuf);
991 spin_lock_irqsave(&hardware[type].lock, flags); 988 spin_lock_irqsave(&hardware[type].lock, flags);
992 if (type == LIRC_IRDEO) { 989 if (type == LIRC_IRDEO) {
993 /* DTR, RTS down */ 990 /* DTR, RTS down */
994 on(); 991 on();
995 } 992 }
996 for (i = 0; i < count; i++) { 993 for (i = 0; i < count; i++) {
997 if (i%2) 994 if (i%2)
998 hardware[type].send_space(wbuf[i] - delta); 995 hardware[type].send_space(wbuf[i] - delta);
999 else 996 else
1000 delta = hardware[type].send_pulse(wbuf[i]); 997 delta = hardware[type].send_pulse(wbuf[i]);
1001 } 998 }
1002 off(); 999 off();
1003 spin_unlock_irqrestore(&hardware[type].lock, flags); 1000 spin_unlock_irqrestore(&hardware[type].lock, flags);
1004 kfree(wbuf); 1001 kfree(wbuf);
1005 return n; 1002 return n;
1006 } 1003 }
1007 1004
1008 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) 1005 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
1009 { 1006 {
1010 int result; 1007 int result;
1011 __u32 value; 1008 __u32 value;
1012 1009
1013 switch (cmd) { 1010 switch (cmd) {
1014 case LIRC_GET_SEND_MODE: 1011 case LIRC_GET_SEND_MODE:
1015 if (!(hardware[type].features&LIRC_CAN_SEND_MASK)) 1012 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1016 return -ENOIOCTLCMD; 1013 return -ENOIOCTLCMD;
1017 1014
1018 result = put_user(LIRC_SEND2MODE 1015 result = put_user(LIRC_SEND2MODE
1019 (hardware[type].features&LIRC_CAN_SEND_MASK), 1016 (hardware[type].features&LIRC_CAN_SEND_MASK),
1020 (__u32 *) arg); 1017 (__u32 *) arg);
1021 if (result) 1018 if (result)
1022 return result; 1019 return result;
1023 break; 1020 break;
1024 1021
1025 case LIRC_SET_SEND_MODE: 1022 case LIRC_SET_SEND_MODE:
1026 if (!(hardware[type].features&LIRC_CAN_SEND_MASK)) 1023 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
1027 return -ENOIOCTLCMD; 1024 return -ENOIOCTLCMD;
1028 1025
1029 result = get_user(value, (__u32 *) arg); 1026 result = get_user(value, (__u32 *) arg);
1030 if (result) 1027 if (result)
1031 return result; 1028 return result;
1032 /* only LIRC_MODE_PULSE supported */ 1029 /* only LIRC_MODE_PULSE supported */
1033 if (value != LIRC_MODE_PULSE) 1030 if (value != LIRC_MODE_PULSE)
1034 return -ENOSYS; 1031 return -ENOSYS;
1035 break; 1032 break;
1036 1033
1037 case LIRC_GET_LENGTH: 1034 case LIRC_GET_LENGTH:
1038 return -ENOSYS; 1035 return -ENOSYS;
1039 break; 1036 break;
1040 1037
1041 case LIRC_SET_SEND_DUTY_CYCLE: 1038 case LIRC_SET_SEND_DUTY_CYCLE:
1042 dprintk("SET_SEND_DUTY_CYCLE\n"); 1039 dprintk("SET_SEND_DUTY_CYCLE\n");
1043 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE)) 1040 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
1044 return -ENOIOCTLCMD; 1041 return -ENOIOCTLCMD;
1045 1042
1046 result = get_user(value, (__u32 *) arg); 1043 result = get_user(value, (__u32 *) arg);
1047 if (result) 1044 if (result)
1048 return result; 1045 return result;
1049 if (value <= 0 || value > 100) 1046 if (value <= 0 || value > 100)
1050 return -EINVAL; 1047 return -EINVAL;
1051 return init_timing_params(value, freq); 1048 return init_timing_params(value, freq);
1052 break; 1049 break;
1053 1050
1054 case LIRC_SET_SEND_CARRIER: 1051 case LIRC_SET_SEND_CARRIER:
1055 dprintk("SET_SEND_CARRIER\n"); 1052 dprintk("SET_SEND_CARRIER\n");
1056 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER)) 1053 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
1057 return -ENOIOCTLCMD; 1054 return -ENOIOCTLCMD;
1058 1055
1059 result = get_user(value, (__u32 *) arg); 1056 result = get_user(value, (__u32 *) arg);
1060 if (result) 1057 if (result)
1061 return result; 1058 return result;
1062 if (value > 500000 || value < 20000) 1059 if (value > 500000 || value < 20000)
1063 return -EINVAL; 1060 return -EINVAL;
1064 return init_timing_params(duty_cycle, value); 1061 return init_timing_params(duty_cycle, value);
1065 break; 1062 break;
1066 1063
1067 default: 1064 default:
1068 return lirc_dev_fop_ioctl(filep, cmd, arg); 1065 return lirc_dev_fop_ioctl(filep, cmd, arg);
1069 } 1066 }
1070 return 0; 1067 return 0;
1071 } 1068 }
1072 1069
1073 static const struct file_operations lirc_fops = { 1070 static const struct file_operations lirc_fops = {
1074 .owner = THIS_MODULE, 1071 .owner = THIS_MODULE,
1075 .write = lirc_write, 1072 .write = lirc_write,
1076 .unlocked_ioctl = lirc_ioctl, 1073 .unlocked_ioctl = lirc_ioctl,
1077 #ifdef CONFIG_COMPAT 1074 #ifdef CONFIG_COMPAT
1078 .compat_ioctl = lirc_ioctl, 1075 .compat_ioctl = lirc_ioctl,
1079 #endif 1076 #endif
1080 .read = lirc_dev_fop_read, 1077 .read = lirc_dev_fop_read,
1081 .poll = lirc_dev_fop_poll, 1078 .poll = lirc_dev_fop_poll,
1082 .open = lirc_dev_fop_open, 1079 .open = lirc_dev_fop_open,
1083 .release = lirc_dev_fop_close, 1080 .release = lirc_dev_fop_close,
1084 .llseek = no_llseek, 1081 .llseek = no_llseek,
1085 }; 1082 };
1086 1083
1087 static struct lirc_driver driver = { 1084 static struct lirc_driver driver = {
1088 .name = LIRC_DRIVER_NAME, 1085 .name = LIRC_DRIVER_NAME,
1089 .minor = -1, 1086 .minor = -1,
1090 .code_length = 1, 1087 .code_length = 1,
1091 .sample_rate = 0, 1088 .sample_rate = 0,
1092 .data = NULL, 1089 .data = NULL,
1093 .add_to_buf = NULL, 1090 .add_to_buf = NULL,
1094 .rbuf = &rbuf, 1091 .rbuf = &rbuf,
1095 .set_use_inc = set_use_inc, 1092 .set_use_inc = set_use_inc,
1096 .set_use_dec = set_use_dec, 1093 .set_use_dec = set_use_dec,
1097 .fops = &lirc_fops, 1094 .fops = &lirc_fops,
1098 .dev = NULL, 1095 .dev = NULL,
1099 .owner = THIS_MODULE, 1096 .owner = THIS_MODULE,
1100 }; 1097 };
1101 1098
1102 static struct platform_device *lirc_serial_dev; 1099 static struct platform_device *lirc_serial_dev;
1103 1100
1104 static int lirc_serial_suspend(struct platform_device *dev, 1101 static int lirc_serial_suspend(struct platform_device *dev,
1105 pm_message_t state) 1102 pm_message_t state)
1106 { 1103 {
1107 /* Set DLAB 0. */ 1104 /* Set DLAB 0. */
1108 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB)); 1105 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
1109 1106
1110 /* Disable all interrupts */ 1107 /* Disable all interrupts */
1111 soutp(UART_IER, sinp(UART_IER) & 1108 soutp(UART_IER, sinp(UART_IER) &
1112 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI))); 1109 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
1113 1110
1114 /* Clear registers. */ 1111 /* Clear registers. */
1115 sinp(UART_LSR); 1112 sinp(UART_LSR);
1116 sinp(UART_RX); 1113 sinp(UART_RX);
1117 sinp(UART_IIR); 1114 sinp(UART_IIR);
1118 sinp(UART_MSR); 1115 sinp(UART_MSR);
1119 1116
1120 return 0; 1117 return 0;
1121 } 1118 }
1122 1119
1123 /* twisty maze... need a forward-declaration here... */ 1120 /* twisty maze... need a forward-declaration here... */
1124 static void lirc_serial_exit(void); 1121 static void lirc_serial_exit(void);
1125 1122
1126 static int lirc_serial_resume(struct platform_device *dev) 1123 static int lirc_serial_resume(struct platform_device *dev)
1127 { 1124 {
1128 unsigned long flags; 1125 unsigned long flags;
1129 1126
1130 if (hardware_init_port() < 0) 1127 if (hardware_init_port() < 0)
1131 return -EINVAL; 1128 return -EINVAL;
1132 1129
1133 spin_lock_irqsave(&hardware[type].lock, flags); 1130 spin_lock_irqsave(&hardware[type].lock, flags);
1134 /* Enable Interrupt */ 1131 /* Enable Interrupt */
1135 do_gettimeofday(&lasttv); 1132 do_gettimeofday(&lasttv);
1136 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI); 1133 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
1137 off(); 1134 off();
1138 1135
1139 lirc_buffer_clear(&rbuf); 1136 lirc_buffer_clear(&rbuf);
1140 1137
1141 spin_unlock_irqrestore(&hardware[type].lock, flags); 1138 spin_unlock_irqrestore(&hardware[type].lock, flags);
1142 1139
1143 return 0; 1140 return 0;
1144 } 1141 }
1145 1142
1146 static struct platform_driver lirc_serial_driver = { 1143 static struct platform_driver lirc_serial_driver = {
1147 .probe = lirc_serial_probe, 1144 .probe = lirc_serial_probe,
1148 .remove = __devexit_p(lirc_serial_remove), 1145 .remove = __devexit_p(lirc_serial_remove),
1149 .suspend = lirc_serial_suspend, 1146 .suspend = lirc_serial_suspend,
1150 .resume = lirc_serial_resume, 1147 .resume = lirc_serial_resume,
1151 .driver = { 1148 .driver = {
1152 .name = "lirc_serial", 1149 .name = "lirc_serial",
1153 .owner = THIS_MODULE, 1150 .owner = THIS_MODULE,
1154 }, 1151 },
1155 }; 1152 };
1156 1153
1157 static int __init lirc_serial_init(void) 1154 static int __init lirc_serial_init(void)
1158 { 1155 {
1159 int result; 1156 int result;
1160 1157
1161 /* Init read buffer. */ 1158 /* Init read buffer. */
1162 result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN); 1159 result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1163 if (result < 0) 1160 if (result < 0)
1164 return -ENOMEM; 1161 return -ENOMEM;
1165 1162
1166 result = platform_driver_register(&lirc_serial_driver); 1163 result = platform_driver_register(&lirc_serial_driver);
1167 if (result) { 1164 if (result) {
1168 printk("lirc register returned %d\n", result); 1165 printk("lirc register returned %d\n", result);
1169 goto exit_buffer_free; 1166 goto exit_buffer_free;
1170 } 1167 }
1171 1168
1172 lirc_serial_dev = platform_device_alloc("lirc_serial", 0); 1169 lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1173 if (!lirc_serial_dev) { 1170 if (!lirc_serial_dev) {
1174 result = -ENOMEM; 1171 result = -ENOMEM;
1175 goto exit_driver_unregister; 1172 goto exit_driver_unregister;
1176 } 1173 }
1177 1174
1178 result = platform_device_add(lirc_serial_dev); 1175 result = platform_device_add(lirc_serial_dev);
1179 if (result) 1176 if (result)
1180 goto exit_device_put; 1177 goto exit_device_put;
1181 1178
1182 return 0; 1179 return 0;
1183 1180
1184 exit_device_put: 1181 exit_device_put:
1185 platform_device_put(lirc_serial_dev); 1182 platform_device_put(lirc_serial_dev);
1186 exit_driver_unregister: 1183 exit_driver_unregister:
1187 platform_driver_unregister(&lirc_serial_driver); 1184 platform_driver_unregister(&lirc_serial_driver);
1188 exit_buffer_free: 1185 exit_buffer_free:
1189 lirc_buffer_free(&rbuf); 1186 lirc_buffer_free(&rbuf);
1190 return result; 1187 return result;
1191 } 1188 }
1192 1189
1193 static void lirc_serial_exit(void) 1190 static void lirc_serial_exit(void)
1194 { 1191 {
1195 platform_device_unregister(lirc_serial_dev); 1192 platform_device_unregister(lirc_serial_dev);
1196 platform_driver_unregister(&lirc_serial_driver); 1193 platform_driver_unregister(&lirc_serial_driver);
1197 lirc_buffer_free(&rbuf); 1194 lirc_buffer_free(&rbuf);
1198 } 1195 }
1199 1196
1200 static int __init lirc_serial_init_module(void) 1197 static int __init lirc_serial_init_module(void)
1201 { 1198 {
1202 int result; 1199 int result;
1203 1200
1204 switch (type) { 1201 switch (type) {
1205 case LIRC_HOMEBREW: 1202 case LIRC_HOMEBREW:
1206 case LIRC_IRDEO: 1203 case LIRC_IRDEO:
1207 case LIRC_IRDEO_REMOTE: 1204 case LIRC_IRDEO_REMOTE:
1208 case LIRC_ANIMAX: 1205 case LIRC_ANIMAX:
1209 case LIRC_IGOR: 1206 case LIRC_IGOR:
1210 /* if nothing specified, use ttyS0/com1 and irq 4 */ 1207 /* if nothing specified, use ttyS0/com1 and irq 4 */
1211 io = io ? io : 0x3f8; 1208 io = io ? io : 0x3f8;
1212 irq = irq ? irq : 4; 1209 irq = irq ? irq : 4;
1213 break; 1210 break;
1214 #ifdef CONFIG_LIRC_SERIAL_NSLU2 1211 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1215 case LIRC_NSLU2: 1212 case LIRC_NSLU2:
1216 io = io ? io : IRQ_IXP4XX_UART2; 1213 io = io ? io : IRQ_IXP4XX_UART2;
1217 irq = irq ? irq : (IXP4XX_UART2_BASE_VIRT + REG_OFFSET); 1214 irq = irq ? irq : (IXP4XX_UART2_BASE_VIRT + REG_OFFSET);
1218 iommap = iommap ? iommap : IXP4XX_UART2_BASE_PHYS; 1215 iommap = iommap ? iommap : IXP4XX_UART2_BASE_PHYS;
1219 ioshift = ioshift ? ioshift : 2; 1216 ioshift = ioshift ? ioshift : 2;
1220 break; 1217 break;
1221 #endif 1218 #endif
1222 default: 1219 default:
1223 return -EINVAL; 1220 return -EINVAL;
1224 } 1221 }
1225 if (!softcarrier) { 1222 if (!softcarrier) {
1226 switch (type) { 1223 switch (type) {
1227 case LIRC_HOMEBREW: 1224 case LIRC_HOMEBREW:
1228 case LIRC_IGOR: 1225 case LIRC_IGOR:
1229 #ifdef CONFIG_LIRC_SERIAL_NSLU2 1226 #ifdef CONFIG_LIRC_SERIAL_NSLU2
1230 case LIRC_NSLU2: 1227 case LIRC_NSLU2:
1231 #endif 1228 #endif
1232 hardware[type].features &= 1229 hardware[type].features &=
1233 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE| 1230 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1234 LIRC_CAN_SET_SEND_CARRIER); 1231 LIRC_CAN_SET_SEND_CARRIER);
1235 break; 1232 break;
1236 } 1233 }
1237 } 1234 }
1238 1235
1239 result = lirc_serial_init(); 1236 result = lirc_serial_init();
1240 if (result) 1237 if (result)
1241 return result; 1238 return result;
1242 1239
1243 driver.features = hardware[type].features; 1240 driver.features = hardware[type].features;
1244 driver.dev = &lirc_serial_dev->dev; 1241 driver.dev = &lirc_serial_dev->dev;
1245 driver.minor = lirc_register_driver(&driver); 1242 driver.minor = lirc_register_driver(&driver);
1246 if (driver.minor < 0) { 1243 if (driver.minor < 0) {
1247 printk(KERN_ERR LIRC_DRIVER_NAME 1244 printk(KERN_ERR LIRC_DRIVER_NAME
1248 ": register_chrdev failed!\n"); 1245 ": register_chrdev failed!\n");
1249 lirc_serial_exit(); 1246 lirc_serial_exit();
1250 return -EIO; 1247 return -EIO;
1251 } 1248 }
1252 return 0; 1249 return 0;
1253 } 1250 }
1254 1251
1255 static void __exit lirc_serial_exit_module(void) 1252 static void __exit lirc_serial_exit_module(void)
1256 { 1253 {
1257 lirc_unregister_driver(driver.minor); 1254 lirc_unregister_driver(driver.minor);
1258 lirc_serial_exit(); 1255 lirc_serial_exit();
1259 dprintk("cleaned up module\n"); 1256 dprintk("cleaned up module\n");
1260 } 1257 }
1261 1258
1262 1259
1263 module_init(lirc_serial_init_module); 1260 module_init(lirc_serial_init_module);
1264 module_exit(lirc_serial_exit_module); 1261 module_exit(lirc_serial_exit_module);
1265 1262
1266 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports."); 1263 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1267 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, " 1264 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1268 "Christoph Bartelmus, Andrei Tanas"); 1265 "Christoph Bartelmus, Andrei Tanas");
1269 MODULE_LICENSE("GPL"); 1266 MODULE_LICENSE("GPL");
1270 1267
1271 module_param(type, int, S_IRUGO); 1268 module_param(type, int, S_IRUGO);
1272 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo," 1269 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1273 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug," 1270 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1274 " 5 = NSLU2 RX:CTS2/TX:GreenLED)"); 1271 " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1275 1272
1276 module_param(io, int, S_IRUGO); 1273 module_param(io, int, S_IRUGO);
1277 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)"); 1274 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1278 1275
1279 /* some architectures (e.g. intel xscale) have memory mapped registers */ 1276 /* some architectures (e.g. intel xscale) have memory mapped registers */
1280 module_param(iommap, bool, S_IRUGO); 1277 module_param(iommap, bool, S_IRUGO);
1281 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O" 1278 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1282 " (0 = no memory mapped io)"); 1279 " (0 = no memory mapped io)");
1283 1280
1284 /* 1281 /*
1285 * some architectures (e.g. intel xscale) align the 8bit serial registers 1282 * some architectures (e.g. intel xscale) align the 8bit serial registers
1286 * on 32bit word boundaries. 1283 * on 32bit word boundaries.
1287 * See linux-kernel/serial/8250.c serial_in()/out() 1284 * See linux-kernel/serial/8250.c serial_in()/out()
1288 */ 1285 */
1289 module_param(ioshift, int, S_IRUGO); 1286 module_param(ioshift, int, S_IRUGO);
1290 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)"); 1287 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1291 1288
1292 module_param(irq, int, S_IRUGO); 1289 module_param(irq, int, S_IRUGO);
1293 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)"); 1290 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1294 1291
1295 module_param(share_irq, bool, S_IRUGO); 1292 module_param(share_irq, bool, S_IRUGO);
1296 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)"); 1293 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1297 1294
1298 module_param(sense, bool, S_IRUGO); 1295 module_param(sense, bool, S_IRUGO);
1299 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit" 1296 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1300 " (0 = active high, 1 = active low )"); 1297 " (0 = active high, 1 = active low )");
1301 1298
1302 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER 1299 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1303 module_param(txsense, bool, S_IRUGO); 1300 module_param(txsense, bool, S_IRUGO);
1304 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit" 1301 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1305 " (0 = active high, 1 = active low )"); 1302 " (0 = active high, 1 = active low )");
1306 #endif 1303 #endif
1307 1304
1308 module_param(softcarrier, bool, S_IRUGO); 1305 module_param(softcarrier, bool, S_IRUGO);
1309 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)"); 1306 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");
1310 1307
1311 module_param(debug, bool, S_IRUGO | S_IWUSR); 1308 module_param(debug, bool, S_IRUGO | S_IWUSR);
1312 MODULE_PARM_DESC(debug, "Enable debugging messages"); 1309 MODULE_PARM_DESC(debug, "Enable debugging messages");
1313 1310