Doug / smarc-fsl-linux-kernel

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/*

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/*

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* w83627ehf - Driver for the hardware monitoring functionality of

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* w83627ehf - Driver for the hardware monitoring functionality of

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* the Winbond W83627EHF Super-I/O chip

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* the Winbond W83627EHF Super-I/O chip

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* Rudolf Marek <r.marek@assembler.cz>

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* Rudolf Marek <r.marek@assembler.cz>

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* David Hubbard <david.c.hubbard@gmail.com>

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* David Hubbard <david.c.hubbard@gmail.com>

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* Daniel J Blueman <daniel.blueman@gmail.com>

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* Daniel J Blueman <daniel.blueman@gmail.com>

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*

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*

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* Shamelessly ripped from the w83627hf driver

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* Shamelessly ripped from the w83627hf driver

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*

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*

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* Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help

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* Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help

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* in testing and debugging this driver.

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* in testing and debugging this driver.

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*

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*

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* This driver also supports the W83627EHG, which is the lead-free

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* This driver also supports the W83627EHG, which is the lead-free

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* version of the W83627EHF.

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* version of the W83627EHF.

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*

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*

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* This program is free software; you can redistribute it and/or modify

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* This program is free software; you can redistribute it and/or modify

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* it under the terms of the GNU General Public License as published by

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* it under the terms of the GNU General Public License as published by

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* the Free Software Foundation; either version 2 of the License, or

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* the Free Software Foundation; either version 2 of the License, or

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* (at your option) any later version.

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* (at your option) any later version.

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*

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*

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* This program is distributed in the hope that it will be useful,

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* This program is distributed in the hope that it will be useful,

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* but WITHOUT ANY WARRANTY; without even the implied warranty of

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* but WITHOUT ANY WARRANTY; without even the implied warranty of

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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

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* GNU General Public License for more details.

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* GNU General Public License for more details.

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*

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*

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* You should have received a copy of the GNU General Public License

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* You should have received a copy of the GNU General Public License

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* along with this program; if not, write to the Free Software

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* along with this program; if not, write to the Free Software

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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

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*

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*

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* Supports the following chips:

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* Supports the following chips:

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*

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*

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* Chip #vin #fan #pwm #temp chip IDs man ID

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* Chip #vin #fan #pwm #temp chip IDs man ID

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* w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3

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* w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3

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* 0x8860 0xa1

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* 0x8860 0xa1

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* w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3

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* w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3

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* w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3

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* w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3

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* w83627uhg 8 2 2 3 0xa230 0xc1 0x5ca3

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* w83627uhg 8 2 2 3 0xa230 0xc1 0x5ca3

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* w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3

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* w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3

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* w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3

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* w83667hg-b 9 5 3 4 0xb350 0xc1 0x5ca3

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* nct6775f 9 4 3 9 0xb470 0xc1 0x5ca3

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* nct6775f 9 4 3 9 0xb470 0xc1 0x5ca3

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* nct6776f 9 5 3 9 0xC330 0xc1 0x5ca3

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* nct6776f 9 5 3 9 0xC330 0xc1 0x5ca3

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*/

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*/

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/module.h>

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#include <linux/module.h>

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#include <linux/init.h>

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#include <linux/init.h>

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#include <linux/slab.h>

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#include <linux/slab.h>

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#include <linux/jiffies.h>

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#include <linux/jiffies.h>

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#include <linux/platform_device.h>

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#include <linux/platform_device.h>

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#include <linux/hwmon.h>

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#include <linux/hwmon.h>

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#include <linux/hwmon-sysfs.h>

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#include <linux/hwmon-sysfs.h>

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#include <linux/hwmon-vid.h>

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#include <linux/hwmon-vid.h>

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#include <linux/err.h>

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#include <linux/err.h>

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#include <linux/mutex.h>

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#include <linux/mutex.h>

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#include <linux/acpi.h>

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#include <linux/acpi.h>

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#include <linux/io.h>

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#include <linux/io.h>

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#include "lm75.h"

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#include "lm75.h"

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enum kinds {

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enum kinds {

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w83627ehf, w83627dhg, w83627dhg_p, w83627uhg,

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w83627ehf, w83627dhg, w83627dhg_p, w83627uhg,

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w83667hg, w83667hg_b, nct6775, nct6776,

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w83667hg, w83667hg_b, nct6775, nct6776,

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};

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};

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/* used to set data->name = w83627ehf_device_names[data->sio_kind] */

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/* used to set data->name = w83627ehf_device_names[data->sio_kind] */

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static const char * const w83627ehf_device_names[] = {

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static const char * const w83627ehf_device_names[] = {

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"w83627ehf",

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"w83627ehf",

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"w83627dhg",

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"w83627dhg",

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"w83627dhg",

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"w83627dhg",

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"w83627uhg",

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"w83627uhg",

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"w83667hg",

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"w83667hg",

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"w83667hg",

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"w83667hg",

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"nct6775",

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"nct6775",

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"nct6776",

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"nct6776",

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};

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};

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static unsigned short force_id;

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static unsigned short force_id;

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module_param(force_id, ushort, 0);

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module_param(force_id, ushort, 0);

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MODULE_PARM_DESC(force_id, "Override the detected device ID");

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MODULE_PARM_DESC(force_id, "Override the detected device ID");

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static unsigned short fan_debounce;

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static unsigned short fan_debounce;

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module_param(fan_debounce, ushort, 0);

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module_param(fan_debounce, ushort, 0);

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MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");

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MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");

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#define DRVNAME "w83627ehf"

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#define DRVNAME "w83627ehf"

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/*

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/*

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* Super-I/O constants and functions

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* Super-I/O constants and functions

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*/

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*/

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#define W83627EHF_LD_HWM 0x0b

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#define W83627EHF_LD_HWM 0x0b

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#define W83667HG_LD_VID 0x0d

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#define W83667HG_LD_VID 0x0d

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#define SIO_REG_LDSEL 0x07 /* Logical device select */

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#define SIO_REG_LDSEL 0x07 /* Logical device select */

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#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */

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#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */

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#define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */

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#define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */

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#define SIO_REG_ENABLE 0x30 /* Logical device enable */

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#define SIO_REG_ENABLE 0x30 /* Logical device enable */

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#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */

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#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */

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#define SIO_REG_VID_CTRL 0xF0 /* VID control */

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#define SIO_REG_VID_CTRL 0xF0 /* VID control */

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#define SIO_REG_VID_DATA 0xF1 /* VID data */

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#define SIO_REG_VID_DATA 0xF1 /* VID data */

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#define SIO_W83627EHF_ID 0x8850

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#define SIO_W83627EHF_ID 0x8850

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#define SIO_W83627EHG_ID 0x8860

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#define SIO_W83627EHG_ID 0x8860

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#define SIO_W83627DHG_ID 0xa020

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#define SIO_W83627DHG_ID 0xa020

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#define SIO_W83627DHG_P_ID 0xb070

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#define SIO_W83627DHG_P_ID 0xb070

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#define SIO_W83627UHG_ID 0xa230

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#define SIO_W83627UHG_ID 0xa230

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#define SIO_W83667HG_ID 0xa510

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#define SIO_W83667HG_ID 0xa510

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#define SIO_W83667HG_B_ID 0xb350

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#define SIO_W83667HG_B_ID 0xb350

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#define SIO_NCT6775_ID 0xb470

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#define SIO_NCT6775_ID 0xb470

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#define SIO_NCT6776_ID 0xc330

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#define SIO_NCT6776_ID 0xc330

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#define SIO_ID_MASK 0xFFF0

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#define SIO_ID_MASK 0xFFF0

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static inline void

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static inline void

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superio_outb(int ioreg, int reg, int val)

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superio_outb(int ioreg, int reg, int val)

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{

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{

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outb(reg, ioreg);

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outb(reg, ioreg);

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outb(val, ioreg + 1);

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outb(val, ioreg + 1);

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}

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}

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static inline int

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static inline int

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superio_inb(int ioreg, int reg)

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superio_inb(int ioreg, int reg)

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{

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{

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outb(reg, ioreg);

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outb(reg, ioreg);

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return inb(ioreg + 1);

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return inb(ioreg + 1);

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}

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}

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static inline void

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static inline void

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superio_select(int ioreg, int ld)

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superio_select(int ioreg, int ld)

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{

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{

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outb(SIO_REG_LDSEL, ioreg);

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outb(SIO_REG_LDSEL, ioreg);

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outb(ld, ioreg + 1);

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outb(ld, ioreg + 1);

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}

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}

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static inline void

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static inline void

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superio_enter(int ioreg)

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superio_enter(int ioreg)

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{

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{

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outb(0x87, ioreg);

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outb(0x87, ioreg);

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outb(0x87, ioreg);

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outb(0x87, ioreg);

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}

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}

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static inline void

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static inline void

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superio_exit(int ioreg)

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superio_exit(int ioreg)

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{

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{

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outb(0xaa, ioreg);

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outb(0xaa, ioreg);

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outb(0x02, ioreg);

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outb(0x02, ioreg);

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outb(0x02, ioreg + 1);

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outb(0x02, ioreg + 1);

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}

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}

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/*

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/*

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* ISA constants

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* ISA constants

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*/

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*/

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#define IOREGION_ALIGNMENT (~7)

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#define IOREGION_ALIGNMENT (~7)

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#define IOREGION_OFFSET 5

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#define IOREGION_OFFSET 5

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#define IOREGION_LENGTH 2

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#define IOREGION_LENGTH 2

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#define ADDR_REG_OFFSET 0

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#define ADDR_REG_OFFSET 0

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#define DATA_REG_OFFSET 1

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#define DATA_REG_OFFSET 1

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#define W83627EHF_REG_BANK 0x4E

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#define W83627EHF_REG_BANK 0x4E

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#define W83627EHF_REG_CONFIG 0x40

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#define W83627EHF_REG_CONFIG 0x40

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/*

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/*

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* Not currently used:

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* Not currently used:

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* REG_MAN_ID has the value 0x5ca3 for all supported chips.

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* REG_MAN_ID has the value 0x5ca3 for all supported chips.

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* REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.

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* REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.

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* REG_MAN_ID is at port 0x4f

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* REG_MAN_ID is at port 0x4f

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* REG_CHIP_ID is at port 0x58

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* REG_CHIP_ID is at port 0x58

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*/

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*/

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static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };

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static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };

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static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };

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static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };

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/* The W83627EHF registers for nr=7,8,9 are in bank 5 */

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/* The W83627EHF registers for nr=7,8,9 are in bank 5 */

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#define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \

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#define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \

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(0x554 + (((nr) - 7) * 2)))

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(0x554 + (((nr) - 7) * 2)))

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#define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \

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#define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \

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(0x555 + (((nr) - 7) * 2)))

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(0x555 + (((nr) - 7) * 2)))

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#define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \

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#define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \

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(0x550 + (nr) - 7))

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(0x550 + (nr) - 7))

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static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };

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static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };

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static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };

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static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };

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static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };

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static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };

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static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };

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static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };

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/* Fan clock dividers are spread over the following five registers */

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/* Fan clock dividers are spread over the following five registers */

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#define W83627EHF_REG_FANDIV1 0x47

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#define W83627EHF_REG_FANDIV1 0x47

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#define W83627EHF_REG_FANDIV2 0x4B

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#define W83627EHF_REG_FANDIV2 0x4B

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#define W83627EHF_REG_VBAT 0x5D

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#define W83627EHF_REG_VBAT 0x5D

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#define W83627EHF_REG_DIODE 0x59

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#define W83627EHF_REG_DIODE 0x59

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#define W83627EHF_REG_SMI_OVT 0x4C

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#define W83627EHF_REG_SMI_OVT 0x4C

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/* NCT6775F has its own fan divider registers */

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/* NCT6775F has its own fan divider registers */

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#define NCT6775_REG_FANDIV1 0x506

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#define NCT6775_REG_FANDIV1 0x506

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#define NCT6775_REG_FANDIV2 0x507

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#define NCT6775_REG_FANDIV2 0x507

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#define NCT6775_REG_FAN_DEBOUNCE 0xf0

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#define NCT6775_REG_FAN_DEBOUNCE 0xf0

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#define W83627EHF_REG_ALARM1 0x459

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#define W83627EHF_REG_ALARM1 0x459

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#define W83627EHF_REG_ALARM2 0x45A

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#define W83627EHF_REG_ALARM2 0x45A

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#define W83627EHF_REG_ALARM3 0x45B

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#define W83627EHF_REG_ALARM3 0x45B

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#define W83627EHF_REG_CASEOPEN_DET 0x42 /* SMI STATUS #2 */

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#define W83627EHF_REG_CASEOPEN_DET 0x42 /* SMI STATUS #2 */

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#define W83627EHF_REG_CASEOPEN_CLR 0x46 /* SMI MASK #3 */

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#define W83627EHF_REG_CASEOPEN_CLR 0x46 /* SMI MASK #3 */

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/* SmartFan registers */

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/* SmartFan registers */

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#define W83627EHF_REG_FAN_STEPUP_TIME 0x0f

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#define W83627EHF_REG_FAN_STEPUP_TIME 0x0f

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#define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e

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#define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e

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/* DC or PWM output fan configuration */

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/* DC or PWM output fan configuration */

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static const u8 W83627EHF_REG_PWM_ENABLE[] = {

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static const u8 W83627EHF_REG_PWM_ENABLE[] = {

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0x04, /* SYS FAN0 output mode and PWM mode */

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0x04, /* SYS FAN0 output mode and PWM mode */

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0x04, /* CPU FAN0 output mode and PWM mode */

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0x04, /* CPU FAN0 output mode and PWM mode */

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0x12, /* AUX FAN mode */

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0x12, /* AUX FAN mode */

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0x62, /* CPU FAN1 mode */

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0x62, /* CPU FAN1 mode */

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};

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};

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static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };

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static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };

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static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };

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static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };

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/* FAN Duty Cycle, be used to control */

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/* FAN Duty Cycle, be used to control */

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static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };

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static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };

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static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };

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static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };

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static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };

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static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };

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/* Advanced Fan control, some values are common for all fans */

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/* Advanced Fan control, some values are common for all fans */

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static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };

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static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };

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static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };

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static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };

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static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };

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static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };

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static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]

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static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]

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= { 0xff, 0x67, 0xff, 0x69 };

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= { 0xff, 0x67, 0xff, 0x69 };

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static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]

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static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]

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= { 0xff, 0x68, 0xff, 0x6a };

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= { 0xff, 0x68, 0xff, 0x6a };

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static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };

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static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };

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static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]

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static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]

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= { 0x68, 0x6a, 0x6c };

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= { 0x68, 0x6a, 0x6c };

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static const u16 W83627EHF_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };

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static const u16 W83627EHF_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };

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static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };

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static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };

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static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };

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static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };

247

static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };

247

static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };

248

static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };

248

static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };

249

static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };

249

static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };

250

static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };

250

static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };

251

static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };

251

static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };

252

static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };

252

static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };

253

static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };

253

static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };

254

static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};

254

static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};

255

256

static const u16 NCT6775_REG_TEMP[]

256

static const u16 NCT6775_REG_TEMP[]

257

= { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };

257

= { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };

258

static const u16 NCT6775_REG_TEMP_CONFIG[]

258

static const u16 NCT6775_REG_TEMP_CONFIG[]

259

= { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };

259

= { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };

260

static const u16 NCT6775_REG_TEMP_HYST[]

260

static const u16 NCT6775_REG_TEMP_HYST[]

261

= { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };

261

= { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };

262

static const u16 NCT6775_REG_TEMP_OVER[]

262

static const u16 NCT6775_REG_TEMP_OVER[]

263

= { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };

263

= { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };

264

static const u16 NCT6775_REG_TEMP_SOURCE[]

264

static const u16 NCT6775_REG_TEMP_SOURCE[]

265

= { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };

265

= { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };

266

267

static const char *const w83667hg_b_temp_label[] = {

267

static const char *const w83667hg_b_temp_label[] = {

268

"SYSTIN",

268

"SYSTIN",

269

"CPUTIN",

269

"CPUTIN",

270

"AUXTIN",

270

"AUXTIN",

271

"AMDTSI",

271

"AMDTSI",

272

"PECI Agent 1",

272

"PECI Agent 1",

273

"PECI Agent 2",

273

"PECI Agent 2",

274

"PECI Agent 3",

274

"PECI Agent 3",

275

"PECI Agent 4"

275

"PECI Agent 4"

276

};

276

};

277

278

static const char *const nct6775_temp_label[] = {

278

static const char *const nct6775_temp_label[] = {

279

"",

279

"",

280

"SYSTIN",

280

"SYSTIN",

281

"CPUTIN",

281

"CPUTIN",

282

"AUXTIN",

282

"AUXTIN",

283

"AMD SB-TSI",

283

"AMD SB-TSI",

284

"PECI Agent 0",

284

"PECI Agent 0",

285

"PECI Agent 1",

285

"PECI Agent 1",

286

"PECI Agent 2",

286

"PECI Agent 2",

287

"PECI Agent 3",

287

"PECI Agent 3",

288

"PECI Agent 4",

288

"PECI Agent 4",

289

"PECI Agent 5",

289

"PECI Agent 5",

290

"PECI Agent 6",

290

"PECI Agent 6",

291

"PECI Agent 7",

291

"PECI Agent 7",

292

"PCH_CHIP_CPU_MAX_TEMP",

292

"PCH_CHIP_CPU_MAX_TEMP",

293

"PCH_CHIP_TEMP",

293

"PCH_CHIP_TEMP",

294

"PCH_CPU_TEMP",

294

"PCH_CPU_TEMP",

295

"PCH_MCH_TEMP",

295

"PCH_MCH_TEMP",

296

"PCH_DIM0_TEMP",

296

"PCH_DIM0_TEMP",

297

"PCH_DIM1_TEMP",

297

"PCH_DIM1_TEMP",

298

"PCH_DIM2_TEMP",

298

"PCH_DIM2_TEMP",

299

"PCH_DIM3_TEMP"

299

"PCH_DIM3_TEMP"

300

};

300

};

301

302

static const char *const nct6776_temp_label[] = {

302

static const char *const nct6776_temp_label[] = {

303

"",

303

"",

304

"SYSTIN",

304

"SYSTIN",

305

"CPUTIN",

305

"CPUTIN",

306

"AUXTIN",

306

"AUXTIN",

307

"SMBUSMASTER 0",

307

"SMBUSMASTER 0",

308

"SMBUSMASTER 1",

308

"SMBUSMASTER 1",

309

"SMBUSMASTER 2",

309

"SMBUSMASTER 2",

310

"SMBUSMASTER 3",

310

"SMBUSMASTER 3",

311

"SMBUSMASTER 4",

311

"SMBUSMASTER 4",

312

"SMBUSMASTER 5",

312

"SMBUSMASTER 5",

313

"SMBUSMASTER 6",

313

"SMBUSMASTER 6",

314

"SMBUSMASTER 7",

314

"SMBUSMASTER 7",

315

"PECI Agent 0",

315

"PECI Agent 0",

316

"PECI Agent 1",

316

"PECI Agent 1",

317

"PCH_CHIP_CPU_MAX_TEMP",

317

"PCH_CHIP_CPU_MAX_TEMP",

318

"PCH_CHIP_TEMP",

318

"PCH_CHIP_TEMP",

319

"PCH_CPU_TEMP",

319

"PCH_CPU_TEMP",

320

"PCH_MCH_TEMP",

320

"PCH_MCH_TEMP",

321

"PCH_DIM0_TEMP",

321

"PCH_DIM0_TEMP",

322

"PCH_DIM1_TEMP",

322

"PCH_DIM1_TEMP",

323

"PCH_DIM2_TEMP",

323

"PCH_DIM2_TEMP",

324

"PCH_DIM3_TEMP",

324

"PCH_DIM3_TEMP",

325

"BYTE_TEMP"

325

"BYTE_TEMP"

326

};

326

};

327

328

#define NUM_REG_TEMP ARRAY_SIZE(NCT6775_REG_TEMP)

328

#define NUM_REG_TEMP ARRAY_SIZE(NCT6775_REG_TEMP)

329

330

static int is_word_sized(u16 reg)

330

static int is_word_sized(u16 reg)

331

{

331

{

332

return ((((reg & 0xff00) == 0x100

332

return ((((reg & 0xff00) == 0x100

333

|| (reg & 0xff00) == 0x200)

333

|| (reg & 0xff00) == 0x200)

334

&& ((reg & 0x00ff) == 0x50

334

&& ((reg & 0x00ff) == 0x50

335

|| (reg & 0x00ff) == 0x53

335

|| (reg & 0x00ff) == 0x53

336

|| (reg & 0x00ff) == 0x55))

336

|| (reg & 0x00ff) == 0x55))

337

|| (reg & 0xfff0) == 0x630

337

|| (reg & 0xfff0) == 0x630

338

|| reg == 0x640 || reg == 0x642

338

|| reg == 0x640 || reg == 0x642

339

|| ((reg & 0xfff0) == 0x650

339

|| ((reg & 0xfff0) == 0x650

340

&& (reg & 0x000f) >= 0x06)

340

&& (reg & 0x000f) >= 0x06)

341

|| reg == 0x73 || reg == 0x75 || reg == 0x77

341

|| reg == 0x73 || reg == 0x75 || reg == 0x77

342

);

342

);

343

}

343

}

344

345

/*

345

/*

346

* Conversions

346

* Conversions

347

*/

347

*/

348

349

/* 1 is PWM mode, output in ms */

349

/* 1 is PWM mode, output in ms */

350

static inline unsigned int step_time_from_reg(u8 reg, u8 mode)

350

static inline unsigned int step_time_from_reg(u8 reg, u8 mode)

351

{

351

{

352

return mode ? 100 * reg : 400 * reg;

352

return mode ? 100 * reg : 400 * reg;

353

}

353

}

354

355

static inline u8 step_time_to_reg(unsigned int msec, u8 mode)

355

static inline u8 step_time_to_reg(unsigned int msec, u8 mode)

356

{

356

{

357

return clamp_val((mode ? (msec + 50) / 100 : (msec + 200) / 400),

357

return clamp_val((mode ? (msec + 50) / 100 : (msec + 200) / 400),

358

1, 255);

358

1, 255);

359

}

359

}

360

361

static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)

361

static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)

362

{

362

{

363

if (reg == 0 || reg == 255)

363

if (reg == 0 || reg == 255)

364

return 0;

364

return 0;

365

return 1350000U / (reg << divreg);

365

return 1350000U / (reg << divreg);

366

}

366

}

367

368

static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)

368

static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)

369

{

369

{

370

if ((reg & 0xff1f) == 0xff1f)

370

if ((reg & 0xff1f) == 0xff1f)

371

return 0;

371

return 0;

372

373

reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);

373

reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);

374

375

if (reg == 0)

375

if (reg == 0)

376

return 0;

376

return 0;

377

378

return 1350000U / reg;

378

return 1350000U / reg;

379

}

379

}

380

381

static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)

381

static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)

382

{

382

{

383

if (reg == 0 || reg == 0xffff)

383

if (reg == 0 || reg == 0xffff)

384

return 0;

384

return 0;

385

386

/*

386

/*

387

* Even though the registers are 16 bit wide, the fan divisor

387

* Even though the registers are 16 bit wide, the fan divisor

388

* still applies.

388

* still applies.

389

*/

389

*/

390

return 1350000U / (reg << divreg);

390

return 1350000U / (reg << divreg);

391

}

391

}

392

393

static inline unsigned int

393

static inline unsigned int

394

div_from_reg(u8 reg)

394

div_from_reg(u8 reg)

395

{

395

{

396

return 1 << reg;

396

return 1 << reg;

397

}

397

}

398

399

/*

399

/*

400

* Some of the voltage inputs have internal scaling, the tables below

400

* Some of the voltage inputs have internal scaling, the tables below

401

* contain 8 (the ADC LSB in mV) * scaling factor * 100

401

* contain 8 (the ADC LSB in mV) * scaling factor * 100

402

*/

402

*/

403

static const u16 scale_in_common[10] = {

403

static const u16 scale_in_common[10] = {

404

800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800

404

800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800

405

};

405

};

406

static const u16 scale_in_w83627uhg[9] = {

406

static const u16 scale_in_w83627uhg[9] = {

407

800, 800, 3328, 3424, 800, 800, 0, 3328, 3400

407

800, 800, 3328, 3424, 800, 800, 0, 3328, 3400

408

};

408

};

409

410

static inline long in_from_reg(u8 reg, u8 nr, const u16 *scale_in)

410

static inline long in_from_reg(u8 reg, u8 nr, const u16 *scale_in)

411

{

411

{

412

return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);

412

return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);

413

}

413

}

414

415

static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scale_in)

415

static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scale_in)

416

{

416

{

417

return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);

417

return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);

418

}

418

}

419

420

/*

420

/*

421

* Data structures and manipulation thereof

421

* Data structures and manipulation thereof

422

*/

422

*/

423

424

struct w83627ehf_data {

424

struct w83627ehf_data {

425

int addr; /* IO base of hw monitor block */

425

int addr; /* IO base of hw monitor block */

426

const char *name;

426

const char *name;

427

428

struct device *hwmon_dev;

428

struct device *hwmon_dev;

429

struct mutex lock;

429

struct mutex lock;

430

431

u16 reg_temp[NUM_REG_TEMP];

431

u16 reg_temp[NUM_REG_TEMP];

432

u16 reg_temp_over[NUM_REG_TEMP];

432

u16 reg_temp_over[NUM_REG_TEMP];

433

u16 reg_temp_hyst[NUM_REG_TEMP];

433

u16 reg_temp_hyst[NUM_REG_TEMP];

434

u16 reg_temp_config[NUM_REG_TEMP];

434

u16 reg_temp_config[NUM_REG_TEMP];

435

u8 temp_src[NUM_REG_TEMP];

435

u8 temp_src[NUM_REG_TEMP];

436

const char * const *temp_label;

436

const char * const *temp_label;

437

438

const u16 *REG_PWM;

438

const u16 *REG_PWM;

439

const u16 *REG_TARGET;

439

const u16 *REG_TARGET;

440

const u16 *REG_FAN;

440

const u16 *REG_FAN;

441

const u16 *REG_FAN_MIN;

441

const u16 *REG_FAN_MIN;

442

const u16 *REG_FAN_START_OUTPUT;

442

const u16 *REG_FAN_START_OUTPUT;

443

const u16 *REG_FAN_STOP_OUTPUT;

443

const u16 *REG_FAN_STOP_OUTPUT;

444

const u16 *REG_FAN_STOP_TIME;

444

const u16 *REG_FAN_STOP_TIME;

445

const u16 *REG_FAN_MAX_OUTPUT;

445

const u16 *REG_FAN_MAX_OUTPUT;

446

const u16 *REG_FAN_STEP_OUTPUT;

446

const u16 *REG_FAN_STEP_OUTPUT;

447

const u16 *scale_in;

447

const u16 *scale_in;

448

449

unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);

449

unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);

450

unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);

450

unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);

451

452

struct mutex update_lock;

452

struct mutex update_lock;

453

char valid; /* !=0 if following fields are valid */

453

char valid; /* !=0 if following fields are valid */

454

unsigned long last_updated; /* In jiffies */

454

unsigned long last_updated; /* In jiffies */

455

456

/* Register values */

456

/* Register values */

457

u8 bank; /* current register bank */

457

u8 bank; /* current register bank */

458

u8 in_num; /* number of in inputs we have */

458

u8 in_num; /* number of in inputs we have */

459

u8 in[10]; /* Register value */

459

u8 in[10]; /* Register value */

460

u8 in_max[10]; /* Register value */

460

u8 in_max[10]; /* Register value */

461

u8 in_min[10]; /* Register value */

461

u8 in_min[10]; /* Register value */

462

unsigned int rpm[5];

462

unsigned int rpm[5];

463

u16 fan_min[5];

463

u16 fan_min[5];

464

u8 fan_div[5];

464

u8 fan_div[5];

465

u8 has_fan; /* some fan inputs can be disabled */

465

u8 has_fan; /* some fan inputs can be disabled */

466

u8 has_fan_min; /* some fans don't have min register */

466

u8 has_fan_min; /* some fans don't have min register */

467

bool has_fan_div;

467

bool has_fan_div;

468

u8 temp_type[3];

468

u8 temp_type[3];

469

s8 temp_offset[3];

469

s8 temp_offset[3];

470

s16 temp[9];

470

s16 temp[9];

471

s16 temp_max[9];

471

s16 temp_max[9];

472

s16 temp_max_hyst[9];

472

s16 temp_max_hyst[9];

473

u32 alarms;

473

u32 alarms;

474

u8 caseopen;

474

u8 caseopen;

475

476

u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */

476

u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */

477

u8 pwm_enable[4]; /* 1->manual

477

u8 pwm_enable[4]; /* 1->manual

478

* 2->thermal cruise mode (also called SmartFan I)

478

* 2->thermal cruise mode (also called SmartFan I)

479

* 3->fan speed cruise mode

479

* 3->fan speed cruise mode

480

* 4->variable thermal cruise (also called

480

* 4->variable thermal cruise (also called

481

* SmartFan III)

481

* SmartFan III)

482

* 5->enhanced variable thermal cruise (also called

482

* 5->enhanced variable thermal cruise (also called

483

* SmartFan IV)

483

* SmartFan IV)

484

*/

484

*/

485

u8 pwm_enable_orig[4]; /* original value of pwm_enable */

485

u8 pwm_enable_orig[4]; /* original value of pwm_enable */

486

u8 pwm_num; /* number of pwm */

486

u8 pwm_num; /* number of pwm */

487

u8 pwm[4];

487

u8 pwm[4];

488

u8 target_temp[4];

488

u8 target_temp[4];

489

u8 tolerance[4];

489

u8 tolerance[4];

490

491

u8 fan_start_output[4]; /* minimum fan speed when spinning up */

491

u8 fan_start_output[4]; /* minimum fan speed when spinning up */

492

u8 fan_stop_output[4]; /* minimum fan speed when spinning down */

492

u8 fan_stop_output[4]; /* minimum fan speed when spinning down */

493

u8 fan_stop_time[4]; /* time at minimum before disabling fan */

493

u8 fan_stop_time[4]; /* time at minimum before disabling fan */

494

u8 fan_max_output[4]; /* maximum fan speed */

494

u8 fan_max_output[4]; /* maximum fan speed */

495

u8 fan_step_output[4]; /* rate of change output value */

495

u8 fan_step_output[4]; /* rate of change output value */

496

497

u8 vid;

497

u8 vid;

498

u8 vrm;

498

u8 vrm;

499

500

u16 have_temp;

500

u16 have_temp;

501

u16 have_temp_offset;

501

u16 have_temp_offset;

502

u8 in6_skip:1;

502

u8 in6_skip:1;

503

u8 temp3_val_only:1;

503

u8 temp3_val_only:1;

504

505

#ifdef CONFIG_PM

505

#ifdef CONFIG_PM

506

/* Remember extra register values over suspend/resume */

506

/* Remember extra register values over suspend/resume */

507

u8 vbat;

507

u8 vbat;

508

u8 fandiv1;

508

u8 fandiv1;

509

u8 fandiv2;

509

u8 fandiv2;

510

#endif

510

#endif

511

};

511

};

512

513

struct w83627ehf_sio_data {

513

struct w83627ehf_sio_data {

514

int sioreg;

514

int sioreg;

515

enum kinds kind;

515

enum kinds kind;

516

};

516

};

517

518

/*

518

/*

519

* On older chips, only registers 0x50-0x5f are banked.

519

* On older chips, only registers 0x50-0x5f are banked.

520

* On more recent chips, all registers are banked.

520

* On more recent chips, all registers are banked.

521

* Assume that is the case and set the bank number for each access.

521

* Assume that is the case and set the bank number for each access.

522

* Cache the bank number so it only needs to be set if it changes.

522

* Cache the bank number so it only needs to be set if it changes.

523

*/

523

*/

524

static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)

524

static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)

525

{

525

{

526

u8 bank = reg >> 8;

526

u8 bank = reg >> 8;

527

if (data->bank != bank) {

527

if (data->bank != bank) {

528

outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);

528

outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);

529

outb_p(bank, data->addr + DATA_REG_OFFSET);

529

outb_p(bank, data->addr + DATA_REG_OFFSET);

530

data->bank = bank;

530

data->bank = bank;

531

}

531

}

532

}

532

}

533

534

static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)

534

static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)

535

{

535

{

536

int res, word_sized = is_word_sized(reg);

536

int res, word_sized = is_word_sized(reg);

537

538

mutex_lock(&data->lock);

538

mutex_lock(&data->lock);

539

540

w83627ehf_set_bank(data, reg);

540

w83627ehf_set_bank(data, reg);

541

outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);

541

outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);

542

res = inb_p(data->addr + DATA_REG_OFFSET);

542

res = inb_p(data->addr + DATA_REG_OFFSET);

543

if (word_sized) {

543

if (word_sized) {

544

outb_p((reg & 0xff) + 1,

544

outb_p((reg & 0xff) + 1,

545

data->addr + ADDR_REG_OFFSET);

545

data->addr + ADDR_REG_OFFSET);

546

res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);

546

res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);

547

}

547

}

548

549

mutex_unlock(&data->lock);

549

mutex_unlock(&data->lock);

550

return res;

550

return res;

551

}

551

}

552

553

static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,

553

static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,

554

u16 value)

554

u16 value)

555

{

555

{

556

int word_sized = is_word_sized(reg);

556

int word_sized = is_word_sized(reg);

557

558

mutex_lock(&data->lock);

558

mutex_lock(&data->lock);

559

560

w83627ehf_set_bank(data, reg);

560

w83627ehf_set_bank(data, reg);

561

outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);

561

outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);

562

if (word_sized) {

562

if (word_sized) {

563

outb_p(value >> 8, data->addr + DATA_REG_OFFSET);

563

outb_p(value >> 8, data->addr + DATA_REG_OFFSET);

564

outb_p((reg & 0xff) + 1,

564

outb_p((reg & 0xff) + 1,

565

data->addr + ADDR_REG_OFFSET);

565

data->addr + ADDR_REG_OFFSET);

566

}

566

}

567

outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);

567

outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);

568

569

mutex_unlock(&data->lock);

569

mutex_unlock(&data->lock);

570

return 0;

570

return 0;

571

}

571

}

572

573

/* We left-align 8-bit temperature values to make the code simpler */

573

/* We left-align 8-bit temperature values to make the code simpler */

574

static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)

574

static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)

575

{

575

{

576

u16 res;

576

u16 res;

577

578

res = w83627ehf_read_value(data, reg);

578

res = w83627ehf_read_value(data, reg);

579

if (!is_word_sized(reg))

579

if (!is_word_sized(reg))

580

res <<= 8;

580

res <<= 8;

581

582

return res;

582

return res;

583

}

583

}

584

585

static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,

585

static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,

586

u16 value)

586

u16 value)

587

{

587

{

588

if (!is_word_sized(reg))

588

if (!is_word_sized(reg))

589

value >>= 8;

589

value >>= 8;

590

return w83627ehf_write_value(data, reg, value);

590

return w83627ehf_write_value(data, reg, value);

591

}

591

}

592

593

/* This function assumes that the caller holds data->update_lock */

593

/* This function assumes that the caller holds data->update_lock */

594

static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)

594

static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)

595

{

595

{

596

u8 reg;

596

u8 reg;

597

598

switch (nr) {

598

switch (nr) {

599

case 0:

599

case 0:

600

reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)

600

reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)

601

| (data->fan_div[0] & 0x7);

601

| (data->fan_div[0] & 0x7);

602

w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);

602

w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);

603

break;

603

break;

604

case 1:

604

case 1:

605

reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)

605

reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)

606

| ((data->fan_div[1] << 4) & 0x70);

606

| ((data->fan_div[1] << 4) & 0x70);

607

w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);

607

w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);

608

break;

608

break;

609

case 2:

609

case 2:

610

reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)

610

reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)

611

| (data->fan_div[2] & 0x7);

611

| (data->fan_div[2] & 0x7);

612

w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);

612

w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);

613

break;

613

break;

614

case 3:

614

case 3:

615

reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)

615

reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)

616

| ((data->fan_div[3] << 4) & 0x70);

616

| ((data->fan_div[3] << 4) & 0x70);

617

w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);

617

w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);

618

break;

618

break;

619

}

619

}

620

}

620

}

621

622

/* This function assumes that the caller holds data->update_lock */

622

/* This function assumes that the caller holds data->update_lock */

623

static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)

623

static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)

624

{

624

{

625

u8 reg;

625

u8 reg;

626

627

switch (nr) {

627

switch (nr) {

628

case 0:

628

case 0:

629

reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)

629

reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)

630

| ((data->fan_div[0] & 0x03) << 4);

630

| ((data->fan_div[0] & 0x03) << 4);

631

/* fan5 input control bit is write only, compute the value */

631

/* fan5 input control bit is write only, compute the value */

632

reg |= (data->has_fan & (1 << 4)) ? 1 : 0;

632

reg |= (data->has_fan & (1 << 4)) ? 1 : 0;

633

w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);

633

w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);

634

reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)

634

reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)

635

| ((data->fan_div[0] & 0x04) << 3);

635

| ((data->fan_div[0] & 0x04) << 3);

636

w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);

636

w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);

637

break;

637

break;

638

case 1:

638

case 1:

639

reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)

639

reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)

640

| ((data->fan_div[1] & 0x03) << 6);

640

| ((data->fan_div[1] & 0x03) << 6);

641

/* fan5 input control bit is write only, compute the value */

641

/* fan5 input control bit is write only, compute the value */

642

reg |= (data->has_fan & (1 << 4)) ? 1 : 0;

642

reg |= (data->has_fan & (1 << 4)) ? 1 : 0;

643

w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);

643

w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);

644

reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)

644

reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)

645

| ((data->fan_div[1] & 0x04) << 4);

645

| ((data->fan_div[1] & 0x04) << 4);

646

w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);

646

w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);

647

break;

647

break;

648

case 2:

648

case 2:

649

reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)

649

reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)

650

| ((data->fan_div[2] & 0x03) << 6);

650

| ((data->fan_div[2] & 0x03) << 6);

651

w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);

651

w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);

652

reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)

652

reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)

653

| ((data->fan_div[2] & 0x04) << 5);

653

| ((data->fan_div[2] & 0x04) << 5);

654

w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);

654

w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);

655

break;

655

break;

656

case 3:

656

case 3:

657

reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)

657

reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)

658

| (data->fan_div[3] & 0x03);

658

| (data->fan_div[3] & 0x03);

659

w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);

659

w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);

660

reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)

660

reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)

661

| ((data->fan_div[3] & 0x04) << 5);

661

| ((data->fan_div[3] & 0x04) << 5);

662

w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);

662

w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);

663

break;

663

break;

664

case 4:

664

case 4:

665

reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)

665

reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)

666

| ((data->fan_div[4] & 0x03) << 2)

666

| ((data->fan_div[4] & 0x03) << 2)

667

| ((data->fan_div[4] & 0x04) << 5);

667

| ((data->fan_div[4] & 0x04) << 5);

668

w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);

668

w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);

669

break;

669

break;

670

}

670

}

671

}

671

}

672

673

static void w83627ehf_write_fan_div_common(struct device *dev,

673

static void w83627ehf_write_fan_div_common(struct device *dev,

674

struct w83627ehf_data *data, int nr)

674

struct w83627ehf_data *data, int nr)

675

{

675

{

676

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

676

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

677

678

if (sio_data->kind == nct6776)

678

if (sio_data->kind == nct6776)

679

; /* no dividers, do nothing */

679

; /* no dividers, do nothing */

680

else if (sio_data->kind == nct6775)

680

else if (sio_data->kind == nct6775)

681

nct6775_write_fan_div(data, nr);

681

nct6775_write_fan_div(data, nr);

682

else

682

else

683

w83627ehf_write_fan_div(data, nr);

683

w83627ehf_write_fan_div(data, nr);

684

}

684

}

685

686

static void nct6775_update_fan_div(struct w83627ehf_data *data)

686

static void nct6775_update_fan_div(struct w83627ehf_data *data)

687

{

687

{

688

u8 i;

688

u8 i;

689

690

i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);

690

i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);

691

data->fan_div[0] = i & 0x7;

691

data->fan_div[0] = i & 0x7;

692

data->fan_div[1] = (i & 0x70) >> 4;

692

data->fan_div[1] = (i & 0x70) >> 4;

693

i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);

693

i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);

694

data->fan_div[2] = i & 0x7;

694

data->fan_div[2] = i & 0x7;

695

if (data->has_fan & (1<<3))

695

if (data->has_fan & (1<<3))

696

data->fan_div[3] = (i & 0x70) >> 4;

696

data->fan_div[3] = (i & 0x70) >> 4;

697

}

697

}

698

699

static void w83627ehf_update_fan_div(struct w83627ehf_data *data)

699

static void w83627ehf_update_fan_div(struct w83627ehf_data *data)

700

{

700

{

701

int i;

701

int i;

702

703

i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);

703

i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);

704

data->fan_div[0] = (i >> 4) & 0x03;

704

data->fan_div[0] = (i >> 4) & 0x03;

705

data->fan_div[1] = (i >> 6) & 0x03;

705

data->fan_div[1] = (i >> 6) & 0x03;

706

i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);

706

i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);

707

data->fan_div[2] = (i >> 6) & 0x03;

707

data->fan_div[2] = (i >> 6) & 0x03;

708

i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);

708

i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);

709

data->fan_div[0] |= (i >> 3) & 0x04;

709

data->fan_div[0] |= (i >> 3) & 0x04;

710

data->fan_div[1] |= (i >> 4) & 0x04;

710

data->fan_div[1] |= (i >> 4) & 0x04;

711

data->fan_div[2] |= (i >> 5) & 0x04;

711

data->fan_div[2] |= (i >> 5) & 0x04;

712

if (data->has_fan & ((1 << 3) | (1 << 4))) {

712

if (data->has_fan & ((1 << 3) | (1 << 4))) {

713

i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);

713

i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);

714

data->fan_div[3] = i & 0x03;

714

data->fan_div[3] = i & 0x03;

715

data->fan_div[4] = ((i >> 2) & 0x03)

715

data->fan_div[4] = ((i >> 2) & 0x03)

716

| ((i >> 5) & 0x04);

716

| ((i >> 5) & 0x04);

717

}

717

}

718

if (data->has_fan & (1 << 3)) {

718

if (data->has_fan & (1 << 3)) {

719

i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);

719

i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);

720

data->fan_div[3] |= (i >> 5) & 0x04;

720

data->fan_div[3] |= (i >> 5) & 0x04;

721

}

721

}

722

}

722

}

723

724

static void w83627ehf_update_fan_div_common(struct device *dev,

724

static void w83627ehf_update_fan_div_common(struct device *dev,

725

struct w83627ehf_data *data)

725

struct w83627ehf_data *data)

726

{

726

{

727

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

727

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

728

729

if (sio_data->kind == nct6776)

729

if (sio_data->kind == nct6776)

730

; /* no dividers, do nothing */

730

; /* no dividers, do nothing */

731

else if (sio_data->kind == nct6775)

731

else if (sio_data->kind == nct6775)

732

nct6775_update_fan_div(data);

732

nct6775_update_fan_div(data);

733

else

733

else

734

w83627ehf_update_fan_div(data);

734

w83627ehf_update_fan_div(data);

735

}

735

}

736

737

static void nct6775_update_pwm(struct w83627ehf_data *data)

737

static void nct6775_update_pwm(struct w83627ehf_data *data)

738

{

738

{

739

int i;

739

int i;

740

int pwmcfg, fanmodecfg;

740

int pwmcfg, fanmodecfg;

741

742

for (i = 0; i < data->pwm_num; i++) {

742

for (i = 0; i < data->pwm_num; i++) {

743

pwmcfg = w83627ehf_read_value(data,

743

pwmcfg = w83627ehf_read_value(data,

744

W83627EHF_REG_PWM_ENABLE[i]);

744

W83627EHF_REG_PWM_ENABLE[i]);

745

fanmodecfg = w83627ehf_read_value(data,

745

fanmodecfg = w83627ehf_read_value(data,

746

NCT6775_REG_FAN_MODE[i]);

746

NCT6775_REG_FAN_MODE[i]);

747

data->pwm_mode[i] =

747

data->pwm_mode[i] =

748

((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;

748

((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;

749

data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;

749

data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;

750

data->tolerance[i] = fanmodecfg & 0x0f;

750

data->tolerance[i] = fanmodecfg & 0x0f;

751

data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);

751

data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);

752

}

752

}

753

}

753

}

754

755

static void w83627ehf_update_pwm(struct w83627ehf_data *data)

755

static void w83627ehf_update_pwm(struct w83627ehf_data *data)

756

{

756

{

757

int i;

757

int i;

758

int pwmcfg = 0, tolerance = 0; /* shut up the compiler */

758

int pwmcfg = 0, tolerance = 0; /* shut up the compiler */

759

760

for (i = 0; i < data->pwm_num; i++) {

760

for (i = 0; i < data->pwm_num; i++) {

761

if (!(data->has_fan & (1 << i)))

761

if (!(data->has_fan & (1 << i)))

762

continue;

762

continue;

763

764

/* pwmcfg, tolerance mapped for i=0, i=1 to same reg */

764

/* pwmcfg, tolerance mapped for i=0, i=1 to same reg */

765

if (i != 1) {

765

if (i != 1) {

766

pwmcfg = w83627ehf_read_value(data,

766

pwmcfg = w83627ehf_read_value(data,

767

W83627EHF_REG_PWM_ENABLE[i]);

767

W83627EHF_REG_PWM_ENABLE[i]);

768

tolerance = w83627ehf_read_value(data,

768

tolerance = w83627ehf_read_value(data,

769

W83627EHF_REG_TOLERANCE[i]);

769

W83627EHF_REG_TOLERANCE[i]);

770

}

770

}

771

data->pwm_mode[i] =

771

data->pwm_mode[i] =

772

((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;

772

((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;

773

data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])

773

data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])

774

& 3) + 1;

774

& 3) + 1;

775

data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);

775

data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);

776

777

data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;

777

data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;

778

}

778

}

779

}

779

}

780

781

static void w83627ehf_update_pwm_common(struct device *dev,

781

static void w83627ehf_update_pwm_common(struct device *dev,

782

struct w83627ehf_data *data)

782

struct w83627ehf_data *data)

783

{

783

{

784

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

784

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

785

786

if (sio_data->kind == nct6775 || sio_data->kind == nct6776)

786

if (sio_data->kind == nct6775 || sio_data->kind == nct6776)

787

nct6775_update_pwm(data);

787

nct6775_update_pwm(data);

788

else

788

else

789

w83627ehf_update_pwm(data);

789

w83627ehf_update_pwm(data);

790

}

790

}

791

792

static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)

792

static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)

793

{

793

{

794

struct w83627ehf_data *data = dev_get_drvdata(dev);

794

struct w83627ehf_data *data = dev_get_drvdata(dev);

795

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

795

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

796

797

int i;

797

int i;

798

799

mutex_lock(&data->update_lock);

799

mutex_lock(&data->update_lock);

800

801

if (time_after(jiffies, data->last_updated + HZ + HZ/2)

801

if (time_after(jiffies, data->last_updated + HZ + HZ/2)

802

|| !data->valid) {

802

|| !data->valid) {

803

/* Fan clock dividers */

803

/* Fan clock dividers */

804

w83627ehf_update_fan_div_common(dev, data);

804

w83627ehf_update_fan_div_common(dev, data);

805

806

/* Measured voltages and limits */

806

/* Measured voltages and limits */

807

for (i = 0; i < data->in_num; i++) {

807

for (i = 0; i < data->in_num; i++) {

808

if ((i == 6) && data->in6_skip)

808

if ((i == 6) && data->in6_skip)

809

continue;

809

continue;

810

811

data->in[i] = w83627ehf_read_value(data,

811

data->in[i] = w83627ehf_read_value(data,

812

W83627EHF_REG_IN(i));

812

W83627EHF_REG_IN(i));

813

data->in_min[i] = w83627ehf_read_value(data,

813

data->in_min[i] = w83627ehf_read_value(data,

814

W83627EHF_REG_IN_MIN(i));

814

W83627EHF_REG_IN_MIN(i));

815

data->in_max[i] = w83627ehf_read_value(data,

815

data->in_max[i] = w83627ehf_read_value(data,

816

W83627EHF_REG_IN_MAX(i));

816

W83627EHF_REG_IN_MAX(i));

817

}

817

}

818

819

/* Measured fan speeds and limits */

819

/* Measured fan speeds and limits */

820

for (i = 0; i < 5; i++) {

820

for (i = 0; i < 5; i++) {

821

u16 reg;

821

u16 reg;

822

823

if (!(data->has_fan & (1 << i)))

823

if (!(data->has_fan & (1 << i)))

824

continue;

824

continue;

825

826

reg = w83627ehf_read_value(data, data->REG_FAN[i]);

826

reg = w83627ehf_read_value(data, data->REG_FAN[i]);

827

data->rpm[i] = data->fan_from_reg(reg,

827

data->rpm[i] = data->fan_from_reg(reg,

828

data->fan_div[i]);

828

data->fan_div[i]);

829

830

if (data->has_fan_min & (1 << i))

830

if (data->has_fan_min & (1 << i))

831

data->fan_min[i] = w83627ehf_read_value(data,

831

data->fan_min[i] = w83627ehf_read_value(data,

832

data->REG_FAN_MIN[i]);

832

data->REG_FAN_MIN[i]);

833

834

/*

834

/*

835

* If we failed to measure the fan speed and clock

835

* If we failed to measure the fan speed and clock

836

* divider can be increased, let's try that for next

836

* divider can be increased, let's try that for next

837

* time

837

* time

838

*/

838

*/

839

if (data->has_fan_div

839

if (data->has_fan_div

840

&& (reg >= 0xff || (sio_data->kind == nct6775

840

&& (reg >= 0xff || (sio_data->kind == nct6775

841

&& reg == 0x00))

841

&& reg == 0x00))

842

&& data->fan_div[i] < 0x07) {

842

&& data->fan_div[i] < 0x07) {

843

dev_dbg(dev,

843

dev_dbg(dev,

844

"Increasing fan%d clock divider from %u to %u\n",

844

"Increasing fan%d clock divider from %u to %u\n",

845

i + 1, div_from_reg(data->fan_div[i]),

845

i + 1, div_from_reg(data->fan_div[i]),

846

div_from_reg(data->fan_div[i] + 1));

846

div_from_reg(data->fan_div[i] + 1));

847

data->fan_div[i]++;

847

data->fan_div[i]++;

848

w83627ehf_write_fan_div_common(dev, data, i);

848

w83627ehf_write_fan_div_common(dev, data, i);

849

/* Preserve min limit if possible */

849

/* Preserve min limit if possible */

850

if ((data->has_fan_min & (1 << i))

850

if ((data->has_fan_min & (1 << i))

851

&& data->fan_min[i] >= 2

851

&& data->fan_min[i] >= 2

852

&& data->fan_min[i] != 255)

852

&& data->fan_min[i] != 255)

853

w83627ehf_write_value(data,

853

w83627ehf_write_value(data,

854

data->REG_FAN_MIN[i],

854

data->REG_FAN_MIN[i],

855

(data->fan_min[i] /= 2));

855

(data->fan_min[i] /= 2));

856

}

856

}

857

}

857

}

858

859

w83627ehf_update_pwm_common(dev, data);

859

w83627ehf_update_pwm_common(dev, data);

860

861

for (i = 0; i < data->pwm_num; i++) {

861

for (i = 0; i < data->pwm_num; i++) {

862

if (!(data->has_fan & (1 << i)))

862

if (!(data->has_fan & (1 << i)))

863

continue;

863

continue;

864

865

data->fan_start_output[i] =

865

data->fan_start_output[i] =

866

w83627ehf_read_value(data,

866

w83627ehf_read_value(data,

867

data->REG_FAN_START_OUTPUT[i]);

867

data->REG_FAN_START_OUTPUT[i]);

868

data->fan_stop_output[i] =

868

data->fan_stop_output[i] =

869

w83627ehf_read_value(data,

869

w83627ehf_read_value(data,

870

data->REG_FAN_STOP_OUTPUT[i]);

870

data->REG_FAN_STOP_OUTPUT[i]);

871

data->fan_stop_time[i] =

871

data->fan_stop_time[i] =

872

w83627ehf_read_value(data,

872

w83627ehf_read_value(data,

873

data->REG_FAN_STOP_TIME[i]);

873

data->REG_FAN_STOP_TIME[i]);

874

875

if (data->REG_FAN_MAX_OUTPUT &&

875

if (data->REG_FAN_MAX_OUTPUT &&

876

data->REG_FAN_MAX_OUTPUT[i] != 0xff)

876

data->REG_FAN_MAX_OUTPUT[i] != 0xff)

877

data->fan_max_output[i] =

877

data->fan_max_output[i] =

878

w83627ehf_read_value(data,

878

w83627ehf_read_value(data,

879

data->REG_FAN_MAX_OUTPUT[i]);

879

data->REG_FAN_MAX_OUTPUT[i]);

880

881

if (data->REG_FAN_STEP_OUTPUT &&

881

if (data->REG_FAN_STEP_OUTPUT &&

882

data->REG_FAN_STEP_OUTPUT[i] != 0xff)

882

data->REG_FAN_STEP_OUTPUT[i] != 0xff)

883

data->fan_step_output[i] =

883

data->fan_step_output[i] =

884

w83627ehf_read_value(data,

884

w83627ehf_read_value(data,

885

data->REG_FAN_STEP_OUTPUT[i]);

885

data->REG_FAN_STEP_OUTPUT[i]);

886

887

data->target_temp[i] =

887

data->target_temp[i] =

888

w83627ehf_read_value(data,

888

w83627ehf_read_value(data,

889

data->REG_TARGET[i]) &

889

data->REG_TARGET[i]) &

890

(data->pwm_mode[i] == 1 ? 0x7f : 0xff);

890

(data->pwm_mode[i] == 1 ? 0x7f : 0xff);

891

}

891

}

892

893

/* Measured temperatures and limits */

893

/* Measured temperatures and limits */

894

for (i = 0; i < NUM_REG_TEMP; i++) {

894

for (i = 0; i < NUM_REG_TEMP; i++) {

895

if (!(data->have_temp & (1 << i)))

895

if (!(data->have_temp & (1 << i)))

896

continue;

896

continue;

897

data->temp[i] = w83627ehf_read_temp(data,

897

data->temp[i] = w83627ehf_read_temp(data,

898

data->reg_temp[i]);

898

data->reg_temp[i]);

899

if (data->reg_temp_over[i])

899

if (data->reg_temp_over[i])

900

data->temp_max[i]

900

data->temp_max[i]

901

= w83627ehf_read_temp(data,

901

= w83627ehf_read_temp(data,

902

data->reg_temp_over[i]);

902

data->reg_temp_over[i]);

903

if (data->reg_temp_hyst[i])

903

if (data->reg_temp_hyst[i])

904

data->temp_max_hyst[i]

904

data->temp_max_hyst[i]

905

= w83627ehf_read_temp(data,

905

= w83627ehf_read_temp(data,

906

data->reg_temp_hyst[i]);

906

data->reg_temp_hyst[i]);

907

if (i > 2)

907

if (i > 2)

908

continue;

908

continue;

909

if (data->have_temp_offset & (1 << i))

909

if (data->have_temp_offset & (1 << i))

910

data->temp_offset[i]

910

data->temp_offset[i]

911

= w83627ehf_read_value(data,

911

= w83627ehf_read_value(data,

912

W83627EHF_REG_TEMP_OFFSET[i]);

912

W83627EHF_REG_TEMP_OFFSET[i]);

913

}

913

}

914

915

data->alarms = w83627ehf_read_value(data,

915

data->alarms = w83627ehf_read_value(data,

916

W83627EHF_REG_ALARM1) |

916

W83627EHF_REG_ALARM1) |

917

(w83627ehf_read_value(data,

917

(w83627ehf_read_value(data,

918

W83627EHF_REG_ALARM2) << 8) |

918

W83627EHF_REG_ALARM2) << 8) |

919

(w83627ehf_read_value(data,

919

(w83627ehf_read_value(data,

920

W83627EHF_REG_ALARM3) << 16);

920

W83627EHF_REG_ALARM3) << 16);

921

922

data->caseopen = w83627ehf_read_value(data,

922

data->caseopen = w83627ehf_read_value(data,

923

W83627EHF_REG_CASEOPEN_DET);

923

W83627EHF_REG_CASEOPEN_DET);

924

925

data->last_updated = jiffies;

925

data->last_updated = jiffies;

926

data->valid = 1;

926

data->valid = 1;

927

}

927

}

928

929

mutex_unlock(&data->update_lock);

929

mutex_unlock(&data->update_lock);

930

return data;

930

return data;

931

}

931

}

932

933

/*

933

/*

934

* Sysfs callback functions

934

* Sysfs callback functions

935

*/

935

*/

936

#define show_in_reg(reg) \

936

#define show_in_reg(reg) \

937

static ssize_t \

937

static ssize_t \

938

show_##reg(struct device *dev, struct device_attribute *attr, \

938

show_##reg(struct device *dev, struct device_attribute *attr, \

939

char *buf) \

939

char *buf) \

940

{ \

940

{ \

941

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

941

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

942

struct sensor_device_attribute *sensor_attr = \

942

struct sensor_device_attribute *sensor_attr = \

943

to_sensor_dev_attr(attr); \

943

to_sensor_dev_attr(attr); \

944

int nr = sensor_attr->index; \

944

int nr = sensor_attr->index; \

945

return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr, \

945

return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr, \

946

data->scale_in)); \

946

data->scale_in)); \

947

}

947

}

948

show_in_reg(in)

948

show_in_reg(in)

949

show_in_reg(in_min)

949

show_in_reg(in_min)

950

show_in_reg(in_max)

950

show_in_reg(in_max)

951

952

#define store_in_reg(REG, reg) \

952

#define store_in_reg(REG, reg) \

953

static ssize_t \

953

static ssize_t \

954

store_in_##reg(struct device *dev, struct device_attribute *attr, \

954

store_in_##reg(struct device *dev, struct device_attribute *attr, \

955

const char *buf, size_t count) \

955

const char *buf, size_t count) \

956

{ \

956

{ \

957

struct w83627ehf_data *data = dev_get_drvdata(dev); \

957

struct w83627ehf_data *data = dev_get_drvdata(dev); \

958

struct sensor_device_attribute *sensor_attr = \

958

struct sensor_device_attribute *sensor_attr = \

959

to_sensor_dev_attr(attr); \

959

to_sensor_dev_attr(attr); \

960

int nr = sensor_attr->index; \

960

int nr = sensor_attr->index; \

961

unsigned long val; \

961

unsigned long val; \

962

int err; \

962

int err; \

963

err = kstrtoul(buf, 10, &val); \

963

err = kstrtoul(buf, 10, &val); \

964

if (err < 0) \

964

if (err < 0) \

965

return err; \

965

return err; \

966

mutex_lock(&data->update_lock); \

966

mutex_lock(&data->update_lock); \

967

data->in_##reg[nr] = in_to_reg(val, nr, data->scale_in); \

967

data->in_##reg[nr] = in_to_reg(val, nr, data->scale_in); \

968

w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \

968

w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \

969

data->in_##reg[nr]); \

969

data->in_##reg[nr]); \

970

mutex_unlock(&data->update_lock); \

970

mutex_unlock(&data->update_lock); \

971

return count; \

971

return count; \

972

}

972

}

973

974

store_in_reg(MIN, min)

974

store_in_reg(MIN, min)

975

store_in_reg(MAX, max)

975

store_in_reg(MAX, max)

976

977

static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,

977

static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,

978

char *buf)

978

char *buf)

979

{

979

{

980

struct w83627ehf_data *data = w83627ehf_update_device(dev);

980

struct w83627ehf_data *data = w83627ehf_update_device(dev);

981

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

981

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

982

int nr = sensor_attr->index;

982

int nr = sensor_attr->index;

983

return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);

983

return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);

984

}

984

}

985

986

static struct sensor_device_attribute sda_in_input[] = {

986

static struct sensor_device_attribute sda_in_input[] = {

987

SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),

987

SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),

988

SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),

988

SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),

989

SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),

989

SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),

990

SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),

990

SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),

991

SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),

991

SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),

992

SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),

992

SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),

993

SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),

993

SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),

994

SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),

994

SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),

995

SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),

995

SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),

996

SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),

996

SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),

997

};

997

};

998

999

static struct sensor_device_attribute sda_in_alarm[] = {

999

static struct sensor_device_attribute sda_in_alarm[] = {

1000

SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),

1000

SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),

1001

SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),

1001

SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),

1002

SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),

1002

SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),

1003

SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),

1003

SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),

1004

SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),

1004

SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),

1005

SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),

1005

SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),

1006

SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),

1006

SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),

1007

SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),

1007

SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),

1008

SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),

1008

SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),

1009

SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),

1009

SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),

1010

};

1010

};

1011

1012

static struct sensor_device_attribute sda_in_min[] = {

1012

static struct sensor_device_attribute sda_in_min[] = {

1013

SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),

1013

SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),

1014

SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),

1014

SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),

1015

SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),

1015

SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),

1016

SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),

1016

SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),

1017

SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),

1017

SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),

1018

SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),

1018

SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),

1019

SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),

1019

SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),

1020

SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),

1020

SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),

1021

SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),

1021

SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),

1022

SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),

1022

SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),

1023

};

1023

};

1024

1025

static struct sensor_device_attribute sda_in_max[] = {

1025

static struct sensor_device_attribute sda_in_max[] = {

1026

SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),

1026

SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),

1027

SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),

1027

SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),

1028

SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),

1028

SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),

1029

SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),

1029

SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),

1030

SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),

1030

SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),

1031

SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),

1031

SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),

1032

SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),

1032

SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),

1033

SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),

1033

SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),

1034

SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),

1034

SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),

1035

SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),

1035

SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),

1036

};

1036

};

1037

1038

static ssize_t

1038

static ssize_t

1039

show_fan(struct device *dev, struct device_attribute *attr, char *buf)

1039

show_fan(struct device *dev, struct device_attribute *attr, char *buf)

1040

{

1040

{

1041

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1041

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1042

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1042

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1043

int nr = sensor_attr->index;

1043

int nr = sensor_attr->index;

1044

return sprintf(buf, "%d\n", data->rpm[nr]);

1044

return sprintf(buf, "%d\n", data->rpm[nr]);

1045

}

1045

}

1046

1047

static ssize_t

1047

static ssize_t

1048

show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)

1048

show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)

1049

{

1049

{

1050

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1050

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1051

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1051

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1052

int nr = sensor_attr->index;

1052

int nr = sensor_attr->index;

1053

return sprintf(buf, "%d\n",

1053

return sprintf(buf, "%d\n",

1054

data->fan_from_reg_min(data->fan_min[nr],

1054

data->fan_from_reg_min(data->fan_min[nr],

1055

data->fan_div[nr]));

1055

data->fan_div[nr]));

1056

}

1056

}

1057

1058

static ssize_t

1058

static ssize_t

1059

show_fan_div(struct device *dev, struct device_attribute *attr,

1059

show_fan_div(struct device *dev, struct device_attribute *attr,

1060

char *buf)

1060

char *buf)

1061

{

1061

{

1062

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1062

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1063

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1063

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1064

int nr = sensor_attr->index;

1064

int nr = sensor_attr->index;

1065

return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));

1065

return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));

1066

}

1066

}

1067

1068

static ssize_t

1068

static ssize_t

1069

store_fan_min(struct device *dev, struct device_attribute *attr,

1069

store_fan_min(struct device *dev, struct device_attribute *attr,

1070

const char *buf, size_t count)

1070

const char *buf, size_t count)

1071

{

1071

{

1072

struct w83627ehf_data *data = dev_get_drvdata(dev);

1072

struct w83627ehf_data *data = dev_get_drvdata(dev);

1073

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1073

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1074

int nr = sensor_attr->index;

1074

int nr = sensor_attr->index;

1075

unsigned long val;

1075

unsigned long val;

1076

int err;

1076

int err;

1077

unsigned int reg;

1077

unsigned int reg;

1078

u8 new_div;

1078

u8 new_div;

1079

1080

err = kstrtoul(buf, 10, &val);

1080

err = kstrtoul(buf, 10, &val);

1081

if (err < 0)

1081

if (err < 0)

1082

return err;

1082

return err;

1083

1084

mutex_lock(&data->update_lock);

1084

mutex_lock(&data->update_lock);

1085

if (!data->has_fan_div) {

1085

if (!data->has_fan_div) {

1086

/*

1086

/*

1087

* Only NCT6776F for now, so we know that this is a 13 bit

1087

* Only NCT6776F for now, so we know that this is a 13 bit

1088

* register

1088

* register

1089

*/

1089

*/

1090

if (!val) {

1090

if (!val) {

1091

val = 0xff1f;

1091

val = 0xff1f;

1092

} else {

1092

} else {

1093

if (val > 1350000U)

1093

if (val > 1350000U)

1094

val = 135000U;

1094

val = 135000U;

1095

val = 1350000U / val;

1095

val = 1350000U / val;

1096

val = (val & 0x1f) | ((val << 3) & 0xff00);

1096

val = (val & 0x1f) | ((val << 3) & 0xff00);

1097

}

1097

}

1098

data->fan_min[nr] = val;

1098

data->fan_min[nr] = val;

1099

goto done; /* Leave fan divider alone */

1099

goto done; /* Leave fan divider alone */

1100

}

1100

}

1101

if (!val) {

1101

if (!val) {

1102

/* No min limit, alarm disabled */

1102

/* No min limit, alarm disabled */

1103

data->fan_min[nr] = 255;

1103

data->fan_min[nr] = 255;

1104

new_div = data->fan_div[nr]; /* No change */

1104

new_div = data->fan_div[nr]; /* No change */

1105

dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);

1105

dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);

1106

} else if ((reg = 1350000U / val) >= 128 * 255) {

1106

} else if ((reg = 1350000U / val) >= 128 * 255) {

1107

/*

1107

/*

1108

* Speed below this value cannot possibly be represented,

1108

* Speed below this value cannot possibly be represented,

1109

* even with the highest divider (128)

1109

* even with the highest divider (128)

1110

*/

1110

*/

1111

data->fan_min[nr] = 254;

1111

data->fan_min[nr] = 254;

1112

new_div = 7; /* 128 == (1 << 7) */

1112

new_div = 7; /* 128 == (1 << 7) */

1113

dev_warn(dev,

1113

dev_warn(dev,

1114

"fan%u low limit %lu below minimum %u, set to minimum\n",

1114

"fan%u low limit %lu below minimum %u, set to minimum\n",

1115

nr + 1, val, data->fan_from_reg_min(254, 7));

1115

nr + 1, val, data->fan_from_reg_min(254, 7));

1116

} else if (!reg) {

1116

} else if (!reg) {

1117

/*

1117

/*

1118

* Speed above this value cannot possibly be represented,

1118

* Speed above this value cannot possibly be represented,

1119

* even with the lowest divider (1)

1119

* even with the lowest divider (1)

1120

*/

1120

*/

1121

data->fan_min[nr] = 1;

1121

data->fan_min[nr] = 1;

1122

new_div = 0; /* 1 == (1 << 0) */

1122

new_div = 0; /* 1 == (1 << 0) */

1123

dev_warn(dev,

1123

dev_warn(dev,

1124

"fan%u low limit %lu above maximum %u, set to maximum\n",

1124

"fan%u low limit %lu above maximum %u, set to maximum\n",

1125

nr + 1, val, data->fan_from_reg_min(1, 0));

1125

nr + 1, val, data->fan_from_reg_min(1, 0));

1126

} else {

1126

} else {

1127

/*

1127

/*

1128

* Automatically pick the best divider, i.e. the one such

1128

* Automatically pick the best divider, i.e. the one such

1129

* that the min limit will correspond to a register value

1129

* that the min limit will correspond to a register value

1130

* in the 96..192 range

1130

* in the 96..192 range

1131

*/

1131

*/

1132

new_div = 0;

1132

new_div = 0;

1133

while (reg > 192 && new_div < 7) {

1133

while (reg > 192 && new_div < 7) {

1134

reg >>= 1;

1134

reg >>= 1;

1135

new_div++;

1135

new_div++;

1136

}

1136

}

1137

data->fan_min[nr] = reg;

1137

data->fan_min[nr] = reg;

1138

}

1138

}

1139

1140

/*

1140

/*

1141

* Write both the fan clock divider (if it changed) and the new

1141

* Write both the fan clock divider (if it changed) and the new

1142

* fan min (unconditionally)

1142

* fan min (unconditionally)

1143

*/

1143

*/

1144

if (new_div != data->fan_div[nr]) {

1144

if (new_div != data->fan_div[nr]) {

1145

dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",

1145

dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",

1146

nr + 1, div_from_reg(data->fan_div[nr]),

1146

nr + 1, div_from_reg(data->fan_div[nr]),

1147

div_from_reg(new_div));

1147

div_from_reg(new_div));

1148

data->fan_div[nr] = new_div;

1148

data->fan_div[nr] = new_div;

1149

w83627ehf_write_fan_div_common(dev, data, nr);

1149

w83627ehf_write_fan_div_common(dev, data, nr);

1150

/* Give the chip time to sample a new speed value */

1150

/* Give the chip time to sample a new speed value */

1151

data->last_updated = jiffies;

1151

data->last_updated = jiffies;

1152

}

1152

}

1153

done:

1153

done:

1154

w83627ehf_write_value(data, data->REG_FAN_MIN[nr],

1154

w83627ehf_write_value(data, data->REG_FAN_MIN[nr],

1155

data->fan_min[nr]);

1155

data->fan_min[nr]);

1156

mutex_unlock(&data->update_lock);

1156

mutex_unlock(&data->update_lock);

1157

1158

return count;

1158

return count;

1159

}

1159

}

1160

1161

static struct sensor_device_attribute sda_fan_input[] = {

1161

static struct sensor_device_attribute sda_fan_input[] = {

1162

SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),

1162

SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),

1163

SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),

1163

SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),

1164

SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),

1164

SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),

1165

SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),

1165

SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),

1166

SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),

1166

SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),

1167

};

1167

};

1168

1169

static struct sensor_device_attribute sda_fan_alarm[] = {

1169

static struct sensor_device_attribute sda_fan_alarm[] = {

1170

SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),

1170

SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),

1171

SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),

1171

SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),

1172

SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),

1172

SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),

1173

SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),

1173

SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),

1174

SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),

1174

SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),

1175

};

1175

};

1176

1177

static struct sensor_device_attribute sda_fan_min[] = {

1177

static struct sensor_device_attribute sda_fan_min[] = {

1178

SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,

1178

SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,

1179

store_fan_min, 0),

1179

store_fan_min, 0),

1180

SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,

1180

SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,

1181

store_fan_min, 1),

1181

store_fan_min, 1),

1182

SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,

1182

SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,

1183

store_fan_min, 2),

1183

store_fan_min, 2),

1184

SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,

1184

SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,

1185

store_fan_min, 3),

1185

store_fan_min, 3),

1186

SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,

1186

SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,

1187

store_fan_min, 4),

1187

store_fan_min, 4),

1188

};

1188

};

1189

1190

static struct sensor_device_attribute sda_fan_div[] = {

1190

static struct sensor_device_attribute sda_fan_div[] = {

1191

SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),

1191

SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),

1192

SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),

1192

SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),

1193

SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),

1193

SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),

1194

SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),

1194

SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),

1195

SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),

1195

SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),

1196

};

1196

};

1197

1198

static ssize_t

1198

static ssize_t

1199

show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)

1199

show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)

1200

{

1200

{

1201

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1201

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1202

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1202

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1203

int nr = sensor_attr->index;

1203

int nr = sensor_attr->index;

1204

return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);

1204

return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);

1205

}

1205

}

1206

1207

#define show_temp_reg(addr, reg) \

1207

#define show_temp_reg(addr, reg) \

1208

static ssize_t \

1208

static ssize_t \

1209

show_##reg(struct device *dev, struct device_attribute *attr, \

1209

show_##reg(struct device *dev, struct device_attribute *attr, \

1210

char *buf) \

1210

char *buf) \

1211

{ \

1211

{ \

1212

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

1212

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

1213

struct sensor_device_attribute *sensor_attr = \

1213

struct sensor_device_attribute *sensor_attr = \

1214

to_sensor_dev_attr(attr); \

1214

to_sensor_dev_attr(attr); \

1215

int nr = sensor_attr->index; \

1215

int nr = sensor_attr->index; \

1216

return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->reg[nr])); \

1216

return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->reg[nr])); \

1217

}

1217

}

1218

show_temp_reg(reg_temp, temp);

1218

show_temp_reg(reg_temp, temp);

1219

show_temp_reg(reg_temp_over, temp_max);

1219

show_temp_reg(reg_temp_over, temp_max);

1220

show_temp_reg(reg_temp_hyst, temp_max_hyst);

1220

show_temp_reg(reg_temp_hyst, temp_max_hyst);

1221

1222

#define store_temp_reg(addr, reg) \

1222

#define store_temp_reg(addr, reg) \

1223

static ssize_t \

1223

static ssize_t \

1224

store_##reg(struct device *dev, struct device_attribute *attr, \

1224

store_##reg(struct device *dev, struct device_attribute *attr, \

1225

const char *buf, size_t count) \

1225

const char *buf, size_t count) \

1226

{ \

1226

{ \

1227

struct w83627ehf_data *data = dev_get_drvdata(dev); \

1227

struct w83627ehf_data *data = dev_get_drvdata(dev); \

1228

struct sensor_device_attribute *sensor_attr = \

1228

struct sensor_device_attribute *sensor_attr = \

1229

to_sensor_dev_attr(attr); \

1229

to_sensor_dev_attr(attr); \

1230

int nr = sensor_attr->index; \

1230

int nr = sensor_attr->index; \

1231

int err; \

1231

int err; \

1232

long val; \

1232

long val; \

1233

err = kstrtol(buf, 10, &val); \

1233

err = kstrtol(buf, 10, &val); \

1234

if (err < 0) \

1234

if (err < 0) \

1235

return err; \

1235

return err; \

1236

mutex_lock(&data->update_lock); \

1236

mutex_lock(&data->update_lock); \

1237

data->reg[nr] = LM75_TEMP_TO_REG(val); \

1237

data->reg[nr] = LM75_TEMP_TO_REG(val); \

1238

w83627ehf_write_temp(data, data->addr[nr], data->reg[nr]); \

1238

w83627ehf_write_temp(data, data->addr[nr], data->reg[nr]); \

1239

mutex_unlock(&data->update_lock); \

1239

mutex_unlock(&data->update_lock); \

1240

return count; \

1240

return count; \

1241

}

1241

}

1242

store_temp_reg(reg_temp_over, temp_max);

1242

store_temp_reg(reg_temp_over, temp_max);

1243

store_temp_reg(reg_temp_hyst, temp_max_hyst);

1243

store_temp_reg(reg_temp_hyst, temp_max_hyst);

1244

1245

static ssize_t

1245

static ssize_t

1246

show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)

1246

show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)

1247

{

1247

{

1248

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1248

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1249

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1249

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1250

1251

return sprintf(buf, "%d\n",

1251

return sprintf(buf, "%d\n",

1252

data->temp_offset[sensor_attr->index] * 1000);

1252

data->temp_offset[sensor_attr->index] * 1000);

1253

}

1253

}

1254

1255

static ssize_t

1255

static ssize_t

1256

store_temp_offset(struct device *dev, struct device_attribute *attr,

1256

store_temp_offset(struct device *dev, struct device_attribute *attr,

1257

const char *buf, size_t count)

1257

const char *buf, size_t count)

1258

{

1258

{

1259

struct w83627ehf_data *data = dev_get_drvdata(dev);

1259

struct w83627ehf_data *data = dev_get_drvdata(dev);

1260

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1260

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1261

int nr = sensor_attr->index;

1261

int nr = sensor_attr->index;

1262

long val;

1262

long val;

1263

int err;

1263

int err;

1264

1265

err = kstrtol(buf, 10, &val);

1265

err = kstrtol(buf, 10, &val);

1266

if (err < 0)

1266

if (err < 0)

1267

return err;

1267

return err;

1268

1269

val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);

1269

val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);

1270

1271

mutex_lock(&data->update_lock);

1271

mutex_lock(&data->update_lock);

1272

data->temp_offset[nr] = val;

1272

data->temp_offset[nr] = val;

1273

w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[nr], val);

1273

w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[nr], val);

1274

mutex_unlock(&data->update_lock);

1274

mutex_unlock(&data->update_lock);

1275

return count;

1275

return count;

1276

}

1276

}

1277

1278

static ssize_t

1278

static ssize_t

1279

show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)

1279

show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)

1280

{

1280

{

1281

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1281

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1282

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1282

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1283

int nr = sensor_attr->index;

1283

int nr = sensor_attr->index;

1284

return sprintf(buf, "%d\n", (int)data->temp_type[nr]);

1284

return sprintf(buf, "%d\n", (int)data->temp_type[nr]);

1285

}

1285

}

1286

1287

static struct sensor_device_attribute sda_temp_input[] = {

1287

static struct sensor_device_attribute sda_temp_input[] = {

1288

SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),

1288

SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),

1289

SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),

1289

SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),

1290

SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),

1290

SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),

1291

SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),

1291

SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),

1292

SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),

1292

SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),

1293

SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),

1293

SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),

1294

SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),

1294

SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),

1295

SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),

1295

SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),

1296

SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),

1296

SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),

1297

};

1297

};

1298

1299

static struct sensor_device_attribute sda_temp_label[] = {

1299

static struct sensor_device_attribute sda_temp_label[] = {

1300

SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),

1300

SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),

1301

SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),

1301

SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),

1302

SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),

1302

SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),

1303

SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),

1303

SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),

1304

SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),

1304

SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),

1305

SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),

1305

SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),

1306

SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),

1306

SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),

1307

SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),

1307

SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),

1308

SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),

1308

SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),

1309

};

1309

};

1310

1311

static struct sensor_device_attribute sda_temp_max[] = {

1311

static struct sensor_device_attribute sda_temp_max[] = {

1312

SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,

1312

SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,

1313

store_temp_max, 0),

1313

store_temp_max, 0),

1314

SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,

1314

SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,

1315

store_temp_max, 1),

1315

store_temp_max, 1),

1316

SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,

1316

SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,

1317

store_temp_max, 2),

1317

store_temp_max, 2),

1318

SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,

1318

SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,

1319

store_temp_max, 3),

1319

store_temp_max, 3),

1320

SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,

1320

SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,

1321

store_temp_max, 4),

1321

store_temp_max, 4),

1322

SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,

1322

SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,

1323

store_temp_max, 5),

1323

store_temp_max, 5),

1324

SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,

1324

SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,

1325

store_temp_max, 6),

1325

store_temp_max, 6),

1326

SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,

1326

SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,

1327

store_temp_max, 7),

1327

store_temp_max, 7),

1328

SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,

1328

SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,

1329

store_temp_max, 8),

1329

store_temp_max, 8),

1330

};

1330

};

1331

1332

static struct sensor_device_attribute sda_temp_max_hyst[] = {

1332

static struct sensor_device_attribute sda_temp_max_hyst[] = {

1333

SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1333

SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1334

store_temp_max_hyst, 0),

1334

store_temp_max_hyst, 0),

1335

SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1335

SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1336

store_temp_max_hyst, 1),

1336

store_temp_max_hyst, 1),

1337

SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1337

SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1338

store_temp_max_hyst, 2),

1338

store_temp_max_hyst, 2),

1339

SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1339

SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1340

store_temp_max_hyst, 3),

1340

store_temp_max_hyst, 3),

1341

SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1341

SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1342

store_temp_max_hyst, 4),

1342

store_temp_max_hyst, 4),

1343

SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1343

SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1344

store_temp_max_hyst, 5),

1344

store_temp_max_hyst, 5),

1345

SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1345

SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1346

store_temp_max_hyst, 6),

1346

store_temp_max_hyst, 6),

1347

SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1347

SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1348

store_temp_max_hyst, 7),

1348

store_temp_max_hyst, 7),

1349

SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1349

SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,

1350

store_temp_max_hyst, 8),

1350

store_temp_max_hyst, 8),

1351

};

1351

};

1352

1353

static struct sensor_device_attribute sda_temp_alarm[] = {

1353

static struct sensor_device_attribute sda_temp_alarm[] = {

1354

SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),

1354

SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),

1355

SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),

1355

SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),

1356

SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),

1356

SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),

1357

};

1357

};

1358

1359

static struct sensor_device_attribute sda_temp_type[] = {

1359

static struct sensor_device_attribute sda_temp_type[] = {

1360

SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),

1360

SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),

1361

SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),

1361

SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),

1362

SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),

1362

SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),

1363

};

1363

};

1364

1365

static struct sensor_device_attribute sda_temp_offset[] = {

1365

static struct sensor_device_attribute sda_temp_offset[] = {

1366

SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,

1366

SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,

1367

store_temp_offset, 0),

1367

store_temp_offset, 0),

1368

SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,

1368

SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,

1369

store_temp_offset, 1),

1369

store_temp_offset, 1),

1370

SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,

1370

SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,

1371

store_temp_offset, 2),

1371

store_temp_offset, 2),

1372

};

1372

};

1373

1374

#define show_pwm_reg(reg) \

1374

#define show_pwm_reg(reg) \

1375

static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \

1375

static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \

1376

char *buf) \

1376

char *buf) \

1377

{ \

1377

{ \

1378

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

1378

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

1379

struct sensor_device_attribute *sensor_attr = \

1379

struct sensor_device_attribute *sensor_attr = \

1380

to_sensor_dev_attr(attr); \

1380

to_sensor_dev_attr(attr); \

1381

int nr = sensor_attr->index; \

1381

int nr = sensor_attr->index; \

1382

return sprintf(buf, "%d\n", data->reg[nr]); \

1382

return sprintf(buf, "%d\n", data->reg[nr]); \

1383

}

1383

}

1384

1385

show_pwm_reg(pwm_mode)

1385

show_pwm_reg(pwm_mode)

1386

show_pwm_reg(pwm_enable)

1386

show_pwm_reg(pwm_enable)

1387

show_pwm_reg(pwm)

1387

show_pwm_reg(pwm)

1388

1389

static ssize_t

1389

static ssize_t

1390

store_pwm_mode(struct device *dev, struct device_attribute *attr,

1390

store_pwm_mode(struct device *dev, struct device_attribute *attr,

1391

const char *buf, size_t count)

1391

const char *buf, size_t count)

1392

{

1392

{

1393

struct w83627ehf_data *data = dev_get_drvdata(dev);

1393

struct w83627ehf_data *data = dev_get_drvdata(dev);

1394

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1394

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1395

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

1395

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

1396

int nr = sensor_attr->index;

1396

int nr = sensor_attr->index;

1397

unsigned long val;

1397

unsigned long val;

1398

int err;

1398

int err;

1399

u16 reg;

1399

u16 reg;

1400

1401

err = kstrtoul(buf, 10, &val);

1401

err = kstrtoul(buf, 10, &val);

1402

if (err < 0)

1402

if (err < 0)

1403

return err;

1403

return err;

1404

1405

if (val > 1)

1405

if (val > 1)

1406

return -EINVAL;

1406

return -EINVAL;

1407

1408

/* On NCT67766F, DC mode is only supported for pwm1 */

1408

/* On NCT67766F, DC mode is only supported for pwm1 */

1409

if (sio_data->kind == nct6776 && nr && val != 1)

1409

if (sio_data->kind == nct6776 && nr && val != 1)

1410

return -EINVAL;

1410

return -EINVAL;

1411

1412

mutex_lock(&data->update_lock);

1412

mutex_lock(&data->update_lock);

1413

reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);

1413

reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);

1414

data->pwm_mode[nr] = val;

1414

data->pwm_mode[nr] = val;

1415

reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);

1415

reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);

1416

if (!val)

1416

if (!val)

1417

reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];

1417

reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];

1418

w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);

1418

w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);

1419

mutex_unlock(&data->update_lock);

1419

mutex_unlock(&data->update_lock);

1420

return count;

1420

return count;

1421

}

1421

}

1422

1423

static ssize_t

1423

static ssize_t

1424

store_pwm(struct device *dev, struct device_attribute *attr,

1424

store_pwm(struct device *dev, struct device_attribute *attr,

1425

const char *buf, size_t count)

1425

const char *buf, size_t count)

1426

{

1426

{

1427

struct w83627ehf_data *data = dev_get_drvdata(dev);

1427

struct w83627ehf_data *data = dev_get_drvdata(dev);

1428

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1428

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1429

int nr = sensor_attr->index;

1429

int nr = sensor_attr->index;

1430

unsigned long val;

1430

unsigned long val;

1431

int err;

1431

int err;

1432

1433

err = kstrtoul(buf, 10, &val);

1433

err = kstrtoul(buf, 10, &val);

1434

if (err < 0)

1434

if (err < 0)

1435

return err;

1435

return err;

1436

1437

val = clamp_val(val, 0, 255);

1437

val = clamp_val(val, 0, 255);

1438

1439

mutex_lock(&data->update_lock);

1439

mutex_lock(&data->update_lock);

1440

data->pwm[nr] = val;

1440

data->pwm[nr] = val;

1441

w83627ehf_write_value(data, data->REG_PWM[nr], val);

1441

w83627ehf_write_value(data, data->REG_PWM[nr], val);

1442

mutex_unlock(&data->update_lock);

1442

mutex_unlock(&data->update_lock);

1443

return count;

1443

return count;

1444

}

1444

}

1445

1446

static ssize_t

1446

static ssize_t

1447

store_pwm_enable(struct device *dev, struct device_attribute *attr,

1447

store_pwm_enable(struct device *dev, struct device_attribute *attr,

1448

const char *buf, size_t count)

1448

const char *buf, size_t count)

1449

{

1449

{

1450

struct w83627ehf_data *data = dev_get_drvdata(dev);

1450

struct w83627ehf_data *data = dev_get_drvdata(dev);

1451

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

1451

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

1452

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1452

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1453

int nr = sensor_attr->index;

1453

int nr = sensor_attr->index;

1454

unsigned long val;

1454

unsigned long val;

1455

int err;

1455

int err;

1456

u16 reg;

1456

u16 reg;

1457

1458

err = kstrtoul(buf, 10, &val);

1458

err = kstrtoul(buf, 10, &val);

1459

if (err < 0)

1459

if (err < 0)

1460

return err;

1460

return err;

1461

1462

if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))

1462

if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))

1463

return -EINVAL;

1463

return -EINVAL;

1464

/* SmartFan III mode is not supported on NCT6776F */

1464

/* SmartFan III mode is not supported on NCT6776F */

1465

if (sio_data->kind == nct6776 && val == 4)

1465

if (sio_data->kind == nct6776 && val == 4)

1466

return -EINVAL;

1466

return -EINVAL;

1467

1468

mutex_lock(&data->update_lock);

1468

mutex_lock(&data->update_lock);

1469

data->pwm_enable[nr] = val;

1469

data->pwm_enable[nr] = val;

1470

if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {

1470

if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {

1471

reg = w83627ehf_read_value(data,

1471

reg = w83627ehf_read_value(data,

1472

NCT6775_REG_FAN_MODE[nr]);

1472

NCT6775_REG_FAN_MODE[nr]);

1473

reg &= 0x0f;

1473

reg &= 0x0f;

1474

reg |= (val - 1) << 4;

1474

reg |= (val - 1) << 4;

1475

w83627ehf_write_value(data,

1475

w83627ehf_write_value(data,

1476

NCT6775_REG_FAN_MODE[nr], reg);

1476

NCT6775_REG_FAN_MODE[nr], reg);

1477

} else {

1477

} else {

1478

reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);

1478

reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);

1479

reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);

1479

reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);

1480

reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];

1480

reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];

1481

w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);

1481

w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);

1482

}

1482

}

1483

mutex_unlock(&data->update_lock);

1483

mutex_unlock(&data->update_lock);

1484

return count;

1484

return count;

1485

}

1485

}

1486

1487

1488

#define show_tol_temp(reg) \

1488

#define show_tol_temp(reg) \

1489

static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \

1489

static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \

1490

char *buf) \

1490

char *buf) \

1491

{ \

1491

{ \

1492

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

1492

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

1493

struct sensor_device_attribute *sensor_attr = \

1493

struct sensor_device_attribute *sensor_attr = \

1494

to_sensor_dev_attr(attr); \

1494

to_sensor_dev_attr(attr); \

1495

int nr = sensor_attr->index; \

1495

int nr = sensor_attr->index; \

1496

return sprintf(buf, "%d\n", data->reg[nr] * 1000); \

1496

return sprintf(buf, "%d\n", data->reg[nr] * 1000); \

1497

}

1497

}

1498

1499

show_tol_temp(tolerance)

1499

show_tol_temp(tolerance)

1500

show_tol_temp(target_temp)

1500

show_tol_temp(target_temp)

1501

1502

static ssize_t

1502

static ssize_t

1503

store_target_temp(struct device *dev, struct device_attribute *attr,

1503

store_target_temp(struct device *dev, struct device_attribute *attr,

1504

const char *buf, size_t count)

1504

const char *buf, size_t count)

1505

{

1505

{

1506

struct w83627ehf_data *data = dev_get_drvdata(dev);

1506

struct w83627ehf_data *data = dev_get_drvdata(dev);

1507

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1507

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1508

int nr = sensor_attr->index;

1508

int nr = sensor_attr->index;

1509

long val;

1509

long val;

1510

int err;

1510

int err;

1511

1512

err = kstrtol(buf, 10, &val);

1512

err = kstrtol(buf, 10, &val);

1513

if (err < 0)

1513

if (err < 0)

1514

return err;

1514

return err;

1515

1516

val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 127);

1516

val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 127);

1517

1518

mutex_lock(&data->update_lock);

1518

mutex_lock(&data->update_lock);

1519

data->target_temp[nr] = val;

1519

data->target_temp[nr] = val;

1520

w83627ehf_write_value(data, data->REG_TARGET[nr], val);

1520

w83627ehf_write_value(data, data->REG_TARGET[nr], val);

1521

mutex_unlock(&data->update_lock);

1521

mutex_unlock(&data->update_lock);

1522

return count;

1522

return count;

1523

}

1523

}

1524

1525

static ssize_t

1525

static ssize_t

1526

store_tolerance(struct device *dev, struct device_attribute *attr,

1526

store_tolerance(struct device *dev, struct device_attribute *attr,

1527

const char *buf, size_t count)

1527

const char *buf, size_t count)

1528

{

1528

{

1529

struct w83627ehf_data *data = dev_get_drvdata(dev);

1529

struct w83627ehf_data *data = dev_get_drvdata(dev);

1530

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

1530

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

1531

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1531

struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);

1532

int nr = sensor_attr->index;

1532

int nr = sensor_attr->index;

1533

u16 reg;

1533

u16 reg;

1534

long val;

1534

long val;

1535

int err;

1535

int err;

1536

1537

err = kstrtol(buf, 10, &val);

1537

err = kstrtol(buf, 10, &val);

1538

if (err < 0)

1538

if (err < 0)

1539

return err;

1539

return err;

1540

1541

/* Limit the temp to 0C - 15C */

1541

/* Limit the temp to 0C - 15C */

1542

val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 15);

1542

val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 15);

1543

1544

mutex_lock(&data->update_lock);

1544

mutex_lock(&data->update_lock);

1545

if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {

1545

if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {

1546

/* Limit tolerance further for NCT6776F */

1546

/* Limit tolerance further for NCT6776F */

1547

if (sio_data->kind == nct6776 && val > 7)

1547

if (sio_data->kind == nct6776 && val > 7)

1548

val = 7;

1548

val = 7;

1549

reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);

1549

reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);

1550

reg = (reg & 0xf0) | val;

1550

reg = (reg & 0xf0) | val;

1551

w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);

1551

w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);

1552

} else {

1552

} else {

1553

reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);

1553

reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);

1554

if (nr == 1)

1554

if (nr == 1)

1555

reg = (reg & 0x0f) | (val << 4);

1555

reg = (reg & 0x0f) | (val << 4);

1556

else

1556

else

1557

reg = (reg & 0xf0) | val;

1557

reg = (reg & 0xf0) | val;

1558

w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);

1558

w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);

1559

}

1559

}

1560

data->tolerance[nr] = val;

1560

data->tolerance[nr] = val;

1561

mutex_unlock(&data->update_lock);

1561

mutex_unlock(&data->update_lock);

1562

return count;

1562

return count;

1563

}

1563

}

1564

1565

static struct sensor_device_attribute sda_pwm[] = {

1565

static struct sensor_device_attribute sda_pwm[] = {

1566

SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),

1566

SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),

1567

SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),

1567

SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),

1568

SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),

1568

SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),

1569

SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),

1569

SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),

1570

};

1570

};

1571

1572

static struct sensor_device_attribute sda_pwm_mode[] = {

1572

static struct sensor_device_attribute sda_pwm_mode[] = {

1573

SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,

1573

SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,

1574

store_pwm_mode, 0),

1574

store_pwm_mode, 0),

1575

SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,

1575

SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,

1576

store_pwm_mode, 1),

1576

store_pwm_mode, 1),

1577

SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,

1577

SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,

1578

store_pwm_mode, 2),

1578

store_pwm_mode, 2),

1579

SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,

1579

SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,

1580

store_pwm_mode, 3),

1580

store_pwm_mode, 3),

1581

};

1581

};

1582

1583

static struct sensor_device_attribute sda_pwm_enable[] = {

1583

static struct sensor_device_attribute sda_pwm_enable[] = {

1584

SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,

1584

SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,

1585

store_pwm_enable, 0),

1585

store_pwm_enable, 0),

1586

SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,

1586

SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,

1587

store_pwm_enable, 1),

1587

store_pwm_enable, 1),

1588

SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,

1588

SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,

1589

store_pwm_enable, 2),

1589

store_pwm_enable, 2),

1590

SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,

1590

SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,

1591

store_pwm_enable, 3),

1591

store_pwm_enable, 3),

1592

};

1592

};

1593

1594

static struct sensor_device_attribute sda_target_temp[] = {

1594

static struct sensor_device_attribute sda_target_temp[] = {

1595

SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,

1595

SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,

1596

store_target_temp, 0),

1596

store_target_temp, 0),

1597

SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,

1597

SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,

1598

store_target_temp, 1),

1598

store_target_temp, 1),

1599

SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,

1599

SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,

1600

store_target_temp, 2),

1600

store_target_temp, 2),

1601

SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,

1601

SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,

1602

store_target_temp, 3),

1602

store_target_temp, 3),

1603

};

1603

};

1604

1605

static struct sensor_device_attribute sda_tolerance[] = {

1605

static struct sensor_device_attribute sda_tolerance[] = {

1606

SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,

1606

SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,

1607

store_tolerance, 0),

1607

store_tolerance, 0),

1608

SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,

1608

SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,

1609

store_tolerance, 1),

1609

store_tolerance, 1),

1610

SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,

1610

SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,

1611

store_tolerance, 2),

1611

store_tolerance, 2),

1612

SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,

1612

SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,

1613

store_tolerance, 3),

1613

store_tolerance, 3),

1614

};

1614

};

1615

1616

/* Smart Fan registers */

1616

/* Smart Fan registers */

1617

1618

#define fan_functions(reg, REG) \

1618

#define fan_functions(reg, REG) \

1619

static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \

1619

static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \

1620

char *buf) \

1620

char *buf) \

1621

{ \

1621

{ \

1622

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

1622

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

1623

struct sensor_device_attribute *sensor_attr = \

1623

struct sensor_device_attribute *sensor_attr = \

1624

to_sensor_dev_attr(attr); \

1624

to_sensor_dev_attr(attr); \

1625

int nr = sensor_attr->index; \

1625

int nr = sensor_attr->index; \

1626

return sprintf(buf, "%d\n", data->reg[nr]); \

1626

return sprintf(buf, "%d\n", data->reg[nr]); \

1627

} \

1627

} \

1628

static ssize_t \

1628

static ssize_t \

1629

store_##reg(struct device *dev, struct device_attribute *attr, \

1629

store_##reg(struct device *dev, struct device_attribute *attr, \

1630

const char *buf, size_t count) \

1630

const char *buf, size_t count) \

1631

{ \

1631

{ \

1632

struct w83627ehf_data *data = dev_get_drvdata(dev); \

1632

struct w83627ehf_data *data = dev_get_drvdata(dev); \

1633

struct sensor_device_attribute *sensor_attr = \

1633

struct sensor_device_attribute *sensor_attr = \

1634

to_sensor_dev_attr(attr); \

1634

to_sensor_dev_attr(attr); \

1635

int nr = sensor_attr->index; \

1635

int nr = sensor_attr->index; \

1636

unsigned long val; \

1636

unsigned long val; \

1637

int err; \

1637

int err; \

1638

err = kstrtoul(buf, 10, &val); \

1638

err = kstrtoul(buf, 10, &val); \

1639

if (err < 0) \

1639

if (err < 0) \

1640

return err; \

1640

return err; \

1641

val = clamp_val(val, 1, 255); \

1641

val = clamp_val(val, 1, 255); \

1642

mutex_lock(&data->update_lock); \

1642

mutex_lock(&data->update_lock); \

1643

data->reg[nr] = val; \

1643

data->reg[nr] = val; \

1644

w83627ehf_write_value(data, data->REG_##REG[nr], val); \

1644

w83627ehf_write_value(data, data->REG_##REG[nr], val); \

1645

mutex_unlock(&data->update_lock); \

1645

mutex_unlock(&data->update_lock); \

1646

return count; \

1646

return count; \

1647

}

1647

}

1648

1649

fan_functions(fan_start_output, FAN_START_OUTPUT)

1649

fan_functions(fan_start_output, FAN_START_OUTPUT)

1650

fan_functions(fan_stop_output, FAN_STOP_OUTPUT)

1650

fan_functions(fan_stop_output, FAN_STOP_OUTPUT)

1651

fan_functions(fan_max_output, FAN_MAX_OUTPUT)

1651

fan_functions(fan_max_output, FAN_MAX_OUTPUT)

1652

fan_functions(fan_step_output, FAN_STEP_OUTPUT)

1652

fan_functions(fan_step_output, FAN_STEP_OUTPUT)

1653

1654

#define fan_time_functions(reg, REG) \

1654

#define fan_time_functions(reg, REG) \

1655

static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \

1655

static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \

1656

char *buf) \

1656

char *buf) \

1657

{ \

1657

{ \

1658

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

1658

struct w83627ehf_data *data = w83627ehf_update_device(dev); \

1659

struct sensor_device_attribute *sensor_attr = \

1659

struct sensor_device_attribute *sensor_attr = \

1660

to_sensor_dev_attr(attr); \

1660

to_sensor_dev_attr(attr); \

1661

int nr = sensor_attr->index; \

1661

int nr = sensor_attr->index; \

1662

return sprintf(buf, "%d\n", \

1662

return sprintf(buf, "%d\n", \

1663

step_time_from_reg(data->reg[nr], \

1663

step_time_from_reg(data->reg[nr], \

1664

data->pwm_mode[nr])); \

1664

data->pwm_mode[nr])); \

1665

} \

1665

} \

1666

\

1666

\

1667

static ssize_t \

1667

static ssize_t \

1668

store_##reg(struct device *dev, struct device_attribute *attr, \

1668

store_##reg(struct device *dev, struct device_attribute *attr, \

1669

const char *buf, size_t count) \

1669

const char *buf, size_t count) \

1670

{ \

1670

{ \

1671

struct w83627ehf_data *data = dev_get_drvdata(dev); \

1671

struct w83627ehf_data *data = dev_get_drvdata(dev); \

1672

struct sensor_device_attribute *sensor_attr = \

1672

struct sensor_device_attribute *sensor_attr = \

1673

to_sensor_dev_attr(attr); \

1673

to_sensor_dev_attr(attr); \

1674

int nr = sensor_attr->index; \

1674

int nr = sensor_attr->index; \

1675

unsigned long val; \

1675

unsigned long val; \

1676

int err; \

1676

int err; \

1677

err = kstrtoul(buf, 10, &val); \

1677

err = kstrtoul(buf, 10, &val); \

1678

if (err < 0) \

1678

if (err < 0) \

1679

return err; \

1679

return err; \

1680

val = step_time_to_reg(val, data->pwm_mode[nr]); \

1680

val = step_time_to_reg(val, data->pwm_mode[nr]); \

1681

mutex_lock(&data->update_lock); \

1681

mutex_lock(&data->update_lock); \

1682

data->reg[nr] = val; \

1682

data->reg[nr] = val; \

1683

w83627ehf_write_value(data, data->REG_##REG[nr], val); \

1683

w83627ehf_write_value(data, data->REG_##REG[nr], val); \

1684

mutex_unlock(&data->update_lock); \

1684

mutex_unlock(&data->update_lock); \

1685

return count; \

1685

return count; \

1686

} \

1686

} \

1687

1688

fan_time_functions(fan_stop_time, FAN_STOP_TIME)

1688

fan_time_functions(fan_stop_time, FAN_STOP_TIME)

1689

1690

static ssize_t show_name(struct device *dev, struct device_attribute *attr,

1690

static ssize_t show_name(struct device *dev, struct device_attribute *attr,

1691

char *buf)

1691

char *buf)

1692

{

1692

{

1693

struct w83627ehf_data *data = dev_get_drvdata(dev);

1693

struct w83627ehf_data *data = dev_get_drvdata(dev);

1694

1695

return sprintf(buf, "%s\n", data->name);

1695

return sprintf(buf, "%s\n", data->name);

1696

}

1696

}

1697

static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);

1697

static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);

1698

1699

static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {

1699

static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {

1700

SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,

1700

SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,

1701

store_fan_stop_time, 3),

1701

store_fan_stop_time, 3),

1702

SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,

1702

SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,

1703

store_fan_start_output, 3),

1703

store_fan_start_output, 3),

1704

SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,

1704

SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,

1705

store_fan_stop_output, 3),

1705

store_fan_stop_output, 3),

1706

SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,

1706

SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,

1707

store_fan_max_output, 3),

1707

store_fan_max_output, 3),

1708

SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,

1708

SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,

1709

store_fan_step_output, 3),

1709

store_fan_step_output, 3),

1710

};

1710

};

1711

1712

static struct sensor_device_attribute sda_sf3_arrays_fan3[] = {

1712

static struct sensor_device_attribute sda_sf3_arrays_fan3[] = {

1713

SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,

1713

SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,

1714

store_fan_stop_time, 2),

1714

store_fan_stop_time, 2),

1715

SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,

1715

SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,

1716

store_fan_start_output, 2),

1716

store_fan_start_output, 2),

1717

SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,

1717

SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,

1718

store_fan_stop_output, 2),

1718

store_fan_stop_output, 2),

1719

};

1719

};

1720

1721

static struct sensor_device_attribute sda_sf3_arrays[] = {

1721

static struct sensor_device_attribute sda_sf3_arrays[] = {

1722

SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,

1722

SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,

1723

store_fan_stop_time, 0),

1723

store_fan_stop_time, 0),

1724

SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,

1724

SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,

1725

store_fan_stop_time, 1),

1725

store_fan_stop_time, 1),

1726

SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,

1726

SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,

1727

store_fan_start_output, 0),

1727

store_fan_start_output, 0),

1728

SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,

1728

SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,

1729

store_fan_start_output, 1),

1729

store_fan_start_output, 1),

1730

SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,

1730

SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,

1731

store_fan_stop_output, 0),

1731

store_fan_stop_output, 0),

1732

SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,

1732

SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,

1733

store_fan_stop_output, 1),

1733

store_fan_stop_output, 1),

1734

};

1734

};

1735

1736

1737

/*

1737

/*

1738

* pwm1 and pwm3 don't support max and step settings on all chips.

1738

* pwm1 and pwm3 don't support max and step settings on all chips.

1739

* Need to check support while generating/removing attribute files.

1739

* Need to check support while generating/removing attribute files.

1740

*/

1740

*/

1741

static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {

1741

static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {

1742

SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,

1742

SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,

1743

store_fan_max_output, 0),

1743

store_fan_max_output, 0),

1744

SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,

1744

SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,

1745

store_fan_step_output, 0),

1745

store_fan_step_output, 0),

1746

SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,

1746

SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,

1747

store_fan_max_output, 1),

1747

store_fan_max_output, 1),

1748

SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,

1748

SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,

1749

store_fan_step_output, 1),

1749

store_fan_step_output, 1),

1750

SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,

1750

SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,

1751

store_fan_max_output, 2),

1751

store_fan_max_output, 2),

1752

SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,

1752

SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,

1753

store_fan_step_output, 2),

1753

store_fan_step_output, 2),

1754

};

1754

};

1755

1756

static ssize_t

1756

static ssize_t

1757

show_vid(struct device *dev, struct device_attribute *attr, char *buf)

1757

show_vid(struct device *dev, struct device_attribute *attr, char *buf)

1758

{

1758

{

1759

struct w83627ehf_data *data = dev_get_drvdata(dev);

1759

struct w83627ehf_data *data = dev_get_drvdata(dev);

1760

return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));

1760

return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));

1761

}

1761

}

1762

static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);

1762

static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);

1763

1764

1765

/* Case open detection */

1765

/* Case open detection */

1766

1767

static ssize_t

1767

static ssize_t

1768

show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)

1768

show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)

1769

{

1769

{

1770

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1770

struct w83627ehf_data *data = w83627ehf_update_device(dev);

1771

1772

return sprintf(buf, "%d\n",

1772

return sprintf(buf, "%d\n",

1773

!!(data->caseopen & to_sensor_dev_attr_2(attr)->index));

1773

!!(data->caseopen & to_sensor_dev_attr_2(attr)->index));

1774

}

1774

}

1775

1776

static ssize_t

1776

static ssize_t

1777

clear_caseopen(struct device *dev, struct device_attribute *attr,

1777

clear_caseopen(struct device *dev, struct device_attribute *attr,

1778

const char *buf, size_t count)

1778

const char *buf, size_t count)

1779

{

1779

{

1780

struct w83627ehf_data *data = dev_get_drvdata(dev);

1780

struct w83627ehf_data *data = dev_get_drvdata(dev);

1781

unsigned long val;

1781

unsigned long val;

1782

u16 reg, mask;

1782

u16 reg, mask;

1783

1784

if (kstrtoul(buf, 10, &val) || val != 0)

1784

if (kstrtoul(buf, 10, &val) || val != 0)

1785

return -EINVAL;

1785

return -EINVAL;

1786

1787

mask = to_sensor_dev_attr_2(attr)->nr;

1787

mask = to_sensor_dev_attr_2(attr)->nr;

1788

1789

mutex_lock(&data->update_lock);

1789

mutex_lock(&data->update_lock);

1790

reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);

1790

reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);

1791

w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);

1791

w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);

1792

w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);

1792

w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);

1793

data->valid = 0; /* Force cache refresh */

1793

data->valid = 0; /* Force cache refresh */

1794

mutex_unlock(&data->update_lock);

1794

mutex_unlock(&data->update_lock);

1795

1796

return count;

1796

return count;

1797

}

1797

}

1798

1799

static struct sensor_device_attribute_2 sda_caseopen[] = {

1799

static struct sensor_device_attribute_2 sda_caseopen[] = {

1800

SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,

1800

SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,

1801

clear_caseopen, 0x80, 0x10),

1801

clear_caseopen, 0x80, 0x10),

1802

SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,

1802

SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,

1803

clear_caseopen, 0x40, 0x40),

1803

clear_caseopen, 0x40, 0x40),

1804

};

1804

};

1805

1806

/*

1806

/*

1807

* Driver and device management

1807

* Driver and device management

1808

*/

1808

*/

1809

1810

static void w83627ehf_device_remove_files(struct device *dev)

1810

static void w83627ehf_device_remove_files(struct device *dev)

1811

{

1811

{

1812

/*

1812

/*

1813

* some entries in the following arrays may not have been used in

1813

* some entries in the following arrays may not have been used in

1814

* device_create_file(), but device_remove_file() will ignore them

1814

* device_create_file(), but device_remove_file() will ignore them

1815

*/

1815

*/

1816

int i;

1816

int i;

1817

struct w83627ehf_data *data = dev_get_drvdata(dev);

1817

struct w83627ehf_data *data = dev_get_drvdata(dev);

1818

1819

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)

1819

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)

1820

device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);

1820

device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);

1821

for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {

1821

for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {

1822

struct sensor_device_attribute *attr =

1822

struct sensor_device_attribute *attr =

1823

&sda_sf3_max_step_arrays[i];

1823

&sda_sf3_max_step_arrays[i];

1824

if (data->REG_FAN_STEP_OUTPUT &&

1824

if (data->REG_FAN_STEP_OUTPUT &&

1825

data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)

1825

data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)

1826

device_remove_file(dev, &attr->dev_attr);

1826

device_remove_file(dev, &attr->dev_attr);

1827

}

1827

}

1828

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++)

1828

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++)

1829

device_remove_file(dev, &sda_sf3_arrays_fan3[i].dev_attr);

1829

device_remove_file(dev, &sda_sf3_arrays_fan3[i].dev_attr);

1830

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)

1830

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)

1831

device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);

1831

device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);

1832

for (i = 0; i < data->in_num; i++) {

1832

for (i = 0; i < data->in_num; i++) {

1833

if ((i == 6) && data->in6_skip)

1833

if ((i == 6) && data->in6_skip)

1834

continue;

1834

continue;

1835

device_remove_file(dev, &sda_in_input[i].dev_attr);

1835

device_remove_file(dev, &sda_in_input[i].dev_attr);

1836

device_remove_file(dev, &sda_in_alarm[i].dev_attr);

1836

device_remove_file(dev, &sda_in_alarm[i].dev_attr);

1837

device_remove_file(dev, &sda_in_min[i].dev_attr);

1837

device_remove_file(dev, &sda_in_min[i].dev_attr);

1838

device_remove_file(dev, &sda_in_max[i].dev_attr);

1838

device_remove_file(dev, &sda_in_max[i].dev_attr);

1839

}

1839

}

1840

for (i = 0; i < 5; i++) {

1840

for (i = 0; i < 5; i++) {

1841

device_remove_file(dev, &sda_fan_input[i].dev_attr);

1841

device_remove_file(dev, &sda_fan_input[i].dev_attr);

1842

device_remove_file(dev, &sda_fan_alarm[i].dev_attr);

1842

device_remove_file(dev, &sda_fan_alarm[i].dev_attr);

1843

device_remove_file(dev, &sda_fan_div[i].dev_attr);

1843

device_remove_file(dev, &sda_fan_div[i].dev_attr);

1844

device_remove_file(dev, &sda_fan_min[i].dev_attr);

1844

device_remove_file(dev, &sda_fan_min[i].dev_attr);

1845

}

1845

}

1846

for (i = 0; i < data->pwm_num; i++) {

1846

for (i = 0; i < data->pwm_num; i++) {

1847

device_remove_file(dev, &sda_pwm[i].dev_attr);

1847

device_remove_file(dev, &sda_pwm[i].dev_attr);

1848

device_remove_file(dev, &sda_pwm_mode[i].dev_attr);

1848

device_remove_file(dev, &sda_pwm_mode[i].dev_attr);

1849

device_remove_file(dev, &sda_pwm_enable[i].dev_attr);

1849

device_remove_file(dev, &sda_pwm_enable[i].dev_attr);

1850

device_remove_file(dev, &sda_target_temp[i].dev_attr);

1850

device_remove_file(dev, &sda_target_temp[i].dev_attr);

1851

device_remove_file(dev, &sda_tolerance[i].dev_attr);

1851

device_remove_file(dev, &sda_tolerance[i].dev_attr);

1852

}

1852

}

1853

for (i = 0; i < NUM_REG_TEMP; i++) {

1853

for (i = 0; i < NUM_REG_TEMP; i++) {

1854

if (!(data->have_temp & (1 << i)))

1854

if (!(data->have_temp & (1 << i)))

1855

continue;

1855

continue;

1856

device_remove_file(dev, &sda_temp_input[i].dev_attr);

1856

device_remove_file(dev, &sda_temp_input[i].dev_attr);

1857

device_remove_file(dev, &sda_temp_label[i].dev_attr);

1857

device_remove_file(dev, &sda_temp_label[i].dev_attr);

1858

if (i == 2 && data->temp3_val_only)

1858

if (i == 2 && data->temp3_val_only)

1859

continue;

1859

continue;

1860

device_remove_file(dev, &sda_temp_max[i].dev_attr);

1860

device_remove_file(dev, &sda_temp_max[i].dev_attr);

1861

device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);

1861

device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);

1862

if (i > 2)

1862

if (i > 2)

1863

continue;

1863

continue;

1864

device_remove_file(dev, &sda_temp_alarm[i].dev_attr);

1864

device_remove_file(dev, &sda_temp_alarm[i].dev_attr);

1865

device_remove_file(dev, &sda_temp_type[i].dev_attr);

1865

device_remove_file(dev, &sda_temp_type[i].dev_attr);

1866

device_remove_file(dev, &sda_temp_offset[i].dev_attr);

1866

device_remove_file(dev, &sda_temp_offset[i].dev_attr);

1867

}

1867

}

1868

1869

device_remove_file(dev, &sda_caseopen[0].dev_attr);

1869

device_remove_file(dev, &sda_caseopen[0].dev_attr);

1870

device_remove_file(dev, &sda_caseopen[1].dev_attr);

1870

device_remove_file(dev, &sda_caseopen[1].dev_attr);

1871

1872

device_remove_file(dev, &dev_attr_name);

1872

device_remove_file(dev, &dev_attr_name);

1873

device_remove_file(dev, &dev_attr_cpu0_vid);

1873

device_remove_file(dev, &dev_attr_cpu0_vid);

1874

}

1874

}

1875

1876

/* Get the monitoring functions started */

1876

/* Get the monitoring functions started */

1877

static inline void w83627ehf_init_device(struct w83627ehf_data *data,

1877

static inline void w83627ehf_init_device(struct w83627ehf_data *data,

1878

enum kinds kind)

1878

enum kinds kind)

1879

{

1879

{

1880

int i;

1880

int i;

1881

u8 tmp, diode;

1881

u8 tmp, diode;

1882

1883

/* Start monitoring is needed */

1883

/* Start monitoring is needed */

1884

tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);

1884

tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);

1885

if (!(tmp & 0x01))

1885

if (!(tmp & 0x01))

1886

w83627ehf_write_value(data, W83627EHF_REG_CONFIG,

1886

w83627ehf_write_value(data, W83627EHF_REG_CONFIG,

1887

tmp | 0x01);

1887

tmp | 0x01);

1888

1889

/* Enable temperature sensors if needed */

1889

/* Enable temperature sensors if needed */

1890

for (i = 0; i < NUM_REG_TEMP; i++) {

1890

for (i = 0; i < NUM_REG_TEMP; i++) {

1891

if (!(data->have_temp & (1 << i)))

1891

if (!(data->have_temp & (1 << i)))

1892

continue;

1892

continue;

1893

if (!data->reg_temp_config[i])

1893

if (!data->reg_temp_config[i])

1894

continue;

1894

continue;

1895

tmp = w83627ehf_read_value(data,

1895

tmp = w83627ehf_read_value(data,

1896

data->reg_temp_config[i]);

1896

data->reg_temp_config[i]);

1897

if (tmp & 0x01)

1897

if (tmp & 0x01)

1898

w83627ehf_write_value(data,

1898

w83627ehf_write_value(data,

1899

data->reg_temp_config[i],

1899

data->reg_temp_config[i],

1900

tmp & 0xfe);

1900

tmp & 0xfe);

1901

}

1901

}

1902

1903

/* Enable VBAT monitoring if needed */

1903

/* Enable VBAT monitoring if needed */

1904

tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);

1904

tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);

1905

if (!(tmp & 0x01))

1905

if (!(tmp & 0x01))

1906

w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);

1906

w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);

1907

1908

/* Get thermal sensor types */

1908

/* Get thermal sensor types */

1909

switch (kind) {

1909

switch (kind) {

1910

case w83627ehf:

1910

case w83627ehf:

1911

diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);

1911

diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);

1912

break;

1912

break;

1913

case w83627uhg:

1913

case w83627uhg:

1914

diode = 0x00;

1914

diode = 0x00;

1915

break;

1915

break;

1916

default:

1916

default:

1917

diode = 0x70;

1917

diode = 0x70;

1918

}

1918

}

1919

for (i = 0; i < 3; i++) {

1919

for (i = 0; i < 3; i++) {

1920

const char *label = NULL;

1920

const char *label = NULL;

1921

1922

if (data->temp_label)

1922

if (data->temp_label)

1923

label = data->temp_label[data->temp_src[i]];

1923

label = data->temp_label[data->temp_src[i]];

1924

1925

/* Digital source overrides analog type */

1925

/* Digital source overrides analog type */

1926

if (label && strncmp(label, "PECI", 4) == 0)

1926

if (label && strncmp(label, "PECI", 4) == 0)

1927

data->temp_type[i] = 6;

1927

data->temp_type[i] = 6;

1928

else if (label && strncmp(label, "AMD", 3) == 0)

1928

else if (label && strncmp(label, "AMD", 3) == 0)

1929

data->temp_type[i] = 5;

1929

data->temp_type[i] = 5;

1930

else if ((tmp & (0x02 << i)))

1930

else if ((tmp & (0x02 << i)))

1931

data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;

1931

data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;

1932

else

1932

else

1933

data->temp_type[i] = 4; /* thermistor */

1933

data->temp_type[i] = 4; /* thermistor */

1934

}

1934

}

1935

}

1935

}

1936

1937

static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,

1937

static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,

1938

int r1, int r2)

1938

int r1, int r2)

1939

{

1939

{

1940

u16 tmp;

1940

u16 tmp;

1941

1942

tmp = data->temp_src[r1];

1942

tmp = data->temp_src[r1];

1943

data->temp_src[r1] = data->temp_src[r2];

1943

data->temp_src[r1] = data->temp_src[r2];

1944

data->temp_src[r2] = tmp;

1944

data->temp_src[r2] = tmp;

1945

1946

tmp = data->reg_temp[r1];

1946

tmp = data->reg_temp[r1];

1947

data->reg_temp[r1] = data->reg_temp[r2];

1947

data->reg_temp[r1] = data->reg_temp[r2];

1948

data->reg_temp[r2] = tmp;

1948

data->reg_temp[r2] = tmp;

1949

1950

tmp = data->reg_temp_over[r1];

1950

tmp = data->reg_temp_over[r1];

1951

data->reg_temp_over[r1] = data->reg_temp_over[r2];

1951

data->reg_temp_over[r1] = data->reg_temp_over[r2];

1952

data->reg_temp_over[r2] = tmp;

1952

data->reg_temp_over[r2] = tmp;

1953

1954

tmp = data->reg_temp_hyst[r1];

1954

tmp = data->reg_temp_hyst[r1];

1955

data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];

1955

data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];

1956

data->reg_temp_hyst[r2] = tmp;

1956

data->reg_temp_hyst[r2] = tmp;

1957

1958

tmp = data->reg_temp_config[r1];

1958

tmp = data->reg_temp_config[r1];

1959

data->reg_temp_config[r1] = data->reg_temp_config[r2];

1959

data->reg_temp_config[r1] = data->reg_temp_config[r2];

1960

data->reg_temp_config[r2] = tmp;

1960

data->reg_temp_config[r2] = tmp;

1961

}

1961

}

1962

1963

static void

1963

static void

1964

w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)

1964

w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)

1965

{

1965

{

1966

int i;

1966

int i;

1967

1968

for (i = 0; i < n_temp; i++) {

1968

for (i = 0; i < n_temp; i++) {

1969

data->reg_temp[i] = W83627EHF_REG_TEMP[i];

1969

data->reg_temp[i] = W83627EHF_REG_TEMP[i];

1970

data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];

1970

data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];

1971

data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];

1971

data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];

1972

data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];

1972

data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];

1973

}

1973

}

1974

}

1974

}

1975

1976

static void

1976

static void

1977

w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,

1977

w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,

1978

struct w83627ehf_data *data)

1978

struct w83627ehf_data *data)

1979

{

1979

{

1980

int fan3pin, fan4pin, fan4min, fan5pin, regval;

1980

int fan3pin, fan4pin, fan4min, fan5pin, regval;

1981

1982

/* The W83627UHG is simple, only two fan inputs, no config */

1982

/* The W83627UHG is simple, only two fan inputs, no config */

1983

if (sio_data->kind == w83627uhg) {

1983

if (sio_data->kind == w83627uhg) {

1984

data->has_fan = 0x03; /* fan1 and fan2 */

1984

data->has_fan = 0x03; /* fan1 and fan2 */

1985

data->has_fan_min = 0x03;

1985

data->has_fan_min = 0x03;

1986

return;

1986

return;

1987

}

1987

}

1988

1989

superio_enter(sio_data->sioreg);

1989

superio_enter(sio_data->sioreg);

1990

1991

/* fan4 and fan5 share some pins with the GPIO and serial flash */

1991

/* fan4 and fan5 share some pins with the GPIO and serial flash */

1992

if (sio_data->kind == nct6775) {

1992

if (sio_data->kind == nct6775) {

1993

/* On NCT6775, fan4 shares pins with the fdc interface */

1993

/* On NCT6775, fan4 shares pins with the fdc interface */

1994

fan3pin = 1;

1994

fan3pin = 1;

1995

fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);

1995

fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);

1996

fan4min = 0;

1996

fan4min = 0;

1997

fan5pin = 0;

1997

fan5pin = 0;

1998

} else if (sio_data->kind == nct6776) {

1998

} else if (sio_data->kind == nct6776) {

1999

bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;

1999

bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;

2000

2001

superio_select(sio_data->sioreg, W83627EHF_LD_HWM);

2001

superio_select(sio_data->sioreg, W83627EHF_LD_HWM);

2002

regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);

2002

regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);

2003

2004

if (regval & 0x80)

2004

if (regval & 0x80)

2005

fan3pin = gpok;

2005

fan3pin = gpok;

2006

else

2006

else

2007

fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);

2007

fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);

2008

2009

if (regval & 0x40)

2009

if (regval & 0x40)

2010

fan4pin = gpok;

2010

fan4pin = gpok;

2011

else

2011

else

2012

fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);

2012

fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);

2013

2014

if (regval & 0x20)

2014

if (regval & 0x20)

2015

fan5pin = gpok;

2015

fan5pin = gpok;

2016

else

2016

else

2017

fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);

2017

fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);

2018

2019

fan4min = fan4pin;

2019

fan4min = fan4pin;

2020

} else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {

2020

} else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {

2021

fan3pin = 1;

2021

fan3pin = 1;

2022

fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;

2022

fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;

2023

fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;

2023

fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;

2024

fan4min = fan4pin;

2024

fan4min = fan4pin;

2025

} else {

2025

} else {

2026

fan3pin = 1;

2026

fan3pin = 1;

2027

fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);

2027

fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);

2028

fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);

2028

fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);

2029

fan4min = fan4pin;

2029

fan4min = fan4pin;

2030

}

2030

}

2031

2032

superio_exit(sio_data->sioreg);

2032

superio_exit(sio_data->sioreg);

2033

2034

data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */

2034

data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */

2035

data->has_fan |= (fan3pin << 2);

2035

data->has_fan |= (fan3pin << 2);

2036

data->has_fan_min |= (fan3pin << 2);

2036

data->has_fan_min |= (fan3pin << 2);

2037

2038

if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {

2038

if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {

2039

/*

2039

/*

2040

* NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1

2040

* NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1

2041

* register

2041

* register

2042

*/

2042

*/

2043

data->has_fan |= (fan4pin << 3) | (fan5pin << 4);

2043

data->has_fan |= (fan4pin << 3) | (fan5pin << 4);

2044

data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);

2044

data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);

2045

} else {

2045

} else {

2046

/*

2046

/*

2047

* It looks like fan4 and fan5 pins can be alternatively used

2047

* It looks like fan4 and fan5 pins can be alternatively used

2048

* as fan on/off switches, but fan5 control is write only :/

2048

* as fan on/off switches, but fan5 control is write only :/

2049

* We assume that if the serial interface is disabled, designers

2049

* We assume that if the serial interface is disabled, designers

2050

* connected fan5 as input unless they are emitting log 1, which

2050

* connected fan5 as input unless they are emitting log 1, which

2051

* is not the default.

2051

* is not the default.

2052

*/

2052

*/

2053

regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);

2053

regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);

2054

if ((regval & (1 << 2)) && fan4pin) {

2054

if ((regval & (1 << 2)) && fan4pin) {

2055

data->has_fan |= (1 << 3);

2055

data->has_fan |= (1 << 3);

2056

data->has_fan_min |= (1 << 3);

2056

data->has_fan_min |= (1 << 3);

2057

}

2057

}

2058

if (!(regval & (1 << 1)) && fan5pin) {

2058

if (!(regval & (1 << 1)) && fan5pin) {

2059

data->has_fan |= (1 << 4);

2059

data->has_fan |= (1 << 4);

2060

data->has_fan_min |= (1 << 4);

2060

data->has_fan_min |= (1 << 4);

2061

}

2061

}

2062

}

2062

}

2063

}

2063

}

2064

2065

static int w83627ehf_probe(struct platform_device *pdev)

2065

static int w83627ehf_probe(struct platform_device *pdev)

2066

{

2066

{

2067

struct device *dev = &pdev->dev;

2067

struct device *dev = &pdev->dev;

2068

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

2068

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

2069

struct w83627ehf_data *data;

2069

struct w83627ehf_data *data;

2070

struct resource *res;

2070

struct resource *res;

2071

u8 en_vrm10;

2071

u8 en_vrm10;

2072

int i, err = 0;

2072

int i, err = 0;

2073

2074

res = platform_get_resource(pdev, IORESOURCE_IO, 0);

2074

res = platform_get_resource(pdev, IORESOURCE_IO, 0);

2075

if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {

2075

if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {

2076

err = -EBUSY;

2076

err = -EBUSY;

2077

dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",

2077

dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",

2078

(unsigned long)res->start,

2078

(unsigned long)res->start,

2079

(unsigned long)res->start + IOREGION_LENGTH - 1);

2079

(unsigned long)res->start + IOREGION_LENGTH - 1);

2080

goto exit;

2080

goto exit;

2081

}

2081

}

2082

2083

data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),

2083

data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),

2084

GFP_KERNEL);

2084

GFP_KERNEL);

2085

if (!data) {

2085

if (!data) {

2086

err = -ENOMEM;

2086

err = -ENOMEM;

2087

goto exit_release;

2087

goto exit_release;

2088

}

2088

}

2089

2090

data->addr = res->start;

2090

data->addr = res->start;

2091

mutex_init(&data->lock);

2091

mutex_init(&data->lock);

2092

mutex_init(&data->update_lock);

2092

mutex_init(&data->update_lock);

2093

data->name = w83627ehf_device_names[sio_data->kind];

2093

data->name = w83627ehf_device_names[sio_data->kind];

2094

data->bank = 0xff; /* Force initial bank selection */

2094

data->bank = 0xff; /* Force initial bank selection */

2095

platform_set_drvdata(pdev, data);

2095

platform_set_drvdata(pdev, data);

2096

2097

/* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */

2097

/* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */

2098

data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;

2098

data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;

2099

/* 667HG, NCT6775F, and NCT6776F have 3 pwms, and 627UHG has only 2 */

2099

/* 667HG, NCT6775F, and NCT6776F have 3 pwms, and 627UHG has only 2 */

2100

switch (sio_data->kind) {

2100

switch (sio_data->kind) {

2101

default:

2101

default:

2102

data->pwm_num = 4;

2102

data->pwm_num = 4;

2103

break;

2103

break;

2104

case w83667hg:

2104

case w83667hg:

2105

case w83667hg_b:

2105

case w83667hg_b:

2106

case nct6775:

2106

case nct6775:

2107

case nct6776:

2107

case nct6776:

2108

data->pwm_num = 3;

2108

data->pwm_num = 3;

2109

break;

2109

break;

2110

case w83627uhg:

2110

case w83627uhg:

2111

data->pwm_num = 2;

2111

data->pwm_num = 2;

2112

break;

2112

break;

2113

}

2113

}

2114

2115

/* Default to 3 temperature inputs, code below will adjust as needed */

2115

/* Default to 3 temperature inputs, code below will adjust as needed */

2116

data->have_temp = 0x07;

2116

data->have_temp = 0x07;

2117

2118

/* Deal with temperature register setup first. */

2118

/* Deal with temperature register setup first. */

2119

if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {

2119

if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {

2120

int mask = 0;

2120

int mask = 0;

2121

2122

/*

2122

/*

2123

* Display temperature sensor output only if it monitors

2123

* Display temperature sensor output only if it monitors

2124

* a source other than one already reported. Always display

2124

* a source other than one already reported. Always display

2125

* first three temperature registers, though.

2125

* first three temperature registers, though.

2126

*/

2126

*/

2127

for (i = 0; i < NUM_REG_TEMP; i++) {

2127

for (i = 0; i < NUM_REG_TEMP; i++) {

2128

u8 src;

2128

u8 src;

2129

2130

data->reg_temp[i] = NCT6775_REG_TEMP[i];

2130

data->reg_temp[i] = NCT6775_REG_TEMP[i];

2131

data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];

2131

data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];

2132

data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];

2132

data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];

2133

data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];

2133

data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];

2134

2135

src = w83627ehf_read_value(data,

2135

src = w83627ehf_read_value(data,

2136

NCT6775_REG_TEMP_SOURCE[i]);

2136

NCT6775_REG_TEMP_SOURCE[i]);

2137

src &= 0x1f;

2137

src &= 0x1f;

2138

if (src && !(mask & (1 << src))) {

2138

if (src && !(mask & (1 << src))) {

2139

data->have_temp |= 1 << i;

2139

data->have_temp |= 1 << i;

2140

mask |= 1 << src;

2140

mask |= 1 << src;

2141

}

2141

}

2142

2143

data->temp_src[i] = src;

2143

data->temp_src[i] = src;

2144

2145

/*

2145

/*

2146

* Now do some register swapping if index 0..2 don't

2146

* Now do some register swapping if index 0..2 don't

2147

* point to SYSTIN(1), CPUIN(2), and AUXIN(3).

2147

* point to SYSTIN(1), CPUIN(2), and AUXIN(3).

2148

* Idea is to have the first three attributes

2148

* Idea is to have the first three attributes

2149

* report SYSTIN, CPUIN, and AUXIN if possible

2149

* report SYSTIN, CPUIN, and AUXIN if possible

2150

* without overriding the basic system configuration.

2150

* without overriding the basic system configuration.

2151

*/

2151

*/

2152

if (i > 0 && data->temp_src[0] != 1

2152

if (i > 0 && data->temp_src[0] != 1

2153

&& data->temp_src[i] == 1)

2153

&& data->temp_src[i] == 1)

2154

w82627ehf_swap_tempreg(data, 0, i);

2154

w82627ehf_swap_tempreg(data, 0, i);

2155

if (i > 1 && data->temp_src[1] != 2

2155

if (i > 1 && data->temp_src[1] != 2

2156

&& data->temp_src[i] == 2)

2156

&& data->temp_src[i] == 2)

2157

w82627ehf_swap_tempreg(data, 1, i);

2157

w82627ehf_swap_tempreg(data, 1, i);

2158

if (i > 2 && data->temp_src[2] != 3

2158

if (i > 2 && data->temp_src[2] != 3

2159

&& data->temp_src[i] == 3)

2159

&& data->temp_src[i] == 3)

2160

w82627ehf_swap_tempreg(data, 2, i);

2160

w82627ehf_swap_tempreg(data, 2, i);

2161

}

2161

}

2162

if (sio_data->kind == nct6776) {

2162

if (sio_data->kind == nct6776) {

2163

/*

2163

/*

2164

* On NCT6776, AUXTIN and VIN3 pins are shared.

2164

* On NCT6776, AUXTIN and VIN3 pins are shared.

2165

* Only way to detect it is to check if AUXTIN is used

2165

* Only way to detect it is to check if AUXTIN is used

2166

* as a temperature source, and if that source is

2166

* as a temperature source, and if that source is

2167

* enabled.

2167

* enabled.

2168

*

2168

*

2169

* If that is the case, disable in6, which reports VIN3.

2169

* If that is the case, disable in6, which reports VIN3.

2170

* Otherwise disable temp3.

2170

* Otherwise disable temp3.

2171

*/

2171

*/

2172

if (data->temp_src[2] == 3) {

2172

if (data->temp_src[2] == 3) {

2173

u8 reg;

2173

u8 reg;

2174

2175

if (data->reg_temp_config[2])

2175

if (data->reg_temp_config[2])

2176

reg = w83627ehf_read_value(data,

2176

reg = w83627ehf_read_value(data,

2177

data->reg_temp_config[2]);

2177

data->reg_temp_config[2]);

2178

else

2178

else

2179

reg = 0; /* Assume AUXTIN is used */

2179

reg = 0; /* Assume AUXTIN is used */

2180

2181

if (reg & 0x01)

2181

if (reg & 0x01)

2182

data->have_temp &= ~(1 << 2);

2182

data->have_temp &= ~(1 << 2);

2183

else

2183

else

2184

data->in6_skip = 1;

2184

data->in6_skip = 1;

2185

}

2185

}

2186

data->temp_label = nct6776_temp_label;

2186

data->temp_label = nct6776_temp_label;

2187

} else {

2187

} else {

2188

data->temp_label = nct6775_temp_label;

2188

data->temp_label = nct6775_temp_label;

2189

}

2189

}

2190

data->have_temp_offset = data->have_temp & 0x07;

2190

data->have_temp_offset = data->have_temp & 0x07;

2191

for (i = 0; i < 3; i++) {

2191

for (i = 0; i < 3; i++) {

2192

if (data->temp_src[i] > 3)

2192

if (data->temp_src[i] > 3)

2193

data->have_temp_offset &= ~(1 << i);

2193

data->have_temp_offset &= ~(1 << i);

2194

}

2194

}

2195

} else if (sio_data->kind == w83667hg_b) {

2195

} else if (sio_data->kind == w83667hg_b) {

2196

u8 reg;

2196

u8 reg;

2197

2198

w83627ehf_set_temp_reg_ehf(data, 4);

2198

w83627ehf_set_temp_reg_ehf(data, 4);

2199

2200

/*

2200

/*

2201

* Temperature sources are selected with bank 0, registers 0x49

2201

* Temperature sources are selected with bank 0, registers 0x49

2202

* and 0x4a.

2202

* and 0x4a.

2203

*/

2203

*/

2204

reg = w83627ehf_read_value(data, 0x4a);

2204

reg = w83627ehf_read_value(data, 0x4a);

2205

data->temp_src[0] = reg >> 5;

2205

data->temp_src[0] = reg >> 5;

2206

reg = w83627ehf_read_value(data, 0x49);

2206

reg = w83627ehf_read_value(data, 0x49);

2207

data->temp_src[1] = reg & 0x07;

2207

data->temp_src[1] = reg & 0x07;

2208

data->temp_src[2] = (reg >> 4) & 0x07;

2208

data->temp_src[2] = (reg >> 4) & 0x07;

2209

2210

/*

2210

/*

2211

* W83667HG-B has another temperature register at 0x7e.

2211

* W83667HG-B has another temperature register at 0x7e.

2212

* The temperature source is selected with register 0x7d.

2212

* The temperature source is selected with register 0x7d.

2213

* Support it if the source differs from already reported

2213

* Support it if the source differs from already reported

2214

* sources.

2214

* sources.

2215

*/

2215

*/

2216

reg = w83627ehf_read_value(data, 0x7d);

2216

reg = w83627ehf_read_value(data, 0x7d);

2217

reg &= 0x07;

2217

reg &= 0x07;

2218

if (reg != data->temp_src[0] && reg != data->temp_src[1]

2218

if (reg != data->temp_src[0] && reg != data->temp_src[1]

2219

&& reg != data->temp_src[2]) {

2219

&& reg != data->temp_src[2]) {

2220

data->temp_src[3] = reg;

2220

data->temp_src[3] = reg;

2221

data->have_temp |= 1 << 3;

2221

data->have_temp |= 1 << 3;

2222

}

2222

}

2223

2224

/*

2224

/*

2225

* Chip supports either AUXTIN or VIN3. Try to find out which

2225

* Chip supports either AUXTIN or VIN3. Try to find out which

2226

* one.

2226

* one.

2227

*/

2227

*/

2228

reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);

2228

reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);

2229

if (data->temp_src[2] == 2 && (reg & 0x01))

2229

if (data->temp_src[2] == 2 && (reg & 0x01))

2230

data->have_temp &= ~(1 << 2);

2230

data->have_temp &= ~(1 << 2);

2231

2232

if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))

2232

if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))

2233

|| (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))

2233

|| (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))

2234

data->in6_skip = 1;

2234

data->in6_skip = 1;

2235

2236

data->temp_label = w83667hg_b_temp_label;

2236

data->temp_label = w83667hg_b_temp_label;

2237

data->have_temp_offset = data->have_temp & 0x07;

2237

data->have_temp_offset = data->have_temp & 0x07;

2238

for (i = 0; i < 3; i++) {

2238

for (i = 0; i < 3; i++) {

2239

if (data->temp_src[i] > 2)

2239

if (data->temp_src[i] > 2)

2240

data->have_temp_offset &= ~(1 << i);

2240

data->have_temp_offset &= ~(1 << i);

2241

}

2241

}

2242

} else if (sio_data->kind == w83627uhg) {

2242

} else if (sio_data->kind == w83627uhg) {

2243

u8 reg;

2243

u8 reg;

2244

2245

w83627ehf_set_temp_reg_ehf(data, 3);

2245

w83627ehf_set_temp_reg_ehf(data, 3);

2246

2247

/*

2247

/*

2248

* Temperature sources for temp2 and temp3 are selected with

2248

* Temperature sources for temp2 and temp3 are selected with

2249

* bank 0, registers 0x49 and 0x4a.

2249

* bank 0, registers 0x49 and 0x4a.

2250

*/

2250

*/

2251

data->temp_src[0] = 0; /* SYSTIN */

2251

data->temp_src[0] = 0; /* SYSTIN */

2252

reg = w83627ehf_read_value(data, 0x49) & 0x07;

2252

reg = w83627ehf_read_value(data, 0x49) & 0x07;

2253

/* Adjust to have the same mapping as other source registers */

2253

/* Adjust to have the same mapping as other source registers */

2254

if (reg == 0)

2254

if (reg == 0)

2255

data->temp_src[1] = 1;

2255

data->temp_src[1] = 1;

2256

else if (reg >= 2 && reg <= 5)

2256

else if (reg >= 2 && reg <= 5)

2257

data->temp_src[1] = reg + 2;

2257

data->temp_src[1] = reg + 2;

2258

else /* should never happen */

2258

else /* should never happen */

2259

data->have_temp &= ~(1 << 1);

2259

data->have_temp &= ~(1 << 1);

2260

reg = w83627ehf_read_value(data, 0x4a);

2260

reg = w83627ehf_read_value(data, 0x4a);

2261

data->temp_src[2] = reg >> 5;

2261

data->temp_src[2] = reg >> 5;

2262

2263

/*

2263

/*

2264

* Skip temp3 if source is invalid or the same as temp1

2264

* Skip temp3 if source is invalid or the same as temp1

2265

* or temp2.

2265

* or temp2.

2266

*/

2266

*/

2267

if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||

2267

if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||

2268

data->temp_src[2] == data->temp_src[0] ||

2268

data->temp_src[2] == data->temp_src[0] ||

2269

((data->have_temp & (1 << 1)) &&

2269

((data->have_temp & (1 << 1)) &&

2270

data->temp_src[2] == data->temp_src[1]))

2270

data->temp_src[2] == data->temp_src[1]))

2271

data->have_temp &= ~(1 << 2);

2271

data->have_temp &= ~(1 << 2);

2272

else

2272

else

2273

data->temp3_val_only = 1; /* No limit regs */

2273

data->temp3_val_only = 1; /* No limit regs */

2274

2275

data->in6_skip = 1; /* No VIN3 */

2275

data->in6_skip = 1; /* No VIN3 */

2276

2277

data->temp_label = w83667hg_b_temp_label;

2277

data->temp_label = w83667hg_b_temp_label;

2278

data->have_temp_offset = data->have_temp & 0x03;

2278

data->have_temp_offset = data->have_temp & 0x03;

2279

for (i = 0; i < 3; i++) {

2279

for (i = 0; i < 3; i++) {

2280

if (data->temp_src[i] > 1)

2280

if (data->temp_src[i] > 1)

2281

data->have_temp_offset &= ~(1 << i);

2281

data->have_temp_offset &= ~(1 << i);

2282

}

2282

}

2283

} else {

2283

} else {

2284

w83627ehf_set_temp_reg_ehf(data, 3);

2284

w83627ehf_set_temp_reg_ehf(data, 3);

2285

2286

/* Temperature sources are fixed */

2286

/* Temperature sources are fixed */

2287

2288

if (sio_data->kind == w83667hg) {

2288

if (sio_data->kind == w83667hg) {

2289

u8 reg;

2289

u8 reg;

2290

2291

/*

2291

/*

2292

* Chip supports either AUXTIN or VIN3. Try to find

2292

* Chip supports either AUXTIN or VIN3. Try to find

2293

* out which one.

2293

* out which one.

2294

*/

2294

*/

2295

reg = w83627ehf_read_value(data,

2295

reg = w83627ehf_read_value(data,

2296

W83627EHF_REG_TEMP_CONFIG[2]);

2296

W83627EHF_REG_TEMP_CONFIG[2]);

2297

if (reg & 0x01)

2297

if (reg & 0x01)

2298

data->have_temp &= ~(1 << 2);

2298

data->have_temp &= ~(1 << 2);

2299

else

2299

else

2300

data->in6_skip = 1;

2300

data->in6_skip = 1;

2301

}

2301

}

2302

data->have_temp_offset = data->have_temp & 0x07;

2302

data->have_temp_offset = data->have_temp & 0x07;

2303

}

2303

}

2304

2305

if (sio_data->kind == nct6775) {

2305

if (sio_data->kind == nct6775) {

2306

data->has_fan_div = true;

2306

data->has_fan_div = true;

2307

data->fan_from_reg = fan_from_reg16;

2307

data->fan_from_reg = fan_from_reg16;

2308

data->fan_from_reg_min = fan_from_reg8;

2308

data->fan_from_reg_min = fan_from_reg8;

2309

data->REG_PWM = NCT6775_REG_PWM;

2309

data->REG_PWM = NCT6775_REG_PWM;

2310

data->REG_TARGET = NCT6775_REG_TARGET;

2310

data->REG_TARGET = NCT6775_REG_TARGET;

2311

data->REG_FAN = NCT6775_REG_FAN;

2311

data->REG_FAN = NCT6775_REG_FAN;

2312

data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;

2312

data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;

2313

data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;

2313

data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;

2314

data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;

2314

data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;

2315

data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;

2315

data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;

2316

data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;

2316

data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;

2317

data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;

2317

data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;

2318

} else if (sio_data->kind == nct6776) {

2318

} else if (sio_data->kind == nct6776) {

2319

data->has_fan_div = false;

2319

data->has_fan_div = false;

2320

data->fan_from_reg = fan_from_reg13;

2320

data->fan_from_reg = fan_from_reg13;

2321

data->fan_from_reg_min = fan_from_reg13;

2321

data->fan_from_reg_min = fan_from_reg13;

2322

data->REG_PWM = NCT6775_REG_PWM;

2322

data->REG_PWM = NCT6775_REG_PWM;

2323

data->REG_TARGET = NCT6775_REG_TARGET;

2323

data->REG_TARGET = NCT6775_REG_TARGET;

2324

data->REG_FAN = NCT6775_REG_FAN;

2324

data->REG_FAN = NCT6775_REG_FAN;

2325

data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;

2325

data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;

2326

data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;

2326

data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;

2327

data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;

2327

data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;

2328

data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;

2328

data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;

2329

} else if (sio_data->kind == w83667hg_b) {

2329

} else if (sio_data->kind == w83667hg_b) {

2330

data->has_fan_div = true;

2330

data->has_fan_div = true;

2331

data->fan_from_reg = fan_from_reg8;

2331

data->fan_from_reg = fan_from_reg8;

2332

data->fan_from_reg_min = fan_from_reg8;

2332

data->fan_from_reg_min = fan_from_reg8;

2333

data->REG_PWM = W83627EHF_REG_PWM;

2333

data->REG_PWM = W83627EHF_REG_PWM;

2334

data->REG_TARGET = W83627EHF_REG_TARGET;

2334

data->REG_TARGET = W83627EHF_REG_TARGET;

2335

data->REG_FAN = W83627EHF_REG_FAN;

2335

data->REG_FAN = W83627EHF_REG_FAN;

2336

data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;

2336

data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;

2337

data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;

2337

data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;

2338

data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;

2338

data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;

2339

data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;

2339

data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;

2340

data->REG_FAN_MAX_OUTPUT =

2340

data->REG_FAN_MAX_OUTPUT =

2341

W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;

2341

W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;

2342

data->REG_FAN_STEP_OUTPUT =

2342

data->REG_FAN_STEP_OUTPUT =

2343

W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;

2343

W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;

2344

} else {

2344

} else {

2345

data->has_fan_div = true;

2345

data->has_fan_div = true;

2346

data->fan_from_reg = fan_from_reg8;

2346

data->fan_from_reg = fan_from_reg8;

2347

data->fan_from_reg_min = fan_from_reg8;

2347

data->fan_from_reg_min = fan_from_reg8;

2348

data->REG_PWM = W83627EHF_REG_PWM;

2348

data->REG_PWM = W83627EHF_REG_PWM;

2349

data->REG_TARGET = W83627EHF_REG_TARGET;

2349

data->REG_TARGET = W83627EHF_REG_TARGET;

2350

data->REG_FAN = W83627EHF_REG_FAN;

2350

data->REG_FAN = W83627EHF_REG_FAN;

2351

data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;

2351

data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;

2352

data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;

2352

data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;

2353

data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;

2353

data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;

2354

data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;

2354

data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;

2355

data->REG_FAN_MAX_OUTPUT =

2355

data->REG_FAN_MAX_OUTPUT =

2356

W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;

2356

W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;

2357

data->REG_FAN_STEP_OUTPUT =

2357

data->REG_FAN_STEP_OUTPUT =

2358

W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;

2358

W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;

2359

}

2359

}

2360

2361

/* Setup input voltage scaling factors */

2361

/* Setup input voltage scaling factors */

2362

if (sio_data->kind == w83627uhg)

2362

if (sio_data->kind == w83627uhg)

2363

data->scale_in = scale_in_w83627uhg;

2363

data->scale_in = scale_in_w83627uhg;

2364

else

2364

else

2365

data->scale_in = scale_in_common;

2365

data->scale_in = scale_in_common;

2366

2367

/* Initialize the chip */

2367

/* Initialize the chip */

2368

w83627ehf_init_device(data, sio_data->kind);

2368

w83627ehf_init_device(data, sio_data->kind);

2369

2370

data->vrm = vid_which_vrm();

2370

data->vrm = vid_which_vrm();

2371

superio_enter(sio_data->sioreg);

2371

superio_enter(sio_data->sioreg);

2372

/* Read VID value */

2372

/* Read VID value */

2373

if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||

2373

if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||

2374

sio_data->kind == nct6775 || sio_data->kind == nct6776) {

2374

sio_data->kind == nct6775 || sio_data->kind == nct6776) {

2375

/*

2375

/*

2376

* W83667HG has different pins for VID input and output, so

2376

* W83667HG has different pins for VID input and output, so

2377

* we can get the VID input values directly at logical device D

2377

* we can get the VID input values directly at logical device D

2378

* 0xe3.

2378

* 0xe3.

2379

*/

2379

*/

2380

superio_select(sio_data->sioreg, W83667HG_LD_VID);

2380

superio_select(sio_data->sioreg, W83667HG_LD_VID);

2381

data->vid = superio_inb(sio_data->sioreg, 0xe3);

2381

data->vid = superio_inb(sio_data->sioreg, 0xe3);

2382

err = device_create_file(dev, &dev_attr_cpu0_vid);

2382

err = device_create_file(dev, &dev_attr_cpu0_vid);

2383

if (err)

2383

if (err)

2384

goto exit_release;

2384

goto exit_release;

2385

} else if (sio_data->kind != w83627uhg) {

2385

} else if (sio_data->kind != w83627uhg) {

2386

superio_select(sio_data->sioreg, W83627EHF_LD_HWM);

2386

superio_select(sio_data->sioreg, W83627EHF_LD_HWM);

2387

if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {

2387

if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {

2388

/*

2388

/*

2389

* Set VID input sensibility if needed. In theory the

2389

* Set VID input sensibility if needed. In theory the

2390

* BIOS should have set it, but in practice it's not

2390

* BIOS should have set it, but in practice it's not

2391

* always the case. We only do it for the W83627EHF/EHG

2391

* always the case. We only do it for the W83627EHF/EHG

2392

* because the W83627DHG is more complex in this

2392

* because the W83627DHG is more complex in this

2393

* respect.

2393

* respect.

2394

*/

2394

*/

2395

if (sio_data->kind == w83627ehf) {

2395

if (sio_data->kind == w83627ehf) {

2396

en_vrm10 = superio_inb(sio_data->sioreg,

2396

en_vrm10 = superio_inb(sio_data->sioreg,

2397

SIO_REG_EN_VRM10);

2397

SIO_REG_EN_VRM10);

2398

if ((en_vrm10 & 0x08) && data->vrm == 90) {

2398

if ((en_vrm10 & 0x08) && data->vrm == 90) {

2399

dev_warn(dev,

2399

dev_warn(dev,

2400

"Setting VID input voltage to TTL\n");

2400

"Setting VID input voltage to TTL\n");

2401

superio_outb(sio_data->sioreg,

2401

superio_outb(sio_data->sioreg,

2402

SIO_REG_EN_VRM10,

2402

SIO_REG_EN_VRM10,

2403

en_vrm10 & ~0x08);

2403

en_vrm10 & ~0x08);

2404

} else if (!(en_vrm10 & 0x08)

2404

} else if (!(en_vrm10 & 0x08)

2405

&& data->vrm == 100) {

2405

&& data->vrm == 100) {

2406

dev_warn(dev,

2406

dev_warn(dev,

2407

"Setting VID input voltage to VRM10\n");

2407

"Setting VID input voltage to VRM10\n");

2408

superio_outb(sio_data->sioreg,

2408

superio_outb(sio_data->sioreg,

2409

SIO_REG_EN_VRM10,

2409

SIO_REG_EN_VRM10,

2410

en_vrm10 | 0x08);

2410

en_vrm10 | 0x08);

2411

}

2411

}

2412

}

2412

}

2413

2414

data->vid = superio_inb(sio_data->sioreg,

2414

data->vid = superio_inb(sio_data->sioreg,

2415

SIO_REG_VID_DATA);

2415

SIO_REG_VID_DATA);

2416

if (sio_data->kind == w83627ehf) /* 6 VID pins only */

2416

if (sio_data->kind == w83627ehf) /* 6 VID pins only */

2417

data->vid &= 0x3f;

2417

data->vid &= 0x3f;

2418

2419

err = device_create_file(dev, &dev_attr_cpu0_vid);

2419

err = device_create_file(dev, &dev_attr_cpu0_vid);

2420

if (err)

2420

if (err)

2421

goto exit_release;

2421

goto exit_release;

2422

} else {

2422

} else {

2423

dev_info(dev,

2423

dev_info(dev,

2424

"VID pins in output mode, CPU VID not available\n");

2424

"VID pins in output mode, CPU VID not available\n");

2425

}

2425

}

2426

}

2426

}

2427

2428

if (fan_debounce &&

2428

if (fan_debounce &&

2429

(sio_data->kind == nct6775 || sio_data->kind == nct6776)) {

2429

(sio_data->kind == nct6775 || sio_data->kind == nct6776)) {

2430

u8 tmp;

2430

u8 tmp;

2431

2432

superio_select(sio_data->sioreg, W83627EHF_LD_HWM);

2432

superio_select(sio_data->sioreg, W83627EHF_LD_HWM);

2433

tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);

2433

tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);

2434

if (sio_data->kind == nct6776)

2434

if (sio_data->kind == nct6776)

2435

superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,

2435

superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,

2436

0x3e | tmp);

2436

0x3e | tmp);

2437

else

2437

else

2438

superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,

2438

superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,

2439

0x1e | tmp);

2439

0x1e | tmp);

2440

pr_info("Enabled fan debounce for chip %s\n", data->name);

2440

pr_info("Enabled fan debounce for chip %s\n", data->name);

2441

}

2441

}

2442

2443

superio_exit(sio_data->sioreg);

2443

superio_exit(sio_data->sioreg);

2444

2445

w83627ehf_check_fan_inputs(sio_data, data);

2445

w83627ehf_check_fan_inputs(sio_data, data);

2446

2447

/* Read fan clock dividers immediately */

2447

/* Read fan clock dividers immediately */

2448

w83627ehf_update_fan_div_common(dev, data);

2448

w83627ehf_update_fan_div_common(dev, data);

2449

2450

/* Read pwm data to save original values */

2450

/* Read pwm data to save original values */

2451

w83627ehf_update_pwm_common(dev, data);

2451

w83627ehf_update_pwm_common(dev, data);

2452

for (i = 0; i < data->pwm_num; i++)

2452

for (i = 0; i < data->pwm_num; i++)

2453

data->pwm_enable_orig[i] = data->pwm_enable[i];

2453

data->pwm_enable_orig[i] = data->pwm_enable[i];

2454

2455

/* Register sysfs hooks */

2455

/* Register sysfs hooks */

2456

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {

2456

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {

2457

err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);

2457

err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);

2458

if (err)

2458

if (err)

2459

goto exit_remove;

2459

goto exit_remove;

2460

}

2460

}

2461

2462

for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {

2462

for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {

2463

struct sensor_device_attribute *attr =

2463

struct sensor_device_attribute *attr =

2464

&sda_sf3_max_step_arrays[i];

2464

&sda_sf3_max_step_arrays[i];

2465

if (data->REG_FAN_STEP_OUTPUT &&

2465

if (data->REG_FAN_STEP_OUTPUT &&

2466

data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {

2466

data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {

2467

err = device_create_file(dev, &attr->dev_attr);

2467

err = device_create_file(dev, &attr->dev_attr);

2468

if (err)

2468

if (err)

2469

goto exit_remove;

2469

goto exit_remove;

2470

}

2470

}

2471

}

2471

}

2472

/* if fan3 and fan4 are enabled create the sf3 files for them */

2472

/* if fan3 and fan4 are enabled create the sf3 files for them */

2473

if ((data->has_fan & (1 << 2)) && data->pwm_num >= 3)

2473

if ((data->has_fan & (1 << 2)) && data->pwm_num >= 3)

2474

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++) {

2474

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++) {

2475

err = device_create_file(dev,

2475

err = device_create_file(dev,

2476

&sda_sf3_arrays_fan3[i].dev_attr);

2476

&sda_sf3_arrays_fan3[i].dev_attr);

2477

if (err)

2477

if (err)

2478

goto exit_remove;

2478

goto exit_remove;

2479

}

2479

}

2480

if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)

2480

if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)

2481

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {

2481

for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {

2482

err = device_create_file(dev,

2482

err = device_create_file(dev,

2483

&sda_sf3_arrays_fan4[i].dev_attr);

2483

&sda_sf3_arrays_fan4[i].dev_attr);

2484

if (err)

2484

if (err)

2485

goto exit_remove;

2485

goto exit_remove;

2486

}

2486

}

2487

2488

for (i = 0; i < data->in_num; i++) {

2488

for (i = 0; i < data->in_num; i++) {

2489

if ((i == 6) && data->in6_skip)

2489

if ((i == 6) && data->in6_skip)

2490

continue;

2490

continue;

2491

if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))

2491

if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))

2492

|| (err = device_create_file(dev,

2492

|| (err = device_create_file(dev,

2493

&sda_in_alarm[i].dev_attr))

2493

&sda_in_alarm[i].dev_attr))

2494

|| (err = device_create_file(dev,

2494

|| (err = device_create_file(dev,

2495

&sda_in_min[i].dev_attr))

2495

&sda_in_min[i].dev_attr))

2496

|| (err = device_create_file(dev,

2496

|| (err = device_create_file(dev,

2497

&sda_in_max[i].dev_attr)))

2497

&sda_in_max[i].dev_attr)))

2498

goto exit_remove;

2498

goto exit_remove;

2499

}

2499

}

2500

2501

for (i = 0; i < 5; i++) {

2501

for (i = 0; i < 5; i++) {

2502

if (data->has_fan & (1 << i)) {

2502

if (data->has_fan & (1 << i)) {

2503

if ((err = device_create_file(dev,

2503

if ((err = device_create_file(dev,

2504

&sda_fan_input[i].dev_attr))

2504

&sda_fan_input[i].dev_attr))

2505

|| (err = device_create_file(dev,

2505

|| (err = device_create_file(dev,

2506

&sda_fan_alarm[i].dev_attr)))

2506

&sda_fan_alarm[i].dev_attr)))

2507

goto exit_remove;

2507

goto exit_remove;

2508

if (sio_data->kind != nct6776) {

2508

if (sio_data->kind != nct6776) {

2509

err = device_create_file(dev,

2509

err = device_create_file(dev,

2510

&sda_fan_div[i].dev_attr);

2510

&sda_fan_div[i].dev_attr);

2511

if (err)

2511

if (err)

2512

goto exit_remove;

2512

goto exit_remove;

2513

}

2513

}

2514

if (data->has_fan_min & (1 << i)) {

2514

if (data->has_fan_min & (1 << i)) {

2515

err = device_create_file(dev,

2515

err = device_create_file(dev,

2516

&sda_fan_min[i].dev_attr);

2516

&sda_fan_min[i].dev_attr);

2517

if (err)

2517

if (err)

2518

goto exit_remove;

2518

goto exit_remove;

2519

}

2519

}

2520

if (i < data->pwm_num &&

2520

if (i < data->pwm_num &&

2521

((err = device_create_file(dev,

2521

((err = device_create_file(dev,

2522

&sda_pwm[i].dev_attr))

2522

&sda_pwm[i].dev_attr))

2523

|| (err = device_create_file(dev,

2523

|| (err = device_create_file(dev,

2524

&sda_pwm_mode[i].dev_attr))

2524

&sda_pwm_mode[i].dev_attr))

2525

|| (err = device_create_file(dev,

2525

|| (err = device_create_file(dev,

2526

&sda_pwm_enable[i].dev_attr))

2526

&sda_pwm_enable[i].dev_attr))

2527

|| (err = device_create_file(dev,

2527

|| (err = device_create_file(dev,

2528

&sda_target_temp[i].dev_attr))

2528

&sda_target_temp[i].dev_attr))

2529

|| (err = device_create_file(dev,

2529

|| (err = device_create_file(dev,

2530

&sda_tolerance[i].dev_attr))))

2530

&sda_tolerance[i].dev_attr))))

2531

goto exit_remove;

2531

goto exit_remove;

2532

}

2532

}

2533

}

2533

}

2534

2535

for (i = 0; i < NUM_REG_TEMP; i++) {

2535

for (i = 0; i < NUM_REG_TEMP; i++) {

2536

if (!(data->have_temp & (1 << i)))

2536

if (!(data->have_temp & (1 << i)))

2537

continue;

2537

continue;

2538

err = device_create_file(dev, &sda_temp_input[i].dev_attr);

2538

err = device_create_file(dev, &sda_temp_input[i].dev_attr);

2539

if (err)

2539

if (err)

2540

goto exit_remove;

2540

goto exit_remove;

2541

if (data->temp_label) {

2541

if (data->temp_label) {

2542

err = device_create_file(dev,

2542

err = device_create_file(dev,

2543

&sda_temp_label[i].dev_attr);

2543

&sda_temp_label[i].dev_attr);

2544

if (err)

2544

if (err)

2545

goto exit_remove;

2545

goto exit_remove;

2546

}

2546

}

2547

if (i == 2 && data->temp3_val_only)

2547

if (i == 2 && data->temp3_val_only)

2548

continue;

2548

continue;

2549

if (data->reg_temp_over[i]) {

2549

if (data->reg_temp_over[i]) {

2550

err = device_create_file(dev,

2550

err = device_create_file(dev,

2551

&sda_temp_max[i].dev_attr);

2551

&sda_temp_max[i].dev_attr);

2552

if (err)

2552

if (err)

2553

goto exit_remove;

2553

goto exit_remove;

2554

}

2554

}

2555

if (data->reg_temp_hyst[i]) {

2555

if (data->reg_temp_hyst[i]) {

2556

err = device_create_file(dev,

2556

err = device_create_file(dev,

2557

&sda_temp_max_hyst[i].dev_attr);

2557

&sda_temp_max_hyst[i].dev_attr);

2558

if (err)

2558

if (err)

2559

goto exit_remove;

2559

goto exit_remove;

2560

}

2560

}

2561

if (i > 2)

2561

if (i > 2)

2562

continue;

2562

continue;

2563

if ((err = device_create_file(dev,

2563

if ((err = device_create_file(dev,

2564

&sda_temp_alarm[i].dev_attr))

2564

&sda_temp_alarm[i].dev_attr))

2565

|| (err = device_create_file(dev,

2565

|| (err = device_create_file(dev,

2566

&sda_temp_type[i].dev_attr)))

2566

&sda_temp_type[i].dev_attr)))

2567

goto exit_remove;

2567

goto exit_remove;

2568

if (data->have_temp_offset & (1 << i)) {

2568

if (data->have_temp_offset & (1 << i)) {

2569

err = device_create_file(dev,

2569

err = device_create_file(dev,

2570

&sda_temp_offset[i].dev_attr);

2570

&sda_temp_offset[i].dev_attr);

2571

if (err)

2571

if (err)

2572

goto exit_remove;

2572

goto exit_remove;

2573

}

2573

}

2574

}

2574

}

2575

2576

err = device_create_file(dev, &sda_caseopen[0].dev_attr);

2576

err = device_create_file(dev, &sda_caseopen[0].dev_attr);

2577

if (err)

2577

if (err)

2578

goto exit_remove;

2578

goto exit_remove;

2579

2580

if (sio_data->kind == nct6776) {

2580

if (sio_data->kind == nct6776) {

2581

err = device_create_file(dev, &sda_caseopen[1].dev_attr);

2581

err = device_create_file(dev, &sda_caseopen[1].dev_attr);

2582

if (err)

2582

if (err)

2583

goto exit_remove;

2583

goto exit_remove;

2584

}

2584

}

2585

2586

err = device_create_file(dev, &dev_attr_name);

2586

err = device_create_file(dev, &dev_attr_name);

2587

if (err)

2587

if (err)

2588

goto exit_remove;

2588

goto exit_remove;

2589

2590

data->hwmon_dev = hwmon_device_register(dev);

2590

data->hwmon_dev = hwmon_device_register(dev);

2591

if (IS_ERR(data->hwmon_dev)) {

2591

if (IS_ERR(data->hwmon_dev)) {

2592

err = PTR_ERR(data->hwmon_dev);

2592

err = PTR_ERR(data->hwmon_dev);

2593

goto exit_remove;

2593

goto exit_remove;

2594

}

2594

}

2595

2596

return 0;

2596

return 0;

2597

2598

exit_remove:

2598

exit_remove:

2599

w83627ehf_device_remove_files(dev);

2599

w83627ehf_device_remove_files(dev);

2600

exit_release:

2600

exit_release:

2601

release_region(res->start, IOREGION_LENGTH);

2601

release_region(res->start, IOREGION_LENGTH);

2602

exit:

2602

exit:

2603

return err;

2603

return err;

2604

}

2604

}

2605

2606

static int w83627ehf_remove(struct platform_device *pdev)

2606

static int w83627ehf_remove(struct platform_device *pdev)

2607

{

2607

{

2608

struct w83627ehf_data *data = platform_get_drvdata(pdev);

2608

struct w83627ehf_data *data = platform_get_drvdata(pdev);

2609

2610

hwmon_device_unregister(data->hwmon_dev);

2610

hwmon_device_unregister(data->hwmon_dev);

2611

w83627ehf_device_remove_files(&pdev->dev);

2611

w83627ehf_device_remove_files(&pdev->dev);

2612

release_region(data->addr, IOREGION_LENGTH);

2612

release_region(data->addr, IOREGION_LENGTH);

2613

2614

return 0;

2614

return 0;

2615

}

2615

}

2616

2617

#ifdef CONFIG_PM

2617

#ifdef CONFIG_PM

2618

static int w83627ehf_suspend(struct device *dev)

2618

static int w83627ehf_suspend(struct device *dev)

2619

{

2619

{

2620

struct w83627ehf_data *data = w83627ehf_update_device(dev);

2620

struct w83627ehf_data *data = w83627ehf_update_device(dev);

2621

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

2621

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

2622

2623

mutex_lock(&data->update_lock);

2623

mutex_lock(&data->update_lock);

2624

data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);

2624

data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);

2625

if (sio_data->kind == nct6775) {

2625

if (sio_data->kind == nct6775) {

2626

data->fandiv1 = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);

2626

data->fandiv1 = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);

2627

data->fandiv2 = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);

2627

data->fandiv2 = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);

2628

}

2628

}

2629

mutex_unlock(&data->update_lock);

2629

mutex_unlock(&data->update_lock);

2630

2631

return 0;

2631

return 0;

2632

}

2632

}

2633

2634

static int w83627ehf_resume(struct device *dev)

2634

static int w83627ehf_resume(struct device *dev)

2635

{

2635

{

2636

struct w83627ehf_data *data = dev_get_drvdata(dev);

2636

struct w83627ehf_data *data = dev_get_drvdata(dev);

2637

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

2637

struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);

2638

int i;

2638

int i;

2639

2640

mutex_lock(&data->update_lock);

2640

mutex_lock(&data->update_lock);

2641

data->bank = 0xff; /* Force initial bank selection */

2641

data->bank = 0xff; /* Force initial bank selection */

2642

2643

/* Restore limits */

2643

/* Restore limits */

2644

for (i = 0; i < data->in_num; i++) {

2644

for (i = 0; i < data->in_num; i++) {

2645

if ((i == 6) && data->in6_skip)

2645

if ((i == 6) && data->in6_skip)

2646

continue;

2646

continue;

2647

2648

w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),

2648

w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),

2649

data->in_min[i]);

2649

data->in_min[i]);

2650

w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),

2650

w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),

2651

data->in_max[i]);

2651

data->in_max[i]);

2652

}

2652

}

2653

2654

for (i = 0; i < 5; i++) {

2654

for (i = 0; i < 5; i++) {

2655

if (!(data->has_fan_min & (1 << i)))

2655

if (!(data->has_fan_min & (1 << i)))

2656

continue;

2656

continue;

2657

2658

w83627ehf_write_value(data, data->REG_FAN_MIN[i],

2658

w83627ehf_write_value(data, data->REG_FAN_MIN[i],

2659

data->fan_min[i]);

2659

data->fan_min[i]);

2660

}

2660

}

2661

2662

for (i = 0; i < NUM_REG_TEMP; i++) {

2662

for (i = 0; i < NUM_REG_TEMP; i++) {

2663

if (!(data->have_temp & (1 << i)))

2663

if (!(data->have_temp & (1 << i)))

2664

continue;

2664

continue;

2665

2666

if (data->reg_temp_over[i])

2666

if (data->reg_temp_over[i])

2667

w83627ehf_write_temp(data, data->reg_temp_over[i],

2667

w83627ehf_write_temp(data, data->reg_temp_over[i],

2668

data->temp_max[i]);

2668

data->temp_max[i]);

2669

if (data->reg_temp_hyst[i])

2669

if (data->reg_temp_hyst[i])

2670

w83627ehf_write_temp(data, data->reg_temp_hyst[i],

2670

w83627ehf_write_temp(data, data->reg_temp_hyst[i],

2671

data->temp_max_hyst[i]);

2671

data->temp_max_hyst[i]);

2672

if (i > 2)

2672

if (i > 2)

2673

continue;

2673

continue;

2674

if (data->have_temp_offset & (1 << i))

2674

if (data->have_temp_offset & (1 << i))

2675

w83627ehf_write_value(data,

2675

w83627ehf_write_value(data,

2676

W83627EHF_REG_TEMP_OFFSET[i],

2676

W83627EHF_REG_TEMP_OFFSET[i],

2677

data->temp_offset[i]);

2677

data->temp_offset[i]);

2678

}

2678

}

2679

2680

/* Restore other settings */

2680

/* Restore other settings */

2681

w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);

2681

w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);

2682

if (sio_data->kind == nct6775) {

2682

if (sio_data->kind == nct6775) {

2683

w83627ehf_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);

2683

w83627ehf_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);

2684

w83627ehf_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);

2684

w83627ehf_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);

2685

}

2685

}

2686

2687

/* Force re-reading all values */

2687

/* Force re-reading all values */

2688

data->valid = 0;

2688

data->valid = 0;

2689

mutex_unlock(&data->update_lock);

2689

mutex_unlock(&data->update_lock);

2690

2691

return 0;

2691

return 0;

2692

}

2692

}

2693

2694

static const struct dev_pm_ops w83627ehf_dev_pm_ops = {

2694

static const struct dev_pm_ops w83627ehf_dev_pm_ops = {

2695

.suspend = w83627ehf_suspend,

2695

.suspend = w83627ehf_suspend,

2696

.resume = w83627ehf_resume,

2696

.resume = w83627ehf_resume,

2697

.freeze = w83627ehf_suspend,

2698

.restore = w83627ehf_resume,

2697

};

2699

};

2698

2700

2699

#define W83627EHF_DEV_PM_OPS (&w83627ehf_dev_pm_ops)

2701

#define W83627EHF_DEV_PM_OPS (&w83627ehf_dev_pm_ops)

2700

#else

2702

#else

2701

#define W83627EHF_DEV_PM_OPS NULL

2703

#define W83627EHF_DEV_PM_OPS NULL

2702

#endif /* CONFIG_PM */

2704

#endif /* CONFIG_PM */

2703

2705

2704

static struct platform_driver w83627ehf_driver = {

2706

static struct platform_driver w83627ehf_driver = {

2705

.driver = {

2707

.driver = {

2706

.owner = THIS_MODULE,

2708

.owner = THIS_MODULE,

2707

.name = DRVNAME,

2709

.name = DRVNAME,

2708

.pm = W83627EHF_DEV_PM_OPS,

2710

.pm = W83627EHF_DEV_PM_OPS,

2709

},

2711

},

2710

.probe = w83627ehf_probe,

2712

.probe = w83627ehf_probe,

2711

.remove = w83627ehf_remove,

2713

.remove = w83627ehf_remove,

2712

};

2714

};

2713

2715

2714

/* w83627ehf_find() looks for a '627 in the Super-I/O config space */

2716

/* w83627ehf_find() looks for a '627 in the Super-I/O config space */

2715

static int __init w83627ehf_find(int sioaddr, unsigned short *addr,

2717

static int __init w83627ehf_find(int sioaddr, unsigned short *addr,

2716

struct w83627ehf_sio_data *sio_data)

2718

struct w83627ehf_sio_data *sio_data)

2717

{

2719

{

2718

static const char sio_name_W83627EHF[] __initconst = "W83627EHF";

2720

static const char sio_name_W83627EHF[] __initconst = "W83627EHF";

2719

static const char sio_name_W83627EHG[] __initconst = "W83627EHG";

2721

static const char sio_name_W83627EHG[] __initconst = "W83627EHG";

2720

static const char sio_name_W83627DHG[] __initconst = "W83627DHG";

2722

static const char sio_name_W83627DHG[] __initconst = "W83627DHG";

2721

static const char sio_name_W83627DHG_P[] __initconst = "W83627DHG-P";

2723

static const char sio_name_W83627DHG_P[] __initconst = "W83627DHG-P";

2722

static const char sio_name_W83627UHG[] __initconst = "W83627UHG";

2724

static const char sio_name_W83627UHG[] __initconst = "W83627UHG";

2723

static const char sio_name_W83667HG[] __initconst = "W83667HG";

2725

static const char sio_name_W83667HG[] __initconst = "W83667HG";

2724

static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B";

2726

static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B";

2725

static const char sio_name_NCT6775[] __initconst = "NCT6775F";

2727

static const char sio_name_NCT6775[] __initconst = "NCT6775F";

2726

static const char sio_name_NCT6776[] __initconst = "NCT6776F";

2728

static const char sio_name_NCT6776[] __initconst = "NCT6776F";

2727

2729

2728

u16 val;

2730

u16 val;

2729

const char *sio_name;

2731

const char *sio_name;

2730

2732

2731

superio_enter(sioaddr);

2733

superio_enter(sioaddr);

2732

2734

2733

if (force_id)

2735

if (force_id)

2734

val = force_id;

2736

val = force_id;

2735

else

2737

else

2736

val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)

2738

val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)

2737

| superio_inb(sioaddr, SIO_REG_DEVID + 1);

2739

| superio_inb(sioaddr, SIO_REG_DEVID + 1);

2738

switch (val & SIO_ID_MASK) {

2740

switch (val & SIO_ID_MASK) {

2739

case SIO_W83627EHF_ID:

2741

case SIO_W83627EHF_ID:

2740

sio_data->kind = w83627ehf;

2742

sio_data->kind = w83627ehf;

2741

sio_name = sio_name_W83627EHF;

2743

sio_name = sio_name_W83627EHF;

2742

break;

2744

break;

2743

case SIO_W83627EHG_ID:

2745

case SIO_W83627EHG_ID:

2744

sio_data->kind = w83627ehf;

2746

sio_data->kind = w83627ehf;

2745

sio_name = sio_name_W83627EHG;

2747

sio_name = sio_name_W83627EHG;

2746

break;

2748

break;

2747

case SIO_W83627DHG_ID:

2749

case SIO_W83627DHG_ID:

2748

sio_data->kind = w83627dhg;

2750

sio_data->kind = w83627dhg;

2749

sio_name = sio_name_W83627DHG;

2751

sio_name = sio_name_W83627DHG;

2750

break;

2752

break;

2751

case SIO_W83627DHG_P_ID:

2753

case SIO_W83627DHG_P_ID:

2752

sio_data->kind = w83627dhg_p;

2754

sio_data->kind = w83627dhg_p;

2753

sio_name = sio_name_W83627DHG_P;

2755

sio_name = sio_name_W83627DHG_P;

2754

break;

2756

break;

2755

case SIO_W83627UHG_ID:

2757

case SIO_W83627UHG_ID:

2756

sio_data->kind = w83627uhg;

2758

sio_data->kind = w83627uhg;

2757

sio_name = sio_name_W83627UHG;

2759

sio_name = sio_name_W83627UHG;

2758

break;

2760

break;

2759

case SIO_W83667HG_ID:

2761

case SIO_W83667HG_ID:

2760

sio_data->kind = w83667hg;

2762

sio_data->kind = w83667hg;

2761

sio_name = sio_name_W83667HG;

2763

sio_name = sio_name_W83667HG;

2762

break;

2764

break;

2763

case SIO_W83667HG_B_ID:

2765

case SIO_W83667HG_B_ID:

2764

sio_data->kind = w83667hg_b;

2766

sio_data->kind = w83667hg_b;

2765

sio_name = sio_name_W83667HG_B;

2767

sio_name = sio_name_W83667HG_B;

2766

break;

2768

break;

2767

case SIO_NCT6775_ID:

2769

case SIO_NCT6775_ID:

2768

sio_data->kind = nct6775;

2770

sio_data->kind = nct6775;

2769

sio_name = sio_name_NCT6775;

2771

sio_name = sio_name_NCT6775;

2770

break;

2772

break;

2771

case SIO_NCT6776_ID:

2773

case SIO_NCT6776_ID:

2772

sio_data->kind = nct6776;

2774

sio_data->kind = nct6776;

2773

sio_name = sio_name_NCT6776;

2775

sio_name = sio_name_NCT6776;

2774

break;

2776

break;

2775

default:

2777

default:

2776

if (val != 0xffff)

2778

if (val != 0xffff)

2777

pr_debug("unsupported chip ID: 0x%04x\n", val);

2779

pr_debug("unsupported chip ID: 0x%04x\n", val);

2778

superio_exit(sioaddr);

2780

superio_exit(sioaddr);

2779

return -ENODEV;

2781

return -ENODEV;

2780

}

2782

}

2781

2783

2782

/* We have a known chip, find the HWM I/O address */

2784

/* We have a known chip, find the HWM I/O address */

2783

superio_select(sioaddr, W83627EHF_LD_HWM);

2785

superio_select(sioaddr, W83627EHF_LD_HWM);

2784

val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)

2786

val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)

2785

| superio_inb(sioaddr, SIO_REG_ADDR + 1);

2787

| superio_inb(sioaddr, SIO_REG_ADDR + 1);

2786

*addr = val & IOREGION_ALIGNMENT;

2788

*addr = val & IOREGION_ALIGNMENT;

2787

if (*addr == 0) {

2789

if (*addr == 0) {

2788

pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");

2790

pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");

2789

superio_exit(sioaddr);

2791

superio_exit(sioaddr);

2790

return -ENODEV;

2792

return -ENODEV;

2791

}

2793

}

2792

2794

2793

/* Activate logical device if needed */

2795

/* Activate logical device if needed */

2794

val = superio_inb(sioaddr, SIO_REG_ENABLE);

2796

val = superio_inb(sioaddr, SIO_REG_ENABLE);

2795

if (!(val & 0x01)) {

2797

if (!(val & 0x01)) {

2796

pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");

2798

pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");

2797

superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);

2799

superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);

2798

}

2800

}

2799

2801

2800

superio_exit(sioaddr);

2802

superio_exit(sioaddr);

2801

pr_info("Found %s chip at %#x\n", sio_name, *addr);

2803

pr_info("Found %s chip at %#x\n", sio_name, *addr);

2802

sio_data->sioreg = sioaddr;

2804

sio_data->sioreg = sioaddr;

2803

2805

2804

return 0;

2806

return 0;

2805

}

2807

}

2806

2808

2807

/*

2809

/*

2808

* when Super-I/O functions move to a separate file, the Super-I/O

2810

* when Super-I/O functions move to a separate file, the Super-I/O

2809

* bus will manage the lifetime of the device and this module will only keep

2811

* bus will manage the lifetime of the device and this module will only keep

2810

* track of the w83627ehf driver. But since we platform_device_alloc(), we

2812

* track of the w83627ehf driver. But since we platform_device_alloc(), we

2811

* must keep track of the device

2813

* must keep track of the device

2812

*/

2814

*/

2813

static struct platform_device *pdev;

2815

static struct platform_device *pdev;

2814

2816

2815

static int __init sensors_w83627ehf_init(void)

2817

static int __init sensors_w83627ehf_init(void)

2816

{

2818

{

2817

int err;

2819

int err;

2818

unsigned short address;

2820

unsigned short address;

2819

struct resource res;

2821

struct resource res;

2820

struct w83627ehf_sio_data sio_data;

2822

struct w83627ehf_sio_data sio_data;

2821

2823

2822

/*

2824

/*

2823

* initialize sio_data->kind and sio_data->sioreg.

2825

* initialize sio_data->kind and sio_data->sioreg.

2824

*

2826

*

2825

* when Super-I/O functions move to a separate file, the Super-I/O

2827

* when Super-I/O functions move to a separate file, the Super-I/O

2826

* driver will probe 0x2e and 0x4e and auto-detect the presence of a

2828

* driver will probe 0x2e and 0x4e and auto-detect the presence of a

2827

* w83627ehf hardware monitor, and call probe()

2829

* w83627ehf hardware monitor, and call probe()

2828

*/

2830

*/

2829

if (w83627ehf_find(0x2e, &address, &sio_data) &&

2831

if (w83627ehf_find(0x2e, &address, &sio_data) &&

2830

w83627ehf_find(0x4e, &address, &sio_data))

2832

w83627ehf_find(0x4e, &address, &sio_data))

2831

return -ENODEV;

2833

return -ENODEV;

2832

2834

2833

err = platform_driver_register(&w83627ehf_driver);

2835

err = platform_driver_register(&w83627ehf_driver);

2834

if (err)

2836

if (err)

2835

goto exit;

2837

goto exit;

2836

2838

2837

pdev = platform_device_alloc(DRVNAME, address);

2839

pdev = platform_device_alloc(DRVNAME, address);

2838

if (!pdev) {

2840

if (!pdev) {

2839

err = -ENOMEM;

2841

err = -ENOMEM;

2840

pr_err("Device allocation failed\n");

2842

pr_err("Device allocation failed\n");

2841

goto exit_unregister;

2843

goto exit_unregister;

2842

}

2844

}

2843

2845

2844

err = platform_device_add_data(pdev, &sio_data,

2846

err = platform_device_add_data(pdev, &sio_data,

2845

sizeof(struct w83627ehf_sio_data));

2847

sizeof(struct w83627ehf_sio_data));

2846

if (err) {

2848

if (err) {

2847

pr_err("Platform data allocation failed\n");

2849

pr_err("Platform data allocation failed\n");

2848

goto exit_device_put;

2850

goto exit_device_put;

2849

}

2851

}

2850

2852

2851

memset(&res, 0, sizeof(res));

2853

memset(&res, 0, sizeof(res));

2852

res.name = DRVNAME;

2854

res.name = DRVNAME;

2853

res.start = address + IOREGION_OFFSET;

2855

res.start = address + IOREGION_OFFSET;

2854

res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;

2856

res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;

2855

res.flags = IORESOURCE_IO;

2857

res.flags = IORESOURCE_IO;

2856

2858

2857

err = acpi_check_resource_conflict(&res);

2859

err = acpi_check_resource_conflict(&res);

2858

if (err)

2860

if (err)

2859

goto exit_device_put;

2861

goto exit_device_put;

2860

2862

2861

err = platform_device_add_resources(pdev, &res, 1);

2863

err = platform_device_add_resources(pdev, &res, 1);

2862

if (err) {

2864

if (err) {

2863

pr_err("Device resource addition failed (%d)\n", err);

2865

pr_err("Device resource addition failed (%d)\n", err);

2864

goto exit_device_put;

2866

goto exit_device_put;

2865

}

2867

}

2866

2868

2867

/* platform_device_add calls probe() */

2869

/* platform_device_add calls probe() */

2868

err = platform_device_add(pdev);

2870

err = platform_device_add(pdev);

2869

if (err) {

2871

if (err) {

2870

pr_err("Device addition failed (%d)\n", err);

2872

pr_err("Device addition failed (%d)\n", err);

2871

goto exit_device_put;

2873

goto exit_device_put;

2872

}

2874

}

2873

2875

2874

return 0;

2876

return 0;

2875

2877

2876

exit_device_put:

2878

exit_device_put:

2877

platform_device_put(pdev);

2879

platform_device_put(pdev);

2878

exit_unregister:

2880

exit_unregister:

2879

platform_driver_unregister(&w83627ehf_driver);

2881

platform_driver_unregister(&w83627ehf_driver);

2880

exit:

2882

exit:

2881

return err;

2883

return err;

2882

}

2884

}

2883

2885

2884

static void __exit sensors_w83627ehf_exit(void)

2886

static void __exit sensors_w83627ehf_exit(void)

2885

{

2887

{

2886

platform_device_unregister(pdev);

2888

platform_device_unregister(pdev);

2887

platform_driver_unregister(&w83627ehf_driver);

2889

platform_driver_unregister(&w83627ehf_driver);

2888

}

2890

}

2889

2891

2890

MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");

2892

MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");

2891

MODULE_DESCRIPTION("W83627EHF driver");

2893

MODULE_DESCRIPTION("W83627EHF driver");

2892

MODULE_LICENSE("GPL");

2894

MODULE_LICENSE("GPL");

2893

2895

2894

module_init(sensors_w83627ehf_init);

2896

module_init(sensors_w83627ehf_init);

2895

module_exit(sensors_w83627ehf_exit);

2897

module_exit(sensors_w83627ehf_exit);

2896

2898

GITLAB

hwmon: (w83627ehf) Add support for hibernate

 /*
  *  w83627ehf - Driver for the hardware monitoring functionality of
  *		the Winbond W83627EHF Super-I/O chip
  *  Copyright (C) 2005-2012  Jean Delvare <khali@linux-fr.org>
  *  Copyright (C) 2006  Yuan Mu (Winbond),
  *			Rudolf Marek <r.marek@assembler.cz>
  *			David Hubbard <david.c.hubbard@gmail.com>
  *			Daniel J Blueman <daniel.blueman@gmail.com>
  *  Copyright (C) 2010  Sheng-Yuan Huang (Nuvoton) (PS00)
  *
  *  Shamelessly ripped from the w83627hf driver
  *  Copyright (C) 2003  Mark Studebaker
  *
  *  Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
  *  in testing and debugging this driver.
  *
  *  This driver also supports the W83627EHG, which is the lead-free
  *  version of the W83627EHF.
  *
  *  This program is free software; you can redistribute it and/or modify
  *  it under the terms of the GNU General Public License as published by
  *  the Free Software Foundation; either version 2 of the License, or
  *  (at your option) any later version.
  *
  *  This program is distributed in the hope that it will be useful,
  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *  GNU General Public License for more details.
  *
  *  You should have received a copy of the GNU General Public License
  *  along with this program; if not, write to the Free Software
  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  *  Supports the following chips:
  *
  *  Chip        #vin    #fan    #pwm    #temp  chip IDs       man ID
  *  w83627ehf   10      5       4       3      0x8850 0x88    0x5ca3
  *					       0x8860 0xa1
  *  w83627dhg    9      5       4       3      0xa020 0xc1    0x5ca3
  *  w83627dhg-p  9      5       4       3      0xb070 0xc1    0x5ca3
  *  w83627uhg    8      2       2       3      0xa230 0xc1    0x5ca3
  *  w83667hg     9      5       3       3      0xa510 0xc1    0x5ca3
  *  w83667hg-b   9      5       3       4      0xb350 0xc1    0x5ca3
  *  nct6775f     9      4       3       9      0xb470 0xc1    0x5ca3
  *  nct6776f     9      5       3       9      0xC330 0xc1    0x5ca3
  */
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/slab.h>
 #include <linux/jiffies.h>
 #include <linux/platform_device.h>
 #include <linux/hwmon.h>
 #include <linux/hwmon-sysfs.h>
 #include <linux/hwmon-vid.h>
 #include <linux/err.h>
 #include <linux/mutex.h>
 #include <linux/acpi.h>
 #include <linux/io.h>
 #include "lm75.h"
 enum kinds {
 	w83627ehf, w83627dhg, w83627dhg_p, w83627uhg,
 	w83667hg, w83667hg_b, nct6775, nct6776,
 };
 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
 static const char * const w83627ehf_device_names[] = {
 	"w83627ehf",
 	"w83627dhg",
 	"w83627dhg",
 	"w83627uhg",
 	"w83667hg",
 	"w83667hg",
 	"nct6775",
 	"nct6776",
 };
 static unsigned short force_id;
 module_param(force_id, ushort, 0);
 MODULE_PARM_DESC(force_id, "Override the detected device ID");
 static unsigned short fan_debounce;
 module_param(fan_debounce, ushort, 0);
 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
 #define DRVNAME "w83627ehf"
 /*
  * Super-I/O constants and functions
  */
 #define W83627EHF_LD_HWM	0x0b
 #define W83667HG_LD_VID		0x0d
 #define SIO_REG_LDSEL		0x07	/* Logical device select */
 #define SIO_REG_DEVID		0x20	/* Device ID (2 bytes) */
 #define SIO_REG_EN_VRM10	0x2C	/* GPIO3, GPIO4 selection */
 #define SIO_REG_ENABLE		0x30	/* Logical device enable */
 #define SIO_REG_ADDR		0x60	/* Logical device address (2 bytes) */
 #define SIO_REG_VID_CTRL	0xF0	/* VID control */
 #define SIO_REG_VID_DATA	0xF1	/* VID data */
 #define SIO_W83627EHF_ID	0x8850
 #define SIO_W83627EHG_ID	0x8860
 #define SIO_W83627DHG_ID	0xa020
 #define SIO_W83627DHG_P_ID	0xb070
 #define SIO_W83627UHG_ID	0xa230
 #define SIO_W83667HG_ID		0xa510
 #define SIO_W83667HG_B_ID	0xb350
 #define SIO_NCT6775_ID		0xb470
 #define SIO_NCT6776_ID		0xc330
 #define SIO_ID_MASK		0xFFF0
 static inline void
 superio_outb(int ioreg, int reg, int val)
 {
 	outb(reg, ioreg);
 	outb(val, ioreg + 1);
 }
 static inline int
 superio_inb(int ioreg, int reg)
 {
 	outb(reg, ioreg);
 	return inb(ioreg + 1);
 }
 static inline void
 superio_select(int ioreg, int ld)
 {
 	outb(SIO_REG_LDSEL, ioreg);
 	outb(ld, ioreg + 1);
 }
 static inline void
 superio_enter(int ioreg)
 {
 	outb(0x87, ioreg);
 	outb(0x87, ioreg);
 }
 static inline void
 superio_exit(int ioreg)
 {
 	outb(0xaa, ioreg);
 	outb(0x02, ioreg);
 	outb(0x02, ioreg + 1);
 }
 /*
  * ISA constants
  */
 #define IOREGION_ALIGNMENT	(~7)
 #define IOREGION_OFFSET		5
 #define IOREGION_LENGTH		2
 #define ADDR_REG_OFFSET		0
 #define DATA_REG_OFFSET		1
 #define W83627EHF_REG_BANK		0x4E
 #define W83627EHF_REG_CONFIG		0x40
 /*
  * Not currently used:
  * REG_MAN_ID has the value 0x5ca3 for all supported chips.
  * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
  * REG_MAN_ID is at port 0x4f
  * REG_CHIP_ID is at port 0x58
  */
 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
 #define W83627EHF_REG_IN_MAX(nr)	((nr < 7) ? (0x2b + (nr) * 2) : \
 					 (0x554 + (((nr) - 7) * 2)))
 #define W83627EHF_REG_IN_MIN(nr)	((nr < 7) ? (0x2c + (nr) * 2) : \
 					 (0x555 + (((nr) - 7) * 2)))
 #define W83627EHF_REG_IN(nr)		((nr < 7) ? (0x20 + (nr)) : \
 					 (0x550 + (nr) - 7))
 static const u16 W83627EHF_REG_TEMP[] = { 0x27, 0x150, 0x250, 0x7e };
 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x3a, 0x153, 0x253, 0 };
 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x39, 0x155, 0x255, 0 };
 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0, 0x152, 0x252, 0 };
 /* Fan clock dividers are spread over the following five registers */
 #define W83627EHF_REG_FANDIV1		0x47
 #define W83627EHF_REG_FANDIV2		0x4B
 #define W83627EHF_REG_VBAT		0x5D
 #define W83627EHF_REG_DIODE		0x59
 #define W83627EHF_REG_SMI_OVT		0x4C
 /* NCT6775F has its own fan divider registers */
 #define NCT6775_REG_FANDIV1		0x506
 #define NCT6775_REG_FANDIV2		0x507
 #define NCT6775_REG_FAN_DEBOUNCE	0xf0
 #define W83627EHF_REG_ALARM1		0x459
 #define W83627EHF_REG_ALARM2		0x45A
 #define W83627EHF_REG_ALARM3		0x45B
 #define W83627EHF_REG_CASEOPEN_DET	0x42 /* SMI STATUS #2 */
 #define W83627EHF_REG_CASEOPEN_CLR	0x46 /* SMI MASK #3 */
 /* SmartFan registers */
 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
 /* DC or PWM output fan configuration */
 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
 	0x04,			/* SYS FAN0 output mode and PWM mode */
 	0x04,			/* CPU FAN0 output mode and PWM mode */
 	0x12,			/* AUX FAN mode */
 	0x62,			/* CPU FAN1 mode */
 };
 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
 /* FAN Duty Cycle, be used to control */
 static const u16 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
 static const u16 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
 /* Advanced Fan control, some values are common for all fans */
 static const u16 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
 static const u16 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
 static const u16 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_COMMON[]
 						= { 0xff, 0x67, 0xff, 0x69 };
 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_COMMON[]
 						= { 0xff, 0x68, 0xff, 0x6a };
 static const u16 W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B[] = { 0x67, 0x69, 0x6b };
 static const u16 W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B[]
 						= { 0x68, 0x6a, 0x6c };
 static const u16 W83627EHF_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
 static const u16 NCT6775_REG_TARGET[] = { 0x101, 0x201, 0x301 };
 static const u16 NCT6775_REG_FAN_MODE[] = { 0x102, 0x202, 0x302 };
 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = { 0x105, 0x205, 0x305 };
 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = { 0x106, 0x206, 0x306 };
 static const u16 NCT6775_REG_FAN_STOP_TIME[] = { 0x107, 0x207, 0x307 };
 static const u16 NCT6775_REG_PWM[] = { 0x109, 0x209, 0x309 };
 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
 static const u16 NCT6776_REG_FAN_MIN[] = { 0x63a, 0x63c, 0x63e, 0x640, 0x642};
 static const u16 NCT6775_REG_TEMP[]
 	= { 0x27, 0x150, 0x250, 0x73, 0x75, 0x77, 0x62b, 0x62c, 0x62d };
 static const u16 NCT6775_REG_TEMP_CONFIG[]
 	= { 0, 0x152, 0x252, 0, 0, 0, 0x628, 0x629, 0x62A };
 static const u16 NCT6775_REG_TEMP_HYST[]
 	= { 0x3a, 0x153, 0x253, 0, 0, 0, 0x673, 0x678, 0x67D };
 static const u16 NCT6775_REG_TEMP_OVER[]
 	= { 0x39, 0x155, 0x255, 0, 0, 0, 0x672, 0x677, 0x67C };
 static const u16 NCT6775_REG_TEMP_SOURCE[]
 	= { 0x621, 0x622, 0x623, 0x100, 0x200, 0x300, 0x624, 0x625, 0x626 };
 static const char *const w83667hg_b_temp_label[] = {
 	"SYSTIN",
 	"CPUTIN",
 	"AUXTIN",
 	"AMDTSI",
 	"PECI Agent 1",
 	"PECI Agent 2",
 	"PECI Agent 3",
 	"PECI Agent 4"
 };
 static const char *const nct6775_temp_label[] = {
 	"",
 	"SYSTIN",
 	"CPUTIN",
 	"AUXTIN",
 	"AMD SB-TSI",
 	"PECI Agent 0",
 	"PECI Agent 1",
 	"PECI Agent 2",
 	"PECI Agent 3",
 	"PECI Agent 4",
 	"PECI Agent 5",
 	"PECI Agent 6",
 	"PECI Agent 7",
 	"PCH_CHIP_CPU_MAX_TEMP",
 	"PCH_CHIP_TEMP",
 	"PCH_CPU_TEMP",
 	"PCH_MCH_TEMP",
 	"PCH_DIM0_TEMP",
 	"PCH_DIM1_TEMP",
 	"PCH_DIM2_TEMP",
 	"PCH_DIM3_TEMP"
 };
 static const char *const nct6776_temp_label[] = {
 	"",
 	"SYSTIN",
 	"CPUTIN",
 	"AUXTIN",
 	"SMBUSMASTER 0",
 	"SMBUSMASTER 1",
 	"SMBUSMASTER 2",
 	"SMBUSMASTER 3",
 	"SMBUSMASTER 4",
 	"SMBUSMASTER 5",
 	"SMBUSMASTER 6",
 	"SMBUSMASTER 7",
 	"PECI Agent 0",
 	"PECI Agent 1",
 	"PCH_CHIP_CPU_MAX_TEMP",
 	"PCH_CHIP_TEMP",
 	"PCH_CPU_TEMP",
 	"PCH_MCH_TEMP",
 	"PCH_DIM0_TEMP",
 	"PCH_DIM1_TEMP",
 	"PCH_DIM2_TEMP",
 	"PCH_DIM3_TEMP",
 	"BYTE_TEMP"
 };
 #define NUM_REG_TEMP	ARRAY_SIZE(NCT6775_REG_TEMP)
 static int is_word_sized(u16 reg)
 {
 	return ((((reg & 0xff00) == 0x100
 	      || (reg & 0xff00) == 0x200)
 	     && ((reg & 0x00ff) == 0x50
 	      || (reg & 0x00ff) == 0x53
 	      || (reg & 0x00ff) == 0x55))
 	     || (reg & 0xfff0) == 0x630
 	     || reg == 0x640 || reg == 0x642
 	     || ((reg & 0xfff0) == 0x650
 		 && (reg & 0x000f) >= 0x06)
 	     || reg == 0x73 || reg == 0x75 || reg == 0x77
 		);
 }
 /*
  * Conversions
  */
 /* 1 is PWM mode, output in ms */
 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
 {
 	return mode ? 100 * reg : 400 * reg;
 }
 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
 {
 	return clamp_val((mode ? (msec + 50) / 100 : (msec + 200) / 400),
 			 1, 255);
 }
 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
 {
 	if (reg == 0 || reg == 255)
 		return 0;
 	return 1350000U / (reg << divreg);
 }
 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
 {
 	if ((reg & 0xff1f) == 0xff1f)
 		return 0;
 	reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
 	if (reg == 0)
 		return 0;
 	return 1350000U / reg;
 }
 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
 {
 	if (reg == 0 || reg == 0xffff)
 		return 0;
 	/*
 	 * Even though the registers are 16 bit wide, the fan divisor
 	 * still applies.
 	 */
 	return 1350000U / (reg << divreg);
 }
 static inline unsigned int
 div_from_reg(u8 reg)
 {
 	return 1 << reg;
 }
 /*
  * Some of the voltage inputs have internal scaling, the tables below
  * contain 8 (the ADC LSB in mV) * scaling factor * 100
  */
 static const u16 scale_in_common[10] = {
 	800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800
 };
 static const u16 scale_in_w83627uhg[9] = {
 	800, 800, 3328, 3424, 800, 800, 0, 3328, 3400
 };
 static inline long in_from_reg(u8 reg, u8 nr, const u16 *scale_in)
 {
 	return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
 }
 static inline u8 in_to_reg(u32 val, u8 nr, const u16 *scale_in)
 {
 	return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
 }
 /*
  * Data structures and manipulation thereof
  */
 struct w83627ehf_data {
 	int addr;	/* IO base of hw monitor block */
 	const char *name;
 	struct device *hwmon_dev;
 	struct mutex lock;
 	u16 reg_temp[NUM_REG_TEMP];
 	u16 reg_temp_over[NUM_REG_TEMP];
 	u16 reg_temp_hyst[NUM_REG_TEMP];
 	u16 reg_temp_config[NUM_REG_TEMP];
 	u8 temp_src[NUM_REG_TEMP];
 	const char * const *temp_label;
 	const u16 *REG_PWM;
 	const u16 *REG_TARGET;
 	const u16 *REG_FAN;
 	const u16 *REG_FAN_MIN;
 	const u16 *REG_FAN_START_OUTPUT;
 	const u16 *REG_FAN_STOP_OUTPUT;
 	const u16 *REG_FAN_STOP_TIME;
 	const u16 *REG_FAN_MAX_OUTPUT;
 	const u16 *REG_FAN_STEP_OUTPUT;
 	const u16 *scale_in;
 	unsigned int (*fan_from_reg)(u16 reg, unsigned int divreg);
 	unsigned int (*fan_from_reg_min)(u16 reg, unsigned int divreg);
 	struct mutex update_lock;
 	char valid;		/* !=0 if following fields are valid */
 	unsigned long last_updated;	/* In jiffies */
 	/* Register values */
 	u8 bank;		/* current register bank */
 	u8 in_num;		/* number of in inputs we have */
 	u8 in[10];		/* Register value */
 	u8 in_max[10];		/* Register value */
 	u8 in_min[10];		/* Register value */
 	unsigned int rpm[5];
 	u16 fan_min[5];
 	u8 fan_div[5];
 	u8 has_fan;		/* some fan inputs can be disabled */
 	u8 has_fan_min;		/* some fans don't have min register */
 	bool has_fan_div;
 	u8 temp_type[3];
 	s8 temp_offset[3];
 	s16 temp[9];
 	s16 temp_max[9];
 	s16 temp_max_hyst[9];
 	u32 alarms;
 	u8 caseopen;
 	u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
 	u8 pwm_enable[4]; /* 1->manual
 			   * 2->thermal cruise mode (also called SmartFan I)
 			   * 3->fan speed cruise mode
 			   * 4->variable thermal cruise (also called
 			   * SmartFan III)
 			   * 5->enhanced variable thermal cruise (also called
 			   * SmartFan IV)
 			   */
 	u8 pwm_enable_orig[4];	/* original value of pwm_enable */
 	u8 pwm_num;		/* number of pwm */
 	u8 pwm[4];
 	u8 target_temp[4];
 	u8 tolerance[4];
 	u8 fan_start_output[4]; /* minimum fan speed when spinning up */
 	u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
 	u8 fan_stop_time[4]; /* time at minimum before disabling fan */
 	u8 fan_max_output[4]; /* maximum fan speed */
 	u8 fan_step_output[4]; /* rate of change output value */
 	u8 vid;
 	u8 vrm;
 	u16 have_temp;
 	u16 have_temp_offset;
 	u8 in6_skip:1;
 	u8 temp3_val_only:1;
 #ifdef CONFIG_PM
 	/* Remember extra register values over suspend/resume */
 	u8 vbat;
 	u8 fandiv1;
 	u8 fandiv2;
 #endif
 };
 struct w83627ehf_sio_data {
 	int sioreg;
 	enum kinds kind;
 };
 /*
  * On older chips, only registers 0x50-0x5f are banked.
  * On more recent chips, all registers are banked.
  * Assume that is the case and set the bank number for each access.
  * Cache the bank number so it only needs to be set if it changes.
  */
 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
 {
 	u8 bank = reg >> 8;
 	if (data->bank != bank) {
 		outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
 		outb_p(bank, data->addr + DATA_REG_OFFSET);
 		data->bank = bank;
 	}
 }
 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
 {
 	int res, word_sized = is_word_sized(reg);
 	mutex_lock(&data->lock);
 	w83627ehf_set_bank(data, reg);
 	outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 	res = inb_p(data->addr + DATA_REG_OFFSET);
 	if (word_sized) {
 		outb_p((reg & 0xff) + 1,
 		       data->addr + ADDR_REG_OFFSET);
 		res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
 	}
 	mutex_unlock(&data->lock);
 	return res;
 }
 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg,
 				 u16 value)
 {
 	int word_sized = is_word_sized(reg);
 	mutex_lock(&data->lock);
 	w83627ehf_set_bank(data, reg);
 	outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
 	if (word_sized) {
 		outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
 		outb_p((reg & 0xff) + 1,
 		       data->addr + ADDR_REG_OFFSET);
 	}
 	outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
 	mutex_unlock(&data->lock);
 	return 0;
 }
 /* We left-align 8-bit temperature values to make the code simpler */
 static u16 w83627ehf_read_temp(struct w83627ehf_data *data, u16 reg)
 {
 	u16 res;
 	res = w83627ehf_read_value(data, reg);
 	if (!is_word_sized(reg))
 		res <<= 8;
 	return res;
 }
 static int w83627ehf_write_temp(struct w83627ehf_data *data, u16 reg,
 				       u16 value)
 {
 	if (!is_word_sized(reg))
 		value >>= 8;
 	return w83627ehf_write_value(data, reg, value);
 }
 /* This function assumes that the caller holds data->update_lock */
 static void nct6775_write_fan_div(struct w83627ehf_data *data, int nr)
 {
 	u8 reg;
 	switch (nr) {
 	case 0:
 		reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x70)
 		    | (data->fan_div[0] & 0x7);
 		w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 		break;
 	case 1:
 		reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV1) & 0x7)
 		    | ((data->fan_div[1] << 4) & 0x70);
 		w83627ehf_write_value(data, NCT6775_REG_FANDIV1, reg);
 		break;
 	case 2:
 		reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x70)
 		    | (data->fan_div[2] & 0x7);
 		w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 		break;
 	case 3:
 		reg = (w83627ehf_read_value(data, NCT6775_REG_FANDIV2) & 0x7)
 		    | ((data->fan_div[3] << 4) & 0x70);
 		w83627ehf_write_value(data, NCT6775_REG_FANDIV2, reg);
 		break;
 	}
 }
 /* This function assumes that the caller holds data->update_lock */
 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
 {
 	u8 reg;
 	switch (nr) {
 	case 0:
 		reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
 		    | ((data->fan_div[0] & 0x03) << 4);
 		/* fan5 input control bit is write only, compute the value */
 		reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 		w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 		reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
 		    | ((data->fan_div[0] & 0x04) << 3);
 		w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 		break;
 	case 1:
 		reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
 		    | ((data->fan_div[1] & 0x03) << 6);
 		/* fan5 input control bit is write only, compute the value */
 		reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
 		w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
 		reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
 		    | ((data->fan_div[1] & 0x04) << 4);
 		w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 		break;
 	case 2:
 		reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
 		    | ((data->fan_div[2] & 0x03) << 6);
 		w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
 		reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
 		    | ((data->fan_div[2] & 0x04) << 5);
 		w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
 		break;
 	case 3:
 		reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
 		    | (data->fan_div[3] & 0x03);
 		w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 		reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
 		    | ((data->fan_div[3] & 0x04) << 5);
 		w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
 		break;
 	case 4:
 		reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
 		    | ((data->fan_div[4] & 0x03) << 2)
 		    | ((data->fan_div[4] & 0x04) << 5);
 		w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
 		break;
 	}
 }
 static void w83627ehf_write_fan_div_common(struct device *dev,
 					   struct w83627ehf_data *data, int nr)
 {
 	struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 	if (sio_data->kind == nct6776)
 		; /* no dividers, do nothing */
 	else if (sio_data->kind == nct6775)
 		nct6775_write_fan_div(data, nr);
 	else
 		w83627ehf_write_fan_div(data, nr);
 }
 static void nct6775_update_fan_div(struct w83627ehf_data *data)
 {
 	u8 i;
 	i = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
 	data->fan_div[0] = i & 0x7;
 	data->fan_div[1] = (i & 0x70) >> 4;
 	i = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
 	data->fan_div[2] = i & 0x7;
 	if (data->has_fan & (1<<3))
 		data->fan_div[3] = (i & 0x70) >> 4;
 }
 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
 {
 	int i;
 	i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
 	data->fan_div[0] = (i >> 4) & 0x03;
 	data->fan_div[1] = (i >> 6) & 0x03;
 	i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
 	data->fan_div[2] = (i >> 6) & 0x03;
 	i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
 	data->fan_div[0] |= (i >> 3) & 0x04;
 	data->fan_div[1] |= (i >> 4) & 0x04;
 	data->fan_div[2] |= (i >> 5) & 0x04;
 	if (data->has_fan & ((1 << 3) | (1 << 4))) {
 		i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
 		data->fan_div[3] = i & 0x03;
 		data->fan_div[4] = ((i >> 2) & 0x03)
 				 | ((i >> 5) & 0x04);
 	}
 	if (data->has_fan & (1 << 3)) {
 		i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
 		data->fan_div[3] |= (i >> 5) & 0x04;
 	}
 }
 static void w83627ehf_update_fan_div_common(struct device *dev,
 					    struct w83627ehf_data *data)
 {
 	struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 	if (sio_data->kind == nct6776)
 		; /* no dividers, do nothing */
 	else if (sio_data->kind == nct6775)
 		nct6775_update_fan_div(data);
 	else
 		w83627ehf_update_fan_div(data);
 }
 static void nct6775_update_pwm(struct w83627ehf_data *data)
 {
 	int i;
 	int pwmcfg, fanmodecfg;
 	for (i = 0; i < data->pwm_num; i++) {
 		pwmcfg = w83627ehf_read_value(data,
 					      W83627EHF_REG_PWM_ENABLE[i]);
 		fanmodecfg = w83627ehf_read_value(data,
 						  NCT6775_REG_FAN_MODE[i]);
 		data->pwm_mode[i] =
 		  ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 		data->pwm_enable[i] = ((fanmodecfg >> 4) & 7) + 1;
 		data->tolerance[i] = fanmodecfg & 0x0f;
 		data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 	}
 }
 static void w83627ehf_update_pwm(struct w83627ehf_data *data)
 {
 	int i;
 	int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
 	for (i = 0; i < data->pwm_num; i++) {
 		if (!(data->has_fan & (1 << i)))
 			continue;
 		/* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
 		if (i != 1) {
 			pwmcfg = w83627ehf_read_value(data,
 					W83627EHF_REG_PWM_ENABLE[i]);
 			tolerance = w83627ehf_read_value(data,
 					W83627EHF_REG_TOLERANCE[i]);
 		}
 		data->pwm_mode[i] =
 			((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1) ? 0 : 1;
 		data->pwm_enable[i] = ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
 				       & 3) + 1;
 		data->pwm[i] = w83627ehf_read_value(data, data->REG_PWM[i]);
 		data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) & 0x0f;
 	}
 }
 static void w83627ehf_update_pwm_common(struct device *dev,
 					struct w83627ehf_data *data)
 {
 	struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 	if (sio_data->kind == nct6775 || sio_data->kind == nct6776)
 		nct6775_update_pwm(data);
 	else
 		w83627ehf_update_pwm(data);
 }
 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 	int i;
 	mutex_lock(&data->update_lock);
 	if (time_after(jiffies, data->last_updated + HZ + HZ/2)
 	 || !data->valid) {
 		/* Fan clock dividers */
 		w83627ehf_update_fan_div_common(dev, data);
 		/* Measured voltages and limits */
 		for (i = 0; i < data->in_num; i++) {
 			if ((i == 6) && data->in6_skip)
 				continue;
 			data->in[i] = w83627ehf_read_value(data,
 				      W83627EHF_REG_IN(i));
 			data->in_min[i] = w83627ehf_read_value(data,
 					  W83627EHF_REG_IN_MIN(i));
 			data->in_max[i] = w83627ehf_read_value(data,
 					  W83627EHF_REG_IN_MAX(i));
 		}
 		/* Measured fan speeds and limits */
 		for (i = 0; i < 5; i++) {
 			u16 reg;
 			if (!(data->has_fan & (1 << i)))
 				continue;
 			reg = w83627ehf_read_value(data, data->REG_FAN[i]);
 			data->rpm[i] = data->fan_from_reg(reg,
 							  data->fan_div[i]);
 			if (data->has_fan_min & (1 << i))
 				data->fan_min[i] = w83627ehf_read_value(data,
 					   data->REG_FAN_MIN[i]);
 			/*
 			 * If we failed to measure the fan speed and clock
 			 * divider can be increased, let's try that for next
 			 * time
 			 */
 			if (data->has_fan_div
 			    && (reg >= 0xff || (sio_data->kind == nct6775
 						&& reg == 0x00))
 			    && data->fan_div[i] < 0x07) {
 				dev_dbg(dev,
 					"Increasing fan%d clock divider from %u to %u\n",
 					i + 1, div_from_reg(data->fan_div[i]),
 					div_from_reg(data->fan_div[i] + 1));
 				data->fan_div[i]++;
 				w83627ehf_write_fan_div_common(dev, data, i);
 				/* Preserve min limit if possible */
 				if ((data->has_fan_min & (1 << i))
 				 && data->fan_min[i] >= 2
 				 && data->fan_min[i] != 255)
 					w83627ehf_write_value(data,
 						data->REG_FAN_MIN[i],
 						(data->fan_min[i] /= 2));
 			}
 		}
 		w83627ehf_update_pwm_common(dev, data);
 		for (i = 0; i < data->pwm_num; i++) {
 			if (!(data->has_fan & (1 << i)))
 				continue;
 			data->fan_start_output[i] =
 			  w83627ehf_read_value(data,
 					       data->REG_FAN_START_OUTPUT[i]);
 			data->fan_stop_output[i] =
 			  w83627ehf_read_value(data,
 					       data->REG_FAN_STOP_OUTPUT[i]);
 			data->fan_stop_time[i] =
 			  w83627ehf_read_value(data,
 					       data->REG_FAN_STOP_TIME[i]);
 			if (data->REG_FAN_MAX_OUTPUT &&
 			    data->REG_FAN_MAX_OUTPUT[i] != 0xff)
 				data->fan_max_output[i] =
 				  w83627ehf_read_value(data,
 						data->REG_FAN_MAX_OUTPUT[i]);
 			if (data->REG_FAN_STEP_OUTPUT &&
 			    data->REG_FAN_STEP_OUTPUT[i] != 0xff)
 				data->fan_step_output[i] =
 				  w83627ehf_read_value(data,
 						data->REG_FAN_STEP_OUTPUT[i]);
 			data->target_temp[i] =
 				w83627ehf_read_value(data,
 					data->REG_TARGET[i]) &
 					(data->pwm_mode[i] == 1 ? 0x7f : 0xff);
 		}
 		/* Measured temperatures and limits */
 		for (i = 0; i < NUM_REG_TEMP; i++) {
 			if (!(data->have_temp & (1 << i)))
 				continue;
 			data->temp[i] = w83627ehf_read_temp(data,
 						data->reg_temp[i]);
 			if (data->reg_temp_over[i])
 				data->temp_max[i]
 				  = w83627ehf_read_temp(data,
 						data->reg_temp_over[i]);
 			if (data->reg_temp_hyst[i])
 				data->temp_max_hyst[i]
 				  = w83627ehf_read_temp(data,
 						data->reg_temp_hyst[i]);
 			if (i > 2)
 				continue;
 			if (data->have_temp_offset & (1 << i))
 				data->temp_offset[i]
 				  = w83627ehf_read_value(data,
 						W83627EHF_REG_TEMP_OFFSET[i]);
 		}
 		data->alarms = w83627ehf_read_value(data,
 					W83627EHF_REG_ALARM1) |
 			       (w83627ehf_read_value(data,
 					W83627EHF_REG_ALARM2) << 8) |
 			       (w83627ehf_read_value(data,
 					W83627EHF_REG_ALARM3) << 16);
 		data->caseopen = w83627ehf_read_value(data,
 						W83627EHF_REG_CASEOPEN_DET);
 		data->last_updated = jiffies;
 		data->valid = 1;
 	}
 	mutex_unlock(&data->update_lock);
 	return data;
 }
 /*
  * Sysfs callback functions
  */
 #define show_in_reg(reg) \
 static ssize_t \
 show_##reg(struct device *dev, struct device_attribute *attr, \
 	   char *buf) \
 { \
 	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 	struct sensor_device_attribute *sensor_attr = \
 		to_sensor_dev_attr(attr); \
 	int nr = sensor_attr->index; \
 	return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr, \
 		       data->scale_in)); \
 }
 show_in_reg(in)
 show_in_reg(in_min)
 show_in_reg(in_max)
 #define store_in_reg(REG, reg) \
 static ssize_t \
 store_in_##reg(struct device *dev, struct device_attribute *attr, \
 	       const char *buf, size_t count) \
 { \
 	struct w83627ehf_data *data = dev_get_drvdata(dev); \
 	struct sensor_device_attribute *sensor_attr = \
 		to_sensor_dev_attr(attr); \
 	int nr = sensor_attr->index; \
 	unsigned long val; \
 	int err; \
 	err = kstrtoul(buf, 10, &val); \
 	if (err < 0) \
 		return err; \
 	mutex_lock(&data->update_lock); \
 	data->in_##reg[nr] = in_to_reg(val, nr, data->scale_in); \
 	w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
 			      data->in_##reg[nr]); \
 	mutex_unlock(&data->update_lock); \
 	return count; \
 }
 store_in_reg(MIN, min)
 store_in_reg(MAX, max)
 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
 			  char *buf)
 {
 	struct w83627ehf_data *data = w83627ehf_update_device(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
 }
 static struct sensor_device_attribute sda_in_input[] = {
 	SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
 	SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
 	SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
 	SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
 	SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
 	SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
 	SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
 	SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
 	SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
 	SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
 };
 static struct sensor_device_attribute sda_in_alarm[] = {
 	SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
 	SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
 	SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
 	SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
 	SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
 	SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
 	SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
 	SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
 	SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
 	SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
 };
 static struct sensor_device_attribute sda_in_min[] = {
 	SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
 	SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
 	SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
 	SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
 	SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
 	SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
 	SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
 	SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
 	SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
 	SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
 };
 static struct sensor_device_attribute sda_in_max[] = {
 	SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
 	SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
 	SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
 	SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
 	SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
 	SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
 	SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
 	SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
 	SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
 	SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
 };
 static ssize_t
 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct w83627ehf_data *data = w83627ehf_update_device(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	return sprintf(buf, "%d\n", data->rpm[nr]);
 }
 static ssize_t
 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct w83627ehf_data *data = w83627ehf_update_device(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	return sprintf(buf, "%d\n",
 		       data->fan_from_reg_min(data->fan_min[nr],
 					      data->fan_div[nr]));
 }
 static ssize_t
 show_fan_div(struct device *dev, struct device_attribute *attr,
 	     char *buf)
 {
 	struct w83627ehf_data *data = w83627ehf_update_device(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
 }
 static ssize_t
 store_fan_min(struct device *dev, struct device_attribute *attr,
 	      const char *buf, size_t count)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	unsigned long val;
 	int err;
 	unsigned int reg;
 	u8 new_div;
 	err = kstrtoul(buf, 10, &val);
 	if (err < 0)
 		return err;
 	mutex_lock(&data->update_lock);
 	if (!data->has_fan_div) {
 		/*
 		 * Only NCT6776F for now, so we know that this is a 13 bit
 		 * register
 		 */
 		if (!val) {
 			val = 0xff1f;
 		} else {
 			if (val > 1350000U)
 				val = 135000U;
 			val = 1350000U / val;
 			val = (val & 0x1f) | ((val << 3) & 0xff00);
 		}
 		data->fan_min[nr] = val;
 		goto done;	/* Leave fan divider alone */
 	}
 	if (!val) {
 		/* No min limit, alarm disabled */
 		data->fan_min[nr] = 255;
 		new_div = data->fan_div[nr]; /* No change */
 		dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
 	} else if ((reg = 1350000U / val) >= 128 * 255) {
 		/*
 		 * Speed below this value cannot possibly be represented,
 		 * even with the highest divider (128)
 		 */
 		data->fan_min[nr] = 254;
 		new_div = 7; /* 128 == (1 << 7) */
 		dev_warn(dev,
 			 "fan%u low limit %lu below minimum %u, set to minimum\n",
 			 nr + 1, val, data->fan_from_reg_min(254, 7));
 	} else if (!reg) {
 		/*
 		 * Speed above this value cannot possibly be represented,
 		 * even with the lowest divider (1)
 		 */
 		data->fan_min[nr] = 1;
 		new_div = 0; /* 1 == (1 << 0) */
 		dev_warn(dev,
 			 "fan%u low limit %lu above maximum %u, set to maximum\n",
 			 nr + 1, val, data->fan_from_reg_min(1, 0));
 	} else {
 		/*
 		 * Automatically pick the best divider, i.e. the one such
 		 * that the min limit will correspond to a register value
 		 * in the 96..192 range
 		 */
 		new_div = 0;
 		while (reg > 192 && new_div < 7) {
 			reg >>= 1;
 			new_div++;
 		}
 		data->fan_min[nr] = reg;
 	}
 	/*
 	 * Write both the fan clock divider (if it changed) and the new
 	 * fan min (unconditionally)
 	 */
 	if (new_div != data->fan_div[nr]) {
 		dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
 			nr + 1, div_from_reg(data->fan_div[nr]),
 			div_from_reg(new_div));
 		data->fan_div[nr] = new_div;
 		w83627ehf_write_fan_div_common(dev, data, nr);
 		/* Give the chip time to sample a new speed value */
 		data->last_updated = jiffies;
 	}
 done:
 	w83627ehf_write_value(data, data->REG_FAN_MIN[nr],
 			      data->fan_min[nr]);
 	mutex_unlock(&data->update_lock);
 	return count;
 }
 static struct sensor_device_attribute sda_fan_input[] = {
 	SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
 	SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
 	SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
 	SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
 	SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
 };
 static struct sensor_device_attribute sda_fan_alarm[] = {
 	SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
 	SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
 	SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
 	SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
 	SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
 };
 static struct sensor_device_attribute sda_fan_min[] = {
 	SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
 		    store_fan_min, 0),
 	SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
 		    store_fan_min, 1),
 	SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
 		    store_fan_min, 2),
 	SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
 		    store_fan_min, 3),
 	SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
 		    store_fan_min, 4),
 };
 static struct sensor_device_attribute sda_fan_div[] = {
 	SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
 	SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
 	SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
 	SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
 	SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
 };
 static ssize_t
 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct w83627ehf_data *data = w83627ehf_update_device(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
 }
 #define show_temp_reg(addr, reg) \
 static ssize_t \
 show_##reg(struct device *dev, struct device_attribute *attr, \
 	   char *buf) \
 { \
 	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 	struct sensor_device_attribute *sensor_attr = \
 		to_sensor_dev_attr(attr); \
 	int nr = sensor_attr->index; \
 	return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->reg[nr])); \
 }
 show_temp_reg(reg_temp, temp);
 show_temp_reg(reg_temp_over, temp_max);
 show_temp_reg(reg_temp_hyst, temp_max_hyst);
 #define store_temp_reg(addr, reg) \
 static ssize_t \
 store_##reg(struct device *dev, struct device_attribute *attr, \
 	    const char *buf, size_t count) \
 { \
 	struct w83627ehf_data *data = dev_get_drvdata(dev); \
 	struct sensor_device_attribute *sensor_attr = \
 		to_sensor_dev_attr(attr); \
 	int nr = sensor_attr->index; \
 	int err; \
 	long val; \
 	err = kstrtol(buf, 10, &val); \
 	if (err < 0) \
 		return err; \
 	mutex_lock(&data->update_lock); \
 	data->reg[nr] = LM75_TEMP_TO_REG(val); \
 	w83627ehf_write_temp(data, data->addr[nr], data->reg[nr]); \
 	mutex_unlock(&data->update_lock); \
 	return count; \
 }
 store_temp_reg(reg_temp_over, temp_max);
 store_temp_reg(reg_temp_hyst, temp_max_hyst);
 static ssize_t
 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct w83627ehf_data *data = w83627ehf_update_device(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	return sprintf(buf, "%d\n",
 		       data->temp_offset[sensor_attr->index] * 1000);
 }
 static ssize_t
 store_temp_offset(struct device *dev, struct device_attribute *attr,
 		  const char *buf, size_t count)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	long val;
 	int err;
 	err = kstrtol(buf, 10, &val);
 	if (err < 0)
 		return err;
 	val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
 	mutex_lock(&data->update_lock);
 	data->temp_offset[nr] = val;
 	w83627ehf_write_value(data, W83627EHF_REG_TEMP_OFFSET[nr], val);
 	mutex_unlock(&data->update_lock);
 	return count;
 }
 static ssize_t
 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct w83627ehf_data *data = w83627ehf_update_device(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
 }
 static struct sensor_device_attribute sda_temp_input[] = {
 	SENSOR_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0),
 	SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1),
 	SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2),
 	SENSOR_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3),
 	SENSOR_ATTR(temp5_input, S_IRUGO, show_temp, NULL, 4),
 	SENSOR_ATTR(temp6_input, S_IRUGO, show_temp, NULL, 5),
 	SENSOR_ATTR(temp7_input, S_IRUGO, show_temp, NULL, 6),
 	SENSOR_ATTR(temp8_input, S_IRUGO, show_temp, NULL, 7),
 	SENSOR_ATTR(temp9_input, S_IRUGO, show_temp, NULL, 8),
 };
 static struct sensor_device_attribute sda_temp_label[] = {
 	SENSOR_ATTR(temp1_label, S_IRUGO, show_temp_label, NULL, 0),
 	SENSOR_ATTR(temp2_label, S_IRUGO, show_temp_label, NULL, 1),
 	SENSOR_ATTR(temp3_label, S_IRUGO, show_temp_label, NULL, 2),
 	SENSOR_ATTR(temp4_label, S_IRUGO, show_temp_label, NULL, 3),
 	SENSOR_ATTR(temp5_label, S_IRUGO, show_temp_label, NULL, 4),
 	SENSOR_ATTR(temp6_label, S_IRUGO, show_temp_label, NULL, 5),
 	SENSOR_ATTR(temp7_label, S_IRUGO, show_temp_label, NULL, 6),
 	SENSOR_ATTR(temp8_label, S_IRUGO, show_temp_label, NULL, 7),
 	SENSOR_ATTR(temp9_label, S_IRUGO, show_temp_label, NULL, 8),
 };
 static struct sensor_device_attribute sda_temp_max[] = {
 	SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp_max,
 		    store_temp_max, 0),
 	SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
 		    store_temp_max, 1),
 	SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
 		    store_temp_max, 2),
 	SENSOR_ATTR(temp4_max, S_IRUGO | S_IWUSR, show_temp_max,
 		    store_temp_max, 3),
 	SENSOR_ATTR(temp5_max, S_IRUGO | S_IWUSR, show_temp_max,
 		    store_temp_max, 4),
 	SENSOR_ATTR(temp6_max, S_IRUGO | S_IWUSR, show_temp_max,
 		    store_temp_max, 5),
 	SENSOR_ATTR(temp7_max, S_IRUGO | S_IWUSR, show_temp_max,
 		    store_temp_max, 6),
 	SENSOR_ATTR(temp8_max, S_IRUGO | S_IWUSR, show_temp_max,
 		    store_temp_max, 7),
 	SENSOR_ATTR(temp9_max, S_IRUGO | S_IWUSR, show_temp_max,
 		    store_temp_max, 8),
 };
 static struct sensor_device_attribute sda_temp_max_hyst[] = {
 	SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
 		    store_temp_max_hyst, 0),
 	SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
 		    store_temp_max_hyst, 1),
 	SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
 		    store_temp_max_hyst, 2),
 	SENSOR_ATTR(temp4_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
 		    store_temp_max_hyst, 3),
 	SENSOR_ATTR(temp5_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
 		    store_temp_max_hyst, 4),
 	SENSOR_ATTR(temp6_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
 		    store_temp_max_hyst, 5),
 	SENSOR_ATTR(temp7_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
 		    store_temp_max_hyst, 6),
 	SENSOR_ATTR(temp8_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
 		    store_temp_max_hyst, 7),
 	SENSOR_ATTR(temp9_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
 		    store_temp_max_hyst, 8),
 };
 static struct sensor_device_attribute sda_temp_alarm[] = {
 	SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
 	SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
 	SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
 };
 static struct sensor_device_attribute sda_temp_type[] = {
 	SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
 	SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
 	SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
 };
 static struct sensor_device_attribute sda_temp_offset[] = {
 	SENSOR_ATTR(temp1_offset, S_IRUGO | S_IWUSR, show_temp_offset,
 		    store_temp_offset, 0),
 	SENSOR_ATTR(temp2_offset, S_IRUGO | S_IWUSR, show_temp_offset,
 		    store_temp_offset, 1),
 	SENSOR_ATTR(temp3_offset, S_IRUGO | S_IWUSR, show_temp_offset,
 		    store_temp_offset, 2),
 };
 #define show_pwm_reg(reg) \
 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
 			  char *buf) \
 { \
 	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 	struct sensor_device_attribute *sensor_attr = \
 		to_sensor_dev_attr(attr); \
 	int nr = sensor_attr->index; \
 	return sprintf(buf, "%d\n", data->reg[nr]); \
 }
 show_pwm_reg(pwm_mode)
 show_pwm_reg(pwm_enable)
 show_pwm_reg(pwm)
 static ssize_t
 store_pwm_mode(struct device *dev, struct device_attribute *attr,
 			const char *buf, size_t count)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 	int nr = sensor_attr->index;
 	unsigned long val;
 	int err;
 	u16 reg;
 	err = kstrtoul(buf, 10, &val);
 	if (err < 0)
 		return err;
 	if (val > 1)
 		return -EINVAL;
 	/* On NCT67766F, DC mode is only supported for pwm1 */
 	if (sio_data->kind == nct6776 && nr && val != 1)
 		return -EINVAL;
 	mutex_lock(&data->update_lock);
 	reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
 	data->pwm_mode[nr] = val;
 	reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
 	if (!val)
 		reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
 	w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
 	mutex_unlock(&data->update_lock);
 	return count;
 }
 static ssize_t
 store_pwm(struct device *dev, struct device_attribute *attr,
 			const char *buf, size_t count)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	unsigned long val;
 	int err;
 	err = kstrtoul(buf, 10, &val);
 	if (err < 0)
 		return err;
 	val = clamp_val(val, 0, 255);
 	mutex_lock(&data->update_lock);
 	data->pwm[nr] = val;
 	w83627ehf_write_value(data, data->REG_PWM[nr], val);
 	mutex_unlock(&data->update_lock);
 	return count;
 }
 static ssize_t
 store_pwm_enable(struct device *dev, struct device_attribute *attr,
 			const char *buf, size_t count)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	unsigned long val;
 	int err;
 	u16 reg;
 	err = kstrtoul(buf, 10, &val);
 	if (err < 0)
 		return err;
 	if (!val || (val > 4 && val != data->pwm_enable_orig[nr]))
 		return -EINVAL;
 	/* SmartFan III mode is not supported on NCT6776F */
 	if (sio_data->kind == nct6776 && val == 4)
 		return -EINVAL;
 	mutex_lock(&data->update_lock);
 	data->pwm_enable[nr] = val;
 	if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
 		reg = w83627ehf_read_value(data,
 					   NCT6775_REG_FAN_MODE[nr]);
 		reg &= 0x0f;
 		reg |= (val - 1) << 4;
 		w83627ehf_write_value(data,
 				      NCT6775_REG_FAN_MODE[nr], reg);
 	} else {
 		reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
 		reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
 		reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
 		w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
 	}
 	mutex_unlock(&data->update_lock);
 	return count;
 }
 #define show_tol_temp(reg) \
 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
 				char *buf) \
 { \
 	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 	struct sensor_device_attribute *sensor_attr = \
 		to_sensor_dev_attr(attr); \
 	int nr = sensor_attr->index; \
 	return sprintf(buf, "%d\n", data->reg[nr] * 1000); \
 }
 show_tol_temp(tolerance)
 show_tol_temp(target_temp)
 static ssize_t
 store_target_temp(struct device *dev, struct device_attribute *attr,
 			const char *buf, size_t count)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	long val;
 	int err;
 	err = kstrtol(buf, 10, &val);
 	if (err < 0)
 		return err;
 	val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 127);
 	mutex_lock(&data->update_lock);
 	data->target_temp[nr] = val;
 	w83627ehf_write_value(data, data->REG_TARGET[nr], val);
 	mutex_unlock(&data->update_lock);
 	return count;
 }
 static ssize_t
 store_tolerance(struct device *dev, struct device_attribute *attr,
 			const char *buf, size_t count)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 	struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
 	int nr = sensor_attr->index;
 	u16 reg;
 	long val;
 	int err;
 	err = kstrtol(buf, 10, &val);
 	if (err < 0)
 		return err;
 	/* Limit the temp to 0C - 15C */
 	val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 15);
 	mutex_lock(&data->update_lock);
 	if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
 		/* Limit tolerance further for NCT6776F */
 		if (sio_data->kind == nct6776 && val > 7)
 			val = 7;
 		reg = w83627ehf_read_value(data, NCT6775_REG_FAN_MODE[nr]);
 		reg = (reg & 0xf0) | val;
 		w83627ehf_write_value(data, NCT6775_REG_FAN_MODE[nr], reg);
 	} else {
 		reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
 		if (nr == 1)
 			reg = (reg & 0x0f) | (val << 4);
 		else
 			reg = (reg & 0xf0) | val;
 		w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
 	}
 	data->tolerance[nr] = val;
 	mutex_unlock(&data->update_lock);
 	return count;
 }
 static struct sensor_device_attribute sda_pwm[] = {
 	SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
 	SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
 	SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
 	SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
 };
 static struct sensor_device_attribute sda_pwm_mode[] = {
 	SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
 		    store_pwm_mode, 0),
 	SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
 		    store_pwm_mode, 1),
 	SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
 		    store_pwm_mode, 2),
 	SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
 		    store_pwm_mode, 3),
 };
 static struct sensor_device_attribute sda_pwm_enable[] = {
 	SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
 		    store_pwm_enable, 0),
 	SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
 		    store_pwm_enable, 1),
 	SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
 		    store_pwm_enable, 2),
 	SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
 		    store_pwm_enable, 3),
 };
 static struct sensor_device_attribute sda_target_temp[] = {
 	SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
 		    store_target_temp, 0),
 	SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
 		    store_target_temp, 1),
 	SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
 		    store_target_temp, 2),
 	SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
 		    store_target_temp, 3),
 };
 static struct sensor_device_attribute sda_tolerance[] = {
 	SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
 		    store_tolerance, 0),
 	SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
 		    store_tolerance, 1),
 	SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
 		    store_tolerance, 2),
 	SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
 		    store_tolerance, 3),
 };
 /* Smart Fan registers */
 #define fan_functions(reg, REG) \
 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
 		       char *buf) \
 { \
 	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 	struct sensor_device_attribute *sensor_attr = \
 		to_sensor_dev_attr(attr); \
 	int nr = sensor_attr->index; \
 	return sprintf(buf, "%d\n", data->reg[nr]); \
 } \
 static ssize_t \
 store_##reg(struct device *dev, struct device_attribute *attr, \
 			    const char *buf, size_t count) \
 { \
 	struct w83627ehf_data *data = dev_get_drvdata(dev); \
 	struct sensor_device_attribute *sensor_attr = \
 		to_sensor_dev_attr(attr); \
 	int nr = sensor_attr->index; \
 	unsigned long val; \
 	int err; \
 	err = kstrtoul(buf, 10, &val); \
 	if (err < 0) \
 		return err; \
 	val = clamp_val(val, 1, 255); \
 	mutex_lock(&data->update_lock); \
 	data->reg[nr] = val; \
 	w83627ehf_write_value(data, data->REG_##REG[nr], val); \
 	mutex_unlock(&data->update_lock); \
 	return count; \
 }
 fan_functions(fan_start_output, FAN_START_OUTPUT)
 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
 #define fan_time_functions(reg, REG) \
 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
 				char *buf) \
 { \
 	struct w83627ehf_data *data = w83627ehf_update_device(dev); \
 	struct sensor_device_attribute *sensor_attr = \
 		to_sensor_dev_attr(attr); \
 	int nr = sensor_attr->index; \
 	return sprintf(buf, "%d\n", \
 			step_time_from_reg(data->reg[nr], \
 					   data->pwm_mode[nr])); \
 } \
 \
 static ssize_t \
 store_##reg(struct device *dev, struct device_attribute *attr, \
 			const char *buf, size_t count) \
 { \
 	struct w83627ehf_data *data = dev_get_drvdata(dev); \
 	struct sensor_device_attribute *sensor_attr = \
 		to_sensor_dev_attr(attr); \
 	int nr = sensor_attr->index; \
 	unsigned long val; \
 	int err; \
 	err = kstrtoul(buf, 10, &val); \
 	if (err < 0) \
 		return err; \
 	val = step_time_to_reg(val, data->pwm_mode[nr]); \
 	mutex_lock(&data->update_lock); \
 	data->reg[nr] = val; \
 	w83627ehf_write_value(data, data->REG_##REG[nr], val); \
 	mutex_unlock(&data->update_lock); \
 	return count; \
 } \
 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
 			 char *buf)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	return sprintf(buf, "%s\n", data->name);
 }
 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
 	SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
 		    store_fan_stop_time, 3),
 	SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
 		    store_fan_start_output, 3),
 	SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
 		    store_fan_stop_output, 3),
 	SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
 		    store_fan_max_output, 3),
 	SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
 		    store_fan_step_output, 3),
 };
 static struct sensor_device_attribute sda_sf3_arrays_fan3[] = {
 	SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
 		    store_fan_stop_time, 2),
 	SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
 		    store_fan_start_output, 2),
 	SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
 		    store_fan_stop_output, 2),
 };
 static struct sensor_device_attribute sda_sf3_arrays[] = {
 	SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
 		    store_fan_stop_time, 0),
 	SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
 		    store_fan_stop_time, 1),
 	SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
 		    store_fan_start_output, 0),
 	SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
 		    store_fan_start_output, 1),
 	SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
 		    store_fan_stop_output, 0),
 	SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
 		    store_fan_stop_output, 1),
 };
 /*
  * pwm1 and pwm3 don't support max and step settings on all chips.
  * Need to check support while generating/removing attribute files.
  */
 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
 	SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
 		    store_fan_max_output, 0),
 	SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
 		    store_fan_step_output, 0),
 	SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
 		    store_fan_max_output, 1),
 	SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
 		    store_fan_step_output, 1),
 	SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
 		    store_fan_max_output, 2),
 	SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
 		    store_fan_step_output, 2),
 };
 static ssize_t
 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
 }
 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
 /* Case open detection */
 static ssize_t
 show_caseopen(struct device *dev, struct device_attribute *attr, char *buf)
 {
 	struct w83627ehf_data *data = w83627ehf_update_device(dev);
 	return sprintf(buf, "%d\n",
 		!!(data->caseopen & to_sensor_dev_attr_2(attr)->index));
 }
 static ssize_t
 clear_caseopen(struct device *dev, struct device_attribute *attr,
 			const char *buf, size_t count)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	unsigned long val;
 	u16 reg, mask;
 	if (kstrtoul(buf, 10, &val) || val != 0)
 		return -EINVAL;
 	mask = to_sensor_dev_attr_2(attr)->nr;
 	mutex_lock(&data->update_lock);
 	reg = w83627ehf_read_value(data, W83627EHF_REG_CASEOPEN_CLR);
 	w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg | mask);
 	w83627ehf_write_value(data, W83627EHF_REG_CASEOPEN_CLR, reg & ~mask);
 	data->valid = 0;	/* Force cache refresh */
 	mutex_unlock(&data->update_lock);
 	return count;
 }
 static struct sensor_device_attribute_2 sda_caseopen[] = {
 	SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_caseopen,
 			clear_caseopen, 0x80, 0x10),
 	SENSOR_ATTR_2(intrusion1_alarm, S_IWUSR | S_IRUGO, show_caseopen,
 			clear_caseopen, 0x40, 0x40),
 };
 /*
  * Driver and device management
  */
 static void w83627ehf_device_remove_files(struct device *dev)
 {
 	/*
 	 * some entries in the following arrays may not have been used in
 	 * device_create_file(), but device_remove_file() will ignore them
 	 */
 	int i;
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
 		device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
 	for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
 		struct sensor_device_attribute *attr =
 		  &sda_sf3_max_step_arrays[i];
 		if (data->REG_FAN_STEP_OUTPUT &&
 		    data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
 			device_remove_file(dev, &attr->dev_attr);
 	}
 	for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++)
 		device_remove_file(dev, &sda_sf3_arrays_fan3[i].dev_attr);
 	for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
 		device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
 	for (i = 0; i < data->in_num; i++) {
 		if ((i == 6) && data->in6_skip)
 			continue;
 		device_remove_file(dev, &sda_in_input[i].dev_attr);
 		device_remove_file(dev, &sda_in_alarm[i].dev_attr);
 		device_remove_file(dev, &sda_in_min[i].dev_attr);
 		device_remove_file(dev, &sda_in_max[i].dev_attr);
 	}
 	for (i = 0; i < 5; i++) {
 		device_remove_file(dev, &sda_fan_input[i].dev_attr);
 		device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
 		device_remove_file(dev, &sda_fan_div[i].dev_attr);
 		device_remove_file(dev, &sda_fan_min[i].dev_attr);
 	}
 	for (i = 0; i < data->pwm_num; i++) {
 		device_remove_file(dev, &sda_pwm[i].dev_attr);
 		device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
 		device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
 		device_remove_file(dev, &sda_target_temp[i].dev_attr);
 		device_remove_file(dev, &sda_tolerance[i].dev_attr);
 	}
 	for (i = 0; i < NUM_REG_TEMP; i++) {
 		if (!(data->have_temp & (1 << i)))
 			continue;
 		device_remove_file(dev, &sda_temp_input[i].dev_attr);
 		device_remove_file(dev, &sda_temp_label[i].dev_attr);
 		if (i == 2 && data->temp3_val_only)
 			continue;
 		device_remove_file(dev, &sda_temp_max[i].dev_attr);
 		device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
 		if (i > 2)
 			continue;
 		device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
 		device_remove_file(dev, &sda_temp_type[i].dev_attr);
 		device_remove_file(dev, &sda_temp_offset[i].dev_attr);
 	}
 	device_remove_file(dev, &sda_caseopen[0].dev_attr);
 	device_remove_file(dev, &sda_caseopen[1].dev_attr);
 	device_remove_file(dev, &dev_attr_name);
 	device_remove_file(dev, &dev_attr_cpu0_vid);
 }
 /* Get the monitoring functions started */
 static inline void w83627ehf_init_device(struct w83627ehf_data *data,
 						   enum kinds kind)
 {
 	int i;
 	u8 tmp, diode;
 	/* Start monitoring is needed */
 	tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
 	if (!(tmp & 0x01))
 		w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
 				      tmp | 0x01);
 	/* Enable temperature sensors if needed */
 	for (i = 0; i < NUM_REG_TEMP; i++) {
 		if (!(data->have_temp & (1 << i)))
 			continue;
 		if (!data->reg_temp_config[i])
 			continue;
 		tmp = w83627ehf_read_value(data,
 					   data->reg_temp_config[i]);
 		if (tmp & 0x01)
 			w83627ehf_write_value(data,
 					      data->reg_temp_config[i],
 					      tmp & 0xfe);
 	}
 	/* Enable VBAT monitoring if needed */
 	tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
 	if (!(tmp & 0x01))
 		w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
 	/* Get thermal sensor types */
 	switch (kind) {
 	case w83627ehf:
 		diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
 		break;
 	case w83627uhg:
 		diode = 0x00;
 		break;
 	default:
 		diode = 0x70;
 	}
 	for (i = 0; i < 3; i++) {
 		const char *label = NULL;
 		if (data->temp_label)
 			label = data->temp_label[data->temp_src[i]];
 		/* Digital source overrides analog type */
 		if (label && strncmp(label, "PECI", 4) == 0)
 			data->temp_type[i] = 6;
 		else if (label && strncmp(label, "AMD", 3) == 0)
 			data->temp_type[i] = 5;
 		else if ((tmp & (0x02 << i)))
 			data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 3;
 		else
 			data->temp_type[i] = 4; /* thermistor */
 	}
 }
 static void w82627ehf_swap_tempreg(struct w83627ehf_data *data,
 				   int r1, int r2)
 {
 	u16 tmp;
 	tmp = data->temp_src[r1];
 	data->temp_src[r1] = data->temp_src[r2];
 	data->temp_src[r2] = tmp;
 	tmp = data->reg_temp[r1];
 	data->reg_temp[r1] = data->reg_temp[r2];
 	data->reg_temp[r2] = tmp;
 	tmp = data->reg_temp_over[r1];
 	data->reg_temp_over[r1] = data->reg_temp_over[r2];
 	data->reg_temp_over[r2] = tmp;
 	tmp = data->reg_temp_hyst[r1];
 	data->reg_temp_hyst[r1] = data->reg_temp_hyst[r2];
 	data->reg_temp_hyst[r2] = tmp;
 	tmp = data->reg_temp_config[r1];
 	data->reg_temp_config[r1] = data->reg_temp_config[r2];
 	data->reg_temp_config[r2] = tmp;
 }
 static void
 w83627ehf_set_temp_reg_ehf(struct w83627ehf_data *data, int n_temp)
 {
 	int i;
 	for (i = 0; i < n_temp; i++) {
 		data->reg_temp[i] = W83627EHF_REG_TEMP[i];
 		data->reg_temp_over[i] = W83627EHF_REG_TEMP_OVER[i];
 		data->reg_temp_hyst[i] = W83627EHF_REG_TEMP_HYST[i];
 		data->reg_temp_config[i] = W83627EHF_REG_TEMP_CONFIG[i];
 	}
 }
 static void
 w83627ehf_check_fan_inputs(const struct w83627ehf_sio_data *sio_data,
 			   struct w83627ehf_data *data)
 {
 	int fan3pin, fan4pin, fan4min, fan5pin, regval;
 	/* The W83627UHG is simple, only two fan inputs, no config */
 	if (sio_data->kind == w83627uhg) {
 		data->has_fan = 0x03; /* fan1 and fan2 */
 		data->has_fan_min = 0x03;
 		return;
 	}
 	superio_enter(sio_data->sioreg);
 	/* fan4 and fan5 share some pins with the GPIO and serial flash */
 	if (sio_data->kind == nct6775) {
 		/* On NCT6775, fan4 shares pins with the fdc interface */
 		fan3pin = 1;
 		fan4pin = !(superio_inb(sio_data->sioreg, 0x2A) & 0x80);
 		fan4min = 0;
 		fan5pin = 0;
 	} else if (sio_data->kind == nct6776) {
 		bool gpok = superio_inb(sio_data->sioreg, 0x27) & 0x80;
 		superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
 		regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE);
 		if (regval & 0x80)
 			fan3pin = gpok;
 		else
 			fan3pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x40);
 		if (regval & 0x40)
 			fan4pin = gpok;
 		else
 			fan4pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x01);
 		if (regval & 0x20)
 			fan5pin = gpok;
 		else
 			fan5pin = !!(superio_inb(sio_data->sioreg, 0x1C) & 0x02);
 		fan4min = fan4pin;
 	} else if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b) {
 		fan3pin = 1;
 		fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
 		fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
 		fan4min = fan4pin;
 	} else {
 		fan3pin = 1;
 		fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
 		fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
 		fan4min = fan4pin;
 	}
 	superio_exit(sio_data->sioreg);
 	data->has_fan = data->has_fan_min = 0x03; /* fan1 and fan2 */
 	data->has_fan |= (fan3pin << 2);
 	data->has_fan_min |= (fan3pin << 2);
 	if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
 		/*
 		 * NCT6775F and NCT6776F don't have the W83627EHF_REG_FANDIV1
 		 * register
 		 */
 		data->has_fan |= (fan4pin << 3) | (fan5pin << 4);
 		data->has_fan_min |= (fan4min << 3) | (fan5pin << 4);
 	} else {
 		/*
 		 * It looks like fan4 and fan5 pins can be alternatively used
 		 * as fan on/off switches, but fan5 control is write only :/
 		 * We assume that if the serial interface is disabled, designers
 		 * connected fan5 as input unless they are emitting log 1, which
 		 * is not the default.
 		 */
 		regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
 		if ((regval & (1 << 2)) && fan4pin) {
 			data->has_fan |= (1 << 3);
 			data->has_fan_min |= (1 << 3);
 		}
 		if (!(regval & (1 << 1)) && fan5pin) {
 			data->has_fan |= (1 << 4);
 			data->has_fan_min |= (1 << 4);
 		}
 	}
 }
 static int w83627ehf_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 	struct w83627ehf_data *data;
 	struct resource *res;
 	u8 en_vrm10;
 	int i, err = 0;
 	res = platform_get_resource(pdev, IORESOURCE_IO, 0);
 	if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
 		err = -EBUSY;
 		dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
 			(unsigned long)res->start,
 			(unsigned long)res->start + IOREGION_LENGTH - 1);
 		goto exit;
 	}
 	data = devm_kzalloc(&pdev->dev, sizeof(struct w83627ehf_data),
 			    GFP_KERNEL);
 	if (!data) {
 		err = -ENOMEM;
 		goto exit_release;
 	}
 	data->addr = res->start;
 	mutex_init(&data->lock);
 	mutex_init(&data->update_lock);
 	data->name = w83627ehf_device_names[sio_data->kind];
 	data->bank = 0xff;		/* Force initial bank selection */
 	platform_set_drvdata(pdev, data);
 	/* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
 	data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
 	/* 667HG, NCT6775F, and NCT6776F have 3 pwms, and 627UHG has only 2 */
 	switch (sio_data->kind) {
 	default:
 		data->pwm_num = 4;
 		break;
 	case w83667hg:
 	case w83667hg_b:
 	case nct6775:
 	case nct6776:
 		data->pwm_num = 3;
 		break;
 	case w83627uhg:
 		data->pwm_num = 2;
 		break;
 	}
 	/* Default to 3 temperature inputs, code below will adjust as needed */
 	data->have_temp = 0x07;
 	/* Deal with temperature register setup first. */
 	if (sio_data->kind == nct6775 || sio_data->kind == nct6776) {
 		int mask = 0;
 		/*
 		 * Display temperature sensor output only if it monitors
 		 * a source other than one already reported. Always display
 		 * first three temperature registers, though.
 		 */
 		for (i = 0; i < NUM_REG_TEMP; i++) {
 			u8 src;
 			data->reg_temp[i] = NCT6775_REG_TEMP[i];
 			data->reg_temp_over[i] = NCT6775_REG_TEMP_OVER[i];
 			data->reg_temp_hyst[i] = NCT6775_REG_TEMP_HYST[i];
 			data->reg_temp_config[i] = NCT6775_REG_TEMP_CONFIG[i];
 			src = w83627ehf_read_value(data,
 						   NCT6775_REG_TEMP_SOURCE[i]);
 			src &= 0x1f;
 			if (src && !(mask & (1 << src))) {
 				data->have_temp |= 1 << i;
 				mask |= 1 << src;
 			}
 			data->temp_src[i] = src;
 			/*
 			 * Now do some register swapping if index 0..2 don't
 			 * point to SYSTIN(1), CPUIN(2), and AUXIN(3).
 			 * Idea is to have the first three attributes
 			 * report SYSTIN, CPUIN, and AUXIN if possible
 			 * without overriding the basic system configuration.
 			 */
 			if (i > 0 && data->temp_src[0] != 1
 			    && data->temp_src[i] == 1)
 				w82627ehf_swap_tempreg(data, 0, i);
 			if (i > 1 && data->temp_src[1] != 2
 			    && data->temp_src[i] == 2)
 				w82627ehf_swap_tempreg(data, 1, i);
 			if (i > 2 && data->temp_src[2] != 3
 			    && data->temp_src[i] == 3)
 				w82627ehf_swap_tempreg(data, 2, i);
 		}
 		if (sio_data->kind == nct6776) {
 			/*
 			 * On NCT6776, AUXTIN and VIN3 pins are shared.
 			 * Only way to detect it is to check if AUXTIN is used
 			 * as a temperature source, and if that source is
 			 * enabled.
 			 *
 			 * If that is the case, disable in6, which reports VIN3.
 			 * Otherwise disable temp3.
 			 */
 			if (data->temp_src[2] == 3) {
 				u8 reg;
 				if (data->reg_temp_config[2])
 					reg = w83627ehf_read_value(data,
 						data->reg_temp_config[2]);
 				else
 					reg = 0; /* Assume AUXTIN is used */
 				if (reg & 0x01)
 					data->have_temp &= ~(1 << 2);
 				else
 					data->in6_skip = 1;
 			}
 			data->temp_label = nct6776_temp_label;
 		} else {
 			data->temp_label = nct6775_temp_label;
 		}
 		data->have_temp_offset = data->have_temp & 0x07;
 		for (i = 0; i < 3; i++) {
 			if (data->temp_src[i] > 3)
 				data->have_temp_offset &= ~(1 << i);
 		}
 	} else if (sio_data->kind == w83667hg_b) {
 		u8 reg;
 		w83627ehf_set_temp_reg_ehf(data, 4);
 		/*
 		 * Temperature sources are selected with bank 0, registers 0x49
 		 * and 0x4a.
 		 */
 		reg = w83627ehf_read_value(data, 0x4a);
 		data->temp_src[0] = reg >> 5;
 		reg = w83627ehf_read_value(data, 0x49);
 		data->temp_src[1] = reg & 0x07;
 		data->temp_src[2] = (reg >> 4) & 0x07;
 		/*
 		 * W83667HG-B has another temperature register at 0x7e.
 		 * The temperature source is selected with register 0x7d.
 		 * Support it if the source differs from already reported
 		 * sources.
 		 */
 		reg = w83627ehf_read_value(data, 0x7d);
 		reg &= 0x07;
 		if (reg != data->temp_src[0] && reg != data->temp_src[1]
 		    && reg != data->temp_src[2]) {
 			data->temp_src[3] = reg;
 			data->have_temp |= 1 << 3;
 		}
 		/*
 		 * Chip supports either AUXTIN or VIN3. Try to find out which
 		 * one.
 		 */
 		reg = w83627ehf_read_value(data, W83627EHF_REG_TEMP_CONFIG[2]);
 		if (data->temp_src[2] == 2 && (reg & 0x01))
 			data->have_temp &= ~(1 << 2);
 		if ((data->temp_src[2] == 2 && (data->have_temp & (1 << 2)))
 		    || (data->temp_src[3] == 2 && (data->have_temp & (1 << 3))))
 			data->in6_skip = 1;
 		data->temp_label = w83667hg_b_temp_label;
 		data->have_temp_offset = data->have_temp & 0x07;
 		for (i = 0; i < 3; i++) {
 			if (data->temp_src[i] > 2)
 				data->have_temp_offset &= ~(1 << i);
 		}
 	} else if (sio_data->kind == w83627uhg) {
 		u8 reg;
 		w83627ehf_set_temp_reg_ehf(data, 3);
 		/*
 		 * Temperature sources for temp2 and temp3 are selected with
 		 * bank 0, registers 0x49 and 0x4a.
 		 */
 		data->temp_src[0] = 0;	/* SYSTIN */
 		reg = w83627ehf_read_value(data, 0x49) & 0x07;
 		/* Adjust to have the same mapping as other source registers */
 		if (reg == 0)
 			data->temp_src[1] = 1;
 		else if (reg >= 2 && reg <= 5)
 			data->temp_src[1] = reg + 2;
 		else	/* should never happen */
 			data->have_temp &= ~(1 << 1);
 		reg = w83627ehf_read_value(data, 0x4a);
 		data->temp_src[2] = reg >> 5;
 		/*
 		 * Skip temp3 if source is invalid or the same as temp1
 		 * or temp2.
 		 */
 		if (data->temp_src[2] == 2 || data->temp_src[2] == 3 ||
 		    data->temp_src[2] == data->temp_src[0] ||
 		    ((data->have_temp & (1 << 1)) &&
 		     data->temp_src[2] == data->temp_src[1]))
 			data->have_temp &= ~(1 << 2);
 		else
 			data->temp3_val_only = 1;	/* No limit regs */
 		data->in6_skip = 1;			/* No VIN3 */
 		data->temp_label = w83667hg_b_temp_label;
 		data->have_temp_offset = data->have_temp & 0x03;
 		for (i = 0; i < 3; i++) {
 			if (data->temp_src[i] > 1)
 				data->have_temp_offset &= ~(1 << i);
 		}
 	} else {
 		w83627ehf_set_temp_reg_ehf(data, 3);
 		/* Temperature sources are fixed */
 		if (sio_data->kind == w83667hg) {
 			u8 reg;
 			/*
 			 * Chip supports either AUXTIN or VIN3. Try to find
 			 * out which one.
 			 */
 			reg = w83627ehf_read_value(data,
 						W83627EHF_REG_TEMP_CONFIG[2]);
 			if (reg & 0x01)
 				data->have_temp &= ~(1 << 2);
 			else
 				data->in6_skip = 1;
 		}
 		data->have_temp_offset = data->have_temp & 0x07;
 	}
 	if (sio_data->kind == nct6775) {
 		data->has_fan_div = true;
 		data->fan_from_reg = fan_from_reg16;
 		data->fan_from_reg_min = fan_from_reg8;
 		data->REG_PWM = NCT6775_REG_PWM;
 		data->REG_TARGET = NCT6775_REG_TARGET;
 		data->REG_FAN = NCT6775_REG_FAN;
 		data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
 		data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
 		data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
 		data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
 		data->REG_FAN_MAX_OUTPUT = NCT6775_REG_FAN_MAX_OUTPUT;
 		data->REG_FAN_STEP_OUTPUT = NCT6775_REG_FAN_STEP_OUTPUT;
 	} else if (sio_data->kind == nct6776) {
 		data->has_fan_div = false;
 		data->fan_from_reg = fan_from_reg13;
 		data->fan_from_reg_min = fan_from_reg13;
 		data->REG_PWM = NCT6775_REG_PWM;
 		data->REG_TARGET = NCT6775_REG_TARGET;
 		data->REG_FAN = NCT6775_REG_FAN;
 		data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
 		data->REG_FAN_START_OUTPUT = NCT6775_REG_FAN_START_OUTPUT;
 		data->REG_FAN_STOP_OUTPUT = NCT6775_REG_FAN_STOP_OUTPUT;
 		data->REG_FAN_STOP_TIME = NCT6775_REG_FAN_STOP_TIME;
 	} else if (sio_data->kind == w83667hg_b) {
 		data->has_fan_div = true;
 		data->fan_from_reg = fan_from_reg8;
 		data->fan_from_reg_min = fan_from_reg8;
 		data->REG_PWM = W83627EHF_REG_PWM;
 		data->REG_TARGET = W83627EHF_REG_TARGET;
 		data->REG_FAN = W83627EHF_REG_FAN;
 		data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
 		data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
 		data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
 		data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
 		data->REG_FAN_MAX_OUTPUT =
 		  W83627EHF_REG_FAN_MAX_OUTPUT_W83667_B;
 		data->REG_FAN_STEP_OUTPUT =
 		  W83627EHF_REG_FAN_STEP_OUTPUT_W83667_B;
 	} else {
 		data->has_fan_div = true;
 		data->fan_from_reg = fan_from_reg8;
 		data->fan_from_reg_min = fan_from_reg8;
 		data->REG_PWM = W83627EHF_REG_PWM;
 		data->REG_TARGET = W83627EHF_REG_TARGET;
 		data->REG_FAN = W83627EHF_REG_FAN;
 		data->REG_FAN_MIN = W83627EHF_REG_FAN_MIN;
 		data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
 		data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
 		data->REG_FAN_STOP_TIME = W83627EHF_REG_FAN_STOP_TIME;
 		data->REG_FAN_MAX_OUTPUT =
 		  W83627EHF_REG_FAN_MAX_OUTPUT_COMMON;
 		data->REG_FAN_STEP_OUTPUT =
 		  W83627EHF_REG_FAN_STEP_OUTPUT_COMMON;
 	}
 	/* Setup input voltage scaling factors */
 	if (sio_data->kind == w83627uhg)
 		data->scale_in = scale_in_w83627uhg;
 	else
 		data->scale_in = scale_in_common;
 	/* Initialize the chip */
 	w83627ehf_init_device(data, sio_data->kind);
 	data->vrm = vid_which_vrm();
 	superio_enter(sio_data->sioreg);
 	/* Read VID value */
 	if (sio_data->kind == w83667hg || sio_data->kind == w83667hg_b ||
 	    sio_data->kind == nct6775 || sio_data->kind == nct6776) {
 		/*
 		 * W83667HG has different pins for VID input and output, so
 		 * we can get the VID input values directly at logical device D
 		 * 0xe3.
 		 */
 		superio_select(sio_data->sioreg, W83667HG_LD_VID);
 		data->vid = superio_inb(sio_data->sioreg, 0xe3);
 		err = device_create_file(dev, &dev_attr_cpu0_vid);
 		if (err)
 			goto exit_release;
 	} else if (sio_data->kind != w83627uhg) {
 		superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
 		if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
 			/*
 			 * Set VID input sensibility if needed. In theory the
 			 * BIOS should have set it, but in practice it's not
 			 * always the case. We only do it for the W83627EHF/EHG
 			 * because the W83627DHG is more complex in this
 			 * respect.
 			 */
 			if (sio_data->kind == w83627ehf) {
 				en_vrm10 = superio_inb(sio_data->sioreg,
 						       SIO_REG_EN_VRM10);
 				if ((en_vrm10 & 0x08) && data->vrm == 90) {
 					dev_warn(dev,
 						 "Setting VID input voltage to TTL\n");
 					superio_outb(sio_data->sioreg,
 						     SIO_REG_EN_VRM10,
 						     en_vrm10 & ~0x08);
 				} else if (!(en_vrm10 & 0x08)
 					   && data->vrm == 100) {
 					dev_warn(dev,
 						 "Setting VID input voltage to VRM10\n");
 					superio_outb(sio_data->sioreg,
 						     SIO_REG_EN_VRM10,
 						     en_vrm10 | 0x08);
 				}
 			}
 			data->vid = superio_inb(sio_data->sioreg,
 						SIO_REG_VID_DATA);
 			if (sio_data->kind == w83627ehf) /* 6 VID pins only */
 				data->vid &= 0x3f;
 			err = device_create_file(dev, &dev_attr_cpu0_vid);
 			if (err)
 				goto exit_release;
 		} else {
 			dev_info(dev,
 				 "VID pins in output mode, CPU VID not available\n");
 		}
 	}
 	if (fan_debounce &&
 	    (sio_data->kind == nct6775 || sio_data->kind == nct6776)) {
 		u8 tmp;
 		superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
 		tmp = superio_inb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE);
 		if (sio_data->kind == nct6776)
 			superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
 				     0x3e | tmp);
 		else
 			superio_outb(sio_data->sioreg, NCT6775_REG_FAN_DEBOUNCE,
 				     0x1e | tmp);
 		pr_info("Enabled fan debounce for chip %s\n", data->name);
 	}
 	superio_exit(sio_data->sioreg);
 	w83627ehf_check_fan_inputs(sio_data, data);
 	/* Read fan clock dividers immediately */
 	w83627ehf_update_fan_div_common(dev, data);
 	/* Read pwm data to save original values */
 	w83627ehf_update_pwm_common(dev, data);
 	for (i = 0; i < data->pwm_num; i++)
 		data->pwm_enable_orig[i] = data->pwm_enable[i];
 	/* Register sysfs hooks */
 	for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) {
 		err = device_create_file(dev, &sda_sf3_arrays[i].dev_attr);
 		if (err)
 			goto exit_remove;
 	}
 	for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
 		struct sensor_device_attribute *attr =
 		  &sda_sf3_max_step_arrays[i];
 		if (data->REG_FAN_STEP_OUTPUT &&
 		    data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
 			err = device_create_file(dev, &attr->dev_attr);
 			if (err)
 				goto exit_remove;
 		}
 	}
 	/* if fan3 and fan4 are enabled create the sf3 files for them */
 	if ((data->has_fan & (1 << 2)) && data->pwm_num >= 3)
 		for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan3); i++) {
 			err = device_create_file(dev,
 					&sda_sf3_arrays_fan3[i].dev_attr);
 			if (err)
 				goto exit_remove;
 		}
 	if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
 		for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
 			err = device_create_file(dev,
 					&sda_sf3_arrays_fan4[i].dev_attr);
 			if (err)
 				goto exit_remove;
 		}
 	for (i = 0; i < data->in_num; i++) {
 		if ((i == 6) && data->in6_skip)
 			continue;
 		if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
 			|| (err = device_create_file(dev,
 				&sda_in_alarm[i].dev_attr))
 			|| (err = device_create_file(dev,
 				&sda_in_min[i].dev_attr))
 			|| (err = device_create_file(dev,
 				&sda_in_max[i].dev_attr)))
 			goto exit_remove;
 	}
 	for (i = 0; i < 5; i++) {
 		if (data->has_fan & (1 << i)) {
 			if ((err = device_create_file(dev,
 					&sda_fan_input[i].dev_attr))
 				|| (err = device_create_file(dev,
 					&sda_fan_alarm[i].dev_attr)))
 				goto exit_remove;
 			if (sio_data->kind != nct6776) {
 				err = device_create_file(dev,
 						&sda_fan_div[i].dev_attr);
 				if (err)
 					goto exit_remove;
 			}
 			if (data->has_fan_min & (1 << i)) {
 				err = device_create_file(dev,
 						&sda_fan_min[i].dev_attr);
 				if (err)
 					goto exit_remove;
 			}
 			if (i < data->pwm_num &&
 				((err = device_create_file(dev,
 					&sda_pwm[i].dev_attr))
 				|| (err = device_create_file(dev,
 					&sda_pwm_mode[i].dev_attr))
 				|| (err = device_create_file(dev,
 					&sda_pwm_enable[i].dev_attr))
 				|| (err = device_create_file(dev,
 					&sda_target_temp[i].dev_attr))
 				|| (err = device_create_file(dev,
 					&sda_tolerance[i].dev_attr))))
 				goto exit_remove;
 		}
 	}
 	for (i = 0; i < NUM_REG_TEMP; i++) {
 		if (!(data->have_temp & (1 << i)))
 			continue;
 		err = device_create_file(dev, &sda_temp_input[i].dev_attr);
 		if (err)
 			goto exit_remove;
 		if (data->temp_label) {
 			err = device_create_file(dev,
 						 &sda_temp_label[i].dev_attr);
 			if (err)
 				goto exit_remove;
 		}
 		if (i == 2 && data->temp3_val_only)
 			continue;
 		if (data->reg_temp_over[i]) {
 			err = device_create_file(dev,
 				&sda_temp_max[i].dev_attr);
 			if (err)
 				goto exit_remove;
 		}
 		if (data->reg_temp_hyst[i]) {
 			err = device_create_file(dev,
 				&sda_temp_max_hyst[i].dev_attr);
 			if (err)
 				goto exit_remove;
 		}
 		if (i > 2)
 			continue;
 		if ((err = device_create_file(dev,
 				&sda_temp_alarm[i].dev_attr))
 			|| (err = device_create_file(dev,
 				&sda_temp_type[i].dev_attr)))
 			goto exit_remove;
 		if (data->have_temp_offset & (1 << i)) {
 			err = device_create_file(dev,
 						 &sda_temp_offset[i].dev_attr);
 			if (err)
 				goto exit_remove;
 		}
 	}
 	err = device_create_file(dev, &sda_caseopen[0].dev_attr);
 	if (err)
 		goto exit_remove;
 	if (sio_data->kind == nct6776) {
 		err = device_create_file(dev, &sda_caseopen[1].dev_attr);
 		if (err)
 			goto exit_remove;
 	}
 	err = device_create_file(dev, &dev_attr_name);
 	if (err)
 		goto exit_remove;
 	data->hwmon_dev = hwmon_device_register(dev);
 	if (IS_ERR(data->hwmon_dev)) {
 		err = PTR_ERR(data->hwmon_dev);
 		goto exit_remove;
 	}
 	return 0;
 exit_remove:
 	w83627ehf_device_remove_files(dev);
 exit_release:
 	release_region(res->start, IOREGION_LENGTH);
 exit:
 	return err;
 }
 static int w83627ehf_remove(struct platform_device *pdev)
 {
 	struct w83627ehf_data *data = platform_get_drvdata(pdev);
 	hwmon_device_unregister(data->hwmon_dev);
 	w83627ehf_device_remove_files(&pdev->dev);
 	release_region(data->addr, IOREGION_LENGTH);
 	return 0;
 }
 #ifdef CONFIG_PM
 static int w83627ehf_suspend(struct device *dev)
 {
 	struct w83627ehf_data *data = w83627ehf_update_device(dev);
 	struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 	mutex_lock(&data->update_lock);
 	data->vbat = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
 	if (sio_data->kind == nct6775) {
 		data->fandiv1 = w83627ehf_read_value(data, NCT6775_REG_FANDIV1);
 		data->fandiv2 = w83627ehf_read_value(data, NCT6775_REG_FANDIV2);
 	}
 	mutex_unlock(&data->update_lock);
 	return 0;
 }
 static int w83627ehf_resume(struct device *dev)
 {
 	struct w83627ehf_data *data = dev_get_drvdata(dev);
 	struct w83627ehf_sio_data *sio_data = dev_get_platdata(dev);
 	int i;
 	mutex_lock(&data->update_lock);
 	data->bank = 0xff;		/* Force initial bank selection */
 	/* Restore limits */
 	for (i = 0; i < data->in_num; i++) {
 		if ((i == 6) && data->in6_skip)
 			continue;
 		w83627ehf_write_value(data, W83627EHF_REG_IN_MIN(i),
 				      data->in_min[i]);
 		w83627ehf_write_value(data, W83627EHF_REG_IN_MAX(i),
 				      data->in_max[i]);
 	}
 	for (i = 0; i < 5; i++) {
 		if (!(data->has_fan_min & (1 << i)))
 			continue;
 		w83627ehf_write_value(data, data->REG_FAN_MIN[i],
 				      data->fan_min[i]);
 	}
 	for (i = 0; i < NUM_REG_TEMP; i++) {
 		if (!(data->have_temp & (1 << i)))
 			continue;
 		if (data->reg_temp_over[i])
 			w83627ehf_write_temp(data, data->reg_temp_over[i],
 					     data->temp_max[i]);
 		if (data->reg_temp_hyst[i])
 			w83627ehf_write_temp(data, data->reg_temp_hyst[i],
 					     data->temp_max_hyst[i]);
 		if (i > 2)
 			continue;
 		if (data->have_temp_offset & (1 << i))
 			w83627ehf_write_value(data,
 					      W83627EHF_REG_TEMP_OFFSET[i],
 					      data->temp_offset[i]);
 	}
 	/* Restore other settings */
 	w83627ehf_write_value(data, W83627EHF_REG_VBAT, data->vbat);
 	if (sio_data->kind == nct6775) {
 		w83627ehf_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
 		w83627ehf_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
 	}
 	/* Force re-reading all values */
 	data->valid = 0;
 	mutex_unlock(&data->update_lock);
 	return 0;
 }
 static const struct dev_pm_ops w83627ehf_dev_pm_ops = {
 	.suspend = w83627ehf_suspend,
 	.resume = w83627ehf_resume,
+	.freeze = w83627ehf_suspend,
+	.restore = w83627ehf_resume,
 };
 #define W83627EHF_DEV_PM_OPS	(&w83627ehf_dev_pm_ops)
 #else
 #define W83627EHF_DEV_PM_OPS	NULL
 #endif /* CONFIG_PM */
 static struct platform_driver w83627ehf_driver = {
 	.driver = {
 		.owner	= THIS_MODULE,
 		.name	= DRVNAME,
 		.pm	= W83627EHF_DEV_PM_OPS,
 	},
 	.probe		= w83627ehf_probe,
 	.remove		= w83627ehf_remove,
 };
 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
 				 struct w83627ehf_sio_data *sio_data)
 {
 	static const char sio_name_W83627EHF[] __initconst = "W83627EHF";
 	static const char sio_name_W83627EHG[] __initconst = "W83627EHG";
 	static const char sio_name_W83627DHG[] __initconst = "W83627DHG";
 	static const char sio_name_W83627DHG_P[] __initconst = "W83627DHG-P";
 	static const char sio_name_W83627UHG[] __initconst = "W83627UHG";
 	static const char sio_name_W83667HG[] __initconst = "W83667HG";
 	static const char sio_name_W83667HG_B[] __initconst = "W83667HG-B";
 	static const char sio_name_NCT6775[] __initconst = "NCT6775F";
 	static const char sio_name_NCT6776[] __initconst = "NCT6776F";
 	u16 val;
 	const char *sio_name;
 	superio_enter(sioaddr);
 	if (force_id)
 		val = force_id;
 	else
 		val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
 		    | superio_inb(sioaddr, SIO_REG_DEVID + 1);
 	switch (val & SIO_ID_MASK) {
 	case SIO_W83627EHF_ID:
 		sio_data->kind = w83627ehf;
 		sio_name = sio_name_W83627EHF;
 		break;
 	case SIO_W83627EHG_ID:
 		sio_data->kind = w83627ehf;
 		sio_name = sio_name_W83627EHG;
 		break;
 	case SIO_W83627DHG_ID:
 		sio_data->kind = w83627dhg;
 		sio_name = sio_name_W83627DHG;
 		break;
 	case SIO_W83627DHG_P_ID:
 		sio_data->kind = w83627dhg_p;
 		sio_name = sio_name_W83627DHG_P;
 		break;
 	case SIO_W83627UHG_ID:
 		sio_data->kind = w83627uhg;
 		sio_name = sio_name_W83627UHG;
 		break;
 	case SIO_W83667HG_ID:
 		sio_data->kind = w83667hg;
 		sio_name = sio_name_W83667HG;
 		break;
 	case SIO_W83667HG_B_ID:
 		sio_data->kind = w83667hg_b;
 		sio_name = sio_name_W83667HG_B;
 		break;
 	case SIO_NCT6775_ID:
 		sio_data->kind = nct6775;
 		sio_name = sio_name_NCT6775;
 		break;
 	case SIO_NCT6776_ID:
 		sio_data->kind = nct6776;
 		sio_name = sio_name_NCT6776;
 		break;
 	default:
 		if (val != 0xffff)
 			pr_debug("unsupported chip ID: 0x%04x\n", val);
 		superio_exit(sioaddr);
 		return -ENODEV;
 	}
 	/* We have a known chip, find the HWM I/O address */
 	superio_select(sioaddr, W83627EHF_LD_HWM);
 	val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
 	    | superio_inb(sioaddr, SIO_REG_ADDR + 1);
 	*addr = val & IOREGION_ALIGNMENT;
 	if (*addr == 0) {
 		pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
 		superio_exit(sioaddr);
 		return -ENODEV;
 	}
 	/* Activate logical device if needed */
 	val = superio_inb(sioaddr, SIO_REG_ENABLE);
 	if (!(val & 0x01)) {
 		pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
 		superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
 	}
 	superio_exit(sioaddr);
 	pr_info("Found %s chip at %#x\n", sio_name, *addr);
 	sio_data->sioreg = sioaddr;
 	return 0;
 }
 /*
  * when Super-I/O functions move to a separate file, the Super-I/O
  * bus will manage the lifetime of the device and this module will only keep
  * track of the w83627ehf driver. But since we platform_device_alloc(), we
  * must keep track of the device
  */
 static struct platform_device *pdev;
 static int __init sensors_w83627ehf_init(void)
 {
 	int err;
 	unsigned short address;
 	struct resource res;
 	struct w83627ehf_sio_data sio_data;
 	/*
 	 * initialize sio_data->kind and sio_data->sioreg.
 	 *
 	 * when Super-I/O functions move to a separate file, the Super-I/O
 	 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
 	 * w83627ehf hardware monitor, and call probe()
 	 */
 	if (w83627ehf_find(0x2e, &address, &sio_data) &&
 	    w83627ehf_find(0x4e, &address, &sio_data))
 		return -ENODEV;
 	err = platform_driver_register(&w83627ehf_driver);
 	if (err)
 		goto exit;
 	pdev = platform_device_alloc(DRVNAME, address);
 	if (!pdev) {
 		err = -ENOMEM;
 		pr_err("Device allocation failed\n");
 		goto exit_unregister;
 	}
 	err = platform_device_add_data(pdev, &sio_data,
 				       sizeof(struct w83627ehf_sio_data));
 	if (err) {
 		pr_err("Platform data allocation failed\n");
 		goto exit_device_put;
 	}
 	memset(&res, 0, sizeof(res));
 	res.name = DRVNAME;
 	res.start = address + IOREGION_OFFSET;
 	res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
 	res.flags = IORESOURCE_IO;
 	err = acpi_check_resource_conflict(&res);
 	if (err)
 		goto exit_device_put;
 	err = platform_device_add_resources(pdev, &res, 1);
 	if (err) {
 		pr_err("Device resource addition failed (%d)\n", err);
 		goto exit_device_put;
 	}
 	/* platform_device_add calls probe() */
 	err = platform_device_add(pdev);
 	if (err) {
 		pr_err("Device addition failed (%d)\n", err);
 		goto exit_device_put;
 	}
 	return 0;
 exit_device_put:
 	platform_device_put(pdev);
 exit_unregister:
 	platform_driver_unregister(&w83627ehf_driver);
 exit:
 	return err;
 }
 static void __exit sensors_w83627ehf_exit(void)
 {
 	platform_device_unregister(pdev);
 	platform_driver_unregister(&w83627ehf_driver);
 }
 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
 MODULE_DESCRIPTION("W83627EHF driver");
 MODULE_LICENSE("GPL");
 module_init(sensors_w83627ehf_init);
 module_exit(sensors_w83627ehf_exit);