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Commit e4acfcac0f3e3b575bb1819052b91b579988c59b

Authored by Justin Chen
Committed by David Howells
1 parent 292aa14127
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

bitops: Change the bitmap index from int to unsigned long [mn10300] 

Change the index to unsigned long in all bitops for [mn10300]

Signed-off-by: Justin Chen <justin.chen@hp.com>
Reviewed-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: David Howells <dhowells@redhat.com>

Showing 2 changed files with 8 additions and 8 deletions Inline Diff

arch/mn10300/include/asm/bitops.h
Diff comments   View file @ e4acfca
1 /* MN10300 bit operations 1 /* MN10300 bit operations
2 * 2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com) 4 * Written by David Howells (dhowells@redhat.com)
5 * 5 *
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence 7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version 8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version. 9 * 2 of the Licence, or (at your option) any later version.
10 * 10 *
11 * These have to be done with inline assembly: that way the bit-setting 11 * These have to be done with inline assembly: that way the bit-setting
12 * is guaranteed to be atomic. All bit operations return 0 if the bit 12 * is guaranteed to be atomic. All bit operations return 0 if the bit
13 * was cleared before the operation and != 0 if it was not. 13 * was cleared before the operation and != 0 if it was not.
14 * 14 *
15 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). 15 * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1).
16 */ 16 */
17 #ifndef __ASM_BITOPS_H 17 #ifndef __ASM_BITOPS_H
18 #define __ASM_BITOPS_H 18 #define __ASM_BITOPS_H
19 19
20 #include <asm/cpu-regs.h> 20 #include <asm/cpu-regs.h>
21 21
22 #define smp_mb__before_clear_bit() barrier() 22 #define smp_mb__before_clear_bit() barrier()
23 #define smp_mb__after_clear_bit() barrier() 23 #define smp_mb__after_clear_bit() barrier()
24 24
25 /* 25 /*
26 * set bit 26 * set bit
27 */ 27 */
28 #define __set_bit(nr, addr) \ 28 #define __set_bit(nr, addr) \
29 ({ \ 29 ({ \
30 volatile unsigned char *_a = (unsigned char *)(addr); \ 30 volatile unsigned char *_a = (unsigned char *)(addr); \
31 const unsigned shift = (nr) & 7; \ 31 const unsigned shift = (nr) & 7; \
32 _a += (nr) >> 3; \ 32 _a += (nr) >> 3; \
33 \ 33 \
34 asm volatile("bset %2,(%1) # set_bit reg" \ 34 asm volatile("bset %2,(%1) # set_bit reg" \
35 : "=m"(*_a) \ 35 : "=m"(*_a) \
36 : "a"(_a), "d"(1 << shift), "m"(*_a) \ 36 : "a"(_a), "d"(1 << shift), "m"(*_a) \
37 : "memory", "cc"); \ 37 : "memory", "cc"); \
38 }) 38 })
39 39
40 #define set_bit(nr, addr) __set_bit((nr), (addr)) 40 #define set_bit(nr, addr) __set_bit((nr), (addr))
41 41
42 /* 42 /*
43 * clear bit 43 * clear bit
44 */ 44 */
45 #define ___clear_bit(nr, addr) \ 45 #define ___clear_bit(nr, addr) \
46 ({ \ 46 ({ \
47 volatile unsigned char *_a = (unsigned char *)(addr); \ 47 volatile unsigned char *_a = (unsigned char *)(addr); \
48 const unsigned shift = (nr) & 7; \ 48 const unsigned shift = (nr) & 7; \
49 _a += (nr) >> 3; \ 49 _a += (nr) >> 3; \
50 \ 50 \
51 asm volatile("bclr %2,(%1) # clear_bit reg" \ 51 asm volatile("bclr %2,(%1) # clear_bit reg" \
52 : "=m"(*_a) \ 52 : "=m"(*_a) \
53 : "a"(_a), "d"(1 << shift), "m"(*_a) \ 53 : "a"(_a), "d"(1 << shift), "m"(*_a) \
54 : "memory", "cc"); \ 54 : "memory", "cc"); \
55 }) 55 })
56 56
57 #define clear_bit(nr, addr) ___clear_bit((nr), (addr)) 57 #define clear_bit(nr, addr) ___clear_bit((nr), (addr))
58 58
59 59
60 static inline void __clear_bit(int nr, volatile void *addr) 60 static inline void __clear_bit(unsigned long nr, volatile void *addr)
61 { 61 {
62 unsigned int *a = (unsigned int *) addr; 62 unsigned int *a = (unsigned int *) addr;
63 int mask; 63 int mask;
64 64
65 a += nr >> 5; 65 a += nr >> 5;
66 mask = 1 << (nr & 0x1f); 66 mask = 1 << (nr & 0x1f);
67 *a &= ~mask; 67 *a &= ~mask;
68 } 68 }
69 69
70 /* 70 /*
71 * test bit 71 * test bit
72 */ 72 */
73 static inline int test_bit(int nr, const volatile void *addr) 73 static inline int test_bit(unsigned long nr, const volatile void *addr)
74 { 74 {
75 return 1UL & (((const unsigned int *) addr)[nr >> 5] >> (nr & 31)); 75 return 1UL & (((const unsigned int *) addr)[nr >> 5] >> (nr & 31));
76 } 76 }
77 77
78 /* 78 /*
79 * change bit 79 * change bit
80 */ 80 */
81 static inline void __change_bit(int nr, volatile void *addr) 81 static inline void __change_bit(unsigned long nr, volatile void *addr)
82 { 82 {
83 int mask; 83 int mask;
84 unsigned int *a = (unsigned int *) addr; 84 unsigned int *a = (unsigned int *) addr;
85 85
86 a += nr >> 5; 86 a += nr >> 5;
87 mask = 1 << (nr & 0x1f); 87 mask = 1 << (nr & 0x1f);
88 *a ^= mask; 88 *a ^= mask;
89 } 89 }
90 90
91 extern void change_bit(int nr, volatile void *addr); 91 extern void change_bit(unsigned long nr, volatile void *addr);
92 92
93 /* 93 /*
94 * test and set bit 94 * test and set bit
95 */ 95 */
96 #define __test_and_set_bit(nr,addr) \ 96 #define __test_and_set_bit(nr,addr) \
97 ({ \ 97 ({ \
98 volatile unsigned char *_a = (unsigned char *)(addr); \ 98 volatile unsigned char *_a = (unsigned char *)(addr); \
99 const unsigned shift = (nr) & 7; \ 99 const unsigned shift = (nr) & 7; \
100 unsigned epsw; \ 100 unsigned epsw; \
101 _a += (nr) >> 3; \ 101 _a += (nr) >> 3; \
102 \ 102 \
103 asm volatile("bset %3,(%2) # test_set_bit reg\n" \ 103 asm volatile("bset %3,(%2) # test_set_bit reg\n" \
104 "mov epsw,%1" \ 104 "mov epsw,%1" \
105 : "=m"(*_a), "=d"(epsw) \ 105 : "=m"(*_a), "=d"(epsw) \
106 : "a"(_a), "d"(1 << shift), "m"(*_a) \ 106 : "a"(_a), "d"(1 << shift), "m"(*_a) \
107 : "memory", "cc"); \ 107 : "memory", "cc"); \
108 \ 108 \
109 !(epsw & EPSW_FLAG_Z); \ 109 !(epsw & EPSW_FLAG_Z); \
110 }) 110 })
111 111
112 #define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr)) 112 #define test_and_set_bit(nr, addr) __test_and_set_bit((nr), (addr))
113 113
114 /* 114 /*
115 * test and clear bit 115 * test and clear bit
116 */ 116 */
117 #define __test_and_clear_bit(nr, addr) \ 117 #define __test_and_clear_bit(nr, addr) \
118 ({ \ 118 ({ \
119 volatile unsigned char *_a = (unsigned char *)(addr); \ 119 volatile unsigned char *_a = (unsigned char *)(addr); \
120 const unsigned shift = (nr) & 7; \ 120 const unsigned shift = (nr) & 7; \
121 unsigned epsw; \ 121 unsigned epsw; \
122 _a += (nr) >> 3; \ 122 _a += (nr) >> 3; \
123 \ 123 \
124 asm volatile("bclr %3,(%2) # test_clear_bit reg\n" \ 124 asm volatile("bclr %3,(%2) # test_clear_bit reg\n" \
125 "mov epsw,%1" \ 125 "mov epsw,%1" \
126 : "=m"(*_a), "=d"(epsw) \ 126 : "=m"(*_a), "=d"(epsw) \
127 : "a"(_a), "d"(1 << shift), "m"(*_a) \ 127 : "a"(_a), "d"(1 << shift), "m"(*_a) \
128 : "memory", "cc"); \ 128 : "memory", "cc"); \
129 \ 129 \
130 !(epsw & EPSW_FLAG_Z); \ 130 !(epsw & EPSW_FLAG_Z); \
131 }) 131 })
132 132
133 #define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr)) 133 #define test_and_clear_bit(nr, addr) __test_and_clear_bit((nr), (addr))
134 134
135 /* 135 /*
136 * test and change bit 136 * test and change bit
137 */ 137 */
138 static inline int __test_and_change_bit(int nr, volatile void *addr) 138 static inline int __test_and_change_bit(unsigned long nr, volatile void *addr)
139 { 139 {
140 int mask, retval; 140 int mask, retval;
141 unsigned int *a = (unsigned int *)addr; 141 unsigned int *a = (unsigned int *)addr;
142 142
143 a += nr >> 5; 143 a += nr >> 5;
144 mask = 1 << (nr & 0x1f); 144 mask = 1 << (nr & 0x1f);
145 retval = (mask & *a) != 0; 145 retval = (mask & *a) != 0;
146 *a ^= mask; 146 *a ^= mask;
147 147
148 return retval; 148 return retval;
149 } 149 }
150 150
151 extern int test_and_change_bit(int nr, volatile void *addr); 151 extern int test_and_change_bit(unsigned long nr, volatile void *addr);
152 152
153 #include <asm-generic/bitops/lock.h> 153 #include <asm-generic/bitops/lock.h>
154 154
155 #ifdef __KERNEL__ 155 #ifdef __KERNEL__
156 156
157 /** 157 /**
158 * __ffs - find first bit set 158 * __ffs - find first bit set
159 * @x: the word to search 159 * @x: the word to search
160 * 160 *
161 * - return 31..0 to indicate bit 31..0 most least significant bit set 161 * - return 31..0 to indicate bit 31..0 most least significant bit set
162 * - if no bits are set in x, the result is undefined 162 * - if no bits are set in x, the result is undefined
163 */ 163 */
164 static inline __attribute__((const)) 164 static inline __attribute__((const))
165 unsigned long __ffs(unsigned long x) 165 unsigned long __ffs(unsigned long x)
166 { 166 {
167 int bit; 167 int bit;
168 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x) : "cc"); 168 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x) : "cc");
169 return bit; 169 return bit;
170 } 170 }
171 171
172 /* 172 /*
173 * special slimline version of fls() for calculating ilog2_u32() 173 * special slimline version of fls() for calculating ilog2_u32()
174 * - note: no protection against n == 0 174 * - note: no protection against n == 0
175 */ 175 */
176 static inline __attribute__((const)) 176 static inline __attribute__((const))
177 int __ilog2_u32(u32 n) 177 int __ilog2_u32(u32 n)
178 { 178 {
179 int bit; 179 int bit;
180 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n) : "cc"); 180 asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n) : "cc");
181 return bit; 181 return bit;
182 } 182 }
183 183
184 /** 184 /**
185 * fls - find last bit set 185 * fls - find last bit set
186 * @x: the word to search 186 * @x: the word to search
187 * 187 *
188 * This is defined the same way as ffs: 188 * This is defined the same way as ffs:
189 * - return 32..1 to indicate bit 31..0 most significant bit set 189 * - return 32..1 to indicate bit 31..0 most significant bit set
190 * - return 0 to indicate no bits set 190 * - return 0 to indicate no bits set
191 */ 191 */
192 static inline __attribute__((const)) 192 static inline __attribute__((const))
193 int fls(int x) 193 int fls(int x)
194 { 194 {
195 return (x != 0) ? __ilog2_u32(x) + 1 : 0; 195 return (x != 0) ? __ilog2_u32(x) + 1 : 0;
196 } 196 }
197 197
198 /** 198 /**
199 * __fls - find last (most-significant) set bit in a long word 199 * __fls - find last (most-significant) set bit in a long word
200 * @word: the word to search 200 * @word: the word to search
201 * 201 *
202 * Undefined if no set bit exists, so code should check against 0 first. 202 * Undefined if no set bit exists, so code should check against 0 first.
203 */ 203 */
204 static inline unsigned long __fls(unsigned long word) 204 static inline unsigned long __fls(unsigned long word)
205 { 205 {
206 return __ilog2_u32(word); 206 return __ilog2_u32(word);
207 } 207 }
208 208
209 /** 209 /**
210 * ffs - find first bit set 210 * ffs - find first bit set
211 * @x: the word to search 211 * @x: the word to search
212 * 212 *
213 * - return 32..1 to indicate bit 31..0 most least significant bit set 213 * - return 32..1 to indicate bit 31..0 most least significant bit set
214 * - return 0 to indicate no bits set 214 * - return 0 to indicate no bits set
215 */ 215 */
216 static inline __attribute__((const)) 216 static inline __attribute__((const))
217 int ffs(int x) 217 int ffs(int x)
218 { 218 {
219 /* Note: (x & -x) gives us a mask that is the least significant 219 /* Note: (x & -x) gives us a mask that is the least significant
220 * (rightmost) 1-bit of the value in x. 220 * (rightmost) 1-bit of the value in x.
221 */ 221 */
222 return fls(x & -x); 222 return fls(x & -x);
223 } 223 }
224 224
225 #include <asm-generic/bitops/ffz.h> 225 #include <asm-generic/bitops/ffz.h>
226 #include <asm-generic/bitops/fls64.h> 226 #include <asm-generic/bitops/fls64.h>
227 #include <asm-generic/bitops/find.h> 227 #include <asm-generic/bitops/find.h>
228 #include <asm-generic/bitops/sched.h> 228 #include <asm-generic/bitops/sched.h>
229 #include <asm-generic/bitops/hweight.h> 229 #include <asm-generic/bitops/hweight.h>
230 230
231 #define ext2_set_bit_atomic(lock, nr, addr) \ 231 #define ext2_set_bit_atomic(lock, nr, addr) \
232 test_and_set_bit((nr), (addr)) 232 test_and_set_bit((nr), (addr))
233 #define ext2_clear_bit_atomic(lock, nr, addr) \ 233 #define ext2_clear_bit_atomic(lock, nr, addr) \
234 test_and_clear_bit((nr), (addr)) 234 test_and_clear_bit((nr), (addr))
235 235
236 #include <asm-generic/bitops/ext2-non-atomic.h> 236 #include <asm-generic/bitops/ext2-non-atomic.h>
237 #include <asm-generic/bitops/minix-le.h> 237 #include <asm-generic/bitops/minix-le.h>
238 238
239 #endif /* __KERNEL__ */ 239 #endif /* __KERNEL__ */
240 #endif /* __ASM_BITOPS_H */ 240 #endif /* __ASM_BITOPS_H */
241 241
arch/mn10300/lib/bitops.c
Diff comments   View file @ e4acfca
1 /* MN10300 Non-trivial bit operations 1 /* MN10300 Non-trivial bit operations
2 * 2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com) 4 * Written by David Howells (dhowells@redhat.com)
5 * 5 *
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence 7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version 8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version. 9 * 2 of the Licence, or (at your option) any later version.
10 */ 10 */
11 #include <linux/module.h> 11 #include <linux/module.h>
12 #include <asm/bitops.h> 12 #include <asm/bitops.h>
13 #include <asm/system.h> 13 #include <asm/system.h>
14 14
15 /* 15 /*
16 * try flipping a bit using BSET and BCLR 16 * try flipping a bit using BSET and BCLR
17 */ 17 */
18 void change_bit(int nr, volatile void *addr) 18 void change_bit(unsigned long nr, volatile void *addr)
19 { 19 {
20 if (test_bit(nr, addr)) 20 if (test_bit(nr, addr))
21 goto try_clear_bit; 21 goto try_clear_bit;
22 22
23 try_set_bit: 23 try_set_bit:
24 if (!test_and_set_bit(nr, addr)) 24 if (!test_and_set_bit(nr, addr))
25 return; 25 return;
26 26
27 try_clear_bit: 27 try_clear_bit:
28 if (test_and_clear_bit(nr, addr)) 28 if (test_and_clear_bit(nr, addr))
29 return; 29 return;
30 30
31 goto try_set_bit; 31 goto try_set_bit;
32 } 32 }
33 33
34 /* 34 /*
35 * try flipping a bit using BSET and BCLR and returning the old value 35 * try flipping a bit using BSET and BCLR and returning the old value
36 */ 36 */
37 int test_and_change_bit(int nr, volatile void *addr) 37 int test_and_change_bit(unsigned long nr, volatile void *addr)
38 { 38 {
39 if (test_bit(nr, addr)) 39 if (test_bit(nr, addr))
40 goto try_clear_bit; 40 goto try_clear_bit;
41 41
42 try_set_bit: 42 try_set_bit:
43 if (!test_and_set_bit(nr, addr)) 43 if (!test_and_set_bit(nr, addr))
44 return 0; 44 return 0;
45 45
46 try_clear_bit: 46 try_clear_bit:
47 if (test_and_clear_bit(nr, addr)) 47 if (test_and_clear_bit(nr, addr))
48 return 1; 48 return 1;
49 49
50 goto try_set_bit; 50 goto try_set_bit;
51 } 51 }
52 52