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Commit ea6f06f416347448645e60294d92c0c19aba8589

Authored by Kiyoshi Ueda
Committed by Jens Axboe
1 parent 3daeea29f9
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

blk_end_request: changing cpqarray (take 4) 

This patch converts cpqarray to use blk_end_request interfaces.
Related 'ok' arguments are converted to 'error'.

cpqarray is a little bit different from "normal" drivers.
cpqarray directly calls bio_endio() and disk_stat_add()
when completing request.  But those can be replaced with
__end_that_request_first().
After the replacement, request completion procedures of
those drivers become like the following:
    o end_that_request_first()
    o add_disk_randomness()
    o end_that_request_last()
This can be converted to __blk_end_request() by following
the rule (b) mentioned in the patch subject
"[PATCH 01/30] blk_end_request: add new request completion interface".

Cc: Mike Miller <mike.miller@hp.com>
Signed-off-by: Kiyoshi Ueda <k-ueda@ct.jp.nec.com>
Signed-off-by: Jun'ichi Nomura <j-nomura@ce.jp.nec.com>
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>

Showing 1 changed file with 7 additions and 29 deletions Inline Diff

drivers/block/cpqarray.c
Diff comments   View file @ ea6f06f
1 /* 1 /*
2 * Disk Array driver for Compaq SMART2 Controllers 2 * Disk Array driver for Compaq SMART2 Controllers
3 * Copyright 1998 Compaq Computer Corporation 3 * Copyright 1998 Compaq Computer Corporation
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or 7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version. 8 * (at your option) any later version.
9 * 9 *
10 * This program is distributed in the hope that it will be useful, 10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more details. 13 * NON INFRINGEMENT. See the GNU General Public License for more details.
14 * 14 *
15 * You should have received a copy of the GNU General Public License 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software 16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 * 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com 19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 * 20 *
21 */ 21 */
22 #include <linux/module.h> 22 #include <linux/module.h>
23 #include <linux/types.h> 23 #include <linux/types.h>
24 #include <linux/pci.h> 24 #include <linux/pci.h>
25 #include <linux/bio.h> 25 #include <linux/bio.h>
26 #include <linux/interrupt.h> 26 #include <linux/interrupt.h>
27 #include <linux/kernel.h> 27 #include <linux/kernel.h>
28 #include <linux/slab.h> 28 #include <linux/slab.h>
29 #include <linux/delay.h> 29 #include <linux/delay.h>
30 #include <linux/major.h> 30 #include <linux/major.h>
31 #include <linux/fs.h> 31 #include <linux/fs.h>
32 #include <linux/blkpg.h> 32 #include <linux/blkpg.h>
33 #include <linux/timer.h> 33 #include <linux/timer.h>
34 #include <linux/proc_fs.h> 34 #include <linux/proc_fs.h>
35 #include <linux/init.h> 35 #include <linux/init.h>
36 #include <linux/hdreg.h> 36 #include <linux/hdreg.h>
37 #include <linux/spinlock.h> 37 #include <linux/spinlock.h>
38 #include <linux/blkdev.h> 38 #include <linux/blkdev.h>
39 #include <linux/genhd.h> 39 #include <linux/genhd.h>
40 #include <linux/scatterlist.h> 40 #include <linux/scatterlist.h>
41 #include <asm/uaccess.h> 41 #include <asm/uaccess.h>
42 #include <asm/io.h> 42 #include <asm/io.h>
43 43
44 44
45 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin)) 45 #define SMART2_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
46 46
47 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)" 47 #define DRIVER_NAME "Compaq SMART2 Driver (v 2.6.0)"
48 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0) 48 #define DRIVER_VERSION SMART2_DRIVER_VERSION(2,6,0)
49 49
50 /* Embedded module documentation macros - see modules.h */ 50 /* Embedded module documentation macros - see modules.h */
51 /* Original author Chris Frantz - Compaq Computer Corporation */ 51 /* Original author Chris Frantz - Compaq Computer Corporation */
52 MODULE_AUTHOR("Compaq Computer Corporation"); 52 MODULE_AUTHOR("Compaq Computer Corporation");
53 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0"); 53 MODULE_DESCRIPTION("Driver for Compaq Smart2 Array Controllers version 2.6.0");
54 MODULE_LICENSE("GPL"); 54 MODULE_LICENSE("GPL");
55 55
56 #include "cpqarray.h" 56 #include "cpqarray.h"
57 #include "ida_cmd.h" 57 #include "ida_cmd.h"
58 #include "smart1,2.h" 58 #include "smart1,2.h"
59 #include "ida_ioctl.h" 59 #include "ida_ioctl.h"
60 60
61 #define READ_AHEAD 128 61 #define READ_AHEAD 128
62 #define NR_CMDS 128 /* This could probably go as high as ~400 */ 62 #define NR_CMDS 128 /* This could probably go as high as ~400 */
63 63
64 #define MAX_CTLR 8 64 #define MAX_CTLR 8
65 #define CTLR_SHIFT 8 65 #define CTLR_SHIFT 8
66 66
67 #define CPQARRAY_DMA_MASK 0xFFFFFFFF /* 32 bit DMA */ 67 #define CPQARRAY_DMA_MASK 0xFFFFFFFF /* 32 bit DMA */
68 68
69 static int nr_ctlr; 69 static int nr_ctlr;
70 static ctlr_info_t *hba[MAX_CTLR]; 70 static ctlr_info_t *hba[MAX_CTLR];
71 71
72 static int eisa[8]; 72 static int eisa[8];
73 73
74 #define NR_PRODUCTS ARRAY_SIZE(products) 74 #define NR_PRODUCTS ARRAY_SIZE(products)
75 75
76 /* board_id = Subsystem Device ID & Vendor ID 76 /* board_id = Subsystem Device ID & Vendor ID
77 * product = Marketing Name for the board 77 * product = Marketing Name for the board
78 * access = Address of the struct of function pointers 78 * access = Address of the struct of function pointers
79 */ 79 */
80 static struct board_type products[] = { 80 static struct board_type products[] = {
81 { 0x0040110E, "IDA", &smart1_access }, 81 { 0x0040110E, "IDA", &smart1_access },
82 { 0x0140110E, "IDA-2", &smart1_access }, 82 { 0x0140110E, "IDA-2", &smart1_access },
83 { 0x1040110E, "IAES", &smart1_access }, 83 { 0x1040110E, "IAES", &smart1_access },
84 { 0x2040110E, "SMART", &smart1_access }, 84 { 0x2040110E, "SMART", &smart1_access },
85 { 0x3040110E, "SMART-2/E", &smart2e_access }, 85 { 0x3040110E, "SMART-2/E", &smart2e_access },
86 { 0x40300E11, "SMART-2/P", &smart2_access }, 86 { 0x40300E11, "SMART-2/P", &smart2_access },
87 { 0x40310E11, "SMART-2SL", &smart2_access }, 87 { 0x40310E11, "SMART-2SL", &smart2_access },
88 { 0x40320E11, "Smart Array 3200", &smart2_access }, 88 { 0x40320E11, "Smart Array 3200", &smart2_access },
89 { 0x40330E11, "Smart Array 3100ES", &smart2_access }, 89 { 0x40330E11, "Smart Array 3100ES", &smart2_access },
90 { 0x40340E11, "Smart Array 221", &smart2_access }, 90 { 0x40340E11, "Smart Array 221", &smart2_access },
91 { 0x40400E11, "Integrated Array", &smart4_access }, 91 { 0x40400E11, "Integrated Array", &smart4_access },
92 { 0x40480E11, "Compaq Raid LC2", &smart4_access }, 92 { 0x40480E11, "Compaq Raid LC2", &smart4_access },
93 { 0x40500E11, "Smart Array 4200", &smart4_access }, 93 { 0x40500E11, "Smart Array 4200", &smart4_access },
94 { 0x40510E11, "Smart Array 4250ES", &smart4_access }, 94 { 0x40510E11, "Smart Array 4250ES", &smart4_access },
95 { 0x40580E11, "Smart Array 431", &smart4_access }, 95 { 0x40580E11, "Smart Array 431", &smart4_access },
96 }; 96 };
97 97
98 /* define the PCI info for the PCI cards this driver can control */ 98 /* define the PCI info for the PCI cards this driver can control */
99 static const struct pci_device_id cpqarray_pci_device_id[] = 99 static const struct pci_device_id cpqarray_pci_device_id[] =
100 { 100 {
101 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX, 101 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
102 0x0E11, 0x4058, 0, 0, 0}, /* SA431 */ 102 0x0E11, 0x4058, 0, 0, 0}, /* SA431 */
103 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX, 103 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
104 0x0E11, 0x4051, 0, 0, 0}, /* SA4250ES */ 104 0x0E11, 0x4051, 0, 0, 0}, /* SA4250ES */
105 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX, 105 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_COMPAQ_42XX,
106 0x0E11, 0x4050, 0, 0, 0}, /* SA4200 */ 106 0x0E11, 0x4050, 0, 0, 0}, /* SA4200 */
107 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510, 107 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
108 0x0E11, 0x4048, 0, 0, 0}, /* LC2 */ 108 0x0E11, 0x4048, 0, 0, 0}, /* LC2 */
109 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510, 109 { PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C1510,
110 0x0E11, 0x4040, 0, 0, 0}, /* Integrated Array */ 110 0x0E11, 0x4040, 0, 0, 0}, /* Integrated Array */
111 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P, 111 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
112 0x0E11, 0x4034, 0, 0, 0}, /* SA 221 */ 112 0x0E11, 0x4034, 0, 0, 0}, /* SA 221 */
113 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P, 113 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
114 0x0E11, 0x4033, 0, 0, 0}, /* SA 3100ES*/ 114 0x0E11, 0x4033, 0, 0, 0}, /* SA 3100ES*/
115 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P, 115 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
116 0x0E11, 0x4032, 0, 0, 0}, /* SA 3200*/ 116 0x0E11, 0x4032, 0, 0, 0}, /* SA 3200*/
117 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P, 117 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
118 0x0E11, 0x4031, 0, 0, 0}, /* SA 2SL*/ 118 0x0E11, 0x4031, 0, 0, 0}, /* SA 2SL*/
119 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P, 119 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_SMART2P,
120 0x0E11, 0x4030, 0, 0, 0}, /* SA 2P */ 120 0x0E11, 0x4030, 0, 0, 0}, /* SA 2P */
121 { 0 } 121 { 0 }
122 }; 122 };
123 123
124 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id); 124 MODULE_DEVICE_TABLE(pci, cpqarray_pci_device_id);
125 125
126 static struct gendisk *ida_gendisk[MAX_CTLR][NWD]; 126 static struct gendisk *ida_gendisk[MAX_CTLR][NWD];
127 127
128 /* Debug... */ 128 /* Debug... */
129 #define DBG(s) do { s } while(0) 129 #define DBG(s) do { s } while(0)
130 /* Debug (general info)... */ 130 /* Debug (general info)... */
131 #define DBGINFO(s) do { } while(0) 131 #define DBGINFO(s) do { } while(0)
132 /* Debug Paranoid... */ 132 /* Debug Paranoid... */
133 #define DBGP(s) do { } while(0) 133 #define DBGP(s) do { } while(0)
134 /* Debug Extra Paranoid... */ 134 /* Debug Extra Paranoid... */
135 #define DBGPX(s) do { } while(0) 135 #define DBGPX(s) do { } while(0)
136 136
137 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev); 137 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev);
138 static void __iomem *remap_pci_mem(ulong base, ulong size); 138 static void __iomem *remap_pci_mem(ulong base, ulong size);
139 static int cpqarray_eisa_detect(void); 139 static int cpqarray_eisa_detect(void);
140 static int pollcomplete(int ctlr); 140 static int pollcomplete(int ctlr);
141 static void getgeometry(int ctlr); 141 static void getgeometry(int ctlr);
142 static void start_fwbk(int ctlr); 142 static void start_fwbk(int ctlr);
143 143
144 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool); 144 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool);
145 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool); 145 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool);
146 146
147 static void free_hba(int i); 147 static void free_hba(int i);
148 static int alloc_cpqarray_hba(void); 148 static int alloc_cpqarray_hba(void);
149 149
150 static int sendcmd( 150 static int sendcmd(
151 __u8 cmd, 151 __u8 cmd,
152 int ctlr, 152 int ctlr,
153 void *buff, 153 void *buff,
154 size_t size, 154 size_t size,
155 unsigned int blk, 155 unsigned int blk,
156 unsigned int blkcnt, 156 unsigned int blkcnt,
157 unsigned int log_unit ); 157 unsigned int log_unit );
158 158
159 static int ida_open(struct inode *inode, struct file *filep); 159 static int ida_open(struct inode *inode, struct file *filep);
160 static int ida_release(struct inode *inode, struct file *filep); 160 static int ida_release(struct inode *inode, struct file *filep);
161 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg); 161 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
162 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo); 162 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo);
163 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io); 163 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io);
164 164
165 static void do_ida_request(struct request_queue *q); 165 static void do_ida_request(struct request_queue *q);
166 static void start_io(ctlr_info_t *h); 166 static void start_io(ctlr_info_t *h);
167 167
168 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c); 168 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c);
169 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c); 169 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c);
170 static inline void complete_buffers(struct bio *bio, int ok);
171 static inline void complete_command(cmdlist_t *cmd, int timeout); 170 static inline void complete_command(cmdlist_t *cmd, int timeout);
172 171
173 static irqreturn_t do_ida_intr(int irq, void *dev_id); 172 static irqreturn_t do_ida_intr(int irq, void *dev_id);
174 static void ida_timer(unsigned long tdata); 173 static void ida_timer(unsigned long tdata);
175 static int ida_revalidate(struct gendisk *disk); 174 static int ida_revalidate(struct gendisk *disk);
176 static int revalidate_allvol(ctlr_info_t *host); 175 static int revalidate_allvol(ctlr_info_t *host);
177 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev); 176 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
178 177
179 #ifdef CONFIG_PROC_FS 178 #ifdef CONFIG_PROC_FS
180 static void ida_procinit(int i); 179 static void ida_procinit(int i);
181 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data); 180 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data);
182 #else 181 #else
183 static void ida_procinit(int i) {} 182 static void ida_procinit(int i) {}
184 #endif 183 #endif
185 184
186 static inline drv_info_t *get_drv(struct gendisk *disk) 185 static inline drv_info_t *get_drv(struct gendisk *disk)
187 { 186 {
188 return disk->private_data; 187 return disk->private_data;
189 } 188 }
190 189
191 static inline ctlr_info_t *get_host(struct gendisk *disk) 190 static inline ctlr_info_t *get_host(struct gendisk *disk)
192 { 191 {
193 return disk->queue->queuedata; 192 return disk->queue->queuedata;
194 } 193 }
195 194
196 195
197 static struct block_device_operations ida_fops = { 196 static struct block_device_operations ida_fops = {
198 .owner = THIS_MODULE, 197 .owner = THIS_MODULE,
199 .open = ida_open, 198 .open = ida_open,
200 .release = ida_release, 199 .release = ida_release,
201 .ioctl = ida_ioctl, 200 .ioctl = ida_ioctl,
202 .getgeo = ida_getgeo, 201 .getgeo = ida_getgeo,
203 .revalidate_disk= ida_revalidate, 202 .revalidate_disk= ida_revalidate,
204 }; 203 };
205 204
206 205
207 #ifdef CONFIG_PROC_FS 206 #ifdef CONFIG_PROC_FS
208 207
209 static struct proc_dir_entry *proc_array; 208 static struct proc_dir_entry *proc_array;
210 209
211 /* 210 /*
212 * Get us a file in /proc/array that says something about each controller. 211 * Get us a file in /proc/array that says something about each controller.
213 * Create /proc/array if it doesn't exist yet. 212 * Create /proc/array if it doesn't exist yet.
214 */ 213 */
215 static void __init ida_procinit(int i) 214 static void __init ida_procinit(int i)
216 { 215 {
217 if (proc_array == NULL) { 216 if (proc_array == NULL) {
218 proc_array = proc_mkdir("cpqarray", proc_root_driver); 217 proc_array = proc_mkdir("cpqarray", proc_root_driver);
219 if (!proc_array) return; 218 if (!proc_array) return;
220 } 219 }
221 220
222 create_proc_read_entry(hba[i]->devname, 0, proc_array, 221 create_proc_read_entry(hba[i]->devname, 0, proc_array,
223 ida_proc_get_info, hba[i]); 222 ida_proc_get_info, hba[i]);
224 } 223 }
225 224
226 /* 225 /*
227 * Report information about this controller. 226 * Report information about this controller.
228 */ 227 */
229 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data) 228 static int ida_proc_get_info(char *buffer, char **start, off_t offset, int length, int *eof, void *data)
230 { 229 {
231 off_t pos = 0; 230 off_t pos = 0;
232 off_t len = 0; 231 off_t len = 0;
233 int size, i, ctlr; 232 int size, i, ctlr;
234 ctlr_info_t *h = (ctlr_info_t*)data; 233 ctlr_info_t *h = (ctlr_info_t*)data;
235 drv_info_t *drv; 234 drv_info_t *drv;
236 #ifdef CPQ_PROC_PRINT_QUEUES 235 #ifdef CPQ_PROC_PRINT_QUEUES
237 cmdlist_t *c; 236 cmdlist_t *c;
238 unsigned long flags; 237 unsigned long flags;
239 #endif 238 #endif
240 239
241 ctlr = h->ctlr; 240 ctlr = h->ctlr;
242 size = sprintf(buffer, "%s: Compaq %s Controller\n" 241 size = sprintf(buffer, "%s: Compaq %s Controller\n"
243 " Board ID: 0x%08lx\n" 242 " Board ID: 0x%08lx\n"
244 " Firmware Revision: %c%c%c%c\n" 243 " Firmware Revision: %c%c%c%c\n"
245 " Controller Sig: 0x%08lx\n" 244 " Controller Sig: 0x%08lx\n"
246 " Memory Address: 0x%08lx\n" 245 " Memory Address: 0x%08lx\n"
247 " I/O Port: 0x%04x\n" 246 " I/O Port: 0x%04x\n"
248 " IRQ: %d\n" 247 " IRQ: %d\n"
249 " Logical drives: %d\n" 248 " Logical drives: %d\n"
250 " Physical drives: %d\n\n" 249 " Physical drives: %d\n\n"
251 " Current Q depth: %d\n" 250 " Current Q depth: %d\n"
252 " Max Q depth since init: %d\n\n", 251 " Max Q depth since init: %d\n\n",
253 h->devname, 252 h->devname,
254 h->product_name, 253 h->product_name,
255 (unsigned long)h->board_id, 254 (unsigned long)h->board_id,
256 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3], 255 h->firm_rev[0], h->firm_rev[1], h->firm_rev[2], h->firm_rev[3],
257 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr, 256 (unsigned long)h->ctlr_sig, (unsigned long)h->vaddr,
258 (unsigned int) h->io_mem_addr, (unsigned int)h->intr, 257 (unsigned int) h->io_mem_addr, (unsigned int)h->intr,
259 h->log_drives, h->phys_drives, 258 h->log_drives, h->phys_drives,
260 h->Qdepth, h->maxQsinceinit); 259 h->Qdepth, h->maxQsinceinit);
261 260
262 pos += size; len += size; 261 pos += size; len += size;
263 262
264 size = sprintf(buffer+len, "Logical Drive Info:\n"); 263 size = sprintf(buffer+len, "Logical Drive Info:\n");
265 pos += size; len += size; 264 pos += size; len += size;
266 265
267 for(i=0; i<h->log_drives; i++) { 266 for(i=0; i<h->log_drives; i++) {
268 drv = &h->drv[i]; 267 drv = &h->drv[i];
269 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n", 268 size = sprintf(buffer+len, "ida/c%dd%d: blksz=%d nr_blks=%d\n",
270 ctlr, i, drv->blk_size, drv->nr_blks); 269 ctlr, i, drv->blk_size, drv->nr_blks);
271 pos += size; len += size; 270 pos += size; len += size;
272 } 271 }
273 272
274 #ifdef CPQ_PROC_PRINT_QUEUES 273 #ifdef CPQ_PROC_PRINT_QUEUES
275 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags); 274 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
276 size = sprintf(buffer+len, "\nCurrent Queues:\n"); 275 size = sprintf(buffer+len, "\nCurrent Queues:\n");
277 pos += size; len += size; 276 pos += size; len += size;
278 277
279 c = h->reqQ; 278 c = h->reqQ;
280 size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size; 279 size = sprintf(buffer+len, "reqQ = %p", c); pos += size; len += size;
281 if (c) c=c->next; 280 if (c) c=c->next;
282 while(c && c != h->reqQ) { 281 while(c && c != h->reqQ) {
283 size = sprintf(buffer+len, "->%p", c); 282 size = sprintf(buffer+len, "->%p", c);
284 pos += size; len += size; 283 pos += size; len += size;
285 c=c->next; 284 c=c->next;
286 } 285 }
287 286
288 c = h->cmpQ; 287 c = h->cmpQ;
289 size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size; 288 size = sprintf(buffer+len, "\ncmpQ = %p", c); pos += size; len += size;
290 if (c) c=c->next; 289 if (c) c=c->next;
291 while(c && c != h->cmpQ) { 290 while(c && c != h->cmpQ) {
292 size = sprintf(buffer+len, "->%p", c); 291 size = sprintf(buffer+len, "->%p", c);
293 pos += size; len += size; 292 pos += size; len += size;
294 c=c->next; 293 c=c->next;
295 } 294 }
296 295
297 size = sprintf(buffer+len, "\n"); pos += size; len += size; 296 size = sprintf(buffer+len, "\n"); pos += size; len += size;
298 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags); 297 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
299 #endif 298 #endif
300 size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n", 299 size = sprintf(buffer+len, "nr_allocs = %d\nnr_frees = %d\n",
301 h->nr_allocs, h->nr_frees); 300 h->nr_allocs, h->nr_frees);
302 pos += size; len += size; 301 pos += size; len += size;
303 302
304 *eof = 1; 303 *eof = 1;
305 *start = buffer+offset; 304 *start = buffer+offset;
306 len -= offset; 305 len -= offset;
307 if (len>length) 306 if (len>length)
308 len = length; 307 len = length;
309 return len; 308 return len;
310 } 309 }
311 #endif /* CONFIG_PROC_FS */ 310 #endif /* CONFIG_PROC_FS */
312 311
313 module_param_array(eisa, int, NULL, 0); 312 module_param_array(eisa, int, NULL, 0);
314 313
315 static void release_io_mem(ctlr_info_t *c) 314 static void release_io_mem(ctlr_info_t *c)
316 { 315 {
317 /* if IO mem was not protected do nothing */ 316 /* if IO mem was not protected do nothing */
318 if( c->io_mem_addr == 0) 317 if( c->io_mem_addr == 0)
319 return; 318 return;
320 release_region(c->io_mem_addr, c->io_mem_length); 319 release_region(c->io_mem_addr, c->io_mem_length);
321 c->io_mem_addr = 0; 320 c->io_mem_addr = 0;
322 c->io_mem_length = 0; 321 c->io_mem_length = 0;
323 } 322 }
324 323
325 static void __devexit cpqarray_remove_one(int i) 324 static void __devexit cpqarray_remove_one(int i)
326 { 325 {
327 int j; 326 int j;
328 char buff[4]; 327 char buff[4];
329 328
330 /* sendcmd will turn off interrupt, and send the flush... 329 /* sendcmd will turn off interrupt, and send the flush...
331 * To write all data in the battery backed cache to disks 330 * To write all data in the battery backed cache to disks
332 * no data returned, but don't want to send NULL to sendcmd */ 331 * no data returned, but don't want to send NULL to sendcmd */
333 if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0)) 332 if( sendcmd(FLUSH_CACHE, i, buff, 4, 0, 0, 0))
334 { 333 {
335 printk(KERN_WARNING "Unable to flush cache on controller %d\n", 334 printk(KERN_WARNING "Unable to flush cache on controller %d\n",
336 i); 335 i);
337 } 336 }
338 free_irq(hba[i]->intr, hba[i]); 337 free_irq(hba[i]->intr, hba[i]);
339 iounmap(hba[i]->vaddr); 338 iounmap(hba[i]->vaddr);
340 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname); 339 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
341 del_timer(&hba[i]->timer); 340 del_timer(&hba[i]->timer);
342 remove_proc_entry(hba[i]->devname, proc_array); 341 remove_proc_entry(hba[i]->devname, proc_array);
343 pci_free_consistent(hba[i]->pci_dev, 342 pci_free_consistent(hba[i]->pci_dev,
344 NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool), 343 NR_CMDS * sizeof(cmdlist_t), (hba[i]->cmd_pool),
345 hba[i]->cmd_pool_dhandle); 344 hba[i]->cmd_pool_dhandle);
346 kfree(hba[i]->cmd_pool_bits); 345 kfree(hba[i]->cmd_pool_bits);
347 for(j = 0; j < NWD; j++) { 346 for(j = 0; j < NWD; j++) {
348 if (ida_gendisk[i][j]->flags & GENHD_FL_UP) 347 if (ida_gendisk[i][j]->flags & GENHD_FL_UP)
349 del_gendisk(ida_gendisk[i][j]); 348 del_gendisk(ida_gendisk[i][j]);
350 put_disk(ida_gendisk[i][j]); 349 put_disk(ida_gendisk[i][j]);
351 } 350 }
352 blk_cleanup_queue(hba[i]->queue); 351 blk_cleanup_queue(hba[i]->queue);
353 release_io_mem(hba[i]); 352 release_io_mem(hba[i]);
354 free_hba(i); 353 free_hba(i);
355 } 354 }
356 355
357 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev) 356 static void __devexit cpqarray_remove_one_pci (struct pci_dev *pdev)
358 { 357 {
359 int i; 358 int i;
360 ctlr_info_t *tmp_ptr; 359 ctlr_info_t *tmp_ptr;
361 360
362 if (pci_get_drvdata(pdev) == NULL) { 361 if (pci_get_drvdata(pdev) == NULL) {
363 printk( KERN_ERR "cpqarray: Unable to remove device \n"); 362 printk( KERN_ERR "cpqarray: Unable to remove device \n");
364 return; 363 return;
365 } 364 }
366 365
367 tmp_ptr = pci_get_drvdata(pdev); 366 tmp_ptr = pci_get_drvdata(pdev);
368 i = tmp_ptr->ctlr; 367 i = tmp_ptr->ctlr;
369 if (hba[i] == NULL) { 368 if (hba[i] == NULL) {
370 printk(KERN_ERR "cpqarray: controller %d appears to have" 369 printk(KERN_ERR "cpqarray: controller %d appears to have"
371 "already been removed \n", i); 370 "already been removed \n", i);
372 return; 371 return;
373 } 372 }
374 pci_set_drvdata(pdev, NULL); 373 pci_set_drvdata(pdev, NULL);
375 374
376 cpqarray_remove_one(i); 375 cpqarray_remove_one(i);
377 } 376 }
378 377
379 /* removing an instance that was not removed automatically.. 378 /* removing an instance that was not removed automatically..
380 * must be an eisa card. 379 * must be an eisa card.
381 */ 380 */
382 static void __devexit cpqarray_remove_one_eisa (int i) 381 static void __devexit cpqarray_remove_one_eisa (int i)
383 { 382 {
384 if (hba[i] == NULL) { 383 if (hba[i] == NULL) {
385 printk(KERN_ERR "cpqarray: controller %d appears to have" 384 printk(KERN_ERR "cpqarray: controller %d appears to have"
386 "already been removed \n", i); 385 "already been removed \n", i);
387 return; 386 return;
388 } 387 }
389 cpqarray_remove_one(i); 388 cpqarray_remove_one(i);
390 } 389 }
391 390
392 /* pdev is NULL for eisa */ 391 /* pdev is NULL for eisa */
393 static int __init cpqarray_register_ctlr( int i, struct pci_dev *pdev) 392 static int __init cpqarray_register_ctlr( int i, struct pci_dev *pdev)
394 { 393 {
395 struct request_queue *q; 394 struct request_queue *q;
396 int j; 395 int j;
397 396
398 /* 397 /*
399 * register block devices 398 * register block devices
400 * Find disks and fill in structs 399 * Find disks and fill in structs
401 * Get an interrupt, set the Q depth and get into /proc 400 * Get an interrupt, set the Q depth and get into /proc
402 */ 401 */
403 402
404 /* If this successful it should insure that we are the only */ 403 /* If this successful it should insure that we are the only */
405 /* instance of the driver */ 404 /* instance of the driver */
406 if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) { 405 if (register_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname)) {
407 goto Enomem4; 406 goto Enomem4;
408 } 407 }
409 hba[i]->access.set_intr_mask(hba[i], 0); 408 hba[i]->access.set_intr_mask(hba[i], 0);
410 if (request_irq(hba[i]->intr, do_ida_intr, 409 if (request_irq(hba[i]->intr, do_ida_intr,
411 IRQF_DISABLED|IRQF_SHARED, hba[i]->devname, hba[i])) 410 IRQF_DISABLED|IRQF_SHARED, hba[i]->devname, hba[i]))
412 { 411 {
413 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n", 412 printk(KERN_ERR "cpqarray: Unable to get irq %d for %s\n",
414 hba[i]->intr, hba[i]->devname); 413 hba[i]->intr, hba[i]->devname);
415 goto Enomem3; 414 goto Enomem3;
416 } 415 }
417 416
418 for (j=0; j<NWD; j++) { 417 for (j=0; j<NWD; j++) {
419 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT); 418 ida_gendisk[i][j] = alloc_disk(1 << NWD_SHIFT);
420 if (!ida_gendisk[i][j]) 419 if (!ida_gendisk[i][j])
421 goto Enomem2; 420 goto Enomem2;
422 } 421 }
423 422
424 hba[i]->cmd_pool = pci_alloc_consistent( 423 hba[i]->cmd_pool = pci_alloc_consistent(
425 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t), 424 hba[i]->pci_dev, NR_CMDS * sizeof(cmdlist_t),
426 &(hba[i]->cmd_pool_dhandle)); 425 &(hba[i]->cmd_pool_dhandle));
427 hba[i]->cmd_pool_bits = kcalloc( 426 hba[i]->cmd_pool_bits = kcalloc(
428 (NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG, sizeof(unsigned long), 427 (NR_CMDS+BITS_PER_LONG-1)/BITS_PER_LONG, sizeof(unsigned long),
429 GFP_KERNEL); 428 GFP_KERNEL);
430 429
431 if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool) 430 if (!hba[i]->cmd_pool_bits || !hba[i]->cmd_pool)
432 goto Enomem1; 431 goto Enomem1;
433 432
434 memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t)); 433 memset(hba[i]->cmd_pool, 0, NR_CMDS * sizeof(cmdlist_t));
435 printk(KERN_INFO "cpqarray: Finding drives on %s", 434 printk(KERN_INFO "cpqarray: Finding drives on %s",
436 hba[i]->devname); 435 hba[i]->devname);
437 436
438 spin_lock_init(&hba[i]->lock); 437 spin_lock_init(&hba[i]->lock);
439 q = blk_init_queue(do_ida_request, &hba[i]->lock); 438 q = blk_init_queue(do_ida_request, &hba[i]->lock);
440 if (!q) 439 if (!q)
441 goto Enomem1; 440 goto Enomem1;
442 441
443 hba[i]->queue = q; 442 hba[i]->queue = q;
444 q->queuedata = hba[i]; 443 q->queuedata = hba[i];
445 444
446 getgeometry(i); 445 getgeometry(i);
447 start_fwbk(i); 446 start_fwbk(i);
448 447
449 ida_procinit(i); 448 ida_procinit(i);
450 449
451 if (pdev) 450 if (pdev)
452 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask); 451 blk_queue_bounce_limit(q, hba[i]->pci_dev->dma_mask);
453 452
454 /* This is a hardware imposed limit. */ 453 /* This is a hardware imposed limit. */
455 blk_queue_max_hw_segments(q, SG_MAX); 454 blk_queue_max_hw_segments(q, SG_MAX);
456 455
457 /* This is a driver limit and could be eliminated. */ 456 /* This is a driver limit and could be eliminated. */
458 blk_queue_max_phys_segments(q, SG_MAX); 457 blk_queue_max_phys_segments(q, SG_MAX);
459 458
460 init_timer(&hba[i]->timer); 459 init_timer(&hba[i]->timer);
461 hba[i]->timer.expires = jiffies + IDA_TIMER; 460 hba[i]->timer.expires = jiffies + IDA_TIMER;
462 hba[i]->timer.data = (unsigned long)hba[i]; 461 hba[i]->timer.data = (unsigned long)hba[i];
463 hba[i]->timer.function = ida_timer; 462 hba[i]->timer.function = ida_timer;
464 add_timer(&hba[i]->timer); 463 add_timer(&hba[i]->timer);
465 464
466 /* Enable IRQ now that spinlock and rate limit timer are set up */ 465 /* Enable IRQ now that spinlock and rate limit timer are set up */
467 hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY); 466 hba[i]->access.set_intr_mask(hba[i], FIFO_NOT_EMPTY);
468 467
469 for(j=0; j<NWD; j++) { 468 for(j=0; j<NWD; j++) {
470 struct gendisk *disk = ida_gendisk[i][j]; 469 struct gendisk *disk = ida_gendisk[i][j];
471 drv_info_t *drv = &hba[i]->drv[j]; 470 drv_info_t *drv = &hba[i]->drv[j];
472 sprintf(disk->disk_name, "ida/c%dd%d", i, j); 471 sprintf(disk->disk_name, "ida/c%dd%d", i, j);
473 disk->major = COMPAQ_SMART2_MAJOR + i; 472 disk->major = COMPAQ_SMART2_MAJOR + i;
474 disk->first_minor = j<<NWD_SHIFT; 473 disk->first_minor = j<<NWD_SHIFT;
475 disk->fops = &ida_fops; 474 disk->fops = &ida_fops;
476 if (j && !drv->nr_blks) 475 if (j && !drv->nr_blks)
477 continue; 476 continue;
478 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size); 477 blk_queue_hardsect_size(hba[i]->queue, drv->blk_size);
479 set_capacity(disk, drv->nr_blks); 478 set_capacity(disk, drv->nr_blks);
480 disk->queue = hba[i]->queue; 479 disk->queue = hba[i]->queue;
481 disk->private_data = drv; 480 disk->private_data = drv;
482 add_disk(disk); 481 add_disk(disk);
483 } 482 }
484 483
485 /* done ! */ 484 /* done ! */
486 return(i); 485 return(i);
487 486
488 Enomem1: 487 Enomem1:
489 nr_ctlr = i; 488 nr_ctlr = i;
490 kfree(hba[i]->cmd_pool_bits); 489 kfree(hba[i]->cmd_pool_bits);
491 if (hba[i]->cmd_pool) 490 if (hba[i]->cmd_pool)
492 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t), 491 pci_free_consistent(hba[i]->pci_dev, NR_CMDS*sizeof(cmdlist_t),
493 hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle); 492 hba[i]->cmd_pool, hba[i]->cmd_pool_dhandle);
494 Enomem2: 493 Enomem2:
495 while (j--) { 494 while (j--) {
496 put_disk(ida_gendisk[i][j]); 495 put_disk(ida_gendisk[i][j]);
497 ida_gendisk[i][j] = NULL; 496 ida_gendisk[i][j] = NULL;
498 } 497 }
499 free_irq(hba[i]->intr, hba[i]); 498 free_irq(hba[i]->intr, hba[i]);
500 Enomem3: 499 Enomem3:
501 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname); 500 unregister_blkdev(COMPAQ_SMART2_MAJOR+i, hba[i]->devname);
502 Enomem4: 501 Enomem4:
503 if (pdev) 502 if (pdev)
504 pci_set_drvdata(pdev, NULL); 503 pci_set_drvdata(pdev, NULL);
505 release_io_mem(hba[i]); 504 release_io_mem(hba[i]);
506 free_hba(i); 505 free_hba(i);
507 506
508 printk( KERN_ERR "cpqarray: out of memory"); 507 printk( KERN_ERR "cpqarray: out of memory");
509 508
510 return -1; 509 return -1;
511 } 510 }
512 511
513 static int __init cpqarray_init_one( struct pci_dev *pdev, 512 static int __init cpqarray_init_one( struct pci_dev *pdev,
514 const struct pci_device_id *ent) 513 const struct pci_device_id *ent)
515 { 514 {
516 int i; 515 int i;
517 516
518 printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at" 517 printk(KERN_DEBUG "cpqarray: Device 0x%x has been found at"
519 " bus %d dev %d func %d\n", 518 " bus %d dev %d func %d\n",
520 pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn), 519 pdev->device, pdev->bus->number, PCI_SLOT(pdev->devfn),
521 PCI_FUNC(pdev->devfn)); 520 PCI_FUNC(pdev->devfn));
522 i = alloc_cpqarray_hba(); 521 i = alloc_cpqarray_hba();
523 if( i < 0 ) 522 if( i < 0 )
524 return (-1); 523 return (-1);
525 memset(hba[i], 0, sizeof(ctlr_info_t)); 524 memset(hba[i], 0, sizeof(ctlr_info_t));
526 sprintf(hba[i]->devname, "ida%d", i); 525 sprintf(hba[i]->devname, "ida%d", i);
527 hba[i]->ctlr = i; 526 hba[i]->ctlr = i;
528 /* Initialize the pdev driver private data */ 527 /* Initialize the pdev driver private data */
529 pci_set_drvdata(pdev, hba[i]); 528 pci_set_drvdata(pdev, hba[i]);
530 529
531 if (cpqarray_pci_init(hba[i], pdev) != 0) { 530 if (cpqarray_pci_init(hba[i], pdev) != 0) {
532 pci_set_drvdata(pdev, NULL); 531 pci_set_drvdata(pdev, NULL);
533 release_io_mem(hba[i]); 532 release_io_mem(hba[i]);
534 free_hba(i); 533 free_hba(i);
535 return -1; 534 return -1;
536 } 535 }
537 536
538 return (cpqarray_register_ctlr(i, pdev)); 537 return (cpqarray_register_ctlr(i, pdev));
539 } 538 }
540 539
541 static struct pci_driver cpqarray_pci_driver = { 540 static struct pci_driver cpqarray_pci_driver = {
542 .name = "cpqarray", 541 .name = "cpqarray",
543 .probe = cpqarray_init_one, 542 .probe = cpqarray_init_one,
544 .remove = __devexit_p(cpqarray_remove_one_pci), 543 .remove = __devexit_p(cpqarray_remove_one_pci),
545 .id_table = cpqarray_pci_device_id, 544 .id_table = cpqarray_pci_device_id,
546 }; 545 };
547 546
548 /* 547 /*
549 * This is it. Find all the controllers and register them. 548 * This is it. Find all the controllers and register them.
550 * returns the number of block devices registered. 549 * returns the number of block devices registered.
551 */ 550 */
552 static int __init cpqarray_init(void) 551 static int __init cpqarray_init(void)
553 { 552 {
554 int num_cntlrs_reg = 0; 553 int num_cntlrs_reg = 0;
555 int i; 554 int i;
556 int rc = 0; 555 int rc = 0;
557 556
558 /* detect controllers */ 557 /* detect controllers */
559 printk(DRIVER_NAME "\n"); 558 printk(DRIVER_NAME "\n");
560 559
561 rc = pci_register_driver(&cpqarray_pci_driver); 560 rc = pci_register_driver(&cpqarray_pci_driver);
562 if (rc) 561 if (rc)
563 return rc; 562 return rc;
564 cpqarray_eisa_detect(); 563 cpqarray_eisa_detect();
565 564
566 for (i=0; i < MAX_CTLR; i++) { 565 for (i=0; i < MAX_CTLR; i++) {
567 if (hba[i] != NULL) 566 if (hba[i] != NULL)
568 num_cntlrs_reg++; 567 num_cntlrs_reg++;
569 } 568 }
570 569
571 return(num_cntlrs_reg); 570 return(num_cntlrs_reg);
572 } 571 }
573 572
574 /* Function to find the first free pointer into our hba[] array */ 573 /* Function to find the first free pointer into our hba[] array */
575 /* Returns -1 if no free entries are left. */ 574 /* Returns -1 if no free entries are left. */
576 static int alloc_cpqarray_hba(void) 575 static int alloc_cpqarray_hba(void)
577 { 576 {
578 int i; 577 int i;
579 578
580 for(i=0; i< MAX_CTLR; i++) { 579 for(i=0; i< MAX_CTLR; i++) {
581 if (hba[i] == NULL) { 580 if (hba[i] == NULL) {
582 hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL); 581 hba[i] = kmalloc(sizeof(ctlr_info_t), GFP_KERNEL);
583 if(hba[i]==NULL) { 582 if(hba[i]==NULL) {
584 printk(KERN_ERR "cpqarray: out of memory.\n"); 583 printk(KERN_ERR "cpqarray: out of memory.\n");
585 return (-1); 584 return (-1);
586 } 585 }
587 return (i); 586 return (i);
588 } 587 }
589 } 588 }
590 printk(KERN_WARNING "cpqarray: This driver supports a maximum" 589 printk(KERN_WARNING "cpqarray: This driver supports a maximum"
591 " of 8 controllers.\n"); 590 " of 8 controllers.\n");
592 return(-1); 591 return(-1);
593 } 592 }
594 593
595 static void free_hba(int i) 594 static void free_hba(int i)
596 { 595 {
597 kfree(hba[i]); 596 kfree(hba[i]);
598 hba[i]=NULL; 597 hba[i]=NULL;
599 } 598 }
600 599
601 /* 600 /*
602 * Find the IO address of the controller, its IRQ and so forth. Fill 601 * Find the IO address of the controller, its IRQ and so forth. Fill
603 * in some basic stuff into the ctlr_info_t structure. 602 * in some basic stuff into the ctlr_info_t structure.
604 */ 603 */
605 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev) 604 static int cpqarray_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
606 { 605 {
607 ushort vendor_id, device_id, command; 606 ushort vendor_id, device_id, command;
608 unchar cache_line_size, latency_timer; 607 unchar cache_line_size, latency_timer;
609 unchar irq, revision; 608 unchar irq, revision;
610 unsigned long addr[6]; 609 unsigned long addr[6];
611 __u32 board_id; 610 __u32 board_id;
612 611
613 int i; 612 int i;
614 613
615 c->pci_dev = pdev; 614 c->pci_dev = pdev;
616 if (pci_enable_device(pdev)) { 615 if (pci_enable_device(pdev)) {
617 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n"); 616 printk(KERN_ERR "cpqarray: Unable to Enable PCI device\n");
618 return -1; 617 return -1;
619 } 618 }
620 vendor_id = pdev->vendor; 619 vendor_id = pdev->vendor;
621 device_id = pdev->device; 620 device_id = pdev->device;
622 irq = pdev->irq; 621 irq = pdev->irq;
623 622
624 for(i=0; i<6; i++) 623 for(i=0; i<6; i++)
625 addr[i] = pci_resource_start(pdev, i); 624 addr[i] = pci_resource_start(pdev, i);
626 625
627 if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0) 626 if (pci_set_dma_mask(pdev, CPQARRAY_DMA_MASK) != 0)
628 { 627 {
629 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n"); 628 printk(KERN_ERR "cpqarray: Unable to set DMA mask\n");
630 return -1; 629 return -1;
631 } 630 }
632 631
633 pci_read_config_word(pdev, PCI_COMMAND, &command); 632 pci_read_config_word(pdev, PCI_COMMAND, &command);
634 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision); 633 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &revision);
635 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size); 634 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_line_size);
636 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer); 635 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &latency_timer);
637 636
638 pci_read_config_dword(pdev, 0x2c, &board_id); 637 pci_read_config_dword(pdev, 0x2c, &board_id);
639 638
640 /* check to see if controller has been disabled */ 639 /* check to see if controller has been disabled */
641 if(!(command & 0x02)) { 640 if(!(command & 0x02)) {
642 printk(KERN_WARNING 641 printk(KERN_WARNING
643 "cpqarray: controller appears to be disabled\n"); 642 "cpqarray: controller appears to be disabled\n");
644 return(-1); 643 return(-1);
645 } 644 }
646 645
647 DBGINFO( 646 DBGINFO(
648 printk("vendor_id = %x\n", vendor_id); 647 printk("vendor_id = %x\n", vendor_id);
649 printk("device_id = %x\n", device_id); 648 printk("device_id = %x\n", device_id);
650 printk("command = %x\n", command); 649 printk("command = %x\n", command);
651 for(i=0; i<6; i++) 650 for(i=0; i<6; i++)
652 printk("addr[%d] = %lx\n", i, addr[i]); 651 printk("addr[%d] = %lx\n", i, addr[i]);
653 printk("revision = %x\n", revision); 652 printk("revision = %x\n", revision);
654 printk("irq = %x\n", irq); 653 printk("irq = %x\n", irq);
655 printk("cache_line_size = %x\n", cache_line_size); 654 printk("cache_line_size = %x\n", cache_line_size);
656 printk("latency_timer = %x\n", latency_timer); 655 printk("latency_timer = %x\n", latency_timer);
657 printk("board_id = %x\n", board_id); 656 printk("board_id = %x\n", board_id);
658 ); 657 );
659 658
660 c->intr = irq; 659 c->intr = irq;
661 660
662 for(i=0; i<6; i++) { 661 for(i=0; i<6; i++) {
663 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) 662 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO)
664 { /* IO space */ 663 { /* IO space */
665 c->io_mem_addr = addr[i]; 664 c->io_mem_addr = addr[i];
666 c->io_mem_length = pci_resource_end(pdev, i) 665 c->io_mem_length = pci_resource_end(pdev, i)
667 - pci_resource_start(pdev, i) + 1; 666 - pci_resource_start(pdev, i) + 1;
668 if(!request_region( c->io_mem_addr, c->io_mem_length, 667 if(!request_region( c->io_mem_addr, c->io_mem_length,
669 "cpqarray")) 668 "cpqarray"))
670 { 669 {
671 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length); 670 printk( KERN_WARNING "cpqarray I/O memory range already in use addr %lx length = %ld\n", c->io_mem_addr, c->io_mem_length);
672 c->io_mem_addr = 0; 671 c->io_mem_addr = 0;
673 c->io_mem_length = 0; 672 c->io_mem_length = 0;
674 } 673 }
675 break; 674 break;
676 } 675 }
677 } 676 }
678 677
679 c->paddr = 0; 678 c->paddr = 0;
680 for(i=0; i<6; i++) 679 for(i=0; i<6; i++)
681 if (!(pci_resource_flags(pdev, i) & 680 if (!(pci_resource_flags(pdev, i) &
682 PCI_BASE_ADDRESS_SPACE_IO)) { 681 PCI_BASE_ADDRESS_SPACE_IO)) {
683 c->paddr = pci_resource_start (pdev, i); 682 c->paddr = pci_resource_start (pdev, i);
684 break; 683 break;
685 } 684 }
686 if (!c->paddr) 685 if (!c->paddr)
687 return -1; 686 return -1;
688 c->vaddr = remap_pci_mem(c->paddr, 128); 687 c->vaddr = remap_pci_mem(c->paddr, 128);
689 if (!c->vaddr) 688 if (!c->vaddr)
690 return -1; 689 return -1;
691 c->board_id = board_id; 690 c->board_id = board_id;
692 691
693 for(i=0; i<NR_PRODUCTS; i++) { 692 for(i=0; i<NR_PRODUCTS; i++) {
694 if (board_id == products[i].board_id) { 693 if (board_id == products[i].board_id) {
695 c->product_name = products[i].product_name; 694 c->product_name = products[i].product_name;
696 c->access = *(products[i].access); 695 c->access = *(products[i].access);
697 break; 696 break;
698 } 697 }
699 } 698 }
700 if (i == NR_PRODUCTS) { 699 if (i == NR_PRODUCTS) {
701 printk(KERN_WARNING "cpqarray: Sorry, I don't know how" 700 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
702 " to access the SMART Array controller %08lx\n", 701 " to access the SMART Array controller %08lx\n",
703 (unsigned long)board_id); 702 (unsigned long)board_id);
704 return -1; 703 return -1;
705 } 704 }
706 705
707 return 0; 706 return 0;
708 } 707 }
709 708
710 /* 709 /*
711 * Map (physical) PCI mem into (virtual) kernel space 710 * Map (physical) PCI mem into (virtual) kernel space
712 */ 711 */
713 static void __iomem *remap_pci_mem(ulong base, ulong size) 712 static void __iomem *remap_pci_mem(ulong base, ulong size)
714 { 713 {
715 ulong page_base = ((ulong) base) & PAGE_MASK; 714 ulong page_base = ((ulong) base) & PAGE_MASK;
716 ulong page_offs = ((ulong) base) - page_base; 715 ulong page_offs = ((ulong) base) - page_base;
717 void __iomem *page_remapped = ioremap(page_base, page_offs+size); 716 void __iomem *page_remapped = ioremap(page_base, page_offs+size);
718 717
719 return (page_remapped ? (page_remapped + page_offs) : NULL); 718 return (page_remapped ? (page_remapped + page_offs) : NULL);
720 } 719 }
721 720
722 #ifndef MODULE 721 #ifndef MODULE
723 /* 722 /*
724 * Config string is a comma separated set of i/o addresses of EISA cards. 723 * Config string is a comma separated set of i/o addresses of EISA cards.
725 */ 724 */
726 static int cpqarray_setup(char *str) 725 static int cpqarray_setup(char *str)
727 { 726 {
728 int i, ints[9]; 727 int i, ints[9];
729 728
730 (void)get_options(str, ARRAY_SIZE(ints), ints); 729 (void)get_options(str, ARRAY_SIZE(ints), ints);
731 730
732 for(i=0; i<ints[0] && i<8; i++) 731 for(i=0; i<ints[0] && i<8; i++)
733 eisa[i] = ints[i+1]; 732 eisa[i] = ints[i+1];
734 return 1; 733 return 1;
735 } 734 }
736 735
737 __setup("smart2=", cpqarray_setup); 736 __setup("smart2=", cpqarray_setup);
738 737
739 #endif 738 #endif
740 739
741 /* 740 /*
742 * Find an EISA controller's signature. Set up an hba if we find it. 741 * Find an EISA controller's signature. Set up an hba if we find it.
743 */ 742 */
744 static int __init cpqarray_eisa_detect(void) 743 static int __init cpqarray_eisa_detect(void)
745 { 744 {
746 int i=0, j; 745 int i=0, j;
747 __u32 board_id; 746 __u32 board_id;
748 int intr; 747 int intr;
749 int ctlr; 748 int ctlr;
750 int num_ctlr = 0; 749 int num_ctlr = 0;
751 750
752 while(i<8 && eisa[i]) { 751 while(i<8 && eisa[i]) {
753 ctlr = alloc_cpqarray_hba(); 752 ctlr = alloc_cpqarray_hba();
754 if(ctlr == -1) 753 if(ctlr == -1)
755 break; 754 break;
756 board_id = inl(eisa[i]+0xC80); 755 board_id = inl(eisa[i]+0xC80);
757 for(j=0; j < NR_PRODUCTS; j++) 756 for(j=0; j < NR_PRODUCTS; j++)
758 if (board_id == products[j].board_id) 757 if (board_id == products[j].board_id)
759 break; 758 break;
760 759
761 if (j == NR_PRODUCTS) { 760 if (j == NR_PRODUCTS) {
762 printk(KERN_WARNING "cpqarray: Sorry, I don't know how" 761 printk(KERN_WARNING "cpqarray: Sorry, I don't know how"
763 " to access the SMART Array controller %08lx\n", (unsigned long)board_id); 762 " to access the SMART Array controller %08lx\n", (unsigned long)board_id);
764 continue; 763 continue;
765 } 764 }
766 765
767 memset(hba[ctlr], 0, sizeof(ctlr_info_t)); 766 memset(hba[ctlr], 0, sizeof(ctlr_info_t));
768 hba[ctlr]->io_mem_addr = eisa[i]; 767 hba[ctlr]->io_mem_addr = eisa[i];
769 hba[ctlr]->io_mem_length = 0x7FF; 768 hba[ctlr]->io_mem_length = 0x7FF;
770 if(!request_region(hba[ctlr]->io_mem_addr, 769 if(!request_region(hba[ctlr]->io_mem_addr,
771 hba[ctlr]->io_mem_length, 770 hba[ctlr]->io_mem_length,
772 "cpqarray")) 771 "cpqarray"))
773 { 772 {
774 printk(KERN_WARNING "cpqarray: I/O range already in " 773 printk(KERN_WARNING "cpqarray: I/O range already in "
775 "use addr = %lx length = %ld\n", 774 "use addr = %lx length = %ld\n",
776 hba[ctlr]->io_mem_addr, 775 hba[ctlr]->io_mem_addr,
777 hba[ctlr]->io_mem_length); 776 hba[ctlr]->io_mem_length);
778 free_hba(ctlr); 777 free_hba(ctlr);
779 continue; 778 continue;
780 } 779 }
781 780
782 /* 781 /*
783 * Read the config register to find our interrupt 782 * Read the config register to find our interrupt
784 */ 783 */
785 intr = inb(eisa[i]+0xCC0) >> 4; 784 intr = inb(eisa[i]+0xCC0) >> 4;
786 if (intr & 1) intr = 11; 785 if (intr & 1) intr = 11;
787 else if (intr & 2) intr = 10; 786 else if (intr & 2) intr = 10;
788 else if (intr & 4) intr = 14; 787 else if (intr & 4) intr = 14;
789 else if (intr & 8) intr = 15; 788 else if (intr & 8) intr = 15;
790 789
791 hba[ctlr]->intr = intr; 790 hba[ctlr]->intr = intr;
792 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr); 791 sprintf(hba[ctlr]->devname, "ida%d", nr_ctlr);
793 hba[ctlr]->product_name = products[j].product_name; 792 hba[ctlr]->product_name = products[j].product_name;
794 hba[ctlr]->access = *(products[j].access); 793 hba[ctlr]->access = *(products[j].access);
795 hba[ctlr]->ctlr = ctlr; 794 hba[ctlr]->ctlr = ctlr;
796 hba[ctlr]->board_id = board_id; 795 hba[ctlr]->board_id = board_id;
797 hba[ctlr]->pci_dev = NULL; /* not PCI */ 796 hba[ctlr]->pci_dev = NULL; /* not PCI */
798 797
799 DBGINFO( 798 DBGINFO(
800 printk("i = %d, j = %d\n", i, j); 799 printk("i = %d, j = %d\n", i, j);
801 printk("irq = %x\n", intr); 800 printk("irq = %x\n", intr);
802 printk("product name = %s\n", products[j].product_name); 801 printk("product name = %s\n", products[j].product_name);
803 printk("board_id = %x\n", board_id); 802 printk("board_id = %x\n", board_id);
804 ); 803 );
805 804
806 num_ctlr++; 805 num_ctlr++;
807 i++; 806 i++;
808 807
809 if (cpqarray_register_ctlr(ctlr, NULL) == -1) 808 if (cpqarray_register_ctlr(ctlr, NULL) == -1)
810 printk(KERN_WARNING 809 printk(KERN_WARNING
811 "cpqarray: Can't register EISA controller %d\n", 810 "cpqarray: Can't register EISA controller %d\n",
812 ctlr); 811 ctlr);
813 812
814 } 813 }
815 814
816 return num_ctlr; 815 return num_ctlr;
817 } 816 }
818 817
819 /* 818 /*
820 * Open. Make sure the device is really there. 819 * Open. Make sure the device is really there.
821 */ 820 */
822 static int ida_open(struct inode *inode, struct file *filep) 821 static int ida_open(struct inode *inode, struct file *filep)
823 { 822 {
824 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk); 823 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
825 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk); 824 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
826 825
827 DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name)); 826 DBGINFO(printk("ida_open %s\n", inode->i_bdev->bd_disk->disk_name));
828 /* 827 /*
829 * Root is allowed to open raw volume zero even if it's not configured 828 * Root is allowed to open raw volume zero even if it's not configured
830 * so array config can still work. I don't think I really like this, 829 * so array config can still work. I don't think I really like this,
831 * but I'm already using way to many device nodes to claim another one 830 * but I'm already using way to many device nodes to claim another one
832 * for "raw controller". 831 * for "raw controller".
833 */ 832 */
834 if (!drv->nr_blks) { 833 if (!drv->nr_blks) {
835 if (!capable(CAP_SYS_RAWIO)) 834 if (!capable(CAP_SYS_RAWIO))
836 return -ENXIO; 835 return -ENXIO;
837 if (!capable(CAP_SYS_ADMIN) && drv != host->drv) 836 if (!capable(CAP_SYS_ADMIN) && drv != host->drv)
838 return -ENXIO; 837 return -ENXIO;
839 } 838 }
840 host->usage_count++; 839 host->usage_count++;
841 return 0; 840 return 0;
842 } 841 }
843 842
844 /* 843 /*
845 * Close. Sync first. 844 * Close. Sync first.
846 */ 845 */
847 static int ida_release(struct inode *inode, struct file *filep) 846 static int ida_release(struct inode *inode, struct file *filep)
848 { 847 {
849 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk); 848 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
850 host->usage_count--; 849 host->usage_count--;
851 return 0; 850 return 0;
852 } 851 }
853 852
854 /* 853 /*
855 * Enqueuing and dequeuing functions for cmdlists. 854 * Enqueuing and dequeuing functions for cmdlists.
856 */ 855 */
857 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c) 856 static inline void addQ(cmdlist_t **Qptr, cmdlist_t *c)
858 { 857 {
859 if (*Qptr == NULL) { 858 if (*Qptr == NULL) {
860 *Qptr = c; 859 *Qptr = c;
861 c->next = c->prev = c; 860 c->next = c->prev = c;
862 } else { 861 } else {
863 c->prev = (*Qptr)->prev; 862 c->prev = (*Qptr)->prev;
864 c->next = (*Qptr); 863 c->next = (*Qptr);
865 (*Qptr)->prev->next = c; 864 (*Qptr)->prev->next = c;
866 (*Qptr)->prev = c; 865 (*Qptr)->prev = c;
867 } 866 }
868 } 867 }
869 868
870 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c) 869 static inline cmdlist_t *removeQ(cmdlist_t **Qptr, cmdlist_t *c)
871 { 870 {
872 if (c && c->next != c) { 871 if (c && c->next != c) {
873 if (*Qptr == c) *Qptr = c->next; 872 if (*Qptr == c) *Qptr = c->next;
874 c->prev->next = c->next; 873 c->prev->next = c->next;
875 c->next->prev = c->prev; 874 c->next->prev = c->prev;
876 } else { 875 } else {
877 *Qptr = NULL; 876 *Qptr = NULL;
878 } 877 }
879 return c; 878 return c;
880 } 879 }
881 880
882 /* 881 /*
883 * Get a request and submit it to the controller. 882 * Get a request and submit it to the controller.
884 * This routine needs to grab all the requests it possibly can from the 883 * This routine needs to grab all the requests it possibly can from the
885 * req Q and submit them. Interrupts are off (and need to be off) when you 884 * req Q and submit them. Interrupts are off (and need to be off) when you
886 * are in here (either via the dummy do_ida_request functions or by being 885 * are in here (either via the dummy do_ida_request functions or by being
887 * called from the interrupt handler 886 * called from the interrupt handler
888 */ 887 */
889 static void do_ida_request(struct request_queue *q) 888 static void do_ida_request(struct request_queue *q)
890 { 889 {
891 ctlr_info_t *h = q->queuedata; 890 ctlr_info_t *h = q->queuedata;
892 cmdlist_t *c; 891 cmdlist_t *c;
893 struct request *creq; 892 struct request *creq;
894 struct scatterlist tmp_sg[SG_MAX]; 893 struct scatterlist tmp_sg[SG_MAX];
895 int i, dir, seg; 894 int i, dir, seg;
896 895
897 if (blk_queue_plugged(q)) 896 if (blk_queue_plugged(q))
898 goto startio; 897 goto startio;
899 898
900 queue_next: 899 queue_next:
901 creq = elv_next_request(q); 900 creq = elv_next_request(q);
902 if (!creq) 901 if (!creq)
903 goto startio; 902 goto startio;
904 903
905 BUG_ON(creq->nr_phys_segments > SG_MAX); 904 BUG_ON(creq->nr_phys_segments > SG_MAX);
906 905
907 if ((c = cmd_alloc(h,1)) == NULL) 906 if ((c = cmd_alloc(h,1)) == NULL)
908 goto startio; 907 goto startio;
909 908
910 blkdev_dequeue_request(creq); 909 blkdev_dequeue_request(creq);
911 910
912 c->ctlr = h->ctlr; 911 c->ctlr = h->ctlr;
913 c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv; 912 c->hdr.unit = (drv_info_t *)(creq->rq_disk->private_data) - h->drv;
914 c->hdr.size = sizeof(rblk_t) >> 2; 913 c->hdr.size = sizeof(rblk_t) >> 2;
915 c->size += sizeof(rblk_t); 914 c->size += sizeof(rblk_t);
916 915
917 c->req.hdr.blk = creq->sector; 916 c->req.hdr.blk = creq->sector;
918 c->rq = creq; 917 c->rq = creq;
919 DBGPX( 918 DBGPX(
920 printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors); 919 printk("sector=%d, nr_sectors=%d\n", creq->sector, creq->nr_sectors);
921 ); 920 );
922 sg_init_table(tmp_sg, SG_MAX); 921 sg_init_table(tmp_sg, SG_MAX);
923 seg = blk_rq_map_sg(q, creq, tmp_sg); 922 seg = blk_rq_map_sg(q, creq, tmp_sg);
924 923
925 /* Now do all the DMA Mappings */ 924 /* Now do all the DMA Mappings */
926 if (rq_data_dir(creq) == READ) 925 if (rq_data_dir(creq) == READ)
927 dir = PCI_DMA_FROMDEVICE; 926 dir = PCI_DMA_FROMDEVICE;
928 else 927 else
929 dir = PCI_DMA_TODEVICE; 928 dir = PCI_DMA_TODEVICE;
930 for( i=0; i < seg; i++) 929 for( i=0; i < seg; i++)
931 { 930 {
932 c->req.sg[i].size = tmp_sg[i].length; 931 c->req.sg[i].size = tmp_sg[i].length;
933 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev, 932 c->req.sg[i].addr = (__u32) pci_map_page(h->pci_dev,
934 sg_page(&tmp_sg[i]), 933 sg_page(&tmp_sg[i]),
935 tmp_sg[i].offset, 934 tmp_sg[i].offset,
936 tmp_sg[i].length, dir); 935 tmp_sg[i].length, dir);
937 } 936 }
938 DBGPX( printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); ); 937 DBGPX( printk("Submitting %d sectors in %d segments\n", creq->nr_sectors, seg); );
939 c->req.hdr.sg_cnt = seg; 938 c->req.hdr.sg_cnt = seg;
940 c->req.hdr.blk_cnt = creq->nr_sectors; 939 c->req.hdr.blk_cnt = creq->nr_sectors;
941 c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE; 940 c->req.hdr.cmd = (rq_data_dir(creq) == READ) ? IDA_READ : IDA_WRITE;
942 c->type = CMD_RWREQ; 941 c->type = CMD_RWREQ;
943 942
944 /* Put the request on the tail of the request queue */ 943 /* Put the request on the tail of the request queue */
945 addQ(&h->reqQ, c); 944 addQ(&h->reqQ, c);
946 h->Qdepth++; 945 h->Qdepth++;
947 if (h->Qdepth > h->maxQsinceinit) 946 if (h->Qdepth > h->maxQsinceinit)
948 h->maxQsinceinit = h->Qdepth; 947 h->maxQsinceinit = h->Qdepth;
949 948
950 goto queue_next; 949 goto queue_next;
951 950
952 startio: 951 startio:
953 start_io(h); 952 start_io(h);
954 } 953 }
955 954
956 /* 955 /*
957 * start_io submits everything on a controller's request queue 956 * start_io submits everything on a controller's request queue
958 * and moves it to the completion queue. 957 * and moves it to the completion queue.
959 * 958 *
960 * Interrupts had better be off if you're in here 959 * Interrupts had better be off if you're in here
961 */ 960 */
962 static void start_io(ctlr_info_t *h) 961 static void start_io(ctlr_info_t *h)
963 { 962 {
964 cmdlist_t *c; 963 cmdlist_t *c;
965 964
966 while((c = h->reqQ) != NULL) { 965 while((c = h->reqQ) != NULL) {
967 /* Can't do anything if we're busy */ 966 /* Can't do anything if we're busy */
968 if (h->access.fifo_full(h) == 0) 967 if (h->access.fifo_full(h) == 0)
969 return; 968 return;
970 969
971 /* Get the first entry from the request Q */ 970 /* Get the first entry from the request Q */
972 removeQ(&h->reqQ, c); 971 removeQ(&h->reqQ, c);
973 h->Qdepth--; 972 h->Qdepth--;
974 973
975 /* Tell the controller to do our bidding */ 974 /* Tell the controller to do our bidding */
976 h->access.submit_command(h, c); 975 h->access.submit_command(h, c);
977 976
978 /* Get onto the completion Q */ 977 /* Get onto the completion Q */
979 addQ(&h->cmpQ, c); 978 addQ(&h->cmpQ, c);
980 } 979 }
981 } 980 }
982 981
983 static inline void complete_buffers(struct bio *bio, int ok)
984 {
985 struct bio *xbh;
986
987 while (bio) {
988 xbh = bio->bi_next;
989 bio->bi_next = NULL;
990
991 bio_endio(bio, ok ? 0 : -EIO);
992
993 bio = xbh;
994 }
995 }
996 /* 982 /*
997 * Mark all buffers that cmd was responsible for 983 * Mark all buffers that cmd was responsible for
998 */ 984 */
999 static inline void complete_command(cmdlist_t *cmd, int timeout) 985 static inline void complete_command(cmdlist_t *cmd, int timeout)
1000 { 986 {
1001 struct request *rq = cmd->rq; 987 struct request *rq = cmd->rq;
1002 int ok=1; 988 int error = 0;
1003 int i, ddir; 989 int i, ddir;
1004 990
1005 if (cmd->req.hdr.rcode & RCODE_NONFATAL && 991 if (cmd->req.hdr.rcode & RCODE_NONFATAL &&
1006 (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) { 992 (hba[cmd->ctlr]->misc_tflags & MISC_NONFATAL_WARN) == 0) {
1007 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n", 993 printk(KERN_NOTICE "Non Fatal error on ida/c%dd%d\n",
1008 cmd->ctlr, cmd->hdr.unit); 994 cmd->ctlr, cmd->hdr.unit);
1009 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN; 995 hba[cmd->ctlr]->misc_tflags |= MISC_NONFATAL_WARN;
1010 } 996 }
1011 if (cmd->req.hdr.rcode & RCODE_FATAL) { 997 if (cmd->req.hdr.rcode & RCODE_FATAL) {
1012 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n", 998 printk(KERN_WARNING "Fatal error on ida/c%dd%d\n",
1013 cmd->ctlr, cmd->hdr.unit); 999 cmd->ctlr, cmd->hdr.unit);
1014 ok = 0; 1000 error = -EIO;
1015 } 1001 }
1016 if (cmd->req.hdr.rcode & RCODE_INVREQ) { 1002 if (cmd->req.hdr.rcode & RCODE_INVREQ) {
1017 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n", 1003 printk(KERN_WARNING "Invalid request on ida/c%dd%d = (cmd=%x sect=%d cnt=%d sg=%d ret=%x)\n",
1018 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd, 1004 cmd->ctlr, cmd->hdr.unit, cmd->req.hdr.cmd,
1019 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt, 1005 cmd->req.hdr.blk, cmd->req.hdr.blk_cnt,
1020 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode); 1006 cmd->req.hdr.sg_cnt, cmd->req.hdr.rcode);
1021 ok = 0; 1007 error = -EIO;
1022 } 1008 }
1023 if (timeout) ok = 0; 1009 if (timeout)
1010 error = -EIO;
1024 /* unmap the DMA mapping for all the scatter gather elements */ 1011 /* unmap the DMA mapping for all the scatter gather elements */
1025 if (cmd->req.hdr.cmd == IDA_READ) 1012 if (cmd->req.hdr.cmd == IDA_READ)
1026 ddir = PCI_DMA_FROMDEVICE; 1013 ddir = PCI_DMA_FROMDEVICE;
1027 else 1014 else
1028 ddir = PCI_DMA_TODEVICE; 1015 ddir = PCI_DMA_TODEVICE;
1029 for(i=0; i<cmd->req.hdr.sg_cnt; i++) 1016 for(i=0; i<cmd->req.hdr.sg_cnt; i++)
1030 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr, 1017 pci_unmap_page(hba[cmd->ctlr]->pci_dev, cmd->req.sg[i].addr,
1031 cmd->req.sg[i].size, ddir); 1018 cmd->req.sg[i].size, ddir);
1032 1019
1033 complete_buffers(rq->bio, ok);
1034
1035 if (blk_fs_request(rq)) {
1036 const int rw = rq_data_dir(rq);
1037
1038 disk_stat_add(rq->rq_disk, sectors[rw], rq->nr_sectors);
1039 }
1040
1041 add_disk_randomness(rq->rq_disk);
1042
1043 DBGPX(printk("Done with %p\n", rq);); 1020 DBGPX(printk("Done with %p\n", rq););
1044 end_that_request_last(rq, ok ? 1 : -EIO); 1021 if (__blk_end_request(rq, error, blk_rq_bytes(rq)))
1022 BUG();
1045 } 1023 }
1046 1024
1047 /* 1025 /*
1048 * The controller will interrupt us upon completion of commands. 1026 * The controller will interrupt us upon completion of commands.
1049 * Find the command on the completion queue, remove it, tell the OS and 1027 * Find the command on the completion queue, remove it, tell the OS and
1050 * try to queue up more IO 1028 * try to queue up more IO
1051 */ 1029 */
1052 static irqreturn_t do_ida_intr(int irq, void *dev_id) 1030 static irqreturn_t do_ida_intr(int irq, void *dev_id)
1053 { 1031 {
1054 ctlr_info_t *h = dev_id; 1032 ctlr_info_t *h = dev_id;
1055 cmdlist_t *c; 1033 cmdlist_t *c;
1056 unsigned long istat; 1034 unsigned long istat;
1057 unsigned long flags; 1035 unsigned long flags;
1058 __u32 a,a1; 1036 __u32 a,a1;
1059 1037
1060 istat = h->access.intr_pending(h); 1038 istat = h->access.intr_pending(h);
1061 /* Is this interrupt for us? */ 1039 /* Is this interrupt for us? */
1062 if (istat == 0) 1040 if (istat == 0)
1063 return IRQ_NONE; 1041 return IRQ_NONE;
1064 1042
1065 /* 1043 /*
1066 * If there are completed commands in the completion queue, 1044 * If there are completed commands in the completion queue,
1067 * we had better do something about it. 1045 * we had better do something about it.
1068 */ 1046 */
1069 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags); 1047 spin_lock_irqsave(IDA_LOCK(h->ctlr), flags);
1070 if (istat & FIFO_NOT_EMPTY) { 1048 if (istat & FIFO_NOT_EMPTY) {
1071 while((a = h->access.command_completed(h))) { 1049 while((a = h->access.command_completed(h))) {
1072 a1 = a; a &= ~3; 1050 a1 = a; a &= ~3;
1073 if ((c = h->cmpQ) == NULL) 1051 if ((c = h->cmpQ) == NULL)
1074 { 1052 {
1075 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1); 1053 printk(KERN_WARNING "cpqarray: Completion of %08lx ignored\n", (unsigned long)a1);
1076 continue; 1054 continue;
1077 } 1055 }
1078 while(c->busaddr != a) { 1056 while(c->busaddr != a) {
1079 c = c->next; 1057 c = c->next;
1080 if (c == h->cmpQ) 1058 if (c == h->cmpQ)
1081 break; 1059 break;
1082 } 1060 }
1083 /* 1061 /*
1084 * If we've found the command, take it off the 1062 * If we've found the command, take it off the
1085 * completion Q and free it 1063 * completion Q and free it
1086 */ 1064 */
1087 if (c->busaddr == a) { 1065 if (c->busaddr == a) {
1088 removeQ(&h->cmpQ, c); 1066 removeQ(&h->cmpQ, c);
1089 /* Check for invalid command. 1067 /* Check for invalid command.
1090 * Controller returns command error, 1068 * Controller returns command error,
1091 * But rcode = 0. 1069 * But rcode = 0.
1092 */ 1070 */
1093 1071
1094 if((a1 & 0x03) && (c->req.hdr.rcode == 0)) 1072 if((a1 & 0x03) && (c->req.hdr.rcode == 0))
1095 { 1073 {
1096 c->req.hdr.rcode = RCODE_INVREQ; 1074 c->req.hdr.rcode = RCODE_INVREQ;
1097 } 1075 }
1098 if (c->type == CMD_RWREQ) { 1076 if (c->type == CMD_RWREQ) {
1099 complete_command(c, 0); 1077 complete_command(c, 0);
1100 cmd_free(h, c, 1); 1078 cmd_free(h, c, 1);
1101 } else if (c->type == CMD_IOCTL_PEND) { 1079 } else if (c->type == CMD_IOCTL_PEND) {
1102 c->type = CMD_IOCTL_DONE; 1080 c->type = CMD_IOCTL_DONE;
1103 } 1081 }
1104 continue; 1082 continue;
1105 } 1083 }
1106 } 1084 }
1107 } 1085 }
1108 1086
1109 /* 1087 /*
1110 * See if we can queue up some more IO 1088 * See if we can queue up some more IO
1111 */ 1089 */
1112 do_ida_request(h->queue); 1090 do_ida_request(h->queue);
1113 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags); 1091 spin_unlock_irqrestore(IDA_LOCK(h->ctlr), flags);
1114 return IRQ_HANDLED; 1092 return IRQ_HANDLED;
1115 } 1093 }
1116 1094
1117 /* 1095 /*
1118 * This timer was for timing out requests that haven't happened after 1096 * This timer was for timing out requests that haven't happened after
1119 * IDA_TIMEOUT. That wasn't such a good idea. This timer is used to 1097 * IDA_TIMEOUT. That wasn't such a good idea. This timer is used to
1120 * reset a flags structure so we don't flood the user with 1098 * reset a flags structure so we don't flood the user with
1121 * "Non-Fatal error" messages. 1099 * "Non-Fatal error" messages.
1122 */ 1100 */
1123 static void ida_timer(unsigned long tdata) 1101 static void ida_timer(unsigned long tdata)
1124 { 1102 {
1125 ctlr_info_t *h = (ctlr_info_t*)tdata; 1103 ctlr_info_t *h = (ctlr_info_t*)tdata;
1126 1104
1127 h->timer.expires = jiffies + IDA_TIMER; 1105 h->timer.expires = jiffies + IDA_TIMER;
1128 add_timer(&h->timer); 1106 add_timer(&h->timer);
1129 h->misc_tflags = 0; 1107 h->misc_tflags = 0;
1130 } 1108 }
1131 1109
1132 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1110 static int ida_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1133 { 1111 {
1134 drv_info_t *drv = get_drv(bdev->bd_disk); 1112 drv_info_t *drv = get_drv(bdev->bd_disk);
1135 1113
1136 if (drv->cylinders) { 1114 if (drv->cylinders) {
1137 geo->heads = drv->heads; 1115 geo->heads = drv->heads;
1138 geo->sectors = drv->sectors; 1116 geo->sectors = drv->sectors;
1139 geo->cylinders = drv->cylinders; 1117 geo->cylinders = drv->cylinders;
1140 } else { 1118 } else {
1141 geo->heads = 0xff; 1119 geo->heads = 0xff;
1142 geo->sectors = 0x3f; 1120 geo->sectors = 0x3f;
1143 geo->cylinders = drv->nr_blks / (0xff*0x3f); 1121 geo->cylinders = drv->nr_blks / (0xff*0x3f);
1144 } 1122 }
1145 1123
1146 return 0; 1124 return 0;
1147 } 1125 }
1148 1126
1149 /* 1127 /*
1150 * ida_ioctl does some miscellaneous stuff like reporting drive geometry, 1128 * ida_ioctl does some miscellaneous stuff like reporting drive geometry,
1151 * setting readahead and submitting commands from userspace to the controller. 1129 * setting readahead and submitting commands from userspace to the controller.
1152 */ 1130 */
1153 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg) 1131 static int ida_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
1154 { 1132 {
1155 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk); 1133 drv_info_t *drv = get_drv(inode->i_bdev->bd_disk);
1156 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk); 1134 ctlr_info_t *host = get_host(inode->i_bdev->bd_disk);
1157 int error; 1135 int error;
1158 ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg; 1136 ida_ioctl_t __user *io = (ida_ioctl_t __user *)arg;
1159 ida_ioctl_t *my_io; 1137 ida_ioctl_t *my_io;
1160 1138
1161 switch(cmd) { 1139 switch(cmd) {
1162 case IDAGETDRVINFO: 1140 case IDAGETDRVINFO:
1163 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t))) 1141 if (copy_to_user(&io->c.drv, drv, sizeof(drv_info_t)))
1164 return -EFAULT; 1142 return -EFAULT;
1165 return 0; 1143 return 0;
1166 case IDAPASSTHRU: 1144 case IDAPASSTHRU:
1167 if (!capable(CAP_SYS_RAWIO)) 1145 if (!capable(CAP_SYS_RAWIO))
1168 return -EPERM; 1146 return -EPERM;
1169 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL); 1147 my_io = kmalloc(sizeof(ida_ioctl_t), GFP_KERNEL);
1170 if (!my_io) 1148 if (!my_io)
1171 return -ENOMEM; 1149 return -ENOMEM;
1172 error = -EFAULT; 1150 error = -EFAULT;
1173 if (copy_from_user(my_io, io, sizeof(*my_io))) 1151 if (copy_from_user(my_io, io, sizeof(*my_io)))
1174 goto out_passthru; 1152 goto out_passthru;
1175 error = ida_ctlr_ioctl(host, drv - host->drv, my_io); 1153 error = ida_ctlr_ioctl(host, drv - host->drv, my_io);
1176 if (error) 1154 if (error)
1177 goto out_passthru; 1155 goto out_passthru;
1178 error = -EFAULT; 1156 error = -EFAULT;
1179 if (copy_to_user(io, my_io, sizeof(*my_io))) 1157 if (copy_to_user(io, my_io, sizeof(*my_io)))
1180 goto out_passthru; 1158 goto out_passthru;
1181 error = 0; 1159 error = 0;
1182 out_passthru: 1160 out_passthru:
1183 kfree(my_io); 1161 kfree(my_io);
1184 return error; 1162 return error;
1185 case IDAGETCTLRSIG: 1163 case IDAGETCTLRSIG:
1186 if (!arg) return -EINVAL; 1164 if (!arg) return -EINVAL;
1187 put_user(host->ctlr_sig, (int __user *)arg); 1165 put_user(host->ctlr_sig, (int __user *)arg);
1188 return 0; 1166 return 0;
1189 case IDAREVALIDATEVOLS: 1167 case IDAREVALIDATEVOLS:
1190 if (iminor(inode) != 0) 1168 if (iminor(inode) != 0)
1191 return -ENXIO; 1169 return -ENXIO;
1192 return revalidate_allvol(host); 1170 return revalidate_allvol(host);
1193 case IDADRIVERVERSION: 1171 case IDADRIVERVERSION:
1194 if (!arg) return -EINVAL; 1172 if (!arg) return -EINVAL;
1195 put_user(DRIVER_VERSION, (unsigned long __user *)arg); 1173 put_user(DRIVER_VERSION, (unsigned long __user *)arg);
1196 return 0; 1174 return 0;
1197 case IDAGETPCIINFO: 1175 case IDAGETPCIINFO:
1198 { 1176 {
1199 1177
1200 ida_pci_info_struct pciinfo; 1178 ida_pci_info_struct pciinfo;
1201 1179
1202 if (!arg) return -EINVAL; 1180 if (!arg) return -EINVAL;
1203 pciinfo.bus = host->pci_dev->bus->number; 1181 pciinfo.bus = host->pci_dev->bus->number;
1204 pciinfo.dev_fn = host->pci_dev->devfn; 1182 pciinfo.dev_fn = host->pci_dev->devfn;
1205 pciinfo.board_id = host->board_id; 1183 pciinfo.board_id = host->board_id;
1206 if(copy_to_user((void __user *) arg, &pciinfo, 1184 if(copy_to_user((void __user *) arg, &pciinfo,
1207 sizeof( ida_pci_info_struct))) 1185 sizeof( ida_pci_info_struct)))
1208 return -EFAULT; 1186 return -EFAULT;
1209 return(0); 1187 return(0);
1210 } 1188 }
1211 1189
1212 default: 1190 default:
1213 return -EINVAL; 1191 return -EINVAL;
1214 } 1192 }
1215 1193
1216 } 1194 }
1217 /* 1195 /*
1218 * ida_ctlr_ioctl is for passing commands to the controller from userspace. 1196 * ida_ctlr_ioctl is for passing commands to the controller from userspace.
1219 * The command block (io) has already been copied to kernel space for us, 1197 * The command block (io) has already been copied to kernel space for us,
1220 * however, any elements in the sglist need to be copied to kernel space 1198 * however, any elements in the sglist need to be copied to kernel space
1221 * or copied back to userspace. 1199 * or copied back to userspace.
1222 * 1200 *
1223 * Only root may perform a controller passthru command, however I'm not doing 1201 * Only root may perform a controller passthru command, however I'm not doing
1224 * any serious sanity checking on the arguments. Doing an IDA_WRITE_MEDIA and 1202 * any serious sanity checking on the arguments. Doing an IDA_WRITE_MEDIA and
1225 * putting a 64M buffer in the sglist is probably a *bad* idea. 1203 * putting a 64M buffer in the sglist is probably a *bad* idea.
1226 */ 1204 */
1227 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io) 1205 static int ida_ctlr_ioctl(ctlr_info_t *h, int dsk, ida_ioctl_t *io)
1228 { 1206 {
1229 int ctlr = h->ctlr; 1207 int ctlr = h->ctlr;
1230 cmdlist_t *c; 1208 cmdlist_t *c;
1231 void *p = NULL; 1209 void *p = NULL;
1232 unsigned long flags; 1210 unsigned long flags;
1233 int error; 1211 int error;
1234 1212
1235 if ((c = cmd_alloc(h, 0)) == NULL) 1213 if ((c = cmd_alloc(h, 0)) == NULL)
1236 return -ENOMEM; 1214 return -ENOMEM;
1237 c->ctlr = ctlr; 1215 c->ctlr = ctlr;
1238 c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk; 1216 c->hdr.unit = (io->unit & UNITVALID) ? (io->unit & ~UNITVALID) : dsk;
1239 c->hdr.size = sizeof(rblk_t) >> 2; 1217 c->hdr.size = sizeof(rblk_t) >> 2;
1240 c->size += sizeof(rblk_t); 1218 c->size += sizeof(rblk_t);
1241 1219
1242 c->req.hdr.cmd = io->cmd; 1220 c->req.hdr.cmd = io->cmd;
1243 c->req.hdr.blk = io->blk; 1221 c->req.hdr.blk = io->blk;
1244 c->req.hdr.blk_cnt = io->blk_cnt; 1222 c->req.hdr.blk_cnt = io->blk_cnt;
1245 c->type = CMD_IOCTL_PEND; 1223 c->type = CMD_IOCTL_PEND;
1246 1224
1247 /* Pre submit processing */ 1225 /* Pre submit processing */
1248 switch(io->cmd) { 1226 switch(io->cmd) {
1249 case PASSTHRU_A: 1227 case PASSTHRU_A:
1250 p = kmalloc(io->sg[0].size, GFP_KERNEL); 1228 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1251 if (!p) 1229 if (!p)
1252 { 1230 {
1253 error = -ENOMEM; 1231 error = -ENOMEM;
1254 cmd_free(h, c, 0); 1232 cmd_free(h, c, 0);
1255 return(error); 1233 return(error);
1256 } 1234 }
1257 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) { 1235 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1258 kfree(p); 1236 kfree(p);
1259 cmd_free(h, c, 0); 1237 cmd_free(h, c, 0);
1260 return -EFAULT; 1238 return -EFAULT;
1261 } 1239 }
1262 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c), 1240 c->req.hdr.blk = pci_map_single(h->pci_dev, &(io->c),
1263 sizeof(ida_ioctl_t), 1241 sizeof(ida_ioctl_t),
1264 PCI_DMA_BIDIRECTIONAL); 1242 PCI_DMA_BIDIRECTIONAL);
1265 c->req.sg[0].size = io->sg[0].size; 1243 c->req.sg[0].size = io->sg[0].size;
1266 c->req.sg[0].addr = pci_map_single(h->pci_dev, p, 1244 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1267 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL); 1245 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1268 c->req.hdr.sg_cnt = 1; 1246 c->req.hdr.sg_cnt = 1;
1269 break; 1247 break;
1270 case IDA_READ: 1248 case IDA_READ:
1271 case READ_FLASH_ROM: 1249 case READ_FLASH_ROM:
1272 case SENSE_CONTROLLER_PERFORMANCE: 1250 case SENSE_CONTROLLER_PERFORMANCE:
1273 p = kmalloc(io->sg[0].size, GFP_KERNEL); 1251 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1274 if (!p) 1252 if (!p)
1275 { 1253 {
1276 error = -ENOMEM; 1254 error = -ENOMEM;
1277 cmd_free(h, c, 0); 1255 cmd_free(h, c, 0);
1278 return(error); 1256 return(error);
1279 } 1257 }
1280 1258
1281 c->req.sg[0].size = io->sg[0].size; 1259 c->req.sg[0].size = io->sg[0].size;
1282 c->req.sg[0].addr = pci_map_single(h->pci_dev, p, 1260 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1283 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL); 1261 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1284 c->req.hdr.sg_cnt = 1; 1262 c->req.hdr.sg_cnt = 1;
1285 break; 1263 break;
1286 case IDA_WRITE: 1264 case IDA_WRITE:
1287 case IDA_WRITE_MEDIA: 1265 case IDA_WRITE_MEDIA:
1288 case DIAG_PASS_THRU: 1266 case DIAG_PASS_THRU:
1289 case COLLECT_BUFFER: 1267 case COLLECT_BUFFER:
1290 case WRITE_FLASH_ROM: 1268 case WRITE_FLASH_ROM:
1291 p = kmalloc(io->sg[0].size, GFP_KERNEL); 1269 p = kmalloc(io->sg[0].size, GFP_KERNEL);
1292 if (!p) 1270 if (!p)
1293 { 1271 {
1294 error = -ENOMEM; 1272 error = -ENOMEM;
1295 cmd_free(h, c, 0); 1273 cmd_free(h, c, 0);
1296 return(error); 1274 return(error);
1297 } 1275 }
1298 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) { 1276 if (copy_from_user(p, io->sg[0].addr, io->sg[0].size)) {
1299 kfree(p); 1277 kfree(p);
1300 cmd_free(h, c, 0); 1278 cmd_free(h, c, 0);
1301 return -EFAULT; 1279 return -EFAULT;
1302 } 1280 }
1303 c->req.sg[0].size = io->sg[0].size; 1281 c->req.sg[0].size = io->sg[0].size;
1304 c->req.sg[0].addr = pci_map_single(h->pci_dev, p, 1282 c->req.sg[0].addr = pci_map_single(h->pci_dev, p,
1305 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL); 1283 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1306 c->req.hdr.sg_cnt = 1; 1284 c->req.hdr.sg_cnt = 1;
1307 break; 1285 break;
1308 default: 1286 default:
1309 c->req.sg[0].size = sizeof(io->c); 1287 c->req.sg[0].size = sizeof(io->c);
1310 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c, 1288 c->req.sg[0].addr = pci_map_single(h->pci_dev,&io->c,
1311 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL); 1289 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1312 c->req.hdr.sg_cnt = 1; 1290 c->req.hdr.sg_cnt = 1;
1313 } 1291 }
1314 1292
1315 /* Put the request on the tail of the request queue */ 1293 /* Put the request on the tail of the request queue */
1316 spin_lock_irqsave(IDA_LOCK(ctlr), flags); 1294 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1317 addQ(&h->reqQ, c); 1295 addQ(&h->reqQ, c);
1318 h->Qdepth++; 1296 h->Qdepth++;
1319 start_io(h); 1297 start_io(h);
1320 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags); 1298 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1321 1299
1322 /* Wait for completion */ 1300 /* Wait for completion */
1323 while(c->type != CMD_IOCTL_DONE) 1301 while(c->type != CMD_IOCTL_DONE)
1324 schedule(); 1302 schedule();
1325 1303
1326 /* Unmap the DMA */ 1304 /* Unmap the DMA */
1327 pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size, 1305 pci_unmap_single(h->pci_dev, c->req.sg[0].addr, c->req.sg[0].size,
1328 PCI_DMA_BIDIRECTIONAL); 1306 PCI_DMA_BIDIRECTIONAL);
1329 /* Post submit processing */ 1307 /* Post submit processing */
1330 switch(io->cmd) { 1308 switch(io->cmd) {
1331 case PASSTHRU_A: 1309 case PASSTHRU_A:
1332 pci_unmap_single(h->pci_dev, c->req.hdr.blk, 1310 pci_unmap_single(h->pci_dev, c->req.hdr.blk,
1333 sizeof(ida_ioctl_t), 1311 sizeof(ida_ioctl_t),
1334 PCI_DMA_BIDIRECTIONAL); 1312 PCI_DMA_BIDIRECTIONAL);
1335 case IDA_READ: 1313 case IDA_READ:
1336 case DIAG_PASS_THRU: 1314 case DIAG_PASS_THRU:
1337 case SENSE_CONTROLLER_PERFORMANCE: 1315 case SENSE_CONTROLLER_PERFORMANCE:
1338 case READ_FLASH_ROM: 1316 case READ_FLASH_ROM:
1339 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) { 1317 if (copy_to_user(io->sg[0].addr, p, io->sg[0].size)) {
1340 kfree(p); 1318 kfree(p);
1341 return -EFAULT; 1319 return -EFAULT;
1342 } 1320 }
1343 /* fall through and free p */ 1321 /* fall through and free p */
1344 case IDA_WRITE: 1322 case IDA_WRITE:
1345 case IDA_WRITE_MEDIA: 1323 case IDA_WRITE_MEDIA:
1346 case COLLECT_BUFFER: 1324 case COLLECT_BUFFER:
1347 case WRITE_FLASH_ROM: 1325 case WRITE_FLASH_ROM:
1348 kfree(p); 1326 kfree(p);
1349 break; 1327 break;
1350 default:; 1328 default:;
1351 /* Nothing to do */ 1329 /* Nothing to do */
1352 } 1330 }
1353 1331
1354 io->rcode = c->req.hdr.rcode; 1332 io->rcode = c->req.hdr.rcode;
1355 cmd_free(h, c, 0); 1333 cmd_free(h, c, 0);
1356 return(0); 1334 return(0);
1357 } 1335 }
1358 1336
1359 /* 1337 /*
1360 * Commands are pre-allocated in a large block. Here we use a simple bitmap 1338 * Commands are pre-allocated in a large block. Here we use a simple bitmap
1361 * scheme to suballocte them to the driver. Operations that are not time 1339 * scheme to suballocte them to the driver. Operations that are not time
1362 * critical (and can wait for kmalloc and possibly sleep) can pass in NULL 1340 * critical (and can wait for kmalloc and possibly sleep) can pass in NULL
1363 * as the first argument to get a new command. 1341 * as the first argument to get a new command.
1364 */ 1342 */
1365 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool) 1343 static cmdlist_t * cmd_alloc(ctlr_info_t *h, int get_from_pool)
1366 { 1344 {
1367 cmdlist_t * c; 1345 cmdlist_t * c;
1368 int i; 1346 int i;
1369 dma_addr_t cmd_dhandle; 1347 dma_addr_t cmd_dhandle;
1370 1348
1371 if (!get_from_pool) { 1349 if (!get_from_pool) {
1372 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev, 1350 c = (cmdlist_t*)pci_alloc_consistent(h->pci_dev,
1373 sizeof(cmdlist_t), &cmd_dhandle); 1351 sizeof(cmdlist_t), &cmd_dhandle);
1374 if(c==NULL) 1352 if(c==NULL)
1375 return NULL; 1353 return NULL;
1376 } else { 1354 } else {
1377 do { 1355 do {
1378 i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS); 1356 i = find_first_zero_bit(h->cmd_pool_bits, NR_CMDS);
1379 if (i == NR_CMDS) 1357 if (i == NR_CMDS)
1380 return NULL; 1358 return NULL;
1381 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0); 1359 } while(test_and_set_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)) != 0);
1382 c = h->cmd_pool + i; 1360 c = h->cmd_pool + i;
1383 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t); 1361 cmd_dhandle = h->cmd_pool_dhandle + i*sizeof(cmdlist_t);
1384 h->nr_allocs++; 1362 h->nr_allocs++;
1385 } 1363 }
1386 1364
1387 memset(c, 0, sizeof(cmdlist_t)); 1365 memset(c, 0, sizeof(cmdlist_t));
1388 c->busaddr = cmd_dhandle; 1366 c->busaddr = cmd_dhandle;
1389 return c; 1367 return c;
1390 } 1368 }
1391 1369
1392 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool) 1370 static void cmd_free(ctlr_info_t *h, cmdlist_t *c, int got_from_pool)
1393 { 1371 {
1394 int i; 1372 int i;
1395 1373
1396 if (!got_from_pool) { 1374 if (!got_from_pool) {
1397 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c, 1375 pci_free_consistent(h->pci_dev, sizeof(cmdlist_t), c,
1398 c->busaddr); 1376 c->busaddr);
1399 } else { 1377 } else {
1400 i = c - h->cmd_pool; 1378 i = c - h->cmd_pool;
1401 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG)); 1379 clear_bit(i&(BITS_PER_LONG-1), h->cmd_pool_bits+(i/BITS_PER_LONG));
1402 h->nr_frees++; 1380 h->nr_frees++;
1403 } 1381 }
1404 } 1382 }
1405 1383
1406 /*********************************************************************** 1384 /***********************************************************************
1407 name: sendcmd 1385 name: sendcmd
1408 Send a command to an IDA using the memory mapped FIFO interface 1386 Send a command to an IDA using the memory mapped FIFO interface
1409 and wait for it to complete. 1387 and wait for it to complete.
1410 This routine should only be called at init time. 1388 This routine should only be called at init time.
1411 ***********************************************************************/ 1389 ***********************************************************************/
1412 static int sendcmd( 1390 static int sendcmd(
1413 __u8 cmd, 1391 __u8 cmd,
1414 int ctlr, 1392 int ctlr,
1415 void *buff, 1393 void *buff,
1416 size_t size, 1394 size_t size,
1417 unsigned int blk, 1395 unsigned int blk,
1418 unsigned int blkcnt, 1396 unsigned int blkcnt,
1419 unsigned int log_unit ) 1397 unsigned int log_unit )
1420 { 1398 {
1421 cmdlist_t *c; 1399 cmdlist_t *c;
1422 int complete; 1400 int complete;
1423 unsigned long temp; 1401 unsigned long temp;
1424 unsigned long i; 1402 unsigned long i;
1425 ctlr_info_t *info_p = hba[ctlr]; 1403 ctlr_info_t *info_p = hba[ctlr];
1426 1404
1427 c = cmd_alloc(info_p, 1); 1405 c = cmd_alloc(info_p, 1);
1428 if(!c) 1406 if(!c)
1429 return IO_ERROR; 1407 return IO_ERROR;
1430 c->ctlr = ctlr; 1408 c->ctlr = ctlr;
1431 c->hdr.unit = log_unit; 1409 c->hdr.unit = log_unit;
1432 c->hdr.prio = 0; 1410 c->hdr.prio = 0;
1433 c->hdr.size = sizeof(rblk_t) >> 2; 1411 c->hdr.size = sizeof(rblk_t) >> 2;
1434 c->size += sizeof(rblk_t); 1412 c->size += sizeof(rblk_t);
1435 1413
1436 /* The request information. */ 1414 /* The request information. */
1437 c->req.hdr.next = 0; 1415 c->req.hdr.next = 0;
1438 c->req.hdr.rcode = 0; 1416 c->req.hdr.rcode = 0;
1439 c->req.bp = 0; 1417 c->req.bp = 0;
1440 c->req.hdr.sg_cnt = 1; 1418 c->req.hdr.sg_cnt = 1;
1441 c->req.hdr.reserved = 0; 1419 c->req.hdr.reserved = 0;
1442 1420
1443 if (size == 0) 1421 if (size == 0)
1444 c->req.sg[0].size = 512; 1422 c->req.sg[0].size = 512;
1445 else 1423 else
1446 c->req.sg[0].size = size; 1424 c->req.sg[0].size = size;
1447 1425
1448 c->req.hdr.blk = blk; 1426 c->req.hdr.blk = blk;
1449 c->req.hdr.blk_cnt = blkcnt; 1427 c->req.hdr.blk_cnt = blkcnt;
1450 c->req.hdr.cmd = (unsigned char) cmd; 1428 c->req.hdr.cmd = (unsigned char) cmd;
1451 c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev, 1429 c->req.sg[0].addr = (__u32) pci_map_single(info_p->pci_dev,
1452 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL); 1430 buff, c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1453 /* 1431 /*
1454 * Disable interrupt 1432 * Disable interrupt
1455 */ 1433 */
1456 info_p->access.set_intr_mask(info_p, 0); 1434 info_p->access.set_intr_mask(info_p, 0);
1457 /* Make sure there is room in the command FIFO */ 1435 /* Make sure there is room in the command FIFO */
1458 /* Actually it should be completely empty at this time. */ 1436 /* Actually it should be completely empty at this time. */
1459 for (i = 200000; i > 0; i--) { 1437 for (i = 200000; i > 0; i--) {
1460 temp = info_p->access.fifo_full(info_p); 1438 temp = info_p->access.fifo_full(info_p);
1461 if (temp != 0) { 1439 if (temp != 0) {
1462 break; 1440 break;
1463 } 1441 }
1464 udelay(10); 1442 udelay(10);
1465 DBG( 1443 DBG(
1466 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full," 1444 printk(KERN_WARNING "cpqarray ida%d: idaSendPciCmd FIFO full,"
1467 " waiting!\n", ctlr); 1445 " waiting!\n", ctlr);
1468 ); 1446 );
1469 } 1447 }
1470 /* 1448 /*
1471 * Send the cmd 1449 * Send the cmd
1472 */ 1450 */
1473 info_p->access.submit_command(info_p, c); 1451 info_p->access.submit_command(info_p, c);
1474 complete = pollcomplete(ctlr); 1452 complete = pollcomplete(ctlr);
1475 1453
1476 pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr, 1454 pci_unmap_single(info_p->pci_dev, (dma_addr_t) c->req.sg[0].addr,
1477 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL); 1455 c->req.sg[0].size, PCI_DMA_BIDIRECTIONAL);
1478 if (complete != 1) { 1456 if (complete != 1) {
1479 if (complete != c->busaddr) { 1457 if (complete != c->busaddr) {
1480 printk( KERN_WARNING 1458 printk( KERN_WARNING
1481 "cpqarray ida%d: idaSendPciCmd " 1459 "cpqarray ida%d: idaSendPciCmd "
1482 "Invalid command list address returned! (%08lx)\n", 1460 "Invalid command list address returned! (%08lx)\n",
1483 ctlr, (unsigned long)complete); 1461 ctlr, (unsigned long)complete);
1484 cmd_free(info_p, c, 1); 1462 cmd_free(info_p, c, 1);
1485 return (IO_ERROR); 1463 return (IO_ERROR);
1486 } 1464 }
1487 } else { 1465 } else {
1488 printk( KERN_WARNING 1466 printk( KERN_WARNING
1489 "cpqarray ida%d: idaSendPciCmd Timeout out, " 1467 "cpqarray ida%d: idaSendPciCmd Timeout out, "
1490 "No command list address returned!\n", 1468 "No command list address returned!\n",
1491 ctlr); 1469 ctlr);
1492 cmd_free(info_p, c, 1); 1470 cmd_free(info_p, c, 1);
1493 return (IO_ERROR); 1471 return (IO_ERROR);
1494 } 1472 }
1495 1473
1496 if (c->req.hdr.rcode & 0x00FE) { 1474 if (c->req.hdr.rcode & 0x00FE) {
1497 if (!(c->req.hdr.rcode & BIG_PROBLEM)) { 1475 if (!(c->req.hdr.rcode & BIG_PROBLEM)) {
1498 printk( KERN_WARNING 1476 printk( KERN_WARNING
1499 "cpqarray ida%d: idaSendPciCmd, error: " 1477 "cpqarray ida%d: idaSendPciCmd, error: "
1500 "Controller failed at init time " 1478 "Controller failed at init time "
1501 "cmd: 0x%x, return code = 0x%x\n", 1479 "cmd: 0x%x, return code = 0x%x\n",
1502 ctlr, c->req.hdr.cmd, c->req.hdr.rcode); 1480 ctlr, c->req.hdr.cmd, c->req.hdr.rcode);
1503 1481
1504 cmd_free(info_p, c, 1); 1482 cmd_free(info_p, c, 1);
1505 return (IO_ERROR); 1483 return (IO_ERROR);
1506 } 1484 }
1507 } 1485 }
1508 cmd_free(info_p, c, 1); 1486 cmd_free(info_p, c, 1);
1509 return (IO_OK); 1487 return (IO_OK);
1510 } 1488 }
1511 1489
1512 /* 1490 /*
1513 * revalidate_allvol is for online array config utilities. After a 1491 * revalidate_allvol is for online array config utilities. After a
1514 * utility reconfigures the drives in the array, it can use this function 1492 * utility reconfigures the drives in the array, it can use this function
1515 * (through an ioctl) to make the driver zap any previous disk structs for 1493 * (through an ioctl) to make the driver zap any previous disk structs for
1516 * that controller and get new ones. 1494 * that controller and get new ones.
1517 * 1495 *
1518 * Right now I'm using the getgeometry() function to do this, but this 1496 * Right now I'm using the getgeometry() function to do this, but this
1519 * function should probably be finer grained and allow you to revalidate one 1497 * function should probably be finer grained and allow you to revalidate one
1520 * particualar logical volume (instead of all of them on a particular 1498 * particualar logical volume (instead of all of them on a particular
1521 * controller). 1499 * controller).
1522 */ 1500 */
1523 static int revalidate_allvol(ctlr_info_t *host) 1501 static int revalidate_allvol(ctlr_info_t *host)
1524 { 1502 {
1525 int ctlr = host->ctlr; 1503 int ctlr = host->ctlr;
1526 int i; 1504 int i;
1527 unsigned long flags; 1505 unsigned long flags;
1528 1506
1529 spin_lock_irqsave(IDA_LOCK(ctlr), flags); 1507 spin_lock_irqsave(IDA_LOCK(ctlr), flags);
1530 if (host->usage_count > 1) { 1508 if (host->usage_count > 1) {
1531 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags); 1509 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1532 printk(KERN_WARNING "cpqarray: Device busy for volume" 1510 printk(KERN_WARNING "cpqarray: Device busy for volume"
1533 " revalidation (usage=%d)\n", host->usage_count); 1511 " revalidation (usage=%d)\n", host->usage_count);
1534 return -EBUSY; 1512 return -EBUSY;
1535 } 1513 }
1536 host->usage_count++; 1514 host->usage_count++;
1537 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags); 1515 spin_unlock_irqrestore(IDA_LOCK(ctlr), flags);
1538 1516
1539 /* 1517 /*
1540 * Set the partition and block size structures for all volumes 1518 * Set the partition and block size structures for all volumes
1541 * on this controller to zero. We will reread all of this data 1519 * on this controller to zero. We will reread all of this data
1542 */ 1520 */
1543 set_capacity(ida_gendisk[ctlr][0], 0); 1521 set_capacity(ida_gendisk[ctlr][0], 0);
1544 for (i = 1; i < NWD; i++) { 1522 for (i = 1; i < NWD; i++) {
1545 struct gendisk *disk = ida_gendisk[ctlr][i]; 1523 struct gendisk *disk = ida_gendisk[ctlr][i];
1546 if (disk->flags & GENHD_FL_UP) 1524 if (disk->flags & GENHD_FL_UP)
1547 del_gendisk(disk); 1525 del_gendisk(disk);
1548 } 1526 }
1549 memset(host->drv, 0, sizeof(drv_info_t)*NWD); 1527 memset(host->drv, 0, sizeof(drv_info_t)*NWD);
1550 1528
1551 /* 1529 /*
1552 * Tell the array controller not to give us any interrupts while 1530 * Tell the array controller not to give us any interrupts while
1553 * we check the new geometry. Then turn interrupts back on when 1531 * we check the new geometry. Then turn interrupts back on when
1554 * we're done. 1532 * we're done.
1555 */ 1533 */
1556 host->access.set_intr_mask(host, 0); 1534 host->access.set_intr_mask(host, 0);
1557 getgeometry(ctlr); 1535 getgeometry(ctlr);
1558 host->access.set_intr_mask(host, FIFO_NOT_EMPTY); 1536 host->access.set_intr_mask(host, FIFO_NOT_EMPTY);
1559 1537
1560 for(i=0; i<NWD; i++) { 1538 for(i=0; i<NWD; i++) {
1561 struct gendisk *disk = ida_gendisk[ctlr][i]; 1539 struct gendisk *disk = ida_gendisk[ctlr][i];
1562 drv_info_t *drv = &host->drv[i]; 1540 drv_info_t *drv = &host->drv[i];
1563 if (i && !drv->nr_blks) 1541 if (i && !drv->nr_blks)
1564 continue; 1542 continue;
1565 blk_queue_hardsect_size(host->queue, drv->blk_size); 1543 blk_queue_hardsect_size(host->queue, drv->blk_size);
1566 set_capacity(disk, drv->nr_blks); 1544 set_capacity(disk, drv->nr_blks);
1567 disk->queue = host->queue; 1545 disk->queue = host->queue;
1568 disk->private_data = drv; 1546 disk->private_data = drv;
1569 if (i) 1547 if (i)
1570 add_disk(disk); 1548 add_disk(disk);
1571 } 1549 }
1572 1550
1573 host->usage_count--; 1551 host->usage_count--;
1574 return 0; 1552 return 0;
1575 } 1553 }
1576 1554
1577 static int ida_revalidate(struct gendisk *disk) 1555 static int ida_revalidate(struct gendisk *disk)
1578 { 1556 {
1579 drv_info_t *drv = disk->private_data; 1557 drv_info_t *drv = disk->private_data;
1580 set_capacity(disk, drv->nr_blks); 1558 set_capacity(disk, drv->nr_blks);
1581 return 0; 1559 return 0;
1582 } 1560 }
1583 1561
1584 /******************************************************************** 1562 /********************************************************************
1585 name: pollcomplete 1563 name: pollcomplete
1586 Wait polling for a command to complete. 1564 Wait polling for a command to complete.
1587 The memory mapped FIFO is polled for the completion. 1565 The memory mapped FIFO is polled for the completion.
1588 Used only at init time, interrupts disabled. 1566 Used only at init time, interrupts disabled.
1589 ********************************************************************/ 1567 ********************************************************************/
1590 static int pollcomplete(int ctlr) 1568 static int pollcomplete(int ctlr)
1591 { 1569 {
1592 int done; 1570 int done;
1593 int i; 1571 int i;
1594 1572
1595 /* Wait (up to 2 seconds) for a command to complete */ 1573 /* Wait (up to 2 seconds) for a command to complete */
1596 1574
1597 for (i = 200000; i > 0; i--) { 1575 for (i = 200000; i > 0; i--) {
1598 done = hba[ctlr]->access.command_completed(hba[ctlr]); 1576 done = hba[ctlr]->access.command_completed(hba[ctlr]);
1599 if (done == 0) { 1577 if (done == 0) {
1600 udelay(10); /* a short fixed delay */ 1578 udelay(10); /* a short fixed delay */
1601 } else 1579 } else
1602 return (done); 1580 return (done);
1603 } 1581 }
1604 /* Invalid address to tell caller we ran out of time */ 1582 /* Invalid address to tell caller we ran out of time */
1605 return 1; 1583 return 1;
1606 } 1584 }
1607 /***************************************************************** 1585 /*****************************************************************
1608 start_fwbk 1586 start_fwbk
1609 Starts controller firmwares background processing. 1587 Starts controller firmwares background processing.
1610 Currently only the Integrated Raid controller needs this done. 1588 Currently only the Integrated Raid controller needs this done.
1611 If the PCI mem address registers are written to after this, 1589 If the PCI mem address registers are written to after this,
1612 data corruption may occur 1590 data corruption may occur
1613 *****************************************************************/ 1591 *****************************************************************/
1614 static void start_fwbk(int ctlr) 1592 static void start_fwbk(int ctlr)
1615 { 1593 {
1616 id_ctlr_t *id_ctlr_buf; 1594 id_ctlr_t *id_ctlr_buf;
1617 int ret_code; 1595 int ret_code;
1618 1596
1619 if( (hba[ctlr]->board_id != 0x40400E11) 1597 if( (hba[ctlr]->board_id != 0x40400E11)
1620 && (hba[ctlr]->board_id != 0x40480E11) ) 1598 && (hba[ctlr]->board_id != 0x40480E11) )
1621 1599
1622 /* Not a Integrated Raid, so there is nothing for us to do */ 1600 /* Not a Integrated Raid, so there is nothing for us to do */
1623 return; 1601 return;
1624 printk(KERN_DEBUG "cpqarray: Starting firmware's background" 1602 printk(KERN_DEBUG "cpqarray: Starting firmware's background"
1625 " processing\n"); 1603 " processing\n");
1626 /* Command does not return anything, but idasend command needs a 1604 /* Command does not return anything, but idasend command needs a
1627 buffer */ 1605 buffer */
1628 id_ctlr_buf = kmalloc(sizeof(id_ctlr_t), GFP_KERNEL); 1606 id_ctlr_buf = kmalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1629 if(id_ctlr_buf==NULL) 1607 if(id_ctlr_buf==NULL)
1630 { 1608 {
1631 printk(KERN_WARNING "cpqarray: Out of memory. " 1609 printk(KERN_WARNING "cpqarray: Out of memory. "
1632 "Unable to start background processing.\n"); 1610 "Unable to start background processing.\n");
1633 return; 1611 return;
1634 } 1612 }
1635 ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr, 1613 ret_code = sendcmd(RESUME_BACKGROUND_ACTIVITY, ctlr,
1636 id_ctlr_buf, 0, 0, 0, 0); 1614 id_ctlr_buf, 0, 0, 0, 0);
1637 if(ret_code != IO_OK) 1615 if(ret_code != IO_OK)
1638 printk(KERN_WARNING "cpqarray: Unable to start" 1616 printk(KERN_WARNING "cpqarray: Unable to start"
1639 " background processing\n"); 1617 " background processing\n");
1640 1618
1641 kfree(id_ctlr_buf); 1619 kfree(id_ctlr_buf);
1642 } 1620 }
1643 /***************************************************************** 1621 /*****************************************************************
1644 getgeometry 1622 getgeometry
1645 Get ida logical volume geometry from the controller 1623 Get ida logical volume geometry from the controller
1646 This is a large bit of code which once existed in two flavors, 1624 This is a large bit of code which once existed in two flavors,
1647 It is used only at init time. 1625 It is used only at init time.
1648 *****************************************************************/ 1626 *****************************************************************/
1649 static void getgeometry(int ctlr) 1627 static void getgeometry(int ctlr)
1650 { 1628 {
1651 id_log_drv_t *id_ldrive; 1629 id_log_drv_t *id_ldrive;
1652 id_ctlr_t *id_ctlr_buf; 1630 id_ctlr_t *id_ctlr_buf;
1653 sense_log_drv_stat_t *id_lstatus_buf; 1631 sense_log_drv_stat_t *id_lstatus_buf;
1654 config_t *sense_config_buf; 1632 config_t *sense_config_buf;
1655 unsigned int log_unit, log_index; 1633 unsigned int log_unit, log_index;
1656 int ret_code, size; 1634 int ret_code, size;
1657 drv_info_t *drv; 1635 drv_info_t *drv;
1658 ctlr_info_t *info_p = hba[ctlr]; 1636 ctlr_info_t *info_p = hba[ctlr];
1659 int i; 1637 int i;
1660 1638
1661 info_p->log_drv_map = 0; 1639 info_p->log_drv_map = 0;
1662 1640
1663 id_ldrive = kzalloc(sizeof(id_log_drv_t), GFP_KERNEL); 1641 id_ldrive = kzalloc(sizeof(id_log_drv_t), GFP_KERNEL);
1664 if (!id_ldrive) { 1642 if (!id_ldrive) {
1665 printk( KERN_ERR "cpqarray: out of memory.\n"); 1643 printk( KERN_ERR "cpqarray: out of memory.\n");
1666 goto err_0; 1644 goto err_0;
1667 } 1645 }
1668 1646
1669 id_ctlr_buf = kzalloc(sizeof(id_ctlr_t), GFP_KERNEL); 1647 id_ctlr_buf = kzalloc(sizeof(id_ctlr_t), GFP_KERNEL);
1670 if (!id_ctlr_buf) { 1648 if (!id_ctlr_buf) {
1671 printk( KERN_ERR "cpqarray: out of memory.\n"); 1649 printk( KERN_ERR "cpqarray: out of memory.\n");
1672 goto err_1; 1650 goto err_1;
1673 } 1651 }
1674 1652
1675 id_lstatus_buf = kzalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL); 1653 id_lstatus_buf = kzalloc(sizeof(sense_log_drv_stat_t), GFP_KERNEL);
1676 if (!id_lstatus_buf) { 1654 if (!id_lstatus_buf) {
1677 printk( KERN_ERR "cpqarray: out of memory.\n"); 1655 printk( KERN_ERR "cpqarray: out of memory.\n");
1678 goto err_2; 1656 goto err_2;
1679 } 1657 }
1680 1658
1681 sense_config_buf = kzalloc(sizeof(config_t), GFP_KERNEL); 1659 sense_config_buf = kzalloc(sizeof(config_t), GFP_KERNEL);
1682 if (!sense_config_buf) { 1660 if (!sense_config_buf) {
1683 printk( KERN_ERR "cpqarray: out of memory.\n"); 1661 printk( KERN_ERR "cpqarray: out of memory.\n");
1684 goto err_3; 1662 goto err_3;
1685 } 1663 }
1686 1664
1687 info_p->phys_drives = 0; 1665 info_p->phys_drives = 0;
1688 info_p->log_drv_map = 0; 1666 info_p->log_drv_map = 0;
1689 info_p->drv_assign_map = 0; 1667 info_p->drv_assign_map = 0;
1690 info_p->drv_spare_map = 0; 1668 info_p->drv_spare_map = 0;
1691 info_p->mp_failed_drv_map = 0; /* only initialized here */ 1669 info_p->mp_failed_drv_map = 0; /* only initialized here */
1692 /* Get controllers info for this logical drive */ 1670 /* Get controllers info for this logical drive */
1693 ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0); 1671 ret_code = sendcmd(ID_CTLR, ctlr, id_ctlr_buf, 0, 0, 0, 0);
1694 if (ret_code == IO_ERROR) { 1672 if (ret_code == IO_ERROR) {
1695 /* 1673 /*
1696 * If can't get controller info, set the logical drive map to 0, 1674 * If can't get controller info, set the logical drive map to 0,
1697 * so the idastubopen will fail on all logical drives 1675 * so the idastubopen will fail on all logical drives
1698 * on the controller. 1676 * on the controller.
1699 */ 1677 */
1700 printk(KERN_ERR "cpqarray: error sending ID controller\n"); 1678 printk(KERN_ERR "cpqarray: error sending ID controller\n");
1701 goto err_4; 1679 goto err_4;
1702 } 1680 }
1703 1681
1704 info_p->log_drives = id_ctlr_buf->nr_drvs; 1682 info_p->log_drives = id_ctlr_buf->nr_drvs;
1705 for(i=0;i<4;i++) 1683 for(i=0;i<4;i++)
1706 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i]; 1684 info_p->firm_rev[i] = id_ctlr_buf->firm_rev[i];
1707 info_p->ctlr_sig = id_ctlr_buf->cfg_sig; 1685 info_p->ctlr_sig = id_ctlr_buf->cfg_sig;
1708 1686
1709 printk(" (%s)\n", info_p->product_name); 1687 printk(" (%s)\n", info_p->product_name);
1710 /* 1688 /*
1711 * Initialize logical drive map to zero 1689 * Initialize logical drive map to zero
1712 */ 1690 */
1713 log_index = 0; 1691 log_index = 0;
1714 /* 1692 /*
1715 * Get drive geometry for all logical drives 1693 * Get drive geometry for all logical drives
1716 */ 1694 */
1717 if (id_ctlr_buf->nr_drvs > 16) 1695 if (id_ctlr_buf->nr_drvs > 16)
1718 printk(KERN_WARNING "cpqarray ida%d: This driver supports " 1696 printk(KERN_WARNING "cpqarray ida%d: This driver supports "
1719 "16 logical drives per controller.\n. " 1697 "16 logical drives per controller.\n. "
1720 " Additional drives will not be " 1698 " Additional drives will not be "
1721 "detected\n", ctlr); 1699 "detected\n", ctlr);
1722 1700
1723 for (log_unit = 0; 1701 for (log_unit = 0;
1724 (log_index < id_ctlr_buf->nr_drvs) 1702 (log_index < id_ctlr_buf->nr_drvs)
1725 && (log_unit < NWD); 1703 && (log_unit < NWD);
1726 log_unit++) { 1704 log_unit++) {
1727 size = sizeof(sense_log_drv_stat_t); 1705 size = sizeof(sense_log_drv_stat_t);
1728 1706
1729 /* 1707 /*
1730 Send "Identify logical drive status" cmd 1708 Send "Identify logical drive status" cmd
1731 */ 1709 */
1732 ret_code = sendcmd(SENSE_LOG_DRV_STAT, 1710 ret_code = sendcmd(SENSE_LOG_DRV_STAT,
1733 ctlr, id_lstatus_buf, size, 0, 0, log_unit); 1711 ctlr, id_lstatus_buf, size, 0, 0, log_unit);
1734 if (ret_code == IO_ERROR) { 1712 if (ret_code == IO_ERROR) {
1735 /* 1713 /*
1736 If can't get logical drive status, set 1714 If can't get logical drive status, set
1737 the logical drive map to 0, so the 1715 the logical drive map to 0, so the
1738 idastubopen will fail for all logical drives 1716 idastubopen will fail for all logical drives
1739 on the controller. 1717 on the controller.
1740 */ 1718 */
1741 info_p->log_drv_map = 0; 1719 info_p->log_drv_map = 0;
1742 printk( KERN_WARNING 1720 printk( KERN_WARNING
1743 "cpqarray ida%d: idaGetGeometry - Controller" 1721 "cpqarray ida%d: idaGetGeometry - Controller"
1744 " failed to report status of logical drive %d\n" 1722 " failed to report status of logical drive %d\n"
1745 "Access to this controller has been disabled\n", 1723 "Access to this controller has been disabled\n",
1746 ctlr, log_unit); 1724 ctlr, log_unit);
1747 goto err_4; 1725 goto err_4;
1748 } 1726 }
1749 /* 1727 /*
1750 Make sure the logical drive is configured 1728 Make sure the logical drive is configured
1751 */ 1729 */
1752 if (id_lstatus_buf->status != LOG_NOT_CONF) { 1730 if (id_lstatus_buf->status != LOG_NOT_CONF) {
1753 ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive, 1731 ret_code = sendcmd(ID_LOG_DRV, ctlr, id_ldrive,
1754 sizeof(id_log_drv_t), 0, 0, log_unit); 1732 sizeof(id_log_drv_t), 0, 0, log_unit);
1755 /* 1733 /*
1756 If error, the bit for this 1734 If error, the bit for this
1757 logical drive won't be set and 1735 logical drive won't be set and
1758 idastubopen will return error. 1736 idastubopen will return error.
1759 */ 1737 */
1760 if (ret_code != IO_ERROR) { 1738 if (ret_code != IO_ERROR) {
1761 drv = &info_p->drv[log_unit]; 1739 drv = &info_p->drv[log_unit];
1762 drv->blk_size = id_ldrive->blk_size; 1740 drv->blk_size = id_ldrive->blk_size;
1763 drv->nr_blks = id_ldrive->nr_blks; 1741 drv->nr_blks = id_ldrive->nr_blks;
1764 drv->cylinders = id_ldrive->drv.cyl; 1742 drv->cylinders = id_ldrive->drv.cyl;
1765 drv->heads = id_ldrive->drv.heads; 1743 drv->heads = id_ldrive->drv.heads;
1766 drv->sectors = id_ldrive->drv.sect_per_track; 1744 drv->sectors = id_ldrive->drv.sect_per_track;
1767 info_p->log_drv_map |= (1 << log_unit); 1745 info_p->log_drv_map |= (1 << log_unit);
1768 1746
1769 printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n", 1747 printk(KERN_INFO "cpqarray ida/c%dd%d: blksz=%d nr_blks=%d\n",
1770 ctlr, log_unit, drv->blk_size, drv->nr_blks); 1748 ctlr, log_unit, drv->blk_size, drv->nr_blks);
1771 ret_code = sendcmd(SENSE_CONFIG, 1749 ret_code = sendcmd(SENSE_CONFIG,
1772 ctlr, sense_config_buf, 1750 ctlr, sense_config_buf,
1773 sizeof(config_t), 0, 0, log_unit); 1751 sizeof(config_t), 0, 0, log_unit);
1774 if (ret_code == IO_ERROR) { 1752 if (ret_code == IO_ERROR) {
1775 info_p->log_drv_map = 0; 1753 info_p->log_drv_map = 0;
1776 printk(KERN_ERR "cpqarray: error sending sense config\n"); 1754 printk(KERN_ERR "cpqarray: error sending sense config\n");
1777 goto err_4; 1755 goto err_4;
1778 } 1756 }
1779 1757
1780 info_p->phys_drives = 1758 info_p->phys_drives =
1781 sense_config_buf->ctlr_phys_drv; 1759 sense_config_buf->ctlr_phys_drv;
1782 info_p->drv_assign_map 1760 info_p->drv_assign_map
1783 |= sense_config_buf->drv_asgn_map; 1761 |= sense_config_buf->drv_asgn_map;
1784 info_p->drv_assign_map 1762 info_p->drv_assign_map
1785 |= sense_config_buf->spare_asgn_map; 1763 |= sense_config_buf->spare_asgn_map;
1786 info_p->drv_spare_map 1764 info_p->drv_spare_map
1787 |= sense_config_buf->spare_asgn_map; 1765 |= sense_config_buf->spare_asgn_map;
1788 } /* end of if no error on id_ldrive */ 1766 } /* end of if no error on id_ldrive */
1789 log_index = log_index + 1; 1767 log_index = log_index + 1;
1790 } /* end of if logical drive configured */ 1768 } /* end of if logical drive configured */
1791 } /* end of for log_unit */ 1769 } /* end of for log_unit */
1792 1770
1793 /* Free all the buffers and return */ 1771 /* Free all the buffers and return */
1794 err_4: 1772 err_4:
1795 kfree(sense_config_buf); 1773 kfree(sense_config_buf);
1796 err_3: 1774 err_3:
1797 kfree(id_lstatus_buf); 1775 kfree(id_lstatus_buf);
1798 err_2: 1776 err_2:
1799 kfree(id_ctlr_buf); 1777 kfree(id_ctlr_buf);
1800 err_1: 1778 err_1:
1801 kfree(id_ldrive); 1779 kfree(id_ldrive);
1802 err_0: 1780 err_0:
1803 return; 1781 return;
1804 } 1782 }
1805 1783
1806 static void __exit cpqarray_exit(void) 1784 static void __exit cpqarray_exit(void)
1807 { 1785 {
1808 int i; 1786 int i;
1809 1787
1810 pci_unregister_driver(&cpqarray_pci_driver); 1788 pci_unregister_driver(&cpqarray_pci_driver);
1811 1789
1812 /* Double check that all controller entries have been removed */ 1790 /* Double check that all controller entries have been removed */
1813 for(i=0; i<MAX_CTLR; i++) { 1791 for(i=0; i<MAX_CTLR; i++) {
1814 if (hba[i] != NULL) { 1792 if (hba[i] != NULL) {
1815 printk(KERN_WARNING "cpqarray: Removing EISA " 1793 printk(KERN_WARNING "cpqarray: Removing EISA "
1816 "controller %d\n", i); 1794 "controller %d\n", i);
1817 cpqarray_remove_one_eisa(i); 1795 cpqarray_remove_one_eisa(i);
1818 } 1796 }
1819 } 1797 }
1820 1798
1821 remove_proc_entry("cpqarray", proc_root_driver); 1799 remove_proc_entry("cpqarray", proc_root_driver);
1822 } 1800 }
1823 1801
1824 module_init(cpqarray_init) 1802 module_init(cpqarray_init)