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Commit f1608f859a3fba95a3b0ae70f2528b81c6928d77

Authored by Stephen Hemminger
Committed by David S. Miller
1 parent efda072393
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

tms380tr: convert to net_device_ops 

Conver this related group of drivers to new API

Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Showing 4 changed files with 23 additions and 13 deletions Inline Diff

drivers/net/tokenring/abyss.c
Diff comments   View file @ f1608f8
1 /* 1 /*
2 * abyss.c: Network driver for the Madge Smart 16/4 PCI Mk2 token ring card. 2 * abyss.c: Network driver for the Madge Smart 16/4 PCI Mk2 token ring card.
3 * 3 *
4 * Written 1999-2000 by Adam Fritzler 4 * Written 1999-2000 by Adam Fritzler
5 * 5 *
6 * This software may be used and distributed according to the terms 6 * This software may be used and distributed according to the terms
7 * of the GNU General Public License, incorporated herein by reference. 7 * of the GNU General Public License, incorporated herein by reference.
8 * 8 *
9 * This driver module supports the following cards: 9 * This driver module supports the following cards:
10 * - Madge Smart 16/4 PCI Mk2 10 * - Madge Smart 16/4 PCI Mk2
11 * 11 *
12 * Maintainer(s): 12 * Maintainer(s):
13 * AF Adam Fritzler 13 * AF Adam Fritzler
14 * 14 *
15 * Modification History: 15 * Modification History:
16 * 30-Dec-99 AF Split off from the tms380tr driver. 16 * 30-Dec-99 AF Split off from the tms380tr driver.
17 * 22-Jan-00 AF Updated to use indirect read/writes 17 * 22-Jan-00 AF Updated to use indirect read/writes
18 * 23-Nov-00 JG New PCI API, cleanups 18 * 23-Nov-00 JG New PCI API, cleanups
19 * 19 *
20 * 20 *
21 * TODO: 21 * TODO:
22 * 1. See if we can use MMIO instead of inb/outb/inw/outw 22 * 1. See if we can use MMIO instead of inb/outb/inw/outw
23 * 2. Add support for Mk1 (has AT24 attached to the PCI 23 * 2. Add support for Mk1 (has AT24 attached to the PCI
24 * config registers) 24 * config registers)
25 * 25 *
26 */ 26 */
27 27
28 #include <linux/module.h> 28 #include <linux/module.h>
29 #include <linux/kernel.h> 29 #include <linux/kernel.h>
30 #include <linux/errno.h> 30 #include <linux/errno.h>
31 #include <linux/pci.h> 31 #include <linux/pci.h>
32 #include <linux/init.h> 32 #include <linux/init.h>
33 #include <linux/netdevice.h> 33 #include <linux/netdevice.h>
34 #include <linux/trdevice.h> 34 #include <linux/trdevice.h>
35 35
36 #include <asm/system.h> 36 #include <asm/system.h>
37 #include <asm/io.h> 37 #include <asm/io.h>
38 #include <asm/irq.h> 38 #include <asm/irq.h>
39 39
40 #include "tms380tr.h" 40 #include "tms380tr.h"
41 #include "abyss.h" /* Madge-specific constants */ 41 #include "abyss.h" /* Madge-specific constants */
42 42
43 static char version[] __devinitdata = 43 static char version[] __devinitdata =
44 "abyss.c: v1.02 23/11/2000 by Adam Fritzler\n"; 44 "abyss.c: v1.02 23/11/2000 by Adam Fritzler\n";
45 45
46 #define ABYSS_IO_EXTENT 64 46 #define ABYSS_IO_EXTENT 64
47 47
48 static struct pci_device_id abyss_pci_tbl[] = { 48 static struct pci_device_id abyss_pci_tbl[] = {
49 { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_MK2, 49 { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_MK2,
50 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_TOKEN_RING << 8, 0x00ffffff, }, 50 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_TOKEN_RING << 8, 0x00ffffff, },
51 { } /* Terminating entry */ 51 { } /* Terminating entry */
52 }; 52 };
53 MODULE_DEVICE_TABLE(pci, abyss_pci_tbl); 53 MODULE_DEVICE_TABLE(pci, abyss_pci_tbl);
54 54
55 MODULE_LICENSE("GPL"); 55 MODULE_LICENSE("GPL");
56 56
57 static int abyss_open(struct net_device *dev); 57 static int abyss_open(struct net_device *dev);
58 static int abyss_close(struct net_device *dev); 58 static int abyss_close(struct net_device *dev);
59 static void abyss_enable(struct net_device *dev); 59 static void abyss_enable(struct net_device *dev);
60 static int abyss_chipset_init(struct net_device *dev); 60 static int abyss_chipset_init(struct net_device *dev);
61 static void abyss_read_eeprom(struct net_device *dev); 61 static void abyss_read_eeprom(struct net_device *dev);
62 static unsigned short abyss_setnselout_pins(struct net_device *dev); 62 static unsigned short abyss_setnselout_pins(struct net_device *dev);
63 63
64 static void at24_writedatabyte(unsigned long regaddr, unsigned char byte); 64 static void at24_writedatabyte(unsigned long regaddr, unsigned char byte);
65 static int at24_sendfullcmd(unsigned long regaddr, unsigned char cmd, unsigned char addr); 65 static int at24_sendfullcmd(unsigned long regaddr, unsigned char cmd, unsigned char addr);
66 static int at24_sendcmd(unsigned long regaddr, unsigned char cmd); 66 static int at24_sendcmd(unsigned long regaddr, unsigned char cmd);
67 static unsigned char at24_readdatabit(unsigned long regaddr); 67 static unsigned char at24_readdatabit(unsigned long regaddr);
68 static unsigned char at24_readdatabyte(unsigned long regaddr); 68 static unsigned char at24_readdatabyte(unsigned long regaddr);
69 static int at24_waitforack(unsigned long regaddr); 69 static int at24_waitforack(unsigned long regaddr);
70 static int at24_waitfornack(unsigned long regaddr); 70 static int at24_waitfornack(unsigned long regaddr);
71 static void at24_setlines(unsigned long regaddr, unsigned char clock, unsigned char data); 71 static void at24_setlines(unsigned long regaddr, unsigned char clock, unsigned char data);
72 static void at24_start(unsigned long regaddr); 72 static void at24_start(unsigned long regaddr);
73 static unsigned char at24_readb(unsigned long regaddr, unsigned char addr); 73 static unsigned char at24_readb(unsigned long regaddr, unsigned char addr);
74 74
75 static unsigned short abyss_sifreadb(struct net_device *dev, unsigned short reg) 75 static unsigned short abyss_sifreadb(struct net_device *dev, unsigned short reg)
76 { 76 {
77 return inb(dev->base_addr + reg); 77 return inb(dev->base_addr + reg);
78 } 78 }
79 79
80 static unsigned short abyss_sifreadw(struct net_device *dev, unsigned short reg) 80 static unsigned short abyss_sifreadw(struct net_device *dev, unsigned short reg)
81 { 81 {
82 return inw(dev->base_addr + reg); 82 return inw(dev->base_addr + reg);
83 } 83 }
84 84
85 static void abyss_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg) 85 static void abyss_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)
86 { 86 {
87 outb(val, dev->base_addr + reg); 87 outb(val, dev->base_addr + reg);
88 } 88 }
89 89
90 static void abyss_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg) 90 static void abyss_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)
91 { 91 {
92 outw(val, dev->base_addr + reg); 92 outw(val, dev->base_addr + reg);
93 } 93 }
94 94
95 static struct net_device_ops abyss_netdev_ops;
96
95 static int __devinit abyss_attach(struct pci_dev *pdev, const struct pci_device_id *ent) 97 static int __devinit abyss_attach(struct pci_dev *pdev, const struct pci_device_id *ent)
96 { 98 {
97 static int versionprinted; 99 static int versionprinted;
98 struct net_device *dev; 100 struct net_device *dev;
99 struct net_local *tp; 101 struct net_local *tp;
100 int ret, pci_irq_line; 102 int ret, pci_irq_line;
101 unsigned long pci_ioaddr; 103 unsigned long pci_ioaddr;
102 104
103 if (versionprinted++ == 0) 105 if (versionprinted++ == 0)
104 printk("%s", version); 106 printk("%s", version);
105 107
106 if (pci_enable_device(pdev)) 108 if (pci_enable_device(pdev))
107 return -EIO; 109 return -EIO;
108 110
109 /* Remove I/O space marker in bit 0. */ 111 /* Remove I/O space marker in bit 0. */
110 pci_irq_line = pdev->irq; 112 pci_irq_line = pdev->irq;
111 pci_ioaddr = pci_resource_start (pdev, 0); 113 pci_ioaddr = pci_resource_start (pdev, 0);
112 114
113 /* At this point we have found a valid card. */ 115 /* At this point we have found a valid card. */
114 116
115 dev = alloc_trdev(sizeof(struct net_local)); 117 dev = alloc_trdev(sizeof(struct net_local));
116 if (!dev) 118 if (!dev)
117 return -ENOMEM; 119 return -ENOMEM;
118 120
119 if (!request_region(pci_ioaddr, ABYSS_IO_EXTENT, dev->name)) { 121 if (!request_region(pci_ioaddr, ABYSS_IO_EXTENT, dev->name)) {
120 ret = -EBUSY; 122 ret = -EBUSY;
121 goto err_out_trdev; 123 goto err_out_trdev;
122 } 124 }
123 125
124 ret = request_irq(pdev->irq, tms380tr_interrupt, IRQF_SHARED, 126 ret = request_irq(pdev->irq, tms380tr_interrupt, IRQF_SHARED,
125 dev->name, dev); 127 dev->name, dev);
126 if (ret) 128 if (ret)
127 goto err_out_region; 129 goto err_out_region;
128 130
129 dev->base_addr = pci_ioaddr; 131 dev->base_addr = pci_ioaddr;
130 dev->irq = pci_irq_line; 132 dev->irq = pci_irq_line;
131 133
132 printk("%s: Madge Smart 16/4 PCI Mk2 (Abyss)\n", dev->name); 134 printk("%s: Madge Smart 16/4 PCI Mk2 (Abyss)\n", dev->name);
133 printk("%s: IO: %#4lx IRQ: %d\n", 135 printk("%s: IO: %#4lx IRQ: %d\n",
134 dev->name, pci_ioaddr, dev->irq); 136 dev->name, pci_ioaddr, dev->irq);
135 /* 137 /*
136 * The TMS SIF registers lay 0x10 above the card base address. 138 * The TMS SIF registers lay 0x10 above the card base address.
137 */ 139 */
138 dev->base_addr += 0x10; 140 dev->base_addr += 0x10;
139 141
140 ret = tmsdev_init(dev, &pdev->dev); 142 ret = tmsdev_init(dev, &pdev->dev);
141 if (ret) { 143 if (ret) {
142 printk("%s: unable to get memory for dev->priv.\n", 144 printk("%s: unable to get memory for dev->priv.\n",
143 dev->name); 145 dev->name);
144 goto err_out_irq; 146 goto err_out_irq;
145 } 147 }
146 148
147 abyss_read_eeprom(dev); 149 abyss_read_eeprom(dev);
148 150
149 printk("%s: Ring Station Address: %pM\n", dev->name, dev->dev_addr); 151 printk("%s: Ring Station Address: %pM\n", dev->name, dev->dev_addr);
150 152
151 tp = netdev_priv(dev); 153 tp = netdev_priv(dev);
152 tp->setnselout = abyss_setnselout_pins; 154 tp->setnselout = abyss_setnselout_pins;
153 tp->sifreadb = abyss_sifreadb; 155 tp->sifreadb = abyss_sifreadb;
154 tp->sifreadw = abyss_sifreadw; 156 tp->sifreadw = abyss_sifreadw;
155 tp->sifwriteb = abyss_sifwriteb; 157 tp->sifwriteb = abyss_sifwriteb;
156 tp->sifwritew = abyss_sifwritew; 158 tp->sifwritew = abyss_sifwritew;
157 159
158 memcpy(tp->ProductID, "Madge PCI 16/4 Mk2", PROD_ID_SIZE + 1); 160 memcpy(tp->ProductID, "Madge PCI 16/4 Mk2", PROD_ID_SIZE + 1);
159 161
160 dev->open = abyss_open; 162 dev->netdev_ops = &abyss_netdev_ops;
161 dev->stop = abyss_close;
162 163
163 pci_set_drvdata(pdev, dev); 164 pci_set_drvdata(pdev, dev);
164 SET_NETDEV_DEV(dev, &pdev->dev); 165 SET_NETDEV_DEV(dev, &pdev->dev);
165 166
166 ret = register_netdev(dev); 167 ret = register_netdev(dev);
167 if (ret) 168 if (ret)
168 goto err_out_tmsdev; 169 goto err_out_tmsdev;
169 return 0; 170 return 0;
170 171
171 err_out_tmsdev: 172 err_out_tmsdev:
172 pci_set_drvdata(pdev, NULL); 173 pci_set_drvdata(pdev, NULL);
173 tmsdev_term(dev); 174 tmsdev_term(dev);
174 err_out_irq: 175 err_out_irq:
175 free_irq(pdev->irq, dev); 176 free_irq(pdev->irq, dev);
176 err_out_region: 177 err_out_region:
177 release_region(pci_ioaddr, ABYSS_IO_EXTENT); 178 release_region(pci_ioaddr, ABYSS_IO_EXTENT);
178 err_out_trdev: 179 err_out_trdev:
179 free_netdev(dev); 180 free_netdev(dev);
180 return ret; 181 return ret;
181 } 182 }
182 183
183 static unsigned short abyss_setnselout_pins(struct net_device *dev) 184 static unsigned short abyss_setnselout_pins(struct net_device *dev)
184 { 185 {
185 unsigned short val = 0; 186 unsigned short val = 0;
186 struct net_local *tp = netdev_priv(dev); 187 struct net_local *tp = netdev_priv(dev);
187 188
188 if(tp->DataRate == SPEED_4) 189 if(tp->DataRate == SPEED_4)
189 val |= 0x01; /* Set 4Mbps */ 190 val |= 0x01; /* Set 4Mbps */
190 else 191 else
191 val |= 0x00; /* Set 16Mbps */ 192 val |= 0x00; /* Set 16Mbps */
192 193
193 return val; 194 return val;
194 } 195 }
195 196
196 /* 197 /*
197 * The following Madge boards should use this code: 198 * The following Madge boards should use this code:
198 * - Smart 16/4 PCI Mk2 (Abyss) 199 * - Smart 16/4 PCI Mk2 (Abyss)
199 * - Smart 16/4 PCI Mk1 (PCI T) 200 * - Smart 16/4 PCI Mk1 (PCI T)
200 * - Smart 16/4 Client Plus PnP (Big Apple) 201 * - Smart 16/4 Client Plus PnP (Big Apple)
201 * - Smart 16/4 Cardbus Mk2 202 * - Smart 16/4 Cardbus Mk2
202 * 203 *
203 * These access an Atmel AT24 SEEPROM using their glue chip registers. 204 * These access an Atmel AT24 SEEPROM using their glue chip registers.
204 * 205 *
205 */ 206 */
206 static void at24_writedatabyte(unsigned long regaddr, unsigned char byte) 207 static void at24_writedatabyte(unsigned long regaddr, unsigned char byte)
207 { 208 {
208 int i; 209 int i;
209 210
210 for (i = 0; i < 8; i++) { 211 for (i = 0; i < 8; i++) {
211 at24_setlines(regaddr, 0, (byte >> (7-i))&0x01); 212 at24_setlines(regaddr, 0, (byte >> (7-i))&0x01);
212 at24_setlines(regaddr, 1, (byte >> (7-i))&0x01); 213 at24_setlines(regaddr, 1, (byte >> (7-i))&0x01);
213 at24_setlines(regaddr, 0, (byte >> (7-i))&0x01); 214 at24_setlines(regaddr, 0, (byte >> (7-i))&0x01);
214 } 215 }
215 } 216 }
216 217
217 static int at24_sendfullcmd(unsigned long regaddr, unsigned char cmd, unsigned char addr) 218 static int at24_sendfullcmd(unsigned long regaddr, unsigned char cmd, unsigned char addr)
218 { 219 {
219 if (at24_sendcmd(regaddr, cmd)) { 220 if (at24_sendcmd(regaddr, cmd)) {
220 at24_writedatabyte(regaddr, addr); 221 at24_writedatabyte(regaddr, addr);
221 return at24_waitforack(regaddr); 222 return at24_waitforack(regaddr);
222 } 223 }
223 return 0; 224 return 0;
224 } 225 }
225 226
226 static int at24_sendcmd(unsigned long regaddr, unsigned char cmd) 227 static int at24_sendcmd(unsigned long regaddr, unsigned char cmd)
227 { 228 {
228 int i; 229 int i;
229 230
230 for (i = 0; i < 10; i++) { 231 for (i = 0; i < 10; i++) {
231 at24_start(regaddr); 232 at24_start(regaddr);
232 at24_writedatabyte(regaddr, cmd); 233 at24_writedatabyte(regaddr, cmd);
233 if (at24_waitforack(regaddr)) 234 if (at24_waitforack(regaddr))
234 return 1; 235 return 1;
235 } 236 }
236 return 0; 237 return 0;
237 } 238 }
238 239
239 static unsigned char at24_readdatabit(unsigned long regaddr) 240 static unsigned char at24_readdatabit(unsigned long regaddr)
240 { 241 {
241 unsigned char val; 242 unsigned char val;
242 243
243 at24_setlines(regaddr, 0, 1); 244 at24_setlines(regaddr, 0, 1);
244 at24_setlines(regaddr, 1, 1); 245 at24_setlines(regaddr, 1, 1);
245 val = (inb(regaddr) & AT24_DATA)?1:0; 246 val = (inb(regaddr) & AT24_DATA)?1:0;
246 at24_setlines(regaddr, 1, 1); 247 at24_setlines(regaddr, 1, 1);
247 at24_setlines(regaddr, 0, 1); 248 at24_setlines(regaddr, 0, 1);
248 return val; 249 return val;
249 } 250 }
250 251
251 static unsigned char at24_readdatabyte(unsigned long regaddr) 252 static unsigned char at24_readdatabyte(unsigned long regaddr)
252 { 253 {
253 unsigned char data = 0; 254 unsigned char data = 0;
254 int i; 255 int i;
255 256
256 for (i = 0; i < 8; i++) { 257 for (i = 0; i < 8; i++) {
257 data <<= 1; 258 data <<= 1;
258 data |= at24_readdatabit(regaddr); 259 data |= at24_readdatabit(regaddr);
259 } 260 }
260 261
261 return data; 262 return data;
262 } 263 }
263 264
264 static int at24_waitforack(unsigned long regaddr) 265 static int at24_waitforack(unsigned long regaddr)
265 { 266 {
266 int i; 267 int i;
267 268
268 for (i = 0; i < 10; i++) { 269 for (i = 0; i < 10; i++) {
269 if ((at24_readdatabit(regaddr) & 0x01) == 0x00) 270 if ((at24_readdatabit(regaddr) & 0x01) == 0x00)
270 return 1; 271 return 1;
271 } 272 }
272 return 0; 273 return 0;
273 } 274 }
274 275
275 static int at24_waitfornack(unsigned long regaddr) 276 static int at24_waitfornack(unsigned long regaddr)
276 { 277 {
277 int i; 278 int i;
278 for (i = 0; i < 10; i++) { 279 for (i = 0; i < 10; i++) {
279 if ((at24_readdatabit(regaddr) & 0x01) == 0x01) 280 if ((at24_readdatabit(regaddr) & 0x01) == 0x01)
280 return 1; 281 return 1;
281 } 282 }
282 return 0; 283 return 0;
283 } 284 }
284 285
285 static void at24_setlines(unsigned long regaddr, unsigned char clock, unsigned char data) 286 static void at24_setlines(unsigned long regaddr, unsigned char clock, unsigned char data)
286 { 287 {
287 unsigned char val = AT24_ENABLE; 288 unsigned char val = AT24_ENABLE;
288 if (clock) 289 if (clock)
289 val |= AT24_CLOCK; 290 val |= AT24_CLOCK;
290 if (data) 291 if (data)
291 val |= AT24_DATA; 292 val |= AT24_DATA;
292 293
293 outb(val, regaddr); 294 outb(val, regaddr);
294 tms380tr_wait(20); /* Very necessary. */ 295 tms380tr_wait(20); /* Very necessary. */
295 } 296 }
296 297
297 static void at24_start(unsigned long regaddr) 298 static void at24_start(unsigned long regaddr)
298 { 299 {
299 at24_setlines(regaddr, 0, 1); 300 at24_setlines(regaddr, 0, 1);
300 at24_setlines(regaddr, 1, 1); 301 at24_setlines(regaddr, 1, 1);
301 at24_setlines(regaddr, 1, 0); 302 at24_setlines(regaddr, 1, 0);
302 at24_setlines(regaddr, 0, 1); 303 at24_setlines(regaddr, 0, 1);
303 } 304 }
304 305
305 static unsigned char at24_readb(unsigned long regaddr, unsigned char addr) 306 static unsigned char at24_readb(unsigned long regaddr, unsigned char addr)
306 { 307 {
307 unsigned char data = 0xff; 308 unsigned char data = 0xff;
308 309
309 if (at24_sendfullcmd(regaddr, AT24_WRITE, addr)) { 310 if (at24_sendfullcmd(regaddr, AT24_WRITE, addr)) {
310 if (at24_sendcmd(regaddr, AT24_READ)) { 311 if (at24_sendcmd(regaddr, AT24_READ)) {
311 data = at24_readdatabyte(regaddr); 312 data = at24_readdatabyte(regaddr);
312 if (!at24_waitfornack(regaddr)) 313 if (!at24_waitfornack(regaddr))
313 data = 0xff; 314 data = 0xff;
314 } 315 }
315 } 316 }
316 return data; 317 return data;
317 } 318 }
318 319
319 320
320 /* 321 /*
321 * Enable basic functions of the Madge chipset needed 322 * Enable basic functions of the Madge chipset needed
322 * for initialization. 323 * for initialization.
323 */ 324 */
324 static void abyss_enable(struct net_device *dev) 325 static void abyss_enable(struct net_device *dev)
325 { 326 {
326 unsigned char reset_reg; 327 unsigned char reset_reg;
327 unsigned long ioaddr; 328 unsigned long ioaddr;
328 329
329 ioaddr = dev->base_addr; 330 ioaddr = dev->base_addr;
330 reset_reg = inb(ioaddr + PCIBM2_RESET_REG); 331 reset_reg = inb(ioaddr + PCIBM2_RESET_REG);
331 reset_reg |= PCIBM2_RESET_REG_CHIP_NRES; 332 reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;
332 outb(reset_reg, ioaddr + PCIBM2_RESET_REG); 333 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
333 tms380tr_wait(100); 334 tms380tr_wait(100);
334 } 335 }
335 336
336 /* 337 /*
337 * Enable the functions of the Madge chipset needed for 338 * Enable the functions of the Madge chipset needed for
338 * full working order. 339 * full working order.
339 */ 340 */
340 static int abyss_chipset_init(struct net_device *dev) 341 static int abyss_chipset_init(struct net_device *dev)
341 { 342 {
342 unsigned char reset_reg; 343 unsigned char reset_reg;
343 unsigned long ioaddr; 344 unsigned long ioaddr;
344 345
345 ioaddr = dev->base_addr; 346 ioaddr = dev->base_addr;
346 347
347 reset_reg = inb(ioaddr + PCIBM2_RESET_REG); 348 reset_reg = inb(ioaddr + PCIBM2_RESET_REG);
348 349
349 reset_reg |= PCIBM2_RESET_REG_CHIP_NRES; 350 reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;
350 outb(reset_reg, ioaddr + PCIBM2_RESET_REG); 351 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
351 352
352 reset_reg &= ~(PCIBM2_RESET_REG_CHIP_NRES | 353 reset_reg &= ~(PCIBM2_RESET_REG_CHIP_NRES |
353 PCIBM2_RESET_REG_FIFO_NRES | 354 PCIBM2_RESET_REG_FIFO_NRES |
354 PCIBM2_RESET_REG_SIF_NRES); 355 PCIBM2_RESET_REG_SIF_NRES);
355 outb(reset_reg, ioaddr + PCIBM2_RESET_REG); 356 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
356 357
357 tms380tr_wait(100); 358 tms380tr_wait(100);
358 359
359 reset_reg |= PCIBM2_RESET_REG_CHIP_NRES; 360 reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;
360 outb(reset_reg, ioaddr + PCIBM2_RESET_REG); 361 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
361 362
362 reset_reg |= PCIBM2_RESET_REG_SIF_NRES; 363 reset_reg |= PCIBM2_RESET_REG_SIF_NRES;
363 outb(reset_reg, ioaddr + PCIBM2_RESET_REG); 364 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
364 365
365 reset_reg |= PCIBM2_RESET_REG_FIFO_NRES; 366 reset_reg |= PCIBM2_RESET_REG_FIFO_NRES;
366 outb(reset_reg, ioaddr + PCIBM2_RESET_REG); 367 outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
367 368
368 outb(PCIBM2_INT_CONTROL_REG_SINTEN | 369 outb(PCIBM2_INT_CONTROL_REG_SINTEN |
369 PCIBM2_INT_CONTROL_REG_PCI_ERR_ENABLE, 370 PCIBM2_INT_CONTROL_REG_PCI_ERR_ENABLE,
370 ioaddr + PCIBM2_INT_CONTROL_REG); 371 ioaddr + PCIBM2_INT_CONTROL_REG);
371 372
372 outb(30, ioaddr + PCIBM2_FIFO_THRESHOLD); 373 outb(30, ioaddr + PCIBM2_FIFO_THRESHOLD);
373 374
374 return 0; 375 return 0;
375 } 376 }
376 377
377 static inline void abyss_chipset_close(struct net_device *dev) 378 static inline void abyss_chipset_close(struct net_device *dev)
378 { 379 {
379 unsigned long ioaddr; 380 unsigned long ioaddr;
380 381
381 ioaddr = dev->base_addr; 382 ioaddr = dev->base_addr;
382 outb(0, ioaddr + PCIBM2_RESET_REG); 383 outb(0, ioaddr + PCIBM2_RESET_REG);
383 } 384 }
384 385
385 /* 386 /*
386 * Read configuration data from the AT24 SEEPROM on Madge cards. 387 * Read configuration data from the AT24 SEEPROM on Madge cards.
387 * 388 *
388 */ 389 */
389 static void abyss_read_eeprom(struct net_device *dev) 390 static void abyss_read_eeprom(struct net_device *dev)
390 { 391 {
391 struct net_local *tp; 392 struct net_local *tp;
392 unsigned long ioaddr; 393 unsigned long ioaddr;
393 unsigned short val; 394 unsigned short val;
394 int i; 395 int i;
395 396
396 tp = netdev_priv(dev); 397 tp = netdev_priv(dev);
397 ioaddr = dev->base_addr; 398 ioaddr = dev->base_addr;
398 399
399 /* Must enable glue chip first */ 400 /* Must enable glue chip first */
400 abyss_enable(dev); 401 abyss_enable(dev);
401 402
402 val = at24_readb(ioaddr + PCIBM2_SEEPROM_REG, 403 val = at24_readb(ioaddr + PCIBM2_SEEPROM_REG,
403 PCIBM2_SEEPROM_RING_SPEED); 404 PCIBM2_SEEPROM_RING_SPEED);
404 tp->DataRate = val?SPEED_4:SPEED_16; /* set open speed */ 405 tp->DataRate = val?SPEED_4:SPEED_16; /* set open speed */
405 printk("%s: SEEPROM: ring speed: %dMb/sec\n", dev->name, tp->DataRate); 406 printk("%s: SEEPROM: ring speed: %dMb/sec\n", dev->name, tp->DataRate);
406 407
407 val = at24_readb(ioaddr + PCIBM2_SEEPROM_REG, 408 val = at24_readb(ioaddr + PCIBM2_SEEPROM_REG,
408 PCIBM2_SEEPROM_RAM_SIZE) * 128; 409 PCIBM2_SEEPROM_RAM_SIZE) * 128;
409 printk("%s: SEEPROM: adapter RAM: %dkb\n", dev->name, val); 410 printk("%s: SEEPROM: adapter RAM: %dkb\n", dev->name, val);
410 411
411 dev->addr_len = 6; 412 dev->addr_len = 6;
412 for (i = 0; i < 6; i++) 413 for (i = 0; i < 6; i++)
413 dev->dev_addr[i] = at24_readb(ioaddr + PCIBM2_SEEPROM_REG, 414 dev->dev_addr[i] = at24_readb(ioaddr + PCIBM2_SEEPROM_REG,
414 PCIBM2_SEEPROM_BIA+i); 415 PCIBM2_SEEPROM_BIA+i);
415 } 416 }
416 417
417 static int abyss_open(struct net_device *dev) 418 static int abyss_open(struct net_device *dev)
418 { 419 {
419 abyss_chipset_init(dev); 420 abyss_chipset_init(dev);
420 tms380tr_open(dev); 421 tms380tr_open(dev);
421 return 0; 422 return 0;
422 } 423 }
423 424
424 static int abyss_close(struct net_device *dev) 425 static int abyss_close(struct net_device *dev)
425 { 426 {
426 tms380tr_close(dev); 427 tms380tr_close(dev);
427 abyss_chipset_close(dev); 428 abyss_chipset_close(dev);
428 return 0; 429 return 0;
429 } 430 }
430 431
431 static void __devexit abyss_detach (struct pci_dev *pdev) 432 static void __devexit abyss_detach (struct pci_dev *pdev)
432 { 433 {
433 struct net_device *dev = pci_get_drvdata(pdev); 434 struct net_device *dev = pci_get_drvdata(pdev);
434 435
435 BUG_ON(!dev); 436 BUG_ON(!dev);
436 unregister_netdev(dev); 437 unregister_netdev(dev);
437 release_region(dev->base_addr-0x10, ABYSS_IO_EXTENT); 438 release_region(dev->base_addr-0x10, ABYSS_IO_EXTENT);
438 free_irq(dev->irq, dev); 439 free_irq(dev->irq, dev);
439 tmsdev_term(dev); 440 tmsdev_term(dev);
440 free_netdev(dev); 441 free_netdev(dev);
441 pci_set_drvdata(pdev, NULL); 442 pci_set_drvdata(pdev, NULL);
442 } 443 }
443 444
444 static struct pci_driver abyss_driver = { 445 static struct pci_driver abyss_driver = {
445 .name = "abyss", 446 .name = "abyss",
446 .id_table = abyss_pci_tbl, 447 .id_table = abyss_pci_tbl,
447 .probe = abyss_attach, 448 .probe = abyss_attach,
448 .remove = __devexit_p(abyss_detach), 449 .remove = __devexit_p(abyss_detach),
449 }; 450 };
450 451
451 static int __init abyss_init (void) 452 static int __init abyss_init (void)
452 { 453 {
454 abyss_netdev_ops = tms380tr_netdev_ops;
455
456 abyss_netdev_ops.ndo_open = abyss_open;
457 abyss_netdev_ops.ndo_stop = abyss_close;
458
453 return pci_register_driver(&abyss_driver); 459 return pci_register_driver(&abyss_driver);
454 } 460 }
455 461
456 static void __exit abyss_rmmod (void) 462 static void __exit abyss_rmmod (void)
457 { 463 {
458 pci_unregister_driver (&abyss_driver); 464 pci_unregister_driver (&abyss_driver);
459 } 465 }
460 466
461 module_init(abyss_init); 467 module_init(abyss_init);
462 module_exit(abyss_rmmod); 468 module_exit(abyss_rmmod);
463 469
drivers/net/tokenring/tms380tr.c
Diff comments   View file @ f1608f8
1 /* 1 /*
2 * tms380tr.c: A network driver library for Texas Instruments TMS380-based 2 * tms380tr.c: A network driver library for Texas Instruments TMS380-based
3 * Token Ring Adapters. 3 * Token Ring Adapters.
4 * 4 *
5 * Originally sktr.c: Written 1997 by Christoph Goos 5 * Originally sktr.c: Written 1997 by Christoph Goos
6 * 6 *
7 * A fine result of the Linux Systems Network Architecture Project. 7 * A fine result of the Linux Systems Network Architecture Project.
8 * http://www.linux-sna.org 8 * http://www.linux-sna.org
9 * 9 *
10 * This software may be used and distributed according to the terms 10 * This software may be used and distributed according to the terms
11 * of the GNU General Public License, incorporated herein by reference. 11 * of the GNU General Public License, incorporated herein by reference.
12 * 12 *
13 * The following modules are currently available for card support: 13 * The following modules are currently available for card support:
14 * - tmspci (Generic PCI card support) 14 * - tmspci (Generic PCI card support)
15 * - abyss (Madge PCI support) 15 * - abyss (Madge PCI support)
16 * - tmsisa (SysKonnect TR4/16 ISA) 16 * - tmsisa (SysKonnect TR4/16 ISA)
17 * 17 *
18 * Sources: 18 * Sources:
19 * - The hardware related parts of this driver are take from 19 * - The hardware related parts of this driver are take from
20 * the SysKonnect Token Ring driver for Windows NT. 20 * the SysKonnect Token Ring driver for Windows NT.
21 * - I used the IBM Token Ring driver 'ibmtr.c' as a base for this 21 * - I used the IBM Token Ring driver 'ibmtr.c' as a base for this
22 * driver, as well as the 'skeleton.c' driver by Donald Becker. 22 * driver, as well as the 'skeleton.c' driver by Donald Becker.
23 * - Also various other drivers in the linux source tree were taken 23 * - Also various other drivers in the linux source tree were taken
24 * as samples for some tasks. 24 * as samples for some tasks.
25 * - TI TMS380 Second-Generation Token Ring User's Guide 25 * - TI TMS380 Second-Generation Token Ring User's Guide
26 * - TI datasheets for respective chips 26 * - TI datasheets for respective chips
27 * - David Hein at Texas Instruments 27 * - David Hein at Texas Instruments
28 * - Various Madge employees 28 * - Various Madge employees
29 * 29 *
30 * Maintainer(s): 30 * Maintainer(s):
31 * JS Jay Schulist jschlst@samba.org 31 * JS Jay Schulist jschlst@samba.org
32 * CG Christoph Goos cgoos@syskonnect.de 32 * CG Christoph Goos cgoos@syskonnect.de
33 * AF Adam Fritzler 33 * AF Adam Fritzler
34 * MLP Mike Phillips phillim@amtrak.com 34 * MLP Mike Phillips phillim@amtrak.com
35 * JF Jochen Friedrich jochen@scram.de 35 * JF Jochen Friedrich jochen@scram.de
36 * 36 *
37 * Modification History: 37 * Modification History:
38 * 29-Aug-97 CG Created 38 * 29-Aug-97 CG Created
39 * 04-Apr-98 CG Fixed problems caused by tok_timer_check 39 * 04-Apr-98 CG Fixed problems caused by tok_timer_check
40 * 10-Apr-98 CG Fixed lockups at cable disconnection 40 * 10-Apr-98 CG Fixed lockups at cable disconnection
41 * 27-May-98 JS Formated to Linux Kernel Format 41 * 27-May-98 JS Formated to Linux Kernel Format
42 * 31-May-98 JS Hacked in PCI support 42 * 31-May-98 JS Hacked in PCI support
43 * 16-Jun-98 JS Modulized for multiple cards with one driver 43 * 16-Jun-98 JS Modulized for multiple cards with one driver
44 * Sep-99 AF Renamed to tms380tr (supports more than SK's) 44 * Sep-99 AF Renamed to tms380tr (supports more than SK's)
45 * 23-Sep-99 AF Added Compaq and Thomas-Conrad PCI support 45 * 23-Sep-99 AF Added Compaq and Thomas-Conrad PCI support
46 * Fixed a bug causing double copies on PCI 46 * Fixed a bug causing double copies on PCI
47 * Fixed for new multicast stuff (2.2/2.3) 47 * Fixed for new multicast stuff (2.2/2.3)
48 * 25-Sep-99 AF Uped TPL_NUM from 3 to 9 48 * 25-Sep-99 AF Uped TPL_NUM from 3 to 9
49 * Removed extraneous 'No free TPL' 49 * Removed extraneous 'No free TPL'
50 * 22-Dec-99 AF Added Madge PCI Mk2 support and generalized 50 * 22-Dec-99 AF Added Madge PCI Mk2 support and generalized
51 * parts of the initilization procedure. 51 * parts of the initilization procedure.
52 * 30-Dec-99 AF Turned tms380tr into a library ala 8390. 52 * 30-Dec-99 AF Turned tms380tr into a library ala 8390.
53 * Madge support is provided in the abyss module 53 * Madge support is provided in the abyss module
54 * Generic PCI support is in the tmspci module. 54 * Generic PCI support is in the tmspci module.
55 * 30-Nov-00 JF Updated PCI code to support IO MMU via 55 * 30-Nov-00 JF Updated PCI code to support IO MMU via
56 * pci_map_static(). Alpha uses this MMU for ISA 56 * pci_map_static(). Alpha uses this MMU for ISA
57 * as well. 57 * as well.
58 * 14-Jan-01 JF Fix DMA on ifdown/ifup sequences. Some 58 * 14-Jan-01 JF Fix DMA on ifdown/ifup sequences. Some
59 * cleanup. 59 * cleanup.
60 * 13-Jan-02 JF Add spinlock to fix race condition. 60 * 13-Jan-02 JF Add spinlock to fix race condition.
61 * 09-Nov-02 JF Fixed printks to not SPAM the console during 61 * 09-Nov-02 JF Fixed printks to not SPAM the console during
62 * normal operation. 62 * normal operation.
63 * 30-Dec-02 JF Removed incorrect __init from 63 * 30-Dec-02 JF Removed incorrect __init from
64 * tms380tr_init_card. 64 * tms380tr_init_card.
65 * 22-Jul-05 JF Converted to dma-mapping. 65 * 22-Jul-05 JF Converted to dma-mapping.
66 * 66 *
67 * To do: 67 * To do:
68 * 1. Multi/Broadcast packet handling (this may have fixed itself) 68 * 1. Multi/Broadcast packet handling (this may have fixed itself)
69 * 2. Write a sktrisa module that includes the old ISA support (done) 69 * 2. Write a sktrisa module that includes the old ISA support (done)
70 * 3. Allow modules to load their own microcode 70 * 3. Allow modules to load their own microcode
71 * 4. Speed up the BUD process -- freezing the kernel for 3+sec is 71 * 4. Speed up the BUD process -- freezing the kernel for 3+sec is
72 * quite unacceptable. 72 * quite unacceptable.
73 * 5. Still a few remaining stalls when the cable is unplugged. 73 * 5. Still a few remaining stalls when the cable is unplugged.
74 */ 74 */
75 75
76 #ifdef MODULE 76 #ifdef MODULE
77 static const char version[] = "tms380tr.c: v1.10 30/12/2002 by Christoph Goos, Adam Fritzler\n"; 77 static const char version[] = "tms380tr.c: v1.10 30/12/2002 by Christoph Goos, Adam Fritzler\n";
78 #endif 78 #endif
79 79
80 #include <linux/module.h> 80 #include <linux/module.h>
81 #include <linux/kernel.h> 81 #include <linux/kernel.h>
82 #include <linux/types.h> 82 #include <linux/types.h>
83 #include <linux/fcntl.h> 83 #include <linux/fcntl.h>
84 #include <linux/interrupt.h> 84 #include <linux/interrupt.h>
85 #include <linux/ptrace.h> 85 #include <linux/ptrace.h>
86 #include <linux/ioport.h> 86 #include <linux/ioport.h>
87 #include <linux/in.h> 87 #include <linux/in.h>
88 #include <linux/slab.h> 88 #include <linux/slab.h>
89 #include <linux/string.h> 89 #include <linux/string.h>
90 #include <linux/time.h> 90 #include <linux/time.h>
91 #include <linux/errno.h> 91 #include <linux/errno.h>
92 #include <linux/init.h> 92 #include <linux/init.h>
93 #include <linux/dma-mapping.h> 93 #include <linux/dma-mapping.h>
94 #include <linux/delay.h> 94 #include <linux/delay.h>
95 #include <linux/netdevice.h> 95 #include <linux/netdevice.h>
96 #include <linux/etherdevice.h> 96 #include <linux/etherdevice.h>
97 #include <linux/skbuff.h> 97 #include <linux/skbuff.h>
98 #include <linux/trdevice.h> 98 #include <linux/trdevice.h>
99 #include <linux/firmware.h> 99 #include <linux/firmware.h>
100 #include <linux/bitops.h> 100 #include <linux/bitops.h>
101 101
102 #include <asm/system.h> 102 #include <asm/system.h>
103 #include <asm/io.h> 103 #include <asm/io.h>
104 #include <asm/dma.h> 104 #include <asm/dma.h>
105 #include <asm/irq.h> 105 #include <asm/irq.h>
106 #include <asm/uaccess.h> 106 #include <asm/uaccess.h>
107 107
108 #include "tms380tr.h" /* Our Stuff */ 108 #include "tms380tr.h" /* Our Stuff */
109 109
110 /* Use 0 for production, 1 for verification, 2 for debug, and 110 /* Use 0 for production, 1 for verification, 2 for debug, and
111 * 3 for very verbose debug. 111 * 3 for very verbose debug.
112 */ 112 */
113 #ifndef TMS380TR_DEBUG 113 #ifndef TMS380TR_DEBUG
114 #define TMS380TR_DEBUG 0 114 #define TMS380TR_DEBUG 0
115 #endif 115 #endif
116 static unsigned int tms380tr_debug = TMS380TR_DEBUG; 116 static unsigned int tms380tr_debug = TMS380TR_DEBUG;
117 117
118 /* Index to functions, as function prototypes. 118 /* Index to functions, as function prototypes.
119 * Alphabetical by function name. 119 * Alphabetical by function name.
120 */ 120 */
121 121
122 /* "A" */ 122 /* "A" */
123 /* "B" */ 123 /* "B" */
124 static int tms380tr_bringup_diags(struct net_device *dev); 124 static int tms380tr_bringup_diags(struct net_device *dev);
125 /* "C" */ 125 /* "C" */
126 static void tms380tr_cancel_tx_queue(struct net_local* tp); 126 static void tms380tr_cancel_tx_queue(struct net_local* tp);
127 static int tms380tr_chipset_init(struct net_device *dev); 127 static int tms380tr_chipset_init(struct net_device *dev);
128 static void tms380tr_chk_irq(struct net_device *dev); 128 static void tms380tr_chk_irq(struct net_device *dev);
129 static void tms380tr_chk_outstanding_cmds(struct net_device *dev); 129 static void tms380tr_chk_outstanding_cmds(struct net_device *dev);
130 static void tms380tr_chk_src_addr(unsigned char *frame, unsigned char *hw_addr); 130 static void tms380tr_chk_src_addr(unsigned char *frame, unsigned char *hw_addr);
131 static unsigned char tms380tr_chk_ssb(struct net_local *tp, unsigned short IrqType); 131 static unsigned char tms380tr_chk_ssb(struct net_local *tp, unsigned short IrqType);
132 int tms380tr_close(struct net_device *dev); 132 int tms380tr_close(struct net_device *dev);
133 static void tms380tr_cmd_status_irq(struct net_device *dev); 133 static void tms380tr_cmd_status_irq(struct net_device *dev);
134 /* "D" */ 134 /* "D" */
135 static void tms380tr_disable_interrupts(struct net_device *dev); 135 static void tms380tr_disable_interrupts(struct net_device *dev);
136 #if TMS380TR_DEBUG > 0 136 #if TMS380TR_DEBUG > 0
137 static void tms380tr_dump(unsigned char *Data, int length); 137 static void tms380tr_dump(unsigned char *Data, int length);
138 #endif 138 #endif
139 /* "E" */ 139 /* "E" */
140 static void tms380tr_enable_interrupts(struct net_device *dev); 140 static void tms380tr_enable_interrupts(struct net_device *dev);
141 static void tms380tr_exec_cmd(struct net_device *dev, unsigned short Command); 141 static void tms380tr_exec_cmd(struct net_device *dev, unsigned short Command);
142 static void tms380tr_exec_sifcmd(struct net_device *dev, unsigned int WriteValue); 142 static void tms380tr_exec_sifcmd(struct net_device *dev, unsigned int WriteValue);
143 /* "F" */ 143 /* "F" */
144 /* "G" */ 144 /* "G" */
145 static struct net_device_stats *tms380tr_get_stats(struct net_device *dev); 145 static struct net_device_stats *tms380tr_get_stats(struct net_device *dev);
146 /* "H" */ 146 /* "H" */
147 static int tms380tr_hardware_send_packet(struct sk_buff *skb, 147 static int tms380tr_hardware_send_packet(struct sk_buff *skb,
148 struct net_device *dev); 148 struct net_device *dev);
149 /* "I" */ 149 /* "I" */
150 static int tms380tr_init_adapter(struct net_device *dev); 150 static int tms380tr_init_adapter(struct net_device *dev);
151 static void tms380tr_init_ipb(struct net_local *tp); 151 static void tms380tr_init_ipb(struct net_local *tp);
152 static void tms380tr_init_net_local(struct net_device *dev); 152 static void tms380tr_init_net_local(struct net_device *dev);
153 static void tms380tr_init_opb(struct net_device *dev); 153 static void tms380tr_init_opb(struct net_device *dev);
154 /* "M" */ 154 /* "M" */
155 /* "O" */ 155 /* "O" */
156 int tms380tr_open(struct net_device *dev); 156 int tms380tr_open(struct net_device *dev);
157 static void tms380tr_open_adapter(struct net_device *dev); 157 static void tms380tr_open_adapter(struct net_device *dev);
158 /* "P" */ 158 /* "P" */
159 /* "R" */ 159 /* "R" */
160 static void tms380tr_rcv_status_irq(struct net_device *dev); 160 static void tms380tr_rcv_status_irq(struct net_device *dev);
161 static int tms380tr_read_ptr(struct net_device *dev); 161 static int tms380tr_read_ptr(struct net_device *dev);
162 static void tms380tr_read_ram(struct net_device *dev, unsigned char *Data, 162 static void tms380tr_read_ram(struct net_device *dev, unsigned char *Data,
163 unsigned short Address, int Length); 163 unsigned short Address, int Length);
164 static int tms380tr_reset_adapter(struct net_device *dev); 164 static int tms380tr_reset_adapter(struct net_device *dev);
165 static void tms380tr_reset_interrupt(struct net_device *dev); 165 static void tms380tr_reset_interrupt(struct net_device *dev);
166 static void tms380tr_ring_status_irq(struct net_device *dev); 166 static void tms380tr_ring_status_irq(struct net_device *dev);
167 /* "S" */ 167 /* "S" */
168 static int tms380tr_send_packet(struct sk_buff *skb, struct net_device *dev); 168 static int tms380tr_send_packet(struct sk_buff *skb, struct net_device *dev);
169 static void tms380tr_set_multicast_list(struct net_device *dev); 169 static void tms380tr_set_multicast_list(struct net_device *dev);
170 static int tms380tr_set_mac_address(struct net_device *dev, void *addr); 170 static int tms380tr_set_mac_address(struct net_device *dev, void *addr);
171 /* "T" */ 171 /* "T" */
172 static void tms380tr_timer_chk(unsigned long data); 172 static void tms380tr_timer_chk(unsigned long data);
173 static void tms380tr_timer_end_wait(unsigned long data); 173 static void tms380tr_timer_end_wait(unsigned long data);
174 static void tms380tr_tx_status_irq(struct net_device *dev); 174 static void tms380tr_tx_status_irq(struct net_device *dev);
175 /* "U" */ 175 /* "U" */
176 static void tms380tr_update_rcv_stats(struct net_local *tp, 176 static void tms380tr_update_rcv_stats(struct net_local *tp,
177 unsigned char DataPtr[], unsigned int Length); 177 unsigned char DataPtr[], unsigned int Length);
178 /* "W" */ 178 /* "W" */
179 void tms380tr_wait(unsigned long time); 179 void tms380tr_wait(unsigned long time);
180 static void tms380tr_write_rpl_status(RPL *rpl, unsigned int Status); 180 static void tms380tr_write_rpl_status(RPL *rpl, unsigned int Status);
181 static void tms380tr_write_tpl_status(TPL *tpl, unsigned int Status); 181 static void tms380tr_write_tpl_status(TPL *tpl, unsigned int Status);
182 182
183 #define SIFREADB(reg) \ 183 #define SIFREADB(reg) \
184 (((struct net_local *)netdev_priv(dev))->sifreadb(dev, reg)) 184 (((struct net_local *)netdev_priv(dev))->sifreadb(dev, reg))
185 #define SIFWRITEB(val, reg) \ 185 #define SIFWRITEB(val, reg) \
186 (((struct net_local *)netdev_priv(dev))->sifwriteb(dev, val, reg)) 186 (((struct net_local *)netdev_priv(dev))->sifwriteb(dev, val, reg))
187 #define SIFREADW(reg) \ 187 #define SIFREADW(reg) \
188 (((struct net_local *)netdev_priv(dev))->sifreadw(dev, reg)) 188 (((struct net_local *)netdev_priv(dev))->sifreadw(dev, reg))
189 #define SIFWRITEW(val, reg) \ 189 #define SIFWRITEW(val, reg) \
190 (((struct net_local *)netdev_priv(dev))->sifwritew(dev, val, reg)) 190 (((struct net_local *)netdev_priv(dev))->sifwritew(dev, val, reg))
191 191
192 192
193 193
194 #if 0 /* TMS380TR_DEBUG > 0 */ 194 #if 0 /* TMS380TR_DEBUG > 0 */
195 static int madgemc_sifprobe(struct net_device *dev) 195 static int madgemc_sifprobe(struct net_device *dev)
196 { 196 {
197 unsigned char old, chk1, chk2; 197 unsigned char old, chk1, chk2;
198 198
199 old = SIFREADB(SIFADR); /* Get the old SIFADR value */ 199 old = SIFREADB(SIFADR); /* Get the old SIFADR value */
200 200
201 chk1 = 0; /* Begin with check value 0 */ 201 chk1 = 0; /* Begin with check value 0 */
202 do { 202 do {
203 madgemc_setregpage(dev, 0); 203 madgemc_setregpage(dev, 0);
204 /* Write new SIFADR value */ 204 /* Write new SIFADR value */
205 SIFWRITEB(chk1, SIFADR); 205 SIFWRITEB(chk1, SIFADR);
206 chk2 = SIFREADB(SIFADR); 206 chk2 = SIFREADB(SIFADR);
207 if (chk2 != chk1) 207 if (chk2 != chk1)
208 return -1; 208 return -1;
209 209
210 madgemc_setregpage(dev, 1); 210 madgemc_setregpage(dev, 1);
211 /* Read, invert and write */ 211 /* Read, invert and write */
212 chk2 = SIFREADB(SIFADD); 212 chk2 = SIFREADB(SIFADD);
213 if (chk2 != chk1) 213 if (chk2 != chk1)
214 return -1; 214 return -1;
215 215
216 madgemc_setregpage(dev, 0); 216 madgemc_setregpage(dev, 0);
217 chk2 ^= 0x0FE; 217 chk2 ^= 0x0FE;
218 SIFWRITEB(chk2, SIFADR); 218 SIFWRITEB(chk2, SIFADR);
219 219
220 /* Read, invert and compare */ 220 /* Read, invert and compare */
221 madgemc_setregpage(dev, 1); 221 madgemc_setregpage(dev, 1);
222 chk2 = SIFREADB(SIFADD); 222 chk2 = SIFREADB(SIFADD);
223 madgemc_setregpage(dev, 0); 223 madgemc_setregpage(dev, 0);
224 chk2 ^= 0x0FE; 224 chk2 ^= 0x0FE;
225 225
226 if(chk1 != chk2) 226 if(chk1 != chk2)
227 return (-1); /* No adapter */ 227 return (-1); /* No adapter */
228 chk1 -= 2; 228 chk1 -= 2;
229 } while(chk1 != 0); /* Repeat 128 times (all byte values) */ 229 } while(chk1 != 0); /* Repeat 128 times (all byte values) */
230 230
231 madgemc_setregpage(dev, 0); /* sanity */ 231 madgemc_setregpage(dev, 0); /* sanity */
232 /* Restore the SIFADR value */ 232 /* Restore the SIFADR value */
233 SIFWRITEB(old, SIFADR); 233 SIFWRITEB(old, SIFADR);
234 234
235 return (0); 235 return (0);
236 } 236 }
237 #endif 237 #endif
238 238
239 /* 239 /*
240 * Open/initialize the board. This is called sometime after 240 * Open/initialize the board. This is called sometime after
241 * booting when the 'ifconfig' program is run. 241 * booting when the 'ifconfig' program is run.
242 * 242 *
243 * This routine should set everything up anew at each open, even 243 * This routine should set everything up anew at each open, even
244 * registers that "should" only need to be set once at boot, so that 244 * registers that "should" only need to be set once at boot, so that
245 * there is non-reboot way to recover if something goes wrong. 245 * there is non-reboot way to recover if something goes wrong.
246 */ 246 */
247 int tms380tr_open(struct net_device *dev) 247 int tms380tr_open(struct net_device *dev)
248 { 248 {
249 struct net_local *tp = netdev_priv(dev); 249 struct net_local *tp = netdev_priv(dev);
250 int err; 250 int err;
251 251
252 /* init the spinlock */ 252 /* init the spinlock */
253 spin_lock_init(&tp->lock); 253 spin_lock_init(&tp->lock);
254 init_timer(&tp->timer); 254 init_timer(&tp->timer);
255 255
256 /* Reset the hardware here. Don't forget to set the station address. */ 256 /* Reset the hardware here. Don't forget to set the station address. */
257 257
258 #ifdef CONFIG_ISA 258 #ifdef CONFIG_ISA
259 if(dev->dma > 0) 259 if(dev->dma > 0)
260 { 260 {
261 unsigned long flags=claim_dma_lock(); 261 unsigned long flags=claim_dma_lock();
262 disable_dma(dev->dma); 262 disable_dma(dev->dma);
263 set_dma_mode(dev->dma, DMA_MODE_CASCADE); 263 set_dma_mode(dev->dma, DMA_MODE_CASCADE);
264 enable_dma(dev->dma); 264 enable_dma(dev->dma);
265 release_dma_lock(flags); 265 release_dma_lock(flags);
266 } 266 }
267 #endif 267 #endif
268 268
269 err = tms380tr_chipset_init(dev); 269 err = tms380tr_chipset_init(dev);
270 if(err) 270 if(err)
271 { 271 {
272 printk(KERN_INFO "%s: Chipset initialization error\n", 272 printk(KERN_INFO "%s: Chipset initialization error\n",
273 dev->name); 273 dev->name);
274 return (-1); 274 return (-1);
275 } 275 }
276 276
277 tp->timer.expires = jiffies + 30*HZ; 277 tp->timer.expires = jiffies + 30*HZ;
278 tp->timer.function = tms380tr_timer_end_wait; 278 tp->timer.function = tms380tr_timer_end_wait;
279 tp->timer.data = (unsigned long)dev; 279 tp->timer.data = (unsigned long)dev;
280 add_timer(&tp->timer); 280 add_timer(&tp->timer);
281 281
282 printk(KERN_DEBUG "%s: Adapter RAM size: %dK\n", 282 printk(KERN_DEBUG "%s: Adapter RAM size: %dK\n",
283 dev->name, tms380tr_read_ptr(dev)); 283 dev->name, tms380tr_read_ptr(dev));
284 284
285 tms380tr_enable_interrupts(dev); 285 tms380tr_enable_interrupts(dev);
286 tms380tr_open_adapter(dev); 286 tms380tr_open_adapter(dev);
287 287
288 netif_start_queue(dev); 288 netif_start_queue(dev);
289 289
290 /* Wait for interrupt from hardware. If interrupt does not come, 290 /* Wait for interrupt from hardware. If interrupt does not come,
291 * there will be a timeout from the timer. 291 * there will be a timeout from the timer.
292 */ 292 */
293 tp->Sleeping = 1; 293 tp->Sleeping = 1;
294 interruptible_sleep_on(&tp->wait_for_tok_int); 294 interruptible_sleep_on(&tp->wait_for_tok_int);
295 del_timer(&tp->timer); 295 del_timer(&tp->timer);
296 296
297 /* If AdapterVirtOpenFlag is 1, the adapter is now open for use */ 297 /* If AdapterVirtOpenFlag is 1, the adapter is now open for use */
298 if(tp->AdapterVirtOpenFlag == 0) 298 if(tp->AdapterVirtOpenFlag == 0)
299 { 299 {
300 tms380tr_disable_interrupts(dev); 300 tms380tr_disable_interrupts(dev);
301 return (-1); 301 return (-1);
302 } 302 }
303 303
304 tp->StartTime = jiffies; 304 tp->StartTime = jiffies;
305 305
306 /* Start function control timer */ 306 /* Start function control timer */
307 tp->timer.expires = jiffies + 2*HZ; 307 tp->timer.expires = jiffies + 2*HZ;
308 tp->timer.function = tms380tr_timer_chk; 308 tp->timer.function = tms380tr_timer_chk;
309 tp->timer.data = (unsigned long)dev; 309 tp->timer.data = (unsigned long)dev;
310 add_timer(&tp->timer); 310 add_timer(&tp->timer);
311 311
312 return (0); 312 return (0);
313 } 313 }
314 314
315 /* 315 /*
316 * Timeout function while waiting for event 316 * Timeout function while waiting for event
317 */ 317 */
318 static void tms380tr_timer_end_wait(unsigned long data) 318 static void tms380tr_timer_end_wait(unsigned long data)
319 { 319 {
320 struct net_device *dev = (struct net_device*)data; 320 struct net_device *dev = (struct net_device*)data;
321 struct net_local *tp = netdev_priv(dev); 321 struct net_local *tp = netdev_priv(dev);
322 322
323 if(tp->Sleeping) 323 if(tp->Sleeping)
324 { 324 {
325 tp->Sleeping = 0; 325 tp->Sleeping = 0;
326 wake_up_interruptible(&tp->wait_for_tok_int); 326 wake_up_interruptible(&tp->wait_for_tok_int);
327 } 327 }
328 328
329 return; 329 return;
330 } 330 }
331 331
332 /* 332 /*
333 * Initialize the chipset 333 * Initialize the chipset
334 */ 334 */
335 static int tms380tr_chipset_init(struct net_device *dev) 335 static int tms380tr_chipset_init(struct net_device *dev)
336 { 336 {
337 struct net_local *tp = netdev_priv(dev); 337 struct net_local *tp = netdev_priv(dev);
338 int err; 338 int err;
339 339
340 tms380tr_init_ipb(tp); 340 tms380tr_init_ipb(tp);
341 tms380tr_init_opb(dev); 341 tms380tr_init_opb(dev);
342 tms380tr_init_net_local(dev); 342 tms380tr_init_net_local(dev);
343 343
344 if(tms380tr_debug > 3) 344 if(tms380tr_debug > 3)
345 printk(KERN_DEBUG "%s: Resetting adapter...\n", dev->name); 345 printk(KERN_DEBUG "%s: Resetting adapter...\n", dev->name);
346 err = tms380tr_reset_adapter(dev); 346 err = tms380tr_reset_adapter(dev);
347 if(err < 0) 347 if(err < 0)
348 return (-1); 348 return (-1);
349 349
350 if(tms380tr_debug > 3) 350 if(tms380tr_debug > 3)
351 printk(KERN_DEBUG "%s: Bringup diags...\n", dev->name); 351 printk(KERN_DEBUG "%s: Bringup diags...\n", dev->name);
352 err = tms380tr_bringup_diags(dev); 352 err = tms380tr_bringup_diags(dev);
353 if(err < 0) 353 if(err < 0)
354 return (-1); 354 return (-1);
355 355
356 if(tms380tr_debug > 3) 356 if(tms380tr_debug > 3)
357 printk(KERN_DEBUG "%s: Init adapter...\n", dev->name); 357 printk(KERN_DEBUG "%s: Init adapter...\n", dev->name);
358 err = tms380tr_init_adapter(dev); 358 err = tms380tr_init_adapter(dev);
359 if(err < 0) 359 if(err < 0)
360 return (-1); 360 return (-1);
361 361
362 if(tms380tr_debug > 3) 362 if(tms380tr_debug > 3)
363 printk(KERN_DEBUG "%s: Done!\n", dev->name); 363 printk(KERN_DEBUG "%s: Done!\n", dev->name);
364 return (0); 364 return (0);
365 } 365 }
366 366
367 /* 367 /*
368 * Initializes the net_local structure. 368 * Initializes the net_local structure.
369 */ 369 */
370 static void tms380tr_init_net_local(struct net_device *dev) 370 static void tms380tr_init_net_local(struct net_device *dev)
371 { 371 {
372 struct net_local *tp = netdev_priv(dev); 372 struct net_local *tp = netdev_priv(dev);
373 int i; 373 int i;
374 dma_addr_t dmabuf; 374 dma_addr_t dmabuf;
375 375
376 tp->scb.CMD = 0; 376 tp->scb.CMD = 0;
377 tp->scb.Parm[0] = 0; 377 tp->scb.Parm[0] = 0;
378 tp->scb.Parm[1] = 0; 378 tp->scb.Parm[1] = 0;
379 379
380 tp->ssb.STS = 0; 380 tp->ssb.STS = 0;
381 tp->ssb.Parm[0] = 0; 381 tp->ssb.Parm[0] = 0;
382 tp->ssb.Parm[1] = 0; 382 tp->ssb.Parm[1] = 0;
383 tp->ssb.Parm[2] = 0; 383 tp->ssb.Parm[2] = 0;
384 384
385 tp->CMDqueue = 0; 385 tp->CMDqueue = 0;
386 386
387 tp->AdapterOpenFlag = 0; 387 tp->AdapterOpenFlag = 0;
388 tp->AdapterVirtOpenFlag = 0; 388 tp->AdapterVirtOpenFlag = 0;
389 tp->ScbInUse = 0; 389 tp->ScbInUse = 0;
390 tp->OpenCommandIssued = 0; 390 tp->OpenCommandIssued = 0;
391 tp->ReOpenInProgress = 0; 391 tp->ReOpenInProgress = 0;
392 tp->HaltInProgress = 0; 392 tp->HaltInProgress = 0;
393 tp->TransmitHaltScheduled = 0; 393 tp->TransmitHaltScheduled = 0;
394 tp->LobeWireFaultLogged = 0; 394 tp->LobeWireFaultLogged = 0;
395 tp->LastOpenStatus = 0; 395 tp->LastOpenStatus = 0;
396 tp->MaxPacketSize = DEFAULT_PACKET_SIZE; 396 tp->MaxPacketSize = DEFAULT_PACKET_SIZE;
397 397
398 /* Create circular chain of transmit lists */ 398 /* Create circular chain of transmit lists */
399 for (i = 0; i < TPL_NUM; i++) 399 for (i = 0; i < TPL_NUM; i++)
400 { 400 {
401 tp->Tpl[i].NextTPLAddr = htonl(((char *)(&tp->Tpl[(i+1) % TPL_NUM]) - (char *)tp) + tp->dmabuffer); /* DMA buffer may be MMU driven */ 401 tp->Tpl[i].NextTPLAddr = htonl(((char *)(&tp->Tpl[(i+1) % TPL_NUM]) - (char *)tp) + tp->dmabuffer); /* DMA buffer may be MMU driven */
402 tp->Tpl[i].Status = 0; 402 tp->Tpl[i].Status = 0;
403 tp->Tpl[i].FrameSize = 0; 403 tp->Tpl[i].FrameSize = 0;
404 tp->Tpl[i].FragList[0].DataCount = 0; 404 tp->Tpl[i].FragList[0].DataCount = 0;
405 tp->Tpl[i].FragList[0].DataAddr = 0; 405 tp->Tpl[i].FragList[0].DataAddr = 0;
406 tp->Tpl[i].NextTPLPtr = &tp->Tpl[(i+1) % TPL_NUM]; 406 tp->Tpl[i].NextTPLPtr = &tp->Tpl[(i+1) % TPL_NUM];
407 tp->Tpl[i].MData = NULL; 407 tp->Tpl[i].MData = NULL;
408 tp->Tpl[i].TPLIndex = i; 408 tp->Tpl[i].TPLIndex = i;
409 tp->Tpl[i].DMABuff = 0; 409 tp->Tpl[i].DMABuff = 0;
410 tp->Tpl[i].BusyFlag = 0; 410 tp->Tpl[i].BusyFlag = 0;
411 } 411 }
412 412
413 tp->TplFree = tp->TplBusy = &tp->Tpl[0]; 413 tp->TplFree = tp->TplBusy = &tp->Tpl[0];
414 414
415 /* Create circular chain of receive lists */ 415 /* Create circular chain of receive lists */
416 for (i = 0; i < RPL_NUM; i++) 416 for (i = 0; i < RPL_NUM; i++)
417 { 417 {
418 tp->Rpl[i].NextRPLAddr = htonl(((char *)(&tp->Rpl[(i+1) % RPL_NUM]) - (char *)tp) + tp->dmabuffer); /* DMA buffer may be MMU driven */ 418 tp->Rpl[i].NextRPLAddr = htonl(((char *)(&tp->Rpl[(i+1) % RPL_NUM]) - (char *)tp) + tp->dmabuffer); /* DMA buffer may be MMU driven */
419 tp->Rpl[i].Status = (RX_VALID | RX_START_FRAME | RX_END_FRAME | RX_FRAME_IRQ); 419 tp->Rpl[i].Status = (RX_VALID | RX_START_FRAME | RX_END_FRAME | RX_FRAME_IRQ);
420 tp->Rpl[i].FrameSize = 0; 420 tp->Rpl[i].FrameSize = 0;
421 tp->Rpl[i].FragList[0].DataCount = cpu_to_be16((unsigned short)tp->MaxPacketSize); 421 tp->Rpl[i].FragList[0].DataCount = cpu_to_be16((unsigned short)tp->MaxPacketSize);
422 422
423 /* Alloc skb and point adapter to data area */ 423 /* Alloc skb and point adapter to data area */
424 tp->Rpl[i].Skb = dev_alloc_skb(tp->MaxPacketSize); 424 tp->Rpl[i].Skb = dev_alloc_skb(tp->MaxPacketSize);
425 tp->Rpl[i].DMABuff = 0; 425 tp->Rpl[i].DMABuff = 0;
426 426
427 /* skb == NULL ? then use local buffer */ 427 /* skb == NULL ? then use local buffer */
428 if(tp->Rpl[i].Skb == NULL) 428 if(tp->Rpl[i].Skb == NULL)
429 { 429 {
430 tp->Rpl[i].SkbStat = SKB_UNAVAILABLE; 430 tp->Rpl[i].SkbStat = SKB_UNAVAILABLE;
431 tp->Rpl[i].FragList[0].DataAddr = htonl(((char *)tp->LocalRxBuffers[i] - (char *)tp) + tp->dmabuffer); 431 tp->Rpl[i].FragList[0].DataAddr = htonl(((char *)tp->LocalRxBuffers[i] - (char *)tp) + tp->dmabuffer);
432 tp->Rpl[i].MData = tp->LocalRxBuffers[i]; 432 tp->Rpl[i].MData = tp->LocalRxBuffers[i];
433 } 433 }
434 else /* SKB != NULL */ 434 else /* SKB != NULL */
435 { 435 {
436 tp->Rpl[i].Skb->dev = dev; 436 tp->Rpl[i].Skb->dev = dev;
437 skb_put(tp->Rpl[i].Skb, tp->MaxPacketSize); 437 skb_put(tp->Rpl[i].Skb, tp->MaxPacketSize);
438 438
439 /* data unreachable for DMA ? then use local buffer */ 439 /* data unreachable for DMA ? then use local buffer */
440 dmabuf = dma_map_single(tp->pdev, tp->Rpl[i].Skb->data, tp->MaxPacketSize, DMA_FROM_DEVICE); 440 dmabuf = dma_map_single(tp->pdev, tp->Rpl[i].Skb->data, tp->MaxPacketSize, DMA_FROM_DEVICE);
441 if(tp->dmalimit && (dmabuf + tp->MaxPacketSize > tp->dmalimit)) 441 if(tp->dmalimit && (dmabuf + tp->MaxPacketSize > tp->dmalimit))
442 { 442 {
443 tp->Rpl[i].SkbStat = SKB_DATA_COPY; 443 tp->Rpl[i].SkbStat = SKB_DATA_COPY;
444 tp->Rpl[i].FragList[0].DataAddr = htonl(((char *)tp->LocalRxBuffers[i] - (char *)tp) + tp->dmabuffer); 444 tp->Rpl[i].FragList[0].DataAddr = htonl(((char *)tp->LocalRxBuffers[i] - (char *)tp) + tp->dmabuffer);
445 tp->Rpl[i].MData = tp->LocalRxBuffers[i]; 445 tp->Rpl[i].MData = tp->LocalRxBuffers[i];
446 } 446 }
447 else /* DMA directly in skb->data */ 447 else /* DMA directly in skb->data */
448 { 448 {
449 tp->Rpl[i].SkbStat = SKB_DMA_DIRECT; 449 tp->Rpl[i].SkbStat = SKB_DMA_DIRECT;
450 tp->Rpl[i].FragList[0].DataAddr = htonl(dmabuf); 450 tp->Rpl[i].FragList[0].DataAddr = htonl(dmabuf);
451 tp->Rpl[i].MData = tp->Rpl[i].Skb->data; 451 tp->Rpl[i].MData = tp->Rpl[i].Skb->data;
452 tp->Rpl[i].DMABuff = dmabuf; 452 tp->Rpl[i].DMABuff = dmabuf;
453 } 453 }
454 } 454 }
455 455
456 tp->Rpl[i].NextRPLPtr = &tp->Rpl[(i+1) % RPL_NUM]; 456 tp->Rpl[i].NextRPLPtr = &tp->Rpl[(i+1) % RPL_NUM];
457 tp->Rpl[i].RPLIndex = i; 457 tp->Rpl[i].RPLIndex = i;
458 } 458 }
459 459
460 tp->RplHead = &tp->Rpl[0]; 460 tp->RplHead = &tp->Rpl[0];
461 tp->RplTail = &tp->Rpl[RPL_NUM-1]; 461 tp->RplTail = &tp->Rpl[RPL_NUM-1];
462 tp->RplTail->Status = (RX_START_FRAME | RX_END_FRAME | RX_FRAME_IRQ); 462 tp->RplTail->Status = (RX_START_FRAME | RX_END_FRAME | RX_FRAME_IRQ);
463 463
464 return; 464 return;
465 } 465 }
466 466
467 /* 467 /*
468 * Initializes the initialisation parameter block. 468 * Initializes the initialisation parameter block.
469 */ 469 */
470 static void tms380tr_init_ipb(struct net_local *tp) 470 static void tms380tr_init_ipb(struct net_local *tp)
471 { 471 {
472 tp->ipb.Init_Options = BURST_MODE; 472 tp->ipb.Init_Options = BURST_MODE;
473 tp->ipb.CMD_Status_IV = 0; 473 tp->ipb.CMD_Status_IV = 0;
474 tp->ipb.TX_IV = 0; 474 tp->ipb.TX_IV = 0;
475 tp->ipb.RX_IV = 0; 475 tp->ipb.RX_IV = 0;
476 tp->ipb.Ring_Status_IV = 0; 476 tp->ipb.Ring_Status_IV = 0;
477 tp->ipb.SCB_Clear_IV = 0; 477 tp->ipb.SCB_Clear_IV = 0;
478 tp->ipb.Adapter_CHK_IV = 0; 478 tp->ipb.Adapter_CHK_IV = 0;
479 tp->ipb.RX_Burst_Size = BURST_SIZE; 479 tp->ipb.RX_Burst_Size = BURST_SIZE;
480 tp->ipb.TX_Burst_Size = BURST_SIZE; 480 tp->ipb.TX_Burst_Size = BURST_SIZE;
481 tp->ipb.DMA_Abort_Thrhld = DMA_RETRIES; 481 tp->ipb.DMA_Abort_Thrhld = DMA_RETRIES;
482 tp->ipb.SCB_Addr = 0; 482 tp->ipb.SCB_Addr = 0;
483 tp->ipb.SSB_Addr = 0; 483 tp->ipb.SSB_Addr = 0;
484 484
485 return; 485 return;
486 } 486 }
487 487
488 /* 488 /*
489 * Initializes the open parameter block. 489 * Initializes the open parameter block.
490 */ 490 */
491 static void tms380tr_init_opb(struct net_device *dev) 491 static void tms380tr_init_opb(struct net_device *dev)
492 { 492 {
493 struct net_local *tp; 493 struct net_local *tp;
494 unsigned long Addr; 494 unsigned long Addr;
495 unsigned short RplSize = RPL_SIZE; 495 unsigned short RplSize = RPL_SIZE;
496 unsigned short TplSize = TPL_SIZE; 496 unsigned short TplSize = TPL_SIZE;
497 unsigned short BufferSize = BUFFER_SIZE; 497 unsigned short BufferSize = BUFFER_SIZE;
498 int i; 498 int i;
499 499
500 tp = netdev_priv(dev); 500 tp = netdev_priv(dev);
501 501
502 tp->ocpl.OPENOptions = 0; 502 tp->ocpl.OPENOptions = 0;
503 tp->ocpl.OPENOptions |= ENABLE_FULL_DUPLEX_SELECTION; 503 tp->ocpl.OPENOptions |= ENABLE_FULL_DUPLEX_SELECTION;
504 tp->ocpl.FullDuplex = 0; 504 tp->ocpl.FullDuplex = 0;
505 tp->ocpl.FullDuplex |= OPEN_FULL_DUPLEX_OFF; 505 tp->ocpl.FullDuplex |= OPEN_FULL_DUPLEX_OFF;
506 506
507 /* 507 /*
508 * Set node address 508 * Set node address
509 * 509 *
510 * We go ahead and put it in the OPB even though on 510 * We go ahead and put it in the OPB even though on
511 * most of the generic adapters this isn't required. 511 * most of the generic adapters this isn't required.
512 * Its simpler this way. -- ASF 512 * Its simpler this way. -- ASF
513 */ 513 */
514 for (i=0;i<6;i++) 514 for (i=0;i<6;i++)
515 tp->ocpl.NodeAddr[i] = ((unsigned char *)dev->dev_addr)[i]; 515 tp->ocpl.NodeAddr[i] = ((unsigned char *)dev->dev_addr)[i];
516 516
517 tp->ocpl.GroupAddr = 0; 517 tp->ocpl.GroupAddr = 0;
518 tp->ocpl.FunctAddr = 0; 518 tp->ocpl.FunctAddr = 0;
519 tp->ocpl.RxListSize = cpu_to_be16((unsigned short)RplSize); 519 tp->ocpl.RxListSize = cpu_to_be16((unsigned short)RplSize);
520 tp->ocpl.TxListSize = cpu_to_be16((unsigned short)TplSize); 520 tp->ocpl.TxListSize = cpu_to_be16((unsigned short)TplSize);
521 tp->ocpl.BufSize = cpu_to_be16((unsigned short)BufferSize); 521 tp->ocpl.BufSize = cpu_to_be16((unsigned short)BufferSize);
522 tp->ocpl.Reserved = 0; 522 tp->ocpl.Reserved = 0;
523 tp->ocpl.TXBufMin = TX_BUF_MIN; 523 tp->ocpl.TXBufMin = TX_BUF_MIN;
524 tp->ocpl.TXBufMax = TX_BUF_MAX; 524 tp->ocpl.TXBufMax = TX_BUF_MAX;
525 525
526 Addr = htonl(((char *)tp->ProductID - (char *)tp) + tp->dmabuffer); 526 Addr = htonl(((char *)tp->ProductID - (char *)tp) + tp->dmabuffer);
527 527
528 tp->ocpl.ProdIDAddr[0] = LOWORD(Addr); 528 tp->ocpl.ProdIDAddr[0] = LOWORD(Addr);
529 tp->ocpl.ProdIDAddr[1] = HIWORD(Addr); 529 tp->ocpl.ProdIDAddr[1] = HIWORD(Addr);
530 530
531 return; 531 return;
532 } 532 }
533 533
534 /* 534 /*
535 * Send OPEN command to adapter 535 * Send OPEN command to adapter
536 */ 536 */
537 static void tms380tr_open_adapter(struct net_device *dev) 537 static void tms380tr_open_adapter(struct net_device *dev)
538 { 538 {
539 struct net_local *tp = netdev_priv(dev); 539 struct net_local *tp = netdev_priv(dev);
540 540
541 if(tp->OpenCommandIssued) 541 if(tp->OpenCommandIssued)
542 return; 542 return;
543 543
544 tp->OpenCommandIssued = 1; 544 tp->OpenCommandIssued = 1;
545 tms380tr_exec_cmd(dev, OC_OPEN); 545 tms380tr_exec_cmd(dev, OC_OPEN);
546 546
547 return; 547 return;
548 } 548 }
549 549
550 /* 550 /*
551 * Clear the adapter's interrupt flag. Clear system interrupt enable 551 * Clear the adapter's interrupt flag. Clear system interrupt enable
552 * (SINTEN): disable adapter to system interrupts. 552 * (SINTEN): disable adapter to system interrupts.
553 */ 553 */
554 static void tms380tr_disable_interrupts(struct net_device *dev) 554 static void tms380tr_disable_interrupts(struct net_device *dev)
555 { 555 {
556 SIFWRITEB(0, SIFACL); 556 SIFWRITEB(0, SIFACL);
557 557
558 return; 558 return;
559 } 559 }
560 560
561 /* 561 /*
562 * Set the adapter's interrupt flag. Set system interrupt enable 562 * Set the adapter's interrupt flag. Set system interrupt enable
563 * (SINTEN): enable adapter to system interrupts. 563 * (SINTEN): enable adapter to system interrupts.
564 */ 564 */
565 static void tms380tr_enable_interrupts(struct net_device *dev) 565 static void tms380tr_enable_interrupts(struct net_device *dev)
566 { 566 {
567 SIFWRITEB(ACL_SINTEN, SIFACL); 567 SIFWRITEB(ACL_SINTEN, SIFACL);
568 568
569 return; 569 return;
570 } 570 }
571 571
572 /* 572 /*
573 * Put command in command queue, try to execute it. 573 * Put command in command queue, try to execute it.
574 */ 574 */
575 static void tms380tr_exec_cmd(struct net_device *dev, unsigned short Command) 575 static void tms380tr_exec_cmd(struct net_device *dev, unsigned short Command)
576 { 576 {
577 struct net_local *tp = netdev_priv(dev); 577 struct net_local *tp = netdev_priv(dev);
578 578
579 tp->CMDqueue |= Command; 579 tp->CMDqueue |= Command;
580 tms380tr_chk_outstanding_cmds(dev); 580 tms380tr_chk_outstanding_cmds(dev);
581 581
582 return; 582 return;
583 } 583 }
584 584
585 static void tms380tr_timeout(struct net_device *dev) 585 static void tms380tr_timeout(struct net_device *dev)
586 { 586 {
587 /* 587 /*
588 * If we get here, some higher level has decided we are broken. 588 * If we get here, some higher level has decided we are broken.
589 * There should really be a "kick me" function call instead. 589 * There should really be a "kick me" function call instead.
590 * 590 *
591 * Resetting the token ring adapter takes a long time so just 591 * Resetting the token ring adapter takes a long time so just
592 * fake transmission time and go on trying. Our own timeout 592 * fake transmission time and go on trying. Our own timeout
593 * routine is in tms380tr_timer_chk() 593 * routine is in tms380tr_timer_chk()
594 */ 594 */
595 dev->trans_start = jiffies; 595 dev->trans_start = jiffies;
596 netif_wake_queue(dev); 596 netif_wake_queue(dev);
597 } 597 }
598 598
599 /* 599 /*
600 * Gets skb from system, queues it and checks if it can be sent 600 * Gets skb from system, queues it and checks if it can be sent
601 */ 601 */
602 static int tms380tr_send_packet(struct sk_buff *skb, struct net_device *dev) 602 static int tms380tr_send_packet(struct sk_buff *skb, struct net_device *dev)
603 { 603 {
604 struct net_local *tp = netdev_priv(dev); 604 struct net_local *tp = netdev_priv(dev);
605 int err; 605 int err;
606 606
607 err = tms380tr_hardware_send_packet(skb, dev); 607 err = tms380tr_hardware_send_packet(skb, dev);
608 if(tp->TplFree->NextTPLPtr->BusyFlag) 608 if(tp->TplFree->NextTPLPtr->BusyFlag)
609 netif_stop_queue(dev); 609 netif_stop_queue(dev);
610 return (err); 610 return (err);
611 } 611 }
612 612
613 /* 613 /*
614 * Move frames into adapter tx queue 614 * Move frames into adapter tx queue
615 */ 615 */
616 static int tms380tr_hardware_send_packet(struct sk_buff *skb, struct net_device *dev) 616 static int tms380tr_hardware_send_packet(struct sk_buff *skb, struct net_device *dev)
617 { 617 {
618 TPL *tpl; 618 TPL *tpl;
619 short length; 619 short length;
620 unsigned char *buf; 620 unsigned char *buf;
621 unsigned long flags; 621 unsigned long flags;
622 int i; 622 int i;
623 dma_addr_t dmabuf, newbuf; 623 dma_addr_t dmabuf, newbuf;
624 struct net_local *tp = netdev_priv(dev); 624 struct net_local *tp = netdev_priv(dev);
625 625
626 /* Try to get a free TPL from the chain. 626 /* Try to get a free TPL from the chain.
627 * 627 *
628 * NOTE: We *must* always leave one unused TPL in the chain, 628 * NOTE: We *must* always leave one unused TPL in the chain,
629 * because otherwise the adapter might send frames twice. 629 * because otherwise the adapter might send frames twice.
630 */ 630 */
631 spin_lock_irqsave(&tp->lock, flags); 631 spin_lock_irqsave(&tp->lock, flags);
632 if(tp->TplFree->NextTPLPtr->BusyFlag) { /* No free TPL */ 632 if(tp->TplFree->NextTPLPtr->BusyFlag) { /* No free TPL */
633 if (tms380tr_debug > 0) 633 if (tms380tr_debug > 0)
634 printk(KERN_DEBUG "%s: No free TPL\n", dev->name); 634 printk(KERN_DEBUG "%s: No free TPL\n", dev->name);
635 spin_unlock_irqrestore(&tp->lock, flags); 635 spin_unlock_irqrestore(&tp->lock, flags);
636 return 1; 636 return 1;
637 } 637 }
638 638
639 dmabuf = 0; 639 dmabuf = 0;
640 640
641 /* Is buffer reachable for Busmaster-DMA? */ 641 /* Is buffer reachable for Busmaster-DMA? */
642 642
643 length = skb->len; 643 length = skb->len;
644 dmabuf = dma_map_single(tp->pdev, skb->data, length, DMA_TO_DEVICE); 644 dmabuf = dma_map_single(tp->pdev, skb->data, length, DMA_TO_DEVICE);
645 if(tp->dmalimit && (dmabuf + length > tp->dmalimit)) { 645 if(tp->dmalimit && (dmabuf + length > tp->dmalimit)) {
646 /* Copy frame to local buffer */ 646 /* Copy frame to local buffer */
647 dma_unmap_single(tp->pdev, dmabuf, length, DMA_TO_DEVICE); 647 dma_unmap_single(tp->pdev, dmabuf, length, DMA_TO_DEVICE);
648 dmabuf = 0; 648 dmabuf = 0;
649 i = tp->TplFree->TPLIndex; 649 i = tp->TplFree->TPLIndex;
650 buf = tp->LocalTxBuffers[i]; 650 buf = tp->LocalTxBuffers[i];
651 skb_copy_from_linear_data(skb, buf, length); 651 skb_copy_from_linear_data(skb, buf, length);
652 newbuf = ((char *)buf - (char *)tp) + tp->dmabuffer; 652 newbuf = ((char *)buf - (char *)tp) + tp->dmabuffer;
653 } 653 }
654 else { 654 else {
655 /* Send direct from skb->data */ 655 /* Send direct from skb->data */
656 newbuf = dmabuf; 656 newbuf = dmabuf;
657 buf = skb->data; 657 buf = skb->data;
658 } 658 }
659 /* Source address in packet? */ 659 /* Source address in packet? */
660 tms380tr_chk_src_addr(buf, dev->dev_addr); 660 tms380tr_chk_src_addr(buf, dev->dev_addr);
661 tp->LastSendTime = jiffies; 661 tp->LastSendTime = jiffies;
662 tpl = tp->TplFree; /* Get the "free" TPL */ 662 tpl = tp->TplFree; /* Get the "free" TPL */
663 tpl->BusyFlag = 1; /* Mark TPL as busy */ 663 tpl->BusyFlag = 1; /* Mark TPL as busy */
664 tp->TplFree = tpl->NextTPLPtr; 664 tp->TplFree = tpl->NextTPLPtr;
665 665
666 /* Save the skb for delayed return of skb to system */ 666 /* Save the skb for delayed return of skb to system */
667 tpl->Skb = skb; 667 tpl->Skb = skb;
668 tpl->DMABuff = dmabuf; 668 tpl->DMABuff = dmabuf;
669 tpl->FragList[0].DataCount = cpu_to_be16((unsigned short)length); 669 tpl->FragList[0].DataCount = cpu_to_be16((unsigned short)length);
670 tpl->FragList[0].DataAddr = htonl(newbuf); 670 tpl->FragList[0].DataAddr = htonl(newbuf);
671 671
672 /* Write the data length in the transmit list. */ 672 /* Write the data length in the transmit list. */
673 tpl->FrameSize = cpu_to_be16((unsigned short)length); 673 tpl->FrameSize = cpu_to_be16((unsigned short)length);
674 tpl->MData = buf; 674 tpl->MData = buf;
675 675
676 /* Transmit the frame and set the status values. */ 676 /* Transmit the frame and set the status values. */
677 tms380tr_write_tpl_status(tpl, TX_VALID | TX_START_FRAME 677 tms380tr_write_tpl_status(tpl, TX_VALID | TX_START_FRAME
678 | TX_END_FRAME | TX_PASS_SRC_ADDR 678 | TX_END_FRAME | TX_PASS_SRC_ADDR
679 | TX_FRAME_IRQ); 679 | TX_FRAME_IRQ);
680 680
681 /* Let adapter send the frame. */ 681 /* Let adapter send the frame. */
682 tms380tr_exec_sifcmd(dev, CMD_TX_VALID); 682 tms380tr_exec_sifcmd(dev, CMD_TX_VALID);
683 spin_unlock_irqrestore(&tp->lock, flags); 683 spin_unlock_irqrestore(&tp->lock, flags);
684 684
685 return 0; 685 return 0;
686 } 686 }
687 687
688 /* 688 /*
689 * Write the given value to the 'Status' field of the specified TPL. 689 * Write the given value to the 'Status' field of the specified TPL.
690 * NOTE: This function should be used whenever the status of any TPL must be 690 * NOTE: This function should be used whenever the status of any TPL must be
691 * modified by the driver, because the compiler may otherwise change the 691 * modified by the driver, because the compiler may otherwise change the
692 * order of instructions such that writing the TPL status may be executed at 692 * order of instructions such that writing the TPL status may be executed at
693 * an undesireable time. When this function is used, the status is always 693 * an undesireable time. When this function is used, the status is always
694 * written when the function is called. 694 * written when the function is called.
695 */ 695 */
696 static void tms380tr_write_tpl_status(TPL *tpl, unsigned int Status) 696 static void tms380tr_write_tpl_status(TPL *tpl, unsigned int Status)
697 { 697 {
698 tpl->Status = Status; 698 tpl->Status = Status;
699 } 699 }
700 700
701 static void tms380tr_chk_src_addr(unsigned char *frame, unsigned char *hw_addr) 701 static void tms380tr_chk_src_addr(unsigned char *frame, unsigned char *hw_addr)
702 { 702 {
703 unsigned char SRBit; 703 unsigned char SRBit;
704 704
705 if((((unsigned long)frame[8]) & ~0x80) != 0) /* Compare 4 bytes */ 705 if((((unsigned long)frame[8]) & ~0x80) != 0) /* Compare 4 bytes */
706 return; 706 return;
707 if((unsigned short)frame[12] != 0) /* Compare 2 bytes */ 707 if((unsigned short)frame[12] != 0) /* Compare 2 bytes */
708 return; 708 return;
709 709
710 SRBit = frame[8] & 0x80; 710 SRBit = frame[8] & 0x80;
711 memcpy(&frame[8], hw_addr, 6); 711 memcpy(&frame[8], hw_addr, 6);
712 frame[8] |= SRBit; 712 frame[8] |= SRBit;
713 713
714 return; 714 return;
715 } 715 }
716 716
717 /* 717 /*
718 * The timer routine: Check if adapter still open and working, reopen if not. 718 * The timer routine: Check if adapter still open and working, reopen if not.
719 */ 719 */
720 static void tms380tr_timer_chk(unsigned long data) 720 static void tms380tr_timer_chk(unsigned long data)
721 { 721 {
722 struct net_device *dev = (struct net_device*)data; 722 struct net_device *dev = (struct net_device*)data;
723 struct net_local *tp = netdev_priv(dev); 723 struct net_local *tp = netdev_priv(dev);
724 724
725 if(tp->HaltInProgress) 725 if(tp->HaltInProgress)
726 return; 726 return;
727 727
728 tms380tr_chk_outstanding_cmds(dev); 728 tms380tr_chk_outstanding_cmds(dev);
729 if(time_before(tp->LastSendTime + SEND_TIMEOUT, jiffies) 729 if(time_before(tp->LastSendTime + SEND_TIMEOUT, jiffies)
730 && (tp->TplFree != tp->TplBusy)) 730 && (tp->TplFree != tp->TplBusy))
731 { 731 {
732 /* Anything to send, but stalled too long */ 732 /* Anything to send, but stalled too long */
733 tp->LastSendTime = jiffies; 733 tp->LastSendTime = jiffies;
734 tms380tr_exec_cmd(dev, OC_CLOSE); /* Does reopen automatically */ 734 tms380tr_exec_cmd(dev, OC_CLOSE); /* Does reopen automatically */
735 } 735 }
736 736
737 tp->timer.expires = jiffies + 2*HZ; 737 tp->timer.expires = jiffies + 2*HZ;
738 add_timer(&tp->timer); 738 add_timer(&tp->timer);
739 739
740 if(tp->AdapterOpenFlag || tp->ReOpenInProgress) 740 if(tp->AdapterOpenFlag || tp->ReOpenInProgress)
741 return; 741 return;
742 tp->ReOpenInProgress = 1; 742 tp->ReOpenInProgress = 1;
743 tms380tr_open_adapter(dev); 743 tms380tr_open_adapter(dev);
744 744
745 return; 745 return;
746 } 746 }
747 747
748 /* 748 /*
749 * The typical workload of the driver: Handle the network interface interrupts. 749 * The typical workload of the driver: Handle the network interface interrupts.
750 */ 750 */
751 irqreturn_t tms380tr_interrupt(int irq, void *dev_id) 751 irqreturn_t tms380tr_interrupt(int irq, void *dev_id)
752 { 752 {
753 struct net_device *dev = dev_id; 753 struct net_device *dev = dev_id;
754 struct net_local *tp; 754 struct net_local *tp;
755 unsigned short irq_type; 755 unsigned short irq_type;
756 int handled = 0; 756 int handled = 0;
757 757
758 tp = netdev_priv(dev); 758 tp = netdev_priv(dev);
759 759
760 irq_type = SIFREADW(SIFSTS); 760 irq_type = SIFREADW(SIFSTS);
761 761
762 while(irq_type & STS_SYSTEM_IRQ) { 762 while(irq_type & STS_SYSTEM_IRQ) {
763 handled = 1; 763 handled = 1;
764 irq_type &= STS_IRQ_MASK; 764 irq_type &= STS_IRQ_MASK;
765 765
766 if(!tms380tr_chk_ssb(tp, irq_type)) { 766 if(!tms380tr_chk_ssb(tp, irq_type)) {
767 printk(KERN_DEBUG "%s: DATA LATE occurred\n", dev->name); 767 printk(KERN_DEBUG "%s: DATA LATE occurred\n", dev->name);
768 break; 768 break;
769 } 769 }
770 770
771 switch(irq_type) { 771 switch(irq_type) {
772 case STS_IRQ_RECEIVE_STATUS: 772 case STS_IRQ_RECEIVE_STATUS:
773 tms380tr_reset_interrupt(dev); 773 tms380tr_reset_interrupt(dev);
774 tms380tr_rcv_status_irq(dev); 774 tms380tr_rcv_status_irq(dev);
775 break; 775 break;
776 776
777 case STS_IRQ_TRANSMIT_STATUS: 777 case STS_IRQ_TRANSMIT_STATUS:
778 /* Check if TRANSMIT.HALT command is complete */ 778 /* Check if TRANSMIT.HALT command is complete */
779 if(tp->ssb.Parm[0] & COMMAND_COMPLETE) { 779 if(tp->ssb.Parm[0] & COMMAND_COMPLETE) {
780 tp->TransmitCommandActive = 0; 780 tp->TransmitCommandActive = 0;
781 tp->TransmitHaltScheduled = 0; 781 tp->TransmitHaltScheduled = 0;
782 782
783 /* Issue a new transmit command. */ 783 /* Issue a new transmit command. */
784 tms380tr_exec_cmd(dev, OC_TRANSMIT); 784 tms380tr_exec_cmd(dev, OC_TRANSMIT);
785 } 785 }
786 786
787 tms380tr_reset_interrupt(dev); 787 tms380tr_reset_interrupt(dev);
788 tms380tr_tx_status_irq(dev); 788 tms380tr_tx_status_irq(dev);
789 break; 789 break;
790 790
791 case STS_IRQ_COMMAND_STATUS: 791 case STS_IRQ_COMMAND_STATUS:
792 /* The SSB contains status of last command 792 /* The SSB contains status of last command
793 * other than receive/transmit. 793 * other than receive/transmit.
794 */ 794 */
795 tms380tr_cmd_status_irq(dev); 795 tms380tr_cmd_status_irq(dev);
796 break; 796 break;
797 797
798 case STS_IRQ_SCB_CLEAR: 798 case STS_IRQ_SCB_CLEAR:
799 /* The SCB is free for another command. */ 799 /* The SCB is free for another command. */
800 tp->ScbInUse = 0; 800 tp->ScbInUse = 0;
801 tms380tr_chk_outstanding_cmds(dev); 801 tms380tr_chk_outstanding_cmds(dev);
802 break; 802 break;
803 803
804 case STS_IRQ_RING_STATUS: 804 case STS_IRQ_RING_STATUS:
805 tms380tr_ring_status_irq(dev); 805 tms380tr_ring_status_irq(dev);
806 break; 806 break;
807 807
808 case STS_IRQ_ADAPTER_CHECK: 808 case STS_IRQ_ADAPTER_CHECK:
809 tms380tr_chk_irq(dev); 809 tms380tr_chk_irq(dev);
810 break; 810 break;
811 811
812 case STS_IRQ_LLC_STATUS: 812 case STS_IRQ_LLC_STATUS:
813 printk(KERN_DEBUG "tms380tr: unexpected LLC status IRQ\n"); 813 printk(KERN_DEBUG "tms380tr: unexpected LLC status IRQ\n");
814 break; 814 break;
815 815
816 case STS_IRQ_TIMER: 816 case STS_IRQ_TIMER:
817 printk(KERN_DEBUG "tms380tr: unexpected Timer IRQ\n"); 817 printk(KERN_DEBUG "tms380tr: unexpected Timer IRQ\n");
818 break; 818 break;
819 819
820 case STS_IRQ_RECEIVE_PENDING: 820 case STS_IRQ_RECEIVE_PENDING:
821 printk(KERN_DEBUG "tms380tr: unexpected Receive Pending IRQ\n"); 821 printk(KERN_DEBUG "tms380tr: unexpected Receive Pending IRQ\n");
822 break; 822 break;
823 823
824 default: 824 default:
825 printk(KERN_DEBUG "Unknown Token Ring IRQ (0x%04x)\n", irq_type); 825 printk(KERN_DEBUG "Unknown Token Ring IRQ (0x%04x)\n", irq_type);
826 break; 826 break;
827 } 827 }
828 828
829 /* Reset system interrupt if not already done. */ 829 /* Reset system interrupt if not already done. */
830 if(irq_type != STS_IRQ_TRANSMIT_STATUS 830 if(irq_type != STS_IRQ_TRANSMIT_STATUS
831 && irq_type != STS_IRQ_RECEIVE_STATUS) { 831 && irq_type != STS_IRQ_RECEIVE_STATUS) {
832 tms380tr_reset_interrupt(dev); 832 tms380tr_reset_interrupt(dev);
833 } 833 }
834 834
835 irq_type = SIFREADW(SIFSTS); 835 irq_type = SIFREADW(SIFSTS);
836 } 836 }
837 837
838 return IRQ_RETVAL(handled); 838 return IRQ_RETVAL(handled);
839 } 839 }
840 840
841 /* 841 /*
842 * Reset the INTERRUPT SYSTEM bit and issue SSB CLEAR command. 842 * Reset the INTERRUPT SYSTEM bit and issue SSB CLEAR command.
843 */ 843 */
844 static void tms380tr_reset_interrupt(struct net_device *dev) 844 static void tms380tr_reset_interrupt(struct net_device *dev)
845 { 845 {
846 struct net_local *tp = netdev_priv(dev); 846 struct net_local *tp = netdev_priv(dev);
847 SSB *ssb = &tp->ssb; 847 SSB *ssb = &tp->ssb;
848 848
849 /* 849 /*
850 * [Workaround for "Data Late"] 850 * [Workaround for "Data Late"]
851 * Set all fields of the SSB to well-defined values so we can 851 * Set all fields of the SSB to well-defined values so we can
852 * check if the adapter has written the SSB. 852 * check if the adapter has written the SSB.
853 */ 853 */
854 854
855 ssb->STS = (unsigned short) -1; 855 ssb->STS = (unsigned short) -1;
856 ssb->Parm[0] = (unsigned short) -1; 856 ssb->Parm[0] = (unsigned short) -1;
857 ssb->Parm[1] = (unsigned short) -1; 857 ssb->Parm[1] = (unsigned short) -1;
858 ssb->Parm[2] = (unsigned short) -1; 858 ssb->Parm[2] = (unsigned short) -1;
859 859
860 /* Free SSB by issuing SSB_CLEAR command after reading IRQ code 860 /* Free SSB by issuing SSB_CLEAR command after reading IRQ code
861 * and clear STS_SYSTEM_IRQ bit: enable adapter for further interrupts. 861 * and clear STS_SYSTEM_IRQ bit: enable adapter for further interrupts.
862 */ 862 */
863 tms380tr_exec_sifcmd(dev, CMD_SSB_CLEAR | CMD_CLEAR_SYSTEM_IRQ); 863 tms380tr_exec_sifcmd(dev, CMD_SSB_CLEAR | CMD_CLEAR_SYSTEM_IRQ);
864 864
865 return; 865 return;
866 } 866 }
867 867
868 /* 868 /*
869 * Check if the SSB has actually been written by the adapter. 869 * Check if the SSB has actually been written by the adapter.
870 */ 870 */
871 static unsigned char tms380tr_chk_ssb(struct net_local *tp, unsigned short IrqType) 871 static unsigned char tms380tr_chk_ssb(struct net_local *tp, unsigned short IrqType)
872 { 872 {
873 SSB *ssb = &tp->ssb; /* The address of the SSB. */ 873 SSB *ssb = &tp->ssb; /* The address of the SSB. */
874 874
875 /* C 0 1 2 INTERRUPT CODE 875 /* C 0 1 2 INTERRUPT CODE
876 * - - - - -------------- 876 * - - - - --------------
877 * 1 1 1 1 TRANSMIT STATUS 877 * 1 1 1 1 TRANSMIT STATUS
878 * 1 1 1 1 RECEIVE STATUS 878 * 1 1 1 1 RECEIVE STATUS
879 * 1 ? ? 0 COMMAND STATUS 879 * 1 ? ? 0 COMMAND STATUS
880 * 0 0 0 0 SCB CLEAR 880 * 0 0 0 0 SCB CLEAR
881 * 1 1 0 0 RING STATUS 881 * 1 1 0 0 RING STATUS
882 * 0 0 0 0 ADAPTER CHECK 882 * 0 0 0 0 ADAPTER CHECK
883 * 883 *
884 * 0 = SSB field not affected by interrupt 884 * 0 = SSB field not affected by interrupt
885 * 1 = SSB field is affected by interrupt 885 * 1 = SSB field is affected by interrupt
886 * 886 *
887 * C = SSB ADDRESS +0: COMMAND 887 * C = SSB ADDRESS +0: COMMAND
888 * 0 = SSB ADDRESS +2: STATUS 0 888 * 0 = SSB ADDRESS +2: STATUS 0
889 * 1 = SSB ADDRESS +4: STATUS 1 889 * 1 = SSB ADDRESS +4: STATUS 1
890 * 2 = SSB ADDRESS +6: STATUS 2 890 * 2 = SSB ADDRESS +6: STATUS 2
891 */ 891 */
892 892
893 /* Check if this interrupt does use the SSB. */ 893 /* Check if this interrupt does use the SSB. */
894 894
895 if(IrqType != STS_IRQ_TRANSMIT_STATUS 895 if(IrqType != STS_IRQ_TRANSMIT_STATUS
896 && IrqType != STS_IRQ_RECEIVE_STATUS 896 && IrqType != STS_IRQ_RECEIVE_STATUS
897 && IrqType != STS_IRQ_COMMAND_STATUS 897 && IrqType != STS_IRQ_COMMAND_STATUS
898 && IrqType != STS_IRQ_RING_STATUS) 898 && IrqType != STS_IRQ_RING_STATUS)
899 { 899 {
900 return (1); /* SSB not involved. */ 900 return (1); /* SSB not involved. */
901 } 901 }
902 902
903 /* Note: All fields of the SSB have been set to all ones (-1) after it 903 /* Note: All fields of the SSB have been set to all ones (-1) after it
904 * has last been used by the software (see DriverIsr()). 904 * has last been used by the software (see DriverIsr()).
905 * 905 *
906 * Check if the affected SSB fields are still unchanged. 906 * Check if the affected SSB fields are still unchanged.
907 */ 907 */
908 908
909 if(ssb->STS == (unsigned short) -1) 909 if(ssb->STS == (unsigned short) -1)
910 return (0); /* Command field not yet available. */ 910 return (0); /* Command field not yet available. */
911 if(IrqType == STS_IRQ_COMMAND_STATUS) 911 if(IrqType == STS_IRQ_COMMAND_STATUS)
912 return (1); /* Status fields not always affected. */ 912 return (1); /* Status fields not always affected. */
913 if(ssb->Parm[0] == (unsigned short) -1) 913 if(ssb->Parm[0] == (unsigned short) -1)
914 return (0); /* Status 1 field not yet available. */ 914 return (0); /* Status 1 field not yet available. */
915 if(IrqType == STS_IRQ_RING_STATUS) 915 if(IrqType == STS_IRQ_RING_STATUS)
916 return (1); /* Status 2 & 3 fields not affected. */ 916 return (1); /* Status 2 & 3 fields not affected. */
917 917
918 /* Note: At this point, the interrupt is either TRANSMIT or RECEIVE. */ 918 /* Note: At this point, the interrupt is either TRANSMIT or RECEIVE. */
919 if(ssb->Parm[1] == (unsigned short) -1) 919 if(ssb->Parm[1] == (unsigned short) -1)
920 return (0); /* Status 2 field not yet available. */ 920 return (0); /* Status 2 field not yet available. */
921 if(ssb->Parm[2] == (unsigned short) -1) 921 if(ssb->Parm[2] == (unsigned short) -1)
922 return (0); /* Status 3 field not yet available. */ 922 return (0); /* Status 3 field not yet available. */
923 923
924 return (1); /* All SSB fields have been written by the adapter. */ 924 return (1); /* All SSB fields have been written by the adapter. */
925 } 925 }
926 926
927 /* 927 /*
928 * Evaluates the command results status in the SSB status field. 928 * Evaluates the command results status in the SSB status field.
929 */ 929 */
930 static void tms380tr_cmd_status_irq(struct net_device *dev) 930 static void tms380tr_cmd_status_irq(struct net_device *dev)
931 { 931 {
932 struct net_local *tp = netdev_priv(dev); 932 struct net_local *tp = netdev_priv(dev);
933 unsigned short ssb_cmd, ssb_parm_0; 933 unsigned short ssb_cmd, ssb_parm_0;
934 unsigned short ssb_parm_1; 934 unsigned short ssb_parm_1;
935 char *open_err = "Open error -"; 935 char *open_err = "Open error -";
936 char *code_err = "Open code -"; 936 char *code_err = "Open code -";
937 937
938 /* Copy the ssb values to local variables */ 938 /* Copy the ssb values to local variables */
939 ssb_cmd = tp->ssb.STS; 939 ssb_cmd = tp->ssb.STS;
940 ssb_parm_0 = tp->ssb.Parm[0]; 940 ssb_parm_0 = tp->ssb.Parm[0];
941 ssb_parm_1 = tp->ssb.Parm[1]; 941 ssb_parm_1 = tp->ssb.Parm[1];
942 942
943 if(ssb_cmd == OPEN) 943 if(ssb_cmd == OPEN)
944 { 944 {
945 tp->Sleeping = 0; 945 tp->Sleeping = 0;
946 if(!tp->ReOpenInProgress) 946 if(!tp->ReOpenInProgress)
947 wake_up_interruptible(&tp->wait_for_tok_int); 947 wake_up_interruptible(&tp->wait_for_tok_int);
948 948
949 tp->OpenCommandIssued = 0; 949 tp->OpenCommandIssued = 0;
950 tp->ScbInUse = 0; 950 tp->ScbInUse = 0;
951 951
952 if((ssb_parm_0 & 0x00FF) == GOOD_COMPLETION) 952 if((ssb_parm_0 & 0x00FF) == GOOD_COMPLETION)
953 { 953 {
954 /* Success, the adapter is open. */ 954 /* Success, the adapter is open. */
955 tp->LobeWireFaultLogged = 0; 955 tp->LobeWireFaultLogged = 0;
956 tp->AdapterOpenFlag = 1; 956 tp->AdapterOpenFlag = 1;
957 tp->AdapterVirtOpenFlag = 1; 957 tp->AdapterVirtOpenFlag = 1;
958 tp->TransmitCommandActive = 0; 958 tp->TransmitCommandActive = 0;
959 tms380tr_exec_cmd(dev, OC_TRANSMIT); 959 tms380tr_exec_cmd(dev, OC_TRANSMIT);
960 tms380tr_exec_cmd(dev, OC_RECEIVE); 960 tms380tr_exec_cmd(dev, OC_RECEIVE);
961 961
962 if(tp->ReOpenInProgress) 962 if(tp->ReOpenInProgress)
963 tp->ReOpenInProgress = 0; 963 tp->ReOpenInProgress = 0;
964 964
965 return; 965 return;
966 } 966 }
967 else /* The adapter did not open. */ 967 else /* The adapter did not open. */
968 { 968 {
969 if(ssb_parm_0 & NODE_ADDR_ERROR) 969 if(ssb_parm_0 & NODE_ADDR_ERROR)
970 printk(KERN_INFO "%s: Node address error\n", 970 printk(KERN_INFO "%s: Node address error\n",
971 dev->name); 971 dev->name);
972 if(ssb_parm_0 & LIST_SIZE_ERROR) 972 if(ssb_parm_0 & LIST_SIZE_ERROR)
973 printk(KERN_INFO "%s: List size error\n", 973 printk(KERN_INFO "%s: List size error\n",
974 dev->name); 974 dev->name);
975 if(ssb_parm_0 & BUF_SIZE_ERROR) 975 if(ssb_parm_0 & BUF_SIZE_ERROR)
976 printk(KERN_INFO "%s: Buffer size error\n", 976 printk(KERN_INFO "%s: Buffer size error\n",
977 dev->name); 977 dev->name);
978 if(ssb_parm_0 & TX_BUF_COUNT_ERROR) 978 if(ssb_parm_0 & TX_BUF_COUNT_ERROR)
979 printk(KERN_INFO "%s: Tx buffer count error\n", 979 printk(KERN_INFO "%s: Tx buffer count error\n",
980 dev->name); 980 dev->name);
981 if(ssb_parm_0 & INVALID_OPEN_OPTION) 981 if(ssb_parm_0 & INVALID_OPEN_OPTION)
982 printk(KERN_INFO "%s: Invalid open option\n", 982 printk(KERN_INFO "%s: Invalid open option\n",
983 dev->name); 983 dev->name);
984 if(ssb_parm_0 & OPEN_ERROR) 984 if(ssb_parm_0 & OPEN_ERROR)
985 { 985 {
986 /* Show the open phase. */ 986 /* Show the open phase. */
987 switch(ssb_parm_0 & OPEN_PHASES_MASK) 987 switch(ssb_parm_0 & OPEN_PHASES_MASK)
988 { 988 {
989 case LOBE_MEDIA_TEST: 989 case LOBE_MEDIA_TEST:
990 if(!tp->LobeWireFaultLogged) 990 if(!tp->LobeWireFaultLogged)
991 { 991 {
992 tp->LobeWireFaultLogged = 1; 992 tp->LobeWireFaultLogged = 1;
993 printk(KERN_INFO "%s: %s Lobe wire fault (check cable !).\n", dev->name, open_err); 993 printk(KERN_INFO "%s: %s Lobe wire fault (check cable !).\n", dev->name, open_err);
994 } 994 }
995 tp->ReOpenInProgress = 1; 995 tp->ReOpenInProgress = 1;
996 tp->AdapterOpenFlag = 0; 996 tp->AdapterOpenFlag = 0;
997 tp->AdapterVirtOpenFlag = 1; 997 tp->AdapterVirtOpenFlag = 1;
998 tms380tr_open_adapter(dev); 998 tms380tr_open_adapter(dev);
999 return; 999 return;
1000 1000
1001 case PHYSICAL_INSERTION: 1001 case PHYSICAL_INSERTION:
1002 printk(KERN_INFO "%s: %s Physical insertion.\n", dev->name, open_err); 1002 printk(KERN_INFO "%s: %s Physical insertion.\n", dev->name, open_err);
1003 break; 1003 break;
1004 1004
1005 case ADDRESS_VERIFICATION: 1005 case ADDRESS_VERIFICATION:
1006 printk(KERN_INFO "%s: %s Address verification.\n", dev->name, open_err); 1006 printk(KERN_INFO "%s: %s Address verification.\n", dev->name, open_err);
1007 break; 1007 break;
1008 1008
1009 case PARTICIPATION_IN_RING_POLL: 1009 case PARTICIPATION_IN_RING_POLL:
1010 printk(KERN_INFO "%s: %s Participation in ring poll.\n", dev->name, open_err); 1010 printk(KERN_INFO "%s: %s Participation in ring poll.\n", dev->name, open_err);
1011 break; 1011 break;
1012 1012
1013 case REQUEST_INITIALISATION: 1013 case REQUEST_INITIALISATION:
1014 printk(KERN_INFO "%s: %s Request initialisation.\n", dev->name, open_err); 1014 printk(KERN_INFO "%s: %s Request initialisation.\n", dev->name, open_err);
1015 break; 1015 break;
1016 1016
1017 case FULLDUPLEX_CHECK: 1017 case FULLDUPLEX_CHECK:
1018 printk(KERN_INFO "%s: %s Full duplex check.\n", dev->name, open_err); 1018 printk(KERN_INFO "%s: %s Full duplex check.\n", dev->name, open_err);
1019 break; 1019 break;
1020 1020
1021 default: 1021 default:
1022 printk(KERN_INFO "%s: %s Unknown open phase\n", dev->name, open_err); 1022 printk(KERN_INFO "%s: %s Unknown open phase\n", dev->name, open_err);
1023 break; 1023 break;
1024 } 1024 }
1025 1025
1026 /* Show the open errors. */ 1026 /* Show the open errors. */
1027 switch(ssb_parm_0 & OPEN_ERROR_CODES_MASK) 1027 switch(ssb_parm_0 & OPEN_ERROR_CODES_MASK)
1028 { 1028 {
1029 case OPEN_FUNCTION_FAILURE: 1029 case OPEN_FUNCTION_FAILURE:
1030 printk(KERN_INFO "%s: %s OPEN_FUNCTION_FAILURE", dev->name, code_err); 1030 printk(KERN_INFO "%s: %s OPEN_FUNCTION_FAILURE", dev->name, code_err);
1031 tp->LastOpenStatus = 1031 tp->LastOpenStatus =
1032 OPEN_FUNCTION_FAILURE; 1032 OPEN_FUNCTION_FAILURE;
1033 break; 1033 break;
1034 1034
1035 case OPEN_SIGNAL_LOSS: 1035 case OPEN_SIGNAL_LOSS:
1036 printk(KERN_INFO "%s: %s OPEN_SIGNAL_LOSS\n", dev->name, code_err); 1036 printk(KERN_INFO "%s: %s OPEN_SIGNAL_LOSS\n", dev->name, code_err);
1037 tp->LastOpenStatus = 1037 tp->LastOpenStatus =
1038 OPEN_SIGNAL_LOSS; 1038 OPEN_SIGNAL_LOSS;
1039 break; 1039 break;
1040 1040
1041 case OPEN_TIMEOUT: 1041 case OPEN_TIMEOUT:
1042 printk(KERN_INFO "%s: %s OPEN_TIMEOUT\n", dev->name, code_err); 1042 printk(KERN_INFO "%s: %s OPEN_TIMEOUT\n", dev->name, code_err);
1043 tp->LastOpenStatus = 1043 tp->LastOpenStatus =
1044 OPEN_TIMEOUT; 1044 OPEN_TIMEOUT;
1045 break; 1045 break;
1046 1046
1047 case OPEN_RING_FAILURE: 1047 case OPEN_RING_FAILURE:
1048 printk(KERN_INFO "%s: %s OPEN_RING_FAILURE\n", dev->name, code_err); 1048 printk(KERN_INFO "%s: %s OPEN_RING_FAILURE\n", dev->name, code_err);
1049 tp->LastOpenStatus = 1049 tp->LastOpenStatus =
1050 OPEN_RING_FAILURE; 1050 OPEN_RING_FAILURE;
1051 break; 1051 break;
1052 1052
1053 case OPEN_RING_BEACONING: 1053 case OPEN_RING_BEACONING:
1054 printk(KERN_INFO "%s: %s OPEN_RING_BEACONING\n", dev->name, code_err); 1054 printk(KERN_INFO "%s: %s OPEN_RING_BEACONING\n", dev->name, code_err);
1055 tp->LastOpenStatus = 1055 tp->LastOpenStatus =
1056 OPEN_RING_BEACONING; 1056 OPEN_RING_BEACONING;
1057 break; 1057 break;
1058 1058
1059 case OPEN_DUPLICATE_NODEADDR: 1059 case OPEN_DUPLICATE_NODEADDR:
1060 printk(KERN_INFO "%s: %s OPEN_DUPLICATE_NODEADDR\n", dev->name, code_err); 1060 printk(KERN_INFO "%s: %s OPEN_DUPLICATE_NODEADDR\n", dev->name, code_err);
1061 tp->LastOpenStatus = 1061 tp->LastOpenStatus =
1062 OPEN_DUPLICATE_NODEADDR; 1062 OPEN_DUPLICATE_NODEADDR;
1063 break; 1063 break;
1064 1064
1065 case OPEN_REQUEST_INIT: 1065 case OPEN_REQUEST_INIT:
1066 printk(KERN_INFO "%s: %s OPEN_REQUEST_INIT\n", dev->name, code_err); 1066 printk(KERN_INFO "%s: %s OPEN_REQUEST_INIT\n", dev->name, code_err);
1067 tp->LastOpenStatus = 1067 tp->LastOpenStatus =
1068 OPEN_REQUEST_INIT; 1068 OPEN_REQUEST_INIT;
1069 break; 1069 break;
1070 1070
1071 case OPEN_REMOVE_RECEIVED: 1071 case OPEN_REMOVE_RECEIVED:
1072 printk(KERN_INFO "%s: %s OPEN_REMOVE_RECEIVED", dev->name, code_err); 1072 printk(KERN_INFO "%s: %s OPEN_REMOVE_RECEIVED", dev->name, code_err);
1073 tp->LastOpenStatus = 1073 tp->LastOpenStatus =
1074 OPEN_REMOVE_RECEIVED; 1074 OPEN_REMOVE_RECEIVED;
1075 break; 1075 break;
1076 1076
1077 case OPEN_FULLDUPLEX_SET: 1077 case OPEN_FULLDUPLEX_SET:
1078 printk(KERN_INFO "%s: %s OPEN_FULLDUPLEX_SET\n", dev->name, code_err); 1078 printk(KERN_INFO "%s: %s OPEN_FULLDUPLEX_SET\n", dev->name, code_err);
1079 tp->LastOpenStatus = 1079 tp->LastOpenStatus =
1080 OPEN_FULLDUPLEX_SET; 1080 OPEN_FULLDUPLEX_SET;
1081 break; 1081 break;
1082 1082
1083 default: 1083 default:
1084 printk(KERN_INFO "%s: %s Unknown open err code", dev->name, code_err); 1084 printk(KERN_INFO "%s: %s Unknown open err code", dev->name, code_err);
1085 tp->LastOpenStatus = 1085 tp->LastOpenStatus =
1086 OPEN_FUNCTION_FAILURE; 1086 OPEN_FUNCTION_FAILURE;
1087 break; 1087 break;
1088 } 1088 }
1089 } 1089 }
1090 1090
1091 tp->AdapterOpenFlag = 0; 1091 tp->AdapterOpenFlag = 0;
1092 tp->AdapterVirtOpenFlag = 0; 1092 tp->AdapterVirtOpenFlag = 0;
1093 1093
1094 return; 1094 return;
1095 } 1095 }
1096 } 1096 }
1097 else 1097 else
1098 { 1098 {
1099 if(ssb_cmd != READ_ERROR_LOG) 1099 if(ssb_cmd != READ_ERROR_LOG)
1100 return; 1100 return;
1101 1101
1102 /* Add values from the error log table to the MAC 1102 /* Add values from the error log table to the MAC
1103 * statistics counters and update the errorlogtable 1103 * statistics counters and update the errorlogtable
1104 * memory. 1104 * memory.
1105 */ 1105 */
1106 tp->MacStat.line_errors += tp->errorlogtable.Line_Error; 1106 tp->MacStat.line_errors += tp->errorlogtable.Line_Error;
1107 tp->MacStat.burst_errors += tp->errorlogtable.Burst_Error; 1107 tp->MacStat.burst_errors += tp->errorlogtable.Burst_Error;
1108 tp->MacStat.A_C_errors += tp->errorlogtable.ARI_FCI_Error; 1108 tp->MacStat.A_C_errors += tp->errorlogtable.ARI_FCI_Error;
1109 tp->MacStat.lost_frames += tp->errorlogtable.Lost_Frame_Error; 1109 tp->MacStat.lost_frames += tp->errorlogtable.Lost_Frame_Error;
1110 tp->MacStat.recv_congest_count += tp->errorlogtable.Rx_Congest_Error; 1110 tp->MacStat.recv_congest_count += tp->errorlogtable.Rx_Congest_Error;
1111 tp->MacStat.rx_errors += tp->errorlogtable.Rx_Congest_Error; 1111 tp->MacStat.rx_errors += tp->errorlogtable.Rx_Congest_Error;
1112 tp->MacStat.frame_copied_errors += tp->errorlogtable.Frame_Copied_Error; 1112 tp->MacStat.frame_copied_errors += tp->errorlogtable.Frame_Copied_Error;
1113 tp->MacStat.token_errors += tp->errorlogtable.Token_Error; 1113 tp->MacStat.token_errors += tp->errorlogtable.Token_Error;
1114 tp->MacStat.dummy1 += tp->errorlogtable.DMA_Bus_Error; 1114 tp->MacStat.dummy1 += tp->errorlogtable.DMA_Bus_Error;
1115 tp->MacStat.dummy1 += tp->errorlogtable.DMA_Parity_Error; 1115 tp->MacStat.dummy1 += tp->errorlogtable.DMA_Parity_Error;
1116 tp->MacStat.abort_delimiters += tp->errorlogtable.AbortDelimeters; 1116 tp->MacStat.abort_delimiters += tp->errorlogtable.AbortDelimeters;
1117 tp->MacStat.frequency_errors += tp->errorlogtable.Frequency_Error; 1117 tp->MacStat.frequency_errors += tp->errorlogtable.Frequency_Error;
1118 tp->MacStat.internal_errors += tp->errorlogtable.Internal_Error; 1118 tp->MacStat.internal_errors += tp->errorlogtable.Internal_Error;
1119 } 1119 }
1120 1120
1121 return; 1121 return;
1122 } 1122 }
1123 1123
1124 /* 1124 /*
1125 * The inverse routine to tms380tr_open(). 1125 * The inverse routine to tms380tr_open().
1126 */ 1126 */
1127 int tms380tr_close(struct net_device *dev) 1127 int tms380tr_close(struct net_device *dev)
1128 { 1128 {
1129 struct net_local *tp = netdev_priv(dev); 1129 struct net_local *tp = netdev_priv(dev);
1130 netif_stop_queue(dev); 1130 netif_stop_queue(dev);
1131 1131
1132 del_timer(&tp->timer); 1132 del_timer(&tp->timer);
1133 1133
1134 /* Flush the Tx and disable Rx here. */ 1134 /* Flush the Tx and disable Rx here. */
1135 1135
1136 tp->HaltInProgress = 1; 1136 tp->HaltInProgress = 1;
1137 tms380tr_exec_cmd(dev, OC_CLOSE); 1137 tms380tr_exec_cmd(dev, OC_CLOSE);
1138 tp->timer.expires = jiffies + 1*HZ; 1138 tp->timer.expires = jiffies + 1*HZ;
1139 tp->timer.function = tms380tr_timer_end_wait; 1139 tp->timer.function = tms380tr_timer_end_wait;
1140 tp->timer.data = (unsigned long)dev; 1140 tp->timer.data = (unsigned long)dev;
1141 add_timer(&tp->timer); 1141 add_timer(&tp->timer);
1142 1142
1143 tms380tr_enable_interrupts(dev); 1143 tms380tr_enable_interrupts(dev);
1144 1144
1145 tp->Sleeping = 1; 1145 tp->Sleeping = 1;
1146 interruptible_sleep_on(&tp->wait_for_tok_int); 1146 interruptible_sleep_on(&tp->wait_for_tok_int);
1147 tp->TransmitCommandActive = 0; 1147 tp->TransmitCommandActive = 0;
1148 1148
1149 del_timer(&tp->timer); 1149 del_timer(&tp->timer);
1150 tms380tr_disable_interrupts(dev); 1150 tms380tr_disable_interrupts(dev);
1151 1151
1152 #ifdef CONFIG_ISA 1152 #ifdef CONFIG_ISA
1153 if(dev->dma > 0) 1153 if(dev->dma > 0)
1154 { 1154 {
1155 unsigned long flags=claim_dma_lock(); 1155 unsigned long flags=claim_dma_lock();
1156 disable_dma(dev->dma); 1156 disable_dma(dev->dma);
1157 release_dma_lock(flags); 1157 release_dma_lock(flags);
1158 } 1158 }
1159 #endif 1159 #endif
1160 1160
1161 SIFWRITEW(0xFF00, SIFCMD); 1161 SIFWRITEW(0xFF00, SIFCMD);
1162 #if 0 1162 #if 0
1163 if(dev->dma > 0) /* what the? */ 1163 if(dev->dma > 0) /* what the? */
1164 SIFWRITEB(0xff, POSREG); 1164 SIFWRITEB(0xff, POSREG);
1165 #endif 1165 #endif
1166 tms380tr_cancel_tx_queue(tp); 1166 tms380tr_cancel_tx_queue(tp);
1167 1167
1168 return (0); 1168 return (0);
1169 } 1169 }
1170 1170
1171 /* 1171 /*
1172 * Get the current statistics. This may be called with the card open 1172 * Get the current statistics. This may be called with the card open
1173 * or closed. 1173 * or closed.
1174 */ 1174 */
1175 static struct net_device_stats *tms380tr_get_stats(struct net_device *dev) 1175 static struct net_device_stats *tms380tr_get_stats(struct net_device *dev)
1176 { 1176 {
1177 struct net_local *tp = netdev_priv(dev); 1177 struct net_local *tp = netdev_priv(dev);
1178 1178
1179 return ((struct net_device_stats *)&tp->MacStat); 1179 return ((struct net_device_stats *)&tp->MacStat);
1180 } 1180 }
1181 1181
1182 /* 1182 /*
1183 * Set or clear the multicast filter for this adapter. 1183 * Set or clear the multicast filter for this adapter.
1184 */ 1184 */
1185 static void tms380tr_set_multicast_list(struct net_device *dev) 1185 static void tms380tr_set_multicast_list(struct net_device *dev)
1186 { 1186 {
1187 struct net_local *tp = netdev_priv(dev); 1187 struct net_local *tp = netdev_priv(dev);
1188 unsigned int OpenOptions; 1188 unsigned int OpenOptions;
1189 1189
1190 OpenOptions = tp->ocpl.OPENOptions & 1190 OpenOptions = tp->ocpl.OPENOptions &
1191 ~(PASS_ADAPTER_MAC_FRAMES 1191 ~(PASS_ADAPTER_MAC_FRAMES
1192 | PASS_ATTENTION_FRAMES 1192 | PASS_ATTENTION_FRAMES
1193 | PASS_BEACON_MAC_FRAMES 1193 | PASS_BEACON_MAC_FRAMES
1194 | COPY_ALL_MAC_FRAMES 1194 | COPY_ALL_MAC_FRAMES
1195 | COPY_ALL_NON_MAC_FRAMES); 1195 | COPY_ALL_NON_MAC_FRAMES);
1196 1196
1197 tp->ocpl.FunctAddr = 0; 1197 tp->ocpl.FunctAddr = 0;
1198 1198
1199 if(dev->flags & IFF_PROMISC) 1199 if(dev->flags & IFF_PROMISC)
1200 /* Enable promiscuous mode */ 1200 /* Enable promiscuous mode */
1201 OpenOptions |= COPY_ALL_NON_MAC_FRAMES | 1201 OpenOptions |= COPY_ALL_NON_MAC_FRAMES |
1202 COPY_ALL_MAC_FRAMES; 1202 COPY_ALL_MAC_FRAMES;
1203 else 1203 else
1204 { 1204 {
1205 if(dev->flags & IFF_ALLMULTI) 1205 if(dev->flags & IFF_ALLMULTI)
1206 { 1206 {
1207 /* Disable promiscuous mode, use normal mode. */ 1207 /* Disable promiscuous mode, use normal mode. */
1208 tp->ocpl.FunctAddr = 0xFFFFFFFF; 1208 tp->ocpl.FunctAddr = 0xFFFFFFFF;
1209 } 1209 }
1210 else 1210 else
1211 { 1211 {
1212 int i; 1212 int i;
1213 struct dev_mc_list *mclist = dev->mc_list; 1213 struct dev_mc_list *mclist = dev->mc_list;
1214 for (i=0; i< dev->mc_count; i++) 1214 for (i=0; i< dev->mc_count; i++)
1215 { 1215 {
1216 ((char *)(&tp->ocpl.FunctAddr))[0] |= 1216 ((char *)(&tp->ocpl.FunctAddr))[0] |=
1217 mclist->dmi_addr[2]; 1217 mclist->dmi_addr[2];
1218 ((char *)(&tp->ocpl.FunctAddr))[1] |= 1218 ((char *)(&tp->ocpl.FunctAddr))[1] |=
1219 mclist->dmi_addr[3]; 1219 mclist->dmi_addr[3];
1220 ((char *)(&tp->ocpl.FunctAddr))[2] |= 1220 ((char *)(&tp->ocpl.FunctAddr))[2] |=
1221 mclist->dmi_addr[4]; 1221 mclist->dmi_addr[4];
1222 ((char *)(&tp->ocpl.FunctAddr))[3] |= 1222 ((char *)(&tp->ocpl.FunctAddr))[3] |=
1223 mclist->dmi_addr[5]; 1223 mclist->dmi_addr[5];
1224 mclist = mclist->next; 1224 mclist = mclist->next;
1225 } 1225 }
1226 } 1226 }
1227 tms380tr_exec_cmd(dev, OC_SET_FUNCT_ADDR); 1227 tms380tr_exec_cmd(dev, OC_SET_FUNCT_ADDR);
1228 } 1228 }
1229 1229
1230 tp->ocpl.OPENOptions = OpenOptions; 1230 tp->ocpl.OPENOptions = OpenOptions;
1231 tms380tr_exec_cmd(dev, OC_MODIFY_OPEN_PARMS); 1231 tms380tr_exec_cmd(dev, OC_MODIFY_OPEN_PARMS);
1232 return; 1232 return;
1233 } 1233 }
1234 1234
1235 /* 1235 /*
1236 * Wait for some time (microseconds) 1236 * Wait for some time (microseconds)
1237 */ 1237 */
1238 void tms380tr_wait(unsigned long time) 1238 void tms380tr_wait(unsigned long time)
1239 { 1239 {
1240 #if 0 1240 #if 0
1241 long tmp; 1241 long tmp;
1242 1242
1243 tmp = jiffies + time/(1000000/HZ); 1243 tmp = jiffies + time/(1000000/HZ);
1244 do { 1244 do {
1245 tmp = schedule_timeout_interruptible(tmp); 1245 tmp = schedule_timeout_interruptible(tmp);
1246 } while(time_after(tmp, jiffies)); 1246 } while(time_after(tmp, jiffies));
1247 #else 1247 #else
1248 udelay(time); 1248 udelay(time);
1249 #endif 1249 #endif
1250 return; 1250 return;
1251 } 1251 }
1252 1252
1253 /* 1253 /*
1254 * Write a command value to the SIFCMD register 1254 * Write a command value to the SIFCMD register
1255 */ 1255 */
1256 static void tms380tr_exec_sifcmd(struct net_device *dev, unsigned int WriteValue) 1256 static void tms380tr_exec_sifcmd(struct net_device *dev, unsigned int WriteValue)
1257 { 1257 {
1258 unsigned short cmd; 1258 unsigned short cmd;
1259 unsigned short SifStsValue; 1259 unsigned short SifStsValue;
1260 unsigned long loop_counter; 1260 unsigned long loop_counter;
1261 1261
1262 WriteValue = ((WriteValue ^ CMD_SYSTEM_IRQ) | CMD_INTERRUPT_ADAPTER); 1262 WriteValue = ((WriteValue ^ CMD_SYSTEM_IRQ) | CMD_INTERRUPT_ADAPTER);
1263 cmd = (unsigned short)WriteValue; 1263 cmd = (unsigned short)WriteValue;
1264 loop_counter = 0,5 * 800000; 1264 loop_counter = 0,5 * 800000;
1265 do { 1265 do {
1266 SifStsValue = SIFREADW(SIFSTS); 1266 SifStsValue = SIFREADW(SIFSTS);
1267 } while((SifStsValue & CMD_INTERRUPT_ADAPTER) && loop_counter--); 1267 } while((SifStsValue & CMD_INTERRUPT_ADAPTER) && loop_counter--);
1268 SIFWRITEW(cmd, SIFCMD); 1268 SIFWRITEW(cmd, SIFCMD);
1269 1269
1270 return; 1270 return;
1271 } 1271 }
1272 1272
1273 /* 1273 /*
1274 * Processes adapter hardware reset, halts adapter and downloads firmware, 1274 * Processes adapter hardware reset, halts adapter and downloads firmware,
1275 * clears the halt bit. 1275 * clears the halt bit.
1276 */ 1276 */
1277 static int tms380tr_reset_adapter(struct net_device *dev) 1277 static int tms380tr_reset_adapter(struct net_device *dev)
1278 { 1278 {
1279 struct net_local *tp = netdev_priv(dev); 1279 struct net_local *tp = netdev_priv(dev);
1280 unsigned short *fw_ptr; 1280 unsigned short *fw_ptr;
1281 unsigned short count, c, count2; 1281 unsigned short count, c, count2;
1282 const struct firmware *fw_entry = NULL; 1282 const struct firmware *fw_entry = NULL;
1283 1283
1284 if (request_firmware(&fw_entry, "tms380tr.bin", tp->pdev) != 0) { 1284 if (request_firmware(&fw_entry, "tms380tr.bin", tp->pdev) != 0) {
1285 printk(KERN_ALERT "%s: firmware %s is missing, cannot start.\n", 1285 printk(KERN_ALERT "%s: firmware %s is missing, cannot start.\n",
1286 dev->name, "tms380tr.bin"); 1286 dev->name, "tms380tr.bin");
1287 return (-1); 1287 return (-1);
1288 } 1288 }
1289 1289
1290 fw_ptr = (unsigned short *)fw_entry->data; 1290 fw_ptr = (unsigned short *)fw_entry->data;
1291 count2 = fw_entry->size / 2; 1291 count2 = fw_entry->size / 2;
1292 1292
1293 /* Hardware adapter reset */ 1293 /* Hardware adapter reset */
1294 SIFWRITEW(ACL_ARESET, SIFACL); 1294 SIFWRITEW(ACL_ARESET, SIFACL);
1295 tms380tr_wait(40); 1295 tms380tr_wait(40);
1296 1296
1297 c = SIFREADW(SIFACL); 1297 c = SIFREADW(SIFACL);
1298 tms380tr_wait(20); 1298 tms380tr_wait(20);
1299 1299
1300 if(dev->dma == 0) /* For PCI adapters */ 1300 if(dev->dma == 0) /* For PCI adapters */
1301 { 1301 {
1302 c &= ~(ACL_NSELOUT0 | ACL_NSELOUT1); /* Clear bits */ 1302 c &= ~(ACL_NSELOUT0 | ACL_NSELOUT1); /* Clear bits */
1303 if(tp->setnselout) 1303 if(tp->setnselout)
1304 c |= (*tp->setnselout)(dev); 1304 c |= (*tp->setnselout)(dev);
1305 } 1305 }
1306 1306
1307 /* In case a command is pending - forget it */ 1307 /* In case a command is pending - forget it */
1308 tp->ScbInUse = 0; 1308 tp->ScbInUse = 0;
1309 1309
1310 c &= ~ACL_ARESET; /* Clear adapter reset bit */ 1310 c &= ~ACL_ARESET; /* Clear adapter reset bit */
1311 c |= ACL_CPHALT; /* Halt adapter CPU, allow download */ 1311 c |= ACL_CPHALT; /* Halt adapter CPU, allow download */
1312 c |= ACL_BOOT; 1312 c |= ACL_BOOT;
1313 c |= ACL_SINTEN; 1313 c |= ACL_SINTEN;
1314 c &= ~ACL_PSDMAEN; /* Clear pseudo dma bit */ 1314 c &= ~ACL_PSDMAEN; /* Clear pseudo dma bit */
1315 SIFWRITEW(c, SIFACL); 1315 SIFWRITEW(c, SIFACL);
1316 tms380tr_wait(40); 1316 tms380tr_wait(40);
1317 1317
1318 count = 0; 1318 count = 0;
1319 /* Download firmware via DIO interface: */ 1319 /* Download firmware via DIO interface: */
1320 do { 1320 do {
1321 if (count2 < 3) continue; 1321 if (count2 < 3) continue;
1322 1322
1323 /* Download first address part */ 1323 /* Download first address part */
1324 SIFWRITEW(*fw_ptr, SIFADX); 1324 SIFWRITEW(*fw_ptr, SIFADX);
1325 fw_ptr++; 1325 fw_ptr++;
1326 count2--; 1326 count2--;
1327 /* Download second address part */ 1327 /* Download second address part */
1328 SIFWRITEW(*fw_ptr, SIFADD); 1328 SIFWRITEW(*fw_ptr, SIFADD);
1329 fw_ptr++; 1329 fw_ptr++;
1330 count2--; 1330 count2--;
1331 1331
1332 if((count = *fw_ptr) != 0) /* Load loop counter */ 1332 if((count = *fw_ptr) != 0) /* Load loop counter */
1333 { 1333 {
1334 fw_ptr++; /* Download block data */ 1334 fw_ptr++; /* Download block data */
1335 count2--; 1335 count2--;
1336 if (count > count2) continue; 1336 if (count > count2) continue;
1337 1337
1338 for(; count > 0; count--) 1338 for(; count > 0; count--)
1339 { 1339 {
1340 SIFWRITEW(*fw_ptr, SIFINC); 1340 SIFWRITEW(*fw_ptr, SIFINC);
1341 fw_ptr++; 1341 fw_ptr++;
1342 count2--; 1342 count2--;
1343 } 1343 }
1344 } 1344 }
1345 else /* Stop, if last block downloaded */ 1345 else /* Stop, if last block downloaded */
1346 { 1346 {
1347 c = SIFREADW(SIFACL); 1347 c = SIFREADW(SIFACL);
1348 c &= (~ACL_CPHALT | ACL_SINTEN); 1348 c &= (~ACL_CPHALT | ACL_SINTEN);
1349 1349
1350 /* Clear CPHALT and start BUD */ 1350 /* Clear CPHALT and start BUD */
1351 SIFWRITEW(c, SIFACL); 1351 SIFWRITEW(c, SIFACL);
1352 if (fw_entry) 1352 if (fw_entry)
1353 release_firmware(fw_entry); 1353 release_firmware(fw_entry);
1354 return (1); 1354 return (1);
1355 } 1355 }
1356 } while(count == 0); 1356 } while(count == 0);
1357 1357
1358 if (fw_entry) 1358 if (fw_entry)
1359 release_firmware(fw_entry); 1359 release_firmware(fw_entry);
1360 printk(KERN_INFO "%s: Adapter Download Failed\n", dev->name); 1360 printk(KERN_INFO "%s: Adapter Download Failed\n", dev->name);
1361 return (-1); 1361 return (-1);
1362 } 1362 }
1363 1363
1364 /* 1364 /*
1365 * Starts bring up diagnostics of token ring adapter and evaluates 1365 * Starts bring up diagnostics of token ring adapter and evaluates
1366 * diagnostic results. 1366 * diagnostic results.
1367 */ 1367 */
1368 static int tms380tr_bringup_diags(struct net_device *dev) 1368 static int tms380tr_bringup_diags(struct net_device *dev)
1369 { 1369 {
1370 int loop_cnt, retry_cnt; 1370 int loop_cnt, retry_cnt;
1371 unsigned short Status; 1371 unsigned short Status;
1372 1372
1373 tms380tr_wait(HALF_SECOND); 1373 tms380tr_wait(HALF_SECOND);
1374 tms380tr_exec_sifcmd(dev, EXEC_SOFT_RESET); 1374 tms380tr_exec_sifcmd(dev, EXEC_SOFT_RESET);
1375 tms380tr_wait(HALF_SECOND); 1375 tms380tr_wait(HALF_SECOND);
1376 1376
1377 retry_cnt = BUD_MAX_RETRIES; /* maximal number of retrys */ 1377 retry_cnt = BUD_MAX_RETRIES; /* maximal number of retrys */
1378 1378
1379 do { 1379 do {
1380 retry_cnt--; 1380 retry_cnt--;
1381 if(tms380tr_debug > 3) 1381 if(tms380tr_debug > 3)
1382 printk(KERN_DEBUG "BUD-Status: "); 1382 printk(KERN_DEBUG "BUD-Status: ");
1383 loop_cnt = BUD_MAX_LOOPCNT; /* maximum: three seconds*/ 1383 loop_cnt = BUD_MAX_LOOPCNT; /* maximum: three seconds*/
1384 do { /* Inspect BUD results */ 1384 do { /* Inspect BUD results */
1385 loop_cnt--; 1385 loop_cnt--;
1386 tms380tr_wait(HALF_SECOND); 1386 tms380tr_wait(HALF_SECOND);
1387 Status = SIFREADW(SIFSTS); 1387 Status = SIFREADW(SIFSTS);
1388 Status &= STS_MASK; 1388 Status &= STS_MASK;
1389 1389
1390 if(tms380tr_debug > 3) 1390 if(tms380tr_debug > 3)
1391 printk(KERN_DEBUG " %04X \n", Status); 1391 printk(KERN_DEBUG " %04X \n", Status);
1392 /* BUD successfully completed */ 1392 /* BUD successfully completed */
1393 if(Status == STS_INITIALIZE) 1393 if(Status == STS_INITIALIZE)
1394 return (1); 1394 return (1);
1395 /* Unrecoverable hardware error, BUD not completed? */ 1395 /* Unrecoverable hardware error, BUD not completed? */
1396 } while((loop_cnt > 0) && ((Status & (STS_ERROR | STS_TEST)) 1396 } while((loop_cnt > 0) && ((Status & (STS_ERROR | STS_TEST))
1397 != (STS_ERROR | STS_TEST))); 1397 != (STS_ERROR | STS_TEST)));
1398 1398
1399 /* Error preventing completion of BUD */ 1399 /* Error preventing completion of BUD */
1400 if(retry_cnt > 0) 1400 if(retry_cnt > 0)
1401 { 1401 {
1402 printk(KERN_INFO "%s: Adapter Software Reset.\n", 1402 printk(KERN_INFO "%s: Adapter Software Reset.\n",
1403 dev->name); 1403 dev->name);
1404 tms380tr_exec_sifcmd(dev, EXEC_SOFT_RESET); 1404 tms380tr_exec_sifcmd(dev, EXEC_SOFT_RESET);
1405 tms380tr_wait(HALF_SECOND); 1405 tms380tr_wait(HALF_SECOND);
1406 } 1406 }
1407 } while(retry_cnt > 0); 1407 } while(retry_cnt > 0);
1408 1408
1409 Status = SIFREADW(SIFSTS); 1409 Status = SIFREADW(SIFSTS);
1410 1410
1411 printk(KERN_INFO "%s: Hardware error\n", dev->name); 1411 printk(KERN_INFO "%s: Hardware error\n", dev->name);
1412 /* Hardware error occurred! */ 1412 /* Hardware error occurred! */
1413 Status &= 0x001f; 1413 Status &= 0x001f;
1414 if (Status & 0x0010) 1414 if (Status & 0x0010)
1415 printk(KERN_INFO "%s: BUD Error: Timeout\n", dev->name); 1415 printk(KERN_INFO "%s: BUD Error: Timeout\n", dev->name);
1416 else if ((Status & 0x000f) > 6) 1416 else if ((Status & 0x000f) > 6)
1417 printk(KERN_INFO "%s: BUD Error: Illegal Failure\n", dev->name); 1417 printk(KERN_INFO "%s: BUD Error: Illegal Failure\n", dev->name);
1418 else 1418 else
1419 printk(KERN_INFO "%s: Bring Up Diagnostics Error (%04X) occurred\n", dev->name, Status & 0x000f); 1419 printk(KERN_INFO "%s: Bring Up Diagnostics Error (%04X) occurred\n", dev->name, Status & 0x000f);
1420 1420
1421 return (-1); 1421 return (-1);
1422 } 1422 }
1423 1423
1424 /* 1424 /*
1425 * Copy initialisation data to adapter memory, beginning at address 1425 * Copy initialisation data to adapter memory, beginning at address
1426 * 1:0A00; Starting DMA test and evaluating result bits. 1426 * 1:0A00; Starting DMA test and evaluating result bits.
1427 */ 1427 */
1428 static int tms380tr_init_adapter(struct net_device *dev) 1428 static int tms380tr_init_adapter(struct net_device *dev)
1429 { 1429 {
1430 struct net_local *tp = netdev_priv(dev); 1430 struct net_local *tp = netdev_priv(dev);
1431 1431
1432 const unsigned char SCB_Test[6] = {0x00, 0x00, 0xC1, 0xE2, 0xD4, 0x8B}; 1432 const unsigned char SCB_Test[6] = {0x00, 0x00, 0xC1, 0xE2, 0xD4, 0x8B};
1433 const unsigned char SSB_Test[8] = {0xFF, 0xFF, 0xD1, 0xD7, 1433 const unsigned char SSB_Test[8] = {0xFF, 0xFF, 0xD1, 0xD7,
1434 0xC5, 0xD9, 0xC3, 0xD4}; 1434 0xC5, 0xD9, 0xC3, 0xD4};
1435 void *ptr = (void *)&tp->ipb; 1435 void *ptr = (void *)&tp->ipb;
1436 unsigned short *ipb_ptr = (unsigned short *)ptr; 1436 unsigned short *ipb_ptr = (unsigned short *)ptr;
1437 unsigned char *cb_ptr = (unsigned char *) &tp->scb; 1437 unsigned char *cb_ptr = (unsigned char *) &tp->scb;
1438 unsigned char *sb_ptr = (unsigned char *) &tp->ssb; 1438 unsigned char *sb_ptr = (unsigned char *) &tp->ssb;
1439 unsigned short Status; 1439 unsigned short Status;
1440 int i, loop_cnt, retry_cnt; 1440 int i, loop_cnt, retry_cnt;
1441 1441
1442 /* Normalize: byte order low/high, word order high/low! (only IPB!) */ 1442 /* Normalize: byte order low/high, word order high/low! (only IPB!) */
1443 tp->ipb.SCB_Addr = SWAPW(((char *)&tp->scb - (char *)tp) + tp->dmabuffer); 1443 tp->ipb.SCB_Addr = SWAPW(((char *)&tp->scb - (char *)tp) + tp->dmabuffer);
1444 tp->ipb.SSB_Addr = SWAPW(((char *)&tp->ssb - (char *)tp) + tp->dmabuffer); 1444 tp->ipb.SSB_Addr = SWAPW(((char *)&tp->ssb - (char *)tp) + tp->dmabuffer);
1445 1445
1446 if(tms380tr_debug > 3) 1446 if(tms380tr_debug > 3)
1447 { 1447 {
1448 printk(KERN_DEBUG "%s: buffer (real): %lx\n", dev->name, (long) &tp->scb); 1448 printk(KERN_DEBUG "%s: buffer (real): %lx\n", dev->name, (long) &tp->scb);
1449 printk(KERN_DEBUG "%s: buffer (virt): %lx\n", dev->name, (long) ((char *)&tp->scb - (char *)tp) + (long) tp->dmabuffer); 1449 printk(KERN_DEBUG "%s: buffer (virt): %lx\n", dev->name, (long) ((char *)&tp->scb - (char *)tp) + (long) tp->dmabuffer);
1450 printk(KERN_DEBUG "%s: buffer (DMA) : %lx\n", dev->name, (long) tp->dmabuffer); 1450 printk(KERN_DEBUG "%s: buffer (DMA) : %lx\n", dev->name, (long) tp->dmabuffer);
1451 printk(KERN_DEBUG "%s: buffer (tp) : %lx\n", dev->name, (long) tp); 1451 printk(KERN_DEBUG "%s: buffer (tp) : %lx\n", dev->name, (long) tp);
1452 } 1452 }
1453 /* Maximum: three initialization retries */ 1453 /* Maximum: three initialization retries */
1454 retry_cnt = INIT_MAX_RETRIES; 1454 retry_cnt = INIT_MAX_RETRIES;
1455 1455
1456 do { 1456 do {
1457 retry_cnt--; 1457 retry_cnt--;
1458 1458
1459 /* Transfer initialization block */ 1459 /* Transfer initialization block */
1460 SIFWRITEW(0x0001, SIFADX); 1460 SIFWRITEW(0x0001, SIFADX);
1461 1461
1462 /* To address 0001:0A00 of adapter RAM */ 1462 /* To address 0001:0A00 of adapter RAM */
1463 SIFWRITEW(0x0A00, SIFADD); 1463 SIFWRITEW(0x0A00, SIFADD);
1464 1464
1465 /* Write 11 words to adapter RAM */ 1465 /* Write 11 words to adapter RAM */
1466 for(i = 0; i < 11; i++) 1466 for(i = 0; i < 11; i++)
1467 SIFWRITEW(ipb_ptr[i], SIFINC); 1467 SIFWRITEW(ipb_ptr[i], SIFINC);
1468 1468
1469 /* Execute SCB adapter command */ 1469 /* Execute SCB adapter command */
1470 tms380tr_exec_sifcmd(dev, CMD_EXECUTE); 1470 tms380tr_exec_sifcmd(dev, CMD_EXECUTE);
1471 1471
1472 loop_cnt = INIT_MAX_LOOPCNT; /* Maximum: 11 seconds */ 1472 loop_cnt = INIT_MAX_LOOPCNT; /* Maximum: 11 seconds */
1473 1473
1474 /* While remaining retries, no error and not completed */ 1474 /* While remaining retries, no error and not completed */
1475 do { 1475 do {
1476 Status = 0; 1476 Status = 0;
1477 loop_cnt--; 1477 loop_cnt--;
1478 tms380tr_wait(HALF_SECOND); 1478 tms380tr_wait(HALF_SECOND);
1479 1479
1480 /* Mask interesting status bits */ 1480 /* Mask interesting status bits */
1481 Status = SIFREADW(SIFSTS); 1481 Status = SIFREADW(SIFSTS);
1482 Status &= STS_MASK; 1482 Status &= STS_MASK;
1483 } while(((Status &(STS_INITIALIZE | STS_ERROR | STS_TEST)) != 0) 1483 } while(((Status &(STS_INITIALIZE | STS_ERROR | STS_TEST)) != 0)
1484 && ((Status & STS_ERROR) == 0) && (loop_cnt != 0)); 1484 && ((Status & STS_ERROR) == 0) && (loop_cnt != 0));
1485 1485
1486 if((Status & (STS_INITIALIZE | STS_ERROR | STS_TEST)) == 0) 1486 if((Status & (STS_INITIALIZE | STS_ERROR | STS_TEST)) == 0)
1487 { 1487 {
1488 /* Initialization completed without error */ 1488 /* Initialization completed without error */
1489 i = 0; 1489 i = 0;
1490 do { /* Test if contents of SCB is valid */ 1490 do { /* Test if contents of SCB is valid */
1491 if(SCB_Test[i] != *(cb_ptr + i)) 1491 if(SCB_Test[i] != *(cb_ptr + i))
1492 { 1492 {
1493 printk(KERN_INFO "%s: DMA failed\n", dev->name); 1493 printk(KERN_INFO "%s: DMA failed\n", dev->name);
1494 /* DMA data error: wrong data in SCB */ 1494 /* DMA data error: wrong data in SCB */
1495 return (-1); 1495 return (-1);
1496 } 1496 }
1497 i++; 1497 i++;
1498 } while(i < 6); 1498 } while(i < 6);
1499 1499
1500 i = 0; 1500 i = 0;
1501 do { /* Test if contents of SSB is valid */ 1501 do { /* Test if contents of SSB is valid */
1502 if(SSB_Test[i] != *(sb_ptr + i)) 1502 if(SSB_Test[i] != *(sb_ptr + i))
1503 /* DMA data error: wrong data in SSB */ 1503 /* DMA data error: wrong data in SSB */
1504 return (-1); 1504 return (-1);
1505 i++; 1505 i++;
1506 } while (i < 8); 1506 } while (i < 8);
1507 1507
1508 return (1); /* Adapter successfully initialized */ 1508 return (1); /* Adapter successfully initialized */
1509 } 1509 }
1510 else 1510 else
1511 { 1511 {
1512 if((Status & STS_ERROR) != 0) 1512 if((Status & STS_ERROR) != 0)
1513 { 1513 {
1514 /* Initialization error occurred */ 1514 /* Initialization error occurred */
1515 Status = SIFREADW(SIFSTS); 1515 Status = SIFREADW(SIFSTS);
1516 Status &= STS_ERROR_MASK; 1516 Status &= STS_ERROR_MASK;
1517 /* ShowInitialisationErrorCode(Status); */ 1517 /* ShowInitialisationErrorCode(Status); */
1518 printk(KERN_INFO "%s: Status error: %d\n", dev->name, Status); 1518 printk(KERN_INFO "%s: Status error: %d\n", dev->name, Status);
1519 return (-1); /* Unrecoverable error */ 1519 return (-1); /* Unrecoverable error */
1520 } 1520 }
1521 else 1521 else
1522 { 1522 {
1523 if(retry_cnt > 0) 1523 if(retry_cnt > 0)
1524 { 1524 {
1525 /* Reset adapter and try init again */ 1525 /* Reset adapter and try init again */
1526 tms380tr_exec_sifcmd(dev, EXEC_SOFT_RESET); 1526 tms380tr_exec_sifcmd(dev, EXEC_SOFT_RESET);
1527 tms380tr_wait(HALF_SECOND); 1527 tms380tr_wait(HALF_SECOND);
1528 } 1528 }
1529 } 1529 }
1530 } 1530 }
1531 } while(retry_cnt > 0); 1531 } while(retry_cnt > 0);
1532 1532
1533 printk(KERN_INFO "%s: Retry exceeded\n", dev->name); 1533 printk(KERN_INFO "%s: Retry exceeded\n", dev->name);
1534 return (-1); 1534 return (-1);
1535 } 1535 }
1536 1536
1537 /* 1537 /*
1538 * Check for outstanding commands in command queue and tries to execute 1538 * Check for outstanding commands in command queue and tries to execute
1539 * command immediately. Corresponding command flag in command queue is cleared. 1539 * command immediately. Corresponding command flag in command queue is cleared.
1540 */ 1540 */
1541 static void tms380tr_chk_outstanding_cmds(struct net_device *dev) 1541 static void tms380tr_chk_outstanding_cmds(struct net_device *dev)
1542 { 1542 {
1543 struct net_local *tp = netdev_priv(dev); 1543 struct net_local *tp = netdev_priv(dev);
1544 unsigned long Addr = 0; 1544 unsigned long Addr = 0;
1545 1545
1546 if(tp->CMDqueue == 0) 1546 if(tp->CMDqueue == 0)
1547 return; /* No command execution */ 1547 return; /* No command execution */
1548 1548
1549 /* If SCB in use: no command */ 1549 /* If SCB in use: no command */
1550 if(tp->ScbInUse == 1) 1550 if(tp->ScbInUse == 1)
1551 return; 1551 return;
1552 1552
1553 /* Check if adapter is opened, avoiding COMMAND_REJECT 1553 /* Check if adapter is opened, avoiding COMMAND_REJECT
1554 * interrupt by the adapter! 1554 * interrupt by the adapter!
1555 */ 1555 */
1556 if(tp->AdapterOpenFlag == 0) 1556 if(tp->AdapterOpenFlag == 0)
1557 { 1557 {
1558 if(tp->CMDqueue & OC_OPEN) 1558 if(tp->CMDqueue & OC_OPEN)
1559 { 1559 {
1560 /* Execute OPEN command */ 1560 /* Execute OPEN command */
1561 tp->CMDqueue ^= OC_OPEN; 1561 tp->CMDqueue ^= OC_OPEN;
1562 1562
1563 Addr = htonl(((char *)&tp->ocpl - (char *)tp) + tp->dmabuffer); 1563 Addr = htonl(((char *)&tp->ocpl - (char *)tp) + tp->dmabuffer);
1564 tp->scb.Parm[0] = LOWORD(Addr); 1564 tp->scb.Parm[0] = LOWORD(Addr);
1565 tp->scb.Parm[1] = HIWORD(Addr); 1565 tp->scb.Parm[1] = HIWORD(Addr);
1566 tp->scb.CMD = OPEN; 1566 tp->scb.CMD = OPEN;
1567 } 1567 }
1568 else 1568 else
1569 /* No OPEN command queued, but adapter closed. Note: 1569 /* No OPEN command queued, but adapter closed. Note:
1570 * We'll try to re-open the adapter in DriverPoll() 1570 * We'll try to re-open the adapter in DriverPoll()
1571 */ 1571 */
1572 return; /* No adapter command issued */ 1572 return; /* No adapter command issued */
1573 } 1573 }
1574 else 1574 else
1575 { 1575 {
1576 /* Adapter is open; evaluate command queue: try to execute 1576 /* Adapter is open; evaluate command queue: try to execute
1577 * outstanding commands (depending on priority!) CLOSE 1577 * outstanding commands (depending on priority!) CLOSE
1578 * command queued 1578 * command queued
1579 */ 1579 */
1580 if(tp->CMDqueue & OC_CLOSE) 1580 if(tp->CMDqueue & OC_CLOSE)
1581 { 1581 {
1582 tp->CMDqueue ^= OC_CLOSE; 1582 tp->CMDqueue ^= OC_CLOSE;
1583 tp->AdapterOpenFlag = 0; 1583 tp->AdapterOpenFlag = 0;
1584 tp->scb.Parm[0] = 0; /* Parm[0], Parm[1] are ignored */ 1584 tp->scb.Parm[0] = 0; /* Parm[0], Parm[1] are ignored */
1585 tp->scb.Parm[1] = 0; /* but should be set to zero! */ 1585 tp->scb.Parm[1] = 0; /* but should be set to zero! */
1586 tp->scb.CMD = CLOSE; 1586 tp->scb.CMD = CLOSE;
1587 if(!tp->HaltInProgress) 1587 if(!tp->HaltInProgress)
1588 tp->CMDqueue |= OC_OPEN; /* re-open adapter */ 1588 tp->CMDqueue |= OC_OPEN; /* re-open adapter */
1589 else 1589 else
1590 tp->CMDqueue = 0; /* no more commands */ 1590 tp->CMDqueue = 0; /* no more commands */
1591 } 1591 }
1592 else 1592 else
1593 { 1593 {
1594 if(tp->CMDqueue & OC_RECEIVE) 1594 if(tp->CMDqueue & OC_RECEIVE)
1595 { 1595 {
1596 tp->CMDqueue ^= OC_RECEIVE; 1596 tp->CMDqueue ^= OC_RECEIVE;
1597 Addr = htonl(((char *)tp->RplHead - (char *)tp) + tp->dmabuffer); 1597 Addr = htonl(((char *)tp->RplHead - (char *)tp) + tp->dmabuffer);
1598 tp->scb.Parm[0] = LOWORD(Addr); 1598 tp->scb.Parm[0] = LOWORD(Addr);
1599 tp->scb.Parm[1] = HIWORD(Addr); 1599 tp->scb.Parm[1] = HIWORD(Addr);
1600 tp->scb.CMD = RECEIVE; 1600 tp->scb.CMD = RECEIVE;
1601 } 1601 }
1602 else 1602 else
1603 { 1603 {
1604 if(tp->CMDqueue & OC_TRANSMIT_HALT) 1604 if(tp->CMDqueue & OC_TRANSMIT_HALT)
1605 { 1605 {
1606 /* NOTE: TRANSMIT.HALT must be checked 1606 /* NOTE: TRANSMIT.HALT must be checked
1607 * before TRANSMIT. 1607 * before TRANSMIT.
1608 */ 1608 */
1609 tp->CMDqueue ^= OC_TRANSMIT_HALT; 1609 tp->CMDqueue ^= OC_TRANSMIT_HALT;
1610 tp->scb.CMD = TRANSMIT_HALT; 1610 tp->scb.CMD = TRANSMIT_HALT;
1611 1611
1612 /* Parm[0] and Parm[1] are ignored 1612 /* Parm[0] and Parm[1] are ignored
1613 * but should be set to zero! 1613 * but should be set to zero!
1614 */ 1614 */
1615 tp->scb.Parm[0] = 0; 1615 tp->scb.Parm[0] = 0;
1616 tp->scb.Parm[1] = 0; 1616 tp->scb.Parm[1] = 0;
1617 } 1617 }
1618 else 1618 else
1619 { 1619 {
1620 if(tp->CMDqueue & OC_TRANSMIT) 1620 if(tp->CMDqueue & OC_TRANSMIT)
1621 { 1621 {
1622 /* NOTE: TRANSMIT must be 1622 /* NOTE: TRANSMIT must be
1623 * checked after TRANSMIT.HALT 1623 * checked after TRANSMIT.HALT
1624 */ 1624 */
1625 if(tp->TransmitCommandActive) 1625 if(tp->TransmitCommandActive)
1626 { 1626 {
1627 if(!tp->TransmitHaltScheduled) 1627 if(!tp->TransmitHaltScheduled)
1628 { 1628 {
1629 tp->TransmitHaltScheduled = 1; 1629 tp->TransmitHaltScheduled = 1;
1630 tms380tr_exec_cmd(dev, OC_TRANSMIT_HALT) ; 1630 tms380tr_exec_cmd(dev, OC_TRANSMIT_HALT) ;
1631 } 1631 }
1632 tp->TransmitCommandActive = 0; 1632 tp->TransmitCommandActive = 0;
1633 return; 1633 return;
1634 } 1634 }
1635 1635
1636 tp->CMDqueue ^= OC_TRANSMIT; 1636 tp->CMDqueue ^= OC_TRANSMIT;
1637 tms380tr_cancel_tx_queue(tp); 1637 tms380tr_cancel_tx_queue(tp);
1638 Addr = htonl(((char *)tp->TplBusy - (char *)tp) + tp->dmabuffer); 1638 Addr = htonl(((char *)tp->TplBusy - (char *)tp) + tp->dmabuffer);
1639 tp->scb.Parm[0] = LOWORD(Addr); 1639 tp->scb.Parm[0] = LOWORD(Addr);
1640 tp->scb.Parm[1] = HIWORD(Addr); 1640 tp->scb.Parm[1] = HIWORD(Addr);
1641 tp->scb.CMD = TRANSMIT; 1641 tp->scb.CMD = TRANSMIT;
1642 tp->TransmitCommandActive = 1; 1642 tp->TransmitCommandActive = 1;
1643 } 1643 }
1644 else 1644 else
1645 { 1645 {
1646 if(tp->CMDqueue & OC_MODIFY_OPEN_PARMS) 1646 if(tp->CMDqueue & OC_MODIFY_OPEN_PARMS)
1647 { 1647 {
1648 tp->CMDqueue ^= OC_MODIFY_OPEN_PARMS; 1648 tp->CMDqueue ^= OC_MODIFY_OPEN_PARMS;
1649 tp->scb.Parm[0] = tp->ocpl.OPENOptions; /* new OPEN options*/ 1649 tp->scb.Parm[0] = tp->ocpl.OPENOptions; /* new OPEN options*/
1650 tp->scb.Parm[0] |= ENABLE_FULL_DUPLEX_SELECTION; 1650 tp->scb.Parm[0] |= ENABLE_FULL_DUPLEX_SELECTION;
1651 tp->scb.Parm[1] = 0; /* is ignored but should be zero */ 1651 tp->scb.Parm[1] = 0; /* is ignored but should be zero */
1652 tp->scb.CMD = MODIFY_OPEN_PARMS; 1652 tp->scb.CMD = MODIFY_OPEN_PARMS;
1653 } 1653 }
1654 else 1654 else
1655 { 1655 {
1656 if(tp->CMDqueue & OC_SET_FUNCT_ADDR) 1656 if(tp->CMDqueue & OC_SET_FUNCT_ADDR)
1657 { 1657 {
1658 tp->CMDqueue ^= OC_SET_FUNCT_ADDR; 1658 tp->CMDqueue ^= OC_SET_FUNCT_ADDR;
1659 tp->scb.Parm[0] = LOWORD(tp->ocpl.FunctAddr); 1659 tp->scb.Parm[0] = LOWORD(tp->ocpl.FunctAddr);
1660 tp->scb.Parm[1] = HIWORD(tp->ocpl.FunctAddr); 1660 tp->scb.Parm[1] = HIWORD(tp->ocpl.FunctAddr);
1661 tp->scb.CMD = SET_FUNCT_ADDR; 1661 tp->scb.CMD = SET_FUNCT_ADDR;
1662 } 1662 }
1663 else 1663 else
1664 { 1664 {
1665 if(tp->CMDqueue & OC_SET_GROUP_ADDR) 1665 if(tp->CMDqueue & OC_SET_GROUP_ADDR)
1666 { 1666 {
1667 tp->CMDqueue ^= OC_SET_GROUP_ADDR; 1667 tp->CMDqueue ^= OC_SET_GROUP_ADDR;
1668 tp->scb.Parm[0] = LOWORD(tp->ocpl.GroupAddr); 1668 tp->scb.Parm[0] = LOWORD(tp->ocpl.GroupAddr);
1669 tp->scb.Parm[1] = HIWORD(tp->ocpl.GroupAddr); 1669 tp->scb.Parm[1] = HIWORD(tp->ocpl.GroupAddr);
1670 tp->scb.CMD = SET_GROUP_ADDR; 1670 tp->scb.CMD = SET_GROUP_ADDR;
1671 } 1671 }
1672 else 1672 else
1673 { 1673 {
1674 if(tp->CMDqueue & OC_READ_ERROR_LOG) 1674 if(tp->CMDqueue & OC_READ_ERROR_LOG)
1675 { 1675 {
1676 tp->CMDqueue ^= OC_READ_ERROR_LOG; 1676 tp->CMDqueue ^= OC_READ_ERROR_LOG;
1677 Addr = htonl(((char *)&tp->errorlogtable - (char *)tp) + tp->dmabuffer); 1677 Addr = htonl(((char *)&tp->errorlogtable - (char *)tp) + tp->dmabuffer);
1678 tp->scb.Parm[0] = LOWORD(Addr); 1678 tp->scb.Parm[0] = LOWORD(Addr);
1679 tp->scb.Parm[1] = HIWORD(Addr); 1679 tp->scb.Parm[1] = HIWORD(Addr);
1680 tp->scb.CMD = READ_ERROR_LOG; 1680 tp->scb.CMD = READ_ERROR_LOG;
1681 } 1681 }
1682 else 1682 else
1683 { 1683 {
1684 printk(KERN_WARNING "CheckForOutstandingCommand: unknown Command\n"); 1684 printk(KERN_WARNING "CheckForOutstandingCommand: unknown Command\n");
1685 tp->CMDqueue = 0; 1685 tp->CMDqueue = 0;
1686 return; 1686 return;
1687 } 1687 }
1688 } 1688 }
1689 } 1689 }
1690 } 1690 }
1691 } 1691 }
1692 } 1692 }
1693 } 1693 }
1694 } 1694 }
1695 } 1695 }
1696 1696
1697 tp->ScbInUse = 1; /* Set semaphore: SCB in use. */ 1697 tp->ScbInUse = 1; /* Set semaphore: SCB in use. */
1698 1698
1699 /* Execute SCB and generate IRQ when done. */ 1699 /* Execute SCB and generate IRQ when done. */
1700 tms380tr_exec_sifcmd(dev, CMD_EXECUTE | CMD_SCB_REQUEST); 1700 tms380tr_exec_sifcmd(dev, CMD_EXECUTE | CMD_SCB_REQUEST);
1701 1701
1702 return; 1702 return;
1703 } 1703 }
1704 1704
1705 /* 1705 /*
1706 * IRQ conditions: signal loss on the ring, transmit or receive of beacon 1706 * IRQ conditions: signal loss on the ring, transmit or receive of beacon
1707 * frames (disabled if bit 1 of OPEN option is set); report error MAC 1707 * frames (disabled if bit 1 of OPEN option is set); report error MAC
1708 * frame transmit (disabled if bit 2 of OPEN option is set); open or short 1708 * frame transmit (disabled if bit 2 of OPEN option is set); open or short
1709 * circuit fault on the lobe is detected; remove MAC frame received; 1709 * circuit fault on the lobe is detected; remove MAC frame received;
1710 * error counter overflow (255); opened adapter is the only station in ring. 1710 * error counter overflow (255); opened adapter is the only station in ring.
1711 * After some of the IRQs the adapter is closed! 1711 * After some of the IRQs the adapter is closed!
1712 */ 1712 */
1713 static void tms380tr_ring_status_irq(struct net_device *dev) 1713 static void tms380tr_ring_status_irq(struct net_device *dev)
1714 { 1714 {
1715 struct net_local *tp = netdev_priv(dev); 1715 struct net_local *tp = netdev_priv(dev);
1716 1716
1717 tp->CurrentRingStatus = be16_to_cpu((unsigned short)tp->ssb.Parm[0]); 1717 tp->CurrentRingStatus = be16_to_cpu((unsigned short)tp->ssb.Parm[0]);
1718 1718
1719 /* First: fill up statistics */ 1719 /* First: fill up statistics */
1720 if(tp->ssb.Parm[0] & SIGNAL_LOSS) 1720 if(tp->ssb.Parm[0] & SIGNAL_LOSS)
1721 { 1721 {
1722 printk(KERN_INFO "%s: Signal Loss\n", dev->name); 1722 printk(KERN_INFO "%s: Signal Loss\n", dev->name);
1723 tp->MacStat.line_errors++; 1723 tp->MacStat.line_errors++;
1724 } 1724 }
1725 1725
1726 /* Adapter is closed, but initialized */ 1726 /* Adapter is closed, but initialized */
1727 if(tp->ssb.Parm[0] & LOBE_WIRE_FAULT) 1727 if(tp->ssb.Parm[0] & LOBE_WIRE_FAULT)
1728 { 1728 {
1729 printk(KERN_INFO "%s: Lobe Wire Fault, Reopen Adapter\n", 1729 printk(KERN_INFO "%s: Lobe Wire Fault, Reopen Adapter\n",
1730 dev->name); 1730 dev->name);
1731 tp->MacStat.line_errors++; 1731 tp->MacStat.line_errors++;
1732 } 1732 }
1733 1733
1734 if(tp->ssb.Parm[0] & RING_RECOVERY) 1734 if(tp->ssb.Parm[0] & RING_RECOVERY)
1735 printk(KERN_INFO "%s: Ring Recovery\n", dev->name); 1735 printk(KERN_INFO "%s: Ring Recovery\n", dev->name);
1736 1736
1737 /* Counter overflow: read error log */ 1737 /* Counter overflow: read error log */
1738 if(tp->ssb.Parm[0] & COUNTER_OVERFLOW) 1738 if(tp->ssb.Parm[0] & COUNTER_OVERFLOW)
1739 { 1739 {
1740 printk(KERN_INFO "%s: Counter Overflow\n", dev->name); 1740 printk(KERN_INFO "%s: Counter Overflow\n", dev->name);
1741 tms380tr_exec_cmd(dev, OC_READ_ERROR_LOG); 1741 tms380tr_exec_cmd(dev, OC_READ_ERROR_LOG);
1742 } 1742 }
1743 1743
1744 /* Adapter is closed, but initialized */ 1744 /* Adapter is closed, but initialized */
1745 if(tp->ssb.Parm[0] & REMOVE_RECEIVED) 1745 if(tp->ssb.Parm[0] & REMOVE_RECEIVED)
1746 printk(KERN_INFO "%s: Remove Received, Reopen Adapter\n", 1746 printk(KERN_INFO "%s: Remove Received, Reopen Adapter\n",
1747 dev->name); 1747 dev->name);
1748 1748
1749 /* Adapter is closed, but initialized */ 1749 /* Adapter is closed, but initialized */
1750 if(tp->ssb.Parm[0] & AUTO_REMOVAL_ERROR) 1750 if(tp->ssb.Parm[0] & AUTO_REMOVAL_ERROR)
1751 printk(KERN_INFO "%s: Auto Removal Error, Reopen Adapter\n", 1751 printk(KERN_INFO "%s: Auto Removal Error, Reopen Adapter\n",
1752 dev->name); 1752 dev->name);
1753 1753
1754 if(tp->ssb.Parm[0] & HARD_ERROR) 1754 if(tp->ssb.Parm[0] & HARD_ERROR)
1755 printk(KERN_INFO "%s: Hard Error\n", dev->name); 1755 printk(KERN_INFO "%s: Hard Error\n", dev->name);
1756 1756
1757 if(tp->ssb.Parm[0] & SOFT_ERROR) 1757 if(tp->ssb.Parm[0] & SOFT_ERROR)
1758 printk(KERN_INFO "%s: Soft Error\n", dev->name); 1758 printk(KERN_INFO "%s: Soft Error\n", dev->name);
1759 1759
1760 if(tp->ssb.Parm[0] & TRANSMIT_BEACON) 1760 if(tp->ssb.Parm[0] & TRANSMIT_BEACON)
1761 printk(KERN_INFO "%s: Transmit Beacon\n", dev->name); 1761 printk(KERN_INFO "%s: Transmit Beacon\n", dev->name);
1762 1762
1763 if(tp->ssb.Parm[0] & SINGLE_STATION) 1763 if(tp->ssb.Parm[0] & SINGLE_STATION)
1764 printk(KERN_INFO "%s: Single Station\n", dev->name); 1764 printk(KERN_INFO "%s: Single Station\n", dev->name);
1765 1765
1766 /* Check if adapter has been closed */ 1766 /* Check if adapter has been closed */
1767 if(tp->ssb.Parm[0] & ADAPTER_CLOSED) 1767 if(tp->ssb.Parm[0] & ADAPTER_CLOSED)
1768 { 1768 {
1769 printk(KERN_INFO "%s: Adapter closed (Reopening)," 1769 printk(KERN_INFO "%s: Adapter closed (Reopening),"
1770 "CurrentRingStat %x\n", 1770 "CurrentRingStat %x\n",
1771 dev->name, tp->CurrentRingStatus); 1771 dev->name, tp->CurrentRingStatus);
1772 tp->AdapterOpenFlag = 0; 1772 tp->AdapterOpenFlag = 0;
1773 tms380tr_open_adapter(dev); 1773 tms380tr_open_adapter(dev);
1774 } 1774 }
1775 1775
1776 return; 1776 return;
1777 } 1777 }
1778 1778
1779 /* 1779 /*
1780 * Issued if adapter has encountered an unrecoverable hardware 1780 * Issued if adapter has encountered an unrecoverable hardware
1781 * or software error. 1781 * or software error.
1782 */ 1782 */
1783 static void tms380tr_chk_irq(struct net_device *dev) 1783 static void tms380tr_chk_irq(struct net_device *dev)
1784 { 1784 {
1785 int i; 1785 int i;
1786 unsigned short AdapterCheckBlock[4]; 1786 unsigned short AdapterCheckBlock[4];
1787 struct net_local *tp = netdev_priv(dev); 1787 struct net_local *tp = netdev_priv(dev);
1788 1788
1789 tp->AdapterOpenFlag = 0; /* Adapter closed now */ 1789 tp->AdapterOpenFlag = 0; /* Adapter closed now */
1790 1790
1791 /* Page number of adapter memory */ 1791 /* Page number of adapter memory */
1792 SIFWRITEW(0x0001, SIFADX); 1792 SIFWRITEW(0x0001, SIFADX);
1793 /* Address offset */ 1793 /* Address offset */
1794 SIFWRITEW(CHECKADDR, SIFADR); 1794 SIFWRITEW(CHECKADDR, SIFADR);
1795 1795
1796 /* Reading 8 byte adapter check block. */ 1796 /* Reading 8 byte adapter check block. */
1797 for(i = 0; i < 4; i++) 1797 for(i = 0; i < 4; i++)
1798 AdapterCheckBlock[i] = SIFREADW(SIFINC); 1798 AdapterCheckBlock[i] = SIFREADW(SIFINC);
1799 1799
1800 if(tms380tr_debug > 3) 1800 if(tms380tr_debug > 3)
1801 { 1801 {
1802 printk(KERN_DEBUG "%s: AdapterCheckBlock: ", dev->name); 1802 printk(KERN_DEBUG "%s: AdapterCheckBlock: ", dev->name);
1803 for (i = 0; i < 4; i++) 1803 for (i = 0; i < 4; i++)
1804 printk("%04X", AdapterCheckBlock[i]); 1804 printk("%04X", AdapterCheckBlock[i]);
1805 printk("\n"); 1805 printk("\n");
1806 } 1806 }
1807 1807
1808 switch(AdapterCheckBlock[0]) 1808 switch(AdapterCheckBlock[0])
1809 { 1809 {
1810 case DIO_PARITY: 1810 case DIO_PARITY:
1811 printk(KERN_INFO "%s: DIO parity error\n", dev->name); 1811 printk(KERN_INFO "%s: DIO parity error\n", dev->name);
1812 break; 1812 break;
1813 1813
1814 case DMA_READ_ABORT: 1814 case DMA_READ_ABORT:
1815 printk(KERN_INFO "%s DMA read operation aborted:\n", 1815 printk(KERN_INFO "%s DMA read operation aborted:\n",
1816 dev->name); 1816 dev->name);
1817 switch (AdapterCheckBlock[1]) 1817 switch (AdapterCheckBlock[1])
1818 { 1818 {
1819 case 0: 1819 case 0:
1820 printk(KERN_INFO "Timeout\n"); 1820 printk(KERN_INFO "Timeout\n");
1821 printk(KERN_INFO "Address: %04X %04X\n", 1821 printk(KERN_INFO "Address: %04X %04X\n",
1822 AdapterCheckBlock[2], 1822 AdapterCheckBlock[2],
1823 AdapterCheckBlock[3]); 1823 AdapterCheckBlock[3]);
1824 break; 1824 break;
1825 1825
1826 case 1: 1826 case 1:
1827 printk(KERN_INFO "Parity error\n"); 1827 printk(KERN_INFO "Parity error\n");
1828 printk(KERN_INFO "Address: %04X %04X\n", 1828 printk(KERN_INFO "Address: %04X %04X\n",
1829 AdapterCheckBlock[2], 1829 AdapterCheckBlock[2],
1830 AdapterCheckBlock[3]); 1830 AdapterCheckBlock[3]);
1831 break; 1831 break;
1832 1832
1833 case 2: 1833 case 2:
1834 printk(KERN_INFO "Bus error\n"); 1834 printk(KERN_INFO "Bus error\n");
1835 printk(KERN_INFO "Address: %04X %04X\n", 1835 printk(KERN_INFO "Address: %04X %04X\n",
1836 AdapterCheckBlock[2], 1836 AdapterCheckBlock[2],
1837 AdapterCheckBlock[3]); 1837 AdapterCheckBlock[3]);
1838 break; 1838 break;
1839 1839
1840 default: 1840 default:
1841 printk(KERN_INFO "Unknown error.\n"); 1841 printk(KERN_INFO "Unknown error.\n");
1842 break; 1842 break;
1843 } 1843 }
1844 break; 1844 break;
1845 1845
1846 case DMA_WRITE_ABORT: 1846 case DMA_WRITE_ABORT:
1847 printk(KERN_INFO "%s: DMA write operation aborted: \n", 1847 printk(KERN_INFO "%s: DMA write operation aborted: \n",
1848 dev->name); 1848 dev->name);
1849 switch (AdapterCheckBlock[1]) 1849 switch (AdapterCheckBlock[1])
1850 { 1850 {
1851 case 0: 1851 case 0:
1852 printk(KERN_INFO "Timeout\n"); 1852 printk(KERN_INFO "Timeout\n");
1853 printk(KERN_INFO "Address: %04X %04X\n", 1853 printk(KERN_INFO "Address: %04X %04X\n",
1854 AdapterCheckBlock[2], 1854 AdapterCheckBlock[2],
1855 AdapterCheckBlock[3]); 1855 AdapterCheckBlock[3]);
1856 break; 1856 break;
1857 1857
1858 case 1: 1858 case 1:
1859 printk(KERN_INFO "Parity error\n"); 1859 printk(KERN_INFO "Parity error\n");
1860 printk(KERN_INFO "Address: %04X %04X\n", 1860 printk(KERN_INFO "Address: %04X %04X\n",
1861 AdapterCheckBlock[2], 1861 AdapterCheckBlock[2],
1862 AdapterCheckBlock[3]); 1862 AdapterCheckBlock[3]);
1863 break; 1863 break;
1864 1864
1865 case 2: 1865 case 2:
1866 printk(KERN_INFO "Bus error\n"); 1866 printk(KERN_INFO "Bus error\n");
1867 printk(KERN_INFO "Address: %04X %04X\n", 1867 printk(KERN_INFO "Address: %04X %04X\n",
1868 AdapterCheckBlock[2], 1868 AdapterCheckBlock[2],
1869 AdapterCheckBlock[3]); 1869 AdapterCheckBlock[3]);
1870 break; 1870 break;
1871 1871
1872 default: 1872 default:
1873 printk(KERN_INFO "Unknown error.\n"); 1873 printk(KERN_INFO "Unknown error.\n");
1874 break; 1874 break;
1875 } 1875 }
1876 break; 1876 break;
1877 1877
1878 case ILLEGAL_OP_CODE: 1878 case ILLEGAL_OP_CODE:
1879 printk(KERN_INFO "%s: Illegal operation code in firmware\n", 1879 printk(KERN_INFO "%s: Illegal operation code in firmware\n",
1880 dev->name); 1880 dev->name);
1881 /* Parm[0-3]: adapter internal register R13-R15 */ 1881 /* Parm[0-3]: adapter internal register R13-R15 */
1882 break; 1882 break;
1883 1883
1884 case PARITY_ERRORS: 1884 case PARITY_ERRORS:
1885 printk(KERN_INFO "%s: Adapter internal bus parity error\n", 1885 printk(KERN_INFO "%s: Adapter internal bus parity error\n",
1886 dev->name); 1886 dev->name);
1887 /* Parm[0-3]: adapter internal register R13-R15 */ 1887 /* Parm[0-3]: adapter internal register R13-R15 */
1888 break; 1888 break;
1889 1889
1890 case RAM_DATA_ERROR: 1890 case RAM_DATA_ERROR:
1891 printk(KERN_INFO "%s: RAM data error\n", dev->name); 1891 printk(KERN_INFO "%s: RAM data error\n", dev->name);
1892 /* Parm[0-1]: MSW/LSW address of RAM location. */ 1892 /* Parm[0-1]: MSW/LSW address of RAM location. */
1893 break; 1893 break;
1894 1894
1895 case RAM_PARITY_ERROR: 1895 case RAM_PARITY_ERROR:
1896 printk(KERN_INFO "%s: RAM parity error\n", dev->name); 1896 printk(KERN_INFO "%s: RAM parity error\n", dev->name);
1897 /* Parm[0-1]: MSW/LSW address of RAM location. */ 1897 /* Parm[0-1]: MSW/LSW address of RAM location. */
1898 break; 1898 break;
1899 1899
1900 case RING_UNDERRUN: 1900 case RING_UNDERRUN:
1901 printk(KERN_INFO "%s: Internal DMA underrun detected\n", 1901 printk(KERN_INFO "%s: Internal DMA underrun detected\n",
1902 dev->name); 1902 dev->name);
1903 break; 1903 break;
1904 1904
1905 case INVALID_IRQ: 1905 case INVALID_IRQ:
1906 printk(KERN_INFO "%s: Unrecognized interrupt detected\n", 1906 printk(KERN_INFO "%s: Unrecognized interrupt detected\n",
1907 dev->name); 1907 dev->name);
1908 /* Parm[0-3]: adapter internal register R13-R15 */ 1908 /* Parm[0-3]: adapter internal register R13-R15 */
1909 break; 1909 break;
1910 1910
1911 case INVALID_ERROR_IRQ: 1911 case INVALID_ERROR_IRQ:
1912 printk(KERN_INFO "%s: Unrecognized error interrupt detected\n", 1912 printk(KERN_INFO "%s: Unrecognized error interrupt detected\n",
1913 dev->name); 1913 dev->name);
1914 /* Parm[0-3]: adapter internal register R13-R15 */ 1914 /* Parm[0-3]: adapter internal register R13-R15 */
1915 break; 1915 break;
1916 1916
1917 case INVALID_XOP: 1917 case INVALID_XOP:
1918 printk(KERN_INFO "%s: Unrecognized XOP request detected\n", 1918 printk(KERN_INFO "%s: Unrecognized XOP request detected\n",
1919 dev->name); 1919 dev->name);
1920 /* Parm[0-3]: adapter internal register R13-R15 */ 1920 /* Parm[0-3]: adapter internal register R13-R15 */
1921 break; 1921 break;
1922 1922
1923 default: 1923 default:
1924 printk(KERN_INFO "%s: Unknown status", dev->name); 1924 printk(KERN_INFO "%s: Unknown status", dev->name);
1925 break; 1925 break;
1926 } 1926 }
1927 1927
1928 if(tms380tr_chipset_init(dev) == 1) 1928 if(tms380tr_chipset_init(dev) == 1)
1929 { 1929 {
1930 /* Restart of firmware successful */ 1930 /* Restart of firmware successful */
1931 tp->AdapterOpenFlag = 1; 1931 tp->AdapterOpenFlag = 1;
1932 } 1932 }
1933 1933
1934 return; 1934 return;
1935 } 1935 }
1936 1936
1937 /* 1937 /*
1938 * Internal adapter pointer to RAM data are copied from adapter into 1938 * Internal adapter pointer to RAM data are copied from adapter into
1939 * host system. 1939 * host system.
1940 */ 1940 */
1941 static int tms380tr_read_ptr(struct net_device *dev) 1941 static int tms380tr_read_ptr(struct net_device *dev)
1942 { 1942 {
1943 struct net_local *tp = netdev_priv(dev); 1943 struct net_local *tp = netdev_priv(dev);
1944 unsigned short adapterram; 1944 unsigned short adapterram;
1945 1945
1946 tms380tr_read_ram(dev, (unsigned char *)&tp->intptrs.BurnedInAddrPtr, 1946 tms380tr_read_ram(dev, (unsigned char *)&tp->intptrs.BurnedInAddrPtr,
1947 ADAPTER_INT_PTRS, 16); 1947 ADAPTER_INT_PTRS, 16);
1948 tms380tr_read_ram(dev, (unsigned char *)&adapterram, 1948 tms380tr_read_ram(dev, (unsigned char *)&adapterram,
1949 cpu_to_be16((unsigned short)tp->intptrs.AdapterRAMPtr), 2); 1949 cpu_to_be16((unsigned short)tp->intptrs.AdapterRAMPtr), 2);
1950 return be16_to_cpu(adapterram); 1950 return be16_to_cpu(adapterram);
1951 } 1951 }
1952 1952
1953 /* 1953 /*
1954 * Reads a number of bytes from adapter to system memory. 1954 * Reads a number of bytes from adapter to system memory.
1955 */ 1955 */
1956 static void tms380tr_read_ram(struct net_device *dev, unsigned char *Data, 1956 static void tms380tr_read_ram(struct net_device *dev, unsigned char *Data,
1957 unsigned short Address, int Length) 1957 unsigned short Address, int Length)
1958 { 1958 {
1959 int i; 1959 int i;
1960 unsigned short old_sifadx, old_sifadr, InWord; 1960 unsigned short old_sifadx, old_sifadr, InWord;
1961 1961
1962 /* Save the current values */ 1962 /* Save the current values */
1963 old_sifadx = SIFREADW(SIFADX); 1963 old_sifadx = SIFREADW(SIFADX);
1964 old_sifadr = SIFREADW(SIFADR); 1964 old_sifadr = SIFREADW(SIFADR);
1965 1965
1966 /* Page number of adapter memory */ 1966 /* Page number of adapter memory */
1967 SIFWRITEW(0x0001, SIFADX); 1967 SIFWRITEW(0x0001, SIFADX);
1968 /* Address offset in adapter RAM */ 1968 /* Address offset in adapter RAM */
1969 SIFWRITEW(Address, SIFADR); 1969 SIFWRITEW(Address, SIFADR);
1970 1970
1971 /* Copy len byte from adapter memory to system data area. */ 1971 /* Copy len byte from adapter memory to system data area. */
1972 i = 0; 1972 i = 0;
1973 for(;;) 1973 for(;;)
1974 { 1974 {
1975 InWord = SIFREADW(SIFINC); 1975 InWord = SIFREADW(SIFINC);
1976 1976
1977 *(Data + i) = HIBYTE(InWord); /* Write first byte */ 1977 *(Data + i) = HIBYTE(InWord); /* Write first byte */
1978 if(++i == Length) /* All is done break */ 1978 if(++i == Length) /* All is done break */
1979 break; 1979 break;
1980 1980
1981 *(Data + i) = LOBYTE(InWord); /* Write second byte */ 1981 *(Data + i) = LOBYTE(InWord); /* Write second byte */
1982 if (++i == Length) /* All is done break */ 1982 if (++i == Length) /* All is done break */
1983 break; 1983 break;
1984 } 1984 }
1985 1985
1986 /* Restore original values */ 1986 /* Restore original values */
1987 SIFWRITEW(old_sifadx, SIFADX); 1987 SIFWRITEW(old_sifadx, SIFADX);
1988 SIFWRITEW(old_sifadr, SIFADR); 1988 SIFWRITEW(old_sifadr, SIFADR);
1989 1989
1990 return; 1990 return;
1991 } 1991 }
1992 1992
1993 /* 1993 /*
1994 * Cancel all queued packets in the transmission queue. 1994 * Cancel all queued packets in the transmission queue.
1995 */ 1995 */
1996 static void tms380tr_cancel_tx_queue(struct net_local* tp) 1996 static void tms380tr_cancel_tx_queue(struct net_local* tp)
1997 { 1997 {
1998 TPL *tpl; 1998 TPL *tpl;
1999 1999
2000 /* 2000 /*
2001 * NOTE: There must not be an active TRANSMIT command pending, when 2001 * NOTE: There must not be an active TRANSMIT command pending, when
2002 * this function is called. 2002 * this function is called.
2003 */ 2003 */
2004 if(tp->TransmitCommandActive) 2004 if(tp->TransmitCommandActive)
2005 return; 2005 return;
2006 2006
2007 for(;;) 2007 for(;;)
2008 { 2008 {
2009 tpl = tp->TplBusy; 2009 tpl = tp->TplBusy;
2010 if(!tpl->BusyFlag) 2010 if(!tpl->BusyFlag)
2011 break; 2011 break;
2012 /* "Remove" TPL from busy list. */ 2012 /* "Remove" TPL from busy list. */
2013 tp->TplBusy = tpl->NextTPLPtr; 2013 tp->TplBusy = tpl->NextTPLPtr;
2014 tms380tr_write_tpl_status(tpl, 0); /* Clear VALID bit */ 2014 tms380tr_write_tpl_status(tpl, 0); /* Clear VALID bit */
2015 tpl->BusyFlag = 0; /* "free" TPL */ 2015 tpl->BusyFlag = 0; /* "free" TPL */
2016 2016
2017 printk(KERN_INFO "Cancel tx (%08lXh).\n", (unsigned long)tpl); 2017 printk(KERN_INFO "Cancel tx (%08lXh).\n", (unsigned long)tpl);
2018 if (tpl->DMABuff) 2018 if (tpl->DMABuff)
2019 dma_unmap_single(tp->pdev, tpl->DMABuff, tpl->Skb->len, DMA_TO_DEVICE); 2019 dma_unmap_single(tp->pdev, tpl->DMABuff, tpl->Skb->len, DMA_TO_DEVICE);
2020 dev_kfree_skb_any(tpl->Skb); 2020 dev_kfree_skb_any(tpl->Skb);
2021 } 2021 }
2022 2022
2023 return; 2023 return;
2024 } 2024 }
2025 2025
2026 /* 2026 /*
2027 * This function is called whenever a transmit interrupt is generated by the 2027 * This function is called whenever a transmit interrupt is generated by the
2028 * adapter. For a command complete interrupt, it is checked if we have to 2028 * adapter. For a command complete interrupt, it is checked if we have to
2029 * issue a new transmit command or not. 2029 * issue a new transmit command or not.
2030 */ 2030 */
2031 static void tms380tr_tx_status_irq(struct net_device *dev) 2031 static void tms380tr_tx_status_irq(struct net_device *dev)
2032 { 2032 {
2033 struct net_local *tp = netdev_priv(dev); 2033 struct net_local *tp = netdev_priv(dev);
2034 unsigned char HighByte, HighAc, LowAc; 2034 unsigned char HighByte, HighAc, LowAc;
2035 TPL *tpl; 2035 TPL *tpl;
2036 2036
2037 /* NOTE: At this point the SSB from TRANSMIT STATUS is no longer 2037 /* NOTE: At this point the SSB from TRANSMIT STATUS is no longer
2038 * available, because the CLEAR SSB command has already been issued. 2038 * available, because the CLEAR SSB command has already been issued.
2039 * 2039 *
2040 * Process all complete transmissions. 2040 * Process all complete transmissions.
2041 */ 2041 */
2042 2042
2043 for(;;) 2043 for(;;)
2044 { 2044 {
2045 tpl = tp->TplBusy; 2045 tpl = tp->TplBusy;
2046 if(!tpl->BusyFlag || (tpl->Status 2046 if(!tpl->BusyFlag || (tpl->Status
2047 & (TX_VALID | TX_FRAME_COMPLETE)) 2047 & (TX_VALID | TX_FRAME_COMPLETE))
2048 != TX_FRAME_COMPLETE) 2048 != TX_FRAME_COMPLETE)
2049 { 2049 {
2050 break; 2050 break;
2051 } 2051 }
2052 2052
2053 /* "Remove" TPL from busy list. */ 2053 /* "Remove" TPL from busy list. */
2054 tp->TplBusy = tpl->NextTPLPtr ; 2054 tp->TplBusy = tpl->NextTPLPtr ;
2055 2055
2056 /* Check the transmit status field only for directed frames*/ 2056 /* Check the transmit status field only for directed frames*/
2057 if(DIRECTED_FRAME(tpl) && (tpl->Status & TX_ERROR) == 0) 2057 if(DIRECTED_FRAME(tpl) && (tpl->Status & TX_ERROR) == 0)
2058 { 2058 {
2059 HighByte = GET_TRANSMIT_STATUS_HIGH_BYTE(tpl->Status); 2059 HighByte = GET_TRANSMIT_STATUS_HIGH_BYTE(tpl->Status);
2060 HighAc = GET_FRAME_STATUS_HIGH_AC(HighByte); 2060 HighAc = GET_FRAME_STATUS_HIGH_AC(HighByte);
2061 LowAc = GET_FRAME_STATUS_LOW_AC(HighByte); 2061 LowAc = GET_FRAME_STATUS_LOW_AC(HighByte);
2062 2062
2063 if((HighAc != LowAc) || (HighAc == AC_NOT_RECOGNIZED)) 2063 if((HighAc != LowAc) || (HighAc == AC_NOT_RECOGNIZED))
2064 { 2064 {
2065 printk(KERN_DEBUG "%s: (DA=%08lX not recognized)\n", 2065 printk(KERN_DEBUG "%s: (DA=%08lX not recognized)\n",
2066 dev->name, 2066 dev->name,
2067 *(unsigned long *)&tpl->MData[2+2]); 2067 *(unsigned long *)&tpl->MData[2+2]);
2068 } 2068 }
2069 else 2069 else
2070 { 2070 {
2071 if(tms380tr_debug > 3) 2071 if(tms380tr_debug > 3)
2072 printk(KERN_DEBUG "%s: Directed frame tx'd\n", 2072 printk(KERN_DEBUG "%s: Directed frame tx'd\n",
2073 dev->name); 2073 dev->name);
2074 } 2074 }
2075 } 2075 }
2076 else 2076 else
2077 { 2077 {
2078 if(!DIRECTED_FRAME(tpl)) 2078 if(!DIRECTED_FRAME(tpl))
2079 { 2079 {
2080 if(tms380tr_debug > 3) 2080 if(tms380tr_debug > 3)
2081 printk(KERN_DEBUG "%s: Broadcast frame tx'd\n", 2081 printk(KERN_DEBUG "%s: Broadcast frame tx'd\n",
2082 dev->name); 2082 dev->name);
2083 } 2083 }
2084 } 2084 }
2085 2085
2086 tp->MacStat.tx_packets++; 2086 tp->MacStat.tx_packets++;
2087 if (tpl->DMABuff) 2087 if (tpl->DMABuff)
2088 dma_unmap_single(tp->pdev, tpl->DMABuff, tpl->Skb->len, DMA_TO_DEVICE); 2088 dma_unmap_single(tp->pdev, tpl->DMABuff, tpl->Skb->len, DMA_TO_DEVICE);
2089 dev_kfree_skb_irq(tpl->Skb); 2089 dev_kfree_skb_irq(tpl->Skb);
2090 tpl->BusyFlag = 0; /* "free" TPL */ 2090 tpl->BusyFlag = 0; /* "free" TPL */
2091 } 2091 }
2092 2092
2093 if(!tp->TplFree->NextTPLPtr->BusyFlag) 2093 if(!tp->TplFree->NextTPLPtr->BusyFlag)
2094 netif_wake_queue(dev); 2094 netif_wake_queue(dev);
2095 return; 2095 return;
2096 } 2096 }
2097 2097
2098 /* 2098 /*
2099 * Called if a frame receive interrupt is generated by the adapter. 2099 * Called if a frame receive interrupt is generated by the adapter.
2100 * Check if the frame is valid and indicate it to system. 2100 * Check if the frame is valid and indicate it to system.
2101 */ 2101 */
2102 static void tms380tr_rcv_status_irq(struct net_device *dev) 2102 static void tms380tr_rcv_status_irq(struct net_device *dev)
2103 { 2103 {
2104 struct net_local *tp = netdev_priv(dev); 2104 struct net_local *tp = netdev_priv(dev);
2105 unsigned char *ReceiveDataPtr; 2105 unsigned char *ReceiveDataPtr;
2106 struct sk_buff *skb; 2106 struct sk_buff *skb;
2107 unsigned int Length, Length2; 2107 unsigned int Length, Length2;
2108 RPL *rpl; 2108 RPL *rpl;
2109 RPL *SaveHead; 2109 RPL *SaveHead;
2110 dma_addr_t dmabuf; 2110 dma_addr_t dmabuf;
2111 2111
2112 /* NOTE: At this point the SSB from RECEIVE STATUS is no longer 2112 /* NOTE: At this point the SSB from RECEIVE STATUS is no longer
2113 * available, because the CLEAR SSB command has already been issued. 2113 * available, because the CLEAR SSB command has already been issued.
2114 * 2114 *
2115 * Process all complete receives. 2115 * Process all complete receives.
2116 */ 2116 */
2117 2117
2118 for(;;) 2118 for(;;)
2119 { 2119 {
2120 rpl = tp->RplHead; 2120 rpl = tp->RplHead;
2121 if(rpl->Status & RX_VALID) 2121 if(rpl->Status & RX_VALID)
2122 break; /* RPL still in use by adapter */ 2122 break; /* RPL still in use by adapter */
2123 2123
2124 /* Forward RPLHead pointer to next list. */ 2124 /* Forward RPLHead pointer to next list. */
2125 SaveHead = tp->RplHead; 2125 SaveHead = tp->RplHead;
2126 tp->RplHead = rpl->NextRPLPtr; 2126 tp->RplHead = rpl->NextRPLPtr;
2127 2127
2128 /* Get the frame size (Byte swap for Intel). 2128 /* Get the frame size (Byte swap for Intel).
2129 * Do this early (see workaround comment below) 2129 * Do this early (see workaround comment below)
2130 */ 2130 */
2131 Length = be16_to_cpu(rpl->FrameSize); 2131 Length = be16_to_cpu(rpl->FrameSize);
2132 2132
2133 /* Check if the Frame_Start, Frame_End and 2133 /* Check if the Frame_Start, Frame_End and
2134 * Frame_Complete bits are set. 2134 * Frame_Complete bits are set.
2135 */ 2135 */
2136 if((rpl->Status & VALID_SINGLE_BUFFER_FRAME) 2136 if((rpl->Status & VALID_SINGLE_BUFFER_FRAME)
2137 == VALID_SINGLE_BUFFER_FRAME) 2137 == VALID_SINGLE_BUFFER_FRAME)
2138 { 2138 {
2139 ReceiveDataPtr = rpl->MData; 2139 ReceiveDataPtr = rpl->MData;
2140 2140
2141 /* Workaround for delayed write of FrameSize on ISA 2141 /* Workaround for delayed write of FrameSize on ISA
2142 * (FrameSize is false but valid-bit is reset) 2142 * (FrameSize is false but valid-bit is reset)
2143 * Frame size is set to zero when the RPL is freed. 2143 * Frame size is set to zero when the RPL is freed.
2144 * Length2 is there because there have also been 2144 * Length2 is there because there have also been
2145 * cases where the FrameSize was partially written 2145 * cases where the FrameSize was partially written
2146 */ 2146 */
2147 Length2 = be16_to_cpu(rpl->FrameSize); 2147 Length2 = be16_to_cpu(rpl->FrameSize);
2148 2148
2149 if(Length == 0 || Length != Length2) 2149 if(Length == 0 || Length != Length2)
2150 { 2150 {
2151 tp->RplHead = SaveHead; 2151 tp->RplHead = SaveHead;
2152 break; /* Return to tms380tr_interrupt */ 2152 break; /* Return to tms380tr_interrupt */
2153 } 2153 }
2154 tms380tr_update_rcv_stats(tp,ReceiveDataPtr,Length); 2154 tms380tr_update_rcv_stats(tp,ReceiveDataPtr,Length);
2155 2155
2156 if(tms380tr_debug > 3) 2156 if(tms380tr_debug > 3)
2157 printk(KERN_DEBUG "%s: Packet Length %04X (%d)\n", 2157 printk(KERN_DEBUG "%s: Packet Length %04X (%d)\n",
2158 dev->name, Length, Length); 2158 dev->name, Length, Length);
2159 2159
2160 /* Indicate the received frame to system the 2160 /* Indicate the received frame to system the
2161 * adapter does the Source-Routing padding for 2161 * adapter does the Source-Routing padding for
2162 * us. See: OpenOptions in tms380tr_init_opb() 2162 * us. See: OpenOptions in tms380tr_init_opb()
2163 */ 2163 */
2164 skb = rpl->Skb; 2164 skb = rpl->Skb;
2165 if(rpl->SkbStat == SKB_UNAVAILABLE) 2165 if(rpl->SkbStat == SKB_UNAVAILABLE)
2166 { 2166 {
2167 /* Try again to allocate skb */ 2167 /* Try again to allocate skb */
2168 skb = dev_alloc_skb(tp->MaxPacketSize); 2168 skb = dev_alloc_skb(tp->MaxPacketSize);
2169 if(skb == NULL) 2169 if(skb == NULL)
2170 { 2170 {
2171 /* Update Stats ?? */ 2171 /* Update Stats ?? */
2172 } 2172 }
2173 else 2173 else
2174 { 2174 {
2175 skb_put(skb, tp->MaxPacketSize); 2175 skb_put(skb, tp->MaxPacketSize);
2176 rpl->SkbStat = SKB_DATA_COPY; 2176 rpl->SkbStat = SKB_DATA_COPY;
2177 ReceiveDataPtr = rpl->MData; 2177 ReceiveDataPtr = rpl->MData;
2178 } 2178 }
2179 } 2179 }
2180 2180
2181 if(skb && (rpl->SkbStat == SKB_DATA_COPY 2181 if(skb && (rpl->SkbStat == SKB_DATA_COPY
2182 || rpl->SkbStat == SKB_DMA_DIRECT)) 2182 || rpl->SkbStat == SKB_DMA_DIRECT))
2183 { 2183 {
2184 if(rpl->SkbStat == SKB_DATA_COPY) 2184 if(rpl->SkbStat == SKB_DATA_COPY)
2185 skb_copy_to_linear_data(skb, ReceiveDataPtr, 2185 skb_copy_to_linear_data(skb, ReceiveDataPtr,
2186 Length); 2186 Length);
2187 2187
2188 /* Deliver frame to system */ 2188 /* Deliver frame to system */
2189 rpl->Skb = NULL; 2189 rpl->Skb = NULL;
2190 skb_trim(skb,Length); 2190 skb_trim(skb,Length);
2191 skb->protocol = tr_type_trans(skb,dev); 2191 skb->protocol = tr_type_trans(skb,dev);
2192 netif_rx(skb); 2192 netif_rx(skb);
2193 } 2193 }
2194 } 2194 }
2195 else /* Invalid frame */ 2195 else /* Invalid frame */
2196 { 2196 {
2197 if(rpl->Skb != NULL) 2197 if(rpl->Skb != NULL)
2198 dev_kfree_skb_irq(rpl->Skb); 2198 dev_kfree_skb_irq(rpl->Skb);
2199 2199
2200 /* Skip list. */ 2200 /* Skip list. */
2201 if(rpl->Status & RX_START_FRAME) 2201 if(rpl->Status & RX_START_FRAME)
2202 /* Frame start bit is set -> overflow. */ 2202 /* Frame start bit is set -> overflow. */
2203 tp->MacStat.rx_errors++; 2203 tp->MacStat.rx_errors++;
2204 } 2204 }
2205 if (rpl->DMABuff) 2205 if (rpl->DMABuff)
2206 dma_unmap_single(tp->pdev, rpl->DMABuff, tp->MaxPacketSize, DMA_TO_DEVICE); 2206 dma_unmap_single(tp->pdev, rpl->DMABuff, tp->MaxPacketSize, DMA_TO_DEVICE);
2207 rpl->DMABuff = 0; 2207 rpl->DMABuff = 0;
2208 2208
2209 /* Allocate new skb for rpl */ 2209 /* Allocate new skb for rpl */
2210 rpl->Skb = dev_alloc_skb(tp->MaxPacketSize); 2210 rpl->Skb = dev_alloc_skb(tp->MaxPacketSize);
2211 /* skb == NULL ? then use local buffer */ 2211 /* skb == NULL ? then use local buffer */
2212 if(rpl->Skb == NULL) 2212 if(rpl->Skb == NULL)
2213 { 2213 {
2214 rpl->SkbStat = SKB_UNAVAILABLE; 2214 rpl->SkbStat = SKB_UNAVAILABLE;
2215 rpl->FragList[0].DataAddr = htonl(((char *)tp->LocalRxBuffers[rpl->RPLIndex] - (char *)tp) + tp->dmabuffer); 2215 rpl->FragList[0].DataAddr = htonl(((char *)tp->LocalRxBuffers[rpl->RPLIndex] - (char *)tp) + tp->dmabuffer);
2216 rpl->MData = tp->LocalRxBuffers[rpl->RPLIndex]; 2216 rpl->MData = tp->LocalRxBuffers[rpl->RPLIndex];
2217 } 2217 }
2218 else /* skb != NULL */ 2218 else /* skb != NULL */
2219 { 2219 {
2220 rpl->Skb->dev = dev; 2220 rpl->Skb->dev = dev;
2221 skb_put(rpl->Skb, tp->MaxPacketSize); 2221 skb_put(rpl->Skb, tp->MaxPacketSize);
2222 2222
2223 /* Data unreachable for DMA ? then use local buffer */ 2223 /* Data unreachable for DMA ? then use local buffer */
2224 dmabuf = dma_map_single(tp->pdev, rpl->Skb->data, tp->MaxPacketSize, DMA_FROM_DEVICE); 2224 dmabuf = dma_map_single(tp->pdev, rpl->Skb->data, tp->MaxPacketSize, DMA_FROM_DEVICE);
2225 if(tp->dmalimit && (dmabuf + tp->MaxPacketSize > tp->dmalimit)) 2225 if(tp->dmalimit && (dmabuf + tp->MaxPacketSize > tp->dmalimit))
2226 { 2226 {
2227 rpl->SkbStat = SKB_DATA_COPY; 2227 rpl->SkbStat = SKB_DATA_COPY;
2228 rpl->FragList[0].DataAddr = htonl(((char *)tp->LocalRxBuffers[rpl->RPLIndex] - (char *)tp) + tp->dmabuffer); 2228 rpl->FragList[0].DataAddr = htonl(((char *)tp->LocalRxBuffers[rpl->RPLIndex] - (char *)tp) + tp->dmabuffer);
2229 rpl->MData = tp->LocalRxBuffers[rpl->RPLIndex]; 2229 rpl->MData = tp->LocalRxBuffers[rpl->RPLIndex];
2230 } 2230 }
2231 else 2231 else
2232 { 2232 {
2233 /* DMA directly in skb->data */ 2233 /* DMA directly in skb->data */
2234 rpl->SkbStat = SKB_DMA_DIRECT; 2234 rpl->SkbStat = SKB_DMA_DIRECT;
2235 rpl->FragList[0].DataAddr = htonl(dmabuf); 2235 rpl->FragList[0].DataAddr = htonl(dmabuf);
2236 rpl->MData = rpl->Skb->data; 2236 rpl->MData = rpl->Skb->data;
2237 rpl->DMABuff = dmabuf; 2237 rpl->DMABuff = dmabuf;
2238 } 2238 }
2239 } 2239 }
2240 2240
2241 rpl->FragList[0].DataCount = cpu_to_be16((unsigned short)tp->MaxPacketSize); 2241 rpl->FragList[0].DataCount = cpu_to_be16((unsigned short)tp->MaxPacketSize);
2242 rpl->FrameSize = 0; 2242 rpl->FrameSize = 0;
2243 2243
2244 /* Pass the last RPL back to the adapter */ 2244 /* Pass the last RPL back to the adapter */
2245 tp->RplTail->FrameSize = 0; 2245 tp->RplTail->FrameSize = 0;
2246 2246
2247 /* Reset the CSTAT field in the list. */ 2247 /* Reset the CSTAT field in the list. */
2248 tms380tr_write_rpl_status(tp->RplTail, RX_VALID | RX_FRAME_IRQ); 2248 tms380tr_write_rpl_status(tp->RplTail, RX_VALID | RX_FRAME_IRQ);
2249 2249
2250 /* Current RPL becomes last one in list. */ 2250 /* Current RPL becomes last one in list. */
2251 tp->RplTail = tp->RplTail->NextRPLPtr; 2251 tp->RplTail = tp->RplTail->NextRPLPtr;
2252 2252
2253 /* Inform adapter about RPL valid. */ 2253 /* Inform adapter about RPL valid. */
2254 tms380tr_exec_sifcmd(dev, CMD_RX_VALID); 2254 tms380tr_exec_sifcmd(dev, CMD_RX_VALID);
2255 } 2255 }
2256 2256
2257 return; 2257 return;
2258 } 2258 }
2259 2259
2260 /* 2260 /*
2261 * This function should be used whenever the status of any RPL must be 2261 * This function should be used whenever the status of any RPL must be
2262 * modified by the driver, because the compiler may otherwise change the 2262 * modified by the driver, because the compiler may otherwise change the
2263 * order of instructions such that writing the RPL status may be executed 2263 * order of instructions such that writing the RPL status may be executed
2264 * at an undesireable time. When this function is used, the status is 2264 * at an undesireable time. When this function is used, the status is
2265 * always written when the function is called. 2265 * always written when the function is called.
2266 */ 2266 */
2267 static void tms380tr_write_rpl_status(RPL *rpl, unsigned int Status) 2267 static void tms380tr_write_rpl_status(RPL *rpl, unsigned int Status)
2268 { 2268 {
2269 rpl->Status = Status; 2269 rpl->Status = Status;
2270 2270
2271 return; 2271 return;
2272 } 2272 }
2273 2273
2274 /* 2274 /*
2275 * The function updates the statistic counters in mac->MacStat. 2275 * The function updates the statistic counters in mac->MacStat.
2276 * It differtiates between directed and broadcast/multicast ( ==functional) 2276 * It differtiates between directed and broadcast/multicast ( ==functional)
2277 * frames. 2277 * frames.
2278 */ 2278 */
2279 static void tms380tr_update_rcv_stats(struct net_local *tp, unsigned char DataPtr[], 2279 static void tms380tr_update_rcv_stats(struct net_local *tp, unsigned char DataPtr[],
2280 unsigned int Length) 2280 unsigned int Length)
2281 { 2281 {
2282 tp->MacStat.rx_packets++; 2282 tp->MacStat.rx_packets++;
2283 tp->MacStat.rx_bytes += Length; 2283 tp->MacStat.rx_bytes += Length;
2284 2284
2285 /* Test functional bit */ 2285 /* Test functional bit */
2286 if(DataPtr[2] & GROUP_BIT) 2286 if(DataPtr[2] & GROUP_BIT)
2287 tp->MacStat.multicast++; 2287 tp->MacStat.multicast++;
2288 2288
2289 return; 2289 return;
2290 } 2290 }
2291 2291
2292 static int tms380tr_set_mac_address(struct net_device *dev, void *addr) 2292 static int tms380tr_set_mac_address(struct net_device *dev, void *addr)
2293 { 2293 {
2294 struct net_local *tp = netdev_priv(dev); 2294 struct net_local *tp = netdev_priv(dev);
2295 struct sockaddr *saddr = addr; 2295 struct sockaddr *saddr = addr;
2296 2296
2297 if (tp->AdapterOpenFlag || tp->AdapterVirtOpenFlag) { 2297 if (tp->AdapterOpenFlag || tp->AdapterVirtOpenFlag) {
2298 printk(KERN_WARNING "%s: Cannot set MAC/LAA address while card is open\n", dev->name); 2298 printk(KERN_WARNING "%s: Cannot set MAC/LAA address while card is open\n", dev->name);
2299 return -EIO; 2299 return -EIO;
2300 } 2300 }
2301 memcpy(dev->dev_addr, saddr->sa_data, dev->addr_len); 2301 memcpy(dev->dev_addr, saddr->sa_data, dev->addr_len);
2302 return 0; 2302 return 0;
2303 } 2303 }
2304 2304
2305 #if TMS380TR_DEBUG > 0 2305 #if TMS380TR_DEBUG > 0
2306 /* 2306 /*
2307 * Dump Packet (data) 2307 * Dump Packet (data)
2308 */ 2308 */
2309 static void tms380tr_dump(unsigned char *Data, int length) 2309 static void tms380tr_dump(unsigned char *Data, int length)
2310 { 2310 {
2311 int i, j; 2311 int i, j;
2312 2312
2313 for (i = 0, j = 0; i < length / 8; i++, j += 8) 2313 for (i = 0, j = 0; i < length / 8; i++, j += 8)
2314 { 2314 {
2315 printk(KERN_DEBUG "%02x %02x %02x %02x %02x %02x %02x %02x\n", 2315 printk(KERN_DEBUG "%02x %02x %02x %02x %02x %02x %02x %02x\n",
2316 Data[j+0],Data[j+1],Data[j+2],Data[j+3], 2316 Data[j+0],Data[j+1],Data[j+2],Data[j+3],
2317 Data[j+4],Data[j+5],Data[j+6],Data[j+7]); 2317 Data[j+4],Data[j+5],Data[j+6],Data[j+7]);
2318 } 2318 }
2319 2319
2320 return; 2320 return;
2321 } 2321 }
2322 #endif 2322 #endif
2323 2323
2324 void tmsdev_term(struct net_device *dev) 2324 void tmsdev_term(struct net_device *dev)
2325 { 2325 {
2326 struct net_local *tp; 2326 struct net_local *tp;
2327 2327
2328 tp = netdev_priv(dev); 2328 tp = netdev_priv(dev);
2329 dma_unmap_single(tp->pdev, tp->dmabuffer, sizeof(struct net_local), 2329 dma_unmap_single(tp->pdev, tp->dmabuffer, sizeof(struct net_local),
2330 DMA_BIDIRECTIONAL); 2330 DMA_BIDIRECTIONAL);
2331 } 2331 }
2332 2332
2333 const struct net_device_ops tms380tr_netdev_ops = {
2334 .ndo_open = tms380tr_open,
2335 .ndo_stop = tms380tr_close,
2336 .ndo_start_xmit = tms380tr_send_packet,
2337 .ndo_tx_timeout = tms380tr_timeout,
2338 .ndo_get_stats = tms380tr_get_stats,
2339 .ndo_set_multicast_list = tms380tr_set_multicast_list,
2340 .ndo_set_mac_address = tms380tr_set_mac_address,
2341 };
2342 EXPORT_SYMBOL(tms380tr_netdev_ops);
2343
2333 int tmsdev_init(struct net_device *dev, struct device *pdev) 2344 int tmsdev_init(struct net_device *dev, struct device *pdev)
2334 { 2345 {
2335 struct net_local *tms_local; 2346 struct net_local *tms_local;
2336 2347
2337 memset(netdev_priv(dev), 0, sizeof(struct net_local)); 2348 memset(netdev_priv(dev), 0, sizeof(struct net_local));
2338 tms_local = netdev_priv(dev); 2349 tms_local = netdev_priv(dev);
2339 init_waitqueue_head(&tms_local->wait_for_tok_int); 2350 init_waitqueue_head(&tms_local->wait_for_tok_int);
2340 if (pdev->dma_mask) 2351 if (pdev->dma_mask)
2341 tms_local->dmalimit = *pdev->dma_mask; 2352 tms_local->dmalimit = *pdev->dma_mask;
2342 else 2353 else
2343 return -ENOMEM; 2354 return -ENOMEM;
2344 tms_local->pdev = pdev; 2355 tms_local->pdev = pdev;
2345 tms_local->dmabuffer = dma_map_single(pdev, (void *)tms_local, 2356 tms_local->dmabuffer = dma_map_single(pdev, (void *)tms_local,
2346 sizeof(struct net_local), DMA_BIDIRECTIONAL); 2357 sizeof(struct net_local), DMA_BIDIRECTIONAL);
2347 if (tms_local->dmabuffer + sizeof(struct net_local) > 2358 if (tms_local->dmabuffer + sizeof(struct net_local) >
2348 tms_local->dmalimit) 2359 tms_local->dmalimit)
2349 { 2360 {
2350 printk(KERN_INFO "%s: Memory not accessible for DMA\n", 2361 printk(KERN_INFO "%s: Memory not accessible for DMA\n",
2351 dev->name); 2362 dev->name);
2352 tmsdev_term(dev); 2363 tmsdev_term(dev);
2353 return -ENOMEM; 2364 return -ENOMEM;
2354 } 2365 }
2355 2366
2356 /* These can be overridden by the card driver if needed */ 2367 dev->netdev_ops = &tms380tr_netdev_ops;
2357 dev->open = tms380tr_open;
2358 dev->stop = tms380tr_close;
2359 dev->do_ioctl = NULL;
2360 dev->hard_start_xmit = tms380tr_send_packet;
2361 dev->tx_timeout = tms380tr_timeout;
2362 dev->watchdog_timeo = HZ; 2368 dev->watchdog_timeo = HZ;
2363 dev->get_stats = tms380tr_get_stats;
2364 dev->set_multicast_list = &tms380tr_set_multicast_list;
2365 dev->set_mac_address = tms380tr_set_mac_address;
2366 2369
2367 return 0; 2370 return 0;
2368 } 2371 }
2369 2372
2370 EXPORT_SYMBOL(tms380tr_open); 2373 EXPORT_SYMBOL(tms380tr_open);
2371 EXPORT_SYMBOL(tms380tr_close); 2374 EXPORT_SYMBOL(tms380tr_close);
2372 EXPORT_SYMBOL(tms380tr_interrupt); 2375 EXPORT_SYMBOL(tms380tr_interrupt);
2373 EXPORT_SYMBOL(tmsdev_init); 2376 EXPORT_SYMBOL(tmsdev_init);
2374 EXPORT_SYMBOL(tmsdev_term); 2377 EXPORT_SYMBOL(tmsdev_term);
2375 EXPORT_SYMBOL(tms380tr_wait); 2378 EXPORT_SYMBOL(tms380tr_wait);
2376 2379
2377 #ifdef MODULE 2380 #ifdef MODULE
2378 2381
2379 static struct module *TMS380_module = NULL; 2382 static struct module *TMS380_module = NULL;
2380 2383
2381 int init_module(void) 2384 int init_module(void)
2382 { 2385 {
2383 printk(KERN_DEBUG "%s", version); 2386 printk(KERN_DEBUG "%s", version);
2384 2387
2385 TMS380_module = &__this_module; 2388 TMS380_module = &__this_module;
2386 return 0; 2389 return 0;
2387 } 2390 }
2388 2391
2389 void cleanup_module(void) 2392 void cleanup_module(void)
drivers/net/tokenring/tms380tr.h
Diff comments   View file @ f1608f8
1 /* 1 /*
2 * tms380tr.h: TI TMS380 Token Ring driver for Linux 2 * tms380tr.h: TI TMS380 Token Ring driver for Linux
3 * 3 *
4 * Authors: 4 * Authors:
5 * - Christoph Goos <cgoos@syskonnect.de> 5 * - Christoph Goos <cgoos@syskonnect.de>
6 * - Adam Fritzler 6 * - Adam Fritzler
7 */ 7 */
8 8
9 #ifndef __LINUX_TMS380TR_H 9 #ifndef __LINUX_TMS380TR_H
10 #define __LINUX_TMS380TR_H 10 #define __LINUX_TMS380TR_H
11 11
12 #ifdef __KERNEL__ 12 #ifdef __KERNEL__
13 13
14 #include <linux/interrupt.h> 14 #include <linux/interrupt.h>
15 15
16 /* module prototypes */ 16 /* module prototypes */
17 extern const struct net_device_ops tms380tr_netdev_ops;
17 int tms380tr_open(struct net_device *dev); 18 int tms380tr_open(struct net_device *dev);
18 int tms380tr_close(struct net_device *dev); 19 int tms380tr_close(struct net_device *dev);
19 irqreturn_t tms380tr_interrupt(int irq, void *dev_id); 20 irqreturn_t tms380tr_interrupt(int irq, void *dev_id);
20 int tmsdev_init(struct net_device *dev, struct device *pdev); 21 int tmsdev_init(struct net_device *dev, struct device *pdev);
21 void tmsdev_term(struct net_device *dev); 22 void tmsdev_term(struct net_device *dev);
22 void tms380tr_wait(unsigned long time); 23 void tms380tr_wait(unsigned long time);
23 24
24 #define TMS380TR_MAX_ADAPTERS 7 25 #define TMS380TR_MAX_ADAPTERS 7
25 26
26 #define SEND_TIMEOUT 10*HZ 27 #define SEND_TIMEOUT 10*HZ
27 28
28 #define TR_RCF_LONGEST_FRAME_MASK 0x0070 29 #define TR_RCF_LONGEST_FRAME_MASK 0x0070
29 #define TR_RCF_FRAME4K 0x0030 30 #define TR_RCF_FRAME4K 0x0030
30 31
31 /*------------------------------------------------------------------*/ 32 /*------------------------------------------------------------------*/
32 /* Bit order for adapter communication with DMA */ 33 /* Bit order for adapter communication with DMA */
33 /* -------------------------------------------------------------- */ 34 /* -------------------------------------------------------------- */
34 /* Bit 8 | 9| 10| 11|| 12| 13| 14| 15|| 0| 1| 2| 3|| 4| 5| 6| 7| */ 35 /* Bit 8 | 9| 10| 11|| 12| 13| 14| 15|| 0| 1| 2| 3|| 4| 5| 6| 7| */
35 /* -------------------------------------------------------------- */ 36 /* -------------------------------------------------------------- */
36 /* The bytes in a word must be byte swapped. Also, if a double */ 37 /* The bytes in a word must be byte swapped. Also, if a double */
37 /* word is used for storage, then the words, as well as the bytes, */ 38 /* word is used for storage, then the words, as well as the bytes, */
38 /* must be swapped. */ 39 /* must be swapped. */
39 /* Bit order for adapter communication with DIO */ 40 /* Bit order for adapter communication with DIO */
40 /* -------------------------------------------------------------- */ 41 /* -------------------------------------------------------------- */
41 /* Bit 0 | 1| 2| 3|| 4| 5| 6| 7|| 8| 9| 10| 11|| 12| 13| 14| 15| */ 42 /* Bit 0 | 1| 2| 3|| 4| 5| 6| 7|| 8| 9| 10| 11|| 12| 13| 14| 15| */
42 /* -------------------------------------------------------------- */ 43 /* -------------------------------------------------------------- */
43 /*------------------------------------------------------------------*/ 44 /*------------------------------------------------------------------*/
44 45
45 /* Swap words of a long. */ 46 /* Swap words of a long. */
46 #define SWAPW(x) (((x) << 16) | ((x) >> 16)) 47 #define SWAPW(x) (((x) << 16) | ((x) >> 16))
47 48
48 /* Get the low byte of a word. */ 49 /* Get the low byte of a word. */
49 #define LOBYTE(w) ((unsigned char)(w)) 50 #define LOBYTE(w) ((unsigned char)(w))
50 51
51 /* Get the high byte of a word. */ 52 /* Get the high byte of a word. */
52 #define HIBYTE(w) ((unsigned char)((unsigned short)(w) >> 8)) 53 #define HIBYTE(w) ((unsigned char)((unsigned short)(w) >> 8))
53 54
54 /* Get the low word of a long. */ 55 /* Get the low word of a long. */
55 #define LOWORD(l) ((unsigned short)(l)) 56 #define LOWORD(l) ((unsigned short)(l))
56 57
57 /* Get the high word of a long. */ 58 /* Get the high word of a long. */
58 #define HIWORD(l) ((unsigned short)((unsigned long)(l) >> 16)) 59 #define HIWORD(l) ((unsigned short)((unsigned long)(l) >> 16))
59 60
60 61
61 62
62 /* Token ring adapter I/O addresses for normal mode. */ 63 /* Token ring adapter I/O addresses for normal mode. */
63 64
64 /* 65 /*
65 * The SIF registers. Common to all adapters. 66 * The SIF registers. Common to all adapters.
66 */ 67 */
67 /* Basic SIF (SRSX = 0) */ 68 /* Basic SIF (SRSX = 0) */
68 #define SIFDAT 0x00 /* SIF/DMA data. */ 69 #define SIFDAT 0x00 /* SIF/DMA data. */
69 #define SIFINC 0x02 /* IO Word data with auto increment. */ 70 #define SIFINC 0x02 /* IO Word data with auto increment. */
70 #define SIFINH 0x03 /* IO Byte data with auto increment. */ 71 #define SIFINH 0x03 /* IO Byte data with auto increment. */
71 #define SIFADR 0x04 /* SIF/DMA Address. */ 72 #define SIFADR 0x04 /* SIF/DMA Address. */
72 #define SIFCMD 0x06 /* SIF Command. */ 73 #define SIFCMD 0x06 /* SIF Command. */
73 #define SIFSTS 0x06 /* SIF Status. */ 74 #define SIFSTS 0x06 /* SIF Status. */
74 75
75 /* "Extended" SIF (SRSX = 1) */ 76 /* "Extended" SIF (SRSX = 1) */
76 #define SIFACL 0x08 /* SIF Adapter Control Register. */ 77 #define SIFACL 0x08 /* SIF Adapter Control Register. */
77 #define SIFADD 0x0a /* SIF/DMA Address. -- 0x0a */ 78 #define SIFADD 0x0a /* SIF/DMA Address. -- 0x0a */
78 #define SIFADX 0x0c /* 0x0c */ 79 #define SIFADX 0x0c /* 0x0c */
79 #define DMALEN 0x0e /* SIF DMA length. -- 0x0e */ 80 #define DMALEN 0x0e /* SIF DMA length. -- 0x0e */
80 81
81 /* 82 /*
82 * POS Registers. Only for ISA Adapters. 83 * POS Registers. Only for ISA Adapters.
83 */ 84 */
84 #define POSREG 0x10 /* Adapter Program Option Select (POS) 85 #define POSREG 0x10 /* Adapter Program Option Select (POS)
85 * Register: base IO address + 16 byte. 86 * Register: base IO address + 16 byte.
86 */ 87 */
87 #define POSREG_2 24L /* only for TR4/16+ adapter 88 #define POSREG_2 24L /* only for TR4/16+ adapter
88 * base IO address + 24 byte. -- 0x18 89 * base IO address + 24 byte. -- 0x18
89 */ 90 */
90 91
91 /* SIFCMD command codes (high-low) */ 92 /* SIFCMD command codes (high-low) */
92 #define CMD_INTERRUPT_ADAPTER 0x8000 /* Cause internal adapter interrupt */ 93 #define CMD_INTERRUPT_ADAPTER 0x8000 /* Cause internal adapter interrupt */
93 #define CMD_ADAPTER_RESET 0x4000 /* Hardware reset of adapter */ 94 #define CMD_ADAPTER_RESET 0x4000 /* Hardware reset of adapter */
94 #define CMD_SSB_CLEAR 0x2000 /* Acknowledge to adapter to 95 #define CMD_SSB_CLEAR 0x2000 /* Acknowledge to adapter to
95 * system interrupts. 96 * system interrupts.
96 */ 97 */
97 #define CMD_EXECUTE 0x1000 /* Execute SCB command */ 98 #define CMD_EXECUTE 0x1000 /* Execute SCB command */
98 #define CMD_SCB_REQUEST 0x0800 /* Request adapter to interrupt 99 #define CMD_SCB_REQUEST 0x0800 /* Request adapter to interrupt
99 * system when SCB is available for 100 * system when SCB is available for
100 * another command. 101 * another command.
101 */ 102 */
102 #define CMD_RX_CONTINUE 0x0400 /* Continue receive after odd pointer 103 #define CMD_RX_CONTINUE 0x0400 /* Continue receive after odd pointer
103 * stop. (odd pointer receive method) 104 * stop. (odd pointer receive method)
104 */ 105 */
105 #define CMD_RX_VALID 0x0200 /* Now actual RPL is valid. */ 106 #define CMD_RX_VALID 0x0200 /* Now actual RPL is valid. */
106 #define CMD_TX_VALID 0x0100 /* Now actual TPL is valid. (valid 107 #define CMD_TX_VALID 0x0100 /* Now actual TPL is valid. (valid
107 * bit receive/transmit method) 108 * bit receive/transmit method)
108 */ 109 */
109 #define CMD_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system 110 #define CMD_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system
110 * interrupt is reset. 111 * interrupt is reset.
111 */ 112 */
112 #define CMD_CLEAR_SYSTEM_IRQ 0x0080 /* Clear SYSTEM_INTERRUPT bit. 113 #define CMD_CLEAR_SYSTEM_IRQ 0x0080 /* Clear SYSTEM_INTERRUPT bit.
113 * (write: 1=ignore, 0=reset) 114 * (write: 1=ignore, 0=reset)
114 */ 115 */
115 #define EXEC_SOFT_RESET 0xFF00 /* adapter soft reset. (restart 116 #define EXEC_SOFT_RESET 0xFF00 /* adapter soft reset. (restart
116 * adapter after hardware reset) 117 * adapter after hardware reset)
117 */ 118 */
118 119
119 120
120 /* ACL commands (high-low) */ 121 /* ACL commands (high-low) */
121 #define ACL_SWHLDA 0x0800 /* Software hold acknowledge. */ 122 #define ACL_SWHLDA 0x0800 /* Software hold acknowledge. */
122 #define ACL_SWDDIR 0x0400 /* Data transfer direction. */ 123 #define ACL_SWDDIR 0x0400 /* Data transfer direction. */
123 #define ACL_SWHRQ 0x0200 /* Pseudo DMA operation. */ 124 #define ACL_SWHRQ 0x0200 /* Pseudo DMA operation. */
124 #define ACL_PSDMAEN 0x0100 /* Enable pseudo system DMA. */ 125 #define ACL_PSDMAEN 0x0100 /* Enable pseudo system DMA. */
125 #define ACL_ARESET 0x0080 /* Adapter hardware reset command. 126 #define ACL_ARESET 0x0080 /* Adapter hardware reset command.
126 * (held in reset condition as 127 * (held in reset condition as
127 * long as bit is set) 128 * long as bit is set)
128 */ 129 */
129 #define ACL_CPHALT 0x0040 /* Communication processor halt. 130 #define ACL_CPHALT 0x0040 /* Communication processor halt.
130 * (can only be set while ACL_ARESET 131 * (can only be set while ACL_ARESET
131 * bit is set; prevents adapter 132 * bit is set; prevents adapter
132 * processor from executing code while 133 * processor from executing code while
133 * downloading firmware) 134 * downloading firmware)
134 */ 135 */
135 #define ACL_BOOT 0x0020 136 #define ACL_BOOT 0x0020
136 #define ACL_SINTEN 0x0008 /* System interrupt enable/disable 137 #define ACL_SINTEN 0x0008 /* System interrupt enable/disable
137 * (1/0): can be written if ACL_ARESET 138 * (1/0): can be written if ACL_ARESET
138 * is zero. 139 * is zero.
139 */ 140 */
140 #define ACL_PEN 0x0004 141 #define ACL_PEN 0x0004
141 142
142 #define ACL_NSELOUT0 0x0002 143 #define ACL_NSELOUT0 0x0002
143 #define ACL_NSELOUT1 0x0001 /* NSELOUTx have a card-specific 144 #define ACL_NSELOUT1 0x0001 /* NSELOUTx have a card-specific
144 * meaning for setting ring speed. 145 * meaning for setting ring speed.
145 */ 146 */
146 147
147 #define PS_DMA_MASK (ACL_SWHRQ | ACL_PSDMAEN) 148 #define PS_DMA_MASK (ACL_SWHRQ | ACL_PSDMAEN)
148 149
149 150
150 /* SIFSTS register return codes (high-low) */ 151 /* SIFSTS register return codes (high-low) */
151 #define STS_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system 152 #define STS_SYSTEM_IRQ 0x0080 /* Adapter-to-attached-system
152 * interrupt is valid. 153 * interrupt is valid.
153 */ 154 */
154 #define STS_INITIALIZE 0x0040 /* INITIALIZE status. (ready to 155 #define STS_INITIALIZE 0x0040 /* INITIALIZE status. (ready to
155 * initialize) 156 * initialize)
156 */ 157 */
157 #define STS_TEST 0x0020 /* TEST status. (BUD not completed) */ 158 #define STS_TEST 0x0020 /* TEST status. (BUD not completed) */
158 #define STS_ERROR 0x0010 /* ERROR status. (unrecoverable 159 #define STS_ERROR 0x0010 /* ERROR status. (unrecoverable
159 * HW error occurred) 160 * HW error occurred)
160 */ 161 */
161 #define STS_MASK 0x00F0 /* Mask interesting status bits. */ 162 #define STS_MASK 0x00F0 /* Mask interesting status bits. */
162 #define STS_ERROR_MASK 0x000F /* Get Error Code by masking the 163 #define STS_ERROR_MASK 0x000F /* Get Error Code by masking the
163 * interrupt code bits. 164 * interrupt code bits.
164 */ 165 */
165 #define ADAPTER_INT_PTRS 0x0A00 /* Address offset of adapter internal 166 #define ADAPTER_INT_PTRS 0x0A00 /* Address offset of adapter internal
166 * pointers 01:0a00 (high-low) have to 167 * pointers 01:0a00 (high-low) have to
167 * be read after init and before open. 168 * be read after init and before open.
168 */ 169 */
169 170
170 171
171 /* Interrupt Codes (only MAC IRQs) */ 172 /* Interrupt Codes (only MAC IRQs) */
172 #define STS_IRQ_ADAPTER_CHECK 0x0000 /* unrecoverable hardware or 173 #define STS_IRQ_ADAPTER_CHECK 0x0000 /* unrecoverable hardware or
173 * software error. 174 * software error.
174 */ 175 */
175 #define STS_IRQ_RING_STATUS 0x0004 /* SSB is updated with ring status. */ 176 #define STS_IRQ_RING_STATUS 0x0004 /* SSB is updated with ring status. */
176 #define STS_IRQ_LLC_STATUS 0x0005 /* Not used in MAC-only microcode */ 177 #define STS_IRQ_LLC_STATUS 0x0005 /* Not used in MAC-only microcode */
177 #define STS_IRQ_SCB_CLEAR 0x0006 /* SCB clear, following an 178 #define STS_IRQ_SCB_CLEAR 0x0006 /* SCB clear, following an
178 * SCB_REQUEST IRQ. 179 * SCB_REQUEST IRQ.
179 */ 180 */
180 #define STS_IRQ_TIMER 0x0007 /* Not normally used in MAC ucode */ 181 #define STS_IRQ_TIMER 0x0007 /* Not normally used in MAC ucode */
181 #define STS_IRQ_COMMAND_STATUS 0x0008 /* SSB is updated with command 182 #define STS_IRQ_COMMAND_STATUS 0x0008 /* SSB is updated with command
182 * status. 183 * status.
183 */ 184 */
184 #define STS_IRQ_RECEIVE_STATUS 0x000A /* SSB is updated with receive 185 #define STS_IRQ_RECEIVE_STATUS 0x000A /* SSB is updated with receive
185 * status. 186 * status.
186 */ 187 */
187 #define STS_IRQ_TRANSMIT_STATUS 0x000C /* SSB is updated with transmit 188 #define STS_IRQ_TRANSMIT_STATUS 0x000C /* SSB is updated with transmit
188 * status 189 * status
189 */ 190 */
190 #define STS_IRQ_RECEIVE_PENDING 0x000E /* Not used in MAC-only microcode */ 191 #define STS_IRQ_RECEIVE_PENDING 0x000E /* Not used in MAC-only microcode */
191 #define STS_IRQ_MASK 0x000F /* = STS_ERROR_MASK. */ 192 #define STS_IRQ_MASK 0x000F /* = STS_ERROR_MASK. */
192 193
193 194
194 /* TRANSMIT_STATUS completion code: (SSB.Parm[0]) */ 195 /* TRANSMIT_STATUS completion code: (SSB.Parm[0]) */
195 #define COMMAND_COMPLETE 0x0080 /* TRANSMIT command completed 196 #define COMMAND_COMPLETE 0x0080 /* TRANSMIT command completed
196 * (avoid this!) issue another transmit 197 * (avoid this!) issue another transmit
197 * to send additional frames. 198 * to send additional frames.
198 */ 199 */
199 #define FRAME_COMPLETE 0x0040 /* Frame has been transmitted; 200 #define FRAME_COMPLETE 0x0040 /* Frame has been transmitted;
200 * INTERRUPT_FRAME bit was set in the 201 * INTERRUPT_FRAME bit was set in the
201 * CSTAT request; indication of possibly 202 * CSTAT request; indication of possibly
202 * more than one frame transmissions! 203 * more than one frame transmissions!
203 * SSB.Parm[0-1]: 32 bit pointer to 204 * SSB.Parm[0-1]: 32 bit pointer to
204 * TPL of last frame. 205 * TPL of last frame.
205 */ 206 */
206 #define LIST_ERROR 0x0020 /* Error in one of the TPLs that 207 #define LIST_ERROR 0x0020 /* Error in one of the TPLs that
207 * compose the frame; TRANSMIT 208 * compose the frame; TRANSMIT
208 * terminated; Parm[1-2]: 32bit pointer 209 * terminated; Parm[1-2]: 32bit pointer
209 * to TPL which starts the error 210 * to TPL which starts the error
210 * frame; error details in bits 8-13. 211 * frame; error details in bits 8-13.
211 * (14?) 212 * (14?)
212 */ 213 */
213 #define FRAME_SIZE_ERROR 0x8000 /* FRAME_SIZE does not equal the sum of 214 #define FRAME_SIZE_ERROR 0x8000 /* FRAME_SIZE does not equal the sum of
214 * the valid DATA_COUNT fields; 215 * the valid DATA_COUNT fields;
215 * FRAME_SIZE less than header plus 216 * FRAME_SIZE less than header plus
216 * information field. (15 bytes + 217 * information field. (15 bytes +
217 * routing field) Or if FRAME_SIZE 218 * routing field) Or if FRAME_SIZE
218 * was specified as zero in one list. 219 * was specified as zero in one list.
219 */ 220 */
220 #define TX_THRESHOLD 0x4000 /* FRAME_SIZE greater than (BUFFER_SIZE 221 #define TX_THRESHOLD 0x4000 /* FRAME_SIZE greater than (BUFFER_SIZE
221 * - 9) * TX_BUF_MAX. 222 * - 9) * TX_BUF_MAX.
222 */ 223 */
223 #define ODD_ADDRESS 0x2000 /* Odd forward pointer value is 224 #define ODD_ADDRESS 0x2000 /* Odd forward pointer value is
224 * read on a list without END_FRAME 225 * read on a list without END_FRAME
225 * indication. 226 * indication.
226 */ 227 */
227 #define FRAME_ERROR 0x1000 /* START_FRAME bit (not) anticipated, 228 #define FRAME_ERROR 0x1000 /* START_FRAME bit (not) anticipated,
228 * but (not) set. 229 * but (not) set.
229 */ 230 */
230 #define ACCESS_PRIORITY_ERROR 0x0800 /* Access priority requested has not 231 #define ACCESS_PRIORITY_ERROR 0x0800 /* Access priority requested has not
231 * been allowed. 232 * been allowed.
232 */ 233 */
233 #define UNENABLED_MAC_FRAME 0x0400 /* MAC frame has source class of zero 234 #define UNENABLED_MAC_FRAME 0x0400 /* MAC frame has source class of zero
234 * or MAC frame PCF ATTN field is 235 * or MAC frame PCF ATTN field is
235 * greater than one. 236 * greater than one.
236 */ 237 */
237 #define ILLEGAL_FRAME_FORMAT 0x0200 /* Bit 0 or FC field was set to one. */ 238 #define ILLEGAL_FRAME_FORMAT 0x0200 /* Bit 0 or FC field was set to one. */
238 239
239 240
240 /* 241 /*
241 * Since we need to support some functions even if the adapter is in a 242 * Since we need to support some functions even if the adapter is in a
242 * CLOSED state, we have a (pseudo-) command queue which holds commands 243 * CLOSED state, we have a (pseudo-) command queue which holds commands
243 * that are outstandig to be executed. 244 * that are outstandig to be executed.
244 * 245 *
245 * Each time a command completes, an interrupt occurs and the next 246 * Each time a command completes, an interrupt occurs and the next
246 * command is executed. The command queue is actually a simple word with 247 * command is executed. The command queue is actually a simple word with
247 * a bit for each outstandig command. Therefore the commands will not be 248 * a bit for each outstandig command. Therefore the commands will not be
248 * executed in the order they have been queued. 249 * executed in the order they have been queued.
249 * 250 *
250 * The following defines the command code bits and the command queue: 251 * The following defines the command code bits and the command queue:
251 */ 252 */
252 #define OC_OPEN 0x0001 /* OPEN command */ 253 #define OC_OPEN 0x0001 /* OPEN command */
253 #define OC_TRANSMIT 0x0002 /* TRANSMIT command */ 254 #define OC_TRANSMIT 0x0002 /* TRANSMIT command */
254 #define OC_TRANSMIT_HALT 0x0004 /* TRANSMIT_HALT command */ 255 #define OC_TRANSMIT_HALT 0x0004 /* TRANSMIT_HALT command */
255 #define OC_RECEIVE 0x0008 /* RECEIVE command */ 256 #define OC_RECEIVE 0x0008 /* RECEIVE command */
256 #define OC_CLOSE 0x0010 /* CLOSE command */ 257 #define OC_CLOSE 0x0010 /* CLOSE command */
257 #define OC_SET_GROUP_ADDR 0x0020 /* SET_GROUP_ADDR command */ 258 #define OC_SET_GROUP_ADDR 0x0020 /* SET_GROUP_ADDR command */
258 #define OC_SET_FUNCT_ADDR 0x0040 /* SET_FUNCT_ADDR command */ 259 #define OC_SET_FUNCT_ADDR 0x0040 /* SET_FUNCT_ADDR command */
259 #define OC_READ_ERROR_LOG 0x0080 /* READ_ERROR_LOG command */ 260 #define OC_READ_ERROR_LOG 0x0080 /* READ_ERROR_LOG command */
260 #define OC_READ_ADAPTER 0x0100 /* READ_ADAPTER command */ 261 #define OC_READ_ADAPTER 0x0100 /* READ_ADAPTER command */
261 #define OC_MODIFY_OPEN_PARMS 0x0400 /* MODIFY_OPEN_PARMS command */ 262 #define OC_MODIFY_OPEN_PARMS 0x0400 /* MODIFY_OPEN_PARMS command */
262 #define OC_RESTORE_OPEN_PARMS 0x0800 /* RESTORE_OPEN_PARMS command */ 263 #define OC_RESTORE_OPEN_PARMS 0x0800 /* RESTORE_OPEN_PARMS command */
263 #define OC_SET_FIRST_16_GROUP 0x1000 /* SET_FIRST_16_GROUP command */ 264 #define OC_SET_FIRST_16_GROUP 0x1000 /* SET_FIRST_16_GROUP command */
264 #define OC_SET_BRIDGE_PARMS 0x2000 /* SET_BRIDGE_PARMS command */ 265 #define OC_SET_BRIDGE_PARMS 0x2000 /* SET_BRIDGE_PARMS command */
265 #define OC_CONFIG_BRIDGE_PARMS 0x4000 /* CONFIG_BRIDGE_PARMS command */ 266 #define OC_CONFIG_BRIDGE_PARMS 0x4000 /* CONFIG_BRIDGE_PARMS command */
266 267
267 #define OPEN 0x0300 /* C: open command. S: completion. */ 268 #define OPEN 0x0300 /* C: open command. S: completion. */
268 #define TRANSMIT 0x0400 /* C: transmit command. S: completion 269 #define TRANSMIT 0x0400 /* C: transmit command. S: completion
269 * status. (reject: COMMAND_REJECT if 270 * status. (reject: COMMAND_REJECT if
270 * adapter not opened, TRANSMIT already 271 * adapter not opened, TRANSMIT already
271 * issued or address passed in the SCB 272 * issued or address passed in the SCB
272 * not word aligned) 273 * not word aligned)
273 */ 274 */
274 #define TRANSMIT_HALT 0x0500 /* C: interrupt TX TPL chain; if no 275 #define TRANSMIT_HALT 0x0500 /* C: interrupt TX TPL chain; if no
275 * TRANSMIT command issued, the command 276 * TRANSMIT command issued, the command
276 * is ignored (completion with TRANSMIT 277 * is ignored (completion with TRANSMIT
277 * status (0x0400)!) 278 * status (0x0400)!)
278 */ 279 */
279 #define RECEIVE 0x0600 /* C: receive command. S: completion 280 #define RECEIVE 0x0600 /* C: receive command. S: completion
280 * status. (reject: COMMAND_REJECT if 281 * status. (reject: COMMAND_REJECT if
281 * adapter not opened, RECEIVE already 282 * adapter not opened, RECEIVE already
282 * issued or address passed in the SCB 283 * issued or address passed in the SCB
283 * not word aligned) 284 * not word aligned)
284 */ 285 */
285 #define CLOSE 0x0700 /* C: close adapter. S: completion. 286 #define CLOSE 0x0700 /* C: close adapter. S: completion.
286 * (COMMAND_REJECT if adapter not open) 287 * (COMMAND_REJECT if adapter not open)
287 */ 288 */
288 #define SET_GROUP_ADDR 0x0800 /* C: alter adapter group address after 289 #define SET_GROUP_ADDR 0x0800 /* C: alter adapter group address after
289 * OPEN. S: completion. (COMMAND_REJECT 290 * OPEN. S: completion. (COMMAND_REJECT
290 * if adapter not open) 291 * if adapter not open)
291 */ 292 */
292 #define SET_FUNCT_ADDR 0x0900 /* C: alter adapter functional address 293 #define SET_FUNCT_ADDR 0x0900 /* C: alter adapter functional address
293 * after OPEN. S: completion. 294 * after OPEN. S: completion.
294 * (COMMAND_REJECT if adapter not open) 295 * (COMMAND_REJECT if adapter not open)
295 */ 296 */
296 #define READ_ERROR_LOG 0x0A00 /* C: read adapter error counters. 297 #define READ_ERROR_LOG 0x0A00 /* C: read adapter error counters.
297 * S: completion. (command ignored 298 * S: completion. (command ignored
298 * if adapter not open!) 299 * if adapter not open!)
299 */ 300 */
300 #define READ_ADAPTER 0x0B00 /* C: read data from adapter memory. 301 #define READ_ADAPTER 0x0B00 /* C: read data from adapter memory.
301 * (important: after init and before 302 * (important: after init and before
302 * open!) S: completion. (ADAPTER_CHECK 303 * open!) S: completion. (ADAPTER_CHECK
303 * interrupt if undefined storage area 304 * interrupt if undefined storage area
304 * read) 305 * read)
305 */ 306 */
306 #define MODIFY_OPEN_PARMS 0x0D00 /* C: modify some adapter operational 307 #define MODIFY_OPEN_PARMS 0x0D00 /* C: modify some adapter operational
307 * parameters. (bit correspondend to 308 * parameters. (bit correspondend to
308 * WRAP_INTERFACE is ignored) 309 * WRAP_INTERFACE is ignored)
309 * S: completion. (reject: 310 * S: completion. (reject:
310 * COMMAND_REJECT) 311 * COMMAND_REJECT)
311 */ 312 */
312 #define RESTORE_OPEN_PARMS 0x0E00 /* C: modify some adapter operational 313 #define RESTORE_OPEN_PARMS 0x0E00 /* C: modify some adapter operational
313 * parameters. (bit correspondend 314 * parameters. (bit correspondend
314 * to WRAP_INTERFACE is ignored) 315 * to WRAP_INTERFACE is ignored)
315 * S: completion. (reject: 316 * S: completion. (reject:
316 * COMMAND_REJECT) 317 * COMMAND_REJECT)
317 */ 318 */
318 #define SET_FIRST_16_GROUP 0x0F00 /* C: alter the first two bytes in 319 #define SET_FIRST_16_GROUP 0x0F00 /* C: alter the first two bytes in
319 * adapter group address. 320 * adapter group address.
320 * S: completion. (reject: 321 * S: completion. (reject:
321 * COMMAND_REJECT) 322 * COMMAND_REJECT)
322 */ 323 */
323 #define SET_BRIDGE_PARMS 0x1000 /* C: values and conditions for the 324 #define SET_BRIDGE_PARMS 0x1000 /* C: values and conditions for the
324 * adapter hardware to use when frames 325 * adapter hardware to use when frames
325 * are copied for forwarding. 326 * are copied for forwarding.
326 * S: completion. (reject: 327 * S: completion. (reject:
327 * COMMAND_REJECT) 328 * COMMAND_REJECT)
328 */ 329 */
329 #define CONFIG_BRIDGE_PARMS 0x1100 /* C: .. 330 #define CONFIG_BRIDGE_PARMS 0x1100 /* C: ..
330 * S: completion. (reject: 331 * S: completion. (reject:
331 * COMMAND_REJECT) 332 * COMMAND_REJECT)
332 */ 333 */
333 334
334 #define SPEED_4 4 335 #define SPEED_4 4
335 #define SPEED_16 16 /* Default transmission speed */ 336 #define SPEED_16 16 /* Default transmission speed */
336 337
337 338
338 /* Initialization Parameter Block (IPB); word alignment necessary! */ 339 /* Initialization Parameter Block (IPB); word alignment necessary! */
339 #define BURST_SIZE 0x0018 /* Default burst size */ 340 #define BURST_SIZE 0x0018 /* Default burst size */
340 #define BURST_MODE 0x9F00 /* Burst mode enable */ 341 #define BURST_MODE 0x9F00 /* Burst mode enable */
341 #define DMA_RETRIES 0x0505 /* Magic DMA retry number... */ 342 #define DMA_RETRIES 0x0505 /* Magic DMA retry number... */
342 343
343 #define CYCLE_TIME 3 /* Default AT-bus cycle time: 500 ns 344 #define CYCLE_TIME 3 /* Default AT-bus cycle time: 500 ns
344 * (later adapter version: fix cycle time!) 345 * (later adapter version: fix cycle time!)
345 */ 346 */
346 #define LINE_SPEED_BIT 0x80 347 #define LINE_SPEED_BIT 0x80
347 348
348 /* Macro definition for the wait function. */ 349 /* Macro definition for the wait function. */
349 #define ONE_SECOND_TICKS 1000000 350 #define ONE_SECOND_TICKS 1000000
350 #define HALF_SECOND (ONE_SECOND_TICKS / 2) 351 #define HALF_SECOND (ONE_SECOND_TICKS / 2)
351 #define ONE_SECOND (ONE_SECOND_TICKS) 352 #define ONE_SECOND (ONE_SECOND_TICKS)
352 #define TWO_SECONDS (ONE_SECOND_TICKS * 2) 353 #define TWO_SECONDS (ONE_SECOND_TICKS * 2)
353 #define THREE_SECONDS (ONE_SECOND_TICKS * 3) 354 #define THREE_SECONDS (ONE_SECOND_TICKS * 3)
354 #define FOUR_SECONDS (ONE_SECOND_TICKS * 4) 355 #define FOUR_SECONDS (ONE_SECOND_TICKS * 4)
355 #define FIVE_SECONDS (ONE_SECOND_TICKS * 5) 356 #define FIVE_SECONDS (ONE_SECOND_TICKS * 5)
356 357
357 #define BUFFER_SIZE 2048 /* Buffers on Adapter */ 358 #define BUFFER_SIZE 2048 /* Buffers on Adapter */
358 359
359 #pragma pack(1) 360 #pragma pack(1)
360 typedef struct { 361 typedef struct {
361 unsigned short Init_Options; /* Initialize with burst mode; 362 unsigned short Init_Options; /* Initialize with burst mode;
362 * LLC disabled. (MAC only) 363 * LLC disabled. (MAC only)
363 */ 364 */
364 365
365 /* Interrupt vectors the adapter places on attached system bus. */ 366 /* Interrupt vectors the adapter places on attached system bus. */
366 u_int8_t CMD_Status_IV; /* Interrupt vector: command status. */ 367 u_int8_t CMD_Status_IV; /* Interrupt vector: command status. */
367 u_int8_t TX_IV; /* Interrupt vector: transmit. */ 368 u_int8_t TX_IV; /* Interrupt vector: transmit. */
368 u_int8_t RX_IV; /* Interrupt vector: receive. */ 369 u_int8_t RX_IV; /* Interrupt vector: receive. */
369 u_int8_t Ring_Status_IV; /* Interrupt vector: ring status. */ 370 u_int8_t Ring_Status_IV; /* Interrupt vector: ring status. */
370 u_int8_t SCB_Clear_IV; /* Interrupt vector: SCB clear. */ 371 u_int8_t SCB_Clear_IV; /* Interrupt vector: SCB clear. */
371 u_int8_t Adapter_CHK_IV; /* Interrupt vector: adapter check. */ 372 u_int8_t Adapter_CHK_IV; /* Interrupt vector: adapter check. */
372 373
373 u_int16_t RX_Burst_Size; /* Max. number of transfer cycles. */ 374 u_int16_t RX_Burst_Size; /* Max. number of transfer cycles. */
374 u_int16_t TX_Burst_Size; /* During DMA burst; even value! */ 375 u_int16_t TX_Burst_Size; /* During DMA burst; even value! */
375 u_int16_t DMA_Abort_Thrhld; /* Number of DMA retries. */ 376 u_int16_t DMA_Abort_Thrhld; /* Number of DMA retries. */
376 377
377 u_int32_t SCB_Addr; /* SCB address: even, word aligned, high-low */ 378 u_int32_t SCB_Addr; /* SCB address: even, word aligned, high-low */
378 u_int32_t SSB_Addr; /* SSB address: even, word aligned, high-low */ 379 u_int32_t SSB_Addr; /* SSB address: even, word aligned, high-low */
379 } IPB, *IPB_Ptr; 380 } IPB, *IPB_Ptr;
380 #pragma pack() 381 #pragma pack()
381 382
382 /* 383 /*
383 * OPEN Command Parameter List (OCPL) (can be reused, if the adapter has to 384 * OPEN Command Parameter List (OCPL) (can be reused, if the adapter has to
384 * be reopened) 385 * be reopened)
385 */ 386 */
386 #define BUFFER_SIZE 2048 /* Buffers on Adapter. */ 387 #define BUFFER_SIZE 2048 /* Buffers on Adapter. */
387 #define TPL_SIZE 8+6*TX_FRAG_NUM /* Depending on fragments per TPL. */ 388 #define TPL_SIZE 8+6*TX_FRAG_NUM /* Depending on fragments per TPL. */
388 #define RPL_SIZE 14 /* (with TI firmware v2.26 handling 389 #define RPL_SIZE 14 /* (with TI firmware v2.26 handling
389 * up to nine fragments possible) 390 * up to nine fragments possible)
390 */ 391 */
391 #define TX_BUF_MIN 20 /* ??? (Stephan: calculation with */ 392 #define TX_BUF_MIN 20 /* ??? (Stephan: calculation with */
392 #define TX_BUF_MAX 40 /* BUFFER_SIZE and MAX_FRAME_SIZE) ??? 393 #define TX_BUF_MAX 40 /* BUFFER_SIZE and MAX_FRAME_SIZE) ???
393 */ 394 */
394 #define DISABLE_EARLY_TOKEN_RELEASE 0x1000 395 #define DISABLE_EARLY_TOKEN_RELEASE 0x1000
395 396
396 /* OPEN Options (high-low) */ 397 /* OPEN Options (high-low) */
397 #define WRAP_INTERFACE 0x0080 /* Inserting omitted for test 398 #define WRAP_INTERFACE 0x0080 /* Inserting omitted for test
398 * purposes; transmit data appears 399 * purposes; transmit data appears
399 * as receive data. (useful for 400 * as receive data. (useful for
400 * testing; change: CLOSE necessary) 401 * testing; change: CLOSE necessary)
401 */ 402 */
402 #define DISABLE_HARD_ERROR 0x0040 /* On HARD_ERROR & TRANSMIT_BEACON 403 #define DISABLE_HARD_ERROR 0x0040 /* On HARD_ERROR & TRANSMIT_BEACON
403 * no RING.STATUS interrupt. 404 * no RING.STATUS interrupt.
404 */ 405 */
405 #define DISABLE_SOFT_ERROR 0x0020 /* On SOFT_ERROR, no RING.STATUS 406 #define DISABLE_SOFT_ERROR 0x0020 /* On SOFT_ERROR, no RING.STATUS
406 * interrupt. 407 * interrupt.
407 */ 408 */
408 #define PASS_ADAPTER_MAC_FRAMES 0x0010 /* Passing unsupported MAC frames 409 #define PASS_ADAPTER_MAC_FRAMES 0x0010 /* Passing unsupported MAC frames
409 * to system. 410 * to system.
410 */ 411 */
411 #define PASS_ATTENTION_FRAMES 0x0008 /* All changed attention MAC frames are 412 #define PASS_ATTENTION_FRAMES 0x0008 /* All changed attention MAC frames are
412 * passed to the system. 413 * passed to the system.
413 */ 414 */
414 #define PAD_ROUTING_FIELD 0x0004 /* Routing field is padded to 18 415 #define PAD_ROUTING_FIELD 0x0004 /* Routing field is padded to 18
415 * bytes. 416 * bytes.
416 */ 417 */
417 #define FRAME_HOLD 0x0002 /*Adapter waits for entire frame before 418 #define FRAME_HOLD 0x0002 /*Adapter waits for entire frame before
418 * initiating DMA transfer; otherwise: 419 * initiating DMA transfer; otherwise:
419 * DMA transfer initiation if internal 420 * DMA transfer initiation if internal
420 * buffer filled. 421 * buffer filled.
421 */ 422 */
422 #define CONTENDER 0x0001 /* Adapter participates in the monitor 423 #define CONTENDER 0x0001 /* Adapter participates in the monitor
423 * contention process. 424 * contention process.
424 */ 425 */
425 #define PASS_BEACON_MAC_FRAMES 0x8000 /* Adapter passes beacon MAC frames 426 #define PASS_BEACON_MAC_FRAMES 0x8000 /* Adapter passes beacon MAC frames
426 * to the system. 427 * to the system.
427 */ 428 */
428 #define EARLY_TOKEN_RELEASE 0x1000 /* Only valid in 16 Mbps operation; 429 #define EARLY_TOKEN_RELEASE 0x1000 /* Only valid in 16 Mbps operation;
429 * 0 = ETR. (no effect in 4 Mbps 430 * 0 = ETR. (no effect in 4 Mbps
430 * operation) 431 * operation)
431 */ 432 */
432 #define COPY_ALL_MAC_FRAMES 0x0400 /* All MAC frames are copied to 433 #define COPY_ALL_MAC_FRAMES 0x0400 /* All MAC frames are copied to
433 * the system. (after OPEN: duplicate 434 * the system. (after OPEN: duplicate
434 * address test (DAT) MAC frame is 435 * address test (DAT) MAC frame is
435 * first received frame copied to the 436 * first received frame copied to the
436 * system) 437 * system)
437 */ 438 */
438 #define COPY_ALL_NON_MAC_FRAMES 0x0200 /* All non MAC frames are copied to 439 #define COPY_ALL_NON_MAC_FRAMES 0x0200 /* All non MAC frames are copied to
439 * the system. 440 * the system.
440 */ 441 */
441 #define PASS_FIRST_BUF_ONLY 0x0100 /* Passes only first internal buffer 442 #define PASS_FIRST_BUF_ONLY 0x0100 /* Passes only first internal buffer
442 * of each received frame; FrameSize 443 * of each received frame; FrameSize
443 * of RPLs must contain internal 444 * of RPLs must contain internal
444 * BUFFER_SIZE bits for promiscous mode. 445 * BUFFER_SIZE bits for promiscous mode.
445 */ 446 */
446 #define ENABLE_FULL_DUPLEX_SELECTION 0x2000 447 #define ENABLE_FULL_DUPLEX_SELECTION 0x2000
447 /* Enable the use of full-duplex 448 /* Enable the use of full-duplex
448 * settings with bits in byte 22 in 449 * settings with bits in byte 22 in
449 * ocpl. (new feature in firmware 450 * ocpl. (new feature in firmware
450 * version 3.09) 451 * version 3.09)
451 */ 452 */
452 453
453 /* Full-duplex settings */ 454 /* Full-duplex settings */
454 #define OPEN_FULL_DUPLEX_OFF 0x0000 455 #define OPEN_FULL_DUPLEX_OFF 0x0000
455 #define OPEN_FULL_DUPLEX_ON 0x00c0 456 #define OPEN_FULL_DUPLEX_ON 0x00c0
456 #define OPEN_FULL_DUPLEX_AUTO 0x0080 457 #define OPEN_FULL_DUPLEX_AUTO 0x0080
457 458
458 #define PROD_ID_SIZE 18 /* Length of product ID. */ 459 #define PROD_ID_SIZE 18 /* Length of product ID. */
459 460
460 #define TX_FRAG_NUM 3 /* Number of fragments used in one TPL. */ 461 #define TX_FRAG_NUM 3 /* Number of fragments used in one TPL. */
461 #define TX_MORE_FRAGMENTS 0x8000 /* Bit set in DataCount to indicate more 462 #define TX_MORE_FRAGMENTS 0x8000 /* Bit set in DataCount to indicate more
462 * fragments following. 463 * fragments following.
463 */ 464 */
464 465
465 /* XXX is there some better way to do this? */ 466 /* XXX is there some better way to do this? */
466 #define ISA_MAX_ADDRESS 0x00ffffff 467 #define ISA_MAX_ADDRESS 0x00ffffff
467 #define PCI_MAX_ADDRESS 0xffffffff 468 #define PCI_MAX_ADDRESS 0xffffffff
468 469
469 #pragma pack(1) 470 #pragma pack(1)
470 typedef struct { 471 typedef struct {
471 u_int16_t OPENOptions; 472 u_int16_t OPENOptions;
472 u_int8_t NodeAddr[6]; /* Adapter node address; use ROM 473 u_int8_t NodeAddr[6]; /* Adapter node address; use ROM
473 * address 474 * address
474 */ 475 */
475 u_int32_t GroupAddr; /* Multicast: high order 476 u_int32_t GroupAddr; /* Multicast: high order
476 * bytes = 0xC000 477 * bytes = 0xC000
477 */ 478 */
478 u_int32_t FunctAddr; /* High order bytes = 0xC000 */ 479 u_int32_t FunctAddr; /* High order bytes = 0xC000 */
479 __be16 RxListSize; /* RPL size: 0 (=26), 14, 20 or 480 __be16 RxListSize; /* RPL size: 0 (=26), 14, 20 or
480 * 26 bytes read by the adapter. 481 * 26 bytes read by the adapter.
481 * (Depending on the number of 482 * (Depending on the number of
482 * fragments/list) 483 * fragments/list)
483 */ 484 */
484 __be16 TxListSize; /* TPL size */ 485 __be16 TxListSize; /* TPL size */
485 __be16 BufSize; /* Is automatically rounded up to the 486 __be16 BufSize; /* Is automatically rounded up to the
486 * nearest nK boundary. 487 * nearest nK boundary.
487 */ 488 */
488 u_int16_t FullDuplex; 489 u_int16_t FullDuplex;
489 u_int16_t Reserved; 490 u_int16_t Reserved;
490 u_int8_t TXBufMin; /* Number of adapter buffers reserved 491 u_int8_t TXBufMin; /* Number of adapter buffers reserved
491 * for transmission a minimum of 2 492 * for transmission a minimum of 2
492 * buffers must be allocated. 493 * buffers must be allocated.
493 */ 494 */
494 u_int8_t TXBufMax; /* Maximum number of adapter buffers 495 u_int8_t TXBufMax; /* Maximum number of adapter buffers
495 * for transmit; a minimum of 2 buffers 496 * for transmit; a minimum of 2 buffers
496 * must be available for receive. 497 * must be available for receive.
497 * Default: 6 498 * Default: 6
498 */ 499 */
499 u_int16_t ProdIDAddr[2];/* Pointer to product ID. */ 500 u_int16_t ProdIDAddr[2];/* Pointer to product ID. */
500 } OPB, *OPB_Ptr; 501 } OPB, *OPB_Ptr;
501 #pragma pack() 502 #pragma pack()
502 503
503 /* 504 /*
504 * SCB: adapter commands enabled by the host system started by writing 505 * SCB: adapter commands enabled by the host system started by writing
505 * CMD_INTERRUPT_ADAPTER | CMD_EXECUTE (|SCB_REQUEST) to the SIFCMD IO 506 * CMD_INTERRUPT_ADAPTER | CMD_EXECUTE (|SCB_REQUEST) to the SIFCMD IO
506 * register. (special case: | CMD_SYSTEM_IRQ for initialization) 507 * register. (special case: | CMD_SYSTEM_IRQ for initialization)
507 */ 508 */
508 #pragma pack(1) 509 #pragma pack(1)
509 typedef struct { 510 typedef struct {
510 u_int16_t CMD; /* Command code */ 511 u_int16_t CMD; /* Command code */
511 u_int16_t Parm[2]; /* Pointer to Command Parameter Block */ 512 u_int16_t Parm[2]; /* Pointer to Command Parameter Block */
512 } SCB; /* System Command Block (32 bit physical address; big endian)*/ 513 } SCB; /* System Command Block (32 bit physical address; big endian)*/
513 #pragma pack() 514 #pragma pack()
514 515
515 /* 516 /*
516 * SSB: adapter command return status can be evaluated after COMMAND_STATUS 517 * SSB: adapter command return status can be evaluated after COMMAND_STATUS
517 * adapter to system interrupt after reading SSB, the availability of the SSB 518 * adapter to system interrupt after reading SSB, the availability of the SSB
518 * has to be told the adapter by writing CMD_INTERRUPT_ADAPTER | CMD_SSB_CLEAR 519 * has to be told the adapter by writing CMD_INTERRUPT_ADAPTER | CMD_SSB_CLEAR
519 * in the SIFCMD IO register. 520 * in the SIFCMD IO register.
520 */ 521 */
521 #pragma pack(1) 522 #pragma pack(1)
522 typedef struct { 523 typedef struct {
523 u_int16_t STS; /* Status code */ 524 u_int16_t STS; /* Status code */
524 u_int16_t Parm[3]; /* Parameter or pointer to Status Parameter 525 u_int16_t Parm[3]; /* Parameter or pointer to Status Parameter
525 * Block. 526 * Block.
526 */ 527 */
527 } SSB; /* System Status Block (big endian - physical address) */ 528 } SSB; /* System Status Block (big endian - physical address) */
528 #pragma pack() 529 #pragma pack()
529 530
530 typedef struct { 531 typedef struct {
531 unsigned short BurnedInAddrPtr; /* Pointer to adapter burned in 532 unsigned short BurnedInAddrPtr; /* Pointer to adapter burned in
532 * address. (BIA) 533 * address. (BIA)
533 */ 534 */
534 unsigned short SoftwareLevelPtr;/* Pointer to software level data. */ 535 unsigned short SoftwareLevelPtr;/* Pointer to software level data. */
535 unsigned short AdapterAddrPtr; /* Pointer to adapter addresses. */ 536 unsigned short AdapterAddrPtr; /* Pointer to adapter addresses. */
536 unsigned short AdapterParmsPtr; /* Pointer to adapter parameters. */ 537 unsigned short AdapterParmsPtr; /* Pointer to adapter parameters. */
537 unsigned short MACBufferPtr; /* Pointer to MAC buffer. (internal) */ 538 unsigned short MACBufferPtr; /* Pointer to MAC buffer. (internal) */
538 unsigned short LLCCountersPtr; /* Pointer to LLC counters. */ 539 unsigned short LLCCountersPtr; /* Pointer to LLC counters. */
539 unsigned short SpeedFlagPtr; /* Pointer to data rate flag. 540 unsigned short SpeedFlagPtr; /* Pointer to data rate flag.
540 * (4/16 Mbps) 541 * (4/16 Mbps)
541 */ 542 */
542 unsigned short AdapterRAMPtr; /* Pointer to adapter RAM found. (KB) */ 543 unsigned short AdapterRAMPtr; /* Pointer to adapter RAM found. (KB) */
543 } INTPTRS; /* Adapter internal pointers */ 544 } INTPTRS; /* Adapter internal pointers */
544 545
545 #pragma pack(1) 546 #pragma pack(1)
546 typedef struct { 547 typedef struct {
547 u_int8_t Line_Error; /* Line error: code violation in 548 u_int8_t Line_Error; /* Line error: code violation in
548 * frame or in a token, or FCS error. 549 * frame or in a token, or FCS error.
549 */ 550 */
550 u_int8_t Internal_Error; /* IBM specific. (Reserved_1) */ 551 u_int8_t Internal_Error; /* IBM specific. (Reserved_1) */
551 u_int8_t Burst_Error; 552 u_int8_t Burst_Error;
552 u_int8_t ARI_FCI_Error; /* ARI/FCI bit zero in AMP or 553 u_int8_t ARI_FCI_Error; /* ARI/FCI bit zero in AMP or
553 * SMP MAC frame. 554 * SMP MAC frame.
554 */ 555 */
555 u_int8_t AbortDelimeters; /* IBM specific. (Reserved_2) */ 556 u_int8_t AbortDelimeters; /* IBM specific. (Reserved_2) */
556 u_int8_t Reserved_3; 557 u_int8_t Reserved_3;
557 u_int8_t Lost_Frame_Error; /* Receive of end of transmitted 558 u_int8_t Lost_Frame_Error; /* Receive of end of transmitted
558 * frame failed. 559 * frame failed.
559 */ 560 */
560 u_int8_t Rx_Congest_Error; /* Adapter in repeat mode has not 561 u_int8_t Rx_Congest_Error; /* Adapter in repeat mode has not
561 * enough buffer space to copy incoming 562 * enough buffer space to copy incoming
562 * frame. 563 * frame.
563 */ 564 */
564 u_int8_t Frame_Copied_Error; /* ARI bit not zero in frame 565 u_int8_t Frame_Copied_Error; /* ARI bit not zero in frame
565 * addressed to adapter. 566 * addressed to adapter.
566 */ 567 */
567 u_int8_t Frequency_Error; /* IBM specific. (Reserved_4) */ 568 u_int8_t Frequency_Error; /* IBM specific. (Reserved_4) */
568 u_int8_t Token_Error; /* (active only in monitor station) */ 569 u_int8_t Token_Error; /* (active only in monitor station) */
569 u_int8_t Reserved_5; 570 u_int8_t Reserved_5;
570 u_int8_t DMA_Bus_Error; /* DMA bus errors not exceeding the 571 u_int8_t DMA_Bus_Error; /* DMA bus errors not exceeding the
571 * abort thresholds. 572 * abort thresholds.
572 */ 573 */
573 u_int8_t DMA_Parity_Error; /* DMA parity errors not exceeding 574 u_int8_t DMA_Parity_Error; /* DMA parity errors not exceeding
574 * the abort thresholds. 575 * the abort thresholds.
575 */ 576 */
576 } ERRORTAB; /* Adapter error counters */ 577 } ERRORTAB; /* Adapter error counters */
577 #pragma pack() 578 #pragma pack()
578 579
579 580
580 /*--------------------- Send and Receive definitions -------------------*/ 581 /*--------------------- Send and Receive definitions -------------------*/
581 #pragma pack(1) 582 #pragma pack(1)
582 typedef struct { 583 typedef struct {
583 __be16 DataCount; /* Value 0, even and odd values are 584 __be16 DataCount; /* Value 0, even and odd values are
584 * permitted; value is unaltered most 585 * permitted; value is unaltered most
585 * significant bit set: following 586 * significant bit set: following
586 * fragments last fragment: most 587 * fragments last fragment: most
587 * significant bit is not evaluated. 588 * significant bit is not evaluated.
588 * (???) 589 * (???)
589 */ 590 */
590 __be32 DataAddr; /* Pointer to frame data fragment; 591 __be32 DataAddr; /* Pointer to frame data fragment;
591 * even or odd. 592 * even or odd.
592 */ 593 */
593 } Fragment; 594 } Fragment;
594 #pragma pack() 595 #pragma pack()
595 596
596 #define MAX_FRAG_NUMBERS 9 /* Maximal number of fragments possible to use 597 #define MAX_FRAG_NUMBERS 9 /* Maximal number of fragments possible to use
597 * in one RPL/TPL. (depending on TI firmware 598 * in one RPL/TPL. (depending on TI firmware
598 * version) 599 * version)
599 */ 600 */
600 601
601 /* 602 /*
602 * AC (1), FC (1), Dst (6), Src (6), RIF (18), Data (4472) = 4504 603 * AC (1), FC (1), Dst (6), Src (6), RIF (18), Data (4472) = 4504
603 * The packet size can be one of the follows: 548, 1502, 2084, 4504, 8176, 604 * The packet size can be one of the follows: 548, 1502, 2084, 4504, 8176,
604 * 11439, 17832. Refer to TMS380 Second Generation Token Ring User's Guide 605 * 11439, 17832. Refer to TMS380 Second Generation Token Ring User's Guide
605 * Page 2-27. 606 * Page 2-27.
606 */ 607 */
607 #define HEADER_SIZE (1 + 1 + 6 + 6) 608 #define HEADER_SIZE (1 + 1 + 6 + 6)
608 #define SRC_SIZE 18 609 #define SRC_SIZE 18
609 #define MIN_DATA_SIZE 516 610 #define MIN_DATA_SIZE 516
610 #define DEFAULT_DATA_SIZE 4472 611 #define DEFAULT_DATA_SIZE 4472
611 #define MAX_DATA_SIZE 17800 612 #define MAX_DATA_SIZE 17800
612 613
613 #define DEFAULT_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + DEFAULT_DATA_SIZE) 614 #define DEFAULT_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + DEFAULT_DATA_SIZE)
614 #define MIN_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MIN_DATA_SIZE) 615 #define MIN_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MIN_DATA_SIZE)
615 #define MAX_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MAX_DATA_SIZE) 616 #define MAX_PACKET_SIZE (HEADER_SIZE + SRC_SIZE + MAX_DATA_SIZE)
616 617
617 /* 618 /*
618 * Macros to deal with the frame status field. 619 * Macros to deal with the frame status field.
619 */ 620 */
620 #define AC_NOT_RECOGNIZED 0x00 621 #define AC_NOT_RECOGNIZED 0x00
621 #define GROUP_BIT 0x80 622 #define GROUP_BIT 0x80
622 #define GET_TRANSMIT_STATUS_HIGH_BYTE(Ts) ((unsigned char)((Ts) >> 8)) 623 #define GET_TRANSMIT_STATUS_HIGH_BYTE(Ts) ((unsigned char)((Ts) >> 8))
623 #define GET_FRAME_STATUS_HIGH_AC(Fs) ((unsigned char)(((Fs) & 0xC0) >> 6)) 624 #define GET_FRAME_STATUS_HIGH_AC(Fs) ((unsigned char)(((Fs) & 0xC0) >> 6))
624 #define GET_FRAME_STATUS_LOW_AC(Fs) ((unsigned char)(((Fs) & 0x0C) >> 2)) 625 #define GET_FRAME_STATUS_LOW_AC(Fs) ((unsigned char)(((Fs) & 0x0C) >> 2))
625 #define DIRECTED_FRAME(Context) (!((Context)->MData[2] & GROUP_BIT)) 626 #define DIRECTED_FRAME(Context) (!((Context)->MData[2] & GROUP_BIT))
626 627
627 628
628 /*--------------------- Send Functions ---------------------------------*/ 629 /*--------------------- Send Functions ---------------------------------*/
629 /* define TX_CSTAT _REQUEST (R) and _COMPLETE (C) values (high-low) */ 630 /* define TX_CSTAT _REQUEST (R) and _COMPLETE (C) values (high-low) */
630 631
631 #define TX_VALID 0x0080 /* R: set via TRANSMIT.VALID interrupt. 632 #define TX_VALID 0x0080 /* R: set via TRANSMIT.VALID interrupt.
632 * C: always reset to zero! 633 * C: always reset to zero!
633 */ 634 */
634 #define TX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero. 635 #define TX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero.
635 * C: set to one. 636 * C: set to one.
636 */ 637 */
637 #define TX_START_FRAME 0x0020 /* R: start of a frame: 1 638 #define TX_START_FRAME 0x0020 /* R: start of a frame: 1
638 * C: unchanged. 639 * C: unchanged.
639 */ 640 */
640 #define TX_END_FRAME 0x0010 /* R: end of a frame: 1 641 #define TX_END_FRAME 0x0010 /* R: end of a frame: 1
641 * C: unchanged. 642 * C: unchanged.
642 */ 643 */
643 #define TX_FRAME_IRQ 0x0008 /* R: request interrupt generation 644 #define TX_FRAME_IRQ 0x0008 /* R: request interrupt generation
644 * after transmission. 645 * after transmission.
645 * C: unchanged. 646 * C: unchanged.
646 */ 647 */
647 #define TX_ERROR 0x0004 /* R: reserved. 648 #define TX_ERROR 0x0004 /* R: reserved.
648 * C: set to one if Error occurred. 649 * C: set to one if Error occurred.
649 */ 650 */
650 #define TX_INTERFRAME_WAIT 0x0004 651 #define TX_INTERFRAME_WAIT 0x0004
651 #define TX_PASS_CRC 0x0002 /* R: set if CRC value is already 652 #define TX_PASS_CRC 0x0002 /* R: set if CRC value is already
652 * calculated. (valid only in 653 * calculated. (valid only in
653 * FRAME_START TPL) 654 * FRAME_START TPL)
654 * C: unchanged. 655 * C: unchanged.
655 */ 656 */
656 #define TX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame 657 #define TX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame
657 * source address and does not overwrite 658 * source address and does not overwrite
658 * with the adapter node address. 659 * with the adapter node address.
659 * (valid only in FRAME_START TPL) 660 * (valid only in FRAME_START TPL)
660 * 661 *
661 * C: unchanged. 662 * C: unchanged.
662 */ 663 */
663 #define TX_STRIP_FS 0xFF00 /* R: reserved. 664 #define TX_STRIP_FS 0xFF00 /* R: reserved.
664 * C: if no Transmission Error, 665 * C: if no Transmission Error,
665 * field contains copy of FS byte after 666 * field contains copy of FS byte after
666 * stripping of frame. 667 * stripping of frame.
667 */ 668 */
668 669
669 /* 670 /*
670 * Structure of Transmit Parameter Lists (TPLs) (only one frame every TPL, 671 * Structure of Transmit Parameter Lists (TPLs) (only one frame every TPL,
671 * but possibly multiple TPLs for one frame) the length of the TPLs has to be 672 * but possibly multiple TPLs for one frame) the length of the TPLs has to be
672 * initialized in the OPL. (OPEN parameter list) 673 * initialized in the OPL. (OPEN parameter list)
673 */ 674 */
674 #define TPL_NUM 3 /* Number of Transmit Parameter Lists. 675 #define TPL_NUM 3 /* Number of Transmit Parameter Lists.
675 * !! MUST BE >= 3 !! 676 * !! MUST BE >= 3 !!
676 */ 677 */
677 678
678 #pragma pack(1) 679 #pragma pack(1)
679 typedef struct s_TPL TPL; 680 typedef struct s_TPL TPL;
680 681
681 struct s_TPL { /* Transmit Parameter List (align on even word boundaries) */ 682 struct s_TPL { /* Transmit Parameter List (align on even word boundaries) */
682 __be32 NextTPLAddr; /* Pointer to next TPL in chain; if 683 __be32 NextTPLAddr; /* Pointer to next TPL in chain; if
683 * pointer is odd: this is the last 684 * pointer is odd: this is the last
684 * TPL. Pointing to itself can cause 685 * TPL. Pointing to itself can cause
685 * problems! 686 * problems!
686 */ 687 */
687 volatile u_int16_t Status; /* Initialized by the adapter: 688 volatile u_int16_t Status; /* Initialized by the adapter:
688 * CSTAT_REQUEST important: update least 689 * CSTAT_REQUEST important: update least
689 * significant bit first! Set by the 690 * significant bit first! Set by the
690 * adapter: CSTAT_COMPLETE status. 691 * adapter: CSTAT_COMPLETE status.
691 */ 692 */
692 __be16 FrameSize; /* Number of bytes to be transmitted 693 __be16 FrameSize; /* Number of bytes to be transmitted
693 * as a frame including AC/FC, 694 * as a frame including AC/FC,
694 * Destination, Source, Routing field 695 * Destination, Source, Routing field
695 * not including CRC, FS, End Delimiter 696 * not including CRC, FS, End Delimiter
696 * (valid only if START_FRAME bit in 697 * (valid only if START_FRAME bit in
697 * CSTAT nonzero) must not be zero in 698 * CSTAT nonzero) must not be zero in
698 * any list; maximum value: (BUFFER_SIZE 699 * any list; maximum value: (BUFFER_SIZE
699 * - 8) * TX_BUF_MAX sum of DataCount 700 * - 8) * TX_BUF_MAX sum of DataCount
700 * values in FragmentList must equal 701 * values in FragmentList must equal
701 * Frame_Size value in START_FRAME TPL! 702 * Frame_Size value in START_FRAME TPL!
702 * frame data fragment list. 703 * frame data fragment list.
703 */ 704 */
704 705
705 /* TPL/RPL size in OPEN parameter list depending on maximal 706 /* TPL/RPL size in OPEN parameter list depending on maximal
706 * numbers of fragments used in one parameter list. 707 * numbers of fragments used in one parameter list.
707 */ 708 */
708 Fragment FragList[TX_FRAG_NUM]; /* Maximum: nine frame fragments in one 709 Fragment FragList[TX_FRAG_NUM]; /* Maximum: nine frame fragments in one
709 * TPL actual version of firmware: 9 710 * TPL actual version of firmware: 9
710 * fragments possible. 711 * fragments possible.
711 */ 712 */
712 #pragma pack() 713 #pragma pack()
713 714
714 /* Special proprietary data and precalculations */ 715 /* Special proprietary data and precalculations */
715 716
716 TPL *NextTPLPtr; /* Pointer to next TPL in chain. */ 717 TPL *NextTPLPtr; /* Pointer to next TPL in chain. */
717 unsigned char *MData; 718 unsigned char *MData;
718 struct sk_buff *Skb; 719 struct sk_buff *Skb;
719 unsigned char TPLIndex; 720 unsigned char TPLIndex;
720 volatile unsigned char BusyFlag;/* Flag: TPL busy? */ 721 volatile unsigned char BusyFlag;/* Flag: TPL busy? */
721 dma_addr_t DMABuff; /* DMA IO bus address from dma_map */ 722 dma_addr_t DMABuff; /* DMA IO bus address from dma_map */
722 }; 723 };
723 724
724 /* ---------------------Receive Functions-------------------------------* 725 /* ---------------------Receive Functions-------------------------------*
725 * define RECEIVE_CSTAT_REQUEST (R) and RECEIVE_CSTAT_COMPLETE (C) values. 726 * define RECEIVE_CSTAT_REQUEST (R) and RECEIVE_CSTAT_COMPLETE (C) values.
726 * (high-low) 727 * (high-low)
727 */ 728 */
728 #define RX_VALID 0x0080 /* R: set; tell adapter with 729 #define RX_VALID 0x0080 /* R: set; tell adapter with
729 * RECEIVE.VALID interrupt. 730 * RECEIVE.VALID interrupt.
730 * C: reset to zero. 731 * C: reset to zero.
731 */ 732 */
732 #define RX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero, 733 #define RX_FRAME_COMPLETE 0x0040 /* R: must be reset to zero,
733 * C: set to one. 734 * C: set to one.
734 */ 735 */
735 #define RX_START_FRAME 0x0020 /* R: must be reset to zero. 736 #define RX_START_FRAME 0x0020 /* R: must be reset to zero.
736 * C: set to one on the list. 737 * C: set to one on the list.
737 */ 738 */
738 #define RX_END_FRAME 0x0010 /* R: must be reset to zero. 739 #define RX_END_FRAME 0x0010 /* R: must be reset to zero.
739 * C: set to one on the list 740 * C: set to one on the list
740 * that ends the frame. 741 * that ends the frame.
741 */ 742 */
742 #define RX_FRAME_IRQ 0x0008 /* R: request interrupt generation 743 #define RX_FRAME_IRQ 0x0008 /* R: request interrupt generation
743 * after receive. 744 * after receive.
744 * C: unchanged. 745 * C: unchanged.
745 */ 746 */
746 #define RX_INTERFRAME_WAIT 0x0004 /* R: after receiving a frame: 747 #define RX_INTERFRAME_WAIT 0x0004 /* R: after receiving a frame:
747 * interrupt and wait for a 748 * interrupt and wait for a
748 * RECEIVE.CONTINUE. 749 * RECEIVE.CONTINUE.
749 * C: unchanged. 750 * C: unchanged.
750 */ 751 */
751 #define RX_PASS_CRC 0x0002 /* R: if set, the adapter includes 752 #define RX_PASS_CRC 0x0002 /* R: if set, the adapter includes
752 * the CRC in data passed. (last four 753 * the CRC in data passed. (last four
753 * bytes; valid only if FRAME_START is 754 * bytes; valid only if FRAME_START is
754 * set) 755 * set)
755 * C: set, if CRC is included in 756 * C: set, if CRC is included in
756 * received data. 757 * received data.
757 */ 758 */
758 #define RX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame 759 #define RX_PASS_SRC_ADDR 0x0001 /* R: adapter uses explicit frame
759 * source address and does not 760 * source address and does not
760 * overwrite with the adapter node 761 * overwrite with the adapter node
761 * address. (valid only if FRAME_START 762 * address. (valid only if FRAME_START
762 * is set) 763 * is set)
763 * C: unchanged. 764 * C: unchanged.
764 */ 765 */
765 #define RX_RECEIVE_FS 0xFC00 /* R: reserved; must be reset to zero. 766 #define RX_RECEIVE_FS 0xFC00 /* R: reserved; must be reset to zero.
766 * C: on lists with START_FRAME, field 767 * C: on lists with START_FRAME, field
767 * contains frame status field from 768 * contains frame status field from
768 * received frame; otherwise cleared. 769 * received frame; otherwise cleared.
769 */ 770 */
770 #define RX_ADDR_MATCH 0x0300 /* R: reserved; must be reset to zero. 771 #define RX_ADDR_MATCH 0x0300 /* R: reserved; must be reset to zero.
771 * C: address match code mask. 772 * C: address match code mask.
772 */ 773 */
773 #define RX_STATUS_MASK 0x00FF /* Mask for receive status bits. */ 774 #define RX_STATUS_MASK 0x00FF /* Mask for receive status bits. */
774 775
775 #define RX_INTERN_ADDR_MATCH 0x0100 /* C: internally address match. */ 776 #define RX_INTERN_ADDR_MATCH 0x0100 /* C: internally address match. */
776 #define RX_EXTERN_ADDR_MATCH 0x0200 /* C: externally matched via 777 #define RX_EXTERN_ADDR_MATCH 0x0200 /* C: externally matched via
777 * XMATCH/XFAIL interface. 778 * XMATCH/XFAIL interface.
778 */ 779 */
779 #define RX_INTEXT_ADDR_MATCH 0x0300 /* C: internally and externally 780 #define RX_INTEXT_ADDR_MATCH 0x0300 /* C: internally and externally
780 * matched. 781 * matched.
781 */ 782 */
782 #define RX_READY (RX_VALID | RX_FRAME_IRQ) /* Ready for receive. */ 783 #define RX_READY (RX_VALID | RX_FRAME_IRQ) /* Ready for receive. */
783 784
784 /* Constants for Command Status Interrupt. 785 /* Constants for Command Status Interrupt.
785 * COMMAND_REJECT status field bit functions (SSB.Parm[0]) 786 * COMMAND_REJECT status field bit functions (SSB.Parm[0])
786 */ 787 */
787 #define ILLEGAL_COMMAND 0x0080 /* Set if an unknown command 788 #define ILLEGAL_COMMAND 0x0080 /* Set if an unknown command
788 * is issued to the adapter 789 * is issued to the adapter
789 */ 790 */
790 #define ADDRESS_ERROR 0x0040 /* Set if any address field in 791 #define ADDRESS_ERROR 0x0040 /* Set if any address field in
791 * the SCB is odd. (not word aligned) 792 * the SCB is odd. (not word aligned)
792 */ 793 */
793 #define ADAPTER_OPEN 0x0020 /* Command issued illegal with 794 #define ADAPTER_OPEN 0x0020 /* Command issued illegal with
794 * open adapter. 795 * open adapter.
795 */ 796 */
796 #define ADAPTER_CLOSE 0x0010 /* Command issued illegal with 797 #define ADAPTER_CLOSE 0x0010 /* Command issued illegal with
797 * closed adapter. 798 * closed adapter.
798 */ 799 */
799 #define SAME_COMMAND 0x0008 /* Command issued with same command 800 #define SAME_COMMAND 0x0008 /* Command issued with same command
800 * already executing. 801 * already executing.
801 */ 802 */
802 803
803 /* OPEN_COMPLETION values (SSB.Parm[0], MSB) */ 804 /* OPEN_COMPLETION values (SSB.Parm[0], MSB) */
804 #define NODE_ADDR_ERROR 0x0040 /* Wrong address or BIA read 805 #define NODE_ADDR_ERROR 0x0040 /* Wrong address or BIA read
805 * zero address. 806 * zero address.
806 */ 807 */
807 #define LIST_SIZE_ERROR 0x0020 /* If List_Size value not in 0, 808 #define LIST_SIZE_ERROR 0x0020 /* If List_Size value not in 0,
808 * 14, 20, 26. 809 * 14, 20, 26.
809 */ 810 */
810 #define BUF_SIZE_ERROR 0x0010 /* Not enough available memory for 811 #define BUF_SIZE_ERROR 0x0010 /* Not enough available memory for
811 * two buffers. 812 * two buffers.
812 */ 813 */
813 #define TX_BUF_COUNT_ERROR 0x0004 /* Remaining receive buffers less than 814 #define TX_BUF_COUNT_ERROR 0x0004 /* Remaining receive buffers less than
814 * two. 815 * two.
815 */ 816 */
816 #define OPEN_ERROR 0x0002 /* Error during ring insertion; more 817 #define OPEN_ERROR 0x0002 /* Error during ring insertion; more
817 * information in bits 8-15. 818 * information in bits 8-15.
818 */ 819 */
819 820
820 /* Standard return codes */ 821 /* Standard return codes */
821 #define GOOD_COMPLETION 0x0080 /* =OPEN_SUCCESSFULL */ 822 #define GOOD_COMPLETION 0x0080 /* =OPEN_SUCCESSFULL */
822 #define INVALID_OPEN_OPTION 0x0001 /* OPEN options are not supported by 823 #define INVALID_OPEN_OPTION 0x0001 /* OPEN options are not supported by
823 * the adapter. 824 * the adapter.
824 */ 825 */
825 826
826 /* OPEN phases; details of OPEN_ERROR (SSB.Parm[0], LSB) */ 827 /* OPEN phases; details of OPEN_ERROR (SSB.Parm[0], LSB) */
827 #define OPEN_PHASES_MASK 0xF000 /* Check only the bits 8-11. */ 828 #define OPEN_PHASES_MASK 0xF000 /* Check only the bits 8-11. */
828 #define LOBE_MEDIA_TEST 0x1000 829 #define LOBE_MEDIA_TEST 0x1000
829 #define PHYSICAL_INSERTION 0x2000 830 #define PHYSICAL_INSERTION 0x2000
830 #define ADDRESS_VERIFICATION 0x3000 831 #define ADDRESS_VERIFICATION 0x3000
831 #define PARTICIPATION_IN_RING_POLL 0x4000 832 #define PARTICIPATION_IN_RING_POLL 0x4000
832 #define REQUEST_INITIALISATION 0x5000 833 #define REQUEST_INITIALISATION 0x5000
833 #define FULLDUPLEX_CHECK 0x6000 834 #define FULLDUPLEX_CHECK 0x6000
834 835
835 /* OPEN error codes; details of OPEN_ERROR (SSB.Parm[0], LSB) */ 836 /* OPEN error codes; details of OPEN_ERROR (SSB.Parm[0], LSB) */
836 #define OPEN_ERROR_CODES_MASK 0x0F00 /* Check only the bits 12-15. */ 837 #define OPEN_ERROR_CODES_MASK 0x0F00 /* Check only the bits 12-15. */
837 #define OPEN_FUNCTION_FAILURE 0x0100 /* Unable to transmit to itself or 838 #define OPEN_FUNCTION_FAILURE 0x0100 /* Unable to transmit to itself or
838 * frames received before insertion. 839 * frames received before insertion.
839 */ 840 */
840 #define OPEN_SIGNAL_LOSS 0x0200 /* Signal loss condition detected at 841 #define OPEN_SIGNAL_LOSS 0x0200 /* Signal loss condition detected at
841 * receiver. 842 * receiver.
842 */ 843 */
843 #define OPEN_TIMEOUT 0x0500 /* Insertion timer expired before 844 #define OPEN_TIMEOUT 0x0500 /* Insertion timer expired before
844 * logical insertion. 845 * logical insertion.
845 */ 846 */
846 #define OPEN_RING_FAILURE 0x0600 /* Unable to receive own ring purge 847 #define OPEN_RING_FAILURE 0x0600 /* Unable to receive own ring purge
847 * MAC frames. 848 * MAC frames.
848 */ 849 */
849 #define OPEN_RING_BEACONING 0x0700 /* Beacon MAC frame received after 850 #define OPEN_RING_BEACONING 0x0700 /* Beacon MAC frame received after
850 * ring insertion. 851 * ring insertion.
851 */ 852 */
852 #define OPEN_DUPLICATE_NODEADDR 0x0800 /* Other station in ring found 853 #define OPEN_DUPLICATE_NODEADDR 0x0800 /* Other station in ring found
853 * with the same address. 854 * with the same address.
854 */ 855 */
855 #define OPEN_REQUEST_INIT 0x0900 /* RPS present but does not respond. */ 856 #define OPEN_REQUEST_INIT 0x0900 /* RPS present but does not respond. */
856 #define OPEN_REMOVE_RECEIVED 0x0A00 /* Adapter received a remove adapter 857 #define OPEN_REMOVE_RECEIVED 0x0A00 /* Adapter received a remove adapter
857 * MAC frame. 858 * MAC frame.
858 */ 859 */
859 #define OPEN_FULLDUPLEX_SET 0x0D00 /* Got this with full duplex on when 860 #define OPEN_FULLDUPLEX_SET 0x0D00 /* Got this with full duplex on when
860 * trying to connect to a normal ring. 861 * trying to connect to a normal ring.
861 */ 862 */
862 863
863 /* SET_BRIDGE_PARMS return codes: */ 864 /* SET_BRIDGE_PARMS return codes: */
864 #define BRIDGE_INVALID_MAX_LEN 0x4000 /* MAX_ROUTING_FIELD_LENGTH odd, 865 #define BRIDGE_INVALID_MAX_LEN 0x4000 /* MAX_ROUTING_FIELD_LENGTH odd,
865 * less than 6 or > 30. 866 * less than 6 or > 30.
866 */ 867 */
867 #define BRIDGE_INVALID_SRC_RING 0x2000 /* SOURCE_RING number zero, too large 868 #define BRIDGE_INVALID_SRC_RING 0x2000 /* SOURCE_RING number zero, too large
868 * or = TARGET_RING. 869 * or = TARGET_RING.
869 */ 870 */
870 #define BRIDGE_INVALID_TRG_RING 0x1000 /* TARGET_RING number zero, too large 871 #define BRIDGE_INVALID_TRG_RING 0x1000 /* TARGET_RING number zero, too large
871 * or = SOURCE_RING. 872 * or = SOURCE_RING.
872 */ 873 */
873 #define BRIDGE_INVALID_BRDGE_NO 0x0800 /* BRIDGE_NUMBER too large. */ 874 #define BRIDGE_INVALID_BRDGE_NO 0x0800 /* BRIDGE_NUMBER too large. */
874 #define BRIDGE_INVALID_OPTIONS 0x0400 /* Invalid bridge options. */ 875 #define BRIDGE_INVALID_OPTIONS 0x0400 /* Invalid bridge options. */
875 #define BRIDGE_DIAGS_FAILED 0x0200 /* Diagnostics of TMS380SRA failed. */ 876 #define BRIDGE_DIAGS_FAILED 0x0200 /* Diagnostics of TMS380SRA failed. */
876 #define BRIDGE_NO_SRA 0x0100 /* The TMS380SRA does not exist in HW 877 #define BRIDGE_NO_SRA 0x0100 /* The TMS380SRA does not exist in HW
877 * configuration. 878 * configuration.
878 */ 879 */
879 880
880 /* 881 /*
881 * Bring Up Diagnostics error codes. 882 * Bring Up Diagnostics error codes.
882 */ 883 */
883 #define BUD_INITIAL_ERROR 0x0 884 #define BUD_INITIAL_ERROR 0x0
884 #define BUD_CHECKSUM_ERROR 0x1 885 #define BUD_CHECKSUM_ERROR 0x1
885 #define BUD_ADAPTER_RAM_ERROR 0x2 886 #define BUD_ADAPTER_RAM_ERROR 0x2
886 #define BUD_INSTRUCTION_ERROR 0x3 887 #define BUD_INSTRUCTION_ERROR 0x3
887 #define BUD_CONTEXT_ERROR 0x4 888 #define BUD_CONTEXT_ERROR 0x4
888 #define BUD_PROTOCOL_ERROR 0x5 889 #define BUD_PROTOCOL_ERROR 0x5
889 #define BUD_INTERFACE_ERROR 0x6 890 #define BUD_INTERFACE_ERROR 0x6
890 891
891 /* BUD constants */ 892 /* BUD constants */
892 #define BUD_MAX_RETRIES 3 893 #define BUD_MAX_RETRIES 3
893 #define BUD_MAX_LOOPCNT 6 894 #define BUD_MAX_LOOPCNT 6
894 #define BUD_TIMEOUT 3000 895 #define BUD_TIMEOUT 3000
895 896
896 /* Initialization constants */ 897 /* Initialization constants */
897 #define INIT_MAX_RETRIES 3 /* Maximum three retries. */ 898 #define INIT_MAX_RETRIES 3 /* Maximum three retries. */
898 #define INIT_MAX_LOOPCNT 22 /* Maximum loop counts. */ 899 #define INIT_MAX_LOOPCNT 22 /* Maximum loop counts. */
899 900
900 /* RING STATUS field values (high/low) */ 901 /* RING STATUS field values (high/low) */
901 #define SIGNAL_LOSS 0x0080 /* Loss of signal on the ring 902 #define SIGNAL_LOSS 0x0080 /* Loss of signal on the ring
902 * detected. 903 * detected.
903 */ 904 */
904 #define HARD_ERROR 0x0040 /* Transmitting or receiving beacon 905 #define HARD_ERROR 0x0040 /* Transmitting or receiving beacon
905 * frames. 906 * frames.
906 */ 907 */
907 #define SOFT_ERROR 0x0020 /* Report error MAC frame 908 #define SOFT_ERROR 0x0020 /* Report error MAC frame
908 * transmitted. 909 * transmitted.
909 */ 910 */
910 #define TRANSMIT_BEACON 0x0010 /* Transmitting beacon frames on the 911 #define TRANSMIT_BEACON 0x0010 /* Transmitting beacon frames on the
911 * ring. 912 * ring.
912 */ 913 */
913 #define LOBE_WIRE_FAULT 0x0008 /* Open or short circuit in the 914 #define LOBE_WIRE_FAULT 0x0008 /* Open or short circuit in the
914 * cable to concentrator; adapter 915 * cable to concentrator; adapter
915 * closed. 916 * closed.
916 */ 917 */
917 #define AUTO_REMOVAL_ERROR 0x0004 /* Lobe wrap test failed, deinserted; 918 #define AUTO_REMOVAL_ERROR 0x0004 /* Lobe wrap test failed, deinserted;
918 * adapter closed. 919 * adapter closed.
919 */ 920 */
920 #define REMOVE_RECEIVED 0x0001 /* Received a remove ring station MAC 921 #define REMOVE_RECEIVED 0x0001 /* Received a remove ring station MAC
921 * MAC frame request; adapter closed. 922 * MAC frame request; adapter closed.
922 */ 923 */
923 #define COUNTER_OVERFLOW 0x8000 /* Overflow of one of the adapters 924 #define COUNTER_OVERFLOW 0x8000 /* Overflow of one of the adapters
924 * error counters; READ.ERROR.LOG. 925 * error counters; READ.ERROR.LOG.
925 */ 926 */
926 #define SINGLE_STATION 0x4000 /* Adapter is the only station on the 927 #define SINGLE_STATION 0x4000 /* Adapter is the only station on the
927 * ring. 928 * ring.
928 */ 929 */
929 #define RING_RECOVERY 0x2000 /* Claim token MAC frames on the ring; 930 #define RING_RECOVERY 0x2000 /* Claim token MAC frames on the ring;
930 * reset after ring purge frame. 931 * reset after ring purge frame.
931 */ 932 */
932 933
933 #define ADAPTER_CLOSED (LOBE_WIRE_FAULT | AUTO_REMOVAL_ERROR |\ 934 #define ADAPTER_CLOSED (LOBE_WIRE_FAULT | AUTO_REMOVAL_ERROR |\
934 REMOVE_RECEIVED) 935 REMOVE_RECEIVED)
935 936
936 /* Adapter_check_block.Status field bit assignments: */ 937 /* Adapter_check_block.Status field bit assignments: */
937 #define DIO_PARITY 0x8000 /* Adapter detects bad parity 938 #define DIO_PARITY 0x8000 /* Adapter detects bad parity
938 * through direct I/O access. 939 * through direct I/O access.
939 */ 940 */
940 #define DMA_READ_ABORT 0x4000 /* Aborting DMA read operation 941 #define DMA_READ_ABORT 0x4000 /* Aborting DMA read operation
941 * from system Parm[0]: 0=timeout, 942 * from system Parm[0]: 0=timeout,
942 * 1=parity error, 2=bus error; 943 * 1=parity error, 2=bus error;
943 * Parm[1]: 32 bit pointer to host 944 * Parm[1]: 32 bit pointer to host
944 * system address at failure. 945 * system address at failure.
945 */ 946 */
946 #define DMA_WRITE_ABORT 0x2000 /* Aborting DMA write operation 947 #define DMA_WRITE_ABORT 0x2000 /* Aborting DMA write operation
947 * to system. (parameters analogous to 948 * to system. (parameters analogous to
948 * DMA_READ_ABORT) 949 * DMA_READ_ABORT)
949 */ 950 */
950 #define ILLEGAL_OP_CODE 0x1000 /* Illegal operation code in the 951 #define ILLEGAL_OP_CODE 0x1000 /* Illegal operation code in the
951 * the adapters firmware Parm[0]-2: 952 * the adapters firmware Parm[0]-2:
952 * communications processor registers 953 * communications processor registers
953 * R13-R15. 954 * R13-R15.
954 */ 955 */
955 #define PARITY_ERRORS 0x0800 /* Adapter detects internal bus 956 #define PARITY_ERRORS 0x0800 /* Adapter detects internal bus
956 * parity error. 957 * parity error.
957 */ 958 */
958 #define RAM_DATA_ERROR 0x0080 /* Valid only during RAM testing; 959 #define RAM_DATA_ERROR 0x0080 /* Valid only during RAM testing;
959 * RAM data error Parm[0-1]: 32 bit 960 * RAM data error Parm[0-1]: 32 bit
960 * pointer to RAM location. 961 * pointer to RAM location.
961 */ 962 */
962 #define RAM_PARITY_ERROR 0x0040 /* Valid only during RAM testing; 963 #define RAM_PARITY_ERROR 0x0040 /* Valid only during RAM testing;
963 * RAM parity error Parm[0-1]: 32 bit 964 * RAM parity error Parm[0-1]: 32 bit
964 * pointer to RAM location. 965 * pointer to RAM location.
965 */ 966 */
966 #define RING_UNDERRUN 0x0020 /* Internal DMA underrun when 967 #define RING_UNDERRUN 0x0020 /* Internal DMA underrun when
967 * transmitting onto ring. 968 * transmitting onto ring.
968 */ 969 */
969 #define INVALID_IRQ 0x0008 /* Unrecognized interrupt generated 970 #define INVALID_IRQ 0x0008 /* Unrecognized interrupt generated
970 * internal to adapter Parm[0-2]: 971 * internal to adapter Parm[0-2]:
971 * adapter register R13-R15. 972 * adapter register R13-R15.
972 */ 973 */
973 #define INVALID_ERROR_IRQ 0x0004 /* Unrecognized error interrupt 974 #define INVALID_ERROR_IRQ 0x0004 /* Unrecognized error interrupt
974 * generated Parm[0-2]: adapter register 975 * generated Parm[0-2]: adapter register
975 * R13-R15. 976 * R13-R15.
976 */ 977 */
977 #define INVALID_XOP 0x0002 /* Unrecognized XOP request in 978 #define INVALID_XOP 0x0002 /* Unrecognized XOP request in
978 * communication processor Parm[0-2]: 979 * communication processor Parm[0-2]:
979 * adapter register R13-R15. 980 * adapter register R13-R15.
980 */ 981 */
981 #define CHECKADDR 0x05E0 /* Adapter check status information 982 #define CHECKADDR 0x05E0 /* Adapter check status information
982 * address offset. 983 * address offset.
983 */ 984 */
984 #define ROM_PAGE_0 0x0000 /* Adapter ROM page 0. */ 985 #define ROM_PAGE_0 0x0000 /* Adapter ROM page 0. */
985 986
986 /* 987 /*
987 * RECEIVE.STATUS interrupt result SSB values: (high-low) 988 * RECEIVE.STATUS interrupt result SSB values: (high-low)
988 * (RECEIVE_COMPLETE field bit definitions in SSB.Parm[0]) 989 * (RECEIVE_COMPLETE field bit definitions in SSB.Parm[0])
989 */ 990 */
990 #define RX_COMPLETE 0x0080 /* SSB.Parm[0]; SSB.Parm[1]: 32 991 #define RX_COMPLETE 0x0080 /* SSB.Parm[0]; SSB.Parm[1]: 32
991 * bit pointer to last RPL. 992 * bit pointer to last RPL.
992 */ 993 */
993 #define RX_SUSPENDED 0x0040 /* SSB.Parm[0]; SSB.Parm[1]: 32 994 #define RX_SUSPENDED 0x0040 /* SSB.Parm[0]; SSB.Parm[1]: 32
994 * bit pointer to RPL with odd 995 * bit pointer to RPL with odd
995 * forward pointer. 996 * forward pointer.
996 */ 997 */
997 998
998 /* Valid receive CSTAT: */ 999 /* Valid receive CSTAT: */
999 #define RX_FRAME_CONTROL_BITS (RX_VALID | RX_START_FRAME | RX_END_FRAME | \ 1000 #define RX_FRAME_CONTROL_BITS (RX_VALID | RX_START_FRAME | RX_END_FRAME | \
1000 RX_FRAME_COMPLETE) 1001 RX_FRAME_COMPLETE)
1001 #define VALID_SINGLE_BUFFER_FRAME (RX_START_FRAME | RX_END_FRAME | \ 1002 #define VALID_SINGLE_BUFFER_FRAME (RX_START_FRAME | RX_END_FRAME | \
1002 RX_FRAME_COMPLETE) 1003 RX_FRAME_COMPLETE)
1003 1004
1004 typedef enum SKB_STAT SKB_STAT; 1005 typedef enum SKB_STAT SKB_STAT;
1005 enum SKB_STAT { 1006 enum SKB_STAT {
1006 SKB_UNAVAILABLE, 1007 SKB_UNAVAILABLE,
1007 SKB_DMA_DIRECT, 1008 SKB_DMA_DIRECT,
1008 SKB_DATA_COPY 1009 SKB_DATA_COPY
1009 }; 1010 };
1010 1011
1011 /* Receive Parameter List (RPL) The length of the RPLs has to be initialized 1012 /* Receive Parameter List (RPL) The length of the RPLs has to be initialized
1012 * in the OPL. (OPEN parameter list) 1013 * in the OPL. (OPEN parameter list)
1013 */ 1014 */
1014 #define RPL_NUM 3 1015 #define RPL_NUM 3
1015 1016
1016 #define RX_FRAG_NUM 1 /* Maximal number of used fragments in one RPL. 1017 #define RX_FRAG_NUM 1 /* Maximal number of used fragments in one RPL.
1017 * (up to firmware v2.24: 3, now: up to 9) 1018 * (up to firmware v2.24: 3, now: up to 9)
1018 */ 1019 */
1019 1020
1020 #pragma pack(1) 1021 #pragma pack(1)
1021 typedef struct s_RPL RPL; 1022 typedef struct s_RPL RPL;
1022 struct s_RPL { /* Receive Parameter List */ 1023 struct s_RPL { /* Receive Parameter List */
1023 __be32 NextRPLAddr; /* Pointer to next RPL in chain 1024 __be32 NextRPLAddr; /* Pointer to next RPL in chain
1024 * (normalized = physical 32 bit 1025 * (normalized = physical 32 bit
1025 * address) if pointer is odd: this 1026 * address) if pointer is odd: this
1026 * is last RPL. Pointing to itself can 1027 * is last RPL. Pointing to itself can
1027 * cause problems! 1028 * cause problems!
1028 */ 1029 */
1029 volatile u_int16_t Status; /* Set by creation of Receive Parameter 1030 volatile u_int16_t Status; /* Set by creation of Receive Parameter
1030 * List RECEIVE_CSTAT_COMPLETE set by 1031 * List RECEIVE_CSTAT_COMPLETE set by
1031 * adapter in lists that start or end 1032 * adapter in lists that start or end
1032 * a frame. 1033 * a frame.
1033 */ 1034 */
1034 volatile __be16 FrameSize; /* Number of bytes received as a 1035 volatile __be16 FrameSize; /* Number of bytes received as a
1035 * frame including AC/FC, Destination, 1036 * frame including AC/FC, Destination,
1036 * Source, Routing field not including 1037 * Source, Routing field not including
1037 * CRC, FS (Frame Status), End Delimiter 1038 * CRC, FS (Frame Status), End Delimiter
1038 * (valid only if START_FRAME bit in 1039 * (valid only if START_FRAME bit in
1039 * CSTAT nonzero) must not be zero in 1040 * CSTAT nonzero) must not be zero in
1040 * any list; maximum value: (BUFFER_SIZE 1041 * any list; maximum value: (BUFFER_SIZE
1041 * - 8) * TX_BUF_MAX sum of DataCount 1042 * - 8) * TX_BUF_MAX sum of DataCount
1042 * values in FragmentList must equal 1043 * values in FragmentList must equal
1043 * Frame_Size value in START_FRAME TPL! 1044 * Frame_Size value in START_FRAME TPL!
1044 * frame data fragment list 1045 * frame data fragment list
1045 */ 1046 */
1046 1047
1047 /* TPL/RPL size in OPEN parameter list depending on maximal numbers 1048 /* TPL/RPL size in OPEN parameter list depending on maximal numbers
1048 * of fragments used in one parameter list. 1049 * of fragments used in one parameter list.
1049 */ 1050 */
1050 Fragment FragList[RX_FRAG_NUM]; /* Maximum: nine frame fragments in 1051 Fragment FragList[RX_FRAG_NUM]; /* Maximum: nine frame fragments in
1051 * one TPL. Actual version of firmware: 1052 * one TPL. Actual version of firmware:
1052 * 9 fragments possible. 1053 * 9 fragments possible.
1053 */ 1054 */
1054 #pragma pack() 1055 #pragma pack()
1055 1056
1056 /* Special proprietary data and precalculations. */ 1057 /* Special proprietary data and precalculations. */
1057 RPL *NextRPLPtr; /* Logical pointer to next RPL in chain. */ 1058 RPL *NextRPLPtr; /* Logical pointer to next RPL in chain. */
1058 unsigned char *MData; 1059 unsigned char *MData;
1059 struct sk_buff *Skb; 1060 struct sk_buff *Skb;
1060 SKB_STAT SkbStat; 1061 SKB_STAT SkbStat;
1061 int RPLIndex; 1062 int RPLIndex;
1062 dma_addr_t DMABuff; /* DMA IO bus address from dma_map */ 1063 dma_addr_t DMABuff; /* DMA IO bus address from dma_map */
1063 }; 1064 };
1064 1065
1065 /* Information that need to be kept for each board. */ 1066 /* Information that need to be kept for each board. */
1066 typedef struct net_local { 1067 typedef struct net_local {
1067 #pragma pack(1) 1068 #pragma pack(1)
1068 IPB ipb; /* Initialization Parameter Block. */ 1069 IPB ipb; /* Initialization Parameter Block. */
1069 SCB scb; /* System Command Block: system to adapter 1070 SCB scb; /* System Command Block: system to adapter
1070 * communication. 1071 * communication.
1071 */ 1072 */
1072 SSB ssb; /* System Status Block: adapter to system 1073 SSB ssb; /* System Status Block: adapter to system
1073 * communication. 1074 * communication.
1074 */ 1075 */
1075 OPB ocpl; /* Open Options Parameter Block. */ 1076 OPB ocpl; /* Open Options Parameter Block. */
1076 1077
1077 ERRORTAB errorlogtable; /* Adapter statistic error counters. 1078 ERRORTAB errorlogtable; /* Adapter statistic error counters.
1078 * (read from adapter memory) 1079 * (read from adapter memory)
1079 */ 1080 */
1080 unsigned char ProductID[PROD_ID_SIZE + 1]; /* Product ID */ 1081 unsigned char ProductID[PROD_ID_SIZE + 1]; /* Product ID */
1081 #pragma pack() 1082 #pragma pack()
1082 1083
1083 TPL Tpl[TPL_NUM]; 1084 TPL Tpl[TPL_NUM];
1084 TPL *TplFree; 1085 TPL *TplFree;
1085 TPL *TplBusy; 1086 TPL *TplBusy;
1086 unsigned char LocalTxBuffers[TPL_NUM][DEFAULT_PACKET_SIZE]; 1087 unsigned char LocalTxBuffers[TPL_NUM][DEFAULT_PACKET_SIZE];
1087 1088
1088 RPL Rpl[RPL_NUM]; 1089 RPL Rpl[RPL_NUM];
1089 RPL *RplHead; 1090 RPL *RplHead;
1090 RPL *RplTail; 1091 RPL *RplTail;
1091 unsigned char LocalRxBuffers[RPL_NUM][DEFAULT_PACKET_SIZE]; 1092 unsigned char LocalRxBuffers[RPL_NUM][DEFAULT_PACKET_SIZE];
1092 1093
1093 struct device *pdev; 1094 struct device *pdev;
1094 int DataRate; 1095 int DataRate;
1095 unsigned char ScbInUse; 1096 unsigned char ScbInUse;
1096 unsigned short CMDqueue; 1097 unsigned short CMDqueue;
1097 1098
1098 unsigned long AdapterOpenFlag:1; 1099 unsigned long AdapterOpenFlag:1;
1099 unsigned long AdapterVirtOpenFlag:1; 1100 unsigned long AdapterVirtOpenFlag:1;
1100 unsigned long OpenCommandIssued:1; 1101 unsigned long OpenCommandIssued:1;
1101 unsigned long TransmitCommandActive:1; 1102 unsigned long TransmitCommandActive:1;
1102 unsigned long TransmitHaltScheduled:1; 1103 unsigned long TransmitHaltScheduled:1;
1103 unsigned long HaltInProgress:1; 1104 unsigned long HaltInProgress:1;
1104 unsigned long LobeWireFaultLogged:1; 1105 unsigned long LobeWireFaultLogged:1;
1105 unsigned long ReOpenInProgress:1; 1106 unsigned long ReOpenInProgress:1;
1106 unsigned long Sleeping:1; 1107 unsigned long Sleeping:1;
1107 1108
1108 unsigned long LastOpenStatus; 1109 unsigned long LastOpenStatus;
1109 unsigned short CurrentRingStatus; 1110 unsigned short CurrentRingStatus;
1110 unsigned long MaxPacketSize; 1111 unsigned long MaxPacketSize;
1111 1112
1112 unsigned long StartTime; 1113 unsigned long StartTime;
1113 unsigned long LastSendTime; 1114 unsigned long LastSendTime;
1114 1115
1115 struct tr_statistics MacStat; /* MAC statistics structure */ 1116 struct tr_statistics MacStat; /* MAC statistics structure */
1116 1117
1117 unsigned long dmalimit; /* the max DMA address (ie, ISA) */ 1118 unsigned long dmalimit; /* the max DMA address (ie, ISA) */
1118 dma_addr_t dmabuffer; /* the DMA bus address corresponding to 1119 dma_addr_t dmabuffer; /* the DMA bus address corresponding to
1119 priv. Might be different from virt_to_bus() 1120 priv. Might be different from virt_to_bus()
1120 for architectures with IO MMU (Alpha) */ 1121 for architectures with IO MMU (Alpha) */
1121 1122
1122 struct timer_list timer; 1123 struct timer_list timer;
1123 1124
1124 wait_queue_head_t wait_for_tok_int; 1125 wait_queue_head_t wait_for_tok_int;
1125 1126
1126 INTPTRS intptrs; /* Internal adapter pointer. Must be read 1127 INTPTRS intptrs; /* Internal adapter pointer. Must be read
1127 * before OPEN command. 1128 * before OPEN command.
1128 */ 1129 */
1129 unsigned short (*setnselout)(struct net_device *); 1130 unsigned short (*setnselout)(struct net_device *);
1130 unsigned short (*sifreadb)(struct net_device *, unsigned short); 1131 unsigned short (*sifreadb)(struct net_device *, unsigned short);
1131 void (*sifwriteb)(struct net_device *, unsigned short, unsigned short); 1132 void (*sifwriteb)(struct net_device *, unsigned short, unsigned short);
1132 unsigned short (*sifreadw)(struct net_device *, unsigned short); 1133 unsigned short (*sifreadw)(struct net_device *, unsigned short);
1133 void (*sifwritew)(struct net_device *, unsigned short, unsigned short); 1134 void (*sifwritew)(struct net_device *, unsigned short, unsigned short);
1134 1135
1135 spinlock_t lock; /* SMP protection */ 1136 spinlock_t lock; /* SMP protection */
1136 void *tmspriv; 1137 void *tmspriv;
1137 } NET_LOCAL; 1138 } NET_LOCAL;
1138 1139
1139 #endif /* __KERNEL__ */ 1140 #endif /* __KERNEL__ */
1140 #endif /* __LINUX_TMS380TR_H */ 1141 #endif /* __LINUX_TMS380TR_H */
1141 1142
drivers/net/tokenring/tmspci.c
Diff comments   View file @ f1608f8
1 /* 1 /*
2 * tmspci.c: A generic network driver for TMS380-based PCI token ring cards. 2 * tmspci.c: A generic network driver for TMS380-based PCI token ring cards.
3 * 3 *
4 * Written 1999 by Adam Fritzler 4 * Written 1999 by Adam Fritzler
5 * 5 *
6 * This software may be used and distributed according to the terms 6 * This software may be used and distributed according to the terms
7 * of the GNU General Public License, incorporated herein by reference. 7 * of the GNU General Public License, incorporated herein by reference.
8 * 8 *
9 * This driver module supports the following cards: 9 * This driver module supports the following cards:
10 * - SysKonnect TR4/16(+) PCI (SK-4590) 10 * - SysKonnect TR4/16(+) PCI (SK-4590)
11 * - SysKonnect TR4/16 PCI (SK-4591) 11 * - SysKonnect TR4/16 PCI (SK-4591)
12 * - Compaq TR 4/16 PCI 12 * - Compaq TR 4/16 PCI
13 * - Thomas-Conrad TC4048 4/16 PCI 13 * - Thomas-Conrad TC4048 4/16 PCI
14 * - 3Com 3C339 Token Link Velocity 14 * - 3Com 3C339 Token Link Velocity
15 * 15 *
16 * Maintainer(s): 16 * Maintainer(s):
17 * AF Adam Fritzler 17 * AF Adam Fritzler
18 * 18 *
19 * Modification History: 19 * Modification History:
20 * 30-Dec-99 AF Split off from the tms380tr driver. 20 * 30-Dec-99 AF Split off from the tms380tr driver.
21 * 22-Jan-00 AF Updated to use indirect read/writes 21 * 22-Jan-00 AF Updated to use indirect read/writes
22 * 23-Nov-00 JG New PCI API, cleanups 22 * 23-Nov-00 JG New PCI API, cleanups
23 * 23 *
24 * TODO: 24 * TODO:
25 * 1. See if we can use MMIO instead of port accesses 25 * 1. See if we can use MMIO instead of port accesses
26 * 26 *
27 */ 27 */
28 28
29 #include <linux/module.h> 29 #include <linux/module.h>
30 #include <linux/kernel.h> 30 #include <linux/kernel.h>
31 #include <linux/errno.h> 31 #include <linux/errno.h>
32 #include <linux/pci.h> 32 #include <linux/pci.h>
33 #include <linux/init.h> 33 #include <linux/init.h>
34 #include <linux/netdevice.h> 34 #include <linux/netdevice.h>
35 #include <linux/trdevice.h> 35 #include <linux/trdevice.h>
36 36
37 #include <asm/system.h> 37 #include <asm/system.h>
38 #include <asm/io.h> 38 #include <asm/io.h>
39 #include <asm/irq.h> 39 #include <asm/irq.h>
40 40
41 #include "tms380tr.h" 41 #include "tms380tr.h"
42 42
43 static char version[] __devinitdata = 43 static char version[] __devinitdata =
44 "tmspci.c: v1.02 23/11/2000 by Adam Fritzler\n"; 44 "tmspci.c: v1.02 23/11/2000 by Adam Fritzler\n";
45 45
46 #define TMS_PCI_IO_EXTENT 32 46 #define TMS_PCI_IO_EXTENT 32
47 47
48 struct card_info { 48 struct card_info {
49 unsigned char nselout[2]; /* NSELOUT vals for 4mb([0]) and 16mb([1]) */ 49 unsigned char nselout[2]; /* NSELOUT vals for 4mb([0]) and 16mb([1]) */
50 char *name; 50 char *name;
51 }; 51 };
52 52
53 static struct card_info card_info_table[] = { 53 static struct card_info card_info_table[] = {
54 { {0x03, 0x01}, "Compaq 4/16 TR PCI"}, 54 { {0x03, 0x01}, "Compaq 4/16 TR PCI"},
55 { {0x03, 0x01}, "SK NET TR 4/16 PCI"}, 55 { {0x03, 0x01}, "SK NET TR 4/16 PCI"},
56 { {0x03, 0x01}, "Thomas-Conrad TC4048 PCI 4/16"}, 56 { {0x03, 0x01}, "Thomas-Conrad TC4048 PCI 4/16"},
57 { {0x03, 0x01}, "3Com Token Link Velocity"}, 57 { {0x03, 0x01}, "3Com Token Link Velocity"},
58 }; 58 };
59 59
60 static struct pci_device_id tmspci_pci_tbl[] = { 60 static struct pci_device_id tmspci_pci_tbl[] = {
61 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_TOKENRING, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 61 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_TOKENRING, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
62 { PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_TR, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 }, 62 { PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_TR, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
63 { PCI_VENDOR_ID_TCONRAD, PCI_DEVICE_ID_TCONRAD_TOKENRING, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 }, 63 { PCI_VENDOR_ID_TCONRAD, PCI_DEVICE_ID_TCONRAD_TOKENRING, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
64 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C339, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 }, 64 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C339, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
65 { } /* Terminating entry */ 65 { } /* Terminating entry */
66 }; 66 };
67 MODULE_DEVICE_TABLE(pci, tmspci_pci_tbl); 67 MODULE_DEVICE_TABLE(pci, tmspci_pci_tbl);
68 68
69 MODULE_LICENSE("GPL"); 69 MODULE_LICENSE("GPL");
70 70
71 static void tms_pci_read_eeprom(struct net_device *dev); 71 static void tms_pci_read_eeprom(struct net_device *dev);
72 static unsigned short tms_pci_setnselout_pins(struct net_device *dev); 72 static unsigned short tms_pci_setnselout_pins(struct net_device *dev);
73 73
74 static unsigned short tms_pci_sifreadb(struct net_device *dev, unsigned short reg) 74 static unsigned short tms_pci_sifreadb(struct net_device *dev, unsigned short reg)
75 { 75 {
76 return inb(dev->base_addr + reg); 76 return inb(dev->base_addr + reg);
77 } 77 }
78 78
79 static unsigned short tms_pci_sifreadw(struct net_device *dev, unsigned short reg) 79 static unsigned short tms_pci_sifreadw(struct net_device *dev, unsigned short reg)
80 { 80 {
81 return inw(dev->base_addr + reg); 81 return inw(dev->base_addr + reg);
82 } 82 }
83 83
84 static void tms_pci_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg) 84 static void tms_pci_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)
85 { 85 {
86 outb(val, dev->base_addr + reg); 86 outb(val, dev->base_addr + reg);
87 } 87 }
88 88
89 static void tms_pci_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg) 89 static void tms_pci_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)
90 { 90 {
91 outw(val, dev->base_addr + reg); 91 outw(val, dev->base_addr + reg);
92 } 92 }
93 93
94 static int __devinit tms_pci_attach(struct pci_dev *pdev, const struct pci_device_id *ent) 94 static int __devinit tms_pci_attach(struct pci_dev *pdev, const struct pci_device_id *ent)
95 { 95 {
96 static int versionprinted; 96 static int versionprinted;
97 struct net_device *dev; 97 struct net_device *dev;
98 struct net_local *tp; 98 struct net_local *tp;
99 int ret; 99 int ret;
100 unsigned int pci_irq_line; 100 unsigned int pci_irq_line;
101 unsigned long pci_ioaddr; 101 unsigned long pci_ioaddr;
102 struct card_info *cardinfo = &card_info_table[ent->driver_data]; 102 struct card_info *cardinfo = &card_info_table[ent->driver_data];
103 103
104 if (versionprinted++ == 0) 104 if (versionprinted++ == 0)
105 printk("%s", version); 105 printk("%s", version);
106 106
107 if (pci_enable_device(pdev)) 107 if (pci_enable_device(pdev))
108 return -EIO; 108 return -EIO;
109 109
110 /* Remove I/O space marker in bit 0. */ 110 /* Remove I/O space marker in bit 0. */
111 pci_irq_line = pdev->irq; 111 pci_irq_line = pdev->irq;
112 pci_ioaddr = pci_resource_start (pdev, 0); 112 pci_ioaddr = pci_resource_start (pdev, 0);
113 113
114 /* At this point we have found a valid card. */ 114 /* At this point we have found a valid card. */
115 dev = alloc_trdev(sizeof(struct net_local)); 115 dev = alloc_trdev(sizeof(struct net_local));
116 if (!dev) 116 if (!dev)
117 return -ENOMEM; 117 return -ENOMEM;
118 118
119 if (!request_region(pci_ioaddr, TMS_PCI_IO_EXTENT, dev->name)) { 119 if (!request_region(pci_ioaddr, TMS_PCI_IO_EXTENT, dev->name)) {
120 ret = -EBUSY; 120 ret = -EBUSY;
121 goto err_out_trdev; 121 goto err_out_trdev;
122 } 122 }
123 123
124 ret = request_irq(pdev->irq, tms380tr_interrupt, IRQF_SHARED, 124 ret = request_irq(pdev->irq, tms380tr_interrupt, IRQF_SHARED,
125 dev->name, dev); 125 dev->name, dev);
126 if (ret) 126 if (ret)
127 goto err_out_region; 127 goto err_out_region;
128 128
129 dev->base_addr = pci_ioaddr; 129 dev->base_addr = pci_ioaddr;
130 dev->irq = pci_irq_line; 130 dev->irq = pci_irq_line;
131 dev->dma = 0; 131 dev->dma = 0;
132 132
133 printk("%s: %s\n", dev->name, cardinfo->name); 133 printk("%s: %s\n", dev->name, cardinfo->name);
134 printk("%s: IO: %#4lx IRQ: %d\n", 134 printk("%s: IO: %#4lx IRQ: %d\n",
135 dev->name, dev->base_addr, dev->irq); 135 dev->name, dev->base_addr, dev->irq);
136 136
137 tms_pci_read_eeprom(dev); 137 tms_pci_read_eeprom(dev);
138 138
139 printk("%s: Ring Station Address: %pM\n", 139 printk("%s: Ring Station Address: %pM\n",
140 dev->name, dev->dev_addr); 140 dev->name, dev->dev_addr);
141 141
142 ret = tmsdev_init(dev, &pdev->dev); 142 ret = tmsdev_init(dev, &pdev->dev);
143 if (ret) { 143 if (ret) {
144 printk("%s: unable to get memory for dev->priv.\n", dev->name); 144 printk("%s: unable to get memory for dev->priv.\n", dev->name);
145 goto err_out_irq; 145 goto err_out_irq;
146 } 146 }
147 147
148 tp = netdev_priv(dev); 148 tp = netdev_priv(dev);
149 tp->setnselout = tms_pci_setnselout_pins; 149 tp->setnselout = tms_pci_setnselout_pins;
150 150
151 tp->sifreadb = tms_pci_sifreadb; 151 tp->sifreadb = tms_pci_sifreadb;
152 tp->sifreadw = tms_pci_sifreadw; 152 tp->sifreadw = tms_pci_sifreadw;
153 tp->sifwriteb = tms_pci_sifwriteb; 153 tp->sifwriteb = tms_pci_sifwriteb;
154 tp->sifwritew = tms_pci_sifwritew; 154 tp->sifwritew = tms_pci_sifwritew;
155 155
156 memcpy(tp->ProductID, cardinfo->name, PROD_ID_SIZE + 1); 156 memcpy(tp->ProductID, cardinfo->name, PROD_ID_SIZE + 1);
157 157
158 tp->tmspriv = cardinfo; 158 tp->tmspriv = cardinfo;
159 159
160 dev->open = tms380tr_open; 160 dev->netdev_ops = &tms380tr_netdev_ops;
161 dev->stop = tms380tr_close; 161
162 pci_set_drvdata(pdev, dev); 162 pci_set_drvdata(pdev, dev);
163 SET_NETDEV_DEV(dev, &pdev->dev); 163 SET_NETDEV_DEV(dev, &pdev->dev);
164 164
165 ret = register_netdev(dev); 165 ret = register_netdev(dev);
166 if (ret) 166 if (ret)
167 goto err_out_tmsdev; 167 goto err_out_tmsdev;
168 168
169 return 0; 169 return 0;
170 170
171 err_out_tmsdev: 171 err_out_tmsdev:
172 pci_set_drvdata(pdev, NULL); 172 pci_set_drvdata(pdev, NULL);
173 tmsdev_term(dev); 173 tmsdev_term(dev);
174 err_out_irq: 174 err_out_irq:
175 free_irq(pdev->irq, dev); 175 free_irq(pdev->irq, dev);
176 err_out_region: 176 err_out_region:
177 release_region(pci_ioaddr, TMS_PCI_IO_EXTENT); 177 release_region(pci_ioaddr, TMS_PCI_IO_EXTENT);
178 err_out_trdev: 178 err_out_trdev:
179 free_netdev(dev); 179 free_netdev(dev);
180 return ret; 180 return ret;
181 } 181 }
182 182
183 /* 183 /*
184 * Reads MAC address from adapter RAM, which should've read it from 184 * Reads MAC address from adapter RAM, which should've read it from
185 * the onboard ROM. 185 * the onboard ROM.
186 * 186 *
187 * Calling this on a board that does not support it can be a very 187 * Calling this on a board that does not support it can be a very
188 * dangerous thing. The Madge board, for instance, will lock your 188 * dangerous thing. The Madge board, for instance, will lock your
189 * machine hard when this is called. Luckily, its supported in a 189 * machine hard when this is called. Luckily, its supported in a
190 * separate driver. --ASF 190 * separate driver. --ASF
191 */ 191 */
192 static void tms_pci_read_eeprom(struct net_device *dev) 192 static void tms_pci_read_eeprom(struct net_device *dev)
193 { 193 {
194 int i; 194 int i;
195 195
196 /* Address: 0000:0000 */ 196 /* Address: 0000:0000 */
197 tms_pci_sifwritew(dev, 0, SIFADX); 197 tms_pci_sifwritew(dev, 0, SIFADX);
198 tms_pci_sifwritew(dev, 0, SIFADR); 198 tms_pci_sifwritew(dev, 0, SIFADR);
199 199
200 /* Read six byte MAC address data */ 200 /* Read six byte MAC address data */
201 dev->addr_len = 6; 201 dev->addr_len = 6;
202 for(i = 0; i < 6; i++) 202 for(i = 0; i < 6; i++)
203 dev->dev_addr[i] = tms_pci_sifreadw(dev, SIFINC) >> 8; 203 dev->dev_addr[i] = tms_pci_sifreadw(dev, SIFINC) >> 8;
204 } 204 }
205 205
206 static unsigned short tms_pci_setnselout_pins(struct net_device *dev) 206 static unsigned short tms_pci_setnselout_pins(struct net_device *dev)
207 { 207 {
208 unsigned short val = 0; 208 unsigned short val = 0;
209 struct net_local *tp = netdev_priv(dev); 209 struct net_local *tp = netdev_priv(dev);
210 struct card_info *cardinfo = tp->tmspriv; 210 struct card_info *cardinfo = tp->tmspriv;
211 211
212 if(tp->DataRate == SPEED_4) 212 if(tp->DataRate == SPEED_4)
213 val |= cardinfo->nselout[0]; /* Set 4Mbps */ 213 val |= cardinfo->nselout[0]; /* Set 4Mbps */
214 else 214 else
215 val |= cardinfo->nselout[1]; /* Set 16Mbps */ 215 val |= cardinfo->nselout[1]; /* Set 16Mbps */
216 return val; 216 return val;
217 } 217 }
218 218
219 static void __devexit tms_pci_detach (struct pci_dev *pdev) 219 static void __devexit tms_pci_detach (struct pci_dev *pdev)
220 { 220 {
221 struct net_device *dev = pci_get_drvdata(pdev); 221 struct net_device *dev = pci_get_drvdata(pdev);
222 222
223 BUG_ON(!dev); 223 BUG_ON(!dev);
224 unregister_netdev(dev); 224 unregister_netdev(dev);
225 release_region(dev->base_addr, TMS_PCI_IO_EXTENT); 225 release_region(dev->base_addr, TMS_PCI_IO_EXTENT);
226 free_irq(dev->irq, dev); 226 free_irq(dev->irq, dev);
227 tmsdev_term(dev); 227 tmsdev_term(dev);
228 free_netdev(dev); 228 free_netdev(dev);
229 pci_set_drvdata(pdev, NULL); 229 pci_set_drvdata(pdev, NULL);
230 } 230 }
231 231
232 static struct pci_driver tms_pci_driver = { 232 static struct pci_driver tms_pci_driver = {
233 .name = "tmspci", 233 .name = "tmspci",
234 .id_table = tmspci_pci_tbl, 234 .id_table = tmspci_pci_tbl,
235 .probe = tms_pci_attach, 235 .probe = tms_pci_attach,
236 .remove = __devexit_p(tms_pci_detach), 236 .remove = __devexit_p(tms_pci_detach),
237 }; 237 };
238 238
239 static int __init tms_pci_init (void) 239 static int __init tms_pci_init (void)
240 { 240 {
241 return pci_register_driver(&tms_pci_driver); 241 return pci_register_driver(&tms_pci_driver);
242 } 242 }
243 243
244 static void __exit tms_pci_rmmod (void) 244 static void __exit tms_pci_rmmod (void)
245 { 245 {
246 pci_unregister_driver (&tms_pci_driver); 246 pci_unregister_driver (&tms_pci_driver);
247 } 247 }
248 248
249 module_init(tms_pci_init); 249 module_init(tms_pci_init);
250 module_exit(tms_pci_rmmod); 250 module_exit(tms_pci_rmmod);
251 251
252 252