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Commit f2c780c1fdbe5008c902c2d7e37242ac5e60f0b9

Authored by Sergei Shtylyov
Committed by Linus Torvalds
1 parent c52c17622e
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

[PATCH] Au1550/1200: add missing PSC #define's, make OSS driver use the proper ones 

Add missing PSC #define's required for the drivers using PSC on DBAu1550
board (also fixing Au1550 PSC3 address) and all Au1200-based boards as
well.  Make the OSS driver use the correct PSC definitions fo each board.

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Showing 3 changed files with 21 additions and 2 deletions Side-by-side Diff

include/asm-mips/mach-au1x00/au1xxx_psc.h
Diff comments   View file @ f2c780c
... ... @@ -39,9 +39,14 @@
39 39 #define PSC0_BASE_ADDR 0xb1a00000
40 40 #define PSC1_BASE_ADDR 0xb1b00000
41 41 #define PSC2_BASE_ADDR 0xb0a00000
42   -#define PSC3_BASE_ADDR 0xb0d00000
  42 +#define PSC3_BASE_ADDR 0xb0b00000
43 43 #endif
44 44  
  45 +#ifdef CONFIG_SOC_AU1200
  46 +#define PSC0_BASE_ADDR 0xb1a00000
  47 +#define PSC1_BASE_ADDR 0xb1b00000
  48 +#endif
  49 +
45 50 /* The PSC select and control registers are common to
46 51 * all protocols.
47 52 */
... ... @@ -227,6 +232,8 @@
227 232 #define PSC_I2SCFG_DD_DISABLE (1 << 27)
228 233 #define PSC_I2SCFG_DE_ENABLE (1 << 26)
229 234 #define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16)
  235 +#define PSC_I2SCFG_WS(n) ((n & 0xFF) << 16)
  236 +#define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F))
230 237 #define PSC_I2SCFG_WI (1 << 15)
231 238  
232 239 #define PSC_I2SCFG_DIV_MASK (3 << 13)
include/asm-mips/mach-db1x00/db1x00.h
Diff comments   View file @ f2c780c
... ... @@ -30,8 +30,20 @@
30 30  
31 31  
32 32 #ifdef CONFIG_MIPS_DB1550
  33 +
  34 +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
  35 +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
  36 +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX
  37 +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX
  38 +
  39 +#define SPI_PSC_BASE PSC0_BASE_ADDR
  40 +#define AC97_PSC_BASE PSC1_BASE_ADDR
  41 +#define SMBUS_PSC_BASE PSC2_BASE_ADDR
  42 +#define I2S_PSC_BASE PSC3_BASE_ADDR
  43 +
33 44 #define BCSR_KSEG1_ADDR 0xAF000000
34 45 #define NAND_PHYS_ADDR 0x20000000
  46 +
35 47 #else
36 48 #define BCSR_KSEG1_ADDR 0xAE000000
37 49 #endif
sound/oss/au1550_ac97.c
Diff comments   View file @ f2c780c
... ... @@ -57,9 +57,9 @@
57 57 #include <asm/io.h>
58 58 #include <asm/uaccess.h>
59 59 #include <asm/hardirq.h>
60   -#include <asm/mach-au1x00/au1000.h>
61 60 #include <asm/mach-au1x00/au1xxx_psc.h>
62 61 #include <asm/mach-au1x00/au1xxx_dbdma.h>
  62 +#include <asm/mach-au1x00/au1xxx.h>
63 63  
64 64 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
65 65