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Commit ff04715bd5171d6d5c4ddff40c7bdc8d2dc90f7d

Authored by Tejun Heo
Committed by Jeff Garzik
1 parent d127ea7b86
Exists in master and in 7 other branches imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-l5.0.0_1.0.0-ga

pata_via: clean up recent tf_load changes 

Commit bfce5e0179ad059035df28558724ff60af708e09 implemented custom
tf_load for pata_via.  This patch cleans it up a bit.

* Instead of duplicating whole body, copy tf and set ATA_TFLAG_DEVICE
  when necessary.

* Rename via_ata_tf_load() to via_tf_load().

* No need to set .tf_load in via_port_ops_noirq as it inherits from
  via_port_ops.

* Clean up indentation.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Joseph Chan <JosephChan@via.com.tw>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>

Showing 1 changed file with 11 additions and 48 deletions Inline Diff

drivers/ata/pata_via.c
Diff comments   View file @ ff04715
1 /* 1 /*
2 * pata_via.c - VIA PATA for new ATA layer 2 * pata_via.c - VIA PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc 3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com> 4 * Alan Cox <alan@redhat.com>
5 * 5 *
6 * Documentation 6 * Documentation
7 * Most chipset documentation available under NDA only 7 * Most chipset documentation available under NDA only
8 * 8 *
9 * VIA version guide 9 * VIA version guide
10 * VIA VT82C561 - early design, uses ata_generic currently 10 * VIA VT82C561 - early design, uses ata_generic currently
11 * VIA VT82C576 - MWDMA, 33Mhz 11 * VIA VT82C576 - MWDMA, 33Mhz
12 * VIA VT82C586 - MWDMA, 33Mhz 12 * VIA VT82C586 - MWDMA, 33Mhz
13 * VIA VT82C586a - Added UDMA to 33Mhz 13 * VIA VT82C586a - Added UDMA to 33Mhz
14 * VIA VT82C586b - UDMA33 14 * VIA VT82C586b - UDMA33
15 * VIA VT82C596a - Nonfunctional UDMA66 15 * VIA VT82C596a - Nonfunctional UDMA66
16 * VIA VT82C596b - Working UDMA66 16 * VIA VT82C596b - Working UDMA66
17 * VIA VT82C686 - Nonfunctional UDMA66 17 * VIA VT82C686 - Nonfunctional UDMA66
18 * VIA VT82C686a - Working UDMA66 18 * VIA VT82C686a - Working UDMA66
19 * VIA VT82C686b - Updated to UDMA100 19 * VIA VT82C686b - Updated to UDMA100
20 * VIA VT8231 - UDMA100 20 * VIA VT8231 - UDMA100
21 * VIA VT8233 - UDMA100 21 * VIA VT8233 - UDMA100
22 * VIA VT8233a - UDMA133 22 * VIA VT8233a - UDMA133
23 * VIA VT8233c - UDMA100 23 * VIA VT8233c - UDMA100
24 * VIA VT8235 - UDMA133 24 * VIA VT8235 - UDMA133
25 * VIA VT8237 - UDMA133 25 * VIA VT8237 - UDMA133
26 * VIA VT8237S - UDMA133 26 * VIA VT8237S - UDMA133
27 * VIA VT8251 - UDMA133 27 * VIA VT8251 - UDMA133
28 * 28 *
29 * Most registers remain compatible across chips. Others start reserved 29 * Most registers remain compatible across chips. Others start reserved
30 * and acquire sensible semantics if set to 1 (eg cable detect). A few 30 * and acquire sensible semantics if set to 1 (eg cable detect). A few
31 * exceptions exist, notably around the FIFO settings. 31 * exceptions exist, notably around the FIFO settings.
32 * 32 *
33 * One additional quirk of the VIA design is that like ALi they use few 33 * One additional quirk of the VIA design is that like ALi they use few
34 * PCI IDs for a lot of chips. 34 * PCI IDs for a lot of chips.
35 * 35 *
36 * Based heavily on: 36 * Based heavily on:
37 * 37 *
38 * Version 3.38 38 * Version 3.38
39 * 39 *
40 * VIA IDE driver for Linux. Supported southbridges: 40 * VIA IDE driver for Linux. Supported southbridges:
41 * 41 *
42 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b, 42 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
43 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a, 43 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
44 * vt8235, vt8237 44 * vt8235, vt8237
45 * 45 *
46 * Copyright (c) 2000-2002 Vojtech Pavlik 46 * Copyright (c) 2000-2002 Vojtech Pavlik
47 * 47 *
48 * Based on the work of: 48 * Based on the work of:
49 * Michel Aubry 49 * Michel Aubry
50 * Jeff Garzik 50 * Jeff Garzik
51 * Andre Hedrick 51 * Andre Hedrick
52 52
53 */ 53 */
54 54
55 #include <linux/kernel.h> 55 #include <linux/kernel.h>
56 #include <linux/module.h> 56 #include <linux/module.h>
57 #include <linux/pci.h> 57 #include <linux/pci.h>
58 #include <linux/init.h> 58 #include <linux/init.h>
59 #include <linux/blkdev.h> 59 #include <linux/blkdev.h>
60 #include <linux/delay.h> 60 #include <linux/delay.h>
61 #include <scsi/scsi_host.h> 61 #include <scsi/scsi_host.h>
62 #include <linux/libata.h> 62 #include <linux/libata.h>
63 #include <linux/dmi.h> 63 #include <linux/dmi.h>
64 64
65 #define DRV_NAME "pata_via" 65 #define DRV_NAME "pata_via"
66 #define DRV_VERSION "0.3.3" 66 #define DRV_VERSION "0.3.3"
67 67
68 /* 68 /*
69 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx 69 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
70 * driver. 70 * driver.
71 */ 71 */
72 72
73 enum { 73 enum {
74 VIA_UDMA = 0x007, 74 VIA_UDMA = 0x007,
75 VIA_UDMA_NONE = 0x000, 75 VIA_UDMA_NONE = 0x000,
76 VIA_UDMA_33 = 0x001, 76 VIA_UDMA_33 = 0x001,
77 VIA_UDMA_66 = 0x002, 77 VIA_UDMA_66 = 0x002,
78 VIA_UDMA_100 = 0x003, 78 VIA_UDMA_100 = 0x003,
79 VIA_UDMA_133 = 0x004, 79 VIA_UDMA_133 = 0x004,
80 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */ 80 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
81 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */ 81 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
82 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */ 82 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
83 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */ 83 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
84 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */ 84 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
85 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */ 85 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
86 VIA_NO_ENABLES = 0x400, /* Has no enablebits */ 86 VIA_NO_ENABLES = 0x400, /* Has no enablebits */
87 VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */ 87 VIA_SATA_PATA = 0x800, /* SATA/PATA combined configuration */
88 }; 88 };
89 89
90 /* 90 /*
91 * VIA SouthBridge chips. 91 * VIA SouthBridge chips.
92 */ 92 */
93 93
94 static const struct via_isa_bridge { 94 static const struct via_isa_bridge {
95 const char *name; 95 const char *name;
96 u16 id; 96 u16 id;
97 u8 rev_min; 97 u8 rev_min;
98 u8 rev_max; 98 u8 rev_max;
99 u16 flags; 99 u16 flags;
100 } via_isa_bridges[] = { 100 } via_isa_bridges[] = {
101 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 | 101 { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, VIA_UDMA_133 |
102 VIA_BAD_AST | VIA_SATA_PATA }, 102 VIA_BAD_AST | VIA_SATA_PATA },
103 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 103 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
104 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 104 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
105 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, 105 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
106 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES}, 106 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
107 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 107 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
108 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 108 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
109 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 109 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
110 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 110 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
111 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 }, 111 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
112 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 }, 112 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
113 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 }, 113 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
114 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 }, 114 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
115 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 }, 115 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
116 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, 116 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
117 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 }, 117 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
118 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 }, 118 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
119 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO }, 119 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
120 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ }, 120 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
121 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO }, 121 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
122 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO }, 122 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
123 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO }, 123 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
124 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK }, 124 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
125 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID }, 125 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
126 { NULL } 126 { NULL }
127 }; 127 };
128 128
129 129
130 /* 130 /*
131 * Cable special cases 131 * Cable special cases
132 */ 132 */
133 133
134 static const struct dmi_system_id cable_dmi_table[] = { 134 static const struct dmi_system_id cable_dmi_table[] = {
135 { 135 {
136 .ident = "Acer Ferrari 3400", 136 .ident = "Acer Ferrari 3400",
137 .matches = { 137 .matches = {
138 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."), 138 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
139 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"), 139 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
140 }, 140 },
141 }, 141 },
142 { } 142 { }
143 }; 143 };
144 144
145 static int via_cable_override(struct pci_dev *pdev) 145 static int via_cable_override(struct pci_dev *pdev)
146 { 146 {
147 /* Systems by DMI */ 147 /* Systems by DMI */
148 if (dmi_check_system(cable_dmi_table)) 148 if (dmi_check_system(cable_dmi_table))
149 return 1; 149 return 1;
150 /* Arima W730-K8/Targa Visionary 811/... */ 150 /* Arima W730-K8/Targa Visionary 811/... */
151 if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032) 151 if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
152 return 1; 152 return 1;
153 return 0; 153 return 0;
154 } 154 }
155 155
156 156
157 /** 157 /**
158 * via_cable_detect - cable detection 158 * via_cable_detect - cable detection
159 * @ap: ATA port 159 * @ap: ATA port
160 * 160 *
161 * Perform cable detection. Actually for the VIA case the BIOS 161 * Perform cable detection. Actually for the VIA case the BIOS
162 * already did this for us. We read the values provided by the 162 * already did this for us. We read the values provided by the
163 * BIOS. If you are using an 8235 in a non-PC configuration you 163 * BIOS. If you are using an 8235 in a non-PC configuration you
164 * may need to update this code. 164 * may need to update this code.
165 * 165 *
166 * Hotplug also impacts on this. 166 * Hotplug also impacts on this.
167 */ 167 */
168 168
169 static int via_cable_detect(struct ata_port *ap) { 169 static int via_cable_detect(struct ata_port *ap) {
170 const struct via_isa_bridge *config = ap->host->private_data; 170 const struct via_isa_bridge *config = ap->host->private_data;
171 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 171 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
172 u32 ata66; 172 u32 ata66;
173 173
174 if (via_cable_override(pdev)) 174 if (via_cable_override(pdev))
175 return ATA_CBL_PATA40_SHORT; 175 return ATA_CBL_PATA40_SHORT;
176 176
177 if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0) 177 if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
178 return ATA_CBL_SATA; 178 return ATA_CBL_SATA;
179 179
180 /* Early chips are 40 wire */ 180 /* Early chips are 40 wire */
181 if ((config->flags & VIA_UDMA) < VIA_UDMA_66) 181 if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
182 return ATA_CBL_PATA40; 182 return ATA_CBL_PATA40;
183 /* UDMA 66 chips have only drive side logic */ 183 /* UDMA 66 chips have only drive side logic */
184 else if ((config->flags & VIA_UDMA) < VIA_UDMA_100) 184 else if ((config->flags & VIA_UDMA) < VIA_UDMA_100)
185 return ATA_CBL_PATA_UNK; 185 return ATA_CBL_PATA_UNK;
186 /* UDMA 100 or later */ 186 /* UDMA 100 or later */
187 pci_read_config_dword(pdev, 0x50, &ata66); 187 pci_read_config_dword(pdev, 0x50, &ata66);
188 /* Check both the drive cable reporting bits, we might not have 188 /* Check both the drive cable reporting bits, we might not have
189 two drives */ 189 two drives */
190 if (ata66 & (0x10100000 >> (16 * ap->port_no))) 190 if (ata66 & (0x10100000 >> (16 * ap->port_no)))
191 return ATA_CBL_PATA80; 191 return ATA_CBL_PATA80;
192 /* Check with ACPI so we can spot BIOS reported SATA bridges */ 192 /* Check with ACPI so we can spot BIOS reported SATA bridges */
193 if (ata_acpi_init_gtm(ap) && 193 if (ata_acpi_init_gtm(ap) &&
194 ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap))) 194 ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap)))
195 return ATA_CBL_PATA80; 195 return ATA_CBL_PATA80;
196 return ATA_CBL_PATA40; 196 return ATA_CBL_PATA40;
197 } 197 }
198 198
199 static int via_pre_reset(struct ata_link *link, unsigned long deadline) 199 static int via_pre_reset(struct ata_link *link, unsigned long deadline)
200 { 200 {
201 struct ata_port *ap = link->ap; 201 struct ata_port *ap = link->ap;
202 const struct via_isa_bridge *config = ap->host->private_data; 202 const struct via_isa_bridge *config = ap->host->private_data;
203 203
204 if (!(config->flags & VIA_NO_ENABLES)) { 204 if (!(config->flags & VIA_NO_ENABLES)) {
205 static const struct pci_bits via_enable_bits[] = { 205 static const struct pci_bits via_enable_bits[] = {
206 { 0x40, 1, 0x02, 0x02 }, 206 { 0x40, 1, 0x02, 0x02 },
207 { 0x40, 1, 0x01, 0x01 } 207 { 0x40, 1, 0x01, 0x01 }
208 }; 208 };
209 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 209 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
210 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no])) 210 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
211 return -ENOENT; 211 return -ENOENT;
212 } 212 }
213 213
214 return ata_sff_prereset(link, deadline); 214 return ata_sff_prereset(link, deadline);
215 } 215 }
216 216
217 217
218 /** 218 /**
219 * via_do_set_mode - set initial PIO mode data 219 * via_do_set_mode - set initial PIO mode data
220 * @ap: ATA interface 220 * @ap: ATA interface
221 * @adev: ATA device 221 * @adev: ATA device
222 * @mode: ATA mode being programmed 222 * @mode: ATA mode being programmed
223 * @tdiv: Clocks per PCI clock 223 * @tdiv: Clocks per PCI clock
224 * @set_ast: Set to program address setup 224 * @set_ast: Set to program address setup
225 * @udma_type: UDMA mode/format of registers 225 * @udma_type: UDMA mode/format of registers
226 * 226 *
227 * Program the VIA registers for DMA and PIO modes. Uses the ata timing 227 * Program the VIA registers for DMA and PIO modes. Uses the ata timing
228 * support in order to compute modes. 228 * support in order to compute modes.
229 * 229 *
230 * FIXME: Hotplug will require we serialize multiple mode changes 230 * FIXME: Hotplug will require we serialize multiple mode changes
231 * on the two channels. 231 * on the two channels.
232 */ 232 */
233 233
234 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type) 234 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
235 { 235 {
236 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 236 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
237 struct ata_device *peer = ata_dev_pair(adev); 237 struct ata_device *peer = ata_dev_pair(adev);
238 struct ata_timing t, p; 238 struct ata_timing t, p;
239 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */ 239 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
240 unsigned long T = 1000000000 / via_clock; 240 unsigned long T = 1000000000 / via_clock;
241 unsigned long UT = T/tdiv; 241 unsigned long UT = T/tdiv;
242 int ut; 242 int ut;
243 int offset = 3 - (2*ap->port_no) - adev->devno; 243 int offset = 3 - (2*ap->port_no) - adev->devno;
244 244
245 /* Calculate the timing values we require */ 245 /* Calculate the timing values we require */
246 ata_timing_compute(adev, mode, &t, T, UT); 246 ata_timing_compute(adev, mode, &t, T, UT);
247 247
248 /* We share 8bit timing so we must merge the constraints */ 248 /* We share 8bit timing so we must merge the constraints */
249 if (peer) { 249 if (peer) {
250 if (peer->pio_mode) { 250 if (peer->pio_mode) {
251 ata_timing_compute(peer, peer->pio_mode, &p, T, UT); 251 ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
252 ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT); 252 ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
253 } 253 }
254 } 254 }
255 255
256 /* Address setup is programmable but breaks on UDMA133 setups */ 256 /* Address setup is programmable but breaks on UDMA133 setups */
257 if (set_ast) { 257 if (set_ast) {
258 u8 setup; /* 2 bits per drive */ 258 u8 setup; /* 2 bits per drive */
259 int shift = 2 * offset; 259 int shift = 2 * offset;
260 260
261 pci_read_config_byte(pdev, 0x4C, &setup); 261 pci_read_config_byte(pdev, 0x4C, &setup);
262 setup &= ~(3 << shift); 262 setup &= ~(3 << shift);
263 setup |= clamp_val(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */ 263 setup |= clamp_val(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
264 pci_write_config_byte(pdev, 0x4C, setup); 264 pci_write_config_byte(pdev, 0x4C, setup);
265 } 265 }
266 266
267 /* Load the PIO mode bits */ 267 /* Load the PIO mode bits */
268 pci_write_config_byte(pdev, 0x4F - ap->port_no, 268 pci_write_config_byte(pdev, 0x4F - ap->port_no,
269 ((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1)); 269 ((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1));
270 pci_write_config_byte(pdev, 0x48 + offset, 270 pci_write_config_byte(pdev, 0x48 + offset,
271 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1)); 271 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
272 272
273 /* Load the UDMA bits according to type */ 273 /* Load the UDMA bits according to type */
274 switch(udma_type) { 274 switch(udma_type) {
275 default: 275 default:
276 /* BUG() ? */ 276 /* BUG() ? */
277 /* fall through */ 277 /* fall through */
278 case 33: 278 case 33:
279 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03; 279 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
280 break; 280 break;
281 case 66: 281 case 66:
282 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f; 282 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
283 break; 283 break;
284 case 100: 284 case 100:
285 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; 285 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
286 break; 286 break;
287 case 133: 287 case 133:
288 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; 288 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
289 break; 289 break;
290 } 290 }
291 291
292 /* Set UDMA unless device is not UDMA capable */ 292 /* Set UDMA unless device is not UDMA capable */
293 if (udma_type && t.udma) { 293 if (udma_type && t.udma) {
294 u8 cable80_status; 294 u8 cable80_status;
295 295
296 /* Get 80-wire cable detection bit */ 296 /* Get 80-wire cable detection bit */
297 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status); 297 pci_read_config_byte(pdev, 0x50 + offset, &cable80_status);
298 cable80_status &= 0x10; 298 cable80_status &= 0x10;
299 299
300 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status); 300 pci_write_config_byte(pdev, 0x50 + offset, ut | cable80_status);
301 } 301 }
302 } 302 }
303 303
304 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev) 304 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
305 { 305 {
306 const struct via_isa_bridge *config = ap->host->private_data; 306 const struct via_isa_bridge *config = ap->host->private_data;
307 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1; 307 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
308 int mode = config->flags & VIA_UDMA; 308 int mode = config->flags & VIA_UDMA;
309 static u8 tclock[5] = { 1, 1, 2, 3, 4 }; 309 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
310 static u8 udma[5] = { 0, 33, 66, 100, 133 }; 310 static u8 udma[5] = { 0, 33, 66, 100, 133 };
311 311
312 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]); 312 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
313 } 313 }
314 314
315 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev) 315 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
316 { 316 {
317 const struct via_isa_bridge *config = ap->host->private_data; 317 const struct via_isa_bridge *config = ap->host->private_data;
318 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1; 318 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
319 int mode = config->flags & VIA_UDMA; 319 int mode = config->flags & VIA_UDMA;
320 static u8 tclock[5] = { 1, 1, 2, 3, 4 }; 320 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
321 static u8 udma[5] = { 0, 33, 66, 100, 133 }; 321 static u8 udma[5] = { 0, 33, 66, 100, 133 };
322 322
323 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]); 323 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
324 } 324 }
325 325
326 /** 326 /**
327 * via_ata_sff_tf_load - send taskfile registers to host controller 327 * via_tf_load - send taskfile registers to host controller
328 * @ap: Port to which output is sent 328 * @ap: Port to which output is sent
329 * @tf: ATA taskfile register set 329 * @tf: ATA taskfile register set
330 * 330 *
331 * Outputs ATA taskfile to standard ATA host controller. 331 * Outputs ATA taskfile to standard ATA host controller.
332 * 332 *
333 * Note: This is to fix the internal bug of via chipsets, which 333 * Note: This is to fix the internal bug of via chipsets, which
334 * will reset the device register after changing the IEN bit on 334 * will reset the device register after changing the IEN bit on
335 * ctl register 335 * ctl register
336 */ 336 */
337 static void via_ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf) 337 static void via_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
338 { 338 {
339 struct ata_ioports *ioaddr = &ap->ioaddr; 339 struct ata_taskfile tmp_tf;
340 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
341 340
342 if (tf->ctl != ap->last_ctl) { 341 if (ap->ctl != ap->last_ctl && !(tf->flags & ATA_TFLAG_DEVICE)) {
343 iowrite8(tf->ctl, ioaddr->ctl_addr); 342 tmp_tf = *tf;
344 iowrite8(tf->device, ioaddr->device_addr); 343 tmp_tf.flags |= ATA_TFLAG_DEVICE;
345 ap->last_ctl = tf->ctl; 344 tf = &tmp_tf;
346 ata_wait_idle(ap);
347 } 345 }
348 346 ata_sff_tf_load(ap, tf);
349 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
350 iowrite8(tf->hob_feature, ioaddr->feature_addr);
351 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
352 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
353 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
354 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
355 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
356 tf->hob_feature,
357 tf->hob_nsect,
358 tf->hob_lbal,
359 tf->hob_lbam,
360 tf->hob_lbah);
361 }
362
363 if (is_addr) {
364 iowrite8(tf->feature, ioaddr->feature_addr);
365 iowrite8(tf->nsect, ioaddr->nsect_addr);
366 iowrite8(tf->lbal, ioaddr->lbal_addr);
367 iowrite8(tf->lbam, ioaddr->lbam_addr);
368 iowrite8(tf->lbah, ioaddr->lbah_addr);
369 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
370 tf->feature,
371 tf->nsect,
372 tf->lbal,
373 tf->lbam,
374 tf->lbah);
375 }
376
377 if (tf->flags & ATA_TFLAG_DEVICE) {
378 iowrite8(tf->device, ioaddr->device_addr);
379 VPRINTK("device 0x%X\n", tf->device);
380 }
381
382 ata_wait_idle(ap);
383 } 347 }
384 348
385 static struct scsi_host_template via_sht = { 349 static struct scsi_host_template via_sht = {
386 ATA_BMDMA_SHT(DRV_NAME), 350 ATA_BMDMA_SHT(DRV_NAME),
387 }; 351 };
388 352
389 static struct ata_port_operations via_port_ops = { 353 static struct ata_port_operations via_port_ops = {
390 .inherits = &ata_bmdma_port_ops, 354 .inherits = &ata_bmdma_port_ops,
391 .cable_detect = via_cable_detect, 355 .cable_detect = via_cable_detect,
392 .set_piomode = via_set_piomode, 356 .set_piomode = via_set_piomode,
393 .set_dmamode = via_set_dmamode, 357 .set_dmamode = via_set_dmamode,
394 .prereset = via_pre_reset, 358 .prereset = via_pre_reset,
395 .sff_tf_load = via_ata_tf_load, 359 .sff_tf_load = via_tf_load,
396 }; 360 };
397 361
398 static struct ata_port_operations via_port_ops_noirq = { 362 static struct ata_port_operations via_port_ops_noirq = {
399 .inherits = &via_port_ops, 363 .inherits = &via_port_ops,
400 .sff_data_xfer = ata_sff_data_xfer_noirq, 364 .sff_data_xfer = ata_sff_data_xfer_noirq,
401 .sff_tf_load = via_ata_tf_load,
402 }; 365 };
403 366
404 /** 367 /**
405 * via_config_fifo - set up the FIFO 368 * via_config_fifo - set up the FIFO
406 * @pdev: PCI device 369 * @pdev: PCI device
407 * @flags: configuration flags 370 * @flags: configuration flags
408 * 371 *
409 * Set the FIFO properties for this device if necessary. Used both on 372 * Set the FIFO properties for this device if necessary. Used both on
410 * set up and on and the resume path 373 * set up and on and the resume path
411 */ 374 */
412 375
413 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags) 376 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
414 { 377 {
415 u8 enable; 378 u8 enable;
416 379
417 /* 0x40 low bits indicate enabled channels */ 380 /* 0x40 low bits indicate enabled channels */
418 pci_read_config_byte(pdev, 0x40 , &enable); 381 pci_read_config_byte(pdev, 0x40 , &enable);
419 enable &= 3; 382 enable &= 3;
420 383
421 if (flags & VIA_SET_FIFO) { 384 if (flags & VIA_SET_FIFO) {
422 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20}; 385 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
423 u8 fifo; 386 u8 fifo;
424 387
425 pci_read_config_byte(pdev, 0x43, &fifo); 388 pci_read_config_byte(pdev, 0x43, &fifo);
426 389
427 /* Clear PREQ# until DDACK# for errata */ 390 /* Clear PREQ# until DDACK# for errata */
428 if (flags & VIA_BAD_PREQ) 391 if (flags & VIA_BAD_PREQ)
429 fifo &= 0x7F; 392 fifo &= 0x7F;
430 else 393 else
431 fifo &= 0x9f; 394 fifo &= 0x9f;
432 /* Turn on FIFO for enabled channels */ 395 /* Turn on FIFO for enabled channels */
433 fifo |= fifo_setting[enable]; 396 fifo |= fifo_setting[enable];
434 pci_write_config_byte(pdev, 0x43, fifo); 397 pci_write_config_byte(pdev, 0x43, fifo);
435 } 398 }
436 } 399 }
437 400
438 /** 401 /**
439 * via_init_one - discovery callback 402 * via_init_one - discovery callback
440 * @pdev: PCI device 403 * @pdev: PCI device
441 * @id: PCI table info 404 * @id: PCI table info
442 * 405 *
443 * A VIA IDE interface has been discovered. Figure out what revision 406 * A VIA IDE interface has been discovered. Figure out what revision
444 * and perform configuration work before handing it to the ATA layer 407 * and perform configuration work before handing it to the ATA layer
445 */ 408 */
446 409
447 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id) 410 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
448 { 411 {
449 /* Early VIA without UDMA support */ 412 /* Early VIA without UDMA support */
450 static const struct ata_port_info via_mwdma_info = { 413 static const struct ata_port_info via_mwdma_info = {
451 .flags = ATA_FLAG_SLAVE_POSS, 414 .flags = ATA_FLAG_SLAVE_POSS,
452 .pio_mask = 0x1f, 415 .pio_mask = 0x1f,
453 .mwdma_mask = 0x07, 416 .mwdma_mask = 0x07,
454 .port_ops = &via_port_ops 417 .port_ops = &via_port_ops
455 }; 418 };
456 /* Ditto with IRQ masking required */ 419 /* Ditto with IRQ masking required */
457 static const struct ata_port_info via_mwdma_info_borked = { 420 static const struct ata_port_info via_mwdma_info_borked = {
458 .flags = ATA_FLAG_SLAVE_POSS, 421 .flags = ATA_FLAG_SLAVE_POSS,
459 .pio_mask = 0x1f, 422 .pio_mask = 0x1f,
460 .mwdma_mask = 0x07, 423 .mwdma_mask = 0x07,
461 .port_ops = &via_port_ops_noirq, 424 .port_ops = &via_port_ops_noirq,
462 }; 425 };
463 /* VIA UDMA 33 devices (and borked 66) */ 426 /* VIA UDMA 33 devices (and borked 66) */
464 static const struct ata_port_info via_udma33_info = { 427 static const struct ata_port_info via_udma33_info = {
465 .flags = ATA_FLAG_SLAVE_POSS, 428 .flags = ATA_FLAG_SLAVE_POSS,
466 .pio_mask = 0x1f, 429 .pio_mask = 0x1f,
467 .mwdma_mask = 0x07, 430 .mwdma_mask = 0x07,
468 .udma_mask = ATA_UDMA2, 431 .udma_mask = ATA_UDMA2,
469 .port_ops = &via_port_ops 432 .port_ops = &via_port_ops
470 }; 433 };
471 /* VIA UDMA 66 devices */ 434 /* VIA UDMA 66 devices */
472 static const struct ata_port_info via_udma66_info = { 435 static const struct ata_port_info via_udma66_info = {
473 .flags = ATA_FLAG_SLAVE_POSS, 436 .flags = ATA_FLAG_SLAVE_POSS,
474 .pio_mask = 0x1f, 437 .pio_mask = 0x1f,
475 .mwdma_mask = 0x07, 438 .mwdma_mask = 0x07,
476 .udma_mask = ATA_UDMA4, 439 .udma_mask = ATA_UDMA4,
477 .port_ops = &via_port_ops 440 .port_ops = &via_port_ops
478 }; 441 };
479 /* VIA UDMA 100 devices */ 442 /* VIA UDMA 100 devices */
480 static const struct ata_port_info via_udma100_info = { 443 static const struct ata_port_info via_udma100_info = {
481 .flags = ATA_FLAG_SLAVE_POSS, 444 .flags = ATA_FLAG_SLAVE_POSS,
482 .pio_mask = 0x1f, 445 .pio_mask = 0x1f,
483 .mwdma_mask = 0x07, 446 .mwdma_mask = 0x07,
484 .udma_mask = ATA_UDMA5, 447 .udma_mask = ATA_UDMA5,
485 .port_ops = &via_port_ops 448 .port_ops = &via_port_ops
486 }; 449 };
487 /* UDMA133 with bad AST (All current 133) */ 450 /* UDMA133 with bad AST (All current 133) */
488 static const struct ata_port_info via_udma133_info = { 451 static const struct ata_port_info via_udma133_info = {
489 .flags = ATA_FLAG_SLAVE_POSS, 452 .flags = ATA_FLAG_SLAVE_POSS,
490 .pio_mask = 0x1f, 453 .pio_mask = 0x1f,
491 .mwdma_mask = 0x07, 454 .mwdma_mask = 0x07,
492 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */ 455 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
493 .port_ops = &via_port_ops 456 .port_ops = &via_port_ops
494 }; 457 };
495 const struct ata_port_info *ppi[] = { NULL, NULL }; 458 const struct ata_port_info *ppi[] = { NULL, NULL };
496 struct pci_dev *isa = NULL; 459 struct pci_dev *isa = NULL;
497 const struct via_isa_bridge *config; 460 const struct via_isa_bridge *config;
498 static int printed_version; 461 static int printed_version;
499 u8 enable; 462 u8 enable;
500 u32 timing; 463 u32 timing;
501 int rc; 464 int rc;
502 465
503 if (!printed_version++) 466 if (!printed_version++)
504 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); 467 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
505 468
506 rc = pcim_enable_device(pdev); 469 rc = pcim_enable_device(pdev);
507 if (rc) 470 if (rc)
508 return rc; 471 return rc;
509 472
510 /* To find out how the IDE will behave and what features we 473 /* To find out how the IDE will behave and what features we
511 actually have to look at the bridge not the IDE controller */ 474 actually have to look at the bridge not the IDE controller */
512 for (config = via_isa_bridges; config->id; config++) 475 for (config = via_isa_bridges; config->id; config++)
513 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA + 476 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
514 !!(config->flags & VIA_BAD_ID), 477 !!(config->flags & VIA_BAD_ID),
515 config->id, NULL))) { 478 config->id, NULL))) {
516 479
517 if (isa->revision >= config->rev_min && 480 if (isa->revision >= config->rev_min &&
518 isa->revision <= config->rev_max) 481 isa->revision <= config->rev_max)
519 break; 482 break;
520 pci_dev_put(isa); 483 pci_dev_put(isa);
521 } 484 }
522 485
523 if (!config->id) { 486 if (!config->id) {
524 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n"); 487 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
525 return -ENODEV; 488 return -ENODEV;
526 } 489 }
527 pci_dev_put(isa); 490 pci_dev_put(isa);
528 491
529 if (!(config->flags & VIA_NO_ENABLES)) { 492 if (!(config->flags & VIA_NO_ENABLES)) {
530 /* 0x40 low bits indicate enabled channels */ 493 /* 0x40 low bits indicate enabled channels */
531 pci_read_config_byte(pdev, 0x40 , &enable); 494 pci_read_config_byte(pdev, 0x40 , &enable);
532 enable &= 3; 495 enable &= 3;
533 if (enable == 0) 496 if (enable == 0)
534 return -ENODEV; 497 return -ENODEV;
535 } 498 }
536 499
537 /* Initialise the FIFO for the enabled channels. */ 500 /* Initialise the FIFO for the enabled channels. */
538 via_config_fifo(pdev, config->flags); 501 via_config_fifo(pdev, config->flags);
539 502
540 /* Clock set up */ 503 /* Clock set up */
541 switch(config->flags & VIA_UDMA) { 504 switch(config->flags & VIA_UDMA) {
542 case VIA_UDMA_NONE: 505 case VIA_UDMA_NONE:
543 if (config->flags & VIA_NO_UNMASK) 506 if (config->flags & VIA_NO_UNMASK)
544 ppi[0] = &via_mwdma_info_borked; 507 ppi[0] = &via_mwdma_info_borked;
545 else 508 else
546 ppi[0] = &via_mwdma_info; 509 ppi[0] = &via_mwdma_info;
547 break; 510 break;
548 case VIA_UDMA_33: 511 case VIA_UDMA_33:
549 ppi[0] = &via_udma33_info; 512 ppi[0] = &via_udma33_info;
550 break; 513 break;
551 case VIA_UDMA_66: 514 case VIA_UDMA_66:
552 ppi[0] = &via_udma66_info; 515 ppi[0] = &via_udma66_info;
553 /* The 66 MHz devices require we enable the clock */ 516 /* The 66 MHz devices require we enable the clock */
554 pci_read_config_dword(pdev, 0x50, &timing); 517 pci_read_config_dword(pdev, 0x50, &timing);
555 timing |= 0x80008; 518 timing |= 0x80008;
556 pci_write_config_dword(pdev, 0x50, timing); 519 pci_write_config_dword(pdev, 0x50, timing);
557 break; 520 break;
558 case VIA_UDMA_100: 521 case VIA_UDMA_100:
559 ppi[0] = &via_udma100_info; 522 ppi[0] = &via_udma100_info;
560 break; 523 break;
561 case VIA_UDMA_133: 524 case VIA_UDMA_133:
562 ppi[0] = &via_udma133_info; 525 ppi[0] = &via_udma133_info;
563 break; 526 break;
564 default: 527 default:
565 WARN_ON(1); 528 WARN_ON(1);
566 return -ENODEV; 529 return -ENODEV;
567 } 530 }
568 531
569 if (config->flags & VIA_BAD_CLK66) { 532 if (config->flags & VIA_BAD_CLK66) {
570 /* Disable the 66MHz clock on problem devices */ 533 /* Disable the 66MHz clock on problem devices */
571 pci_read_config_dword(pdev, 0x50, &timing); 534 pci_read_config_dword(pdev, 0x50, &timing);
572 timing &= ~0x80008; 535 timing &= ~0x80008;
573 pci_write_config_dword(pdev, 0x50, timing); 536 pci_write_config_dword(pdev, 0x50, timing);
574 } 537 }
575 538
576 /* We have established the device type, now fire it up */ 539 /* We have established the device type, now fire it up */
577 return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config); 540 return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config);
578 } 541 }
579 542
580 #ifdef CONFIG_PM 543 #ifdef CONFIG_PM
581 /** 544 /**
582 * via_reinit_one - reinit after resume 545 * via_reinit_one - reinit after resume
583 * @pdev; PCI device 546 * @pdev; PCI device
584 * 547 *
585 * Called when the VIA PATA device is resumed. We must then 548 * Called when the VIA PATA device is resumed. We must then
586 * reconfigure the fifo and other setup we may have altered. In 549 * reconfigure the fifo and other setup we may have altered. In
587 * addition the kernel needs to have the resume methods on PCI 550 * addition the kernel needs to have the resume methods on PCI
588 * quirk supported. 551 * quirk supported.
589 */ 552 */
590 553
591 static int via_reinit_one(struct pci_dev *pdev) 554 static int via_reinit_one(struct pci_dev *pdev)
592 { 555 {
593 u32 timing; 556 u32 timing;
594 struct ata_host *host = dev_get_drvdata(&pdev->dev); 557 struct ata_host *host = dev_get_drvdata(&pdev->dev);
595 const struct via_isa_bridge *config = host->private_data; 558 const struct via_isa_bridge *config = host->private_data;
596 int rc; 559 int rc;
597 560
598 rc = ata_pci_device_do_resume(pdev); 561 rc = ata_pci_device_do_resume(pdev);
599 if (rc) 562 if (rc)
600 return rc; 563 return rc;
601 564
602 via_config_fifo(pdev, config->flags); 565 via_config_fifo(pdev, config->flags);
603 566
604 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) { 567 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
605 /* The 66 MHz devices require we enable the clock */ 568 /* The 66 MHz devices require we enable the clock */
606 pci_read_config_dword(pdev, 0x50, &timing); 569 pci_read_config_dword(pdev, 0x50, &timing);
607 timing |= 0x80008; 570 timing |= 0x80008;
608 pci_write_config_dword(pdev, 0x50, timing); 571 pci_write_config_dword(pdev, 0x50, timing);
609 } 572 }
610 if (config->flags & VIA_BAD_CLK66) { 573 if (config->flags & VIA_BAD_CLK66) {
611 /* Disable the 66MHz clock on problem devices */ 574 /* Disable the 66MHz clock on problem devices */
612 pci_read_config_dword(pdev, 0x50, &timing); 575 pci_read_config_dword(pdev, 0x50, &timing);
613 timing &= ~0x80008; 576 timing &= ~0x80008;
614 pci_write_config_dword(pdev, 0x50, timing); 577 pci_write_config_dword(pdev, 0x50, timing);
615 } 578 }
616 579
617 ata_host_resume(host); 580 ata_host_resume(host);
618 return 0; 581 return 0;
619 } 582 }
620 #endif 583 #endif
621 584
622 static const struct pci_device_id via[] = { 585 static const struct pci_device_id via[] = {
623 { PCI_VDEVICE(VIA, 0x0571), }, 586 { PCI_VDEVICE(VIA, 0x0571), },
624 { PCI_VDEVICE(VIA, 0x0581), }, 587 { PCI_VDEVICE(VIA, 0x0581), },
625 { PCI_VDEVICE(VIA, 0x1571), }, 588 { PCI_VDEVICE(VIA, 0x1571), },
626 { PCI_VDEVICE(VIA, 0x3164), }, 589 { PCI_VDEVICE(VIA, 0x3164), },
627 { PCI_VDEVICE(VIA, 0x5324), }, 590 { PCI_VDEVICE(VIA, 0x5324), },
628 591
629 { }, 592 { },
630 }; 593 };
631 594
632 static struct pci_driver via_pci_driver = { 595 static struct pci_driver via_pci_driver = {
633 .name = DRV_NAME, 596 .name = DRV_NAME,
634 .id_table = via, 597 .id_table = via,
635 .probe = via_init_one, 598 .probe = via_init_one,
636 .remove = ata_pci_remove_one, 599 .remove = ata_pci_remove_one,
637 #ifdef CONFIG_PM 600 #ifdef CONFIG_PM
638 .suspend = ata_pci_device_suspend, 601 .suspend = ata_pci_device_suspend,
639 .resume = via_reinit_one, 602 .resume = via_reinit_one,
640 #endif 603 #endif
641 }; 604 };
642 605
643 static int __init via_init(void) 606 static int __init via_init(void)
644 { 607 {
645 return pci_register_driver(&via_pci_driver); 608 return pci_register_driver(&via_pci_driver);
646 } 609 }
647 610
648 static void __exit via_exit(void) 611 static void __exit via_exit(void)
649 { 612 {
650 pci_unregister_driver(&via_pci_driver); 613 pci_unregister_driver(&via_pci_driver);
651 } 614 }
652 615
653 MODULE_AUTHOR("Alan Cox"); 616 MODULE_AUTHOR("Alan Cox");
654 MODULE_DESCRIPTION("low-level driver for VIA PATA"); 617 MODULE_DESCRIPTION("low-level driver for VIA PATA");
655 MODULE_LICENSE("GPL"); 618 MODULE_LICENSE("GPL");
656 MODULE_DEVICE_TABLE(pci, via); 619 MODULE_DEVICE_TABLE(pci, via);
657 MODULE_VERSION(DRV_VERSION); 620 MODULE_VERSION(DRV_VERSION);
658 621
659 module_init(via_init); 622 module_init(via_init);
660 module_exit(via_exit); 623 module_exit(via_exit);
661 624