Eric Lee / linux-smarc-t335x-v3.2

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Commit 4a3f8913f5f89039d97acdd8f896a31ee60a7c78

Authored by Nishanth Menon
Committed by Afzal Mohammed
1 parent 866c74bf7d
Exists in master

OMAP3+: OPP: add clock and voltagedomain info 

With hwmods, ideally, we should have been able to do:
pdm = omap_hwmod_get_pwrdm(oh);
voltdm = pwrdm_get_voltdm(pdm);
clk = clk_get(oh->main_clk);

Unfortunately hwmod database is'nt mature enough yet to handle
silicon variance within the same family, e.g. 4430 Vs 4460.
So we explicitly map the domain and clk names within the OPP
entries. This allows us to scale by having a central location for
the registration.

IMPORTANT NOTE: we probably will need to fix core and iva clk
setting.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
[vaibhav.bedia@ti.com: Pull in for AM33xx]
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>

Showing 3 changed files with 37 additions and 33 deletions Side-by-side Diff

arch/arm/mach-omap2/omap_opp_data.h
Diff comments   View file @ 4a3f891
... ... @@ -49,6 +49,8 @@
49 49 */
50 50 struct omap_opp_def {
51 51 char *hwmod_name;
  52 + char *voltdm_name;
  53 + char *clk_name;
52 54  
53 55 unsigned long freq;
54 56 unsigned long u_volt;
55 57  
... ... @@ -59,9 +61,11 @@
59 61 /*
60 62 * Initialization wrapper used to define an OPP for OMAP variants.
61 63 */
62   -#define OPP_INITIALIZER(_hwmod_name, _enabled, _freq, _uv) \
  64 +#define OPP_INITIALIZER(_hwmod_name, _clk_name, _voltdm_name, _enabled, _freq, _uv) \
63 65 { \
64 66 .hwmod_name = _hwmod_name, \
  67 + .clk_name = _clk_name, \
  68 + .voltdm_name = _voltdm_name, \
65 69 .default_available = _enabled, \
66 70 .freq = _freq, \
67 71 .u_volt = _uv, \
arch/arm/mach-omap2/opp3xxx_data.c
Diff comments   View file @ 4a3f891
... ... @@ -107,15 +107,15 @@
107 107  
108 108 static struct omap_opp_def __initdata omap34xx_opp_def_list[] = {
109 109 /* MPU OPP1 */
110   - OPP_INITIALIZER("mpu", true, 125000000, OMAP3430_VDD_MPU_OPP1_UV),
  110 + OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 125000000, OMAP3430_VDD_MPU_OPP1_UV),
111 111 /* MPU OPP2 */
112   - OPP_INITIALIZER("mpu", true, 250000000, OMAP3430_VDD_MPU_OPP2_UV),
  112 + OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 250000000, OMAP3430_VDD_MPU_OPP2_UV),
113 113 /* MPU OPP3 */
114   - OPP_INITIALIZER("mpu", true, 500000000, OMAP3430_VDD_MPU_OPP3_UV),
  114 + OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 500000000, OMAP3430_VDD_MPU_OPP3_UV),
115 115 /* MPU OPP4 */
116   - OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV),
  116 + OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV),
117 117 /* MPU OPP5 */
118   - OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV),
  118 + OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV),
119 119  
120 120 /*
121 121 * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
122 122  
123 123  
124 124  
125 125  
126 126  
127 127  
128 128  
129 129  
130 130  
131 131  
132 132  
133 133  
134 134  
135 135  
136 136  
137 137  
138 138  
... ... @@ -125,47 +125,47 @@
125 125 * impact that frequency will do to the MPU and the whole system in
126 126 * general.
127 127 */
128   - OPP_INITIALIZER("l3_main", false, 41500000, OMAP3430_VDD_CORE_OPP1_UV),
  128 + OPP_INITIALIZER("l3_main", "dpll3_ck", "core", false, 41500000, OMAP3430_VDD_CORE_OPP1_UV),
129 129 /* L3 OPP2 */
130   - OPP_INITIALIZER("l3_main", true, 83000000, OMAP3430_VDD_CORE_OPP2_UV),
  130 + OPP_INITIALIZER("l3_main", "dpll3_ck", "core", true, 83000000, OMAP3430_VDD_CORE_OPP2_UV),
131 131 /* L3 OPP3 */
132   - OPP_INITIALIZER("l3_main", true, 166000000, OMAP3430_VDD_CORE_OPP3_UV),
  132 + OPP_INITIALIZER("l3_main", "dpll3_ck", "core", true, 166000000, OMAP3430_VDD_CORE_OPP3_UV),
133 133  
134 134 /* DSP OPP1 */
135   - OPP_INITIALIZER("iva", true, 90000000, OMAP3430_VDD_MPU_OPP1_UV),
  135 + OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 90000000, OMAP3430_VDD_MPU_OPP1_UV),
136 136 /* DSP OPP2 */
137   - OPP_INITIALIZER("iva", true, 180000000, OMAP3430_VDD_MPU_OPP2_UV),
  137 + OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 180000000, OMAP3430_VDD_MPU_OPP2_UV),
138 138 /* DSP OPP3 */
139   - OPP_INITIALIZER("iva", true, 360000000, OMAP3430_VDD_MPU_OPP3_UV),
  139 + OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 360000000, OMAP3430_VDD_MPU_OPP3_UV),
140 140 /* DSP OPP4 */
141   - OPP_INITIALIZER("iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV),
  141 + OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV),
142 142 /* DSP OPP5 */
143   - OPP_INITIALIZER("iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV),
  143 + OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV),
144 144 };
145 145  
146 146 static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {
147 147 /* MPU OPP1 - OPP50 */
148   - OPP_INITIALIZER("mpu", true, 300000000, OMAP3630_VDD_MPU_OPP50_UV),
  148 + OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 300000000, OMAP3630_VDD_MPU_OPP50_UV),
149 149 /* MPU OPP2 - OPP100 */
150   - OPP_INITIALIZER("mpu", true, 600000000, OMAP3630_VDD_MPU_OPP100_UV),
  150 + OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", true, 600000000, OMAP3630_VDD_MPU_OPP100_UV),
151 151 /* MPU OPP3 - OPP-Turbo */
152   - OPP_INITIALIZER("mpu", false, 800000000, OMAP3630_VDD_MPU_OPP120_UV),
  152 + OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", false, 800000000, OMAP3630_VDD_MPU_OPP120_UV),
153 153 /* MPU OPP4 - OPP-SB */
154   - OPP_INITIALIZER("mpu", false, 1000000000, OMAP3630_VDD_MPU_OPP1G_UV),
  154 + OPP_INITIALIZER("mpu", "dpll1_ck", "mpu_iva", false, 1000000000, OMAP3630_VDD_MPU_OPP1G_UV),
155 155  
156 156 /* L3 OPP1 - OPP50 */
157   - OPP_INITIALIZER("l3_main", true, 100000000, OMAP3630_VDD_CORE_OPP50_UV),
  157 + OPP_INITIALIZER("l3_main", "dpll3_ck", "core", true, 100000000, OMAP3630_VDD_CORE_OPP50_UV),
158 158 /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
159   - OPP_INITIALIZER("l3_main", true, 200000000, OMAP3630_VDD_CORE_OPP100_UV),
  159 + OPP_INITIALIZER("l3_main", "dpll3_ck", "core", true, 200000000, OMAP3630_VDD_CORE_OPP100_UV),
160 160  
161 161 /* DSP OPP1 - OPP50 */
162   - OPP_INITIALIZER("iva", true, 260000000, OMAP3630_VDD_MPU_OPP50_UV),
  162 + OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 260000000, OMAP3630_VDD_MPU_OPP50_UV),
163 163 /* DSP OPP2 - OPP100 */
164   - OPP_INITIALIZER("iva", true, 520000000, OMAP3630_VDD_MPU_OPP100_UV),
  164 + OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", true, 520000000, OMAP3630_VDD_MPU_OPP100_UV),
165 165 /* DSP OPP3 - OPP-Turbo */
166   - OPP_INITIALIZER("iva", false, 660000000, OMAP3630_VDD_MPU_OPP120_UV),
  166 + OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", false, 660000000, OMAP3630_VDD_MPU_OPP120_UV),
167 167 /* DSP OPP4 - OPP-SB */
168   - OPP_INITIALIZER("iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV),
  168 + OPP_INITIALIZER("iva", "dpll2_ck", "mpu_iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV),
169 169 };
170 170  
171 171 /* OMAP 3630 MPU Core VDD dependency table */
arch/arm/mach-omap2/opp4xxx_data.c
Diff comments   View file @ 4a3f891
... ... @@ -108,23 +108,23 @@
108 108  
109 109 static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
110 110 /* MPU OPP1 - OPP50 */
111   - OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV),
  111 + OPP_INITIALIZER("mpu", "dpll_mpu_ck", "mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV),
112 112 /* MPU OPP2 - OPP100 */
113   - OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV),
  113 + OPP_INITIALIZER("mpu", "dpll_mpu_ck", "mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV),
114 114 /* MPU OPP3 - OPP-Turbo */
115   - OPP_INITIALIZER("mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),
  115 + OPP_INITIALIZER("mpu", "dpll_mpu_ck", "mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),
116 116 /* MPU OPP4 - OPP-SB */
117   - OPP_INITIALIZER("mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),
  117 + OPP_INITIALIZER("mpu", "dpll_mpu_ck", "mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),
118 118 /* L3 OPP1 - OPP50 */
119   - OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV),
  119 + OPP_INITIALIZER("l3_main_1", "dpll_core_m5x2_ck", "core", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV),
120 120 /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
121   - OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV),
  121 + OPP_INITIALIZER("l3_main_1", "dpll_core_m5x2_ck", "core", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV),
122 122 /* IVA OPP1 - OPP50 */
123   - OPP_INITIALIZER("iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV),
  123 + OPP_INITIALIZER("iva", "dpll_iva_m5x2_ck", "iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV),
124 124 /* IVA OPP2 - OPP100 */
125   - OPP_INITIALIZER("iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV),
  125 + OPP_INITIALIZER("iva", "dpll_iva_m5x2_ck", "iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV),
126 126 /* IVA OPP3 - OPP-Turbo */
127   - OPP_INITIALIZER("iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV),
  127 + OPP_INITIALIZER("iva", "dpll_iva_m5x2_ck", "iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV),
128 128 /* TODO: add DSP, aess, fdif, gpu */
129 129 };
130 130