Eric Lee / linux-smarc-t335x-v3.2

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Commit 717aec7087b8bd4dc15a1d8a2f5cd6473ea51cd1

Authored by Vaibhav Bedia
Committed by Vaibhav Hiremath
1 parent 8dc4be8e6a
Exists in master

arm:omap:am33xx: hwmod cleanup 

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>

Showing 1 changed file with 84 additions and 68 deletions Side-by-side Diff

arch/arm/mach-omap2/omap_hwmod_33xx_data.c
Diff comments   View file @ 717aec7
... ... @@ -120,8 +120,9 @@
120 120 {
121 121 .pa_start = AM33XX_GPIO1_BASE,
122 122 .pa_end = AM33XX_GPIO1_BASE + SZ_4K - 1,
123   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  123 + .flags = ADDR_TYPE_RT
124 124 },
  125 + { }
125 126 };
126 127  
127 128 static struct omap_hwmod_ocp_if am33xx_l4_per__gpio1 = {
128 129  
... ... @@ -137,8 +138,9 @@
137 138 {
138 139 .pa_start = AM33XX_GPIO2_BASE,
139 140 .pa_end = AM33XX_GPIO2_BASE + SZ_4K - 1,
140   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  141 + .flags = ADDR_TYPE_RT
141 142 },
  143 + { }
142 144 };
143 145  
144 146 static struct omap_hwmod_ocp_if am33xx_l4_per__gpio2 = {
145 147  
... ... @@ -154,8 +156,9 @@
154 156 {
155 157 .pa_start = AM33XX_GPIO3_BASE,
156 158 .pa_end = AM33XX_GPIO3_BASE + SZ_4K - 1,
157   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  159 + .flags = ADDR_TYPE_RT
158 160 },
  161 + { }
159 162 };
160 163  
161 164 static struct omap_hwmod_ocp_if am33xx_l4_per__gpio3 = {
162 165  
... ... @@ -193,8 +196,9 @@
193 196 {
194 197 .pa_start = AM33XX_I2C0_BASE,
195 198 .pa_end = AM33XX_I2C0_BASE + SZ_4K - 1,
196   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  199 + .flags = ADDR_TYPE_RT
197 200 },
  201 + { }
198 202 };
199 203  
200 204 static struct omap_hwmod_ocp_if am33xx_l4_wkup_i2c1 = {
201 205  
... ... @@ -209,8 +213,9 @@
209 213 {
210 214 .pa_start = AM33XX_GPIO0_BASE,
211 215 .pa_end = AM33XX_GPIO0_BASE + SZ_4K - 1,
212   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  216 + .flags = ADDR_TYPE_RT
213 217 },
  218 + { }
214 219 };
215 220  
216 221 static struct omap_hwmod_ocp_if am33xx_l4_wkup__gpio0 = {
... ... @@ -274,7 +279,7 @@
274 279 /* aes0 */
275 280 static struct omap_hwmod_irq_info am33xx_aes0_irqs[] = {
276 281 { .irq = AM33XX_IRQ_AESEIP36t0_S },
277   - { .irq = -1 },
  282 + { .irq = -1 }
278 283 };
279 284  
280 285 static struct omap_hwmod am33xx_aes0_hwmod = {
... ... @@ -338,7 +343,7 @@
338 343 /* control */
339 344 static struct omap_hwmod_irq_info am33xx_control_irqs[] = {
340 345 { .irq = AM33XX_IRQ_CONTROL_PLATFORM },
341   - { .irq = -1 },
  346 + { .irq = -1 }
342 347 };
343 348  
344 349 static struct omap_hwmod am33xx_control_hwmod = {
... ... @@ -383,7 +388,7 @@
383 388 /* dcan0 */
384 389 static struct omap_hwmod_irq_info am33xx_dcan0_irqs[] = {
385 390 { .irq = AM33XX_IRQ_DCAN0_0 },
386   - { .irq = -1 },
  391 + { .irq = -1 }
387 392 };
388 393  
389 394 static struct omap_hwmod am33xx_dcan0_hwmod = {
... ... @@ -403,7 +408,7 @@
403 408 /* dcan1 */
404 409 static struct omap_hwmod_irq_info am33xx_dcan1_irqs[] = {
405 410 { .irq = AM33XX_IRQ_DCAN1_0 },
406   - { .irq = -1 },
  411 + { .irq = -1 }
407 412 };
408 413 static struct omap_hwmod am33xx_dcan1_hwmod = {
409 414 .name = "dcan1",
... ... @@ -466,7 +471,7 @@
466 471 {
467 472 .pa_start = AM33XX_ELM_BASE,
468 473 .pa_end = AM33XX_ELM_BASE + SZ_8K - 1,
469   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  474 + .flags = ADDR_TYPE_RT
470 475 },
471 476 { }
472 477 };
... ... @@ -594,7 +599,7 @@
594 599 /* gpio0 */
595 600 static struct omap_hwmod_irq_info am33xx_gpio0_irqs[] = {
596 601 { .irq = AM33XX_IRQ_GPIO0_1 },
597   - { .irq = -1 },
  602 + { .irq = -1 }
598 603 };
599 604  
600 605 /* gpio0 slave ports */
... ... @@ -630,7 +635,7 @@
630 635 /* gpio1 */
631 636 static struct omap_hwmod_irq_info am33xx_gpio1_irqs[] = {
632 637 { .irq = AM33XX_IRQ_GPIO1_1 },
633   - { .irq = -1 },
  638 + { .irq = -1 }
634 639 };
635 640  
636 641 /* gpio1 slave ports */
... ... @@ -665,7 +670,7 @@
665 670 /* gpio2 */
666 671 static struct omap_hwmod_irq_info am33xx_gpio2_irqs[] = {
667 672 { .irq = AM33XX_IRQ_GPIO2_1 },
668   - { .irq = -1 },
  673 + { .irq = -1 }
669 674 };
670 675  
671 676 /* gpio2 slave ports */
... ... @@ -701,7 +706,7 @@
701 706 /* gpio3 */
702 707 static struct omap_hwmod_irq_info am33xx_gpio3_irqs[] = {
703 708 { .irq = AM33XX_IRQ_GPIO3_1 },
704   - { .irq = -1 },
  709 + { .irq = -1 }
705 710 };
706 711  
707 712 /* gpio3 slave ports */
708 713  
... ... @@ -781,12 +786,13 @@
781 786 /* I2C1 */
782 787 static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
783 788 { .irq = AM33XX_IRQ_MSHSI2COCP0 },
784   - { .irq = -1 },
  789 + { .irq = -1 }
785 790 };
786 791  
787 792 static struct omap_hwmod_dma_info i2c1_edma_reqs[] = {
788 793 { .name = "tx", .dma_req = 0, },
789 794 { .name = "rx", .dma_req = 0, },
  795 + { .dma_req = -1 }
790 796 };
791 797  
792 798 static struct omap_hwmod_ocp_if *am33xx_i2c1_slaves[] = {
793 799  
... ... @@ -818,8 +824,9 @@
818 824 {
819 825 .pa_start = AM33XX_I2C1_BASE,
820 826 .pa_end = AM33XX_I2C1_BASE + SZ_4K - 1,
821   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  827 + .flags = ADDR_TYPE_RT
822 828 },
  829 + { }
823 830 };
824 831  
825 832 static struct omap_hwmod_ocp_if am335_l4_per_i2c2 = {
826 833  
... ... @@ -831,12 +838,13 @@
831 838  
832 839 static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
833 840 { .irq = AM33XX_IRQ_MSHSI2COCP1 },
834   - { .irq = -1 },
  841 + { .irq = -1 }
835 842 };
836 843  
837 844 static struct omap_hwmod_dma_info i2c2_edma_reqs[] = {
838 845 { .name = "tx", .dma_req = 0, },
839 846 { .name = "rx", .dma_req = 0, },
  847 + { .dma_req = -1 }
840 848 };
841 849  
842 850 static struct omap_hwmod_ocp_if *am33xx_i2c2_slaves[] = {
... ... @@ -995,7 +1003,7 @@
995 1003 /* lcdc */
996 1004 static struct omap_hwmod_irq_info am33xx_lcdc_irqs[] = {
997 1005 { .irq = AM33XX_IRQ_LCD },
998   - { .irq = -1 },
  1006 + { .irq = -1 }
999 1007 };
1000 1008  
1001 1009 static struct omap_hwmod am33xx_lcdc_hwmod = {
... ... @@ -1021,7 +1029,7 @@
1021 1029 /* mcasp0 */
1022 1030 static struct omap_hwmod_irq_info am33xx_mcasp0_irqs[] = {
1023 1031 { .irq = 80 },
1024   - { .irq = -1 },
  1032 + { .irq = -1 }
1025 1033 };
1026 1034  
1027 1035 static struct omap_hwmod am33xx_mcasp0_hwmod = {
... ... @@ -1059,7 +1067,7 @@
1059 1067 /* mmc0 */
1060 1068 static struct omap_hwmod_irq_info am33xx_mmc0_irqs[] = {
1061 1069 { .irq = AM33XX_IRQ_MMCHS0 },
1062   - { .irq = -1 },
  1070 + { .irq = -1 }
1063 1071 };
1064 1072  
1065 1073 static struct omap_hwmod_dma_info am33xx_mmc0_edma_reqs[] = {
1066 1074  
... ... @@ -1072,8 +1080,9 @@
1072 1080 {
1073 1081 .pa_start = AM33XX_MMC0_BASE,
1074 1082 .pa_end = AM33XX_MMC0_BASE + SZ_4K - 1,
1075   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  1083 + .flags = ADDR_TYPE_RT
1076 1084 },
  1085 + { }
1077 1086 };
1078 1087  
1079 1088 static struct omap_hwmod_ocp_if am33xx_l4ls__mmc0 = {
... ... @@ -1113,7 +1122,7 @@
1113 1122 /* mmc1 */
1114 1123 static struct omap_hwmod_irq_info am33xx_mmc1_irqs[] = {
1115 1124 { .irq = AM33XX_IRQ_MMCHS1 },
1116   - { .irq = -1 },
  1125 + { .irq = -1 }
1117 1126 };
1118 1127  
1119 1128 static struct omap_hwmod_dma_info am33xx_mmc1_edma_reqs[] = {
1120 1129  
... ... @@ -1126,8 +1135,9 @@
1126 1135 {
1127 1136 .pa_start = AM33XX_MMC1_BASE,
1128 1137 .pa_end = AM33XX_MMC1_BASE + SZ_4K - 1,
1129   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  1138 + .flags = ADDR_TYPE_RT
1130 1139 },
  1140 + { }
1131 1141 };
1132 1142  
1133 1143 static struct omap_hwmod_ocp_if am33xx_l4ls__mmc1 = {
... ... @@ -1167,7 +1177,7 @@
1167 1177 /* mmc2 */
1168 1178 static struct omap_hwmod_irq_info am33xx_mmc2_irqs[] = {
1169 1179 { .irq = AM33XX_IRQ_MMCHS2 },
1170   - { .irq = -1 },
  1180 + { .irq = -1 }
1171 1181 };
1172 1182  
1173 1183 static struct omap_hwmod_dma_info am33xx_mmc2_edma_reqs[] = {
1174 1184  
... ... @@ -1180,8 +1190,9 @@
1180 1190 {
1181 1191 .pa_start = AM33XX_MMC2_BASE,
1182 1192 .pa_end = AM33XX_MMC2_BASE + SZ_64K - 1,
1183   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  1193 + .flags = ADDR_TYPE_RT
1184 1194 },
  1195 + { }
1185 1196 };
1186 1197  
1187 1198 static struct omap_hwmod_ocp_if am33xx_l3_main__mmc2 = {
... ... @@ -1285,7 +1296,7 @@
1285 1296 /* rtc */
1286 1297 static struct omap_hwmod_irq_info am33xx_rtc_irqs[] = {
1287 1298 { .irq = AM33XX_IRQ_RTC_TIMER },
1288   - { .irq = -1 },
  1299 + { .irq = -1 }
1289 1300 };
1290 1301  
1291 1302 static struct omap_hwmod am33xx_rtc_hwmod = {
... ... @@ -1311,7 +1322,7 @@
1311 1322 /* sha0 */
1312 1323 static struct omap_hwmod_irq_info am33xx_sha0_irqs[] = {
1313 1324 { .irq = AM33XX_IRQ_SHAEIP57t0_S },
1314   - { .irq = -1 },
  1325 + { .irq = -1 }
1315 1326 };
1316 1327  
1317 1328 static struct omap_hwmod am33xx_sha0_hwmod = {
... ... @@ -1336,7 +1347,7 @@
1336 1347 /* smartreflex0 */
1337 1348 static struct omap_hwmod_irq_info am33xx_smartreflex0_irqs[] = {
1338 1349 { .irq = AM33XX_IRQ_SMARTREFLEX0 },
1339   - { .irq = -1 },
  1350 + { .irq = -1 }
1340 1351 };
1341 1352  
1342 1353 static struct omap_hwmod am33xx_smartreflex0_hwmod = {
... ... @@ -1356,7 +1367,7 @@
1356 1367 /* smartreflex1 */
1357 1368 static struct omap_hwmod_irq_info am33xx_smartreflex1_irqs[] = {
1358 1369 { .irq = AM33XX_IRQ_SMARTREFLEX1 },
1359   - { .irq = -1 },
  1370 + { .irq = -1 }
1360 1371 };
1361 1372  
1362 1373 static struct omap_hwmod am33xx_smartreflex1_hwmod = {
... ... @@ -1395,7 +1406,7 @@
1395 1406 /* spi0 */
1396 1407 static struct omap_hwmod_irq_info am33xx_spi0_irqs[] = {
1397 1408 { .irq = AM33XX_IRQ_MCSPIOCP0 },
1398   - { .irq = -1 },
  1409 + { .irq = -1 }
1399 1410 };
1400 1411  
1401 1412 struct omap_hwmod_dma_info am33xx_mcspi0_sdma_reqs[] = {
1402 1413  
... ... @@ -1410,9 +1421,9 @@
1410 1421 {
1411 1422 .pa_start = AM33XX_SPI0_BASE,
1412 1423 .pa_end = AM33XX_SPI0_BASE + SZ_1K - 1,
1413   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  1424 + .flags = ADDR_TYPE_RT
1414 1425 },
1415   - { },
  1426 + { }
1416 1427 };
1417 1428  
1418 1429 struct omap_hwmod_ocp_if am33xx_l4_core__mcspi0 = {
... ... @@ -1451,7 +1462,7 @@
1451 1462 /* spi1 */
1452 1463 static struct omap_hwmod_irq_info am33xx_spi1_irqs[] = {
1453 1464 { .irq = AM33XX_IRQ_SPI1 },
1454   - { .irq = -1 },
  1465 + { .irq = -1 }
1455 1466 };
1456 1467  
1457 1468 struct omap_hwmod_dma_info am33xx_mcspi1_sdma_reqs[] = {
1458 1469  
... ... @@ -1466,9 +1477,9 @@
1466 1477 {
1467 1478 .pa_start = AM33XX_SPI1_BASE,
1468 1479 .pa_end = AM33XX_SPI1_BASE + SZ_1K - 1,
1469   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  1480 + .flags = ADDR_TYPE_RT
1470 1481 },
1471   - { },
  1482 + { }
1472 1483 };
1473 1484  
1474 1485 struct omap_hwmod_ocp_if am33xx_l4_core__mcspi1 = {
... ... @@ -1543,7 +1554,7 @@
1543 1554 .pa_end = AM33XX_TIMER0_BASE + SZ_1K - 1,
1544 1555 .flags = ADDR_TYPE_RT
1545 1556 },
1546   - { },
  1557 + { }
1547 1558 };
1548 1559  
1549 1560 static struct omap_hwmod_ocp_if am33xx_l4wkup__timer0 = {
... ... @@ -1560,7 +1571,7 @@
1560 1571  
1561 1572 static struct omap_hwmod_irq_info am33xx_timer0_irqs[] = {
1562 1573 { .irq = AM33XX_IRQ_DMTIMER0 },
1563   - { .irq = -1 },
  1574 + { .irq = -1 }
1564 1575 };
1565 1576  
1566 1577 static struct omap_hwmod am33xx_timer0_hwmod = {
... ... @@ -1603,7 +1614,7 @@
1603 1614 .pa_end = AM33XX_TIMER1_BASE + SZ_1K - 1,
1604 1615 .flags = ADDR_TYPE_RT
1605 1616 },
1606   - { },
  1617 + { }
1607 1618 };
1608 1619  
1609 1620 static struct omap_hwmod_ocp_if am33xx_l4wkup__timer1 = {
... ... @@ -1620,7 +1631,7 @@
1620 1631  
1621 1632 static struct omap_hwmod_irq_info am33xx_timer1_irqs[] = {
1622 1633 { .irq = AM33XX_IRQ_DMTIMER1 },
1623   - { .irq = -1 },
  1634 + { .irq = -1 }
1624 1635 };
1625 1636  
1626 1637 static struct omap_hwmod am33xx_timer1_hwmod = {
... ... @@ -1647,7 +1658,7 @@
1647 1658 .pa_end = AM33XX_TIMER2_BASE + SZ_1K - 1,
1648 1659 .flags = ADDR_TYPE_RT
1649 1660 },
1650   - { },
  1661 + { }
1651 1662 };
1652 1663  
1653 1664 static struct omap_hwmod_ocp_if am33xx_l4per__timer2 = {
... ... @@ -1664,7 +1675,7 @@
1664 1675  
1665 1676 static struct omap_hwmod_irq_info am33xx_timer2_irqs[] = {
1666 1677 { .irq = AM33XX_IRQ_DMTIMER2 },
1667   - { .irq = -1 },
  1678 + { .irq = -1 }
1668 1679 };
1669 1680  
1670 1681 static struct omap_hwmod am33xx_timer2_hwmod = {
... ... @@ -1691,7 +1702,7 @@
1691 1702 .pa_end = AM33XX_TIMER3_BASE + SZ_1K - 1,
1692 1703 .flags = ADDR_TYPE_RT
1693 1704 },
1694   - { },
  1705 + { }
1695 1706 };
1696 1707  
1697 1708 static struct omap_hwmod_ocp_if am33xx_l4per__timer3 = {
... ... @@ -1708,7 +1719,7 @@
1708 1719  
1709 1720 static struct omap_hwmod_irq_info am33xx_timer3_irqs[] = {
1710 1721 { .irq = AM33XX_IRQ_DMTIMER3 },
1711   - { .irq = -1 },
  1722 + { .irq = -1 }
1712 1723 };
1713 1724  
1714 1725 static struct omap_hwmod am33xx_timer3_hwmod = {
... ... @@ -1735,7 +1746,7 @@
1735 1746 .pa_end = AM33XX_TIMER4_BASE + SZ_1K - 1,
1736 1747 .flags = ADDR_TYPE_RT
1737 1748 },
1738   - { },
  1749 + { }
1739 1750 };
1740 1751  
1741 1752 static struct omap_hwmod_ocp_if am33xx_l4per__timer4 = {
... ... @@ -1752,7 +1763,7 @@
1752 1763  
1753 1764 static struct omap_hwmod_irq_info am33xx_timer4_irqs[] = {
1754 1765 { .irq = AM33XX_IRQ_DMTIMER4 },
1755   - { .irq = -1 },
  1766 + { .irq = -1 }
1756 1767 };
1757 1768  
1758 1769 static struct omap_hwmod am33xx_timer4_hwmod = {
... ... @@ -1780,7 +1791,7 @@
1780 1791 .pa_end = AM33XX_TIMER5_BASE + SZ_1K - 1,
1781 1792 .flags = ADDR_TYPE_RT
1782 1793 },
1783   - { },
  1794 + { }
1784 1795 };
1785 1796  
1786 1797 static struct omap_hwmod_ocp_if am33xx_l4per__timer5 = {
... ... @@ -1797,7 +1808,7 @@
1797 1808  
1798 1809 static struct omap_hwmod_irq_info am33xx_timer5_irqs[] = {
1799 1810 { .irq = AM33XX_IRQ_DMTIMER5 },
1800   - { .irq = -1 },
  1811 + { .irq = -1 }
1801 1812 };
1802 1813  
1803 1814 static struct omap_hwmod am33xx_timer5_hwmod = {
... ... @@ -1824,7 +1835,7 @@
1824 1835 .pa_end = AM33XX_TIMER6_BASE + SZ_1K - 1,
1825 1836 .flags = ADDR_TYPE_RT
1826 1837 },
1827   - { },
  1838 + { }
1828 1839 };
1829 1840  
1830 1841 static struct omap_hwmod_ocp_if am33xx_l4per__timer6 = {
... ... @@ -1841,7 +1852,7 @@
1841 1852  
1842 1853 static struct omap_hwmod_irq_info am33xx_timer6_irqs[] = {
1843 1854 { .irq = AM33XX_IRQ_DMTIMER6 },
1844   - { .irq = -1 },
  1855 + { .irq = -1 }
1845 1856 };
1846 1857  
1847 1858 static struct omap_hwmod am33xx_timer6_hwmod = {
... ... @@ -1868,7 +1879,7 @@
1868 1879 .pa_end = AM33XX_TIMER7_BASE + SZ_1K - 1,
1869 1880 .flags = ADDR_TYPE_RT
1870 1881 },
1871   - { },
  1882 + { }
1872 1883 };
1873 1884  
1874 1885 static struct omap_hwmod_ocp_if am33xx_l4per__timer7 = {
... ... @@ -1885,7 +1896,7 @@
1885 1896  
1886 1897 static struct omap_hwmod_irq_info am33xx_timer7_irqs[] = {
1887 1898 { .irq = AM33XX_IRQ_DMTIMER7 },
1888   - { .irq = -1 },
  1899 + { .irq = -1 }
1889 1900 };
1890 1901  
1891 1902 static struct omap_hwmod am33xx_timer7_hwmod = {
... ... @@ -1937,7 +1948,7 @@
1937 1948 /* tptc0 */
1938 1949 static struct omap_hwmod_irq_info am33xx_tptc0_irqs[] = {
1939 1950 { .irq = AM33XX_IRQ_TPTC0 },
1940   - { .irq = -1 },
  1951 + { .irq = -1 }
1941 1952 };
1942 1953  
1943 1954 static struct omap_hwmod am33xx_tptc0_hwmod = {
... ... @@ -1957,7 +1968,7 @@
1957 1968 /* tptc1 */
1958 1969 static struct omap_hwmod_irq_info am33xx_tptc1_irqs[] = {
1959 1970 { .irq = AM33XX_IRQ_TPTC1 },
1960   - { .irq = -1 },
  1971 + { .irq = -1 }
1961 1972 };
1962 1973  
1963 1974 static struct omap_hwmod am33xx_tptc1_hwmod = {
... ... @@ -1977,7 +1988,7 @@
1977 1988 /* tptc2 */
1978 1989 static struct omap_hwmod_irq_info am33xx_tptc2_irqs[] = {
1979 1990 { .irq = AM33XX_IRQ_TPTC2 },
1980   - { .irq = -1 },
  1991 + { .irq = -1 }
1981 1992 };
1982 1993  
1983 1994 static struct omap_hwmod am33xx_tptc2_hwmod = {
1984 1995  
... ... @@ -2022,8 +2033,9 @@
2022 2033 {
2023 2034 .pa_start = AM33XX_UART1_BASE,
2024 2035 .pa_end = AM33XX_UART1_BASE + SZ_8K - 1,
2025   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  2036 + .flags = ADDR_TYPE_RT
2026 2037 },
  2038 + { }
2027 2039 };
2028 2040  
2029 2041 static struct omap_hwmod_ocp_if am33xx_l4_wkup__uart1 = {
2030 2042  
... ... @@ -2065,8 +2077,9 @@
2065 2077 {
2066 2078 .pa_start = AM33XX_UART2_BASE,
2067 2079 .pa_end = AM33XX_UART2_BASE + SZ_8K - 1,
2068   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  2080 + .flags = ADDR_TYPE_RT
2069 2081 },
  2082 + { }
2070 2083 };
2071 2084  
2072 2085 static struct omap_hwmod_ocp_if am33xx_l4_ls__uart2 = {
... ... @@ -2078,7 +2091,7 @@
2078 2091  
2079 2092 static struct omap_hwmod_irq_info am33xx_uart2_irqs[] = {
2080 2093 { .irq = AM33XX_IRQ_UART1 },
2081   - { .irq = -1 },
  2094 + { .irq = -1 }
2082 2095 };
2083 2096  
2084 2097 static struct omap_hwmod_ocp_if *am33xx_uart2_slaves[] = {
2085 2098  
... ... @@ -2107,8 +2120,9 @@
2107 2120 {
2108 2121 .pa_start = AM33XX_UART3_BASE,
2109 2122 .pa_end = AM33XX_UART3_BASE + SZ_8K - 1,
2110   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  2123 + .flags = ADDR_TYPE_RT
2111 2124 },
  2125 + { }
2112 2126 };
2113 2127  
2114 2128 static struct omap_hwmod_ocp_if am33xx_l4_ls__uart3 = {
... ... @@ -2120,7 +2134,7 @@
2120 2134  
2121 2135 static struct omap_hwmod_irq_info am33xx_uart3_irqs[] = {
2122 2136 { .irq = AM33XX_IRQ_UART2 },
2123   - { .irq = -1 },
  2137 + { .irq = -1 }
2124 2138 };
2125 2139  
2126 2140 static struct omap_hwmod_ocp_if *am33xx_uart3_slaves[] = {
2127 2141  
... ... @@ -2149,8 +2163,9 @@
2149 2163 {
2150 2164 .pa_start = AM33XX_UART4_BASE,
2151 2165 .pa_end = AM33XX_UART4_BASE + SZ_8K - 1,
2152   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  2166 + .flags = ADDR_TYPE_RT
2153 2167 },
  2168 + { }
2154 2169 };
2155 2170  
2156 2171 static struct omap_hwmod_ocp_if am33xx_l4_ls__uart4 = {
... ... @@ -2162,7 +2177,7 @@
2162 2177  
2163 2178 static struct omap_hwmod_irq_info am33xx_uart4_irqs[] = {
2164 2179 { .irq = AM33XX_IRQ_UART3 },
2165   - { .irq = -1 },
  2180 + { .irq = -1 }
2166 2181 };
2167 2182  
2168 2183 static struct omap_hwmod_ocp_if *am33xx_uart4_slaves[] = {
2169 2184  
... ... @@ -2191,8 +2206,9 @@
2191 2206 {
2192 2207 .pa_start = AM33XX_UART5_BASE,
2193 2208 .pa_end = AM33XX_UART5_BASE + SZ_8K - 1,
2194   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  2209 + .flags = ADDR_TYPE_RT
2195 2210 },
  2211 + { }
2196 2212 };
2197 2213  
2198 2214 static struct omap_hwmod_ocp_if am33xx_l4_ls__uart5 = {
... ... @@ -2204,7 +2220,7 @@
2204 2220  
2205 2221 static struct omap_hwmod_irq_info am33xx_uart5_irqs[] = {
2206 2222 { .irq = AM33XX_IRQ_UART4 },
2207   - { .irq = -1 },
  2223 + { .irq = -1 }
2208 2224 };
2209 2225  
2210 2226 static struct omap_hwmod_ocp_if *am33xx_uart5_slaves[] = {
2211 2227  
... ... @@ -2233,8 +2249,9 @@
2233 2249 {
2234 2250 .pa_start = AM33XX_UART6_BASE,
2235 2251 .pa_end = AM33XX_UART6_BASE + SZ_8K - 1,
2236   - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
  2252 + .flags = ADDR_TYPE_RT
2237 2253 },
  2254 + { }
2238 2255 };
2239 2256  
2240 2257 static struct omap_hwmod_ocp_if am33xx_l4_ls__uart6 = {
... ... @@ -2246,7 +2263,7 @@
2246 2263  
2247 2264 static struct omap_hwmod_irq_info am33xx_uart6_irqs[] = {
2248 2265 { .irq = AM33XX_IRQ_UART5 },
2249   - { .irq = -1 },
  2266 + { .irq = -1 }
2250 2267 };
2251 2268  
2252 2269 static struct omap_hwmod_ocp_if *am33xx_uart6_slaves[] = {
... ... @@ -2281,7 +2298,7 @@
2281 2298 .pa_end = AM33XX_WDT1_BASE + SZ_4K - 1,
2282 2299 .flags = ADDR_TYPE_RT
2283 2300 },
2284   - { },
  2301 + { }
2285 2302 };
2286 2303  
2287 2304 /* l4_wkup -> wd_timer1 */
... ... @@ -2357,8 +2374,7 @@
2357 2374 .pa_end = AM33XX_USB1_BASE + SZ_2K - 1,
2358 2375 .flags = ADDR_TYPE_RT
2359 2376 },
2360   - {
2361   - },
  2377 + { }
2362 2378 };
2363 2379  
2364 2380 static struct omap_hwmod_class_sysconfig am33xx_usbhsotg_sysc = {