Eric Lee / linux-smarc-t335x-v3.2

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Commit 778ef1e6cbb049c9bcbf405936ee6f2b6e451892

Authored by Linus Torvalds
2 parents 3c4f1158cd acfa5110b8
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6 

* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging-2.6:
  Staging: w35und: fix usb_control_msg() error handling in wb35_probe()
  Staging: w35und: fix registration with wlan stack
  Staging: panel: fix oops on panel_cleanup_module
  Staging: rtl8187se: Fix oops and memory poison caused by builtin ieee80211.
  Staging: rtl8187se: fix Kconfig dependencies

Showing 5 changed files Inline Diff

drivers/staging/panel/panel.c
Diff comments   View file @ 778ef1e
1 /* 1 /*
2 * Front panel driver for Linux 2 * Front panel driver for Linux
3 * Copyright (C) 2000-2008, Willy Tarreau <w@1wt.eu> 3 * Copyright (C) 2000-2008, Willy Tarreau <w@1wt.eu>
4 * 4 *
5 * This program is free software; you can redistribute it and/or 5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License 6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version. 8 * 2 of the License, or (at your option) any later version.
9 * 9 *
10 * This code drives an LCD module (/dev/lcd), and a keypad (/dev/keypad) 10 * This code drives an LCD module (/dev/lcd), and a keypad (/dev/keypad)
11 * connected to a parallel printer port. 11 * connected to a parallel printer port.
12 * 12 *
13 * The LCD module may either be an HD44780-like 8-bit parallel LCD, or a 1-bit 13 * The LCD module may either be an HD44780-like 8-bit parallel LCD, or a 1-bit
14 * serial module compatible with Samsung's KS0074. The pins may be connected in 14 * serial module compatible with Samsung's KS0074. The pins may be connected in
15 * any combination, everything is programmable. 15 * any combination, everything is programmable.
16 * 16 *
17 * The keypad consists in a matrix of push buttons connecting input pins to 17 * The keypad consists in a matrix of push buttons connecting input pins to
18 * data output pins or to the ground. The combinations have to be hard-coded 18 * data output pins or to the ground. The combinations have to be hard-coded
19 * in the driver, though several profiles exist and adding new ones is easy. 19 * in the driver, though several profiles exist and adding new ones is easy.
20 * 20 *
21 * Several profiles are provided for commonly found LCD+keypad modules on the 21 * Several profiles are provided for commonly found LCD+keypad modules on the
22 * market, such as those found in Nexcom's appliances. 22 * market, such as those found in Nexcom's appliances.
23 * 23 *
24 * FIXME: 24 * FIXME:
25 * - the initialization/deinitialization process is very dirty and should 25 * - the initialization/deinitialization process is very dirty and should
26 * be rewritten. It may even be buggy. 26 * be rewritten. It may even be buggy.
27 * 27 *
28 * TODO: 28 * TODO:
29 * - document 24 keys keyboard (3 rows of 8 cols, 32 diodes + 2 inputs) 29 * - document 24 keys keyboard (3 rows of 8 cols, 32 diodes + 2 inputs)
30 * - make the LCD a part of a virtual screen of Vx*Vy 30 * - make the LCD a part of a virtual screen of Vx*Vy
31 * - make the inputs list smp-safe 31 * - make the inputs list smp-safe
32 * - change the keyboard to a double mapping : signals -> key_id -> values 32 * - change the keyboard to a double mapping : signals -> key_id -> values
33 * so that applications can change values without knowing signals 33 * so that applications can change values without knowing signals
34 * 34 *
35 */ 35 */
36 36
37 #include <linux/module.h> 37 #include <linux/module.h>
38 38
39 #include <linux/types.h> 39 #include <linux/types.h>
40 #include <linux/errno.h> 40 #include <linux/errno.h>
41 #include <linux/signal.h> 41 #include <linux/signal.h>
42 #include <linux/sched.h> 42 #include <linux/sched.h>
43 #include <linux/spinlock.h> 43 #include <linux/spinlock.h>
44 #include <linux/smp_lock.h> 44 #include <linux/smp_lock.h>
45 #include <linux/interrupt.h> 45 #include <linux/interrupt.h>
46 #include <linux/miscdevice.h> 46 #include <linux/miscdevice.h>
47 #include <linux/slab.h> 47 #include <linux/slab.h>
48 #include <linux/ioport.h> 48 #include <linux/ioport.h>
49 #include <linux/fcntl.h> 49 #include <linux/fcntl.h>
50 #include <linux/init.h> 50 #include <linux/init.h>
51 #include <linux/delay.h> 51 #include <linux/delay.h>
52 #include <linux/ctype.h> 52 #include <linux/ctype.h>
53 #include <linux/parport.h> 53 #include <linux/parport.h>
54 #include <linux/version.h> 54 #include <linux/version.h>
55 #include <linux/list.h> 55 #include <linux/list.h>
56 #include <linux/notifier.h> 56 #include <linux/notifier.h>
57 #include <linux/reboot.h> 57 #include <linux/reboot.h>
58 #include <linux/utsrelease.h> 58 #include <linux/utsrelease.h>
59 59
60 #include <linux/io.h> 60 #include <linux/io.h>
61 #include <asm/uaccess.h> 61 #include <asm/uaccess.h>
62 #include <asm/system.h> 62 #include <asm/system.h>
63 63
64 #define LCD_MINOR 156 64 #define LCD_MINOR 156
65 #define KEYPAD_MINOR 185 65 #define KEYPAD_MINOR 185
66 66
67 #define PANEL_VERSION "0.9.5" 67 #define PANEL_VERSION "0.9.5"
68 68
69 #define LCD_MAXBYTES 256 /* max burst write */ 69 #define LCD_MAXBYTES 256 /* max burst write */
70 70
71 #define KEYPAD_BUFFER 64 71 #define KEYPAD_BUFFER 64
72 #define INPUT_POLL_TIME (HZ/50) /* poll the keyboard this every second */ 72 #define INPUT_POLL_TIME (HZ/50) /* poll the keyboard this every second */
73 #define KEYPAD_REP_START (10) /* a key starts to repeat after this times INPUT_POLL_TIME */ 73 #define KEYPAD_REP_START (10) /* a key starts to repeat after this times INPUT_POLL_TIME */
74 #define KEYPAD_REP_DELAY (2) /* a key repeats this times INPUT_POLL_TIME */ 74 #define KEYPAD_REP_DELAY (2) /* a key repeats this times INPUT_POLL_TIME */
75 75
76 #define FLASH_LIGHT_TEMPO (200) /* keep the light on this times INPUT_POLL_TIME for each flash */ 76 #define FLASH_LIGHT_TEMPO (200) /* keep the light on this times INPUT_POLL_TIME for each flash */
77 77
78 /* converts an r_str() input to an active high, bits string : 000BAOSE */ 78 /* converts an r_str() input to an active high, bits string : 000BAOSE */
79 #define PNL_PINPUT(a) ((((unsigned char)(a)) ^ 0x7F) >> 3) 79 #define PNL_PINPUT(a) ((((unsigned char)(a)) ^ 0x7F) >> 3)
80 80
81 #define PNL_PBUSY 0x80 /* inverted input, active low */ 81 #define PNL_PBUSY 0x80 /* inverted input, active low */
82 #define PNL_PACK 0x40 /* direct input, active low */ 82 #define PNL_PACK 0x40 /* direct input, active low */
83 #define PNL_POUTPA 0x20 /* direct input, active high */ 83 #define PNL_POUTPA 0x20 /* direct input, active high */
84 #define PNL_PSELECD 0x10 /* direct input, active high */ 84 #define PNL_PSELECD 0x10 /* direct input, active high */
85 #define PNL_PERRORP 0x08 /* direct input, active low */ 85 #define PNL_PERRORP 0x08 /* direct input, active low */
86 86
87 #define PNL_PBIDIR 0x20 /* bi-directional ports */ 87 #define PNL_PBIDIR 0x20 /* bi-directional ports */
88 #define PNL_PINTEN 0x10 /* high to read data in or-ed with data out */ 88 #define PNL_PINTEN 0x10 /* high to read data in or-ed with data out */
89 #define PNL_PSELECP 0x08 /* inverted output, active low */ 89 #define PNL_PSELECP 0x08 /* inverted output, active low */
90 #define PNL_PINITP 0x04 /* direct output, active low */ 90 #define PNL_PINITP 0x04 /* direct output, active low */
91 #define PNL_PAUTOLF 0x02 /* inverted output, active low */ 91 #define PNL_PAUTOLF 0x02 /* inverted output, active low */
92 #define PNL_PSTROBE 0x01 /* inverted output */ 92 #define PNL_PSTROBE 0x01 /* inverted output */
93 93
94 #define PNL_PD0 0x01 94 #define PNL_PD0 0x01
95 #define PNL_PD1 0x02 95 #define PNL_PD1 0x02
96 #define PNL_PD2 0x04 96 #define PNL_PD2 0x04
97 #define PNL_PD3 0x08 97 #define PNL_PD3 0x08
98 #define PNL_PD4 0x10 98 #define PNL_PD4 0x10
99 #define PNL_PD5 0x20 99 #define PNL_PD5 0x20
100 #define PNL_PD6 0x40 100 #define PNL_PD6 0x40
101 #define PNL_PD7 0x80 101 #define PNL_PD7 0x80
102 102
103 #define PIN_NONE 0 103 #define PIN_NONE 0
104 #define PIN_STROBE 1 104 #define PIN_STROBE 1
105 #define PIN_D0 2 105 #define PIN_D0 2
106 #define PIN_D1 3 106 #define PIN_D1 3
107 #define PIN_D2 4 107 #define PIN_D2 4
108 #define PIN_D3 5 108 #define PIN_D3 5
109 #define PIN_D4 6 109 #define PIN_D4 6
110 #define PIN_D5 7 110 #define PIN_D5 7
111 #define PIN_D6 8 111 #define PIN_D6 8
112 #define PIN_D7 9 112 #define PIN_D7 9
113 #define PIN_AUTOLF 14 113 #define PIN_AUTOLF 14
114 #define PIN_INITP 16 114 #define PIN_INITP 16
115 #define PIN_SELECP 17 115 #define PIN_SELECP 17
116 #define PIN_NOT_SET 127 116 #define PIN_NOT_SET 127
117 117
118 #define LCD_FLAG_S 0x0001 118 #define LCD_FLAG_S 0x0001
119 #define LCD_FLAG_ID 0x0002 119 #define LCD_FLAG_ID 0x0002
120 #define LCD_FLAG_B 0x0004 /* blink on */ 120 #define LCD_FLAG_B 0x0004 /* blink on */
121 #define LCD_FLAG_C 0x0008 /* cursor on */ 121 #define LCD_FLAG_C 0x0008 /* cursor on */
122 #define LCD_FLAG_D 0x0010 /* display on */ 122 #define LCD_FLAG_D 0x0010 /* display on */
123 #define LCD_FLAG_F 0x0020 /* large font mode */ 123 #define LCD_FLAG_F 0x0020 /* large font mode */
124 #define LCD_FLAG_N 0x0040 /* 2-rows mode */ 124 #define LCD_FLAG_N 0x0040 /* 2-rows mode */
125 #define LCD_FLAG_L 0x0080 /* backlight enabled */ 125 #define LCD_FLAG_L 0x0080 /* backlight enabled */
126 126
127 #define LCD_ESCAPE_LEN 24 /* 24 chars max for an LCD escape command */ 127 #define LCD_ESCAPE_LEN 24 /* 24 chars max for an LCD escape command */
128 #define LCD_ESCAPE_CHAR 27 /* use char 27 for escape command */ 128 #define LCD_ESCAPE_CHAR 27 /* use char 27 for escape command */
129 129
130 /* macros to simplify use of the parallel port */ 130 /* macros to simplify use of the parallel port */
131 #define r_ctr(x) (parport_read_control((x)->port)) 131 #define r_ctr(x) (parport_read_control((x)->port))
132 #define r_dtr(x) (parport_read_data((x)->port)) 132 #define r_dtr(x) (parport_read_data((x)->port))
133 #define r_str(x) (parport_read_status((x)->port)) 133 #define r_str(x) (parport_read_status((x)->port))
134 #define w_ctr(x, y) do { parport_write_control((x)->port, (y)); } while (0) 134 #define w_ctr(x, y) do { parport_write_control((x)->port, (y)); } while (0)
135 #define w_dtr(x, y) do { parport_write_data((x)->port, (y)); } while (0) 135 #define w_dtr(x, y) do { parport_write_data((x)->port, (y)); } while (0)
136 136
137 /* this defines which bits are to be used and which ones to be ignored */ 137 /* this defines which bits are to be used and which ones to be ignored */
138 static __u8 scan_mask_o; /* logical or of the output bits involved in the scan matrix */ 138 static __u8 scan_mask_o; /* logical or of the output bits involved in the scan matrix */
139 static __u8 scan_mask_i; /* logical or of the input bits involved in the scan matrix */ 139 static __u8 scan_mask_i; /* logical or of the input bits involved in the scan matrix */
140 140
141 typedef __u64 pmask_t; 141 typedef __u64 pmask_t;
142 142
143 enum input_type { 143 enum input_type {
144 INPUT_TYPE_STD, 144 INPUT_TYPE_STD,
145 INPUT_TYPE_KBD, 145 INPUT_TYPE_KBD,
146 }; 146 };
147 147
148 enum input_state { 148 enum input_state {
149 INPUT_ST_LOW, 149 INPUT_ST_LOW,
150 INPUT_ST_RISING, 150 INPUT_ST_RISING,
151 INPUT_ST_HIGH, 151 INPUT_ST_HIGH,
152 INPUT_ST_FALLING, 152 INPUT_ST_FALLING,
153 }; 153 };
154 154
155 struct logical_input { 155 struct logical_input {
156 struct list_head list; 156 struct list_head list;
157 pmask_t mask; 157 pmask_t mask;
158 pmask_t value; 158 pmask_t value;
159 enum input_type type; 159 enum input_type type;
160 enum input_state state; 160 enum input_state state;
161 __u8 rise_time, fall_time; 161 __u8 rise_time, fall_time;
162 __u8 rise_timer, fall_timer, high_timer; 162 __u8 rise_timer, fall_timer, high_timer;
163 163
164 union { 164 union {
165 struct { /* this structure is valid when type == INPUT_TYPE_STD */ 165 struct { /* this structure is valid when type == INPUT_TYPE_STD */
166 void (*press_fct) (int); 166 void (*press_fct) (int);
167 void (*release_fct) (int); 167 void (*release_fct) (int);
168 int press_data; 168 int press_data;
169 int release_data; 169 int release_data;
170 } std; 170 } std;
171 struct { /* this structure is valid when type == INPUT_TYPE_KBD */ 171 struct { /* this structure is valid when type == INPUT_TYPE_KBD */
172 /* strings can be full-length (ie. non null-terminated) */ 172 /* strings can be full-length (ie. non null-terminated) */
173 char press_str[sizeof(void *) + sizeof(int)]; 173 char press_str[sizeof(void *) + sizeof(int)];
174 char repeat_str[sizeof(void *) + sizeof(int)]; 174 char repeat_str[sizeof(void *) + sizeof(int)];
175 char release_str[sizeof(void *) + sizeof(int)]; 175 char release_str[sizeof(void *) + sizeof(int)];
176 } kbd; 176 } kbd;
177 } u; 177 } u;
178 }; 178 };
179 179
180 LIST_HEAD(logical_inputs); /* list of all defined logical inputs */ 180 LIST_HEAD(logical_inputs); /* list of all defined logical inputs */
181 181
182 /* physical contacts history 182 /* physical contacts history
183 * Physical contacts are a 45 bits string of 9 groups of 5 bits each. 183 * Physical contacts are a 45 bits string of 9 groups of 5 bits each.
184 * The 8 lower groups correspond to output bits 0 to 7, and the 9th group 184 * The 8 lower groups correspond to output bits 0 to 7, and the 9th group
185 * corresponds to the ground. 185 * corresponds to the ground.
186 * Within each group, bits are stored in the same order as read on the port : 186 * Within each group, bits are stored in the same order as read on the port :
187 * BAPSE (busy=4, ack=3, paper empty=2, select=1, error=0). 187 * BAPSE (busy=4, ack=3, paper empty=2, select=1, error=0).
188 * So, each __u64 (or pmask_t) is represented like this : 188 * So, each __u64 (or pmask_t) is represented like this :
189 * 0000000000000000000BAPSEBAPSEBAPSEBAPSEBAPSEBAPSEBAPSEBAPSEBAPSE 189 * 0000000000000000000BAPSEBAPSEBAPSEBAPSEBAPSEBAPSEBAPSEBAPSEBAPSE
190 * <-----unused------><gnd><d07><d06><d05><d04><d03><d02><d01><d00> 190 * <-----unused------><gnd><d07><d06><d05><d04><d03><d02><d01><d00>
191 */ 191 */
192 static pmask_t phys_read; /* what has just been read from the I/O ports */ 192 static pmask_t phys_read; /* what has just been read from the I/O ports */
193 static pmask_t phys_read_prev; /* previous phys_read */ 193 static pmask_t phys_read_prev; /* previous phys_read */
194 static pmask_t phys_curr; /* stabilized phys_read (phys_read|phys_read_prev) */ 194 static pmask_t phys_curr; /* stabilized phys_read (phys_read|phys_read_prev) */
195 static pmask_t phys_prev; /* previous phys_curr */ 195 static pmask_t phys_prev; /* previous phys_curr */
196 static char inputs_stable; /* 0 means that at least one logical signal needs be computed */ 196 static char inputs_stable; /* 0 means that at least one logical signal needs be computed */
197 197
198 /* these variables are specific to the keypad */ 198 /* these variables are specific to the keypad */
199 static char keypad_buffer[KEYPAD_BUFFER]; 199 static char keypad_buffer[KEYPAD_BUFFER];
200 static int keypad_buflen; 200 static int keypad_buflen;
201 static int keypad_start; 201 static int keypad_start;
202 static char keypressed; 202 static char keypressed;
203 static wait_queue_head_t keypad_read_wait; 203 static wait_queue_head_t keypad_read_wait;
204 204
205 /* lcd-specific variables */ 205 /* lcd-specific variables */
206 static unsigned long int lcd_flags; /* contains the LCD config state */ 206 static unsigned long int lcd_flags; /* contains the LCD config state */
207 static unsigned long int lcd_addr_x; /* contains the LCD X offset */ 207 static unsigned long int lcd_addr_x; /* contains the LCD X offset */
208 static unsigned long int lcd_addr_y; /* contains the LCD Y offset */ 208 static unsigned long int lcd_addr_y; /* contains the LCD Y offset */
209 static char lcd_escape[LCD_ESCAPE_LEN + 1]; /* current escape sequence, 0 terminated */ 209 static char lcd_escape[LCD_ESCAPE_LEN + 1]; /* current escape sequence, 0 terminated */
210 static int lcd_escape_len = -1; /* not in escape state. >=0 = escape cmd len */ 210 static int lcd_escape_len = -1; /* not in escape state. >=0 = escape cmd len */
211 211
212 /* 212 /*
213 * Bit masks to convert LCD signals to parallel port outputs. 213 * Bit masks to convert LCD signals to parallel port outputs.
214 * _d_ are values for data port, _c_ are for control port. 214 * _d_ are values for data port, _c_ are for control port.
215 * [0] = signal OFF, [1] = signal ON, [2] = mask 215 * [0] = signal OFF, [1] = signal ON, [2] = mask
216 */ 216 */
217 #define BIT_CLR 0 217 #define BIT_CLR 0
218 #define BIT_SET 1 218 #define BIT_SET 1
219 #define BIT_MSK 2 219 #define BIT_MSK 2
220 #define BIT_STATES 3 220 #define BIT_STATES 3
221 /* 221 /*
222 * one entry for each bit on the LCD 222 * one entry for each bit on the LCD
223 */ 223 */
224 #define LCD_BIT_E 0 224 #define LCD_BIT_E 0
225 #define LCD_BIT_RS 1 225 #define LCD_BIT_RS 1
226 #define LCD_BIT_RW 2 226 #define LCD_BIT_RW 2
227 #define LCD_BIT_BL 3 227 #define LCD_BIT_BL 3
228 #define LCD_BIT_CL 4 228 #define LCD_BIT_CL 4
229 #define LCD_BIT_DA 5 229 #define LCD_BIT_DA 5
230 #define LCD_BITS 6 230 #define LCD_BITS 6
231 231
232 /* 232 /*
233 * each bit can be either connected to a DATA or CTRL port 233 * each bit can be either connected to a DATA or CTRL port
234 */ 234 */
235 #define LCD_PORT_C 0 235 #define LCD_PORT_C 0
236 #define LCD_PORT_D 1 236 #define LCD_PORT_D 1
237 #define LCD_PORTS 2 237 #define LCD_PORTS 2
238 238
239 static unsigned char lcd_bits[LCD_PORTS][LCD_BITS][BIT_STATES]; 239 static unsigned char lcd_bits[LCD_PORTS][LCD_BITS][BIT_STATES];
240 240
241 /* 241 /*
242 * LCD protocols 242 * LCD protocols
243 */ 243 */
244 #define LCD_PROTO_PARALLEL 0 244 #define LCD_PROTO_PARALLEL 0
245 #define LCD_PROTO_SERIAL 1 245 #define LCD_PROTO_SERIAL 1
246 246
247 /* 247 /*
248 * LCD character sets 248 * LCD character sets
249 */ 249 */
250 #define LCD_CHARSET_NORMAL 0 250 #define LCD_CHARSET_NORMAL 0
251 #define LCD_CHARSET_KS0074 1 251 #define LCD_CHARSET_KS0074 1
252 252
253 /* 253 /*
254 * LCD types 254 * LCD types
255 */ 255 */
256 #define LCD_TYPE_NONE 0 256 #define LCD_TYPE_NONE 0
257 #define LCD_TYPE_OLD 1 257 #define LCD_TYPE_OLD 1
258 #define LCD_TYPE_KS0074 2 258 #define LCD_TYPE_KS0074 2
259 #define LCD_TYPE_HANTRONIX 3 259 #define LCD_TYPE_HANTRONIX 3
260 #define LCD_TYPE_NEXCOM 4 260 #define LCD_TYPE_NEXCOM 4
261 #define LCD_TYPE_CUSTOM 5 261 #define LCD_TYPE_CUSTOM 5
262 262
263 /* 263 /*
264 * keypad types 264 * keypad types
265 */ 265 */
266 #define KEYPAD_TYPE_NONE 0 266 #define KEYPAD_TYPE_NONE 0
267 #define KEYPAD_TYPE_OLD 1 267 #define KEYPAD_TYPE_OLD 1
268 #define KEYPAD_TYPE_NEW 2 268 #define KEYPAD_TYPE_NEW 2
269 #define KEYPAD_TYPE_NEXCOM 3 269 #define KEYPAD_TYPE_NEXCOM 3
270 270
271 /* 271 /*
272 * panel profiles 272 * panel profiles
273 */ 273 */
274 #define PANEL_PROFILE_CUSTOM 0 274 #define PANEL_PROFILE_CUSTOM 0
275 #define PANEL_PROFILE_OLD 1 275 #define PANEL_PROFILE_OLD 1
276 #define PANEL_PROFILE_NEW 2 276 #define PANEL_PROFILE_NEW 2
277 #define PANEL_PROFILE_HANTRONIX 3 277 #define PANEL_PROFILE_HANTRONIX 3
278 #define PANEL_PROFILE_NEXCOM 4 278 #define PANEL_PROFILE_NEXCOM 4
279 #define PANEL_PROFILE_LARGE 5 279 #define PANEL_PROFILE_LARGE 5
280 280
281 /* 281 /*
282 * Construct custom config from the kernel's configuration 282 * Construct custom config from the kernel's configuration
283 */ 283 */
284 #define DEFAULT_PROFILE PANEL_PROFILE_LARGE 284 #define DEFAULT_PROFILE PANEL_PROFILE_LARGE
285 #define DEFAULT_PARPORT 0 285 #define DEFAULT_PARPORT 0
286 #define DEFAULT_LCD LCD_TYPE_OLD 286 #define DEFAULT_LCD LCD_TYPE_OLD
287 #define DEFAULT_KEYPAD KEYPAD_TYPE_OLD 287 #define DEFAULT_KEYPAD KEYPAD_TYPE_OLD
288 #define DEFAULT_LCD_WIDTH 40 288 #define DEFAULT_LCD_WIDTH 40
289 #define DEFAULT_LCD_BWIDTH 40 289 #define DEFAULT_LCD_BWIDTH 40
290 #define DEFAULT_LCD_HWIDTH 64 290 #define DEFAULT_LCD_HWIDTH 64
291 #define DEFAULT_LCD_HEIGHT 2 291 #define DEFAULT_LCD_HEIGHT 2
292 #define DEFAULT_LCD_PROTO LCD_PROTO_PARALLEL 292 #define DEFAULT_LCD_PROTO LCD_PROTO_PARALLEL
293 293
294 #define DEFAULT_LCD_PIN_E PIN_AUTOLF 294 #define DEFAULT_LCD_PIN_E PIN_AUTOLF
295 #define DEFAULT_LCD_PIN_RS PIN_SELECP 295 #define DEFAULT_LCD_PIN_RS PIN_SELECP
296 #define DEFAULT_LCD_PIN_RW PIN_INITP 296 #define DEFAULT_LCD_PIN_RW PIN_INITP
297 #define DEFAULT_LCD_PIN_SCL PIN_STROBE 297 #define DEFAULT_LCD_PIN_SCL PIN_STROBE
298 #define DEFAULT_LCD_PIN_SDA PIN_D0 298 #define DEFAULT_LCD_PIN_SDA PIN_D0
299 #define DEFAULT_LCD_PIN_BL PIN_NOT_SET 299 #define DEFAULT_LCD_PIN_BL PIN_NOT_SET
300 #define DEFAULT_LCD_CHARSET LCD_CHARSET_NORMAL 300 #define DEFAULT_LCD_CHARSET LCD_CHARSET_NORMAL
301 301
302 #ifdef CONFIG_PANEL_PROFILE 302 #ifdef CONFIG_PANEL_PROFILE
303 #undef DEFAULT_PROFILE 303 #undef DEFAULT_PROFILE
304 #define DEFAULT_PROFILE CONFIG_PANEL_PROFILE 304 #define DEFAULT_PROFILE CONFIG_PANEL_PROFILE
305 #endif 305 #endif
306 306
307 #ifdef CONFIG_PANEL_PARPORT 307 #ifdef CONFIG_PANEL_PARPORT
308 #undef DEFAULT_PARPORT 308 #undef DEFAULT_PARPORT
309 #define DEFAULT_PARPORT CONFIG_PANEL_PARPORT 309 #define DEFAULT_PARPORT CONFIG_PANEL_PARPORT
310 #endif 310 #endif
311 311
312 #if DEFAULT_PROFILE == 0 /* custom */ 312 #if DEFAULT_PROFILE == 0 /* custom */
313 #ifdef CONFIG_PANEL_KEYPAD 313 #ifdef CONFIG_PANEL_KEYPAD
314 #undef DEFAULT_KEYPAD 314 #undef DEFAULT_KEYPAD
315 #define DEFAULT_KEYPAD CONFIG_PANEL_KEYPAD 315 #define DEFAULT_KEYPAD CONFIG_PANEL_KEYPAD
316 #endif 316 #endif
317 317
318 #ifdef CONFIG_PANEL_LCD 318 #ifdef CONFIG_PANEL_LCD
319 #undef DEFAULT_LCD 319 #undef DEFAULT_LCD
320 #define DEFAULT_LCD CONFIG_PANEL_LCD 320 #define DEFAULT_LCD CONFIG_PANEL_LCD
321 #endif 321 #endif
322 322
323 #ifdef CONFIG_PANEL_LCD_WIDTH 323 #ifdef CONFIG_PANEL_LCD_WIDTH
324 #undef DEFAULT_LCD_WIDTH 324 #undef DEFAULT_LCD_WIDTH
325 #define DEFAULT_LCD_WIDTH CONFIG_PANEL_LCD_WIDTH 325 #define DEFAULT_LCD_WIDTH CONFIG_PANEL_LCD_WIDTH
326 #endif 326 #endif
327 327
328 #ifdef CONFIG_PANEL_LCD_BWIDTH 328 #ifdef CONFIG_PANEL_LCD_BWIDTH
329 #undef DEFAULT_LCD_BWIDTH 329 #undef DEFAULT_LCD_BWIDTH
330 #define DEFAULT_LCD_BWIDTH CONFIG_PANEL_LCD_BWIDTH 330 #define DEFAULT_LCD_BWIDTH CONFIG_PANEL_LCD_BWIDTH
331 #endif 331 #endif
332 332
333 #ifdef CONFIG_PANEL_LCD_HWIDTH 333 #ifdef CONFIG_PANEL_LCD_HWIDTH
334 #undef DEFAULT_LCD_HWIDTH 334 #undef DEFAULT_LCD_HWIDTH
335 #define DEFAULT_LCD_HWIDTH CONFIG_PANEL_LCD_HWIDTH 335 #define DEFAULT_LCD_HWIDTH CONFIG_PANEL_LCD_HWIDTH
336 #endif 336 #endif
337 337
338 #ifdef CONFIG_PANEL_LCD_HEIGHT 338 #ifdef CONFIG_PANEL_LCD_HEIGHT
339 #undef DEFAULT_LCD_HEIGHT 339 #undef DEFAULT_LCD_HEIGHT
340 #define DEFAULT_LCD_HEIGHT CONFIG_PANEL_LCD_HEIGHT 340 #define DEFAULT_LCD_HEIGHT CONFIG_PANEL_LCD_HEIGHT
341 #endif 341 #endif
342 342
343 #ifdef CONFIG_PANEL_LCD_PROTO 343 #ifdef CONFIG_PANEL_LCD_PROTO
344 #undef DEFAULT_LCD_PROTO 344 #undef DEFAULT_LCD_PROTO
345 #define DEFAULT_LCD_PROTO CONFIG_PANEL_LCD_PROTO 345 #define DEFAULT_LCD_PROTO CONFIG_PANEL_LCD_PROTO
346 #endif 346 #endif
347 347
348 #ifdef CONFIG_PANEL_LCD_PIN_E 348 #ifdef CONFIG_PANEL_LCD_PIN_E
349 #undef DEFAULT_LCD_PIN_E 349 #undef DEFAULT_LCD_PIN_E
350 #define DEFAULT_LCD_PIN_E CONFIG_PANEL_LCD_PIN_E 350 #define DEFAULT_LCD_PIN_E CONFIG_PANEL_LCD_PIN_E
351 #endif 351 #endif
352 352
353 #ifdef CONFIG_PANEL_LCD_PIN_RS 353 #ifdef CONFIG_PANEL_LCD_PIN_RS
354 #undef DEFAULT_LCD_PIN_RS 354 #undef DEFAULT_LCD_PIN_RS
355 #define DEFAULT_LCD_PIN_RS CONFIG_PANEL_LCD_PIN_RS 355 #define DEFAULT_LCD_PIN_RS CONFIG_PANEL_LCD_PIN_RS
356 #endif 356 #endif
357 357
358 #ifdef CONFIG_PANEL_LCD_PIN_RW 358 #ifdef CONFIG_PANEL_LCD_PIN_RW
359 #undef DEFAULT_LCD_PIN_RW 359 #undef DEFAULT_LCD_PIN_RW
360 #define DEFAULT_LCD_PIN_RW CONFIG_PANEL_LCD_PIN_RW 360 #define DEFAULT_LCD_PIN_RW CONFIG_PANEL_LCD_PIN_RW
361 #endif 361 #endif
362 362
363 #ifdef CONFIG_PANEL_LCD_PIN_SCL 363 #ifdef CONFIG_PANEL_LCD_PIN_SCL
364 #undef DEFAULT_LCD_PIN_SCL 364 #undef DEFAULT_LCD_PIN_SCL
365 #define DEFAULT_LCD_PIN_SCL CONFIG_PANEL_LCD_PIN_SCL 365 #define DEFAULT_LCD_PIN_SCL CONFIG_PANEL_LCD_PIN_SCL
366 #endif 366 #endif
367 367
368 #ifdef CONFIG_PANEL_LCD_PIN_SDA 368 #ifdef CONFIG_PANEL_LCD_PIN_SDA
369 #undef DEFAULT_LCD_PIN_SDA 369 #undef DEFAULT_LCD_PIN_SDA
370 #define DEFAULT_LCD_PIN_SDA CONFIG_PANEL_LCD_PIN_SDA 370 #define DEFAULT_LCD_PIN_SDA CONFIG_PANEL_LCD_PIN_SDA
371 #endif 371 #endif
372 372
373 #ifdef CONFIG_PANEL_LCD_PIN_BL 373 #ifdef CONFIG_PANEL_LCD_PIN_BL
374 #undef DEFAULT_LCD_PIN_BL 374 #undef DEFAULT_LCD_PIN_BL
375 #define DEFAULT_LCD_PIN_BL CONFIG_PANEL_LCD_PIN_BL 375 #define DEFAULT_LCD_PIN_BL CONFIG_PANEL_LCD_PIN_BL
376 #endif 376 #endif
377 377
378 #ifdef CONFIG_PANEL_LCD_CHARSET 378 #ifdef CONFIG_PANEL_LCD_CHARSET
379 #undef DEFAULT_LCD_CHARSET 379 #undef DEFAULT_LCD_CHARSET
380 #define DEFAULT_LCD_CHARSET 380 #define DEFAULT_LCD_CHARSET
381 #endif 381 #endif
382 382
383 #endif /* DEFAULT_PROFILE == 0 */ 383 #endif /* DEFAULT_PROFILE == 0 */
384 384
385 /* global variables */ 385 /* global variables */
386 static int keypad_open_cnt; /* #times opened */ 386 static int keypad_open_cnt; /* #times opened */
387 static int lcd_open_cnt; /* #times opened */ 387 static int lcd_open_cnt; /* #times opened */
388 static struct pardevice *pprt; 388 static struct pardevice *pprt;
389 389
390 static int lcd_initialized; 390 static int lcd_initialized;
391 static int keypad_initialized; 391 static int keypad_initialized;
392 392
393 static int light_tempo; 393 static int light_tempo;
394 394
395 static char lcd_must_clear; 395 static char lcd_must_clear;
396 static char lcd_left_shift; 396 static char lcd_left_shift;
397 static char init_in_progress; 397 static char init_in_progress;
398 398
399 static void (*lcd_write_cmd) (int); 399 static void (*lcd_write_cmd) (int);
400 static void (*lcd_write_data) (int); 400 static void (*lcd_write_data) (int);
401 static void (*lcd_clear_fast) (void); 401 static void (*lcd_clear_fast) (void);
402 402
403 static DEFINE_SPINLOCK(pprt_lock); 403 static DEFINE_SPINLOCK(pprt_lock);
404 static struct timer_list scan_timer; 404 static struct timer_list scan_timer;
405 405
406 MODULE_DESCRIPTION("Generic parallel port LCD/Keypad driver"); 406 MODULE_DESCRIPTION("Generic parallel port LCD/Keypad driver");
407 407
408 static int parport = -1; 408 static int parport = -1;
409 module_param(parport, int, 0000); 409 module_param(parport, int, 0000);
410 MODULE_PARM_DESC(parport, "Parallel port index (0=lpt1, 1=lpt2, ...)"); 410 MODULE_PARM_DESC(parport, "Parallel port index (0=lpt1, 1=lpt2, ...)");
411 411
412 static int lcd_height = -1; 412 static int lcd_height = -1;
413 module_param(lcd_height, int, 0000); 413 module_param(lcd_height, int, 0000);
414 MODULE_PARM_DESC(lcd_height, "Number of lines on the LCD"); 414 MODULE_PARM_DESC(lcd_height, "Number of lines on the LCD");
415 415
416 static int lcd_width = -1; 416 static int lcd_width = -1;
417 module_param(lcd_width, int, 0000); 417 module_param(lcd_width, int, 0000);
418 MODULE_PARM_DESC(lcd_width, "Number of columns on the LCD"); 418 MODULE_PARM_DESC(lcd_width, "Number of columns on the LCD");
419 419
420 static int lcd_bwidth = -1; /* internal buffer width (usually 40) */ 420 static int lcd_bwidth = -1; /* internal buffer width (usually 40) */
421 module_param(lcd_bwidth, int, 0000); 421 module_param(lcd_bwidth, int, 0000);
422 MODULE_PARM_DESC(lcd_bwidth, "Internal LCD line width (40)"); 422 MODULE_PARM_DESC(lcd_bwidth, "Internal LCD line width (40)");
423 423
424 static int lcd_hwidth = -1; /* hardware buffer width (usually 64) */ 424 static int lcd_hwidth = -1; /* hardware buffer width (usually 64) */
425 module_param(lcd_hwidth, int, 0000); 425 module_param(lcd_hwidth, int, 0000);
426 MODULE_PARM_DESC(lcd_hwidth, "LCD line hardware address (64)"); 426 MODULE_PARM_DESC(lcd_hwidth, "LCD line hardware address (64)");
427 427
428 static int lcd_enabled = -1; 428 static int lcd_enabled = -1;
429 module_param(lcd_enabled, int, 0000); 429 module_param(lcd_enabled, int, 0000);
430 MODULE_PARM_DESC(lcd_enabled, "Deprecated option, use lcd_type instead"); 430 MODULE_PARM_DESC(lcd_enabled, "Deprecated option, use lcd_type instead");
431 431
432 static int keypad_enabled = -1; 432 static int keypad_enabled = -1;
433 module_param(keypad_enabled, int, 0000); 433 module_param(keypad_enabled, int, 0000);
434 MODULE_PARM_DESC(keypad_enabled, "Deprecated option, use keypad_type instead"); 434 MODULE_PARM_DESC(keypad_enabled, "Deprecated option, use keypad_type instead");
435 435
436 static int lcd_type = -1; 436 static int lcd_type = -1;
437 module_param(lcd_type, int, 0000); 437 module_param(lcd_type, int, 0000);
438 MODULE_PARM_DESC(lcd_type, 438 MODULE_PARM_DESC(lcd_type,
439 "LCD type: 0=none, 1=old //, 2=serial ks0074, 3=hantronix //, 4=nexcom //, 5=compiled-in"); 439 "LCD type: 0=none, 1=old //, 2=serial ks0074, 3=hantronix //, 4=nexcom //, 5=compiled-in");
440 440
441 static int lcd_proto = -1; 441 static int lcd_proto = -1;
442 module_param(lcd_proto, int, 0000); 442 module_param(lcd_proto, int, 0000);
443 MODULE_PARM_DESC(lcd_proto, "LCD communication: 0=parallel (//), 1=serial"); 443 MODULE_PARM_DESC(lcd_proto, "LCD communication: 0=parallel (//), 1=serial");
444 444
445 static int lcd_charset = -1; 445 static int lcd_charset = -1;
446 module_param(lcd_charset, int, 0000); 446 module_param(lcd_charset, int, 0000);
447 MODULE_PARM_DESC(lcd_charset, "LCD character set: 0=standard, 1=KS0074"); 447 MODULE_PARM_DESC(lcd_charset, "LCD character set: 0=standard, 1=KS0074");
448 448
449 static int keypad_type = -1; 449 static int keypad_type = -1;
450 module_param(keypad_type, int, 0000); 450 module_param(keypad_type, int, 0000);
451 MODULE_PARM_DESC(keypad_type, 451 MODULE_PARM_DESC(keypad_type,
452 "Keypad type: 0=none, 1=old 6 keys, 2=new 6+1 keys, 3=nexcom 4 keys"); 452 "Keypad type: 0=none, 1=old 6 keys, 2=new 6+1 keys, 3=nexcom 4 keys");
453 453
454 static int profile = DEFAULT_PROFILE; 454 static int profile = DEFAULT_PROFILE;
455 module_param(profile, int, 0000); 455 module_param(profile, int, 0000);
456 MODULE_PARM_DESC(profile, 456 MODULE_PARM_DESC(profile,
457 "1=16x2 old kp; 2=serial 16x2, new kp; 3=16x2 hantronix; 4=16x2 nexcom; default=40x2, old kp"); 457 "1=16x2 old kp; 2=serial 16x2, new kp; 3=16x2 hantronix; 4=16x2 nexcom; default=40x2, old kp");
458 458
459 /* 459 /*
460 * These are the parallel port pins the LCD control signals are connected to. 460 * These are the parallel port pins the LCD control signals are connected to.
461 * Set this to 0 if the signal is not used. Set it to its opposite value 461 * Set this to 0 if the signal is not used. Set it to its opposite value
462 * (negative) if the signal is negated. -MAXINT is used to indicate that the 462 * (negative) if the signal is negated. -MAXINT is used to indicate that the
463 * pin has not been explicitly specified. 463 * pin has not been explicitly specified.
464 * 464 *
465 * WARNING! no check will be performed about collisions with keypad ! 465 * WARNING! no check will be performed about collisions with keypad !
466 */ 466 */
467 467
468 static int lcd_e_pin = PIN_NOT_SET; 468 static int lcd_e_pin = PIN_NOT_SET;
469 module_param(lcd_e_pin, int, 0000); 469 module_param(lcd_e_pin, int, 0000);
470 MODULE_PARM_DESC(lcd_e_pin, 470 MODULE_PARM_DESC(lcd_e_pin,
471 "# of the // port pin connected to LCD 'E' signal, with polarity (-17..17)"); 471 "# of the // port pin connected to LCD 'E' signal, with polarity (-17..17)");
472 472
473 static int lcd_rs_pin = PIN_NOT_SET; 473 static int lcd_rs_pin = PIN_NOT_SET;
474 module_param(lcd_rs_pin, int, 0000); 474 module_param(lcd_rs_pin, int, 0000);
475 MODULE_PARM_DESC(lcd_rs_pin, 475 MODULE_PARM_DESC(lcd_rs_pin,
476 "# of the // port pin connected to LCD 'RS' signal, with polarity (-17..17)"); 476 "# of the // port pin connected to LCD 'RS' signal, with polarity (-17..17)");
477 477
478 static int lcd_rw_pin = PIN_NOT_SET; 478 static int lcd_rw_pin = PIN_NOT_SET;
479 module_param(lcd_rw_pin, int, 0000); 479 module_param(lcd_rw_pin, int, 0000);
480 MODULE_PARM_DESC(lcd_rw_pin, 480 MODULE_PARM_DESC(lcd_rw_pin,
481 "# of the // port pin connected to LCD 'RW' signal, with polarity (-17..17)"); 481 "# of the // port pin connected to LCD 'RW' signal, with polarity (-17..17)");
482 482
483 static int lcd_bl_pin = PIN_NOT_SET; 483 static int lcd_bl_pin = PIN_NOT_SET;
484 module_param(lcd_bl_pin, int, 0000); 484 module_param(lcd_bl_pin, int, 0000);
485 MODULE_PARM_DESC(lcd_bl_pin, 485 MODULE_PARM_DESC(lcd_bl_pin,
486 "# of the // port pin connected to LCD backlight, with polarity (-17..17)"); 486 "# of the // port pin connected to LCD backlight, with polarity (-17..17)");
487 487
488 static int lcd_da_pin = PIN_NOT_SET; 488 static int lcd_da_pin = PIN_NOT_SET;
489 module_param(lcd_da_pin, int, 0000); 489 module_param(lcd_da_pin, int, 0000);
490 MODULE_PARM_DESC(lcd_da_pin, 490 MODULE_PARM_DESC(lcd_da_pin,
491 "# of the // port pin connected to serial LCD 'SDA' signal, with polarity (-17..17)"); 491 "# of the // port pin connected to serial LCD 'SDA' signal, with polarity (-17..17)");
492 492
493 static int lcd_cl_pin = PIN_NOT_SET; 493 static int lcd_cl_pin = PIN_NOT_SET;
494 module_param(lcd_cl_pin, int, 0000); 494 module_param(lcd_cl_pin, int, 0000);
495 MODULE_PARM_DESC(lcd_cl_pin, 495 MODULE_PARM_DESC(lcd_cl_pin,
496 "# of the // port pin connected to serial LCD 'SCL' signal, with polarity (-17..17)"); 496 "# of the // port pin connected to serial LCD 'SCL' signal, with polarity (-17..17)");
497 497
498 static unsigned char *lcd_char_conv; 498 static unsigned char *lcd_char_conv;
499 499
500 /* for some LCD drivers (ks0074) we need a charset conversion table. */ 500 /* for some LCD drivers (ks0074) we need a charset conversion table. */
501 static unsigned char lcd_char_conv_ks0074[256] = { 501 static unsigned char lcd_char_conv_ks0074[256] = {
502 /* 0|8 1|9 2|A 3|B 4|C 5|D 6|E 7|F */ 502 /* 0|8 1|9 2|A 3|B 4|C 5|D 6|E 7|F */
503 /* 0x00 */ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 503 /* 0x00 */ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
504 /* 0x08 */ 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 504 /* 0x08 */ 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
505 /* 0x10 */ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 505 /* 0x10 */ 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
506 /* 0x18 */ 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 506 /* 0x18 */ 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
507 /* 0x20 */ 0x20, 0x21, 0x22, 0x23, 0xa2, 0x25, 0x26, 0x27, 507 /* 0x20 */ 0x20, 0x21, 0x22, 0x23, 0xa2, 0x25, 0x26, 0x27,
508 /* 0x28 */ 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 508 /* 0x28 */ 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
509 /* 0x30 */ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 509 /* 0x30 */ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
510 /* 0x38 */ 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, 510 /* 0x38 */ 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
511 /* 0x40 */ 0xa0, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 511 /* 0x40 */ 0xa0, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
512 /* 0x48 */ 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 512 /* 0x48 */ 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
513 /* 0x50 */ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 513 /* 0x50 */ 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
514 /* 0x58 */ 0x58, 0x59, 0x5a, 0xfa, 0xfb, 0xfc, 0x1d, 0xc4, 514 /* 0x58 */ 0x58, 0x59, 0x5a, 0xfa, 0xfb, 0xfc, 0x1d, 0xc4,
515 /* 0x60 */ 0x96, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 515 /* 0x60 */ 0x96, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
516 /* 0x68 */ 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 516 /* 0x68 */ 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
517 /* 0x70 */ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 517 /* 0x70 */ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
518 /* 0x78 */ 0x78, 0x79, 0x7a, 0xfd, 0xfe, 0xff, 0xce, 0x20, 518 /* 0x78 */ 0x78, 0x79, 0x7a, 0xfd, 0xfe, 0xff, 0xce, 0x20,
519 /* 0x80 */ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 519 /* 0x80 */ 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
520 /* 0x88 */ 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 520 /* 0x88 */ 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
521 /* 0x90 */ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 521 /* 0x90 */ 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
522 /* 0x98 */ 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 522 /* 0x98 */ 0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
523 /* 0xA0 */ 0x20, 0x40, 0xb1, 0xa1, 0x24, 0xa3, 0xfe, 0x5f, 523 /* 0xA0 */ 0x20, 0x40, 0xb1, 0xa1, 0x24, 0xa3, 0xfe, 0x5f,
524 /* 0xA8 */ 0x22, 0xc8, 0x61, 0x14, 0x97, 0x2d, 0xad, 0x96, 524 /* 0xA8 */ 0x22, 0xc8, 0x61, 0x14, 0x97, 0x2d, 0xad, 0x96,
525 /* 0xB0 */ 0x80, 0x8c, 0x82, 0x83, 0x27, 0x8f, 0x86, 0xdd, 525 /* 0xB0 */ 0x80, 0x8c, 0x82, 0x83, 0x27, 0x8f, 0x86, 0xdd,
526 /* 0xB8 */ 0x2c, 0x81, 0x6f, 0x15, 0x8b, 0x8a, 0x84, 0x60, 526 /* 0xB8 */ 0x2c, 0x81, 0x6f, 0x15, 0x8b, 0x8a, 0x84, 0x60,
527 /* 0xC0 */ 0xe2, 0xe2, 0xe2, 0x5b, 0x5b, 0xae, 0xbc, 0xa9, 527 /* 0xC0 */ 0xe2, 0xe2, 0xe2, 0x5b, 0x5b, 0xae, 0xbc, 0xa9,
528 /* 0xC8 */ 0xc5, 0xbf, 0xc6, 0xf1, 0xe3, 0xe3, 0xe3, 0xe3, 528 /* 0xC8 */ 0xc5, 0xbf, 0xc6, 0xf1, 0xe3, 0xe3, 0xe3, 0xe3,
529 /* 0xD0 */ 0x44, 0x5d, 0xa8, 0xe4, 0xec, 0xec, 0x5c, 0x78, 529 /* 0xD0 */ 0x44, 0x5d, 0xa8, 0xe4, 0xec, 0xec, 0x5c, 0x78,
530 /* 0xD8 */ 0xab, 0xa6, 0xe5, 0x5e, 0x5e, 0xe6, 0xaa, 0xbe, 530 /* 0xD8 */ 0xab, 0xa6, 0xe5, 0x5e, 0x5e, 0xe6, 0xaa, 0xbe,
531 /* 0xE0 */ 0x7f, 0xe7, 0xaf, 0x7b, 0x7b, 0xaf, 0xbd, 0xc8, 531 /* 0xE0 */ 0x7f, 0xe7, 0xaf, 0x7b, 0x7b, 0xaf, 0xbd, 0xc8,
532 /* 0xE8 */ 0xa4, 0xa5, 0xc7, 0xf6, 0xa7, 0xe8, 0x69, 0x69, 532 /* 0xE8 */ 0xa4, 0xa5, 0xc7, 0xf6, 0xa7, 0xe8, 0x69, 0x69,
533 /* 0xF0 */ 0xed, 0x7d, 0xa8, 0xe4, 0xec, 0x5c, 0x5c, 0x25, 533 /* 0xF0 */ 0xed, 0x7d, 0xa8, 0xe4, 0xec, 0x5c, 0x5c, 0x25,
534 /* 0xF8 */ 0xac, 0xa6, 0xea, 0xef, 0x7e, 0xeb, 0xb2, 0x79, 534 /* 0xF8 */ 0xac, 0xa6, 0xea, 0xef, 0x7e, 0xeb, 0xb2, 0x79,
535 }; 535 };
536 536
537 char old_keypad_profile[][4][9] = { 537 char old_keypad_profile[][4][9] = {
538 {"S0", "Left\n", "Left\n", ""}, 538 {"S0", "Left\n", "Left\n", ""},
539 {"S1", "Down\n", "Down\n", ""}, 539 {"S1", "Down\n", "Down\n", ""},
540 {"S2", "Up\n", "Up\n", ""}, 540 {"S2", "Up\n", "Up\n", ""},
541 {"S3", "Right\n", "Right\n", ""}, 541 {"S3", "Right\n", "Right\n", ""},
542 {"S4", "Esc\n", "Esc\n", ""}, 542 {"S4", "Esc\n", "Esc\n", ""},
543 {"S5", "Ret\n", "Ret\n", ""}, 543 {"S5", "Ret\n", "Ret\n", ""},
544 {"", "", "", ""} 544 {"", "", "", ""}
545 }; 545 };
546 546
547 /* signals, press, repeat, release */ 547 /* signals, press, repeat, release */
548 char new_keypad_profile[][4][9] = { 548 char new_keypad_profile[][4][9] = {
549 {"S0", "Left\n", "Left\n", ""}, 549 {"S0", "Left\n", "Left\n", ""},
550 {"S1", "Down\n", "Down\n", ""}, 550 {"S1", "Down\n", "Down\n", ""},
551 {"S2", "Up\n", "Up\n", ""}, 551 {"S2", "Up\n", "Up\n", ""},
552 {"S3", "Right\n", "Right\n", ""}, 552 {"S3", "Right\n", "Right\n", ""},
553 {"S4s5", "", "Esc\n", "Esc\n"}, 553 {"S4s5", "", "Esc\n", "Esc\n"},
554 {"s4S5", "", "Ret\n", "Ret\n"}, 554 {"s4S5", "", "Ret\n", "Ret\n"},
555 {"S4S5", "Help\n", "", ""}, 555 {"S4S5", "Help\n", "", ""},
556 /* add new signals above this line */ 556 /* add new signals above this line */
557 {"", "", "", ""} 557 {"", "", "", ""}
558 }; 558 };
559 559
560 /* signals, press, repeat, release */ 560 /* signals, press, repeat, release */
561 char nexcom_keypad_profile[][4][9] = { 561 char nexcom_keypad_profile[][4][9] = {
562 {"a-p-e-", "Down\n", "Down\n", ""}, 562 {"a-p-e-", "Down\n", "Down\n", ""},
563 {"a-p-E-", "Ret\n", "Ret\n", ""}, 563 {"a-p-E-", "Ret\n", "Ret\n", ""},
564 {"a-P-E-", "Esc\n", "Esc\n", ""}, 564 {"a-P-E-", "Esc\n", "Esc\n", ""},
565 {"a-P-e-", "Up\n", "Up\n", ""}, 565 {"a-P-e-", "Up\n", "Up\n", ""},
566 /* add new signals above this line */ 566 /* add new signals above this line */
567 {"", "", "", ""} 567 {"", "", "", ""}
568 }; 568 };
569 569
570 static char (*keypad_profile)[4][9] = old_keypad_profile; 570 static char (*keypad_profile)[4][9] = old_keypad_profile;
571 571
572 /* FIXME: this should be converted to a bit array containing signals states */ 572 /* FIXME: this should be converted to a bit array containing signals states */
573 static struct { 573 static struct {
574 unsigned char e; /* parallel LCD E (data latch on falling edge) */ 574 unsigned char e; /* parallel LCD E (data latch on falling edge) */
575 unsigned char rs; /* parallel LCD RS (0 = cmd, 1 = data) */ 575 unsigned char rs; /* parallel LCD RS (0 = cmd, 1 = data) */
576 unsigned char rw; /* parallel LCD R/W (0 = W, 1 = R) */ 576 unsigned char rw; /* parallel LCD R/W (0 = W, 1 = R) */
577 unsigned char bl; /* parallel LCD backlight (0 = off, 1 = on) */ 577 unsigned char bl; /* parallel LCD backlight (0 = off, 1 = on) */
578 unsigned char cl; /* serial LCD clock (latch on rising edge) */ 578 unsigned char cl; /* serial LCD clock (latch on rising edge) */
579 unsigned char da; /* serial LCD data */ 579 unsigned char da; /* serial LCD data */
580 } bits; 580 } bits;
581 581
582 static void init_scan_timer(void); 582 static void init_scan_timer(void);
583 583
584 /* sets data port bits according to current signals values */ 584 /* sets data port bits according to current signals values */
585 static int set_data_bits(void) 585 static int set_data_bits(void)
586 { 586 {
587 int val, bit; 587 int val, bit;
588 588
589 val = r_dtr(pprt); 589 val = r_dtr(pprt);
590 for (bit = 0; bit < LCD_BITS; bit++) 590 for (bit = 0; bit < LCD_BITS; bit++)
591 val &= lcd_bits[LCD_PORT_D][bit][BIT_MSK]; 591 val &= lcd_bits[LCD_PORT_D][bit][BIT_MSK];
592 592
593 val |= lcd_bits[LCD_PORT_D][LCD_BIT_E][bits.e] 593 val |= lcd_bits[LCD_PORT_D][LCD_BIT_E][bits.e]
594 | lcd_bits[LCD_PORT_D][LCD_BIT_RS][bits.rs] 594 | lcd_bits[LCD_PORT_D][LCD_BIT_RS][bits.rs]
595 | lcd_bits[LCD_PORT_D][LCD_BIT_RW][bits.rw] 595 | lcd_bits[LCD_PORT_D][LCD_BIT_RW][bits.rw]
596 | lcd_bits[LCD_PORT_D][LCD_BIT_BL][bits.bl] 596 | lcd_bits[LCD_PORT_D][LCD_BIT_BL][bits.bl]
597 | lcd_bits[LCD_PORT_D][LCD_BIT_CL][bits.cl] 597 | lcd_bits[LCD_PORT_D][LCD_BIT_CL][bits.cl]
598 | lcd_bits[LCD_PORT_D][LCD_BIT_DA][bits.da]; 598 | lcd_bits[LCD_PORT_D][LCD_BIT_DA][bits.da];
599 599
600 w_dtr(pprt, val); 600 w_dtr(pprt, val);
601 return val; 601 return val;
602 } 602 }
603 603
604 /* sets ctrl port bits according to current signals values */ 604 /* sets ctrl port bits according to current signals values */
605 static int set_ctrl_bits(void) 605 static int set_ctrl_bits(void)
606 { 606 {
607 int val, bit; 607 int val, bit;
608 608
609 val = r_ctr(pprt); 609 val = r_ctr(pprt);
610 for (bit = 0; bit < LCD_BITS; bit++) 610 for (bit = 0; bit < LCD_BITS; bit++)
611 val &= lcd_bits[LCD_PORT_C][bit][BIT_MSK]; 611 val &= lcd_bits[LCD_PORT_C][bit][BIT_MSK];
612 612
613 val |= lcd_bits[LCD_PORT_C][LCD_BIT_E][bits.e] 613 val |= lcd_bits[LCD_PORT_C][LCD_BIT_E][bits.e]
614 | lcd_bits[LCD_PORT_C][LCD_BIT_RS][bits.rs] 614 | lcd_bits[LCD_PORT_C][LCD_BIT_RS][bits.rs]
615 | lcd_bits[LCD_PORT_C][LCD_BIT_RW][bits.rw] 615 | lcd_bits[LCD_PORT_C][LCD_BIT_RW][bits.rw]
616 | lcd_bits[LCD_PORT_C][LCD_BIT_BL][bits.bl] 616 | lcd_bits[LCD_PORT_C][LCD_BIT_BL][bits.bl]
617 | lcd_bits[LCD_PORT_C][LCD_BIT_CL][bits.cl] 617 | lcd_bits[LCD_PORT_C][LCD_BIT_CL][bits.cl]
618 | lcd_bits[LCD_PORT_C][LCD_BIT_DA][bits.da]; 618 | lcd_bits[LCD_PORT_C][LCD_BIT_DA][bits.da];
619 619
620 w_ctr(pprt, val); 620 w_ctr(pprt, val);
621 return val; 621 return val;
622 } 622 }
623 623
624 /* sets ctrl & data port bits according to current signals values */ 624 /* sets ctrl & data port bits according to current signals values */
625 static void panel_set_bits(void) 625 static void panel_set_bits(void)
626 { 626 {
627 set_data_bits(); 627 set_data_bits();
628 set_ctrl_bits(); 628 set_ctrl_bits();
629 } 629 }
630 630
631 /* 631 /*
632 * Converts a parallel port pin (from -25 to 25) to data and control ports 632 * Converts a parallel port pin (from -25 to 25) to data and control ports
633 * masks, and data and control port bits. The signal will be considered 633 * masks, and data and control port bits. The signal will be considered
634 * unconnected if it's on pin 0 or an invalid pin (<-25 or >25). 634 * unconnected if it's on pin 0 or an invalid pin (<-25 or >25).
635 * 635 *
636 * Result will be used this way : 636 * Result will be used this way :
637 * out(dport, in(dport) & d_val[2] | d_val[signal_state]) 637 * out(dport, in(dport) & d_val[2] | d_val[signal_state])
638 * out(cport, in(cport) & c_val[2] | c_val[signal_state]) 638 * out(cport, in(cport) & c_val[2] | c_val[signal_state])
639 */ 639 */
640 void pin_to_bits(int pin, unsigned char *d_val, unsigned char *c_val) 640 void pin_to_bits(int pin, unsigned char *d_val, unsigned char *c_val)
641 { 641 {
642 int d_bit, c_bit, inv; 642 int d_bit, c_bit, inv;
643 643
644 d_val[0] = c_val[0] = d_val[1] = c_val[1] = 0; 644 d_val[0] = c_val[0] = d_val[1] = c_val[1] = 0;
645 d_val[2] = c_val[2] = 0xFF; 645 d_val[2] = c_val[2] = 0xFF;
646 646
647 if (pin == 0) 647 if (pin == 0)
648 return; 648 return;
649 649
650 inv = (pin < 0); 650 inv = (pin < 0);
651 if (inv) 651 if (inv)
652 pin = -pin; 652 pin = -pin;
653 653
654 d_bit = c_bit = 0; 654 d_bit = c_bit = 0;
655 655
656 switch (pin) { 656 switch (pin) {
657 case PIN_STROBE: /* strobe, inverted */ 657 case PIN_STROBE: /* strobe, inverted */
658 c_bit = PNL_PSTROBE; 658 c_bit = PNL_PSTROBE;
659 inv = !inv; 659 inv = !inv;
660 break; 660 break;
661 case PIN_D0...PIN_D7: /* D0 - D7 = 2 - 9 */ 661 case PIN_D0...PIN_D7: /* D0 - D7 = 2 - 9 */
662 d_bit = 1 << (pin - 2); 662 d_bit = 1 << (pin - 2);
663 break; 663 break;
664 case PIN_AUTOLF: /* autofeed, inverted */ 664 case PIN_AUTOLF: /* autofeed, inverted */
665 c_bit = PNL_PAUTOLF; 665 c_bit = PNL_PAUTOLF;
666 inv = !inv; 666 inv = !inv;
667 break; 667 break;
668 case PIN_INITP: /* init, direct */ 668 case PIN_INITP: /* init, direct */
669 c_bit = PNL_PINITP; 669 c_bit = PNL_PINITP;
670 break; 670 break;
671 case PIN_SELECP: /* select_in, inverted */ 671 case PIN_SELECP: /* select_in, inverted */
672 c_bit = PNL_PSELECP; 672 c_bit = PNL_PSELECP;
673 inv = !inv; 673 inv = !inv;
674 break; 674 break;
675 default: /* unknown pin, ignore */ 675 default: /* unknown pin, ignore */
676 break; 676 break;
677 } 677 }
678 678
679 if (c_bit) { 679 if (c_bit) {
680 c_val[2] &= ~c_bit; 680 c_val[2] &= ~c_bit;
681 c_val[!inv] = c_bit; 681 c_val[!inv] = c_bit;
682 } else if (d_bit) { 682 } else if (d_bit) {
683 d_val[2] &= ~d_bit; 683 d_val[2] &= ~d_bit;
684 d_val[!inv] = d_bit; 684 d_val[!inv] = d_bit;
685 } 685 }
686 } 686 }
687 687
688 /* sleeps that many milliseconds with a reschedule */ 688 /* sleeps that many milliseconds with a reschedule */
689 static void long_sleep(int ms) 689 static void long_sleep(int ms)
690 { 690 {
691 691
692 if (in_interrupt()) 692 if (in_interrupt())
693 mdelay(ms); 693 mdelay(ms);
694 else { 694 else {
695 current->state = TASK_INTERRUPTIBLE; 695 current->state = TASK_INTERRUPTIBLE;
696 schedule_timeout((ms * HZ + 999) / 1000); 696 schedule_timeout((ms * HZ + 999) / 1000);
697 } 697 }
698 } 698 }
699 699
700 /* send a serial byte to the LCD panel. The caller is responsible for locking if needed. */ 700 /* send a serial byte to the LCD panel. The caller is responsible for locking if needed. */
701 static void lcd_send_serial(int byte) 701 static void lcd_send_serial(int byte)
702 { 702 {
703 int bit; 703 int bit;
704 704
705 /* the data bit is set on D0, and the clock on STROBE. 705 /* the data bit is set on D0, and the clock on STROBE.
706 * LCD reads D0 on STROBE's rising edge. 706 * LCD reads D0 on STROBE's rising edge.
707 */ 707 */
708 for (bit = 0; bit < 8; bit++) { 708 for (bit = 0; bit < 8; bit++) {
709 bits.cl = BIT_CLR; /* CLK low */ 709 bits.cl = BIT_CLR; /* CLK low */
710 panel_set_bits(); 710 panel_set_bits();
711 bits.da = byte & 1; 711 bits.da = byte & 1;
712 panel_set_bits(); 712 panel_set_bits();
713 udelay(2); /* maintain the data during 2 us before CLK up */ 713 udelay(2); /* maintain the data during 2 us before CLK up */
714 bits.cl = BIT_SET; /* CLK high */ 714 bits.cl = BIT_SET; /* CLK high */
715 panel_set_bits(); 715 panel_set_bits();
716 udelay(1); /* maintain the strobe during 1 us */ 716 udelay(1); /* maintain the strobe during 1 us */
717 byte >>= 1; 717 byte >>= 1;
718 } 718 }
719 } 719 }
720 720
721 /* turn the backlight on or off */ 721 /* turn the backlight on or off */
722 static void lcd_backlight(int on) 722 static void lcd_backlight(int on)
723 { 723 {
724 if (lcd_bl_pin == PIN_NONE) 724 if (lcd_bl_pin == PIN_NONE)
725 return; 725 return;
726 726
727 /* The backlight is activated by seting the AUTOFEED line to +5V */ 727 /* The backlight is activated by seting the AUTOFEED line to +5V */
728 spin_lock(&pprt_lock); 728 spin_lock(&pprt_lock);
729 bits.bl = on; 729 bits.bl = on;
730 panel_set_bits(); 730 panel_set_bits();
731 spin_unlock(&pprt_lock); 731 spin_unlock(&pprt_lock);
732 } 732 }
733 733
734 /* send a command to the LCD panel in serial mode */ 734 /* send a command to the LCD panel in serial mode */
735 static void lcd_write_cmd_s(int cmd) 735 static void lcd_write_cmd_s(int cmd)
736 { 736 {
737 spin_lock(&pprt_lock); 737 spin_lock(&pprt_lock);
738 lcd_send_serial(0x1F); /* R/W=W, RS=0 */ 738 lcd_send_serial(0x1F); /* R/W=W, RS=0 */
739 lcd_send_serial(cmd & 0x0F); 739 lcd_send_serial(cmd & 0x0F);
740 lcd_send_serial((cmd >> 4) & 0x0F); 740 lcd_send_serial((cmd >> 4) & 0x0F);
741 udelay(40); /* the shortest command takes at least 40 us */ 741 udelay(40); /* the shortest command takes at least 40 us */
742 spin_unlock(&pprt_lock); 742 spin_unlock(&pprt_lock);
743 } 743 }
744 744
745 /* send data to the LCD panel in serial mode */ 745 /* send data to the LCD panel in serial mode */
746 static void lcd_write_data_s(int data) 746 static void lcd_write_data_s(int data)
747 { 747 {
748 spin_lock(&pprt_lock); 748 spin_lock(&pprt_lock);
749 lcd_send_serial(0x5F); /* R/W=W, RS=1 */ 749 lcd_send_serial(0x5F); /* R/W=W, RS=1 */
750 lcd_send_serial(data & 0x0F); 750 lcd_send_serial(data & 0x0F);
751 lcd_send_serial((data >> 4) & 0x0F); 751 lcd_send_serial((data >> 4) & 0x0F);
752 udelay(40); /* the shortest data takes at least 40 us */ 752 udelay(40); /* the shortest data takes at least 40 us */
753 spin_unlock(&pprt_lock); 753 spin_unlock(&pprt_lock);
754 } 754 }
755 755
756 /* send a command to the LCD panel in 8 bits parallel mode */ 756 /* send a command to the LCD panel in 8 bits parallel mode */
757 static void lcd_write_cmd_p8(int cmd) 757 static void lcd_write_cmd_p8(int cmd)
758 { 758 {
759 spin_lock(&pprt_lock); 759 spin_lock(&pprt_lock);
760 /* present the data to the data port */ 760 /* present the data to the data port */
761 w_dtr(pprt, cmd); 761 w_dtr(pprt, cmd);
762 udelay(20); /* maintain the data during 20 us before the strobe */ 762 udelay(20); /* maintain the data during 20 us before the strobe */
763 763
764 bits.e = BIT_SET; 764 bits.e = BIT_SET;
765 bits.rs = BIT_CLR; 765 bits.rs = BIT_CLR;
766 bits.rw = BIT_CLR; 766 bits.rw = BIT_CLR;
767 set_ctrl_bits(); 767 set_ctrl_bits();
768 768
769 udelay(40); /* maintain the strobe during 40 us */ 769 udelay(40); /* maintain the strobe during 40 us */
770 770
771 bits.e = BIT_CLR; 771 bits.e = BIT_CLR;
772 set_ctrl_bits(); 772 set_ctrl_bits();
773 773
774 udelay(120); /* the shortest command takes at least 120 us */ 774 udelay(120); /* the shortest command takes at least 120 us */
775 spin_unlock(&pprt_lock); 775 spin_unlock(&pprt_lock);
776 } 776 }
777 777
778 /* send data to the LCD panel in 8 bits parallel mode */ 778 /* send data to the LCD panel in 8 bits parallel mode */
779 static void lcd_write_data_p8(int data) 779 static void lcd_write_data_p8(int data)
780 { 780 {
781 spin_lock(&pprt_lock); 781 spin_lock(&pprt_lock);
782 /* present the data to the data port */ 782 /* present the data to the data port */
783 w_dtr(pprt, data); 783 w_dtr(pprt, data);
784 udelay(20); /* maintain the data during 20 us before the strobe */ 784 udelay(20); /* maintain the data during 20 us before the strobe */
785 785
786 bits.e = BIT_SET; 786 bits.e = BIT_SET;
787 bits.rs = BIT_SET; 787 bits.rs = BIT_SET;
788 bits.rw = BIT_CLR; 788 bits.rw = BIT_CLR;
789 set_ctrl_bits(); 789 set_ctrl_bits();
790 790
791 udelay(40); /* maintain the strobe during 40 us */ 791 udelay(40); /* maintain the strobe during 40 us */
792 792
793 bits.e = BIT_CLR; 793 bits.e = BIT_CLR;
794 set_ctrl_bits(); 794 set_ctrl_bits();
795 795
796 udelay(45); /* the shortest data takes at least 45 us */ 796 udelay(45); /* the shortest data takes at least 45 us */
797 spin_unlock(&pprt_lock); 797 spin_unlock(&pprt_lock);
798 } 798 }
799 799
800 static void lcd_gotoxy(void) 800 static void lcd_gotoxy(void)
801 { 801 {
802 lcd_write_cmd(0x80 /* set DDRAM address */ 802 lcd_write_cmd(0x80 /* set DDRAM address */
803 | (lcd_addr_y ? lcd_hwidth : 0) 803 | (lcd_addr_y ? lcd_hwidth : 0)
804 /* we force the cursor to stay at the end of the line if it wants to go farther */ 804 /* we force the cursor to stay at the end of the line if it wants to go farther */
805 | ((lcd_addr_x < lcd_bwidth) ? lcd_addr_x & 805 | ((lcd_addr_x < lcd_bwidth) ? lcd_addr_x &
806 (lcd_hwidth - 1) : lcd_bwidth - 1)); 806 (lcd_hwidth - 1) : lcd_bwidth - 1));
807 } 807 }
808 808
809 static void lcd_print(char c) 809 static void lcd_print(char c)
810 { 810 {
811 if (lcd_addr_x < lcd_bwidth) { 811 if (lcd_addr_x < lcd_bwidth) {
812 if (lcd_char_conv != NULL) 812 if (lcd_char_conv != NULL)
813 c = lcd_char_conv[(unsigned char)c]; 813 c = lcd_char_conv[(unsigned char)c];
814 lcd_write_data(c); 814 lcd_write_data(c);
815 lcd_addr_x++; 815 lcd_addr_x++;
816 } 816 }
817 /* prevents the cursor from wrapping onto the next line */ 817 /* prevents the cursor from wrapping onto the next line */
818 if (lcd_addr_x == lcd_bwidth) 818 if (lcd_addr_x == lcd_bwidth)
819 lcd_gotoxy(); 819 lcd_gotoxy();
820 } 820 }
821 821
822 /* fills the display with spaces and resets X/Y */ 822 /* fills the display with spaces and resets X/Y */
823 static void lcd_clear_fast_s(void) 823 static void lcd_clear_fast_s(void)
824 { 824 {
825 int pos; 825 int pos;
826 lcd_addr_x = lcd_addr_y = 0; 826 lcd_addr_x = lcd_addr_y = 0;
827 lcd_gotoxy(); 827 lcd_gotoxy();
828 828
829 spin_lock(&pprt_lock); 829 spin_lock(&pprt_lock);
830 for (pos = 0; pos < lcd_height * lcd_hwidth; pos++) { 830 for (pos = 0; pos < lcd_height * lcd_hwidth; pos++) {
831 lcd_send_serial(0x5F); /* R/W=W, RS=1 */ 831 lcd_send_serial(0x5F); /* R/W=W, RS=1 */
832 lcd_send_serial(' ' & 0x0F); 832 lcd_send_serial(' ' & 0x0F);
833 lcd_send_serial((' ' >> 4) & 0x0F); 833 lcd_send_serial((' ' >> 4) & 0x0F);
834 udelay(40); /* the shortest data takes at least 40 us */ 834 udelay(40); /* the shortest data takes at least 40 us */
835 } 835 }
836 spin_unlock(&pprt_lock); 836 spin_unlock(&pprt_lock);
837 837
838 lcd_addr_x = lcd_addr_y = 0; 838 lcd_addr_x = lcd_addr_y = 0;
839 lcd_gotoxy(); 839 lcd_gotoxy();
840 } 840 }
841 841
842 /* fills the display with spaces and resets X/Y */ 842 /* fills the display with spaces and resets X/Y */
843 static void lcd_clear_fast_p8(void) 843 static void lcd_clear_fast_p8(void)
844 { 844 {
845 int pos; 845 int pos;
846 lcd_addr_x = lcd_addr_y = 0; 846 lcd_addr_x = lcd_addr_y = 0;
847 lcd_gotoxy(); 847 lcd_gotoxy();
848 848
849 spin_lock(&pprt_lock); 849 spin_lock(&pprt_lock);
850 for (pos = 0; pos < lcd_height * lcd_hwidth; pos++) { 850 for (pos = 0; pos < lcd_height * lcd_hwidth; pos++) {
851 /* present the data to the data port */ 851 /* present the data to the data port */
852 w_dtr(pprt, ' '); 852 w_dtr(pprt, ' ');
853 udelay(20); /* maintain the data during 20 us before the strobe */ 853 udelay(20); /* maintain the data during 20 us before the strobe */
854 854
855 bits.e = BIT_SET; 855 bits.e = BIT_SET;
856 bits.rs = BIT_SET; 856 bits.rs = BIT_SET;
857 bits.rw = BIT_CLR; 857 bits.rw = BIT_CLR;
858 set_ctrl_bits(); 858 set_ctrl_bits();
859 859
860 udelay(40); /* maintain the strobe during 40 us */ 860 udelay(40); /* maintain the strobe during 40 us */
861 861
862 bits.e = BIT_CLR; 862 bits.e = BIT_CLR;
863 set_ctrl_bits(); 863 set_ctrl_bits();
864 864
865 udelay(45); /* the shortest data takes at least 45 us */ 865 udelay(45); /* the shortest data takes at least 45 us */
866 } 866 }
867 spin_unlock(&pprt_lock); 867 spin_unlock(&pprt_lock);
868 868
869 lcd_addr_x = lcd_addr_y = 0; 869 lcd_addr_x = lcd_addr_y = 0;
870 lcd_gotoxy(); 870 lcd_gotoxy();
871 } 871 }
872 872
873 /* clears the display and resets X/Y */ 873 /* clears the display and resets X/Y */
874 static void lcd_clear_display(void) 874 static void lcd_clear_display(void)
875 { 875 {
876 lcd_write_cmd(0x01); /* clear display */ 876 lcd_write_cmd(0x01); /* clear display */
877 lcd_addr_x = lcd_addr_y = 0; 877 lcd_addr_x = lcd_addr_y = 0;
878 /* we must wait a few milliseconds (15) */ 878 /* we must wait a few milliseconds (15) */
879 long_sleep(15); 879 long_sleep(15);
880 } 880 }
881 881
882 static void lcd_init_display(void) 882 static void lcd_init_display(void)
883 { 883 {
884 884
885 lcd_flags = ((lcd_height > 1) ? LCD_FLAG_N : 0) 885 lcd_flags = ((lcd_height > 1) ? LCD_FLAG_N : 0)
886 | LCD_FLAG_D | LCD_FLAG_C | LCD_FLAG_B; 886 | LCD_FLAG_D | LCD_FLAG_C | LCD_FLAG_B;
887 887
888 long_sleep(20); /* wait 20 ms after power-up for the paranoid */ 888 long_sleep(20); /* wait 20 ms after power-up for the paranoid */
889 889
890 lcd_write_cmd(0x30); /* 8bits, 1 line, small fonts */ 890 lcd_write_cmd(0x30); /* 8bits, 1 line, small fonts */
891 long_sleep(10); 891 long_sleep(10);
892 lcd_write_cmd(0x30); /* 8bits, 1 line, small fonts */ 892 lcd_write_cmd(0x30); /* 8bits, 1 line, small fonts */
893 long_sleep(10); 893 long_sleep(10);
894 lcd_write_cmd(0x30); /* 8bits, 1 line, small fonts */ 894 lcd_write_cmd(0x30); /* 8bits, 1 line, small fonts */
895 long_sleep(10); 895 long_sleep(10);
896 896
897 lcd_write_cmd(0x30 /* set font height and lines number */ 897 lcd_write_cmd(0x30 /* set font height and lines number */
898 | ((lcd_flags & LCD_FLAG_F) ? 4 : 0) 898 | ((lcd_flags & LCD_FLAG_F) ? 4 : 0)
899 | ((lcd_flags & LCD_FLAG_N) ? 8 : 0) 899 | ((lcd_flags & LCD_FLAG_N) ? 8 : 0)
900 ); 900 );
901 long_sleep(10); 901 long_sleep(10);
902 902
903 lcd_write_cmd(0x08); /* display off, cursor off, blink off */ 903 lcd_write_cmd(0x08); /* display off, cursor off, blink off */
904 long_sleep(10); 904 long_sleep(10);
905 905
906 lcd_write_cmd(0x08 /* set display mode */ 906 lcd_write_cmd(0x08 /* set display mode */
907 | ((lcd_flags & LCD_FLAG_D) ? 4 : 0) 907 | ((lcd_flags & LCD_FLAG_D) ? 4 : 0)
908 | ((lcd_flags & LCD_FLAG_C) ? 2 : 0) 908 | ((lcd_flags & LCD_FLAG_C) ? 2 : 0)
909 | ((lcd_flags & LCD_FLAG_B) ? 1 : 0) 909 | ((lcd_flags & LCD_FLAG_B) ? 1 : 0)
910 ); 910 );
911 911
912 lcd_backlight((lcd_flags & LCD_FLAG_L) ? 1 : 0); 912 lcd_backlight((lcd_flags & LCD_FLAG_L) ? 1 : 0);
913 913
914 long_sleep(10); 914 long_sleep(10);
915 915
916 lcd_write_cmd(0x06); /* entry mode set : increment, cursor shifting */ 916 lcd_write_cmd(0x06); /* entry mode set : increment, cursor shifting */
917 917
918 lcd_clear_display(); 918 lcd_clear_display();
919 } 919 }
920 920
921 /* 921 /*
922 * These are the file operation function for user access to /dev/lcd 922 * These are the file operation function for user access to /dev/lcd
923 * This function can also be called from inside the kernel, by 923 * This function can also be called from inside the kernel, by
924 * setting file and ppos to NULL. 924 * setting file and ppos to NULL.
925 * 925 *
926 */ 926 */
927 927
928 static ssize_t lcd_write(struct file *file, 928 static ssize_t lcd_write(struct file *file,
929 const char *buf, size_t count, loff_t *ppos) 929 const char *buf, size_t count, loff_t *ppos)
930 { 930 {
931 931
932 const char *tmp = buf; 932 const char *tmp = buf;
933 char c; 933 char c;
934 934
935 for (; count-- > 0; (ppos ? (*ppos)++ : 0), ++tmp) { 935 for (; count-- > 0; (ppos ? (*ppos)++ : 0), ++tmp) {
936 if (!in_interrupt() && (((count + 1) & 0x1f) == 0)) 936 if (!in_interrupt() && (((count + 1) & 0x1f) == 0))
937 schedule(); /* let's be a little nice with other processes that need some CPU */ 937 schedule(); /* let's be a little nice with other processes that need some CPU */
938 938
939 if (ppos == NULL && file == NULL) 939 if (ppos == NULL && file == NULL)
940 c = *tmp; /* let's not use get_user() from the kernel ! */ 940 c = *tmp; /* let's not use get_user() from the kernel ! */
941 else if (get_user(c, tmp)) 941 else if (get_user(c, tmp))
942 return -EFAULT; 942 return -EFAULT;
943 943
944 /* first, we'll test if we're in escape mode */ 944 /* first, we'll test if we're in escape mode */
945 if ((c != '\n') && lcd_escape_len >= 0) { /* yes, let's add this char to the buffer */ 945 if ((c != '\n') && lcd_escape_len >= 0) { /* yes, let's add this char to the buffer */
946 lcd_escape[lcd_escape_len++] = c; 946 lcd_escape[lcd_escape_len++] = c;
947 lcd_escape[lcd_escape_len] = 0; 947 lcd_escape[lcd_escape_len] = 0;
948 } else { 948 } else {
949 lcd_escape_len = -1; /* aborts any previous escape sequence */ 949 lcd_escape_len = -1; /* aborts any previous escape sequence */
950 950
951 switch (c) { 951 switch (c) {
952 case LCD_ESCAPE_CHAR: /* start of an escape sequence */ 952 case LCD_ESCAPE_CHAR: /* start of an escape sequence */
953 lcd_escape_len = 0; 953 lcd_escape_len = 0;
954 lcd_escape[lcd_escape_len] = 0; 954 lcd_escape[lcd_escape_len] = 0;
955 break; 955 break;
956 case '\b': /* go back one char and clear it */ 956 case '\b': /* go back one char and clear it */
957 if (lcd_addr_x > 0) { 957 if (lcd_addr_x > 0) {
958 if (lcd_addr_x < lcd_bwidth) /* check if we're not at the end of the line */ 958 if (lcd_addr_x < lcd_bwidth) /* check if we're not at the end of the line */
959 lcd_write_cmd(0x10); /* back one char */ 959 lcd_write_cmd(0x10); /* back one char */
960 lcd_addr_x--; 960 lcd_addr_x--;
961 } 961 }
962 lcd_write_data(' '); /* replace with a space */ 962 lcd_write_data(' '); /* replace with a space */
963 lcd_write_cmd(0x10); /* back one char again */ 963 lcd_write_cmd(0x10); /* back one char again */
964 break; 964 break;
965 case '\014': /* quickly clear the display */ 965 case '\014': /* quickly clear the display */
966 lcd_clear_fast(); 966 lcd_clear_fast();
967 break; 967 break;
968 case '\n': /* flush the remainder of the current line and go to the 968 case '\n': /* flush the remainder of the current line and go to the
969 beginning of the next line */ 969 beginning of the next line */
970 for (; lcd_addr_x < lcd_bwidth; lcd_addr_x++) 970 for (; lcd_addr_x < lcd_bwidth; lcd_addr_x++)
971 lcd_write_data(' '); 971 lcd_write_data(' ');
972 lcd_addr_x = 0; 972 lcd_addr_x = 0;
973 lcd_addr_y = (lcd_addr_y + 1) % lcd_height; 973 lcd_addr_y = (lcd_addr_y + 1) % lcd_height;
974 lcd_gotoxy(); 974 lcd_gotoxy();
975 break; 975 break;
976 case '\r': /* go to the beginning of the same line */ 976 case '\r': /* go to the beginning of the same line */
977 lcd_addr_x = 0; 977 lcd_addr_x = 0;
978 lcd_gotoxy(); 978 lcd_gotoxy();
979 break; 979 break;
980 case '\t': /* print a space instead of the tab */ 980 case '\t': /* print a space instead of the tab */
981 lcd_print(' '); 981 lcd_print(' ');
982 break; 982 break;
983 default: /* simply print this char */ 983 default: /* simply print this char */
984 lcd_print(c); 984 lcd_print(c);
985 break; 985 break;
986 } 986 }
987 } 987 }
988 988
989 /* now we'll see if we're in an escape mode and if the current 989 /* now we'll see if we're in an escape mode and if the current
990 escape sequence can be understood. 990 escape sequence can be understood.
991 */ 991 */
992 if (lcd_escape_len >= 2) { /* minimal length for an escape command */ 992 if (lcd_escape_len >= 2) { /* minimal length for an escape command */
993 int processed = 0; /* 1 means the command has been processed */ 993 int processed = 0; /* 1 means the command has been processed */
994 994
995 if (!strcmp(lcd_escape, "[2J")) { /* Clear the display */ 995 if (!strcmp(lcd_escape, "[2J")) { /* Clear the display */
996 lcd_clear_fast(); /* clear display */ 996 lcd_clear_fast(); /* clear display */
997 processed = 1; 997 processed = 1;
998 } else if (!strcmp(lcd_escape, "[H")) { /* Cursor to home */ 998 } else if (!strcmp(lcd_escape, "[H")) { /* Cursor to home */
999 lcd_addr_x = lcd_addr_y = 0; 999 lcd_addr_x = lcd_addr_y = 0;
1000 lcd_gotoxy(); 1000 lcd_gotoxy();
1001 processed = 1; 1001 processed = 1;
1002 } 1002 }
1003 /* codes starting with ^[[L */ 1003 /* codes starting with ^[[L */
1004 else if ((lcd_escape_len >= 3) && 1004 else if ((lcd_escape_len >= 3) &&
1005 (lcd_escape[0] == '[') && (lcd_escape[1] == 'L')) { /* LCD special codes */ 1005 (lcd_escape[0] == '[') && (lcd_escape[1] == 'L')) { /* LCD special codes */
1006 1006
1007 char *esc = lcd_escape + 2; 1007 char *esc = lcd_escape + 2;
1008 int oldflags = lcd_flags; 1008 int oldflags = lcd_flags;
1009 1009
1010 /* check for display mode flags */ 1010 /* check for display mode flags */
1011 switch (*esc) { 1011 switch (*esc) {
1012 case 'D': /* Display ON */ 1012 case 'D': /* Display ON */
1013 lcd_flags |= LCD_FLAG_D; 1013 lcd_flags |= LCD_FLAG_D;
1014 processed = 1; 1014 processed = 1;
1015 break; 1015 break;
1016 case 'd': /* Display OFF */ 1016 case 'd': /* Display OFF */
1017 lcd_flags &= ~LCD_FLAG_D; 1017 lcd_flags &= ~LCD_FLAG_D;
1018 processed = 1; 1018 processed = 1;
1019 break; 1019 break;
1020 case 'C': /* Cursor ON */ 1020 case 'C': /* Cursor ON */
1021 lcd_flags |= LCD_FLAG_C; 1021 lcd_flags |= LCD_FLAG_C;
1022 processed = 1; 1022 processed = 1;
1023 break; 1023 break;
1024 case 'c': /* Cursor OFF */ 1024 case 'c': /* Cursor OFF */
1025 lcd_flags &= ~LCD_FLAG_C; 1025 lcd_flags &= ~LCD_FLAG_C;
1026 processed = 1; 1026 processed = 1;
1027 break; 1027 break;
1028 case 'B': /* Blink ON */ 1028 case 'B': /* Blink ON */
1029 lcd_flags |= LCD_FLAG_B; 1029 lcd_flags |= LCD_FLAG_B;
1030 processed = 1; 1030 processed = 1;
1031 break; 1031 break;
1032 case 'b': /* Blink OFF */ 1032 case 'b': /* Blink OFF */
1033 lcd_flags &= ~LCD_FLAG_B; 1033 lcd_flags &= ~LCD_FLAG_B;
1034 processed = 1; 1034 processed = 1;
1035 break; 1035 break;
1036 case '+': /* Back light ON */ 1036 case '+': /* Back light ON */
1037 lcd_flags |= LCD_FLAG_L; 1037 lcd_flags |= LCD_FLAG_L;
1038 processed = 1; 1038 processed = 1;
1039 break; 1039 break;
1040 case '-': /* Back light OFF */ 1040 case '-': /* Back light OFF */
1041 lcd_flags &= ~LCD_FLAG_L; 1041 lcd_flags &= ~LCD_FLAG_L;
1042 processed = 1; 1042 processed = 1;
1043 break; 1043 break;
1044 case '*': /* flash back light using the keypad timer */ 1044 case '*': /* flash back light using the keypad timer */
1045 if (scan_timer.function != NULL) { 1045 if (scan_timer.function != NULL) {
1046 if (light_tempo == 0 1046 if (light_tempo == 0
1047 && ((lcd_flags & LCD_FLAG_L) 1047 && ((lcd_flags & LCD_FLAG_L)
1048 == 0)) 1048 == 0))
1049 lcd_backlight(1); 1049 lcd_backlight(1);
1050 light_tempo = FLASH_LIGHT_TEMPO; 1050 light_tempo = FLASH_LIGHT_TEMPO;
1051 } 1051 }
1052 processed = 1; 1052 processed = 1;
1053 break; 1053 break;
1054 case 'f': /* Small Font */ 1054 case 'f': /* Small Font */
1055 lcd_flags &= ~LCD_FLAG_F; 1055 lcd_flags &= ~LCD_FLAG_F;
1056 processed = 1; 1056 processed = 1;
1057 break; 1057 break;
1058 case 'F': /* Large Font */ 1058 case 'F': /* Large Font */
1059 lcd_flags |= LCD_FLAG_F; 1059 lcd_flags |= LCD_FLAG_F;
1060 processed = 1; 1060 processed = 1;
1061 break; 1061 break;
1062 case 'n': /* One Line */ 1062 case 'n': /* One Line */
1063 lcd_flags &= ~LCD_FLAG_N; 1063 lcd_flags &= ~LCD_FLAG_N;
1064 processed = 1; 1064 processed = 1;
1065 break; 1065 break;
1066 case 'N': /* Two Lines */ 1066 case 'N': /* Two Lines */
1067 lcd_flags |= LCD_FLAG_N; 1067 lcd_flags |= LCD_FLAG_N;
1068 break; 1068 break;
1069 1069
1070 case 'l': /* Shift Cursor Left */ 1070 case 'l': /* Shift Cursor Left */
1071 if (lcd_addr_x > 0) { 1071 if (lcd_addr_x > 0) {
1072 if (lcd_addr_x < lcd_bwidth) 1072 if (lcd_addr_x < lcd_bwidth)
1073 lcd_write_cmd(0x10); /* back one char if not at end of line */ 1073 lcd_write_cmd(0x10); /* back one char if not at end of line */
1074 lcd_addr_x--; 1074 lcd_addr_x--;
1075 } 1075 }
1076 processed = 1; 1076 processed = 1;
1077 break; 1077 break;
1078 1078
1079 case 'r': /* shift cursor right */ 1079 case 'r': /* shift cursor right */
1080 if (lcd_addr_x < lcd_width) { 1080 if (lcd_addr_x < lcd_width) {
1081 if (lcd_addr_x < (lcd_bwidth - 1)) 1081 if (lcd_addr_x < (lcd_bwidth - 1))
1082 lcd_write_cmd(0x14); /* allow the cursor to pass the end of the line */ 1082 lcd_write_cmd(0x14); /* allow the cursor to pass the end of the line */
1083 lcd_addr_x++; 1083 lcd_addr_x++;
1084 } 1084 }
1085 processed = 1; 1085 processed = 1;
1086 break; 1086 break;
1087 1087
1088 case 'L': /* shift display left */ 1088 case 'L': /* shift display left */
1089 lcd_left_shift++; 1089 lcd_left_shift++;
1090 lcd_write_cmd(0x18); 1090 lcd_write_cmd(0x18);
1091 processed = 1; 1091 processed = 1;
1092 break; 1092 break;
1093 1093
1094 case 'R': /* shift display right */ 1094 case 'R': /* shift display right */
1095 lcd_left_shift--; 1095 lcd_left_shift--;
1096 lcd_write_cmd(0x1C); 1096 lcd_write_cmd(0x1C);
1097 processed = 1; 1097 processed = 1;
1098 break; 1098 break;
1099 1099
1100 case 'k':{ /* kill end of line */ 1100 case 'k':{ /* kill end of line */
1101 int x; 1101 int x;
1102 for (x = lcd_addr_x; x < lcd_bwidth; x++) 1102 for (x = lcd_addr_x; x < lcd_bwidth; x++)
1103 lcd_write_data(' '); 1103 lcd_write_data(' ');
1104 lcd_gotoxy(); /* restore cursor position */ 1104 lcd_gotoxy(); /* restore cursor position */
1105 processed = 1; 1105 processed = 1;
1106 break; 1106 break;
1107 } 1107 }
1108 case 'I': /* reinitialize display */ 1108 case 'I': /* reinitialize display */
1109 lcd_init_display(); 1109 lcd_init_display();
1110 lcd_left_shift = 0; 1110 lcd_left_shift = 0;
1111 processed = 1; 1111 processed = 1;
1112 break; 1112 break;
1113 1113
1114 case 'G': /* Generator : LGcxxxxx...xx; */ { 1114 case 'G': /* Generator : LGcxxxxx...xx; */ {
1115 /* must have <c> between '0' and '7', representing the numerical 1115 /* must have <c> between '0' and '7', representing the numerical
1116 * ASCII code of the redefined character, and <xx...xx> a sequence 1116 * ASCII code of the redefined character, and <xx...xx> a sequence
1117 * of 16 hex digits representing 8 bytes for each character. Most 1117 * of 16 hex digits representing 8 bytes for each character. Most
1118 * LCDs will only use 5 lower bits of the 7 first bytes. 1118 * LCDs will only use 5 lower bits of the 7 first bytes.
1119 */ 1119 */
1120 1120
1121 unsigned char cgbytes[8]; 1121 unsigned char cgbytes[8];
1122 unsigned char cgaddr; 1122 unsigned char cgaddr;
1123 int cgoffset; 1123 int cgoffset;
1124 int shift; 1124 int shift;
1125 char value; 1125 char value;
1126 int addr; 1126 int addr;
1127 1127
1128 if (strchr(esc, ';') == NULL) 1128 if (strchr(esc, ';') == NULL)
1129 break; 1129 break;
1130 1130
1131 esc++; 1131 esc++;
1132 1132
1133 cgaddr = *(esc++) - '0'; 1133 cgaddr = *(esc++) - '0';
1134 if (cgaddr > 7) { 1134 if (cgaddr > 7) {
1135 processed = 1; 1135 processed = 1;
1136 break; 1136 break;
1137 } 1137 }
1138 1138
1139 cgoffset = 0; 1139 cgoffset = 0;
1140 shift = 0; 1140 shift = 0;
1141 value = 0; 1141 value = 0;
1142 while (*esc && cgoffset < 8) { 1142 while (*esc && cgoffset < 8) {
1143 shift ^= 4; 1143 shift ^= 4;
1144 if (*esc >= '0' && *esc <= '9') 1144 if (*esc >= '0' && *esc <= '9')
1145 value |= (*esc - '0') << shift; 1145 value |= (*esc - '0') << shift;
1146 else if (*esc >= 'A' && *esc <= 'Z') 1146 else if (*esc >= 'A' && *esc <= 'Z')
1147 value |= (*esc - 'A' + 10) << shift; 1147 value |= (*esc - 'A' + 10) << shift;
1148 else if (*esc >= 'a' && *esc <= 'z') 1148 else if (*esc >= 'a' && *esc <= 'z')
1149 value |= (*esc - 'a' + 10) << shift; 1149 value |= (*esc - 'a' + 10) << shift;
1150 else { 1150 else {
1151 esc++; 1151 esc++;
1152 continue; 1152 continue;
1153 } 1153 }
1154 1154
1155 if (shift == 0) { 1155 if (shift == 0) {
1156 cgbytes[cgoffset++] = value; 1156 cgbytes[cgoffset++] = value;
1157 value = 0; 1157 value = 0;
1158 } 1158 }
1159 1159
1160 esc++; 1160 esc++;
1161 } 1161 }
1162 1162
1163 lcd_write_cmd(0x40 | (cgaddr * 8)); 1163 lcd_write_cmd(0x40 | (cgaddr * 8));
1164 for (addr = 0; addr < cgoffset; addr++) 1164 for (addr = 0; addr < cgoffset; addr++)
1165 lcd_write_data(cgbytes[addr]); 1165 lcd_write_data(cgbytes[addr]);
1166 1166
1167 lcd_gotoxy(); /* ensures that we stop writing to CGRAM */ 1167 lcd_gotoxy(); /* ensures that we stop writing to CGRAM */
1168 processed = 1; 1168 processed = 1;
1169 break; 1169 break;
1170 } 1170 }
1171 case 'x': /* gotoxy : LxXXX[yYYY]; */ 1171 case 'x': /* gotoxy : LxXXX[yYYY]; */
1172 case 'y': /* gotoxy : LyYYY[xXXX]; */ 1172 case 'y': /* gotoxy : LyYYY[xXXX]; */
1173 if (strchr(esc, ';') == NULL) 1173 if (strchr(esc, ';') == NULL)
1174 break; 1174 break;
1175 1175
1176 while (*esc) { 1176 while (*esc) {
1177 if (*esc == 'x') { 1177 if (*esc == 'x') {
1178 esc++; 1178 esc++;
1179 lcd_addr_x = 0; 1179 lcd_addr_x = 0;
1180 while (isdigit(*esc)) { 1180 while (isdigit(*esc)) {
1181 lcd_addr_x = 1181 lcd_addr_x =
1182 lcd_addr_x * 1182 lcd_addr_x *
1183 10 + (*esc - 1183 10 + (*esc -
1184 '0'); 1184 '0');
1185 esc++; 1185 esc++;
1186 } 1186 }
1187 } else if (*esc == 'y') { 1187 } else if (*esc == 'y') {
1188 esc++; 1188 esc++;
1189 lcd_addr_y = 0; 1189 lcd_addr_y = 0;
1190 while (isdigit(*esc)) { 1190 while (isdigit(*esc)) {
1191 lcd_addr_y = 1191 lcd_addr_y =
1192 lcd_addr_y * 1192 lcd_addr_y *
1193 10 + (*esc - 1193 10 + (*esc -
1194 '0'); 1194 '0');
1195 esc++; 1195 esc++;
1196 } 1196 }
1197 } else 1197 } else
1198 break; 1198 break;
1199 } 1199 }
1200 1200
1201 lcd_gotoxy(); 1201 lcd_gotoxy();
1202 processed = 1; 1202 processed = 1;
1203 break; 1203 break;
1204 } /* end of switch */ 1204 } /* end of switch */
1205 1205
1206 /* Check wether one flag was changed */ 1206 /* Check wether one flag was changed */
1207 if (oldflags != lcd_flags) { 1207 if (oldflags != lcd_flags) {
1208 /* check wether one of B,C,D flags was changed */ 1208 /* check wether one of B,C,D flags was changed */
1209 if ((oldflags ^ lcd_flags) & 1209 if ((oldflags ^ lcd_flags) &
1210 (LCD_FLAG_B | LCD_FLAG_C | LCD_FLAG_D)) 1210 (LCD_FLAG_B | LCD_FLAG_C | LCD_FLAG_D))
1211 /* set display mode */ 1211 /* set display mode */
1212 lcd_write_cmd(0x08 | 1212 lcd_write_cmd(0x08 |
1213 ((lcd_flags & LCD_FLAG_D) ? 4 : 0) | 1213 ((lcd_flags & LCD_FLAG_D) ? 4 : 0) |
1214 ((lcd_flags & LCD_FLAG_C) ? 2 : 0) | 1214 ((lcd_flags & LCD_FLAG_C) ? 2 : 0) |
1215 ((lcd_flags & LCD_FLAG_B) ? 1 : 0)); 1215 ((lcd_flags & LCD_FLAG_B) ? 1 : 0));
1216 /* check wether one of F,N flags was changed */ 1216 /* check wether one of F,N flags was changed */
1217 else if ((oldflags ^ lcd_flags) & 1217 else if ((oldflags ^ lcd_flags) &
1218 (LCD_FLAG_F | LCD_FLAG_N)) 1218 (LCD_FLAG_F | LCD_FLAG_N))
1219 lcd_write_cmd(0x30 | 1219 lcd_write_cmd(0x30 |
1220 ((lcd_flags & LCD_FLAG_F) ? 4 : 0) | 1220 ((lcd_flags & LCD_FLAG_F) ? 4 : 0) |
1221 ((lcd_flags & LCD_FLAG_N) ? 8 : 0)); 1221 ((lcd_flags & LCD_FLAG_N) ? 8 : 0));
1222 /* check wether L flag was changed */ 1222 /* check wether L flag was changed */
1223 else if ((oldflags ^ lcd_flags) & 1223 else if ((oldflags ^ lcd_flags) &
1224 (LCD_FLAG_L)) { 1224 (LCD_FLAG_L)) {
1225 if (lcd_flags & (LCD_FLAG_L)) 1225 if (lcd_flags & (LCD_FLAG_L))
1226 lcd_backlight(1); 1226 lcd_backlight(1);
1227 else if (light_tempo == 0) /* switch off the light only when the tempo lighting is gone */ 1227 else if (light_tempo == 0) /* switch off the light only when the tempo lighting is gone */
1228 lcd_backlight(0); 1228 lcd_backlight(0);
1229 } 1229 }
1230 } 1230 }
1231 } 1231 }
1232 1232
1233 /* LCD special escape codes */ 1233 /* LCD special escape codes */
1234 /* flush the escape sequence if it's been processed or if it is 1234 /* flush the escape sequence if it's been processed or if it is
1235 getting too long. */ 1235 getting too long. */
1236 if (processed || (lcd_escape_len >= LCD_ESCAPE_LEN)) 1236 if (processed || (lcd_escape_len >= LCD_ESCAPE_LEN))
1237 lcd_escape_len = -1; 1237 lcd_escape_len = -1;
1238 } /* escape codes */ 1238 } /* escape codes */
1239 } 1239 }
1240 1240
1241 return tmp - buf; 1241 return tmp - buf;
1242 } 1242 }
1243 1243
1244 static int lcd_open(struct inode *inode, struct file *file) 1244 static int lcd_open(struct inode *inode, struct file *file)
1245 { 1245 {
1246 if (lcd_open_cnt) 1246 if (lcd_open_cnt)
1247 return -EBUSY; /* open only once at a time */ 1247 return -EBUSY; /* open only once at a time */
1248 1248
1249 if (file->f_mode & FMODE_READ) /* device is write-only */ 1249 if (file->f_mode & FMODE_READ) /* device is write-only */
1250 return -EPERM; 1250 return -EPERM;
1251 1251
1252 if (lcd_must_clear) { 1252 if (lcd_must_clear) {
1253 lcd_clear_display(); 1253 lcd_clear_display();
1254 lcd_must_clear = 0; 1254 lcd_must_clear = 0;
1255 } 1255 }
1256 lcd_open_cnt++; 1256 lcd_open_cnt++;
1257 return 0; 1257 return 0;
1258 } 1258 }
1259 1259
1260 static int lcd_release(struct inode *inode, struct file *file) 1260 static int lcd_release(struct inode *inode, struct file *file)
1261 { 1261 {
1262 lcd_open_cnt--; 1262 lcd_open_cnt--;
1263 return 0; 1263 return 0;
1264 } 1264 }
1265 1265
1266 static struct file_operations lcd_fops = { 1266 static struct file_operations lcd_fops = {
1267 .write = lcd_write, 1267 .write = lcd_write,
1268 .open = lcd_open, 1268 .open = lcd_open,
1269 .release = lcd_release, 1269 .release = lcd_release,
1270 }; 1270 };
1271 1271
1272 static struct miscdevice lcd_dev = { 1272 static struct miscdevice lcd_dev = {
1273 LCD_MINOR, 1273 LCD_MINOR,
1274 "lcd", 1274 "lcd",
1275 &lcd_fops 1275 &lcd_fops
1276 }; 1276 };
1277 1277
1278 /* public function usable from the kernel for any purpose */ 1278 /* public function usable from the kernel for any purpose */
1279 void panel_lcd_print(char *s) 1279 void panel_lcd_print(char *s)
1280 { 1280 {
1281 if (lcd_enabled && lcd_initialized) 1281 if (lcd_enabled && lcd_initialized)
1282 lcd_write(NULL, s, strlen(s), NULL); 1282 lcd_write(NULL, s, strlen(s), NULL);
1283 } 1283 }
1284 1284
1285 /* initialize the LCD driver */ 1285 /* initialize the LCD driver */
1286 void lcd_init(void) 1286 void lcd_init(void)
1287 { 1287 {
1288 switch (lcd_type) { 1288 switch (lcd_type) {
1289 case LCD_TYPE_OLD: /* parallel mode, 8 bits */ 1289 case LCD_TYPE_OLD: /* parallel mode, 8 bits */
1290 if (lcd_proto < 0) 1290 if (lcd_proto < 0)
1291 lcd_proto = LCD_PROTO_PARALLEL; 1291 lcd_proto = LCD_PROTO_PARALLEL;
1292 if (lcd_charset < 0) 1292 if (lcd_charset < 0)
1293 lcd_charset = LCD_CHARSET_NORMAL; 1293 lcd_charset = LCD_CHARSET_NORMAL;
1294 if (lcd_e_pin == PIN_NOT_SET) 1294 if (lcd_e_pin == PIN_NOT_SET)
1295 lcd_e_pin = PIN_STROBE; 1295 lcd_e_pin = PIN_STROBE;
1296 if (lcd_rs_pin == PIN_NOT_SET) 1296 if (lcd_rs_pin == PIN_NOT_SET)
1297 lcd_rs_pin = PIN_AUTOLF; 1297 lcd_rs_pin = PIN_AUTOLF;
1298 1298
1299 if (lcd_width < 0) 1299 if (lcd_width < 0)
1300 lcd_width = 40; 1300 lcd_width = 40;
1301 if (lcd_bwidth < 0) 1301 if (lcd_bwidth < 0)
1302 lcd_bwidth = 40; 1302 lcd_bwidth = 40;
1303 if (lcd_hwidth < 0) 1303 if (lcd_hwidth < 0)
1304 lcd_hwidth = 64; 1304 lcd_hwidth = 64;
1305 if (lcd_height < 0) 1305 if (lcd_height < 0)
1306 lcd_height = 2; 1306 lcd_height = 2;
1307 break; 1307 break;
1308 case LCD_TYPE_KS0074: /* serial mode, ks0074 */ 1308 case LCD_TYPE_KS0074: /* serial mode, ks0074 */
1309 if (lcd_proto < 0) 1309 if (lcd_proto < 0)
1310 lcd_proto = LCD_PROTO_SERIAL; 1310 lcd_proto = LCD_PROTO_SERIAL;
1311 if (lcd_charset < 0) 1311 if (lcd_charset < 0)
1312 lcd_charset = LCD_CHARSET_KS0074; 1312 lcd_charset = LCD_CHARSET_KS0074;
1313 if (lcd_bl_pin == PIN_NOT_SET) 1313 if (lcd_bl_pin == PIN_NOT_SET)
1314 lcd_bl_pin = PIN_AUTOLF; 1314 lcd_bl_pin = PIN_AUTOLF;
1315 if (lcd_cl_pin == PIN_NOT_SET) 1315 if (lcd_cl_pin == PIN_NOT_SET)
1316 lcd_cl_pin = PIN_STROBE; 1316 lcd_cl_pin = PIN_STROBE;
1317 if (lcd_da_pin == PIN_NOT_SET) 1317 if (lcd_da_pin == PIN_NOT_SET)
1318 lcd_da_pin = PIN_D0; 1318 lcd_da_pin = PIN_D0;
1319 1319
1320 if (lcd_width < 0) 1320 if (lcd_width < 0)
1321 lcd_width = 16; 1321 lcd_width = 16;
1322 if (lcd_bwidth < 0) 1322 if (lcd_bwidth < 0)
1323 lcd_bwidth = 40; 1323 lcd_bwidth = 40;
1324 if (lcd_hwidth < 0) 1324 if (lcd_hwidth < 0)
1325 lcd_hwidth = 16; 1325 lcd_hwidth = 16;
1326 if (lcd_height < 0) 1326 if (lcd_height < 0)
1327 lcd_height = 2; 1327 lcd_height = 2;
1328 break; 1328 break;
1329 case LCD_TYPE_NEXCOM: /* parallel mode, 8 bits, generic */ 1329 case LCD_TYPE_NEXCOM: /* parallel mode, 8 bits, generic */
1330 if (lcd_proto < 0) 1330 if (lcd_proto < 0)
1331 lcd_proto = LCD_PROTO_PARALLEL; 1331 lcd_proto = LCD_PROTO_PARALLEL;
1332 if (lcd_charset < 0) 1332 if (lcd_charset < 0)
1333 lcd_charset = LCD_CHARSET_NORMAL; 1333 lcd_charset = LCD_CHARSET_NORMAL;
1334 if (lcd_e_pin == PIN_NOT_SET) 1334 if (lcd_e_pin == PIN_NOT_SET)
1335 lcd_e_pin = PIN_AUTOLF; 1335 lcd_e_pin = PIN_AUTOLF;
1336 if (lcd_rs_pin == PIN_NOT_SET) 1336 if (lcd_rs_pin == PIN_NOT_SET)
1337 lcd_rs_pin = PIN_SELECP; 1337 lcd_rs_pin = PIN_SELECP;
1338 if (lcd_rw_pin == PIN_NOT_SET) 1338 if (lcd_rw_pin == PIN_NOT_SET)
1339 lcd_rw_pin = PIN_INITP; 1339 lcd_rw_pin = PIN_INITP;
1340 1340
1341 if (lcd_width < 0) 1341 if (lcd_width < 0)
1342 lcd_width = 16; 1342 lcd_width = 16;
1343 if (lcd_bwidth < 0) 1343 if (lcd_bwidth < 0)
1344 lcd_bwidth = 40; 1344 lcd_bwidth = 40;
1345 if (lcd_hwidth < 0) 1345 if (lcd_hwidth < 0)
1346 lcd_hwidth = 64; 1346 lcd_hwidth = 64;
1347 if (lcd_height < 0) 1347 if (lcd_height < 0)
1348 lcd_height = 2; 1348 lcd_height = 2;
1349 break; 1349 break;
1350 case LCD_TYPE_CUSTOM: /* customer-defined */ 1350 case LCD_TYPE_CUSTOM: /* customer-defined */
1351 if (lcd_proto < 0) 1351 if (lcd_proto < 0)
1352 lcd_proto = DEFAULT_LCD_PROTO; 1352 lcd_proto = DEFAULT_LCD_PROTO;
1353 if (lcd_charset < 0) 1353 if (lcd_charset < 0)
1354 lcd_charset = DEFAULT_LCD_CHARSET; 1354 lcd_charset = DEFAULT_LCD_CHARSET;
1355 /* default geometry will be set later */ 1355 /* default geometry will be set later */
1356 break; 1356 break;
1357 case LCD_TYPE_HANTRONIX: /* parallel mode, 8 bits, hantronix-like */ 1357 case LCD_TYPE_HANTRONIX: /* parallel mode, 8 bits, hantronix-like */
1358 default: 1358 default:
1359 if (lcd_proto < 0) 1359 if (lcd_proto < 0)
1360 lcd_proto = LCD_PROTO_PARALLEL; 1360 lcd_proto = LCD_PROTO_PARALLEL;
1361 if (lcd_charset < 0) 1361 if (lcd_charset < 0)
1362 lcd_charset = LCD_CHARSET_NORMAL; 1362 lcd_charset = LCD_CHARSET_NORMAL;
1363 if (lcd_e_pin == PIN_NOT_SET) 1363 if (lcd_e_pin == PIN_NOT_SET)
1364 lcd_e_pin = PIN_STROBE; 1364 lcd_e_pin = PIN_STROBE;
1365 if (lcd_rs_pin == PIN_NOT_SET) 1365 if (lcd_rs_pin == PIN_NOT_SET)
1366 lcd_rs_pin = PIN_SELECP; 1366 lcd_rs_pin = PIN_SELECP;
1367 1367
1368 if (lcd_width < 0) 1368 if (lcd_width < 0)
1369 lcd_width = 16; 1369 lcd_width = 16;
1370 if (lcd_bwidth < 0) 1370 if (lcd_bwidth < 0)
1371 lcd_bwidth = 40; 1371 lcd_bwidth = 40;
1372 if (lcd_hwidth < 0) 1372 if (lcd_hwidth < 0)
1373 lcd_hwidth = 64; 1373 lcd_hwidth = 64;
1374 if (lcd_height < 0) 1374 if (lcd_height < 0)
1375 lcd_height = 2; 1375 lcd_height = 2;
1376 break; 1376 break;
1377 } 1377 }
1378 1378
1379 /* this is used to catch wrong and default values */ 1379 /* this is used to catch wrong and default values */
1380 if (lcd_width <= 0) 1380 if (lcd_width <= 0)
1381 lcd_width = DEFAULT_LCD_WIDTH; 1381 lcd_width = DEFAULT_LCD_WIDTH;
1382 if (lcd_bwidth <= 0) 1382 if (lcd_bwidth <= 0)
1383 lcd_bwidth = DEFAULT_LCD_BWIDTH; 1383 lcd_bwidth = DEFAULT_LCD_BWIDTH;
1384 if (lcd_hwidth <= 0) 1384 if (lcd_hwidth <= 0)
1385 lcd_hwidth = DEFAULT_LCD_HWIDTH; 1385 lcd_hwidth = DEFAULT_LCD_HWIDTH;
1386 if (lcd_height <= 0) 1386 if (lcd_height <= 0)
1387 lcd_height = DEFAULT_LCD_HEIGHT; 1387 lcd_height = DEFAULT_LCD_HEIGHT;
1388 1388
1389 if (lcd_proto == LCD_PROTO_SERIAL) { /* SERIAL */ 1389 if (lcd_proto == LCD_PROTO_SERIAL) { /* SERIAL */
1390 lcd_write_cmd = lcd_write_cmd_s; 1390 lcd_write_cmd = lcd_write_cmd_s;
1391 lcd_write_data = lcd_write_data_s; 1391 lcd_write_data = lcd_write_data_s;
1392 lcd_clear_fast = lcd_clear_fast_s; 1392 lcd_clear_fast = lcd_clear_fast_s;
1393 1393
1394 if (lcd_cl_pin == PIN_NOT_SET) 1394 if (lcd_cl_pin == PIN_NOT_SET)
1395 lcd_cl_pin = DEFAULT_LCD_PIN_SCL; 1395 lcd_cl_pin = DEFAULT_LCD_PIN_SCL;
1396 if (lcd_da_pin == PIN_NOT_SET) 1396 if (lcd_da_pin == PIN_NOT_SET)
1397 lcd_da_pin = DEFAULT_LCD_PIN_SDA; 1397 lcd_da_pin = DEFAULT_LCD_PIN_SDA;
1398 1398
1399 } else { /* PARALLEL */ 1399 } else { /* PARALLEL */
1400 lcd_write_cmd = lcd_write_cmd_p8; 1400 lcd_write_cmd = lcd_write_cmd_p8;
1401 lcd_write_data = lcd_write_data_p8; 1401 lcd_write_data = lcd_write_data_p8;
1402 lcd_clear_fast = lcd_clear_fast_p8; 1402 lcd_clear_fast = lcd_clear_fast_p8;
1403 1403
1404 if (lcd_e_pin == PIN_NOT_SET) 1404 if (lcd_e_pin == PIN_NOT_SET)
1405 lcd_e_pin = DEFAULT_LCD_PIN_E; 1405 lcd_e_pin = DEFAULT_LCD_PIN_E;
1406 if (lcd_rs_pin == PIN_NOT_SET) 1406 if (lcd_rs_pin == PIN_NOT_SET)
1407 lcd_rs_pin = DEFAULT_LCD_PIN_RS; 1407 lcd_rs_pin = DEFAULT_LCD_PIN_RS;
1408 if (lcd_rw_pin == PIN_NOT_SET) 1408 if (lcd_rw_pin == PIN_NOT_SET)
1409 lcd_rw_pin = DEFAULT_LCD_PIN_RW; 1409 lcd_rw_pin = DEFAULT_LCD_PIN_RW;
1410 } 1410 }
1411 1411
1412 if (lcd_bl_pin == PIN_NOT_SET) 1412 if (lcd_bl_pin == PIN_NOT_SET)
1413 lcd_bl_pin = DEFAULT_LCD_PIN_BL; 1413 lcd_bl_pin = DEFAULT_LCD_PIN_BL;
1414 1414
1415 if (lcd_e_pin == PIN_NOT_SET) 1415 if (lcd_e_pin == PIN_NOT_SET)
1416 lcd_e_pin = PIN_NONE; 1416 lcd_e_pin = PIN_NONE;
1417 if (lcd_rs_pin == PIN_NOT_SET) 1417 if (lcd_rs_pin == PIN_NOT_SET)
1418 lcd_rs_pin = PIN_NONE; 1418 lcd_rs_pin = PIN_NONE;
1419 if (lcd_rw_pin == PIN_NOT_SET) 1419 if (lcd_rw_pin == PIN_NOT_SET)
1420 lcd_rw_pin = PIN_NONE; 1420 lcd_rw_pin = PIN_NONE;
1421 if (lcd_bl_pin == PIN_NOT_SET) 1421 if (lcd_bl_pin == PIN_NOT_SET)
1422 lcd_bl_pin = PIN_NONE; 1422 lcd_bl_pin = PIN_NONE;
1423 if (lcd_cl_pin == PIN_NOT_SET) 1423 if (lcd_cl_pin == PIN_NOT_SET)
1424 lcd_cl_pin = PIN_NONE; 1424 lcd_cl_pin = PIN_NONE;
1425 if (lcd_da_pin == PIN_NOT_SET) 1425 if (lcd_da_pin == PIN_NOT_SET)
1426 lcd_da_pin = PIN_NONE; 1426 lcd_da_pin = PIN_NONE;
1427 1427
1428 if (lcd_charset < 0) 1428 if (lcd_charset < 0)
1429 lcd_charset = DEFAULT_LCD_CHARSET; 1429 lcd_charset = DEFAULT_LCD_CHARSET;
1430 1430
1431 if (lcd_charset == LCD_CHARSET_KS0074) 1431 if (lcd_charset == LCD_CHARSET_KS0074)
1432 lcd_char_conv = lcd_char_conv_ks0074; 1432 lcd_char_conv = lcd_char_conv_ks0074;
1433 else 1433 else
1434 lcd_char_conv = NULL; 1434 lcd_char_conv = NULL;
1435 1435
1436 if (lcd_bl_pin != PIN_NONE) 1436 if (lcd_bl_pin != PIN_NONE)
1437 init_scan_timer(); 1437 init_scan_timer();
1438 1438
1439 pin_to_bits(lcd_e_pin, lcd_bits[LCD_PORT_D][LCD_BIT_E], 1439 pin_to_bits(lcd_e_pin, lcd_bits[LCD_PORT_D][LCD_BIT_E],
1440 lcd_bits[LCD_PORT_C][LCD_BIT_E]); 1440 lcd_bits[LCD_PORT_C][LCD_BIT_E]);
1441 pin_to_bits(lcd_rs_pin, lcd_bits[LCD_PORT_D][LCD_BIT_RS], 1441 pin_to_bits(lcd_rs_pin, lcd_bits[LCD_PORT_D][LCD_BIT_RS],
1442 lcd_bits[LCD_PORT_C][LCD_BIT_RS]); 1442 lcd_bits[LCD_PORT_C][LCD_BIT_RS]);
1443 pin_to_bits(lcd_rw_pin, lcd_bits[LCD_PORT_D][LCD_BIT_RW], 1443 pin_to_bits(lcd_rw_pin, lcd_bits[LCD_PORT_D][LCD_BIT_RW],
1444 lcd_bits[LCD_PORT_C][LCD_BIT_RW]); 1444 lcd_bits[LCD_PORT_C][LCD_BIT_RW]);
1445 pin_to_bits(lcd_bl_pin, lcd_bits[LCD_PORT_D][LCD_BIT_BL], 1445 pin_to_bits(lcd_bl_pin, lcd_bits[LCD_PORT_D][LCD_BIT_BL],
1446 lcd_bits[LCD_PORT_C][LCD_BIT_BL]); 1446 lcd_bits[LCD_PORT_C][LCD_BIT_BL]);
1447 pin_to_bits(lcd_cl_pin, lcd_bits[LCD_PORT_D][LCD_BIT_CL], 1447 pin_to_bits(lcd_cl_pin, lcd_bits[LCD_PORT_D][LCD_BIT_CL],
1448 lcd_bits[LCD_PORT_C][LCD_BIT_CL]); 1448 lcd_bits[LCD_PORT_C][LCD_BIT_CL]);
1449 pin_to_bits(lcd_da_pin, lcd_bits[LCD_PORT_D][LCD_BIT_DA], 1449 pin_to_bits(lcd_da_pin, lcd_bits[LCD_PORT_D][LCD_BIT_DA],
1450 lcd_bits[LCD_PORT_C][LCD_BIT_DA]); 1450 lcd_bits[LCD_PORT_C][LCD_BIT_DA]);
1451 1451
1452 /* before this line, we must NOT send anything to the display. 1452 /* before this line, we must NOT send anything to the display.
1453 * Since lcd_init_display() needs to write data, we have to 1453 * Since lcd_init_display() needs to write data, we have to
1454 * enable mark the LCD initialized just before. 1454 * enable mark the LCD initialized just before.
1455 */ 1455 */
1456 lcd_initialized = 1; 1456 lcd_initialized = 1;
1457 lcd_init_display(); 1457 lcd_init_display();
1458 1458
1459 /* display a short message */ 1459 /* display a short message */
1460 #ifdef CONFIG_PANEL_CHANGE_MESSAGE 1460 #ifdef CONFIG_PANEL_CHANGE_MESSAGE
1461 #ifdef CONFIG_PANEL_BOOT_MESSAGE 1461 #ifdef CONFIG_PANEL_BOOT_MESSAGE
1462 panel_lcd_print("\x1b[Lc\x1b[Lb\x1b[L*" CONFIG_PANEL_BOOT_MESSAGE); 1462 panel_lcd_print("\x1b[Lc\x1b[Lb\x1b[L*" CONFIG_PANEL_BOOT_MESSAGE);
1463 #endif 1463 #endif
1464 #else 1464 #else
1465 panel_lcd_print("\x1b[Lc\x1b[Lb\x1b[L*Linux-" UTS_RELEASE "\nPanel-" 1465 panel_lcd_print("\x1b[Lc\x1b[Lb\x1b[L*Linux-" UTS_RELEASE "\nPanel-"
1466 PANEL_VERSION); 1466 PANEL_VERSION);
1467 #endif 1467 #endif
1468 lcd_addr_x = lcd_addr_y = 0; 1468 lcd_addr_x = lcd_addr_y = 0;
1469 lcd_must_clear = 1; /* clear the display on the next device opening */ 1469 lcd_must_clear = 1; /* clear the display on the next device opening */
1470 lcd_gotoxy(); 1470 lcd_gotoxy();
1471 } 1471 }
1472 1472
1473 /* 1473 /*
1474 * These are the file operation function for user access to /dev/keypad 1474 * These are the file operation function for user access to /dev/keypad
1475 */ 1475 */
1476 1476
1477 static ssize_t keypad_read(struct file *file, 1477 static ssize_t keypad_read(struct file *file,
1478 char *buf, size_t count, loff_t *ppos) 1478 char *buf, size_t count, loff_t *ppos)
1479 { 1479 {
1480 1480
1481 unsigned i = *ppos; 1481 unsigned i = *ppos;
1482 char *tmp = buf; 1482 char *tmp = buf;
1483 1483
1484 if (keypad_buflen == 0) { 1484 if (keypad_buflen == 0) {
1485 if (file->f_flags & O_NONBLOCK) 1485 if (file->f_flags & O_NONBLOCK)
1486 return -EAGAIN; 1486 return -EAGAIN;
1487 1487
1488 interruptible_sleep_on(&keypad_read_wait); 1488 interruptible_sleep_on(&keypad_read_wait);
1489 if (signal_pending(current)) 1489 if (signal_pending(current))
1490 return -EINTR; 1490 return -EINTR;
1491 } 1491 }
1492 1492
1493 for (; count-- > 0 && (keypad_buflen > 0); ++i, ++tmp, --keypad_buflen) { 1493 for (; count-- > 0 && (keypad_buflen > 0); ++i, ++tmp, --keypad_buflen) {
1494 put_user(keypad_buffer[keypad_start], tmp); 1494 put_user(keypad_buffer[keypad_start], tmp);
1495 keypad_start = (keypad_start + 1) % KEYPAD_BUFFER; 1495 keypad_start = (keypad_start + 1) % KEYPAD_BUFFER;
1496 } 1496 }
1497 *ppos = i; 1497 *ppos = i;
1498 1498
1499 return tmp - buf; 1499 return tmp - buf;
1500 } 1500 }
1501 1501
1502 static int keypad_open(struct inode *inode, struct file *file) 1502 static int keypad_open(struct inode *inode, struct file *file)
1503 { 1503 {
1504 1504
1505 if (keypad_open_cnt) 1505 if (keypad_open_cnt)
1506 return -EBUSY; /* open only once at a time */ 1506 return -EBUSY; /* open only once at a time */
1507 1507
1508 if (file->f_mode & FMODE_WRITE) /* device is read-only */ 1508 if (file->f_mode & FMODE_WRITE) /* device is read-only */
1509 return -EPERM; 1509 return -EPERM;
1510 1510
1511 keypad_buflen = 0; /* flush the buffer on opening */ 1511 keypad_buflen = 0; /* flush the buffer on opening */
1512 keypad_open_cnt++; 1512 keypad_open_cnt++;
1513 return 0; 1513 return 0;
1514 } 1514 }
1515 1515
1516 static int keypad_release(struct inode *inode, struct file *file) 1516 static int keypad_release(struct inode *inode, struct file *file)
1517 { 1517 {
1518 keypad_open_cnt--; 1518 keypad_open_cnt--;
1519 return 0; 1519 return 0;
1520 } 1520 }
1521 1521
1522 static struct file_operations keypad_fops = { 1522 static struct file_operations keypad_fops = {
1523 .read = keypad_read, /* read */ 1523 .read = keypad_read, /* read */
1524 .open = keypad_open, /* open */ 1524 .open = keypad_open, /* open */
1525 .release = keypad_release, /* close */ 1525 .release = keypad_release, /* close */
1526 }; 1526 };
1527 1527
1528 static struct miscdevice keypad_dev = { 1528 static struct miscdevice keypad_dev = {
1529 KEYPAD_MINOR, 1529 KEYPAD_MINOR,
1530 "keypad", 1530 "keypad",
1531 &keypad_fops 1531 &keypad_fops
1532 }; 1532 };
1533 1533
1534 static void keypad_send_key(char *string, int max_len) 1534 static void keypad_send_key(char *string, int max_len)
1535 { 1535 {
1536 if (init_in_progress) 1536 if (init_in_progress)
1537 return; 1537 return;
1538 1538
1539 /* send the key to the device only if a process is attached to it. */ 1539 /* send the key to the device only if a process is attached to it. */
1540 if (keypad_open_cnt > 0) { 1540 if (keypad_open_cnt > 0) {
1541 while (max_len-- && keypad_buflen < KEYPAD_BUFFER && *string) { 1541 while (max_len-- && keypad_buflen < KEYPAD_BUFFER && *string) {
1542 keypad_buffer[(keypad_start + keypad_buflen++) % 1542 keypad_buffer[(keypad_start + keypad_buflen++) %
1543 KEYPAD_BUFFER] = *string++; 1543 KEYPAD_BUFFER] = *string++;
1544 } 1544 }
1545 wake_up_interruptible(&keypad_read_wait); 1545 wake_up_interruptible(&keypad_read_wait);
1546 } 1546 }
1547 } 1547 }
1548 1548
1549 /* this function scans all the bits involving at least one logical signal, and puts the 1549 /* this function scans all the bits involving at least one logical signal, and puts the
1550 * results in the bitfield "phys_read" (one bit per established contact), and sets 1550 * results in the bitfield "phys_read" (one bit per established contact), and sets
1551 * "phys_read_prev" to "phys_read". 1551 * "phys_read_prev" to "phys_read".
1552 * 1552 *
1553 * Note: to debounce input signals, we will only consider as switched a signal which is 1553 * Note: to debounce input signals, we will only consider as switched a signal which is
1554 * stable across 2 measures. Signals which are different between two reads will be kept 1554 * stable across 2 measures. Signals which are different between two reads will be kept
1555 * as they previously were in their logical form (phys_prev). A signal which has just 1555 * as they previously were in their logical form (phys_prev). A signal which has just
1556 * switched will have a 1 in (phys_read ^ phys_read_prev). 1556 * switched will have a 1 in (phys_read ^ phys_read_prev).
1557 */ 1557 */
1558 static void phys_scan_contacts(void) 1558 static void phys_scan_contacts(void)
1559 { 1559 {
1560 int bit, bitval; 1560 int bit, bitval;
1561 char oldval; 1561 char oldval;
1562 char bitmask; 1562 char bitmask;
1563 char gndmask; 1563 char gndmask;
1564 1564
1565 phys_prev = phys_curr; 1565 phys_prev = phys_curr;
1566 phys_read_prev = phys_read; 1566 phys_read_prev = phys_read;
1567 phys_read = 0; /* flush all signals */ 1567 phys_read = 0; /* flush all signals */
1568 1568
1569 oldval = r_dtr(pprt) | scan_mask_o; /* keep track of old value, with all outputs disabled */ 1569 oldval = r_dtr(pprt) | scan_mask_o; /* keep track of old value, with all outputs disabled */
1570 w_dtr(pprt, oldval & ~scan_mask_o); /* activate all keyboard outputs (active low) */ 1570 w_dtr(pprt, oldval & ~scan_mask_o); /* activate all keyboard outputs (active low) */
1571 bitmask = PNL_PINPUT(r_str(pprt)) & scan_mask_i; /* will have a 1 for each bit set to gnd */ 1571 bitmask = PNL_PINPUT(r_str(pprt)) & scan_mask_i; /* will have a 1 for each bit set to gnd */
1572 w_dtr(pprt, oldval); /* disable all matrix signals */ 1572 w_dtr(pprt, oldval); /* disable all matrix signals */
1573 1573
1574 /* now that all outputs are cleared, the only active input bits are 1574 /* now that all outputs are cleared, the only active input bits are
1575 * directly connected to the ground 1575 * directly connected to the ground
1576 */ 1576 */
1577 gndmask = PNL_PINPUT(r_str(pprt)) & scan_mask_i; /* 1 for each grounded input */ 1577 gndmask = PNL_PINPUT(r_str(pprt)) & scan_mask_i; /* 1 for each grounded input */
1578 1578
1579 phys_read |= (pmask_t) gndmask << 40; /* grounded inputs are signals 40-44 */ 1579 phys_read |= (pmask_t) gndmask << 40; /* grounded inputs are signals 40-44 */
1580 1580
1581 if (bitmask != gndmask) { 1581 if (bitmask != gndmask) {
1582 /* since clearing the outputs changed some inputs, we know that some 1582 /* since clearing the outputs changed some inputs, we know that some
1583 * input signals are currently tied to some outputs. So we'll scan them. 1583 * input signals are currently tied to some outputs. So we'll scan them.
1584 */ 1584 */
1585 for (bit = 0; bit < 8; bit++) { 1585 for (bit = 0; bit < 8; bit++) {
1586 bitval = 1 << bit; 1586 bitval = 1 << bit;
1587 1587
1588 if (!(scan_mask_o & bitval)) /* skip unused bits */ 1588 if (!(scan_mask_o & bitval)) /* skip unused bits */
1589 continue; 1589 continue;
1590 1590
1591 w_dtr(pprt, oldval & ~bitval); /* enable this output */ 1591 w_dtr(pprt, oldval & ~bitval); /* enable this output */
1592 bitmask = PNL_PINPUT(r_str(pprt)) & ~gndmask; 1592 bitmask = PNL_PINPUT(r_str(pprt)) & ~gndmask;
1593 phys_read |= (pmask_t) bitmask << (5 * bit); 1593 phys_read |= (pmask_t) bitmask << (5 * bit);
1594 } 1594 }
1595 w_dtr(pprt, oldval); /* disable all outputs */ 1595 w_dtr(pprt, oldval); /* disable all outputs */
1596 } 1596 }
1597 /* this is easy: use old bits when they are flapping, use new ones when stable */ 1597 /* this is easy: use old bits when they are flapping, use new ones when stable */
1598 phys_curr = 1598 phys_curr =
1599 (phys_prev & (phys_read ^ phys_read_prev)) | (phys_read & 1599 (phys_prev & (phys_read ^ phys_read_prev)) | (phys_read &
1600 ~(phys_read ^ 1600 ~(phys_read ^
1601 phys_read_prev)); 1601 phys_read_prev));
1602 } 1602 }
1603 1603
1604 static void panel_process_inputs(void) 1604 static void panel_process_inputs(void)
1605 { 1605 {
1606 struct list_head *item; 1606 struct list_head *item;
1607 struct logical_input *input; 1607 struct logical_input *input;
1608 1608
1609 #if 0 1609 #if 0
1610 printk(KERN_DEBUG 1610 printk(KERN_DEBUG
1611 "entering panel_process_inputs with pp=%016Lx & pc=%016Lx\n", 1611 "entering panel_process_inputs with pp=%016Lx & pc=%016Lx\n",
1612 phys_prev, phys_curr); 1612 phys_prev, phys_curr);
1613 #endif 1613 #endif
1614 1614
1615 keypressed = 0; 1615 keypressed = 0;
1616 inputs_stable = 1; 1616 inputs_stable = 1;
1617 list_for_each(item, &logical_inputs) { 1617 list_for_each(item, &logical_inputs) {
1618 input = list_entry(item, struct logical_input, list); 1618 input = list_entry(item, struct logical_input, list);
1619 1619
1620 switch (input->state) { 1620 switch (input->state) {
1621 case INPUT_ST_LOW: 1621 case INPUT_ST_LOW:
1622 if ((phys_curr & input->mask) != input->value) 1622 if ((phys_curr & input->mask) != input->value)
1623 break; 1623 break;
1624 /* if all needed ones were already set previously, this means that 1624 /* if all needed ones were already set previously, this means that
1625 * this logical signal has been activated by the releasing of 1625 * this logical signal has been activated by the releasing of
1626 * another combined signal, so we don't want to match. 1626 * another combined signal, so we don't want to match.
1627 * eg: AB -(release B)-> A -(release A)-> 0 : don't match A. 1627 * eg: AB -(release B)-> A -(release A)-> 0 : don't match A.
1628 */ 1628 */
1629 if ((phys_prev & input->mask) == input->value) 1629 if ((phys_prev & input->mask) == input->value)
1630 break; 1630 break;
1631 input->rise_timer = 0; 1631 input->rise_timer = 0;
1632 input->state = INPUT_ST_RISING; 1632 input->state = INPUT_ST_RISING;
1633 /* no break here, fall through */ 1633 /* no break here, fall through */
1634 case INPUT_ST_RISING: 1634 case INPUT_ST_RISING:
1635 if ((phys_curr & input->mask) != input->value) { 1635 if ((phys_curr & input->mask) != input->value) {
1636 input->state = INPUT_ST_LOW; 1636 input->state = INPUT_ST_LOW;
1637 break; 1637 break;
1638 } 1638 }
1639 if (input->rise_timer < input->rise_time) { 1639 if (input->rise_timer < input->rise_time) {
1640 inputs_stable = 0; 1640 inputs_stable = 0;
1641 input->rise_timer++; 1641 input->rise_timer++;
1642 break; 1642 break;
1643 } 1643 }
1644 input->high_timer = 0; 1644 input->high_timer = 0;
1645 input->state = INPUT_ST_HIGH; 1645 input->state = INPUT_ST_HIGH;
1646 /* no break here, fall through */ 1646 /* no break here, fall through */
1647 case INPUT_ST_HIGH: 1647 case INPUT_ST_HIGH:
1648 #if 0 1648 #if 0
1649 /* FIXME: 1649 /* FIXME:
1650 * this is an invalid test. It tries to catch transitions from single-key 1650 * this is an invalid test. It tries to catch transitions from single-key
1651 * to multiple-key, but doesn't take into account the contacts polarity. 1651 * to multiple-key, but doesn't take into account the contacts polarity.
1652 * The only solution to the problem is to parse keys from the most complex 1652 * The only solution to the problem is to parse keys from the most complex
1653 * to the simplest combinations, and mark them as 'caught' once a combination 1653 * to the simplest combinations, and mark them as 'caught' once a combination
1654 * matches, then unmatch it for all other ones. 1654 * matches, then unmatch it for all other ones.
1655 */ 1655 */
1656 1656
1657 /* try to catch dangerous transitions cases : 1657 /* try to catch dangerous transitions cases :
1658 * someone adds a bit, so this signal was a false 1658 * someone adds a bit, so this signal was a false
1659 * positive resulting from a transition. We should invalidate 1659 * positive resulting from a transition. We should invalidate
1660 * the signal immediately and not call the release function. 1660 * the signal immediately and not call the release function.
1661 * eg: 0 -(press A)-> A -(press B)-> AB : don't match A's release. 1661 * eg: 0 -(press A)-> A -(press B)-> AB : don't match A's release.
1662 */ 1662 */
1663 if (((phys_prev & input->mask) == input->value) 1663 if (((phys_prev & input->mask) == input->value)
1664 && ((phys_curr & input->mask) > input->value)) { 1664 && ((phys_curr & input->mask) > input->value)) {
1665 input->state = INPUT_ST_LOW; /* invalidate */ 1665 input->state = INPUT_ST_LOW; /* invalidate */
1666 break; 1666 break;
1667 } 1667 }
1668 #endif 1668 #endif
1669 1669
1670 if ((phys_curr & input->mask) == input->value) { 1670 if ((phys_curr & input->mask) == input->value) {
1671 if ((input->type == INPUT_TYPE_STD) 1671 if ((input->type == INPUT_TYPE_STD)
1672 && (input->high_timer == 0)) { 1672 && (input->high_timer == 0)) {
1673 input->high_timer++; 1673 input->high_timer++;
1674 if (input->u.std.press_fct != NULL) 1674 if (input->u.std.press_fct != NULL)
1675 input->u.std.press_fct(input->u. 1675 input->u.std.press_fct(input->u.
1676 std. 1676 std.
1677 press_data); 1677 press_data);
1678 } else if (input->type == INPUT_TYPE_KBD) { 1678 } else if (input->type == INPUT_TYPE_KBD) {
1679 keypressed = 1; /* will turn on the light */ 1679 keypressed = 1; /* will turn on the light */
1680 1680
1681 if (input->high_timer == 0) { 1681 if (input->high_timer == 0) {
1682 if (input->u.kbd.press_str[0]) 1682 if (input->u.kbd.press_str[0])
1683 keypad_send_key(input-> 1683 keypad_send_key(input->
1684 u.kbd. 1684 u.kbd.
1685 press_str, 1685 press_str,
1686 sizeof 1686 sizeof
1687 (input-> 1687 (input->
1688 u.kbd. 1688 u.kbd.
1689 press_str)); 1689 press_str));
1690 } 1690 }
1691 1691
1692 if (input->u.kbd.repeat_str[0]) { 1692 if (input->u.kbd.repeat_str[0]) {
1693 if (input->high_timer >= 1693 if (input->high_timer >=
1694 KEYPAD_REP_START) { 1694 KEYPAD_REP_START) {
1695 input->high_timer -= 1695 input->high_timer -=
1696 KEYPAD_REP_DELAY; 1696 KEYPAD_REP_DELAY;
1697 keypad_send_key(input-> 1697 keypad_send_key(input->
1698 u.kbd. 1698 u.kbd.
1699 repeat_str, 1699 repeat_str,
1700 sizeof 1700 sizeof
1701 (input-> 1701 (input->
1702 u.kbd. 1702 u.kbd.
1703 repeat_str)); 1703 repeat_str));
1704 } 1704 }
1705 inputs_stable = 0; /* we will need to come back here soon */ 1705 inputs_stable = 0; /* we will need to come back here soon */
1706 } 1706 }
1707 1707
1708 if (input->high_timer < 255) 1708 if (input->high_timer < 255)
1709 input->high_timer++; 1709 input->high_timer++;
1710 } 1710 }
1711 break; 1711 break;
1712 } else { 1712 } else {
1713 /* else signal falling down. Let's fall through. */ 1713 /* else signal falling down. Let's fall through. */
1714 input->state = INPUT_ST_FALLING; 1714 input->state = INPUT_ST_FALLING;
1715 input->fall_timer = 0; 1715 input->fall_timer = 0;
1716 } 1716 }
1717 /* no break here, fall through */ 1717 /* no break here, fall through */
1718 case INPUT_ST_FALLING: 1718 case INPUT_ST_FALLING:
1719 #if 0 1719 #if 0
1720 /* FIXME !!! same comment as above */ 1720 /* FIXME !!! same comment as above */
1721 if (((phys_prev & input->mask) == input->value) 1721 if (((phys_prev & input->mask) == input->value)
1722 && ((phys_curr & input->mask) > input->value)) { 1722 && ((phys_curr & input->mask) > input->value)) {
1723 input->state = INPUT_ST_LOW; /* invalidate */ 1723 input->state = INPUT_ST_LOW; /* invalidate */
1724 break; 1724 break;
1725 } 1725 }
1726 #endif 1726 #endif
1727 1727
1728 if ((phys_curr & input->mask) == input->value) { 1728 if ((phys_curr & input->mask) == input->value) {
1729 if (input->type == INPUT_TYPE_KBD) { 1729 if (input->type == INPUT_TYPE_KBD) {
1730 keypressed = 1; /* will turn on the light */ 1730 keypressed = 1; /* will turn on the light */
1731 1731
1732 if (input->u.kbd.repeat_str[0]) { 1732 if (input->u.kbd.repeat_str[0]) {
1733 if (input->high_timer >= KEYPAD_REP_START) 1733 if (input->high_timer >= KEYPAD_REP_START)
1734 input->high_timer -= KEYPAD_REP_DELAY; 1734 input->high_timer -= KEYPAD_REP_DELAY;
1735 keypad_send_key(input->u.kbd.repeat_str, 1735 keypad_send_key(input->u.kbd.repeat_str,
1736 sizeof(input->u.kbd.repeat_str)); 1736 sizeof(input->u.kbd.repeat_str));
1737 inputs_stable = 0; /* we will need to come back here soon */ 1737 inputs_stable = 0; /* we will need to come back here soon */
1738 } 1738 }
1739 1739
1740 if (input->high_timer < 255) 1740 if (input->high_timer < 255)
1741 input->high_timer++; 1741 input->high_timer++;
1742 } 1742 }
1743 input->state = INPUT_ST_HIGH; 1743 input->state = INPUT_ST_HIGH;
1744 break; 1744 break;
1745 } else if (input->fall_timer >= input->fall_time) { 1745 } else if (input->fall_timer >= input->fall_time) {
1746 /* call release event */ 1746 /* call release event */
1747 if (input->type == INPUT_TYPE_STD) { 1747 if (input->type == INPUT_TYPE_STD) {
1748 if (input->u.std.release_fct != NULL) 1748 if (input->u.std.release_fct != NULL)
1749 input->u.std.release_fct(input->u.std.release_data); 1749 input->u.std.release_fct(input->u.std.release_data);
1750 1750
1751 } else if (input->type == INPUT_TYPE_KBD) { 1751 } else if (input->type == INPUT_TYPE_KBD) {
1752 if (input->u.kbd.release_str[0]) 1752 if (input->u.kbd.release_str[0])
1753 keypad_send_key(input->u.kbd.release_str, 1753 keypad_send_key(input->u.kbd.release_str,
1754 sizeof(input->u.kbd.release_str)); 1754 sizeof(input->u.kbd.release_str));
1755 } 1755 }
1756 1756
1757 input->state = INPUT_ST_LOW; 1757 input->state = INPUT_ST_LOW;
1758 break; 1758 break;
1759 } else { 1759 } else {
1760 input->fall_timer++; 1760 input->fall_timer++;
1761 inputs_stable = 0; 1761 inputs_stable = 0;
1762 break; 1762 break;
1763 } 1763 }
1764 } 1764 }
1765 } 1765 }
1766 } 1766 }
1767 1767
1768 static void panel_scan_timer(void) 1768 static void panel_scan_timer(void)
1769 { 1769 {
1770 if (keypad_enabled && keypad_initialized) { 1770 if (keypad_enabled && keypad_initialized) {
1771 if (spin_trylock(&pprt_lock)) { 1771 if (spin_trylock(&pprt_lock)) {
1772 phys_scan_contacts(); 1772 phys_scan_contacts();
1773 spin_unlock(&pprt_lock); /* no need for the parport anymore */ 1773 spin_unlock(&pprt_lock); /* no need for the parport anymore */
1774 } 1774 }
1775 1775
1776 if (!inputs_stable || phys_curr != phys_prev) 1776 if (!inputs_stable || phys_curr != phys_prev)
1777 panel_process_inputs(); 1777 panel_process_inputs();
1778 } 1778 }
1779 1779
1780 if (lcd_enabled && lcd_initialized) { 1780 if (lcd_enabled && lcd_initialized) {
1781 if (keypressed) { 1781 if (keypressed) {
1782 if (light_tempo == 0 && ((lcd_flags & LCD_FLAG_L) == 0)) 1782 if (light_tempo == 0 && ((lcd_flags & LCD_FLAG_L) == 0))
1783 lcd_backlight(1); 1783 lcd_backlight(1);
1784 light_tempo = FLASH_LIGHT_TEMPO; 1784 light_tempo = FLASH_LIGHT_TEMPO;
1785 } else if (light_tempo > 0) { 1785 } else if (light_tempo > 0) {
1786 light_tempo--; 1786 light_tempo--;
1787 if (light_tempo == 0 && ((lcd_flags & LCD_FLAG_L) == 0)) 1787 if (light_tempo == 0 && ((lcd_flags & LCD_FLAG_L) == 0))
1788 lcd_backlight(0); 1788 lcd_backlight(0);
1789 } 1789 }
1790 } 1790 }
1791 1791
1792 mod_timer(&scan_timer, jiffies + INPUT_POLL_TIME); 1792 mod_timer(&scan_timer, jiffies + INPUT_POLL_TIME);
1793 } 1793 }
1794 1794
1795 static void init_scan_timer(void) 1795 static void init_scan_timer(void)
1796 { 1796 {
1797 if (scan_timer.function != NULL) 1797 if (scan_timer.function != NULL)
1798 return; /* already started */ 1798 return; /* already started */
1799 1799
1800 init_timer(&scan_timer); 1800 init_timer(&scan_timer);
1801 scan_timer.expires = jiffies + INPUT_POLL_TIME; 1801 scan_timer.expires = jiffies + INPUT_POLL_TIME;
1802 scan_timer.data = 0; 1802 scan_timer.data = 0;
1803 scan_timer.function = (void *)&panel_scan_timer; 1803 scan_timer.function = (void *)&panel_scan_timer;
1804 add_timer(&scan_timer); 1804 add_timer(&scan_timer);
1805 } 1805 }
1806 1806
1807 /* converts a name of the form "({BbAaPpSsEe}{01234567-})*" to a series of bits. 1807 /* converts a name of the form "({BbAaPpSsEe}{01234567-})*" to a series of bits.
1808 * if <omask> or <imask> are non-null, they will be or'ed with the bits corresponding 1808 * if <omask> or <imask> are non-null, they will be or'ed with the bits corresponding
1809 * to out and in bits respectively. 1809 * to out and in bits respectively.
1810 * returns 1 if ok, 0 if error (in which case, nothing is written). 1810 * returns 1 if ok, 0 if error (in which case, nothing is written).
1811 */ 1811 */
1812 static int input_name2mask(char *name, pmask_t *mask, pmask_t *value, 1812 static int input_name2mask(char *name, pmask_t *mask, pmask_t *value,
1813 char *imask, char *omask) 1813 char *imask, char *omask)
1814 { 1814 {
1815 static char sigtab[10] = "EeSsPpAaBb"; 1815 static char sigtab[10] = "EeSsPpAaBb";
1816 char im, om; 1816 char im, om;
1817 pmask_t m, v; 1817 pmask_t m, v;
1818 1818
1819 om = im = m = v = 0ULL; 1819 om = im = m = v = 0ULL;
1820 while (*name) { 1820 while (*name) {
1821 int in, out, bit, neg; 1821 int in, out, bit, neg;
1822 for (in = 0; (in < sizeof(sigtab)) && (sigtab[in] != *name); in++) 1822 for (in = 0; (in < sizeof(sigtab)) && (sigtab[in] != *name); in++)
1823 ; 1823 ;
1824 if (in >= sizeof(sigtab)) 1824 if (in >= sizeof(sigtab))
1825 return 0; /* input name not found */ 1825 return 0; /* input name not found */
1826 neg = (in & 1); /* odd (lower) names are negated */ 1826 neg = (in & 1); /* odd (lower) names are negated */
1827 in >>= 1; 1827 in >>= 1;
1828 im |= (1 << in); 1828 im |= (1 << in);
1829 1829
1830 name++; 1830 name++;
1831 if (isdigit(*name)) { 1831 if (isdigit(*name)) {
1832 out = *name - '0'; 1832 out = *name - '0';
1833 om |= (1 << out); 1833 om |= (1 << out);
1834 } else if (*name == '-') 1834 } else if (*name == '-')
1835 out = 8; 1835 out = 8;
1836 else 1836 else
1837 return 0; /* unknown bit name */ 1837 return 0; /* unknown bit name */
1838 1838
1839 bit = (out * 5) + in; 1839 bit = (out * 5) + in;
1840 1840
1841 m |= 1ULL << bit; 1841 m |= 1ULL << bit;
1842 if (!neg) 1842 if (!neg)
1843 v |= 1ULL << bit; 1843 v |= 1ULL << bit;
1844 name++; 1844 name++;
1845 } 1845 }
1846 *mask = m; 1846 *mask = m;
1847 *value = v; 1847 *value = v;
1848 if (imask) 1848 if (imask)
1849 *imask |= im; 1849 *imask |= im;
1850 if (omask) 1850 if (omask)
1851 *omask |= om; 1851 *omask |= om;
1852 return 1; 1852 return 1;
1853 } 1853 }
1854 1854
1855 /* tries to bind a key to the signal name <name>. The key will send the 1855 /* tries to bind a key to the signal name <name>. The key will send the
1856 * strings <press>, <repeat>, <release> for these respective events. 1856 * strings <press>, <repeat>, <release> for these respective events.
1857 * Returns the pointer to the new key if ok, NULL if the key could not be bound. 1857 * Returns the pointer to the new key if ok, NULL if the key could not be bound.
1858 */ 1858 */
1859 static struct logical_input *panel_bind_key(char *name, char *press, 1859 static struct logical_input *panel_bind_key(char *name, char *press,
1860 char *repeat, char *release) 1860 char *repeat, char *release)
1861 { 1861 {
1862 struct logical_input *key; 1862 struct logical_input *key;
1863 1863
1864 key = kmalloc(sizeof(struct logical_input), GFP_KERNEL); 1864 key = kmalloc(sizeof(struct logical_input), GFP_KERNEL);
1865 if (!key) { 1865 if (!key) {
1866 printk(KERN_ERR "panel: not enough memory\n"); 1866 printk(KERN_ERR "panel: not enough memory\n");
1867 return NULL; 1867 return NULL;
1868 } 1868 }
1869 memset(key, 0, sizeof(struct logical_input)); 1869 memset(key, 0, sizeof(struct logical_input));
1870 if (!input_name2mask(name, &key->mask, &key->value, &scan_mask_i, 1870 if (!input_name2mask(name, &key->mask, &key->value, &scan_mask_i,
1871 &scan_mask_o)) 1871 &scan_mask_o))
1872 return NULL; 1872 return NULL;
1873 1873
1874 key->type = INPUT_TYPE_KBD; 1874 key->type = INPUT_TYPE_KBD;
1875 key->state = INPUT_ST_LOW; 1875 key->state = INPUT_ST_LOW;
1876 key->rise_time = 1; 1876 key->rise_time = 1;
1877 key->fall_time = 1; 1877 key->fall_time = 1;
1878 1878
1879 #if 0 1879 #if 0
1880 printk(KERN_DEBUG "bind: <%s> : m=%016Lx v=%016Lx\n", name, key->mask, 1880 printk(KERN_DEBUG "bind: <%s> : m=%016Lx v=%016Lx\n", name, key->mask,
1881 key->value); 1881 key->value);
1882 #endif 1882 #endif
1883 strncpy(key->u.kbd.press_str, press, sizeof(key->u.kbd.press_str)); 1883 strncpy(key->u.kbd.press_str, press, sizeof(key->u.kbd.press_str));
1884 strncpy(key->u.kbd.repeat_str, repeat, sizeof(key->u.kbd.repeat_str)); 1884 strncpy(key->u.kbd.repeat_str, repeat, sizeof(key->u.kbd.repeat_str));
1885 strncpy(key->u.kbd.release_str, release, 1885 strncpy(key->u.kbd.release_str, release,
1886 sizeof(key->u.kbd.release_str)); 1886 sizeof(key->u.kbd.release_str));
1887 list_add(&key->list, &logical_inputs); 1887 list_add(&key->list, &logical_inputs);
1888 return key; 1888 return key;
1889 } 1889 }
1890 1890
1891 #if 0 1891 #if 0
1892 /* tries to bind a callback function to the signal name <name>. The function 1892 /* tries to bind a callback function to the signal name <name>. The function
1893 * <press_fct> will be called with the <press_data> arg when the signal is 1893 * <press_fct> will be called with the <press_data> arg when the signal is
1894 * activated, and so on for <release_fct>/<release_data> 1894 * activated, and so on for <release_fct>/<release_data>
1895 * Returns the pointer to the new signal if ok, NULL if the signal could not be bound. 1895 * Returns the pointer to the new signal if ok, NULL if the signal could not be bound.
1896 */ 1896 */
1897 static struct logical_input *panel_bind_callback(char *name, 1897 static struct logical_input *panel_bind_callback(char *name,
1898 void (*press_fct) (int), 1898 void (*press_fct) (int),
1899 int press_data, 1899 int press_data,
1900 void (*release_fct) (int), 1900 void (*release_fct) (int),
1901 int release_data) 1901 int release_data)
1902 { 1902 {
1903 struct logical_input *callback; 1903 struct logical_input *callback;
1904 1904
1905 callback = kmalloc(sizeof(struct logical_input), GFP_KERNEL); 1905 callback = kmalloc(sizeof(struct logical_input), GFP_KERNEL);
1906 if (!callback) { 1906 if (!callback) {
1907 printk(KERN_ERR "panel: not enough memory\n"); 1907 printk(KERN_ERR "panel: not enough memory\n");
1908 return NULL; 1908 return NULL;
1909 } 1909 }
1910 memset(callback, 0, sizeof(struct logical_input)); 1910 memset(callback, 0, sizeof(struct logical_input));
1911 if (!input_name2mask(name, &callback->mask, &callback->value, 1911 if (!input_name2mask(name, &callback->mask, &callback->value,
1912 &scan_mask_i, &scan_mask_o)) 1912 &scan_mask_i, &scan_mask_o))
1913 return NULL; 1913 return NULL;
1914 1914
1915 callback->type = INPUT_TYPE_STD; 1915 callback->type = INPUT_TYPE_STD;
1916 callback->state = INPUT_ST_LOW; 1916 callback->state = INPUT_ST_LOW;
1917 callback->rise_time = 1; 1917 callback->rise_time = 1;
1918 callback->fall_time = 1; 1918 callback->fall_time = 1;
1919 callback->u.std.press_fct = press_fct; 1919 callback->u.std.press_fct = press_fct;
1920 callback->u.std.press_data = press_data; 1920 callback->u.std.press_data = press_data;
1921 callback->u.std.release_fct = release_fct; 1921 callback->u.std.release_fct = release_fct;
1922 callback->u.std.release_data = release_data; 1922 callback->u.std.release_data = release_data;
1923 list_add(&callback->list, &logical_inputs); 1923 list_add(&callback->list, &logical_inputs);
1924 return callback; 1924 return callback;
1925 } 1925 }
1926 #endif 1926 #endif
1927 1927
1928 static void keypad_init(void) 1928 static void keypad_init(void)
1929 { 1929 {
1930 int keynum; 1930 int keynum;
1931 init_waitqueue_head(&keypad_read_wait); 1931 init_waitqueue_head(&keypad_read_wait);
1932 keypad_buflen = 0; /* flushes any eventual noisy keystroke */ 1932 keypad_buflen = 0; /* flushes any eventual noisy keystroke */
1933 1933
1934 /* Let's create all known keys */ 1934 /* Let's create all known keys */
1935 1935
1936 for (keynum = 0; keypad_profile[keynum][0][0]; keynum++) { 1936 for (keynum = 0; keypad_profile[keynum][0][0]; keynum++) {
1937 panel_bind_key(keypad_profile[keynum][0], 1937 panel_bind_key(keypad_profile[keynum][0],
1938 keypad_profile[keynum][1], 1938 keypad_profile[keynum][1],
1939 keypad_profile[keynum][2], 1939 keypad_profile[keynum][2],
1940 keypad_profile[keynum][3]); 1940 keypad_profile[keynum][3]);
1941 } 1941 }
1942 1942
1943 init_scan_timer(); 1943 init_scan_timer();
1944 keypad_initialized = 1; 1944 keypad_initialized = 1;
1945 } 1945 }
1946 1946
1947 /**************************************************/ 1947 /**************************************************/
1948 /* device initialization */ 1948 /* device initialization */
1949 /**************************************************/ 1949 /**************************************************/
1950 1950
1951 static int panel_notify_sys(struct notifier_block *this, unsigned long code, 1951 static int panel_notify_sys(struct notifier_block *this, unsigned long code,
1952 void *unused) 1952 void *unused)
1953 { 1953 {
1954 if (lcd_enabled && lcd_initialized) { 1954 if (lcd_enabled && lcd_initialized) {
1955 switch (code) { 1955 switch (code) {
1956 case SYS_DOWN: 1956 case SYS_DOWN:
1957 panel_lcd_print 1957 panel_lcd_print
1958 ("\x0cReloading\nSystem...\x1b[Lc\x1b[Lb\x1b[L+"); 1958 ("\x0cReloading\nSystem...\x1b[Lc\x1b[Lb\x1b[L+");
1959 break; 1959 break;
1960 case SYS_HALT: 1960 case SYS_HALT:
1961 panel_lcd_print 1961 panel_lcd_print
1962 ("\x0cSystem Halted.\x1b[Lc\x1b[Lb\x1b[L+"); 1962 ("\x0cSystem Halted.\x1b[Lc\x1b[Lb\x1b[L+");
1963 break; 1963 break;
1964 case SYS_POWER_OFF: 1964 case SYS_POWER_OFF:
1965 panel_lcd_print("\x0cPower off.\x1b[Lc\x1b[Lb\x1b[L+"); 1965 panel_lcd_print("\x0cPower off.\x1b[Lc\x1b[Lb\x1b[L+");
1966 break; 1966 break;
1967 default: 1967 default:
1968 break; 1968 break;
1969 } 1969 }
1970 } 1970 }
1971 return NOTIFY_DONE; 1971 return NOTIFY_DONE;
1972 } 1972 }
1973 1973
1974 static struct notifier_block panel_notifier = { 1974 static struct notifier_block panel_notifier = {
1975 panel_notify_sys, 1975 panel_notify_sys,
1976 NULL, 1976 NULL,
1977 0 1977 0
1978 }; 1978 };
1979 1979
1980 static void panel_attach(struct parport *port) 1980 static void panel_attach(struct parport *port)
1981 { 1981 {
1982 if (port->number != parport) 1982 if (port->number != parport)
1983 return; 1983 return;
1984 1984
1985 if (pprt) { 1985 if (pprt) {
1986 printk(KERN_ERR 1986 printk(KERN_ERR
1987 "panel_attach(): port->number=%d parport=%d, already registered !\n", 1987 "panel_attach(): port->number=%d parport=%d, already registered !\n",
1988 port->number, parport); 1988 port->number, parport);
1989 return; 1989 return;
1990 } 1990 }
1991 1991
1992 pprt = parport_register_device(port, "panel", NULL, NULL, /* pf, kf */ 1992 pprt = parport_register_device(port, "panel", NULL, NULL, /* pf, kf */
1993 NULL, 1993 NULL,
1994 /*PARPORT_DEV_EXCL */ 1994 /*PARPORT_DEV_EXCL */
1995 0, (void *)&pprt); 1995 0, (void *)&pprt);
1996 1996
1997 if (parport_claim(pprt)) { 1997 if (parport_claim(pprt)) {
1998 printk(KERN_ERR 1998 printk(KERN_ERR
1999 "Panel: could not claim access to parport%d. Aborting.\n", 1999 "Panel: could not claim access to parport%d. Aborting.\n",
2000 parport); 2000 parport);
2001 return; 2001 return;
2002 } 2002 }
2003 2003
2004 /* must init LCD first, just in case an IRQ from the keypad is generated at keypad init */ 2004 /* must init LCD first, just in case an IRQ from the keypad is generated at keypad init */
2005 if (lcd_enabled) { 2005 if (lcd_enabled) {
2006 lcd_init(); 2006 lcd_init();
2007 misc_register(&lcd_dev); 2007 misc_register(&lcd_dev);
2008 } 2008 }
2009 2009
2010 if (keypad_enabled) { 2010 if (keypad_enabled) {
2011 keypad_init(); 2011 keypad_init();
2012 misc_register(&keypad_dev); 2012 misc_register(&keypad_dev);
2013 } 2013 }
2014 } 2014 }
2015 2015
2016 static void panel_detach(struct parport *port) 2016 static void panel_detach(struct parport *port)
2017 { 2017 {
2018 if (port->number != parport) 2018 if (port->number != parport)
2019 return; 2019 return;
2020 2020
2021 if (!pprt) { 2021 if (!pprt) {
2022 printk(KERN_ERR 2022 printk(KERN_ERR
2023 "panel_detach(): port->number=%d parport=%d, nothing to unregister.\n", 2023 "panel_detach(): port->number=%d parport=%d, nothing to unregister.\n",
2024 port->number, parport); 2024 port->number, parport);
2025 return; 2025 return;
2026 } 2026 }
2027 2027
2028 if (keypad_enabled && keypad_initialized) 2028 if (keypad_enabled && keypad_initialized)
2029 misc_deregister(&keypad_dev); 2029 misc_deregister(&keypad_dev);
2030 2030
2031 if (lcd_enabled && lcd_initialized) 2031 if (lcd_enabled && lcd_initialized)
2032 misc_deregister(&lcd_dev); 2032 misc_deregister(&lcd_dev);
2033 2033
2034 parport_release(pprt); 2034 parport_release(pprt);
2035 parport_unregister_device(pprt); 2035 parport_unregister_device(pprt);
2036 pprt = NULL; 2036 pprt = NULL;
2037 } 2037 }
2038 2038
2039 static struct parport_driver panel_driver = { 2039 static struct parport_driver panel_driver = {
2040 .name = "panel", 2040 .name = "panel",
2041 .attach = panel_attach, 2041 .attach = panel_attach,
2042 .detach = panel_detach, 2042 .detach = panel_detach,
2043 }; 2043 };
2044 2044
2045 /* init function */ 2045 /* init function */
2046 int panel_init(void) 2046 int panel_init(void)
2047 { 2047 {
2048 /* for backwards compatibility */ 2048 /* for backwards compatibility */
2049 if (keypad_type < 0) 2049 if (keypad_type < 0)
2050 keypad_type = keypad_enabled; 2050 keypad_type = keypad_enabled;
2051 2051
2052 if (lcd_type < 0) 2052 if (lcd_type < 0)
2053 lcd_type = lcd_enabled; 2053 lcd_type = lcd_enabled;
2054 2054
2055 if (parport < 0) 2055 if (parport < 0)
2056 parport = DEFAULT_PARPORT; 2056 parport = DEFAULT_PARPORT;
2057 2057
2058 /* take care of an eventual profile */ 2058 /* take care of an eventual profile */
2059 switch (profile) { 2059 switch (profile) {
2060 case PANEL_PROFILE_CUSTOM: /* custom profile */ 2060 case PANEL_PROFILE_CUSTOM: /* custom profile */
2061 if (keypad_type < 0) 2061 if (keypad_type < 0)
2062 keypad_type = DEFAULT_KEYPAD; 2062 keypad_type = DEFAULT_KEYPAD;
2063 if (lcd_type < 0) 2063 if (lcd_type < 0)
2064 lcd_type = DEFAULT_LCD; 2064 lcd_type = DEFAULT_LCD;
2065 break; 2065 break;
2066 case PANEL_PROFILE_OLD: /* 8 bits, 2*16, old keypad */ 2066 case PANEL_PROFILE_OLD: /* 8 bits, 2*16, old keypad */
2067 if (keypad_type < 0) 2067 if (keypad_type < 0)
2068 keypad_type = KEYPAD_TYPE_OLD; 2068 keypad_type = KEYPAD_TYPE_OLD;
2069 if (lcd_type < 0) 2069 if (lcd_type < 0)
2070 lcd_type = LCD_TYPE_OLD; 2070 lcd_type = LCD_TYPE_OLD;
2071 if (lcd_width < 0) 2071 if (lcd_width < 0)
2072 lcd_width = 16; 2072 lcd_width = 16;
2073 if (lcd_hwidth < 0) 2073 if (lcd_hwidth < 0)
2074 lcd_hwidth = 16; 2074 lcd_hwidth = 16;
2075 break; 2075 break;
2076 case PANEL_PROFILE_NEW: /* serial, 2*16, new keypad */ 2076 case PANEL_PROFILE_NEW: /* serial, 2*16, new keypad */
2077 if (keypad_type < 0) 2077 if (keypad_type < 0)
2078 keypad_type = KEYPAD_TYPE_NEW; 2078 keypad_type = KEYPAD_TYPE_NEW;
2079 if (lcd_type < 0) 2079 if (lcd_type < 0)
2080 lcd_type = LCD_TYPE_KS0074; 2080 lcd_type = LCD_TYPE_KS0074;
2081 break; 2081 break;
2082 case PANEL_PROFILE_HANTRONIX: /* 8 bits, 2*16 hantronix-like, no keypad */ 2082 case PANEL_PROFILE_HANTRONIX: /* 8 bits, 2*16 hantronix-like, no keypad */
2083 if (keypad_type < 0) 2083 if (keypad_type < 0)
2084 keypad_type = KEYPAD_TYPE_NONE; 2084 keypad_type = KEYPAD_TYPE_NONE;
2085 if (lcd_type < 0) 2085 if (lcd_type < 0)
2086 lcd_type = LCD_TYPE_HANTRONIX; 2086 lcd_type = LCD_TYPE_HANTRONIX;
2087 break; 2087 break;
2088 case PANEL_PROFILE_NEXCOM: /* generic 8 bits, 2*16, nexcom keypad, eg. Nexcom. */ 2088 case PANEL_PROFILE_NEXCOM: /* generic 8 bits, 2*16, nexcom keypad, eg. Nexcom. */
2089 if (keypad_type < 0) 2089 if (keypad_type < 0)
2090 keypad_type = KEYPAD_TYPE_NEXCOM; 2090 keypad_type = KEYPAD_TYPE_NEXCOM;
2091 if (lcd_type < 0) 2091 if (lcd_type < 0)
2092 lcd_type = LCD_TYPE_NEXCOM; 2092 lcd_type = LCD_TYPE_NEXCOM;
2093 break; 2093 break;
2094 case PANEL_PROFILE_LARGE: /* 8 bits, 2*40, old keypad */ 2094 case PANEL_PROFILE_LARGE: /* 8 bits, 2*40, old keypad */
2095 if (keypad_type < 0) 2095 if (keypad_type < 0)
2096 keypad_type = KEYPAD_TYPE_OLD; 2096 keypad_type = KEYPAD_TYPE_OLD;
2097 if (lcd_type < 0) 2097 if (lcd_type < 0)
2098 lcd_type = LCD_TYPE_OLD; 2098 lcd_type = LCD_TYPE_OLD;
2099 break; 2099 break;
2100 } 2100 }
2101 2101
2102 lcd_enabled = (lcd_type > 0); 2102 lcd_enabled = (lcd_type > 0);
2103 keypad_enabled = (keypad_type > 0); 2103 keypad_enabled = (keypad_type > 0);
2104 2104
2105 switch (keypad_type) { 2105 switch (keypad_type) {
2106 case KEYPAD_TYPE_OLD: 2106 case KEYPAD_TYPE_OLD:
2107 keypad_profile = old_keypad_profile; 2107 keypad_profile = old_keypad_profile;
2108 break; 2108 break;
2109 case KEYPAD_TYPE_NEW: 2109 case KEYPAD_TYPE_NEW:
2110 keypad_profile = new_keypad_profile; 2110 keypad_profile = new_keypad_profile;
2111 break; 2111 break;
2112 case KEYPAD_TYPE_NEXCOM: 2112 case KEYPAD_TYPE_NEXCOM:
2113 keypad_profile = nexcom_keypad_profile; 2113 keypad_profile = nexcom_keypad_profile;
2114 break; 2114 break;
2115 default: 2115 default:
2116 keypad_profile = NULL; 2116 keypad_profile = NULL;
2117 break; 2117 break;
2118 } 2118 }
2119 2119
2120 /* tells various subsystems about the fact that we are initializing */ 2120 /* tells various subsystems about the fact that we are initializing */
2121 init_in_progress = 1; 2121 init_in_progress = 1;
2122 2122
2123 if (parport_register_driver(&panel_driver)) { 2123 if (parport_register_driver(&panel_driver)) {
2124 printk(KERN_ERR 2124 printk(KERN_ERR
2125 "Panel: could not register with parport. Aborting.\n"); 2125 "Panel: could not register with parport. Aborting.\n");
2126 return -EIO; 2126 return -EIO;
2127 } 2127 }
2128 2128
2129 if (!lcd_enabled && !keypad_enabled) { 2129 if (!lcd_enabled && !keypad_enabled) {
2130 /* no device enabled, let's release the parport */ 2130 /* no device enabled, let's release the parport */
2131 if (pprt) { 2131 if (pprt) {
2132 parport_release(pprt); 2132 parport_release(pprt);
2133 parport_unregister_device(pprt); 2133 parport_unregister_device(pprt);
2134 } 2134 }
2135 parport_unregister_driver(&panel_driver); 2135 parport_unregister_driver(&panel_driver);
2136 printk(KERN_ERR "Panel driver version " PANEL_VERSION 2136 printk(KERN_ERR "Panel driver version " PANEL_VERSION
2137 " disabled.\n"); 2137 " disabled.\n");
2138 return -ENODEV; 2138 return -ENODEV;
2139 } 2139 }
2140 2140
2141 register_reboot_notifier(&panel_notifier); 2141 register_reboot_notifier(&panel_notifier);
2142 2142
2143 if (pprt) 2143 if (pprt)
2144 printk(KERN_INFO "Panel driver version " PANEL_VERSION 2144 printk(KERN_INFO "Panel driver version " PANEL_VERSION
2145 " registered on parport%d (io=0x%lx).\n", parport, 2145 " registered on parport%d (io=0x%lx).\n", parport,
2146 pprt->port->base); 2146 pprt->port->base);
2147 else 2147 else
2148 printk(KERN_INFO "Panel driver version " PANEL_VERSION 2148 printk(KERN_INFO "Panel driver version " PANEL_VERSION
2149 " not yet registered\n"); 2149 " not yet registered\n");
2150 /* tells various subsystems about the fact that initialization is finished */ 2150 /* tells various subsystems about the fact that initialization is finished */
2151 init_in_progress = 0; 2151 init_in_progress = 0;
2152 return 0; 2152 return 0;
2153 } 2153 }
2154 2154
2155 static int __init panel_init_module(void) 2155 static int __init panel_init_module(void)
2156 { 2156 {
2157 return panel_init(); 2157 return panel_init();
2158 } 2158 }
2159 2159
2160 static void __exit panel_cleanup_module(void) 2160 static void __exit panel_cleanup_module(void)
2161 { 2161 {
2162 unregister_reboot_notifier(&panel_notifier); 2162 unregister_reboot_notifier(&panel_notifier);
2163 2163
2164 if (scan_timer.function != NULL) 2164 if (scan_timer.function != NULL)
2165 del_timer(&scan_timer); 2165 del_timer(&scan_timer);
2166 2166
2167 if (keypad_enabled) 2167 if (pprt != NULL) {
2168 misc_deregister(&keypad_dev); 2168 if (keypad_enabled)
2169 misc_deregister(&keypad_dev);
2169 2170
2170 if (lcd_enabled) { 2171 if (lcd_enabled) {
2171 panel_lcd_print("\x0cLCD driver " PANEL_VERSION 2172 panel_lcd_print("\x0cLCD driver " PANEL_VERSION
2172 "\nunloaded.\x1b[Lc\x1b[Lb\x1b[L-"); 2173 "\nunloaded.\x1b[Lc\x1b[Lb\x1b[L-");
2173 misc_deregister(&lcd_dev); 2174 misc_deregister(&lcd_dev);
2174 } 2175 }
2175 2176
2176 /* TODO: free all input signals */ 2177 /* TODO: free all input signals */
2177 2178 parport_release(pprt);
2178 parport_release(pprt); 2179 parport_unregister_device(pprt);
2179 parport_unregister_device(pprt); 2180 }
2180 parport_unregister_driver(&panel_driver); 2181 parport_unregister_driver(&panel_driver);
2181 } 2182 }
2182 2183
2183 module_init(panel_init_module); 2184 module_init(panel_init_module);
2184 module_exit(panel_cleanup_module); 2185 module_exit(panel_cleanup_module);
2185 MODULE_AUTHOR("Willy Tarreau"); 2186 MODULE_AUTHOR("Willy Tarreau");
2186 MODULE_LICENSE("GPL"); 2187 MODULE_LICENSE("GPL");
2187 2188
2188 /* 2189 /*
2189 * Local variables: 2190 * Local variables:
2190 * c-indent-level: 4 2191 * c-indent-level: 4
2191 * tab-width: 8 2192 * tab-width: 8
2192 * End: 2193 * End:
2193 */ 2194 */
2194 2195
drivers/staging/rtl8187se/Kconfig
Diff comments   View file @ 778ef1e
1 config RTL8187SE 1 config RTL8187SE
2 tristate "RealTek RTL8187SE Wireless LAN NIC driver" 2 tristate "RealTek RTL8187SE Wireless LAN NIC driver"
3 depends on PCI 3 depends on PCI
4 depends on WIRELESS_EXT && COMPAT_NET_DEV_OPS
4 default N 5 default N
5 ---help--- 6 ---help---
6 7
drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
Diff comments   View file @ 778ef1e
1 /* 1 /*
2 * Host AP crypto routines 2 * Host AP crypto routines
3 * 3 *
4 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi> 4 * Copyright (c) 2002-2003, Jouni Malinen <jkmaline@cc.hut.fi>
5 * Portions Copyright (C) 2004, Intel Corporation <jketreno@linux.intel.com> 5 * Portions Copyright (C) 2004, Intel Corporation <jketreno@linux.intel.com>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. See README and COPYING for 9 * published by the Free Software Foundation. See README and COPYING for
10 * more details. 10 * more details.
11 * 11 *
12 */ 12 */
13 13
14 //#include <linux/config.h> 14 //#include <linux/config.h>
15 #include <linux/version.h> 15 #include <linux/version.h>
16 #include <linux/module.h> 16 #include <linux/module.h>
17 #include <linux/init.h> 17 #include <linux/init.h>
18 #include <linux/slab.h> 18 #include <linux/slab.h>
19 #include <asm/string.h> 19 #include <asm/string.h>
20 #include <asm/errno.h> 20 #include <asm/errno.h>
21 21
22 #if (LINUX_VERSION_CODE<KERNEL_VERSION(2,6,18)) 22 #if (LINUX_VERSION_CODE<KERNEL_VERSION(2,6,18))
23 #include<linux/config.h> 23 #include<linux/config.h>
24 #endif 24 #endif
25 25
26 #include "ieee80211.h" 26 #include "ieee80211.h"
27 27
28 MODULE_AUTHOR("Jouni Malinen"); 28 MODULE_AUTHOR("Jouni Malinen");
29 MODULE_DESCRIPTION("HostAP crypto"); 29 MODULE_DESCRIPTION("HostAP crypto");
30 MODULE_LICENSE("GPL"); 30 MODULE_LICENSE("GPL");
31 31
32 struct ieee80211_crypto_alg { 32 struct ieee80211_crypto_alg {
33 struct list_head list; 33 struct list_head list;
34 struct ieee80211_crypto_ops *ops; 34 struct ieee80211_crypto_ops *ops;
35 }; 35 };
36 36
37 37
38 struct ieee80211_crypto { 38 struct ieee80211_crypto {
39 struct list_head algs; 39 struct list_head algs;
40 spinlock_t lock; 40 spinlock_t lock;
41 }; 41 };
42 42
43 static struct ieee80211_crypto *hcrypt; 43 static struct ieee80211_crypto *hcrypt;
44 44
45 void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee, 45 void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee,
46 int force) 46 int force)
47 { 47 {
48 struct list_head *ptr, *n; 48 struct list_head *ptr, *n;
49 struct ieee80211_crypt_data *entry; 49 struct ieee80211_crypt_data *entry;
50 50
51 for (ptr = ieee->crypt_deinit_list.next, n = ptr->next; 51 for (ptr = ieee->crypt_deinit_list.next, n = ptr->next;
52 ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) { 52 ptr != &ieee->crypt_deinit_list; ptr = n, n = ptr->next) {
53 entry = list_entry(ptr, struct ieee80211_crypt_data, list); 53 entry = list_entry(ptr, struct ieee80211_crypt_data, list);
54 54
55 if (atomic_read(&entry->refcnt) != 0 && !force) 55 if (atomic_read(&entry->refcnt) != 0 && !force)
56 continue; 56 continue;
57 57
58 list_del(ptr); 58 list_del(ptr);
59 59
60 if (entry->ops) { 60 if (entry->ops) {
61 entry->ops->deinit(entry->priv); 61 entry->ops->deinit(entry->priv);
62 module_put(entry->ops->owner); 62 module_put(entry->ops->owner);
63 } 63 }
64 kfree(entry); 64 kfree(entry);
65 } 65 }
66 } 66 }
67 67
68 void ieee80211_crypt_deinit_handler(unsigned long data) 68 void ieee80211_crypt_deinit_handler(unsigned long data)
69 { 69 {
70 struct ieee80211_device *ieee = (struct ieee80211_device *)data; 70 struct ieee80211_device *ieee = (struct ieee80211_device *)data;
71 unsigned long flags; 71 unsigned long flags;
72 72
73 spin_lock_irqsave(&ieee->lock, flags); 73 spin_lock_irqsave(&ieee->lock, flags);
74 ieee80211_crypt_deinit_entries(ieee, 0); 74 ieee80211_crypt_deinit_entries(ieee, 0);
75 if (!list_empty(&ieee->crypt_deinit_list)) { 75 if (!list_empty(&ieee->crypt_deinit_list)) {
76 printk(KERN_DEBUG "%s: entries remaining in delayed crypt " 76 printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
77 "deletion list\n", ieee->dev->name); 77 "deletion list\n", ieee->dev->name);
78 ieee->crypt_deinit_timer.expires = jiffies + HZ; 78 ieee->crypt_deinit_timer.expires = jiffies + HZ;
79 add_timer(&ieee->crypt_deinit_timer); 79 add_timer(&ieee->crypt_deinit_timer);
80 } 80 }
81 spin_unlock_irqrestore(&ieee->lock, flags); 81 spin_unlock_irqrestore(&ieee->lock, flags);
82 82
83 } 83 }
84 84
85 void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee, 85 void ieee80211_crypt_delayed_deinit(struct ieee80211_device *ieee,
86 struct ieee80211_crypt_data **crypt) 86 struct ieee80211_crypt_data **crypt)
87 { 87 {
88 struct ieee80211_crypt_data *tmp; 88 struct ieee80211_crypt_data *tmp;
89 unsigned long flags; 89 unsigned long flags;
90 90
91 if (*crypt == NULL) 91 if (*crypt == NULL)
92 return; 92 return;
93 93
94 tmp = *crypt; 94 tmp = *crypt;
95 *crypt = NULL; 95 *crypt = NULL;
96 96
97 /* must not run ops->deinit() while there may be pending encrypt or 97 /* must not run ops->deinit() while there may be pending encrypt or
98 * decrypt operations. Use a list of delayed deinits to avoid needing 98 * decrypt operations. Use a list of delayed deinits to avoid needing
99 * locking. */ 99 * locking. */
100 100
101 spin_lock_irqsave(&ieee->lock, flags); 101 spin_lock_irqsave(&ieee->lock, flags);
102 list_add(&tmp->list, &ieee->crypt_deinit_list); 102 list_add(&tmp->list, &ieee->crypt_deinit_list);
103 if (!timer_pending(&ieee->crypt_deinit_timer)) { 103 if (!timer_pending(&ieee->crypt_deinit_timer)) {
104 ieee->crypt_deinit_timer.expires = jiffies + HZ; 104 ieee->crypt_deinit_timer.expires = jiffies + HZ;
105 add_timer(&ieee->crypt_deinit_timer); 105 add_timer(&ieee->crypt_deinit_timer);
106 } 106 }
107 spin_unlock_irqrestore(&ieee->lock, flags); 107 spin_unlock_irqrestore(&ieee->lock, flags);
108 } 108 }
109 109
110 int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops) 110 int ieee80211_register_crypto_ops(struct ieee80211_crypto_ops *ops)
111 { 111 {
112 unsigned long flags; 112 unsigned long flags;
113 struct ieee80211_crypto_alg *alg; 113 struct ieee80211_crypto_alg *alg;
114 114
115 if (hcrypt == NULL) 115 if (hcrypt == NULL)
116 return -1; 116 return -1;
117 117
118 alg = kmalloc(sizeof(*alg), GFP_KERNEL); 118 alg = kmalloc(sizeof(*alg), GFP_KERNEL);
119 if (alg == NULL) 119 if (alg == NULL)
120 return -ENOMEM; 120 return -ENOMEM;
121 121
122 memset(alg, 0, sizeof(*alg)); 122 memset(alg, 0, sizeof(*alg));
123 alg->ops = ops; 123 alg->ops = ops;
124 124
125 spin_lock_irqsave(&hcrypt->lock, flags); 125 spin_lock_irqsave(&hcrypt->lock, flags);
126 list_add(&alg->list, &hcrypt->algs); 126 list_add(&alg->list, &hcrypt->algs);
127 spin_unlock_irqrestore(&hcrypt->lock, flags); 127 spin_unlock_irqrestore(&hcrypt->lock, flags);
128 128
129 printk(KERN_DEBUG "ieee80211_crypt: registered algorithm '%s'\n", 129 printk(KERN_DEBUG "ieee80211_crypt: registered algorithm '%s'\n",
130 ops->name); 130 ops->name);
131 131
132 return 0; 132 return 0;
133 } 133 }
134 134
135 int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops) 135 int ieee80211_unregister_crypto_ops(struct ieee80211_crypto_ops *ops)
136 { 136 {
137 unsigned long flags; 137 unsigned long flags;
138 struct list_head *ptr; 138 struct list_head *ptr;
139 struct ieee80211_crypto_alg *del_alg = NULL; 139 struct ieee80211_crypto_alg *del_alg = NULL;
140 140
141 if (hcrypt == NULL) 141 if (hcrypt == NULL)
142 return -1; 142 return -1;
143 143
144 spin_lock_irqsave(&hcrypt->lock, flags); 144 spin_lock_irqsave(&hcrypt->lock, flags);
145 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) { 145 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
146 struct ieee80211_crypto_alg *alg = 146 struct ieee80211_crypto_alg *alg =
147 (struct ieee80211_crypto_alg *) ptr; 147 (struct ieee80211_crypto_alg *) ptr;
148 if (alg->ops == ops) { 148 if (alg->ops == ops) {
149 list_del(&alg->list); 149 list_del(&alg->list);
150 del_alg = alg; 150 del_alg = alg;
151 break; 151 break;
152 } 152 }
153 } 153 }
154 spin_unlock_irqrestore(&hcrypt->lock, flags); 154 spin_unlock_irqrestore(&hcrypt->lock, flags);
155 155
156 if (del_alg) { 156 if (del_alg) {
157 printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm " 157 printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
158 "'%s'\n", ops->name); 158 "'%s'\n", ops->name);
159 kfree(del_alg); 159 kfree(del_alg);
160 } 160 }
161 161
162 return del_alg ? 0 : -1; 162 return del_alg ? 0 : -1;
163 } 163 }
164 164
165 165
166 struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name) 166 struct ieee80211_crypto_ops * ieee80211_get_crypto_ops(const char *name)
167 { 167 {
168 unsigned long flags; 168 unsigned long flags;
169 struct list_head *ptr; 169 struct list_head *ptr;
170 struct ieee80211_crypto_alg *found_alg = NULL; 170 struct ieee80211_crypto_alg *found_alg = NULL;
171 171
172 if (hcrypt == NULL) 172 if (hcrypt == NULL)
173 return NULL; 173 return NULL;
174 174
175 spin_lock_irqsave(&hcrypt->lock, flags); 175 spin_lock_irqsave(&hcrypt->lock, flags);
176 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) { 176 for (ptr = hcrypt->algs.next; ptr != &hcrypt->algs; ptr = ptr->next) {
177 struct ieee80211_crypto_alg *alg = 177 struct ieee80211_crypto_alg *alg =
178 (struct ieee80211_crypto_alg *) ptr; 178 (struct ieee80211_crypto_alg *) ptr;
179 if (strcmp(alg->ops->name, name) == 0) { 179 if (strcmp(alg->ops->name, name) == 0) {
180 found_alg = alg; 180 found_alg = alg;
181 break; 181 break;
182 } 182 }
183 } 183 }
184 spin_unlock_irqrestore(&hcrypt->lock, flags); 184 spin_unlock_irqrestore(&hcrypt->lock, flags);
185 185
186 if (found_alg) 186 if (found_alg)
187 return found_alg->ops; 187 return found_alg->ops;
188 else 188 else
189 return NULL; 189 return NULL;
190 } 190 }
191 191
192 192
193 static void * ieee80211_crypt_null_init(int keyidx) { return (void *) 1; } 193 static void * ieee80211_crypt_null_init(int keyidx) { return (void *) 1; }
194 static void ieee80211_crypt_null_deinit(void *priv) {} 194 static void ieee80211_crypt_null_deinit(void *priv) {}
195 195
196 static struct ieee80211_crypto_ops ieee80211_crypt_null = { 196 static struct ieee80211_crypto_ops ieee80211_crypt_null = {
197 .name = "NULL", 197 .name = "NULL",
198 .init = ieee80211_crypt_null_init, 198 .init = ieee80211_crypt_null_init,
199 .deinit = ieee80211_crypt_null_deinit, 199 .deinit = ieee80211_crypt_null_deinit,
200 .encrypt_mpdu = NULL, 200 .encrypt_mpdu = NULL,
201 .decrypt_mpdu = NULL, 201 .decrypt_mpdu = NULL,
202 .encrypt_msdu = NULL, 202 .encrypt_msdu = NULL,
203 .decrypt_msdu = NULL, 203 .decrypt_msdu = NULL,
204 .set_key = NULL, 204 .set_key = NULL,
205 .get_key = NULL, 205 .get_key = NULL,
206 .extra_prefix_len = 0, 206 .extra_prefix_len = 0,
207 .extra_postfix_len = 0, 207 .extra_postfix_len = 0,
208 .owner = THIS_MODULE, 208 .owner = THIS_MODULE,
209 }; 209 };
210 210
211 211
212 int ieee80211_crypto_init(void) 212 int ieee80211_crypto_init(void)
213 { 213 {
214 int ret = -ENOMEM; 214 int ret = -ENOMEM;
215 215
216 hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL); 216 hcrypt = kmalloc(sizeof(*hcrypt), GFP_KERNEL);
217 if (!hcrypt) 217 if (!hcrypt)
218 goto out; 218 goto out;
219 219
220 memset(hcrypt, 0, sizeof(*hcrypt)); 220 memset(hcrypt, 0, sizeof(*hcrypt));
221 INIT_LIST_HEAD(&hcrypt->algs); 221 INIT_LIST_HEAD(&hcrypt->algs);
222 spin_lock_init(&hcrypt->lock); 222 spin_lock_init(&hcrypt->lock);
223 223
224 ret = ieee80211_register_crypto_ops(&ieee80211_crypt_null); 224 ret = ieee80211_register_crypto_ops(&ieee80211_crypt_null);
225 if (ret < 0) { 225 if (ret < 0) {
226 kfree(hcrypt); 226 kfree(hcrypt);
227 hcrypt = NULL; 227 hcrypt = NULL;
228 } 228 }
229 out: 229 out:
230 return ret; 230 return ret;
231 } 231 }
232 232
233 233
234 void ieee80211_crypto_deinit(void) 234 void ieee80211_crypto_deinit(void)
235 { 235 {
236 struct list_head *ptr, *n; 236 struct list_head *ptr, *n;
237 struct ieee80211_crypto_alg *alg = NULL;
237 238
238 if (hcrypt == NULL) 239 if (hcrypt == NULL)
239 return; 240 return;
240 241
241 for (ptr = hcrypt->algs.next, n = ptr->next; ptr != &hcrypt->algs; 242 list_for_each_safe(ptr, n, &hcrypt->algs) {
242 ptr = n, n = ptr->next) { 243 alg = list_entry(ptr, struct ieee80211_crypto_alg, list);
243 struct ieee80211_crypto_alg *alg = 244 if (alg) {
244 (struct ieee80211_crypto_alg *) ptr; 245 list_del(ptr);
245 list_del(ptr); 246 printk(KERN_DEBUG
246 printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm " 247 "ieee80211_crypt: unregistered algorithm '%s' (deinit)\n",
247 "'%s' (deinit)\n", alg->ops->name); 248 alg->ops->name);
248 kfree(alg); 249 kfree(alg);
250 }
249 } 251 }
250
251 kfree(hcrypt); 252 kfree(hcrypt);
252 } 253 }
253 254
254 #if 0 255 #if 0
255 EXPORT_SYMBOL(ieee80211_crypt_deinit_entries); 256 EXPORT_SYMBOL(ieee80211_crypt_deinit_entries);
256 EXPORT_SYMBOL(ieee80211_crypt_deinit_handler); 257 EXPORT_SYMBOL(ieee80211_crypt_deinit_handler);
257 EXPORT_SYMBOL(ieee80211_crypt_delayed_deinit); 258 EXPORT_SYMBOL(ieee80211_crypt_delayed_deinit);
258 259
259 EXPORT_SYMBOL(ieee80211_register_crypto_ops); 260 EXPORT_SYMBOL(ieee80211_register_crypto_ops);
260 EXPORT_SYMBOL(ieee80211_unregister_crypto_ops); 261 EXPORT_SYMBOL(ieee80211_unregister_crypto_ops);
261 EXPORT_SYMBOL(ieee80211_get_crypto_ops); 262 EXPORT_SYMBOL(ieee80211_get_crypto_ops);
262 #endif 263 #endif
263 264
264 //module_init(ieee80211_crypto_init); 265 //module_init(ieee80211_crypto_init);
265 //module_exit(ieee80211_crypto_deinit); 266 //module_exit(ieee80211_crypto_deinit);
drivers/staging/rtl8187se/r8180_core.c
Diff comments   View file @ 778ef1e
1 /* 1 /*
2 This is part of rtl818x pci OpenSource driver - v 0.1 2 This is part of rtl818x pci OpenSource driver - v 0.1
3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it> 3 Copyright (C) Andrea Merello 2004-2005 <andreamrl@tiscali.it>
4 Released under the terms of GPL (General Public License) 4 Released under the terms of GPL (General Public License)
5 5
6 Parts of this driver are based on the GPL part of the official 6 Parts of this driver are based on the GPL part of the official
7 Realtek driver. 7 Realtek driver.
8 8
9 Parts of this driver are based on the rtl8180 driver skeleton 9 Parts of this driver are based on the rtl8180 driver skeleton
10 from Patric Schenke & Andres Salomon. 10 from Patric Schenke & Andres Salomon.
11 11
12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver. 12 Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
13 13
14 Parts of BB/RF code are derived from David Young rtl8180 netbsd driver. 14 Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
15 15
16 RSSI calc function from 'The Deuce' 16 RSSI calc function from 'The Deuce'
17 17
18 Some ideas borrowed from the 8139too.c driver included in linux kernel. 18 Some ideas borrowed from the 8139too.c driver included in linux kernel.
19 19
20 We (I?) want to thanks the Authors of those projecs and also the 20 We (I?) want to thanks the Authors of those projecs and also the
21 Ndiswrapper's project Authors. 21 Ndiswrapper's project Authors.
22 22
23 A big big thanks goes also to Realtek corp. for their help in my attempt to 23 A big big thanks goes also to Realtek corp. for their help in my attempt to
24 add RTL8185 and RTL8225 support, and to David Young also. 24 add RTL8185 and RTL8225 support, and to David Young also.
25 */ 25 */
26 26
27 #if 0 27 #if 0
28 double __floatsidf (int i) { return i; } 28 double __floatsidf (int i) { return i; }
29 unsigned int __fixunsdfsi (double d) { return d; } 29 unsigned int __fixunsdfsi (double d) { return d; }
30 double __adddf3(double a, double b) { return a+b; } 30 double __adddf3(double a, double b) { return a+b; }
31 double __addsf3(float a, float b) { return a+b; } 31 double __addsf3(float a, float b) { return a+b; }
32 double __subdf3(double a, double b) { return a-b; } 32 double __subdf3(double a, double b) { return a-b; }
33 double __extendsfdf2(float a) {return a;} 33 double __extendsfdf2(float a) {return a;}
34 #endif 34 #endif
35 35
36 36
37 #undef DEBUG_TX_DESC2 37 #undef DEBUG_TX_DESC2
38 #undef RX_DONT_PASS_UL 38 #undef RX_DONT_PASS_UL
39 #undef DEBUG_EPROM 39 #undef DEBUG_EPROM
40 #undef DEBUG_RX_VERBOSE 40 #undef DEBUG_RX_VERBOSE
41 #undef DUMMY_RX 41 #undef DUMMY_RX
42 #undef DEBUG_ZERO_RX 42 #undef DEBUG_ZERO_RX
43 #undef DEBUG_RX_SKB 43 #undef DEBUG_RX_SKB
44 #undef DEBUG_TX_FRAG 44 #undef DEBUG_TX_FRAG
45 #undef DEBUG_RX_FRAG 45 #undef DEBUG_RX_FRAG
46 #undef DEBUG_TX_FILLDESC 46 #undef DEBUG_TX_FILLDESC
47 #undef DEBUG_TX 47 #undef DEBUG_TX
48 #undef DEBUG_IRQ 48 #undef DEBUG_IRQ
49 #undef DEBUG_RX 49 #undef DEBUG_RX
50 #undef DEBUG_RXALLOC 50 #undef DEBUG_RXALLOC
51 #undef DEBUG_REGISTERS 51 #undef DEBUG_REGISTERS
52 #undef DEBUG_RING 52 #undef DEBUG_RING
53 #undef DEBUG_IRQ_TASKLET 53 #undef DEBUG_IRQ_TASKLET
54 #undef DEBUG_TX_ALLOC 54 #undef DEBUG_TX_ALLOC
55 #undef DEBUG_TX_DESC 55 #undef DEBUG_TX_DESC
56 56
57 //#define DEBUG_TX 57 //#define DEBUG_TX
58 //#define DEBUG_TX_DESC2 58 //#define DEBUG_TX_DESC2
59 //#define DEBUG_RX 59 //#define DEBUG_RX
60 //#define DEBUG_RX_SKB 60 //#define DEBUG_RX_SKB
61 61
62 //#define CONFIG_RTL8180_IO_MAP 62 //#define CONFIG_RTL8180_IO_MAP
63 #include <linux/syscalls.h> 63 #include <linux/syscalls.h>
64 //#include <linux/fcntl.h> 64 //#include <linux/fcntl.h>
65 //#include <asm/uaccess.h> 65 //#include <asm/uaccess.h>
66 #include "r8180_hw.h" 66 #include "r8180_hw.h"
67 #include "r8180.h" 67 #include "r8180.h"
68 #include "r8180_sa2400.h" /* PHILIPS Radio frontend */ 68 #include "r8180_sa2400.h" /* PHILIPS Radio frontend */
69 #include "r8180_max2820.h" /* MAXIM Radio frontend */ 69 #include "r8180_max2820.h" /* MAXIM Radio frontend */
70 #include "r8180_gct.h" /* GCT Radio frontend */ 70 #include "r8180_gct.h" /* GCT Radio frontend */
71 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */ 71 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
72 #include "r8180_rtl8255.h" /* RTL8255 Radio frontend */ 72 #include "r8180_rtl8255.h" /* RTL8255 Radio frontend */
73 #include "r8180_93cx6.h" /* Card EEPROM */ 73 #include "r8180_93cx6.h" /* Card EEPROM */
74 #include "r8180_wx.h" 74 #include "r8180_wx.h"
75 #include "r8180_dm.h" 75 #include "r8180_dm.h"
76 76
77 #ifdef CONFIG_RTL8180_PM 77 #ifdef CONFIG_RTL8180_PM
78 #include "r8180_pm.h" 78 #include "r8180_pm.h"
79 #endif 79 #endif
80 80
81 #ifdef ENABLE_DOT11D 81 #ifdef ENABLE_DOT11D
82 #include "dot11d.h" 82 #include "dot11d.h"
83 #endif 83 #endif
84 84
85 #ifdef CONFIG_RTL8185B 85 #ifdef CONFIG_RTL8185B
86 //#define CONFIG_RTL8180_IO_MAP 86 //#define CONFIG_RTL8180_IO_MAP
87 #endif 87 #endif
88 88
89 #ifndef PCI_VENDOR_ID_BELKIN 89 #ifndef PCI_VENDOR_ID_BELKIN
90 #define PCI_VENDOR_ID_BELKIN 0x1799 90 #define PCI_VENDOR_ID_BELKIN 0x1799
91 #endif 91 #endif
92 #ifndef PCI_VENDOR_ID_DLINK 92 #ifndef PCI_VENDOR_ID_DLINK
93 #define PCI_VENDOR_ID_DLINK 0x1186 93 #define PCI_VENDOR_ID_DLINK 0x1186
94 #endif 94 #endif
95 95
96 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = { 96 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
97 { 97 {
98 .vendor = PCI_VENDOR_ID_REALTEK, 98 .vendor = PCI_VENDOR_ID_REALTEK,
99 // .device = 0x8180, 99 // .device = 0x8180,
100 .device = 0x8199, 100 .device = 0x8199,
101 .subvendor = PCI_ANY_ID, 101 .subvendor = PCI_ANY_ID,
102 .subdevice = PCI_ANY_ID, 102 .subdevice = PCI_ANY_ID,
103 .driver_data = 0, 103 .driver_data = 0,
104 }, 104 },
105 #if 0 105 #if 0
106 { 106 {
107 .vendor = PCI_VENDOR_ID_BELKIN, 107 .vendor = PCI_VENDOR_ID_BELKIN,
108 .device = 0x6001, 108 .device = 0x6001,
109 .subvendor = PCI_ANY_ID, 109 .subvendor = PCI_ANY_ID,
110 .subdevice = PCI_ANY_ID, 110 .subdevice = PCI_ANY_ID,
111 .driver_data = 1, 111 .driver_data = 1,
112 }, 112 },
113 { /* Belkin F5D6020 v3 */ 113 { /* Belkin F5D6020 v3 */
114 .vendor = PCI_VENDOR_ID_BELKIN, 114 .vendor = PCI_VENDOR_ID_BELKIN,
115 .device = 0x6020, 115 .device = 0x6020,
116 .subvendor = PCI_ANY_ID, 116 .subvendor = PCI_ANY_ID,
117 .subdevice = PCI_ANY_ID, 117 .subdevice = PCI_ANY_ID,
118 .driver_data = 2, 118 .driver_data = 2,
119 }, 119 },
120 { /* D-Link DWL-610 */ 120 { /* D-Link DWL-610 */
121 .vendor = PCI_VENDOR_ID_DLINK, 121 .vendor = PCI_VENDOR_ID_DLINK,
122 .device = 0x3300, 122 .device = 0x3300,
123 .subvendor = PCI_ANY_ID, 123 .subvendor = PCI_ANY_ID,
124 .subdevice = PCI_ANY_ID, 124 .subdevice = PCI_ANY_ID,
125 .driver_data = 3, 125 .driver_data = 3,
126 }, 126 },
127 { 127 {
128 .vendor = PCI_VENDOR_ID_REALTEK, 128 .vendor = PCI_VENDOR_ID_REALTEK,
129 .device = 0x8185, 129 .device = 0x8185,
130 .subvendor = PCI_ANY_ID, 130 .subvendor = PCI_ANY_ID,
131 .subdevice = PCI_ANY_ID, 131 .subdevice = PCI_ANY_ID,
132 .driver_data = 4, 132 .driver_data = 4,
133 }, 133 },
134 #endif 134 #endif
135 { 135 {
136 .vendor = 0, 136 .vendor = 0,
137 .device = 0, 137 .device = 0,
138 .subvendor = 0, 138 .subvendor = 0,
139 .subdevice = 0, 139 .subdevice = 0,
140 .driver_data = 0, 140 .driver_data = 0,
141 } 141 }
142 }; 142 };
143 143
144 144
145 static char* ifname = "wlan%d"; 145 static char* ifname = "wlan%d";
146 static int hwseqnum = 0; 146 static int hwseqnum = 0;
147 //static char* ifname = "ath%d"; 147 //static char* ifname = "ath%d";
148 static int hwwep = 0; 148 static int hwwep = 0;
149 static int channels = 0x3fff; 149 static int channels = 0x3fff;
150 150
151 #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 ) 151 #define eqMacAddr(a,b) ( ((a)[0]==(b)[0] && (a)[1]==(b)[1] && (a)[2]==(b)[2] && (a)[3]==(b)[3] && (a)[4]==(b)[4] && (a)[5]==(b)[5]) ? 1:0 )
152 #define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5]) 152 #define cpMacAddr(des,src) ((des)[0]=(src)[0],(des)[1]=(src)[1],(des)[2]=(src)[2],(des)[3]=(src)[3],(des)[4]=(src)[4],(des)[5]=(src)[5])
153 MODULE_LICENSE("GPL"); 153 MODULE_LICENSE("GPL");
154 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl); 154 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
155 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); 155 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
156 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards"); 156 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
157 157
158 158
159 159
160 /* 160 /*
161 MODULE_PARM(ifname, "s"); 161 MODULE_PARM(ifname, "s");
162 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default"); 162 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
163 163
164 MODULE_PARM(hwseqnum,"i"); 164 MODULE_PARM(hwseqnum,"i");
165 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default"); 165 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
166 166
167 MODULE_PARM(hwwep,"i"); 167 MODULE_PARM(hwwep,"i");
168 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards"); 168 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
169 169
170 MODULE_PARM(channels,"i"); 170 MODULE_PARM(channels,"i");
171 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI"); 171 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
172 */ 172 */
173 173
174 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9) 174 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 9)
175 module_param(ifname, charp, S_IRUGO|S_IWUSR ); 175 module_param(ifname, charp, S_IRUGO|S_IWUSR );
176 module_param(hwseqnum,int, S_IRUGO|S_IWUSR); 176 module_param(hwseqnum,int, S_IRUGO|S_IWUSR);
177 module_param(hwwep,int, S_IRUGO|S_IWUSR); 177 module_param(hwwep,int, S_IRUGO|S_IWUSR);
178 module_param(channels,int, S_IRUGO|S_IWUSR); 178 module_param(channels,int, S_IRUGO|S_IWUSR);
179 #else 179 #else
180 MODULE_PARM(ifname, "s"); 180 MODULE_PARM(ifname, "s");
181 MODULE_PARM(hwseqnum,"i"); 181 MODULE_PARM(hwseqnum,"i");
182 MODULE_PARM(hwwep,"i"); 182 MODULE_PARM(hwwep,"i");
183 MODULE_PARM(channels,"i"); 183 MODULE_PARM(channels,"i");
184 #endif 184 #endif
185 185
186 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default"); 186 MODULE_PARM_DESC(devname," Net interface name, wlan%d=default");
187 //MODULE_PARM_DESC(devname," Net interface name, ath%d=default"); 187 //MODULE_PARM_DESC(devname," Net interface name, ath%d=default");
188 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default"); 188 MODULE_PARM_DESC(hwseqnum," Try to use hardware 802.11 header sequence numbers. Zero=default");
189 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards"); 189 MODULE_PARM_DESC(hwwep," Try to use hardware WEP support. Still broken and not available on all cards");
190 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI"); 190 MODULE_PARM_DESC(channels," Channel bitmask for specific locales. NYI");
191 191
192 192
193 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev, 193 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
194 const struct pci_device_id *id); 194 const struct pci_device_id *id);
195 195
196 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev); 196 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
197 197
198 static void rtl8180_shutdown (struct pci_dev *pdev) 198 static void rtl8180_shutdown (struct pci_dev *pdev)
199 { 199 {
200 struct net_device *dev = pci_get_drvdata(pdev); 200 struct net_device *dev = pci_get_drvdata(pdev);
201 dev->stop(dev); 201 dev->stop(dev);
202 pci_disable_device(pdev); 202 pci_disable_device(pdev);
203 } 203 }
204 204
205 static struct pci_driver rtl8180_pci_driver = { 205 static struct pci_driver rtl8180_pci_driver = {
206 .name = RTL8180_MODULE_NAME, /* Driver name */ 206 .name = RTL8180_MODULE_NAME, /* Driver name */
207 .id_table = rtl8180_pci_id_tbl, /* PCI_ID table */ 207 .id_table = rtl8180_pci_id_tbl, /* PCI_ID table */
208 .probe = rtl8180_pci_probe, /* probe fn */ 208 .probe = rtl8180_pci_probe, /* probe fn */
209 .remove = __devexit_p(rtl8180_pci_remove),/* remove fn */ 209 .remove = __devexit_p(rtl8180_pci_remove),/* remove fn */
210 #ifdef CONFIG_RTL8180_PM 210 #ifdef CONFIG_RTL8180_PM
211 .suspend = rtl8180_suspend, /* PM suspend fn */ 211 .suspend = rtl8180_suspend, /* PM suspend fn */
212 .resume = rtl8180_resume, /* PM resume fn */ 212 .resume = rtl8180_resume, /* PM resume fn */
213 #else 213 #else
214 .suspend = NULL, /* PM suspend fn */ 214 .suspend = NULL, /* PM suspend fn */
215 .resume = NULL, /* PM resume fn */ 215 .resume = NULL, /* PM resume fn */
216 #endif 216 #endif
217 .shutdown = rtl8180_shutdown, 217 .shutdown = rtl8180_shutdown,
218 }; 218 };
219 219
220 220
221 221
222 #ifdef CONFIG_RTL8180_IO_MAP 222 #ifdef CONFIG_RTL8180_IO_MAP
223 223
224 u8 read_nic_byte(struct net_device *dev, int x) 224 u8 read_nic_byte(struct net_device *dev, int x)
225 { 225 {
226 return 0xff&inb(dev->base_addr +x); 226 return 0xff&inb(dev->base_addr +x);
227 } 227 }
228 228
229 u32 read_nic_dword(struct net_device *dev, int x) 229 u32 read_nic_dword(struct net_device *dev, int x)
230 { 230 {
231 return inl(dev->base_addr +x); 231 return inl(dev->base_addr +x);
232 } 232 }
233 233
234 u16 read_nic_word(struct net_device *dev, int x) 234 u16 read_nic_word(struct net_device *dev, int x)
235 { 235 {
236 return inw(dev->base_addr +x); 236 return inw(dev->base_addr +x);
237 } 237 }
238 238
239 void write_nic_byte(struct net_device *dev, int x,u8 y) 239 void write_nic_byte(struct net_device *dev, int x,u8 y)
240 { 240 {
241 outb(y&0xff,dev->base_addr +x); 241 outb(y&0xff,dev->base_addr +x);
242 } 242 }
243 243
244 void write_nic_word(struct net_device *dev, int x,u16 y) 244 void write_nic_word(struct net_device *dev, int x,u16 y)
245 { 245 {
246 outw(y,dev->base_addr +x); 246 outw(y,dev->base_addr +x);
247 } 247 }
248 248
249 void write_nic_dword(struct net_device *dev, int x,u32 y) 249 void write_nic_dword(struct net_device *dev, int x,u32 y)
250 { 250 {
251 outl(y,dev->base_addr +x); 251 outl(y,dev->base_addr +x);
252 } 252 }
253 253
254 #else /* RTL_IO_MAP */ 254 #else /* RTL_IO_MAP */
255 255
256 u8 read_nic_byte(struct net_device *dev, int x) 256 u8 read_nic_byte(struct net_device *dev, int x)
257 { 257 {
258 return 0xff&readb((u8*)dev->mem_start +x); 258 return 0xff&readb((u8*)dev->mem_start +x);
259 } 259 }
260 260
261 u32 read_nic_dword(struct net_device *dev, int x) 261 u32 read_nic_dword(struct net_device *dev, int x)
262 { 262 {
263 return readl((u8*)dev->mem_start +x); 263 return readl((u8*)dev->mem_start +x);
264 } 264 }
265 265
266 u16 read_nic_word(struct net_device *dev, int x) 266 u16 read_nic_word(struct net_device *dev, int x)
267 { 267 {
268 return readw((u8*)dev->mem_start +x); 268 return readw((u8*)dev->mem_start +x);
269 } 269 }
270 270
271 void write_nic_byte(struct net_device *dev, int x,u8 y) 271 void write_nic_byte(struct net_device *dev, int x,u8 y)
272 { 272 {
273 writeb(y,(u8*)dev->mem_start +x); 273 writeb(y,(u8*)dev->mem_start +x);
274 udelay(20); 274 udelay(20);
275 } 275 }
276 276
277 void write_nic_dword(struct net_device *dev, int x,u32 y) 277 void write_nic_dword(struct net_device *dev, int x,u32 y)
278 { 278 {
279 writel(y,(u8*)dev->mem_start +x); 279 writel(y,(u8*)dev->mem_start +x);
280 udelay(20); 280 udelay(20);
281 } 281 }
282 282
283 void write_nic_word(struct net_device *dev, int x,u16 y) 283 void write_nic_word(struct net_device *dev, int x,u16 y)
284 { 284 {
285 writew(y,(u8*)dev->mem_start +x); 285 writew(y,(u8*)dev->mem_start +x);
286 udelay(20); 286 udelay(20);
287 } 287 }
288 288
289 #endif /* RTL_IO_MAP */ 289 #endif /* RTL_IO_MAP */
290 290
291 291
292 292
293 293
294 294
295 inline void force_pci_posting(struct net_device *dev) 295 inline void force_pci_posting(struct net_device *dev)
296 { 296 {
297 read_nic_byte(dev,EPROM_CMD); 297 read_nic_byte(dev,EPROM_CMD);
298 #ifndef CONFIG_RTL8180_IO_MAP 298 #ifndef CONFIG_RTL8180_IO_MAP
299 mb(); 299 mb();
300 #endif 300 #endif
301 } 301 }
302 302
303 303
304 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs); 304 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
305 void set_nic_rxring(struct net_device *dev); 305 void set_nic_rxring(struct net_device *dev);
306 void set_nic_txring(struct net_device *dev); 306 void set_nic_txring(struct net_device *dev);
307 static struct net_device_stats *rtl8180_stats(struct net_device *dev); 307 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
308 void rtl8180_commit(struct net_device *dev); 308 void rtl8180_commit(struct net_device *dev);
309 void rtl8180_start_tx_beacon(struct net_device *dev); 309 void rtl8180_start_tx_beacon(struct net_device *dev);
310 310
311 /**************************************************************************** 311 /****************************************************************************
312 -----------------------------PROCFS STUFF------------------------- 312 -----------------------------PROCFS STUFF-------------------------
313 *****************************************************************************/ 313 *****************************************************************************/
314 314
315 static struct proc_dir_entry *rtl8180_proc = NULL; 315 static struct proc_dir_entry *rtl8180_proc = NULL;
316 316
317 static int proc_get_registers(char *page, char **start, 317 static int proc_get_registers(char *page, char **start,
318 off_t offset, int count, 318 off_t offset, int count,
319 int *eof, void *data) 319 int *eof, void *data)
320 { 320 {
321 struct net_device *dev = data; 321 struct net_device *dev = data;
322 // struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 322 // struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
323 323
324 int len = 0; 324 int len = 0;
325 int i,n; 325 int i,n;
326 326
327 int max=0xff; 327 int max=0xff;
328 328
329 /* This dump the current register page */ 329 /* This dump the current register page */
330 for(n=0;n<=max;) 330 for(n=0;n<=max;)
331 { 331 {
332 //printk( "\nD: %2x> ", n); 332 //printk( "\nD: %2x> ", n);
333 len += snprintf(page + len, count - len, 333 len += snprintf(page + len, count - len,
334 "\nD: %2x > ",n); 334 "\nD: %2x > ",n);
335 335
336 for(i=0;i<16 && n<=max;i++,n++) 336 for(i=0;i<16 && n<=max;i++,n++)
337 len += snprintf(page + len, count - len, 337 len += snprintf(page + len, count - len,
338 "%2x ",read_nic_byte(dev,n)); 338 "%2x ",read_nic_byte(dev,n));
339 339
340 // printk("%2x ",read_nic_byte(dev,n)); 340 // printk("%2x ",read_nic_byte(dev,n));
341 } 341 }
342 len += snprintf(page + len, count - len,"\n"); 342 len += snprintf(page + len, count - len,"\n");
343 343
344 344
345 345
346 *eof = 1; 346 *eof = 1;
347 return len; 347 return len;
348 348
349 } 349 }
350 350
351 int get_curr_tx_free_desc(struct net_device *dev, int priority); 351 int get_curr_tx_free_desc(struct net_device *dev, int priority);
352 352
353 static int proc_get_stats_hw(char *page, char **start, 353 static int proc_get_stats_hw(char *page, char **start,
354 off_t offset, int count, 354 off_t offset, int count,
355 int *eof, void *data) 355 int *eof, void *data)
356 { 356 {
357 //struct net_device *dev = data; 357 //struct net_device *dev = data;
358 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 358 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
359 359
360 int len = 0; 360 int len = 0;
361 #ifdef CONFIG_RTL8185B 361 #ifdef CONFIG_RTL8185B
362 362
363 #else 363 #else
364 len += snprintf(page + len, count - len, 364 len += snprintf(page + len, count - len,
365 "NIC int: %lu\n" 365 "NIC int: %lu\n"
366 "Total int: %lu\n" 366 "Total int: %lu\n"
367 "--------------------\n" 367 "--------------------\n"
368 "LP avail desc %d\n" 368 "LP avail desc %d\n"
369 "NP avail desc %d\n" 369 "NP avail desc %d\n"
370 "--------------------\n" 370 "--------------------\n"
371 "LP phys dma addr %x\n" 371 "LP phys dma addr %x\n"
372 "LP NIC ptr %x\n" 372 "LP NIC ptr %x\n"
373 "LP virt 32base %x\n" 373 "LP virt 32base %x\n"
374 "LP virt 32tail %x\n" 374 "LP virt 32tail %x\n"
375 "--------------------\n" 375 "--------------------\n"
376 "NP phys dma addr %x\n" 376 "NP phys dma addr %x\n"
377 "NP NIC ptr %x\n" 377 "NP NIC ptr %x\n"
378 "NP virt 32base %x\n" 378 "NP virt 32base %x\n"
379 "NP virt 32tail %x\n" 379 "NP virt 32tail %x\n"
380 "--------------------\n" 380 "--------------------\n"
381 "BP phys dma addr %x\n" 381 "BP phys dma addr %x\n"
382 "BP NIC ptr %x\n" 382 "BP NIC ptr %x\n"
383 "BP virt 32base %x\n" 383 "BP virt 32base %x\n"
384 "BP virt 32tail %x\n", 384 "BP virt 32tail %x\n",
385 priv->stats.ints, 385 priv->stats.ints,
386 priv->stats.shints, 386 priv->stats.shints,
387 get_curr_tx_free_desc(dev,LOW_PRIORITY), 387 get_curr_tx_free_desc(dev,LOW_PRIORITY),
388 get_curr_tx_free_desc(dev,NORM_PRIORITY), 388 get_curr_tx_free_desc(dev,NORM_PRIORITY),
389 (u32)priv->txvipringdma, 389 (u32)priv->txvipringdma,
390 read_nic_dword(dev,TLPDA), 390 read_nic_dword(dev,TLPDA),
391 (u32)priv->txvipring, 391 (u32)priv->txvipring,
392 (u32)priv->txvipringtail, 392 (u32)priv->txvipringtail,
393 (u32)priv->txvopringdma, 393 (u32)priv->txvopringdma,
394 read_nic_dword(dev,TNPDA), 394 read_nic_dword(dev,TNPDA),
395 (u32)priv->txvopring, 395 (u32)priv->txvopring,
396 (u32)priv->txvopringtail, 396 (u32)priv->txvopringtail,
397 (u32)priv->txbeaconringdma, 397 (u32)priv->txbeaconringdma,
398 read_nic_dword(dev,TBDA), 398 read_nic_dword(dev,TBDA),
399 (u32)priv->txbeaconring, 399 (u32)priv->txbeaconring,
400 (u32)priv->txbeaconringtail); 400 (u32)priv->txbeaconringtail);
401 #endif 401 #endif
402 *eof = 1; 402 *eof = 1;
403 return len; 403 return len;
404 } 404 }
405 405
406 406
407 static int proc_get_stats_rx(char *page, char **start, 407 static int proc_get_stats_rx(char *page, char **start,
408 off_t offset, int count, 408 off_t offset, int count,
409 int *eof, void *data) 409 int *eof, void *data)
410 { 410 {
411 struct net_device *dev = data; 411 struct net_device *dev = data;
412 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 412 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
413 413
414 int len = 0; 414 int len = 0;
415 415
416 len += snprintf(page + len, count - len, 416 len += snprintf(page + len, count - len,
417 /* "RX descriptor not available: %lu\n" 417 /* "RX descriptor not available: %lu\n"
418 "RX incomplete (missing last descriptor): %lu\n" 418 "RX incomplete (missing last descriptor): %lu\n"
419 "RX not data: %lu\n" 419 "RX not data: %lu\n"
420 //"RX descriptor pointer reset: %lu\n" 420 //"RX descriptor pointer reset: %lu\n"
421 "RX descriptor pointer lost: %lu\n" 421 "RX descriptor pointer lost: %lu\n"
422 //"RX pointer workaround: %lu\n" 422 //"RX pointer workaround: %lu\n"
423 "RX error int: %lu\n" 423 "RX error int: %lu\n"
424 "RX fifo overflow: %lu\n" 424 "RX fifo overflow: %lu\n"
425 "RX int: %lu\n" 425 "RX int: %lu\n"
426 "RX packet: %lu\n" 426 "RX packet: %lu\n"
427 "RX bytes: %lu\n" 427 "RX bytes: %lu\n"
428 "RX DMA fail: %lu\n", 428 "RX DMA fail: %lu\n",
429 priv->stats.rxrdu, 429 priv->stats.rxrdu,
430 priv->stats.rxnolast, 430 priv->stats.rxnolast,
431 priv->stats.rxnodata, 431 priv->stats.rxnodata,
432 //priv->stats.rxreset, 432 //priv->stats.rxreset,
433 priv->stats.rxnopointer, 433 priv->stats.rxnopointer,
434 //priv->stats.rxwrkaround, 434 //priv->stats.rxwrkaround,
435 priv->stats.rxerr, 435 priv->stats.rxerr,
436 priv->stats.rxoverflow, 436 priv->stats.rxoverflow,
437 priv->stats.rxint, 437 priv->stats.rxint,
438 priv->ieee80211->stats.rx_packets, 438 priv->ieee80211->stats.rx_packets,
439 priv->ieee80211->stats.rx_bytes, 439 priv->ieee80211->stats.rx_bytes,
440 priv->stats.rxdmafail */ 440 priv->stats.rxdmafail */
441 "RX OK: %lu\n" 441 "RX OK: %lu\n"
442 "RX Retry: %lu\n" 442 "RX Retry: %lu\n"
443 "RX CRC Error(0-500): %lu\n" 443 "RX CRC Error(0-500): %lu\n"
444 "RX CRC Error(500-1000): %lu\n" 444 "RX CRC Error(500-1000): %lu\n"
445 "RX CRC Error(>1000): %lu\n" 445 "RX CRC Error(>1000): %lu\n"
446 "RX ICV Error: %lu\n", 446 "RX ICV Error: %lu\n",
447 priv->stats.rxint, 447 priv->stats.rxint,
448 priv->stats.rxerr, 448 priv->stats.rxerr,
449 priv->stats.rxcrcerrmin, 449 priv->stats.rxcrcerrmin,
450 priv->stats.rxcrcerrmid, 450 priv->stats.rxcrcerrmid,
451 priv->stats.rxcrcerrmax, 451 priv->stats.rxcrcerrmax,
452 priv->stats.rxicverr 452 priv->stats.rxicverr
453 ); 453 );
454 454
455 *eof = 1; 455 *eof = 1;
456 return len; 456 return len;
457 } 457 }
458 458
459 #if 0 459 #if 0
460 static int proc_get_stats_ieee(char *page, char **start, 460 static int proc_get_stats_ieee(char *page, char **start,
461 off_t offset, int count, 461 off_t offset, int count,
462 int *eof, void *data) 462 int *eof, void *data)
463 { 463 {
464 struct net_device *dev = data; 464 struct net_device *dev = data;
465 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 465 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
466 466
467 int len = 0; 467 int len = 0;
468 468
469 len += snprintf(page + len, count - len, 469 len += snprintf(page + len, count - len,
470 "TXed association requests: %u\n" 470 "TXed association requests: %u\n"
471 "TXed authentication requests: %u\n" 471 "TXed authentication requests: %u\n"
472 "RXed successful association response: %u\n" 472 "RXed successful association response: %u\n"
473 "RXed failed association response: %u\n" 473 "RXed failed association response: %u\n"
474 "RXed successful authentication response: %u\n" 474 "RXed successful authentication response: %u\n"
475 "RXed failed authentication response: %u\n" 475 "RXed failed authentication response: %u\n"
476 "Association requests without response: %u\n" 476 "Association requests without response: %u\n"
477 "Authentication requests without response: %u\n" 477 "Authentication requests without response: %u\n"
478 "TX probe response: %u\n" 478 "TX probe response: %u\n"
479 "RX probe request: %u\n" 479 "RX probe request: %u\n"
480 "TX probe request: %lu\n" 480 "TX probe request: %lu\n"
481 "RX authentication requests: %lu\n" 481 "RX authentication requests: %lu\n"
482 "RX association requests: %lu\n" 482 "RX association requests: %lu\n"
483 "Reassociations: %lu\n", 483 "Reassociations: %lu\n",
484 priv->ieee80211->ieee_stats.tx_ass, 484 priv->ieee80211->ieee_stats.tx_ass,
485 priv->ieee80211->ieee_stats.tx_aut, 485 priv->ieee80211->ieee_stats.tx_aut,
486 priv->ieee80211->ieee_stats.rx_ass_ok, 486 priv->ieee80211->ieee_stats.rx_ass_ok,
487 priv->ieee80211->ieee_stats.rx_ass_err, 487 priv->ieee80211->ieee_stats.rx_ass_err,
488 priv->ieee80211->ieee_stats.rx_aut_ok, 488 priv->ieee80211->ieee_stats.rx_aut_ok,
489 priv->ieee80211->ieee_stats.rx_aut_err, 489 priv->ieee80211->ieee_stats.rx_aut_err,
490 priv->ieee80211->ieee_stats.ass_noresp, 490 priv->ieee80211->ieee_stats.ass_noresp,
491 priv->ieee80211->ieee_stats.aut_noresp, 491 priv->ieee80211->ieee_stats.aut_noresp,
492 priv->ieee80211->ieee_stats.tx_probe, 492 priv->ieee80211->ieee_stats.tx_probe,
493 priv->ieee80211->ieee_stats.rx_probe, 493 priv->ieee80211->ieee_stats.rx_probe,
494 priv->ieee80211->ieee_stats.tx_probe_rq, 494 priv->ieee80211->ieee_stats.tx_probe_rq,
495 priv->ieee80211->ieee_stats.rx_auth_rq, 495 priv->ieee80211->ieee_stats.rx_auth_rq,
496 priv->ieee80211->ieee_stats.rx_assoc_rq, 496 priv->ieee80211->ieee_stats.rx_assoc_rq,
497 priv->ieee80211->ieee_stats.reassoc); 497 priv->ieee80211->ieee_stats.reassoc);
498 498
499 *eof = 1; 499 *eof = 1;
500 return len; 500 return len;
501 } 501 }
502 #endif 502 #endif
503 #if 0 503 #if 0
504 static int proc_get_stats_ap(char *page, char **start, 504 static int proc_get_stats_ap(char *page, char **start,
505 off_t offset, int count, 505 off_t offset, int count,
506 int *eof, void *data) 506 int *eof, void *data)
507 { 507 {
508 struct net_device *dev = data; 508 struct net_device *dev = data;
509 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 509 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
510 struct mac_htable_t *list; 510 struct mac_htable_t *list;
511 int i; 511 int i;
512 int len = 0; 512 int len = 0;
513 513
514 if(priv->ieee80211->iw_mode != IW_MODE_MASTER){ 514 if(priv->ieee80211->iw_mode != IW_MODE_MASTER){
515 len += snprintf(page + len, count - len, 515 len += snprintf(page + len, count - len,
516 "Card is not acting as AP...\n" 516 "Card is not acting as AP...\n"
517 ); 517 );
518 }else{ 518 }else{
519 len += snprintf(page + len, count - len, 519 len += snprintf(page + len, count - len,
520 "List of associated STA:\n" 520 "List of associated STA:\n"
521 ); 521 );
522 522
523 for(i=0;i<MAC_HTABLE_ENTRY;i++) 523 for(i=0;i<MAC_HTABLE_ENTRY;i++)
524 for (list = priv->ieee80211->assoc_htable[i]; list!=NULL; list = list->next){ 524 for (list = priv->ieee80211->assoc_htable[i]; list!=NULL; list = list->next){
525 len += snprintf(page + len, count - len, 525 len += snprintf(page + len, count - len,
526 MACSTR"\n",MAC2STR(list->adr)); 526 MACSTR"\n",MAC2STR(list->adr));
527 } 527 }
528 528
529 } 529 }
530 *eof = 1; 530 *eof = 1;
531 return len; 531 return len;
532 } 532 }
533 #endif 533 #endif
534 534
535 static int proc_get_stats_tx(char *page, char **start, 535 static int proc_get_stats_tx(char *page, char **start,
536 off_t offset, int count, 536 off_t offset, int count,
537 int *eof, void *data) 537 int *eof, void *data)
538 { 538 {
539 struct net_device *dev = data; 539 struct net_device *dev = data;
540 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 540 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
541 541
542 int len = 0; 542 int len = 0;
543 unsigned long totalOK; 543 unsigned long totalOK;
544 544
545 totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint; 545 totalOK=priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
546 len += snprintf(page + len, count - len, 546 len += snprintf(page + len, count - len,
547 /* "TX normal priority ok int: %lu\n" 547 /* "TX normal priority ok int: %lu\n"
548 "TX normal priority error int: %lu\n" 548 "TX normal priority error int: %lu\n"
549 "TX high priority ok int: %lu\n" 549 "TX high priority ok int: %lu\n"
550 "TX high priority failed error int: %lu\n" 550 "TX high priority failed error int: %lu\n"
551 "TX low priority ok int: %lu\n" 551 "TX low priority ok int: %lu\n"
552 "TX low priority failed error int: %lu\n" 552 "TX low priority failed error int: %lu\n"
553 "TX bytes: %lu\n" 553 "TX bytes: %lu\n"
554 "TX packets: %lu\n" 554 "TX packets: %lu\n"
555 "TX queue resume: %lu\n" 555 "TX queue resume: %lu\n"
556 "TX queue stopped?: %d\n" 556 "TX queue stopped?: %d\n"
557 "TX fifo overflow: %lu\n" 557 "TX fifo overflow: %lu\n"
558 //"SW TX stop: %lu\n" 558 //"SW TX stop: %lu\n"
559 //"SW TX wake: %lu\n" 559 //"SW TX wake: %lu\n"
560 "TX beacon: %lu\n" 560 "TX beacon: %lu\n"
561 "TX beacon aborted: %lu\n", 561 "TX beacon aborted: %lu\n",
562 priv->stats.txnpokint, 562 priv->stats.txnpokint,
563 priv->stats.txnperr, 563 priv->stats.txnperr,
564 priv->stats.txhpokint, 564 priv->stats.txhpokint,
565 priv->stats.txhperr, 565 priv->stats.txhperr,
566 priv->stats.txlpokint, 566 priv->stats.txlpokint,
567 priv->stats.txlperr, 567 priv->stats.txlperr,
568 priv->ieee80211->stats.tx_bytes, 568 priv->ieee80211->stats.tx_bytes,
569 priv->ieee80211->stats.tx_packets, 569 priv->ieee80211->stats.tx_packets,
570 priv->stats.txresumed, 570 priv->stats.txresumed,
571 netif_queue_stopped(dev), 571 netif_queue_stopped(dev),
572 priv->stats.txoverflow, 572 priv->stats.txoverflow,
573 //priv->ieee80211->ieee_stats.swtxstop, 573 //priv->ieee80211->ieee_stats.swtxstop,
574 //priv->ieee80211->ieee_stats.swtxawake, 574 //priv->ieee80211->ieee_stats.swtxawake,
575 priv->stats.txbeacon, 575 priv->stats.txbeacon,
576 priv->stats.txbeaconerr */ 576 priv->stats.txbeaconerr */
577 "TX OK: %lu\n" 577 "TX OK: %lu\n"
578 "TX Error: %lu\n" 578 "TX Error: %lu\n"
579 "TX Retry: %lu\n" 579 "TX Retry: %lu\n"
580 "TX beacon OK: %lu\n" 580 "TX beacon OK: %lu\n"
581 "TX beacon error: %lu\n", 581 "TX beacon error: %lu\n",
582 totalOK, 582 totalOK,
583 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr, 583 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
584 priv->stats.txretry, 584 priv->stats.txretry,
585 priv->stats.txbeacon, 585 priv->stats.txbeacon,
586 priv->stats.txbeaconerr 586 priv->stats.txbeaconerr
587 ); 587 );
588 588
589 *eof = 1; 589 *eof = 1;
590 return len; 590 return len;
591 } 591 }
592 592
593 593
594 #if WIRELESS_EXT < 17 594 #if WIRELESS_EXT < 17
595 static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev) 595 static struct iw_statistics *r8180_get_wireless_stats(struct net_device *dev)
596 { 596 {
597 struct r8180_priv *priv = ieee80211_priv(dev); 597 struct r8180_priv *priv = ieee80211_priv(dev);
598 598
599 return &priv->wstats; 599 return &priv->wstats;
600 } 600 }
601 #endif 601 #endif
602 void rtl8180_proc_module_init(void) 602 void rtl8180_proc_module_init(void)
603 { 603 {
604 DMESG("Initializing proc filesystem"); 604 DMESG("Initializing proc filesystem");
605 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) 605 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
606 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, proc_net); 606 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, proc_net);
607 #else 607 #else
608 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net); 608 rtl8180_proc=create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
609 #endif 609 #endif
610 } 610 }
611 611
612 612
613 void rtl8180_proc_module_remove(void) 613 void rtl8180_proc_module_remove(void)
614 { 614 {
615 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) 615 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
616 remove_proc_entry(RTL8180_MODULE_NAME, proc_net); 616 remove_proc_entry(RTL8180_MODULE_NAME, proc_net);
617 #else 617 #else
618 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net); 618 remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
619 #endif 619 #endif
620 } 620 }
621 621
622 622
623 void rtl8180_proc_remove_one(struct net_device *dev) 623 void rtl8180_proc_remove_one(struct net_device *dev)
624 { 624 {
625 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 625 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
626 if (priv->dir_dev) { 626 if (priv->dir_dev) {
627 remove_proc_entry("stats-hw", priv->dir_dev); 627 remove_proc_entry("stats-hw", priv->dir_dev);
628 remove_proc_entry("stats-tx", priv->dir_dev); 628 remove_proc_entry("stats-tx", priv->dir_dev);
629 remove_proc_entry("stats-rx", priv->dir_dev); 629 remove_proc_entry("stats-rx", priv->dir_dev);
630 // remove_proc_entry("stats-ieee", priv->dir_dev); 630 // remove_proc_entry("stats-ieee", priv->dir_dev);
631 // remove_proc_entry("stats-ap", priv->dir_dev); 631 // remove_proc_entry("stats-ap", priv->dir_dev);
632 remove_proc_entry("registers", priv->dir_dev); 632 remove_proc_entry("registers", priv->dir_dev);
633 remove_proc_entry(dev->name, rtl8180_proc); 633 remove_proc_entry(dev->name, rtl8180_proc);
634 priv->dir_dev = NULL; 634 priv->dir_dev = NULL;
635 } 635 }
636 } 636 }
637 637
638 638
639 void rtl8180_proc_init_one(struct net_device *dev) 639 void rtl8180_proc_init_one(struct net_device *dev)
640 { 640 {
641 struct proc_dir_entry *e; 641 struct proc_dir_entry *e;
642 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 642 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
643 priv->dir_dev = create_proc_entry(dev->name, 643 priv->dir_dev = create_proc_entry(dev->name,
644 S_IFDIR | S_IRUGO | S_IXUGO, 644 S_IFDIR | S_IRUGO | S_IXUGO,
645 rtl8180_proc); 645 rtl8180_proc);
646 if (!priv->dir_dev) { 646 if (!priv->dir_dev) {
647 DMESGE("Unable to initialize /proc/net/rtl8180/%s\n", 647 DMESGE("Unable to initialize /proc/net/rtl8180/%s\n",
648 dev->name); 648 dev->name);
649 return; 649 return;
650 } 650 }
651 651
652 e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO, 652 e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
653 priv->dir_dev, proc_get_stats_hw, dev); 653 priv->dir_dev, proc_get_stats_hw, dev);
654 654
655 if (!e) { 655 if (!e) {
656 DMESGE("Unable to initialize " 656 DMESGE("Unable to initialize "
657 "/proc/net/rtl8180/%s/stats-hw\n", 657 "/proc/net/rtl8180/%s/stats-hw\n",
658 dev->name); 658 dev->name);
659 } 659 }
660 660
661 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO, 661 e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
662 priv->dir_dev, proc_get_stats_rx, dev); 662 priv->dir_dev, proc_get_stats_rx, dev);
663 663
664 if (!e) { 664 if (!e) {
665 DMESGE("Unable to initialize " 665 DMESGE("Unable to initialize "
666 "/proc/net/rtl8180/%s/stats-rx\n", 666 "/proc/net/rtl8180/%s/stats-rx\n",
667 dev->name); 667 dev->name);
668 } 668 }
669 669
670 670
671 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO, 671 e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
672 priv->dir_dev, proc_get_stats_tx, dev); 672 priv->dir_dev, proc_get_stats_tx, dev);
673 673
674 if (!e) { 674 if (!e) {
675 DMESGE("Unable to initialize " 675 DMESGE("Unable to initialize "
676 "/proc/net/rtl8180/%s/stats-tx\n", 676 "/proc/net/rtl8180/%s/stats-tx\n",
677 dev->name); 677 dev->name);
678 } 678 }
679 #if 0 679 #if 0
680 e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO, 680 e = create_proc_read_entry("stats-ieee", S_IFREG | S_IRUGO,
681 priv->dir_dev, proc_get_stats_ieee, dev); 681 priv->dir_dev, proc_get_stats_ieee, dev);
682 682
683 if (!e) { 683 if (!e) {
684 DMESGE("Unable to initialize " 684 DMESGE("Unable to initialize "
685 "/proc/net/rtl8180/%s/stats-ieee\n", 685 "/proc/net/rtl8180/%s/stats-ieee\n",
686 dev->name); 686 dev->name);
687 } 687 }
688 #endif 688 #endif
689 #if 0 689 #if 0
690 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO, 690 e = create_proc_read_entry("stats-ap", S_IFREG | S_IRUGO,
691 priv->dir_dev, proc_get_stats_ap, dev); 691 priv->dir_dev, proc_get_stats_ap, dev);
692 692
693 if (!e) { 693 if (!e) {
694 DMESGE("Unable to initialize " 694 DMESGE("Unable to initialize "
695 "/proc/net/rtl8180/%s/stats-ap\n", 695 "/proc/net/rtl8180/%s/stats-ap\n",
696 dev->name); 696 dev->name);
697 } 697 }
698 #endif 698 #endif
699 699
700 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO, 700 e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
701 priv->dir_dev, proc_get_registers, dev); 701 priv->dir_dev, proc_get_registers, dev);
702 702
703 if (!e) { 703 if (!e) {
704 DMESGE("Unable to initialize " 704 DMESGE("Unable to initialize "
705 "/proc/net/rtl8180/%s/registers\n", 705 "/proc/net/rtl8180/%s/registers\n",
706 dev->name); 706 dev->name);
707 } 707 }
708 } 708 }
709 /**************************************************************************** 709 /****************************************************************************
710 -----------------------------MISC STUFF------------------------- 710 -----------------------------MISC STUFF-------------------------
711 *****************************************************************************/ 711 *****************************************************************************/
712 /* 712 /*
713 FIXME: check if we can use some standard already-existent 713 FIXME: check if we can use some standard already-existent
714 data type+functions in kernel 714 data type+functions in kernel
715 */ 715 */
716 716
717 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma, 717 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
718 struct buffer **bufferhead) 718 struct buffer **bufferhead)
719 { 719 {
720 #ifdef DEBUG_RING 720 #ifdef DEBUG_RING
721 DMESG("adding buffer to TX/RX struct"); 721 DMESG("adding buffer to TX/RX struct");
722 #endif 722 #endif
723 723
724 struct buffer *tmp; 724 struct buffer *tmp;
725 725
726 if(! *buffer){ 726 if(! *buffer){
727 727
728 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL); 728 *buffer = kmalloc(sizeof(struct buffer),GFP_KERNEL);
729 729
730 if (*buffer == NULL) { 730 if (*buffer == NULL) {
731 DMESGE("Failed to kmalloc head of TX/RX struct"); 731 DMESGE("Failed to kmalloc head of TX/RX struct");
732 return -1; 732 return -1;
733 } 733 }
734 (*buffer)->next=*buffer; 734 (*buffer)->next=*buffer;
735 (*buffer)->buf=buf; 735 (*buffer)->buf=buf;
736 (*buffer)->dma=dma; 736 (*buffer)->dma=dma;
737 if(bufferhead !=NULL) 737 if(bufferhead !=NULL)
738 (*bufferhead) = (*buffer); 738 (*bufferhead) = (*buffer);
739 return 0; 739 return 0;
740 } 740 }
741 tmp=*buffer; 741 tmp=*buffer;
742 742
743 while(tmp->next!=(*buffer)) tmp=tmp->next; 743 while(tmp->next!=(*buffer)) tmp=tmp->next;
744 if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){ 744 if ((tmp->next= kmalloc(sizeof(struct buffer),GFP_KERNEL)) == NULL){
745 DMESGE("Failed to kmalloc TX/RX struct"); 745 DMESGE("Failed to kmalloc TX/RX struct");
746 return -1; 746 return -1;
747 } 747 }
748 tmp->next->buf=buf; 748 tmp->next->buf=buf;
749 tmp->next->dma=dma; 749 tmp->next->dma=dma;
750 tmp->next->next=*buffer; 750 tmp->next->next=*buffer;
751 751
752 return 0; 752 return 0;
753 } 753 }
754 754
755 755
756 void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short 756 void buffer_free(struct net_device *dev,struct buffer **buffer,int len,short
757 consistent) 757 consistent)
758 { 758 {
759 759
760 struct buffer *tmp,*next; 760 struct buffer *tmp,*next;
761 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 761 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
762 struct pci_dev *pdev=priv->pdev; 762 struct pci_dev *pdev=priv->pdev;
763 //int i; 763 //int i;
764 764
765 if(! *buffer) return; 765 if(! *buffer) return;
766 766
767 /*for(tmp=*buffer; tmp->next != *buffer; tmp=tmp->next) 767 /*for(tmp=*buffer; tmp->next != *buffer; tmp=tmp->next)
768 768
769 */ 769 */
770 tmp=*buffer; 770 tmp=*buffer;
771 do{ 771 do{
772 next=tmp->next; 772 next=tmp->next;
773 if(consistent){ 773 if(consistent){
774 pci_free_consistent(pdev,len, 774 pci_free_consistent(pdev,len,
775 tmp->buf,tmp->dma); 775 tmp->buf,tmp->dma);
776 }else{ 776 }else{
777 pci_unmap_single(pdev, tmp->dma, 777 pci_unmap_single(pdev, tmp->dma,
778 len,PCI_DMA_FROMDEVICE); 778 len,PCI_DMA_FROMDEVICE);
779 kfree(tmp->buf); 779 kfree(tmp->buf);
780 } 780 }
781 kfree(tmp); 781 kfree(tmp);
782 tmp = next; 782 tmp = next;
783 } 783 }
784 while(next != *buffer); 784 while(next != *buffer);
785 785
786 *buffer=NULL; 786 *buffer=NULL;
787 } 787 }
788 788
789 789
790 void print_buffer(u32 *buffer, int len) 790 void print_buffer(u32 *buffer, int len)
791 { 791 {
792 int i; 792 int i;
793 u8 *buf =(u8*)buffer; 793 u8 *buf =(u8*)buffer;
794 794
795 printk("ASCII BUFFER DUMP (len: %x):\n",len); 795 printk("ASCII BUFFER DUMP (len: %x):\n",len);
796 796
797 for(i=0;i<len;i++) 797 for(i=0;i<len;i++)
798 printk("%c",buf[i]); 798 printk("%c",buf[i]);
799 799
800 printk("\nBINARY BUFFER DUMP (len: %x):\n",len); 800 printk("\nBINARY BUFFER DUMP (len: %x):\n",len);
801 801
802 for(i=0;i<len;i++) 802 for(i=0;i<len;i++)
803 printk("%02x",buf[i]); 803 printk("%02x",buf[i]);
804 804
805 printk("\n"); 805 printk("\n");
806 } 806 }
807 807
808 808
809 int get_curr_tx_free_desc(struct net_device *dev, int priority) 809 int get_curr_tx_free_desc(struct net_device *dev, int priority)
810 { 810 {
811 struct r8180_priv *priv = ieee80211_priv(dev); 811 struct r8180_priv *priv = ieee80211_priv(dev);
812 u32* tail; 812 u32* tail;
813 u32* head; 813 u32* head;
814 int ret; 814 int ret;
815 815
816 switch (priority){ 816 switch (priority){
817 case MANAGE_PRIORITY: 817 case MANAGE_PRIORITY:
818 head = priv->txmapringhead; 818 head = priv->txmapringhead;
819 tail = priv->txmapringtail; 819 tail = priv->txmapringtail;
820 break; 820 break;
821 case BK_PRIORITY: 821 case BK_PRIORITY:
822 head = priv->txbkpringhead; 822 head = priv->txbkpringhead;
823 tail = priv->txbkpringtail; 823 tail = priv->txbkpringtail;
824 break; 824 break;
825 case BE_PRIORITY: 825 case BE_PRIORITY:
826 head = priv->txbepringhead; 826 head = priv->txbepringhead;
827 tail = priv->txbepringtail; 827 tail = priv->txbepringtail;
828 break; 828 break;
829 case VI_PRIORITY: 829 case VI_PRIORITY:
830 head = priv->txvipringhead; 830 head = priv->txvipringhead;
831 tail = priv->txvipringtail; 831 tail = priv->txvipringtail;
832 break; 832 break;
833 case VO_PRIORITY: 833 case VO_PRIORITY:
834 head = priv->txvopringhead; 834 head = priv->txvopringhead;
835 tail = priv->txvopringtail; 835 tail = priv->txvopringtail;
836 break; 836 break;
837 case HI_PRIORITY: 837 case HI_PRIORITY:
838 head = priv->txhpringhead; 838 head = priv->txhpringhead;
839 tail = priv->txhpringtail; 839 tail = priv->txhpringtail;
840 break; 840 break;
841 default: 841 default:
842 return -1; 842 return -1;
843 } 843 }
844 844
845 //DMESG("%x %x", head, tail); 845 //DMESG("%x %x", head, tail);
846 846
847 /* FIXME FIXME FIXME FIXME */ 847 /* FIXME FIXME FIXME FIXME */
848 848
849 #if 0 849 #if 0
850 if( head <= tail ) return priv->txringcount-1 - (tail - head)/8; 850 if( head <= tail ) return priv->txringcount-1 - (tail - head)/8;
851 return (head - tail)/8/4; 851 return (head - tail)/8/4;
852 #else 852 #else
853 if( head <= tail ) 853 if( head <= tail )
854 ret = priv->txringcount - (tail - head)/8; 854 ret = priv->txringcount - (tail - head)/8;
855 else 855 else
856 ret = (head - tail)/8; 856 ret = (head - tail)/8;
857 857
858 if(ret > priv->txringcount ) DMESG("BUG"); 858 if(ret > priv->txringcount ) DMESG("BUG");
859 return ret; 859 return ret;
860 #endif 860 #endif
861 } 861 }
862 862
863 863
864 short check_nic_enought_desc(struct net_device *dev, int priority) 864 short check_nic_enought_desc(struct net_device *dev, int priority)
865 { 865 {
866 struct r8180_priv *priv = ieee80211_priv(dev); 866 struct r8180_priv *priv = ieee80211_priv(dev);
867 struct ieee80211_device *ieee = netdev_priv(dev); 867 struct ieee80211_device *ieee = netdev_priv(dev);
868 868
869 int requiredbyte, required; 869 int requiredbyte, required;
870 requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data); 870 requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
871 871
872 if(ieee->current_network.QoS_Enable) { 872 if(ieee->current_network.QoS_Enable) {
873 requiredbyte += 2; 873 requiredbyte += 2;
874 }; 874 };
875 875
876 required = requiredbyte / (priv->txbuffsize-4); 876 required = requiredbyte / (priv->txbuffsize-4);
877 if (requiredbyte % priv->txbuffsize) required++; 877 if (requiredbyte % priv->txbuffsize) required++;
878 /* for now we keep two free descriptor as a safety boundary 878 /* for now we keep two free descriptor as a safety boundary
879 * between the tail and the head 879 * between the tail and the head
880 */ 880 */
881 881
882 return (required+2 < get_curr_tx_free_desc(dev,priority)); 882 return (required+2 < get_curr_tx_free_desc(dev,priority));
883 } 883 }
884 884
885 885
886 /* This function is only for debuging purpose */ 886 /* This function is only for debuging purpose */
887 void check_tx_ring(struct net_device *dev, int pri) 887 void check_tx_ring(struct net_device *dev, int pri)
888 { 888 {
889 static int maxlog =3; 889 static int maxlog =3;
890 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 890 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
891 u32* tmp; 891 u32* tmp;
892 struct buffer *buf; 892 struct buffer *buf;
893 int i; 893 int i;
894 int nic; 894 int nic;
895 u32* tail; 895 u32* tail;
896 u32* head; 896 u32* head;
897 u32* begin; 897 u32* begin;
898 u32 nicbegin; 898 u32 nicbegin;
899 struct buffer* buffer; 899 struct buffer* buffer;
900 900
901 maxlog --; 901 maxlog --;
902 if (maxlog <0 ) return; 902 if (maxlog <0 ) return;
903 903
904 switch(pri) { 904 switch(pri) {
905 case MANAGE_PRIORITY: 905 case MANAGE_PRIORITY:
906 tail = priv->txmapringtail; 906 tail = priv->txmapringtail;
907 begin = priv->txmapring; 907 begin = priv->txmapring;
908 head = priv->txmapringhead; 908 head = priv->txmapringhead;
909 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR); 909 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
910 buffer = priv->txmapbufs; 910 buffer = priv->txmapbufs;
911 nicbegin = priv->txmapringdma; 911 nicbegin = priv->txmapringdma;
912 break; 912 break;
913 913
914 914
915 case BK_PRIORITY: 915 case BK_PRIORITY:
916 tail = priv->txbkpringtail; 916 tail = priv->txbkpringtail;
917 begin = priv->txbkpring; 917 begin = priv->txbkpring;
918 head = priv->txbkpringhead; 918 head = priv->txbkpringhead;
919 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR); 919 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
920 buffer = priv->txbkpbufs; 920 buffer = priv->txbkpbufs;
921 nicbegin = priv->txbkpringdma; 921 nicbegin = priv->txbkpringdma;
922 break; 922 break;
923 923
924 case BE_PRIORITY: 924 case BE_PRIORITY:
925 tail = priv->txbepringtail; 925 tail = priv->txbepringtail;
926 begin = priv->txbepring; 926 begin = priv->txbepring;
927 head = priv->txbepringhead; 927 head = priv->txbepringhead;
928 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR); 928 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
929 buffer = priv->txbepbufs; 929 buffer = priv->txbepbufs;
930 nicbegin = priv->txbepringdma; 930 nicbegin = priv->txbepringdma;
931 break; 931 break;
932 932
933 case VI_PRIORITY: 933 case VI_PRIORITY:
934 tail = priv->txvipringtail; 934 tail = priv->txvipringtail;
935 begin = priv->txvipring; 935 begin = priv->txvipring;
936 head = priv->txvipringhead; 936 head = priv->txvipringhead;
937 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR); 937 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
938 buffer = priv->txvipbufs; 938 buffer = priv->txvipbufs;
939 nicbegin = priv->txvipringdma; 939 nicbegin = priv->txvipringdma;
940 break; 940 break;
941 941
942 942
943 case VO_PRIORITY: 943 case VO_PRIORITY:
944 tail = priv->txvopringtail; 944 tail = priv->txvopringtail;
945 begin = priv->txvopring; 945 begin = priv->txvopring;
946 head = priv->txvopringhead; 946 head = priv->txvopringhead;
947 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR); 947 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
948 buffer = priv->txvopbufs; 948 buffer = priv->txvopbufs;
949 nicbegin = priv->txvopringdma; 949 nicbegin = priv->txvopringdma;
950 break; 950 break;
951 951
952 case HI_PRIORITY: 952 case HI_PRIORITY:
953 tail = priv->txhpringtail; 953 tail = priv->txhpringtail;
954 begin = priv->txhpring; 954 begin = priv->txhpring;
955 head = priv->txhpringhead; 955 head = priv->txhpringhead;
956 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR); 956 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
957 buffer = priv->txhpbufs; 957 buffer = priv->txhpbufs;
958 nicbegin = priv->txhpringdma; 958 nicbegin = priv->txhpringdma;
959 break; 959 break;
960 960
961 default: 961 default:
962 return ; 962 return ;
963 break; 963 break;
964 } 964 }
965 965
966 if(!priv->txvopbufs) 966 if(!priv->txvopbufs)
967 DMESGE ("NIC TX ack, but TX queue corrupted!"); 967 DMESGE ("NIC TX ack, but TX queue corrupted!");
968 else{ 968 else{
969 969
970 for(i=0,buf=buffer, tmp=begin; 970 for(i=0,buf=buffer, tmp=begin;
971 tmp<begin+(priv->txringcount)*8; 971 tmp<begin+(priv->txringcount)*8;
972 tmp+=8,buf=buf->next,i++) 972 tmp+=8,buf=buf->next,i++)
973 973
974 DMESG("BUF%d %s %x %s. Next : %x",i, 974 DMESG("BUF%d %s %x %s. Next : %x",i,
975 *tmp & (1<<31) ? "filled" : "empty", 975 *tmp & (1<<31) ? "filled" : "empty",
976 *(buf->buf), 976 *(buf->buf),
977 *tmp & (1<<15)? "ok": "err", *(tmp+4)); 977 *tmp & (1<<15)? "ok": "err", *(tmp+4));
978 } 978 }
979 979
980 DMESG("nic at %d", 980 DMESG("nic at %d",
981 (nic-nicbegin) / 8 /4); 981 (nic-nicbegin) / 8 /4);
982 DMESG("tail at %d", ((int)tail - (int)begin) /8 /4); 982 DMESG("tail at %d", ((int)tail - (int)begin) /8 /4);
983 DMESG("head at %d", ((int)head - (int)begin) /8 /4); 983 DMESG("head at %d", ((int)head - (int)begin) /8 /4);
984 DMESG("check free desc returns %d", check_nic_enought_desc(dev,pri)); 984 DMESG("check free desc returns %d", check_nic_enought_desc(dev,pri));
985 DMESG("free desc is %d\n", get_curr_tx_free_desc(dev,pri)); 985 DMESG("free desc is %d\n", get_curr_tx_free_desc(dev,pri));
986 //rtl8180_reset(dev); 986 //rtl8180_reset(dev);
987 return; 987 return;
988 } 988 }
989 989
990 990
991 991
992 /* this function is only for debugging purpose */ 992 /* this function is only for debugging purpose */
993 void check_rxbuf(struct net_device *dev) 993 void check_rxbuf(struct net_device *dev)
994 { 994 {
995 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 995 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
996 u32* tmp; 996 u32* tmp;
997 struct buffer *buf; 997 struct buffer *buf;
998 u8 rx_desc_size; 998 u8 rx_desc_size;
999 999
1000 #ifdef CONFIG_RTL8185B 1000 #ifdef CONFIG_RTL8185B
1001 rx_desc_size = 8; 1001 rx_desc_size = 8;
1002 #else 1002 #else
1003 rx_desc_size = 4; 1003 rx_desc_size = 4;
1004 #endif 1004 #endif
1005 1005
1006 if(!priv->rxbuffer) 1006 if(!priv->rxbuffer)
1007 DMESGE ("NIC RX ack, but RX queue corrupted!"); 1007 DMESGE ("NIC RX ack, but RX queue corrupted!");
1008 1008
1009 else{ 1009 else{
1010 1010
1011 for(buf=priv->rxbuffer, tmp=priv->rxring; 1011 for(buf=priv->rxbuffer, tmp=priv->rxring;
1012 tmp < priv->rxring+(priv->rxringcount)*rx_desc_size; 1012 tmp < priv->rxring+(priv->rxringcount)*rx_desc_size;
1013 tmp+=rx_desc_size, buf=buf->next) 1013 tmp+=rx_desc_size, buf=buf->next)
1014 1014
1015 DMESG("BUF %s %x", 1015 DMESG("BUF %s %x",
1016 *tmp & (1<<31) ? "empty" : "filled", 1016 *tmp & (1<<31) ? "empty" : "filled",
1017 *(buf->buf)); 1017 *(buf->buf));
1018 } 1018 }
1019 1019
1020 return; 1020 return;
1021 } 1021 }
1022 1022
1023 1023
1024 void dump_eprom(struct net_device *dev) 1024 void dump_eprom(struct net_device *dev)
1025 { 1025 {
1026 int i; 1026 int i;
1027 for(i=0; i<63; i++) 1027 for(i=0; i<63; i++)
1028 DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i)); 1028 DMESG("EEPROM addr %x : %x", i, eprom_read(dev,i));
1029 } 1029 }
1030 1030
1031 1031
1032 void rtl8180_dump_reg(struct net_device *dev) 1032 void rtl8180_dump_reg(struct net_device *dev)
1033 { 1033 {
1034 int i; 1034 int i;
1035 int n; 1035 int n;
1036 int max=0xff; 1036 int max=0xff;
1037 1037
1038 DMESG("Dumping NIC register map"); 1038 DMESG("Dumping NIC register map");
1039 1039
1040 for(n=0;n<=max;) 1040 for(n=0;n<=max;)
1041 { 1041 {
1042 printk( "\nD: %2x> ", n); 1042 printk( "\nD: %2x> ", n);
1043 for(i=0;i<16 && n<=max;i++,n++) 1043 for(i=0;i<16 && n<=max;i++,n++)
1044 printk("%2x ",read_nic_byte(dev,n)); 1044 printk("%2x ",read_nic_byte(dev,n));
1045 } 1045 }
1046 printk("\n"); 1046 printk("\n");
1047 } 1047 }
1048 1048
1049 1049
1050 void fix_tx_fifo(struct net_device *dev) 1050 void fix_tx_fifo(struct net_device *dev)
1051 { 1051 {
1052 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1052 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1053 u32 *tmp; 1053 u32 *tmp;
1054 int i; 1054 int i;
1055 #ifdef DEBUG_TX_ALLOC 1055 #ifdef DEBUG_TX_ALLOC
1056 DMESG("FIXING TX FIFOs"); 1056 DMESG("FIXING TX FIFOs");
1057 #endif 1057 #endif
1058 for (tmp=priv->txmapring, i=0; 1058 for (tmp=priv->txmapring, i=0;
1059 i < priv->txringcount; 1059 i < priv->txringcount;
1060 tmp+=8, i++){ 1060 tmp+=8, i++){
1061 *tmp = *tmp &~ (1<<31); 1061 *tmp = *tmp &~ (1<<31);
1062 } 1062 }
1063 1063
1064 for (tmp=priv->txbkpring, i=0; 1064 for (tmp=priv->txbkpring, i=0;
1065 i < priv->txringcount; 1065 i < priv->txringcount;
1066 tmp+=8, i++) { 1066 tmp+=8, i++) {
1067 *tmp = *tmp &~ (1<<31); 1067 *tmp = *tmp &~ (1<<31);
1068 } 1068 }
1069 1069
1070 for (tmp=priv->txbepring, i=0; 1070 for (tmp=priv->txbepring, i=0;
1071 i < priv->txringcount; 1071 i < priv->txringcount;
1072 tmp+=8, i++){ 1072 tmp+=8, i++){
1073 *tmp = *tmp &~ (1<<31); 1073 *tmp = *tmp &~ (1<<31);
1074 } 1074 }
1075 for (tmp=priv->txvipring, i=0; 1075 for (tmp=priv->txvipring, i=0;
1076 i < priv->txringcount; 1076 i < priv->txringcount;
1077 tmp+=8, i++) { 1077 tmp+=8, i++) {
1078 *tmp = *tmp &~ (1<<31); 1078 *tmp = *tmp &~ (1<<31);
1079 } 1079 }
1080 1080
1081 for (tmp=priv->txvopring, i=0; 1081 for (tmp=priv->txvopring, i=0;
1082 i < priv->txringcount; 1082 i < priv->txringcount;
1083 tmp+=8, i++){ 1083 tmp+=8, i++){
1084 *tmp = *tmp &~ (1<<31); 1084 *tmp = *tmp &~ (1<<31);
1085 } 1085 }
1086 1086
1087 for (tmp=priv->txhpring, i=0; 1087 for (tmp=priv->txhpring, i=0;
1088 i < priv->txringcount; 1088 i < priv->txringcount;
1089 tmp+=8,i++){ 1089 tmp+=8,i++){
1090 *tmp = *tmp &~ (1<<31); 1090 *tmp = *tmp &~ (1<<31);
1091 } 1091 }
1092 1092
1093 for (tmp=priv->txbeaconring, i=0; 1093 for (tmp=priv->txbeaconring, i=0;
1094 i < priv->txbeaconcount; 1094 i < priv->txbeaconcount;
1095 tmp+=8, i++){ 1095 tmp+=8, i++){
1096 *tmp = *tmp &~ (1<<31); 1096 *tmp = *tmp &~ (1<<31);
1097 } 1097 }
1098 #ifdef DEBUG_TX_ALLOC 1098 #ifdef DEBUG_TX_ALLOC
1099 DMESG("TX FIFOs FIXED"); 1099 DMESG("TX FIFOs FIXED");
1100 #endif 1100 #endif
1101 priv->txmapringtail = priv->txmapring; 1101 priv->txmapringtail = priv->txmapring;
1102 priv->txmapringhead = priv->txmapring; 1102 priv->txmapringhead = priv->txmapring;
1103 priv->txmapbufstail = priv->txmapbufs; 1103 priv->txmapbufstail = priv->txmapbufs;
1104 1104
1105 priv->txbkpringtail = priv->txbkpring; 1105 priv->txbkpringtail = priv->txbkpring;
1106 priv->txbkpringhead = priv->txbkpring; 1106 priv->txbkpringhead = priv->txbkpring;
1107 priv->txbkpbufstail = priv->txbkpbufs; 1107 priv->txbkpbufstail = priv->txbkpbufs;
1108 1108
1109 priv->txbepringtail = priv->txbepring; 1109 priv->txbepringtail = priv->txbepring;
1110 priv->txbepringhead = priv->txbepring; 1110 priv->txbepringhead = priv->txbepring;
1111 priv->txbepbufstail = priv->txbepbufs; 1111 priv->txbepbufstail = priv->txbepbufs;
1112 1112
1113 priv->txvipringtail = priv->txvipring; 1113 priv->txvipringtail = priv->txvipring;
1114 priv->txvipringhead = priv->txvipring; 1114 priv->txvipringhead = priv->txvipring;
1115 priv->txvipbufstail = priv->txvipbufs; 1115 priv->txvipbufstail = priv->txvipbufs;
1116 1116
1117 priv->txvopringtail = priv->txvopring; 1117 priv->txvopringtail = priv->txvopring;
1118 priv->txvopringhead = priv->txvopring; 1118 priv->txvopringhead = priv->txvopring;
1119 priv->txvopbufstail = priv->txvopbufs; 1119 priv->txvopbufstail = priv->txvopbufs;
1120 1120
1121 priv->txhpringtail = priv->txhpring; 1121 priv->txhpringtail = priv->txhpring;
1122 priv->txhpringhead = priv->txhpring; 1122 priv->txhpringhead = priv->txhpring;
1123 priv->txhpbufstail = priv->txhpbufs; 1123 priv->txhpbufstail = priv->txhpbufs;
1124 1124
1125 priv->txbeaconringtail = priv->txbeaconring; 1125 priv->txbeaconringtail = priv->txbeaconring;
1126 priv->txbeaconbufstail = priv->txbeaconbufs; 1126 priv->txbeaconbufstail = priv->txbeaconbufs;
1127 set_nic_txring(dev); 1127 set_nic_txring(dev);
1128 1128
1129 ieee80211_reset_queue(priv->ieee80211); 1129 ieee80211_reset_queue(priv->ieee80211);
1130 priv->ack_tx_to_ieee = 0; 1130 priv->ack_tx_to_ieee = 0;
1131 } 1131 }
1132 1132
1133 1133
1134 void fix_rx_fifo(struct net_device *dev) 1134 void fix_rx_fifo(struct net_device *dev)
1135 { 1135 {
1136 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1136 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1137 u32 *tmp; 1137 u32 *tmp;
1138 struct buffer *rxbuf; 1138 struct buffer *rxbuf;
1139 u8 rx_desc_size; 1139 u8 rx_desc_size;
1140 1140
1141 #ifdef CONFIG_RTL8185B 1141 #ifdef CONFIG_RTL8185B
1142 rx_desc_size = 8; // 4*8 = 32 bytes 1142 rx_desc_size = 8; // 4*8 = 32 bytes
1143 #else 1143 #else
1144 rx_desc_size = 4; 1144 rx_desc_size = 4;
1145 #endif 1145 #endif
1146 1146
1147 #ifdef DEBUG_RXALLOC 1147 #ifdef DEBUG_RXALLOC
1148 DMESG("FIXING RX FIFO"); 1148 DMESG("FIXING RX FIFO");
1149 check_rxbuf(dev); 1149 check_rxbuf(dev);
1150 #endif 1150 #endif
1151 1151
1152 for (tmp=priv->rxring, rxbuf=priv->rxbufferhead; 1152 for (tmp=priv->rxring, rxbuf=priv->rxbufferhead;
1153 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size); 1153 (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
1154 tmp+=rx_desc_size,rxbuf=rxbuf->next){ 1154 tmp+=rx_desc_size,rxbuf=rxbuf->next){
1155 *(tmp+2) = rxbuf->dma; 1155 *(tmp+2) = rxbuf->dma;
1156 *tmp=*tmp &~ 0xfff; 1156 *tmp=*tmp &~ 0xfff;
1157 *tmp=*tmp | priv->rxbuffersize; 1157 *tmp=*tmp | priv->rxbuffersize;
1158 *tmp |= (1<<31); 1158 *tmp |= (1<<31);
1159 } 1159 }
1160 1160
1161 #ifdef DEBUG_RXALLOC 1161 #ifdef DEBUG_RXALLOC
1162 DMESG("RX FIFO FIXED"); 1162 DMESG("RX FIFO FIXED");
1163 check_rxbuf(dev); 1163 check_rxbuf(dev);
1164 #endif 1164 #endif
1165 1165
1166 priv->rxringtail=priv->rxring; 1166 priv->rxringtail=priv->rxring;
1167 priv->rxbuffer=priv->rxbufferhead; 1167 priv->rxbuffer=priv->rxbufferhead;
1168 priv->rx_skb_complete=1; 1168 priv->rx_skb_complete=1;
1169 set_nic_rxring(dev); 1169 set_nic_rxring(dev);
1170 } 1170 }
1171 1171
1172 1172
1173 /**************************************************************************** 1173 /****************************************************************************
1174 ------------------------------HW STUFF--------------------------- 1174 ------------------------------HW STUFF---------------------------
1175 *****************************************************************************/ 1175 *****************************************************************************/
1176 1176
1177 unsigned char QUALITY_MAP[] = { 1177 unsigned char QUALITY_MAP[] = {
1178 0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61, 1178 0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
1179 0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c, 1179 0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
1180 0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f, 1180 0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
1181 0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29, 1181 0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
1182 0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 1182 0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
1183 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20, 1183 0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
1184 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e, 1184 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
1185 0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19, 1185 0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
1186 0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f, 1186 0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
1187 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00 1187 0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
1188 }; 1188 };
1189 1189
1190 unsigned char STRENGTH_MAP[] = { 1190 unsigned char STRENGTH_MAP[] = {
1191 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e, 1191 0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
1192 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50, 1192 0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
1193 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f, 1193 0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
1194 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b, 1194 0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
1195 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17, 1195 0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
1196 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13, 1196 0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
1197 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f, 1197 0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
1198 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b, 1198 0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
1199 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07, 1199 0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
1200 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00 1200 0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
1201 }; 1201 };
1202 1202
1203 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual){ 1203 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual){
1204 //void Mlme_UpdateRssiSQ(struct net_device *dev, u8 *rssi, u8 *qual){ 1204 //void Mlme_UpdateRssiSQ(struct net_device *dev, u8 *rssi, u8 *qual){
1205 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1205 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1206 u32 temp; 1206 u32 temp;
1207 u32 temp2; 1207 u32 temp2;
1208 u32 temp3; 1208 u32 temp3;
1209 u32 lsb; 1209 u32 lsb;
1210 u32 q; 1210 u32 q;
1211 u32 orig_qual; 1211 u32 orig_qual;
1212 u8 _rssi; 1212 u8 _rssi;
1213 1213
1214 q = *qual; 1214 q = *qual;
1215 orig_qual = *qual; 1215 orig_qual = *qual;
1216 _rssi = 0; // avoid gcc complains.. 1216 _rssi = 0; // avoid gcc complains..
1217 1217
1218 if (q <= 0x4e) { 1218 if (q <= 0x4e) {
1219 temp = QUALITY_MAP[q]; 1219 temp = QUALITY_MAP[q];
1220 } else { 1220 } else {
1221 if( q & 0x80 ) { 1221 if( q & 0x80 ) {
1222 temp = 0x32; 1222 temp = 0x32;
1223 } else { 1223 } else {
1224 temp = 1; 1224 temp = 1;
1225 } 1225 }
1226 } 1226 }
1227 1227
1228 *qual = temp; 1228 *qual = temp;
1229 temp2 = *rssi; 1229 temp2 = *rssi;
1230 1230
1231 switch(priv->rf_chip){ 1231 switch(priv->rf_chip){
1232 case RFCHIPID_RFMD: 1232 case RFCHIPID_RFMD:
1233 lsb = temp2 & 1; 1233 lsb = temp2 & 1;
1234 temp2 &= 0x7e; 1234 temp2 &= 0x7e;
1235 if ( !lsb || !(temp2 <= 0x3c) ) { 1235 if ( !lsb || !(temp2 <= 0x3c) ) {
1236 temp2 = 0x64; 1236 temp2 = 0x64;
1237 } else { 1237 } else {
1238 temp2 = 100 * temp2 / 0x3c; 1238 temp2 = 100 * temp2 / 0x3c;
1239 } 1239 }
1240 *rssi = temp2 & 0xff; 1240 *rssi = temp2 & 0xff;
1241 _rssi = temp2 & 0xff; 1241 _rssi = temp2 & 0xff;
1242 break; 1242 break;
1243 case RFCHIPID_INTERSIL: 1243 case RFCHIPID_INTERSIL:
1244 lsb = temp2; 1244 lsb = temp2;
1245 temp2 &= 0xfffffffe; 1245 temp2 &= 0xfffffffe;
1246 temp2 *= 251; 1246 temp2 *= 251;
1247 temp3 = temp2; 1247 temp3 = temp2;
1248 temp2 <<= 6; 1248 temp2 <<= 6;
1249 temp3 += temp2; 1249 temp3 += temp2;
1250 temp3 <<= 1; 1250 temp3 <<= 1;
1251 temp2 = 0x4950df; 1251 temp2 = 0x4950df;
1252 temp2 -= temp3; 1252 temp2 -= temp3;
1253 lsb &= 1; 1253 lsb &= 1;
1254 if ( temp2 <= 0x3e0000 ) { 1254 if ( temp2 <= 0x3e0000 ) {
1255 if ( temp2 < 0xffef0000 ) 1255 if ( temp2 < 0xffef0000 )
1256 temp2 = 0xffef0000; 1256 temp2 = 0xffef0000;
1257 } else { 1257 } else {
1258 temp2 = 0x3e0000; 1258 temp2 = 0x3e0000;
1259 } 1259 }
1260 if ( !lsb ) { 1260 if ( !lsb ) {
1261 temp2 -= 0xf0000; 1261 temp2 -= 0xf0000;
1262 } else { 1262 } else {
1263 temp2 += 0xf0000; 1263 temp2 += 0xf0000;
1264 } 1264 }
1265 1265
1266 temp3 = 0x4d0000; 1266 temp3 = 0x4d0000;
1267 temp3 -= temp2; 1267 temp3 -= temp2;
1268 temp3 *= 100; 1268 temp3 *= 100;
1269 temp3 = temp3 / 0x6d; 1269 temp3 = temp3 / 0x6d;
1270 temp3 >>= 0x10; 1270 temp3 >>= 0x10;
1271 _rssi = temp3 & 0xff; 1271 _rssi = temp3 & 0xff;
1272 *rssi = temp3 & 0xff; 1272 *rssi = temp3 & 0xff;
1273 break; 1273 break;
1274 case RFCHIPID_GCT: 1274 case RFCHIPID_GCT:
1275 lsb = temp2 & 1; 1275 lsb = temp2 & 1;
1276 temp2 &= 0x7e; 1276 temp2 &= 0x7e;
1277 if ( ! lsb || !(temp2 <= 0x3c) ){ 1277 if ( ! lsb || !(temp2 <= 0x3c) ){
1278 temp2 = 0x64; 1278 temp2 = 0x64;
1279 } else { 1279 } else {
1280 temp2 = (100 * temp2) / 0x3c; 1280 temp2 = (100 * temp2) / 0x3c;
1281 } 1281 }
1282 *rssi = temp2 & 0xff; 1282 *rssi = temp2 & 0xff;
1283 _rssi = temp2 & 0xff; 1283 _rssi = temp2 & 0xff;
1284 break; 1284 break;
1285 case RFCHIPID_PHILIPS: 1285 case RFCHIPID_PHILIPS:
1286 if( orig_qual <= 0x4e ){ 1286 if( orig_qual <= 0x4e ){
1287 _rssi = STRENGTH_MAP[orig_qual]; 1287 _rssi = STRENGTH_MAP[orig_qual];
1288 *rssi = _rssi; 1288 *rssi = _rssi;
1289 } else { 1289 } else {
1290 orig_qual -= 0x80; 1290 orig_qual -= 0x80;
1291 if ( !orig_qual ){ 1291 if ( !orig_qual ){
1292 _rssi = 1; 1292 _rssi = 1;
1293 *rssi = 1; 1293 *rssi = 1;
1294 } else { 1294 } else {
1295 _rssi = 0x32; 1295 _rssi = 0x32;
1296 *rssi = 0x32; 1296 *rssi = 0x32;
1297 } 1297 }
1298 } 1298 }
1299 break; 1299 break;
1300 1300
1301 /* case 4 */ 1301 /* case 4 */
1302 case RFCHIPID_MAXIM: 1302 case RFCHIPID_MAXIM:
1303 lsb = temp2 & 1; 1303 lsb = temp2 & 1;
1304 temp2 &= 0x7e; 1304 temp2 &= 0x7e;
1305 temp2 >>= 1; 1305 temp2 >>= 1;
1306 temp2 += 0x42; 1306 temp2 += 0x42;
1307 if( lsb != 0 ){ 1307 if( lsb != 0 ){
1308 temp2 += 0xa; 1308 temp2 += 0xa;
1309 } 1309 }
1310 *rssi = temp2 & 0xff; 1310 *rssi = temp2 & 0xff;
1311 _rssi = temp2 & 0xff; 1311 _rssi = temp2 & 0xff;
1312 break; 1312 break;
1313 } 1313 }
1314 1314
1315 if ( _rssi < 0x64 ){ 1315 if ( _rssi < 0x64 ){
1316 if ( _rssi == 0 ) { 1316 if ( _rssi == 0 ) {
1317 *rssi = 1; 1317 *rssi = 1;
1318 } 1318 }
1319 } else { 1319 } else {
1320 *rssi = 0x64; 1320 *rssi = 0x64;
1321 } 1321 }
1322 1322
1323 return; 1323 return;
1324 } 1324 }
1325 1325
1326 1326
1327 void rtl8180_irq_enable(struct net_device *dev) 1327 void rtl8180_irq_enable(struct net_device *dev)
1328 { 1328 {
1329 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1329 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1330 priv->irq_enabled = 1; 1330 priv->irq_enabled = 1;
1331 /* 1331 /*
1332 write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\ 1332 write_nic_word(dev,INTA_MASK,INTA_RXOK | INTA_RXDESCERR | INTA_RXOVERFLOW |\
1333 INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\ 1333 INTA_TXOVERFLOW | INTA_HIPRIORITYDESCERR | INTA_HIPRIORITYDESCOK |\
1334 INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\ 1334 INTA_NORMPRIORITYDESCERR | INTA_NORMPRIORITYDESCOK |\
1335 INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT); 1335 INTA_LOWPRIORITYDESCERR | INTA_LOWPRIORITYDESCOK | INTA_TIMEOUT);
1336 */ 1336 */
1337 write_nic_word(dev,INTA_MASK, priv->irq_mask); 1337 write_nic_word(dev,INTA_MASK, priv->irq_mask);
1338 } 1338 }
1339 1339
1340 1340
1341 void rtl8180_irq_disable(struct net_device *dev) 1341 void rtl8180_irq_disable(struct net_device *dev)
1342 { 1342 {
1343 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1343 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1344 1344
1345 #ifdef CONFIG_RTL8185B 1345 #ifdef CONFIG_RTL8185B
1346 write_nic_dword(dev,IMR,0); 1346 write_nic_dword(dev,IMR,0);
1347 #else 1347 #else
1348 write_nic_word(dev,INTA_MASK,0); 1348 write_nic_word(dev,INTA_MASK,0);
1349 #endif 1349 #endif
1350 force_pci_posting(dev); 1350 force_pci_posting(dev);
1351 priv->irq_enabled = 0; 1351 priv->irq_enabled = 0;
1352 } 1352 }
1353 1353
1354 1354
1355 void rtl8180_set_mode(struct net_device *dev,int mode) 1355 void rtl8180_set_mode(struct net_device *dev,int mode)
1356 { 1356 {
1357 u8 ecmd; 1357 u8 ecmd;
1358 ecmd=read_nic_byte(dev, EPROM_CMD); 1358 ecmd=read_nic_byte(dev, EPROM_CMD);
1359 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK; 1359 ecmd=ecmd &~ EPROM_CMD_OPERATING_MODE_MASK;
1360 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT); 1360 ecmd=ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
1361 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT); 1361 ecmd=ecmd &~ (1<<EPROM_CS_SHIFT);
1362 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT); 1362 ecmd=ecmd &~ (1<<EPROM_CK_SHIFT);
1363 write_nic_byte(dev, EPROM_CMD, ecmd); 1363 write_nic_byte(dev, EPROM_CMD, ecmd);
1364 } 1364 }
1365 1365
1366 void rtl8180_adapter_start(struct net_device *dev); 1366 void rtl8180_adapter_start(struct net_device *dev);
1367 void rtl8180_beacon_tx_enable(struct net_device *dev); 1367 void rtl8180_beacon_tx_enable(struct net_device *dev);
1368 1368
1369 void rtl8180_update_msr(struct net_device *dev) 1369 void rtl8180_update_msr(struct net_device *dev)
1370 { 1370 {
1371 struct r8180_priv *priv = ieee80211_priv(dev); 1371 struct r8180_priv *priv = ieee80211_priv(dev);
1372 u8 msr; 1372 u8 msr;
1373 u32 rxconf; 1373 u32 rxconf;
1374 1374
1375 msr = read_nic_byte(dev, MSR); 1375 msr = read_nic_byte(dev, MSR);
1376 msr &= ~ MSR_LINK_MASK; 1376 msr &= ~ MSR_LINK_MASK;
1377 1377
1378 rxconf=read_nic_dword(dev,RX_CONF); 1378 rxconf=read_nic_dword(dev,RX_CONF);
1379 1379
1380 if(priv->ieee80211->state == IEEE80211_LINKED) 1380 if(priv->ieee80211->state == IEEE80211_LINKED)
1381 { 1381 {
1382 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) 1382 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
1383 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT); 1383 msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
1384 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER) 1384 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
1385 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT); 1385 msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
1386 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA) 1386 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
1387 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT); 1387 msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
1388 else 1388 else
1389 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT); 1389 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1390 rxconf |= (1<<RX_CHECK_BSSID_SHIFT); 1390 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
1391 1391
1392 }else { 1392 }else {
1393 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT); 1393 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
1394 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT); 1394 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
1395 } 1395 }
1396 1396
1397 write_nic_byte(dev, MSR, msr); 1397 write_nic_byte(dev, MSR, msr);
1398 write_nic_dword(dev, RX_CONF, rxconf); 1398 write_nic_dword(dev, RX_CONF, rxconf);
1399 1399
1400 } 1400 }
1401 1401
1402 1402
1403 1403
1404 void rtl8180_set_chan(struct net_device *dev,short ch) 1404 void rtl8180_set_chan(struct net_device *dev,short ch)
1405 { 1405 {
1406 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1406 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1407 1407
1408 if((ch > 14) || (ch < 1)) 1408 if((ch > 14) || (ch < 1))
1409 { 1409 {
1410 printk("In %s: Invalid chnanel %d\n", __func__, ch); 1410 printk("In %s: Invalid chnanel %d\n", __func__, ch);
1411 return; 1411 return;
1412 } 1412 }
1413 1413
1414 priv->chan=ch; 1414 priv->chan=ch;
1415 //printk("in %s:channel is %d\n",__func__,ch); 1415 //printk("in %s:channel is %d\n",__func__,ch);
1416 priv->rf_set_chan(dev,priv->chan); 1416 priv->rf_set_chan(dev,priv->chan);
1417 1417
1418 } 1418 }
1419 1419
1420 1420
1421 void rtl8180_rx_enable(struct net_device *dev) 1421 void rtl8180_rx_enable(struct net_device *dev)
1422 { 1422 {
1423 u8 cmd; 1423 u8 cmd;
1424 u32 rxconf; 1424 u32 rxconf;
1425 /* for now we accept data, management & ctl frame*/ 1425 /* for now we accept data, management & ctl frame*/
1426 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1426 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1427 1427
1428 rxconf=read_nic_dword(dev,RX_CONF); 1428 rxconf=read_nic_dword(dev,RX_CONF);
1429 rxconf = rxconf &~ MAC_FILTER_MASK; 1429 rxconf = rxconf &~ MAC_FILTER_MASK;
1430 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT); 1430 rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
1431 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT); 1431 rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
1432 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT); 1432 rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
1433 rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT); 1433 rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
1434 // rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT); 1434 // rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1435 if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode"); 1435 if (dev->flags & IFF_PROMISC) DMESG ("NIC in promisc mode");
1436 1436
1437 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \ 1437 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
1438 dev->flags & IFF_PROMISC){ 1438 dev->flags & IFF_PROMISC){
1439 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT); 1439 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1440 }else{ 1440 }else{
1441 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT); 1441 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
1442 if(priv->card_8185 == 0) 1442 if(priv->card_8185 == 0)
1443 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT); 1443 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1444 } 1444 }
1445 1445
1446 /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){ 1446 /*if(priv->ieee80211->iw_mode == IW_MODE_MASTER){
1447 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT); 1447 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
1448 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT); 1448 rxconf = rxconf | (1<<RX_CHECK_BSSID_SHIFT);
1449 }*/ 1449 }*/
1450 1450
1451 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){ 1451 if(priv->ieee80211->iw_mode == IW_MODE_MONITOR){
1452 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT); 1452 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
1453 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT); 1453 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
1454 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT); 1454 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
1455 } 1455 }
1456 1456
1457 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR) 1457 if( priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
1458 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT); 1458 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
1459 1459
1460 //if(!priv->card_8185){ 1460 //if(!priv->card_8185){
1461 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK; 1461 rxconf = rxconf &~ RX_FIFO_THRESHOLD_MASK;
1462 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT); 1462 rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE<<RX_FIFO_THRESHOLD_SHIFT);
1463 //} 1463 //}
1464 1464
1465 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT); 1465 rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
1466 rxconf = rxconf &~ MAX_RX_DMA_MASK; 1466 rxconf = rxconf &~ MAX_RX_DMA_MASK;
1467 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT); 1467 rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
1468 1468
1469 //if(!priv->card_8185) 1469 //if(!priv->card_8185)
1470 rxconf = rxconf | RCR_ONLYERLPKT; 1470 rxconf = rxconf | RCR_ONLYERLPKT;
1471 1471
1472 rxconf = rxconf &~ RCR_CS_MASK; 1472 rxconf = rxconf &~ RCR_CS_MASK;
1473 if(!priv->card_8185) 1473 if(!priv->card_8185)
1474 rxconf |= (priv->rcr_csense<<RCR_CS_SHIFT); 1474 rxconf |= (priv->rcr_csense<<RCR_CS_SHIFT);
1475 // rxconf &=~ 0xfff00000; 1475 // rxconf &=~ 0xfff00000;
1476 // rxconf |= 0x90100000;//9014f76f; 1476 // rxconf |= 0x90100000;//9014f76f;
1477 write_nic_dword(dev, RX_CONF, rxconf); 1477 write_nic_dword(dev, RX_CONF, rxconf);
1478 1478
1479 fix_rx_fifo(dev); 1479 fix_rx_fifo(dev);
1480 1480
1481 #ifdef DEBUG_RX 1481 #ifdef DEBUG_RX
1482 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF)); 1482 DMESG("rxconf: %x %x",rxconf ,read_nic_dword(dev,RX_CONF));
1483 #endif 1483 #endif
1484 cmd=read_nic_byte(dev,CMD); 1484 cmd=read_nic_byte(dev,CMD);
1485 write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT)); 1485 write_nic_byte(dev,CMD,cmd | (1<<CMD_RX_ENABLE_SHIFT));
1486 1486
1487 /* In rtl8139 driver seems that DMA threshold has to be written 1487 /* In rtl8139 driver seems that DMA threshold has to be written
1488 * after enabling RX, so we rewrite RX_CONFIG register 1488 * after enabling RX, so we rewrite RX_CONFIG register
1489 */ 1489 */
1490 //mdelay(100); 1490 //mdelay(100);
1491 // write_nic_dword(dev, RX_CONF, rxconf); 1491 // write_nic_dword(dev, RX_CONF, rxconf);
1492 1492
1493 } 1493 }
1494 1494
1495 1495
1496 void set_nic_txring(struct net_device *dev) 1496 void set_nic_txring(struct net_device *dev)
1497 { 1497 {
1498 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1498 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1499 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA)); 1499 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1500 1500
1501 write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma); 1501 write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
1502 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA)); 1502 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1503 write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma); 1503 write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
1504 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA)); 1504 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1505 write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma); 1505 write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
1506 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA)); 1506 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1507 write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma); 1507 write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
1508 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA)); 1508 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1509 write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma); 1509 write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
1510 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA)); 1510 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1511 write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma); 1511 write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
1512 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA)); 1512 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
1513 1513
1514 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma); 1514 write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
1515 } 1515 }
1516 1516
1517 1517
1518 void rtl8180_conttx_enable(struct net_device *dev) 1518 void rtl8180_conttx_enable(struct net_device *dev)
1519 { 1519 {
1520 u32 txconf; 1520 u32 txconf;
1521 txconf = read_nic_dword(dev,TX_CONF); 1521 txconf = read_nic_dword(dev,TX_CONF);
1522 txconf = txconf &~ TX_LOOPBACK_MASK; 1522 txconf = txconf &~ TX_LOOPBACK_MASK;
1523 txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT); 1523 txconf = txconf | (TX_LOOPBACK_CONTINUE <<TX_LOOPBACK_SHIFT);
1524 write_nic_dword(dev,TX_CONF,txconf); 1524 write_nic_dword(dev,TX_CONF,txconf);
1525 } 1525 }
1526 1526
1527 1527
1528 void rtl8180_conttx_disable(struct net_device *dev) 1528 void rtl8180_conttx_disable(struct net_device *dev)
1529 { 1529 {
1530 u32 txconf; 1530 u32 txconf;
1531 txconf = read_nic_dword(dev,TX_CONF); 1531 txconf = read_nic_dword(dev,TX_CONF);
1532 txconf = txconf &~ TX_LOOPBACK_MASK; 1532 txconf = txconf &~ TX_LOOPBACK_MASK;
1533 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT); 1533 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1534 write_nic_dword(dev,TX_CONF,txconf); 1534 write_nic_dword(dev,TX_CONF,txconf);
1535 } 1535 }
1536 1536
1537 1537
1538 void rtl8180_tx_enable(struct net_device *dev) 1538 void rtl8180_tx_enable(struct net_device *dev)
1539 { 1539 {
1540 u8 cmd; 1540 u8 cmd;
1541 u8 tx_agc_ctl; 1541 u8 tx_agc_ctl;
1542 u8 byte; 1542 u8 byte;
1543 u32 txconf; 1543 u32 txconf;
1544 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1544 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1545 txconf= read_nic_dword(dev,TX_CONF); 1545 txconf= read_nic_dword(dev,TX_CONF);
1546 1546
1547 1547
1548 if(priv->card_8185){ 1548 if(priv->card_8185){
1549 1549
1550 1550
1551 byte = read_nic_byte(dev,CW_CONF); 1551 byte = read_nic_byte(dev,CW_CONF);
1552 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT); 1552 byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
1553 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT); 1553 byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
1554 write_nic_byte(dev, CW_CONF, byte); 1554 write_nic_byte(dev, CW_CONF, byte);
1555 1555
1556 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL); 1556 tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
1557 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT); 1557 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
1558 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT); 1558 tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
1559 tx_agc_ctl |=(1<<TX_AGC_CTL_FEEDBACK_ANT); 1559 tx_agc_ctl |=(1<<TX_AGC_CTL_FEEDBACK_ANT);
1560 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl); 1560 write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
1561 /* 1561 /*
1562 write_nic_word(dev, 0x5e, 0x01); 1562 write_nic_word(dev, 0x5e, 0x01);
1563 force_pci_posting(dev); 1563 force_pci_posting(dev);
1564 mdelay(1); 1564 mdelay(1);
1565 write_nic_word(dev, 0xfe, 0x10); 1565 write_nic_word(dev, 0xfe, 0x10);
1566 force_pci_posting(dev); 1566 force_pci_posting(dev);
1567 mdelay(1); 1567 mdelay(1);
1568 write_nic_word(dev, 0x5e, 0x00); 1568 write_nic_word(dev, 0x5e, 0x00);
1569 force_pci_posting(dev); 1569 force_pci_posting(dev);
1570 mdelay(1); 1570 mdelay(1);
1571 */ 1571 */
1572 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */ 1572 write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
1573 } 1573 }
1574 1574
1575 if(priv->card_8185){ 1575 if(priv->card_8185){
1576 1576
1577 txconf = txconf &~ (1<<TCR_PROBE_NOTIMESTAMP_SHIFT); 1577 txconf = txconf &~ (1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
1578 1578
1579 }else{ 1579 }else{
1580 1580
1581 if(hwseqnum) 1581 if(hwseqnum)
1582 txconf= txconf &~ (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT); 1582 txconf= txconf &~ (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1583 else 1583 else
1584 txconf= txconf | (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT); 1584 txconf= txconf | (1<<TX_CONF_HEADER_AUTOICREMENT_SHIFT);
1585 } 1585 }
1586 1586
1587 txconf = txconf &~ TX_LOOPBACK_MASK; 1587 txconf = txconf &~ TX_LOOPBACK_MASK;
1588 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT); 1588 txconf = txconf | (TX_LOOPBACK_NONE <<TX_LOOPBACK_SHIFT);
1589 txconf = txconf &~ TCR_DPRETRY_MASK; 1589 txconf = txconf &~ TCR_DPRETRY_MASK;
1590 txconf = txconf &~ TCR_RTSRETRY_MASK; 1590 txconf = txconf &~ TCR_RTSRETRY_MASK;
1591 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT); 1591 txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
1592 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT); 1592 txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
1593 txconf = txconf &~ (1<<TX_NOCRC_SHIFT); 1593 txconf = txconf &~ (1<<TX_NOCRC_SHIFT);
1594 1594
1595 if(priv->card_8185){ 1595 if(priv->card_8185){
1596 if(priv->hw_plcp_len) 1596 if(priv->hw_plcp_len)
1597 txconf = txconf &~ TCR_PLCP_LEN; 1597 txconf = txconf &~ TCR_PLCP_LEN;
1598 else 1598 else
1599 txconf = txconf | TCR_PLCP_LEN; 1599 txconf = txconf | TCR_PLCP_LEN;
1600 }else{ 1600 }else{
1601 txconf = txconf &~ TCR_SAT; 1601 txconf = txconf &~ TCR_SAT;
1602 } 1602 }
1603 txconf = txconf &~ TCR_MXDMA_MASK; 1603 txconf = txconf &~ TCR_MXDMA_MASK;
1604 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT); 1604 txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
1605 txconf = txconf | TCR_CWMIN; 1605 txconf = txconf | TCR_CWMIN;
1606 txconf = txconf | TCR_DISCW; 1606 txconf = txconf | TCR_DISCW;
1607 1607
1608 // if(priv->ieee80211->hw_wep) 1608 // if(priv->ieee80211->hw_wep)
1609 // txconf=txconf &~ (1<<TX_NOICV_SHIFT); 1609 // txconf=txconf &~ (1<<TX_NOICV_SHIFT);
1610 // else 1610 // else
1611 txconf=txconf | (1<<TX_NOICV_SHIFT); 1611 txconf=txconf | (1<<TX_NOICV_SHIFT);
1612 1612
1613 write_nic_dword(dev,TX_CONF,txconf); 1613 write_nic_dword(dev,TX_CONF,txconf);
1614 1614
1615 1615
1616 fix_tx_fifo(dev); 1616 fix_tx_fifo(dev);
1617 1617
1618 #ifdef DEBUG_TX 1618 #ifdef DEBUG_TX
1619 DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF)); 1619 DMESG("txconf: %x %x",txconf,read_nic_dword(dev,TX_CONF));
1620 #endif 1620 #endif
1621 1621
1622 cmd=read_nic_byte(dev,CMD); 1622 cmd=read_nic_byte(dev,CMD);
1623 write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT)); 1623 write_nic_byte(dev,CMD,cmd | (1<<CMD_TX_ENABLE_SHIFT));
1624 1624
1625 // mdelay(100); 1625 // mdelay(100);
1626 write_nic_dword(dev,TX_CONF,txconf); 1626 write_nic_dword(dev,TX_CONF,txconf);
1627 // #endif 1627 // #endif
1628 /* 1628 /*
1629 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 1629 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1630 write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask); 1630 write_nic_byte(dev, TX_DMA_POLLING, priv->dma_poll_mask);
1631 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 1631 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1632 */ 1632 */
1633 } 1633 }
1634 1634
1635 1635
1636 void rtl8180_beacon_tx_enable(struct net_device *dev) 1636 void rtl8180_beacon_tx_enable(struct net_device *dev)
1637 { 1637 {
1638 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1638 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1639 1639
1640 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 1640 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1641 #ifdef CONFIG_RTL8185B 1641 #ifdef CONFIG_RTL8185B
1642 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ); 1642 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
1643 write_nic_byte(dev,TPPollStop, priv->dma_poll_mask); 1643 write_nic_byte(dev,TPPollStop, priv->dma_poll_mask);
1644 #else 1644 #else
1645 priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT); 1645 priv->dma_poll_mask &=~(1<<TX_DMA_STOP_BEACON_SHIFT);
1646 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask); 1646 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1647 #endif 1647 #endif
1648 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 1648 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1649 } 1649 }
1650 1650
1651 1651
1652 void rtl8180_beacon_tx_disable(struct net_device *dev) 1652 void rtl8180_beacon_tx_disable(struct net_device *dev)
1653 { 1653 {
1654 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1654 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1655 1655
1656 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 1656 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
1657 #ifdef CONFIG_RTL8185B 1657 #ifdef CONFIG_RTL8185B
1658 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ; 1658 priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
1659 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask); 1659 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
1660 #else 1660 #else
1661 priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT); 1661 priv->dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
1662 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask); 1662 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
1663 #endif 1663 #endif
1664 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 1664 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
1665 1665
1666 } 1666 }
1667 1667
1668 1668
1669 void rtl8180_rtx_disable(struct net_device *dev) 1669 void rtl8180_rtx_disable(struct net_device *dev)
1670 { 1670 {
1671 u8 cmd; 1671 u8 cmd;
1672 struct r8180_priv *priv = ieee80211_priv(dev); 1672 struct r8180_priv *priv = ieee80211_priv(dev);
1673 1673
1674 cmd=read_nic_byte(dev,CMD); 1674 cmd=read_nic_byte(dev,CMD);
1675 write_nic_byte(dev, CMD, cmd &~ \ 1675 write_nic_byte(dev, CMD, cmd &~ \
1676 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT))); 1676 ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
1677 force_pci_posting(dev); 1677 force_pci_posting(dev);
1678 mdelay(10); 1678 mdelay(10);
1679 /*while (read_nic_byte(dev,CMD) & (1<<CMD_RX_ENABLE_SHIFT)) 1679 /*while (read_nic_byte(dev,CMD) & (1<<CMD_RX_ENABLE_SHIFT))
1680 udelay(10); 1680 udelay(10);
1681 */ 1681 */
1682 1682
1683 if(!priv->rx_skb_complete) 1683 if(!priv->rx_skb_complete)
1684 dev_kfree_skb_any(priv->rx_skb); 1684 dev_kfree_skb_any(priv->rx_skb);
1685 } 1685 }
1686 1686
1687 #if 0 1687 #if 0
1688 int alloc_tx_beacon_desc_ring(struct net_device *dev, int count) 1688 int alloc_tx_beacon_desc_ring(struct net_device *dev, int count)
1689 { 1689 {
1690 int i; 1690 int i;
1691 u32 *tmp; 1691 u32 *tmp;
1692 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1692 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1693 1693
1694 priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev, 1694 priv->txbeaconring = (u32*)pci_alloc_consistent(priv->pdev,
1695 sizeof(u32)*8*count, 1695 sizeof(u32)*8*count,
1696 &priv->txbeaconringdma); 1696 &priv->txbeaconringdma);
1697 if (!priv->txbeaconring) return -1; 1697 if (!priv->txbeaconring) return -1;
1698 for (tmp=priv->txbeaconring,i=0;i<count;i++){ 1698 for (tmp=priv->txbeaconring,i=0;i<count;i++){
1699 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv 1699 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1700 /* 1700 /*
1701 *(tmp+2) = (u32)dma_tmp; 1701 *(tmp+2) = (u32)dma_tmp;
1702 *(tmp+3) = bufsize; 1702 *(tmp+3) = bufsize;
1703 */ 1703 */
1704 if(i+1<count) 1704 if(i+1<count)
1705 *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4); 1705 *(tmp+4) = (u32)priv->txbeaconringdma+((i+1)*8*4);
1706 else 1706 else
1707 *(tmp+4) = (u32)priv->txbeaconringdma; 1707 *(tmp+4) = (u32)priv->txbeaconringdma;
1708 1708
1709 tmp=tmp+8; 1709 tmp=tmp+8;
1710 } 1710 }
1711 return 0; 1711 return 0;
1712 } 1712 }
1713 #endif 1713 #endif
1714 1714
1715 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count, 1715 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
1716 int addr) 1716 int addr)
1717 { 1717 {
1718 int i; 1718 int i;
1719 u32 *desc; 1719 u32 *desc;
1720 u32 *tmp; 1720 u32 *tmp;
1721 dma_addr_t dma_desc, dma_tmp; 1721 dma_addr_t dma_desc, dma_tmp;
1722 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1722 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1723 struct pci_dev *pdev = priv->pdev; 1723 struct pci_dev *pdev = priv->pdev;
1724 void *buf; 1724 void *buf;
1725 1725
1726 if((bufsize & 0xfff) != bufsize) { 1726 if((bufsize & 0xfff) != bufsize) {
1727 DMESGE ("TX buffer allocation too large"); 1727 DMESGE ("TX buffer allocation too large");
1728 return 0; 1728 return 0;
1729 } 1729 }
1730 desc = (u32*)pci_alloc_consistent(pdev, 1730 desc = (u32*)pci_alloc_consistent(pdev,
1731 sizeof(u32)*8*count+256, &dma_desc); 1731 sizeof(u32)*8*count+256, &dma_desc);
1732 if(desc==NULL) return -1; 1732 if(desc==NULL) return -1;
1733 if(dma_desc & 0xff){ 1733 if(dma_desc & 0xff){
1734 1734
1735 /* 1735 /*
1736 * descriptor's buffer must be 256 byte aligned 1736 * descriptor's buffer must be 256 byte aligned
1737 * we shouldn't be here, since we set DMA mask ! 1737 * we shouldn't be here, since we set DMA mask !
1738 */ 1738 */
1739 DMESGW("Fixing TX alignment"); 1739 DMESGW("Fixing TX alignment");
1740 desc = (u32*)((u8*)desc + 256); 1740 desc = (u32*)((u8*)desc + 256);
1741 #if (defined(CONFIG_HIGHMEM64G) || defined(CONFIG_64BIT_PHYS_ADDR)) 1741 #if (defined(CONFIG_HIGHMEM64G) || defined(CONFIG_64BIT_PHYS_ADDR))
1742 desc = (u32*)((u64)desc &~ 0xff); 1742 desc = (u32*)((u64)desc &~ 0xff);
1743 dma_desc = (dma_addr_t)((u8*)dma_desc + 256); 1743 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1744 dma_desc = (dma_addr_t)((u64)dma_desc &~ 0xff); 1744 dma_desc = (dma_addr_t)((u64)dma_desc &~ 0xff);
1745 #else 1745 #else
1746 desc = (u32*)((u32)desc &~ 0xff); 1746 desc = (u32*)((u32)desc &~ 0xff);
1747 dma_desc = (dma_addr_t)((u8*)dma_desc + 256); 1747 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1748 dma_desc = (dma_addr_t)((u32)dma_desc &~ 0xff); 1748 dma_desc = (dma_addr_t)((u32)dma_desc &~ 0xff);
1749 #endif 1749 #endif
1750 } 1750 }
1751 tmp=desc; 1751 tmp=desc;
1752 for (i=0;i<count;i++) 1752 for (i=0;i<count;i++)
1753 { 1753 {
1754 buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp); 1754 buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
1755 if (buf == NULL) return -ENOMEM; 1755 if (buf == NULL) return -ENOMEM;
1756 1756
1757 switch(addr) { 1757 switch(addr) {
1758 #if 0 1758 #if 0
1759 case TX_NORMPRIORITY_RING_ADDR: 1759 case TX_NORMPRIORITY_RING_ADDR:
1760 if(-1 == buffer_add(&(priv->txnpbufs),buf,dma_tmp,NULL)){ 1760 if(-1 == buffer_add(&(priv->txnpbufs),buf,dma_tmp,NULL)){
1761 DMESGE("Unable to allocate mem for buffer NP"); 1761 DMESGE("Unable to allocate mem for buffer NP");
1762 return -ENOMEM; 1762 return -ENOMEM;
1763 } 1763 }
1764 break; 1764 break;
1765 1765
1766 case TX_LOWPRIORITY_RING_ADDR: 1766 case TX_LOWPRIORITY_RING_ADDR:
1767 if(-1 == buffer_add(&(priv->txlpbufs),buf,dma_tmp,NULL)){ 1767 if(-1 == buffer_add(&(priv->txlpbufs),buf,dma_tmp,NULL)){
1768 DMESGE("Unable to allocate mem for buffer LP"); 1768 DMESGE("Unable to allocate mem for buffer LP");
1769 return -ENOMEM; 1769 return -ENOMEM;
1770 } 1770 }
1771 break; 1771 break;
1772 1772
1773 case TX_HIGHPRIORITY_RING_ADDR: 1773 case TX_HIGHPRIORITY_RING_ADDR:
1774 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){ 1774 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1775 DMESGE("Unable to allocate mem for buffer HP"); 1775 DMESGE("Unable to allocate mem for buffer HP");
1776 return -ENOMEM; 1776 return -ENOMEM;
1777 } 1777 }
1778 break; 1778 break;
1779 #else 1779 #else
1780 case TX_MANAGEPRIORITY_RING_ADDR: 1780 case TX_MANAGEPRIORITY_RING_ADDR:
1781 if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){ 1781 if(-1 == buffer_add(&(priv->txmapbufs),buf,dma_tmp,NULL)){
1782 DMESGE("Unable to allocate mem for buffer NP"); 1782 DMESGE("Unable to allocate mem for buffer NP");
1783 return -ENOMEM; 1783 return -ENOMEM;
1784 } 1784 }
1785 break; 1785 break;
1786 1786
1787 case TX_BKPRIORITY_RING_ADDR: 1787 case TX_BKPRIORITY_RING_ADDR:
1788 if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){ 1788 if(-1 == buffer_add(&(priv->txbkpbufs),buf,dma_tmp,NULL)){
1789 DMESGE("Unable to allocate mem for buffer LP"); 1789 DMESGE("Unable to allocate mem for buffer LP");
1790 return -ENOMEM; 1790 return -ENOMEM;
1791 } 1791 }
1792 break; 1792 break;
1793 case TX_BEPRIORITY_RING_ADDR: 1793 case TX_BEPRIORITY_RING_ADDR:
1794 if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){ 1794 if(-1 == buffer_add(&(priv->txbepbufs),buf,dma_tmp,NULL)){
1795 DMESGE("Unable to allocate mem for buffer NP"); 1795 DMESGE("Unable to allocate mem for buffer NP");
1796 return -ENOMEM; 1796 return -ENOMEM;
1797 } 1797 }
1798 break; 1798 break;
1799 1799
1800 case TX_VIPRIORITY_RING_ADDR: 1800 case TX_VIPRIORITY_RING_ADDR:
1801 if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){ 1801 if(-1 == buffer_add(&(priv->txvipbufs),buf,dma_tmp,NULL)){
1802 DMESGE("Unable to allocate mem for buffer LP"); 1802 DMESGE("Unable to allocate mem for buffer LP");
1803 return -ENOMEM; 1803 return -ENOMEM;
1804 } 1804 }
1805 break; 1805 break;
1806 case TX_VOPRIORITY_RING_ADDR: 1806 case TX_VOPRIORITY_RING_ADDR:
1807 if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){ 1807 if(-1 == buffer_add(&(priv->txvopbufs),buf,dma_tmp,NULL)){
1808 DMESGE("Unable to allocate mem for buffer NP"); 1808 DMESGE("Unable to allocate mem for buffer NP");
1809 return -ENOMEM; 1809 return -ENOMEM;
1810 } 1810 }
1811 break; 1811 break;
1812 #endif 1812 #endif
1813 case TX_HIGHPRIORITY_RING_ADDR: 1813 case TX_HIGHPRIORITY_RING_ADDR:
1814 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){ 1814 if(-1 == buffer_add(&(priv->txhpbufs),buf,dma_tmp,NULL)){
1815 DMESGE("Unable to allocate mem for buffer HP"); 1815 DMESGE("Unable to allocate mem for buffer HP");
1816 return -ENOMEM; 1816 return -ENOMEM;
1817 } 1817 }
1818 break; 1818 break;
1819 case TX_BEACON_RING_ADDR: 1819 case TX_BEACON_RING_ADDR:
1820 if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){ 1820 if(-1 == buffer_add(&(priv->txbeaconbufs),buf,dma_tmp,NULL)){
1821 DMESGE("Unable to allocate mem for buffer BP"); 1821 DMESGE("Unable to allocate mem for buffer BP");
1822 return -ENOMEM; 1822 return -ENOMEM;
1823 } 1823 }
1824 break; 1824 break;
1825 } 1825 }
1826 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv 1826 *tmp = *tmp &~ (1<<31); // descriptor empty, owned by the drv
1827 *(tmp+2) = (u32)dma_tmp; 1827 *(tmp+2) = (u32)dma_tmp;
1828 *(tmp+3) = bufsize; 1828 *(tmp+3) = bufsize;
1829 1829
1830 if(i+1<count) 1830 if(i+1<count)
1831 *(tmp+4) = (u32)dma_desc+((i+1)*8*4); 1831 *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1832 else 1832 else
1833 *(tmp+4) = (u32)dma_desc; 1833 *(tmp+4) = (u32)dma_desc;
1834 1834
1835 tmp=tmp+8; 1835 tmp=tmp+8;
1836 } 1836 }
1837 1837
1838 switch(addr) { 1838 switch(addr) {
1839 case TX_MANAGEPRIORITY_RING_ADDR: 1839 case TX_MANAGEPRIORITY_RING_ADDR:
1840 priv->txmapringdma=dma_desc; 1840 priv->txmapringdma=dma_desc;
1841 priv->txmapring=desc; 1841 priv->txmapring=desc;
1842 break; 1842 break;
1843 1843
1844 case TX_BKPRIORITY_RING_ADDR: 1844 case TX_BKPRIORITY_RING_ADDR:
1845 priv->txbkpringdma=dma_desc; 1845 priv->txbkpringdma=dma_desc;
1846 priv->txbkpring=desc; 1846 priv->txbkpring=desc;
1847 break; 1847 break;
1848 1848
1849 case TX_BEPRIORITY_RING_ADDR: 1849 case TX_BEPRIORITY_RING_ADDR:
1850 priv->txbepringdma=dma_desc; 1850 priv->txbepringdma=dma_desc;
1851 priv->txbepring=desc; 1851 priv->txbepring=desc;
1852 break; 1852 break;
1853 1853
1854 case TX_VIPRIORITY_RING_ADDR: 1854 case TX_VIPRIORITY_RING_ADDR:
1855 priv->txvipringdma=dma_desc; 1855 priv->txvipringdma=dma_desc;
1856 priv->txvipring=desc; 1856 priv->txvipring=desc;
1857 break; 1857 break;
1858 1858
1859 case TX_VOPRIORITY_RING_ADDR: 1859 case TX_VOPRIORITY_RING_ADDR:
1860 priv->txvopringdma=dma_desc; 1860 priv->txvopringdma=dma_desc;
1861 priv->txvopring=desc; 1861 priv->txvopring=desc;
1862 break; 1862 break;
1863 1863
1864 case TX_HIGHPRIORITY_RING_ADDR: 1864 case TX_HIGHPRIORITY_RING_ADDR:
1865 priv->txhpringdma=dma_desc; 1865 priv->txhpringdma=dma_desc;
1866 priv->txhpring=desc; 1866 priv->txhpring=desc;
1867 break; 1867 break;
1868 1868
1869 case TX_BEACON_RING_ADDR: 1869 case TX_BEACON_RING_ADDR:
1870 priv->txbeaconringdma=dma_desc; 1870 priv->txbeaconringdma=dma_desc;
1871 priv->txbeaconring=desc; 1871 priv->txbeaconring=desc;
1872 break; 1872 break;
1873 1873
1874 } 1874 }
1875 1875
1876 #ifdef DEBUG_TX 1876 #ifdef DEBUG_TX
1877 DMESG("Tx dma physical address: %x",dma_desc); 1877 DMESG("Tx dma physical address: %x",dma_desc);
1878 #endif 1878 #endif
1879 1879
1880 return 0; 1880 return 0;
1881 } 1881 }
1882 1882
1883 1883
1884 void free_tx_desc_rings(struct net_device *dev) 1884 void free_tx_desc_rings(struct net_device *dev)
1885 { 1885 {
1886 1886
1887 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1887 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1888 struct pci_dev *pdev=priv->pdev; 1888 struct pci_dev *pdev=priv->pdev;
1889 int count = priv->txringcount; 1889 int count = priv->txringcount;
1890 1890
1891 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1891 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1892 priv->txmapring, priv->txmapringdma); 1892 priv->txmapring, priv->txmapringdma);
1893 buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1); 1893 buffer_free(dev,&(priv->txmapbufs),priv->txbuffsize,1);
1894 1894
1895 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1895 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1896 priv->txbkpring, priv->txbkpringdma); 1896 priv->txbkpring, priv->txbkpringdma);
1897 buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1); 1897 buffer_free(dev,&(priv->txbkpbufs),priv->txbuffsize,1);
1898 1898
1899 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1899 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1900 priv->txbepring, priv->txbepringdma); 1900 priv->txbepring, priv->txbepringdma);
1901 buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1); 1901 buffer_free(dev,&(priv->txbepbufs),priv->txbuffsize,1);
1902 1902
1903 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1903 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1904 priv->txvipring, priv->txvipringdma); 1904 priv->txvipring, priv->txvipringdma);
1905 buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1); 1905 buffer_free(dev,&(priv->txvipbufs),priv->txbuffsize,1);
1906 1906
1907 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1907 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1908 priv->txvopring, priv->txvopringdma); 1908 priv->txvopring, priv->txvopringdma);
1909 buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1); 1909 buffer_free(dev,&(priv->txvopbufs),priv->txbuffsize,1);
1910 1910
1911 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1911 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1912 priv->txhpring, priv->txhpringdma); 1912 priv->txhpring, priv->txhpringdma);
1913 buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1); 1913 buffer_free(dev,&(priv->txhpbufs),priv->txbuffsize,1);
1914 1914
1915 count = priv->txbeaconcount; 1915 count = priv->txbeaconcount;
1916 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1916 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1917 priv->txbeaconring, priv->txbeaconringdma); 1917 priv->txbeaconring, priv->txbeaconringdma);
1918 buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1); 1918 buffer_free(dev,&(priv->txbeaconbufs),priv->txbuffsize,1);
1919 } 1919 }
1920 1920
1921 #if 0 1921 #if 0
1922 void free_beacon_desc_ring(struct net_device *dev,int count) 1922 void free_beacon_desc_ring(struct net_device *dev,int count)
1923 { 1923 {
1924 1924
1925 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1925 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1926 struct pci_dev *pdev=priv->pdev; 1926 struct pci_dev *pdev=priv->pdev;
1927 1927
1928 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1928 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1929 priv->txbeaconring, priv->txbeaconringdma); 1929 priv->txbeaconring, priv->txbeaconringdma);
1930 1930
1931 if (priv->beacon_buf) 1931 if (priv->beacon_buf)
1932 pci_free_consistent(priv->pdev, 1932 pci_free_consistent(priv->pdev,
1933 priv->master_beaconsize,priv->beacon_buf,priv->beacondmabuf); 1933 priv->master_beaconsize,priv->beacon_buf,priv->beacondmabuf);
1934 1934
1935 } 1935 }
1936 #endif 1936 #endif
1937 void free_rx_desc_ring(struct net_device *dev) 1937 void free_rx_desc_ring(struct net_device *dev)
1938 { 1938 {
1939 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1939 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1940 struct pci_dev *pdev = priv->pdev; 1940 struct pci_dev *pdev = priv->pdev;
1941 1941
1942 int count = priv->rxringcount; 1942 int count = priv->rxringcount;
1943 1943
1944 #ifdef CONFIG_RTL8185B 1944 #ifdef CONFIG_RTL8185B
1945 pci_free_consistent(pdev, sizeof(u32)*8*count+256, 1945 pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1946 priv->rxring, priv->rxringdma); 1946 priv->rxring, priv->rxringdma);
1947 #else 1947 #else
1948 pci_free_consistent(pdev, sizeof(u32)*4*count+256, 1948 pci_free_consistent(pdev, sizeof(u32)*4*count+256,
1949 priv->rxring, priv->rxringdma); 1949 priv->rxring, priv->rxringdma);
1950 #endif 1950 #endif
1951 1951
1952 buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0); 1952 buffer_free(dev,&(priv->rxbuffer),priv->rxbuffersize,0);
1953 } 1953 }
1954 1954
1955 1955
1956 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count) 1956 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1957 { 1957 {
1958 int i; 1958 int i;
1959 u32 *desc; 1959 u32 *desc;
1960 u32 *tmp; 1960 u32 *tmp;
1961 dma_addr_t dma_desc,dma_tmp; 1961 dma_addr_t dma_desc,dma_tmp;
1962 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 1962 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1963 struct pci_dev *pdev=priv->pdev; 1963 struct pci_dev *pdev=priv->pdev;
1964 void *buf; 1964 void *buf;
1965 u8 rx_desc_size; 1965 u8 rx_desc_size;
1966 1966
1967 #ifdef CONFIG_RTL8185B 1967 #ifdef CONFIG_RTL8185B
1968 rx_desc_size = 8; // 4*8 = 32 bytes 1968 rx_desc_size = 8; // 4*8 = 32 bytes
1969 #else 1969 #else
1970 rx_desc_size = 4; 1970 rx_desc_size = 4;
1971 #endif 1971 #endif
1972 1972
1973 if((bufsize & 0xfff) != bufsize){ 1973 if((bufsize & 0xfff) != bufsize){
1974 DMESGE ("RX buffer allocation too large"); 1974 DMESGE ("RX buffer allocation too large");
1975 return -1; 1975 return -1;
1976 } 1976 }
1977 1977
1978 desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256, 1978 desc = (u32*)pci_alloc_consistent(pdev,sizeof(u32)*rx_desc_size*count+256,
1979 &dma_desc); 1979 &dma_desc);
1980 1980
1981 if(dma_desc & 0xff){ 1981 if(dma_desc & 0xff){
1982 1982
1983 /* 1983 /*
1984 * descriptor's buffer must be 256 byte aligned 1984 * descriptor's buffer must be 256 byte aligned
1985 * should never happen since we specify the DMA mask 1985 * should never happen since we specify the DMA mask
1986 */ 1986 */
1987 1987
1988 DMESGW("Fixing RX alignment"); 1988 DMESGW("Fixing RX alignment");
1989 desc = (u32*)((u8*)desc + 256); 1989 desc = (u32*)((u8*)desc + 256);
1990 #if (defined(CONFIG_HIGHMEM64G) || defined(CONFIG_64BIT_PHYS_ADDR)) 1990 #if (defined(CONFIG_HIGHMEM64G) || defined(CONFIG_64BIT_PHYS_ADDR))
1991 desc = (u32*)((u64)desc &~ 0xff); 1991 desc = (u32*)((u64)desc &~ 0xff);
1992 dma_desc = (dma_addr_t)((u8*)dma_desc + 256); 1992 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1993 dma_desc = (dma_addr_t)((u64)dma_desc &~ 0xff); 1993 dma_desc = (dma_addr_t)((u64)dma_desc &~ 0xff);
1994 #else 1994 #else
1995 desc = (u32*)((u32)desc &~ 0xff); 1995 desc = (u32*)((u32)desc &~ 0xff);
1996 dma_desc = (dma_addr_t)((u8*)dma_desc + 256); 1996 dma_desc = (dma_addr_t)((u8*)dma_desc + 256);
1997 dma_desc = (dma_addr_t)((u32)dma_desc &~ 0xff); 1997 dma_desc = (dma_addr_t)((u32)dma_desc &~ 0xff);
1998 #endif 1998 #endif
1999 } 1999 }
2000 2000
2001 priv->rxring=desc; 2001 priv->rxring=desc;
2002 priv->rxringdma=dma_desc; 2002 priv->rxringdma=dma_desc;
2003 tmp=desc; 2003 tmp=desc;
2004 2004
2005 for (i=0;i<count;i++){ 2005 for (i=0;i<count;i++){
2006 2006
2007 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){ 2007 if ((buf= kmalloc(bufsize * sizeof(u8),GFP_ATOMIC)) == NULL){
2008 DMESGE("Failed to kmalloc RX buffer"); 2008 DMESGE("Failed to kmalloc RX buffer");
2009 return -1; 2009 return -1;
2010 } 2010 }
2011 2011
2012 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8), 2012 dma_tmp = pci_map_single(pdev,buf,bufsize * sizeof(u8),
2013 PCI_DMA_FROMDEVICE); 2013 PCI_DMA_FROMDEVICE);
2014 2014
2015 #ifdef DEBUG_ZERO_RX 2015 #ifdef DEBUG_ZERO_RX
2016 int j; 2016 int j;
2017 for(j=0;j<bufsize;j++) ((u8*)buf)[i] = 0; 2017 for(j=0;j<bufsize;j++) ((u8*)buf)[i] = 0;
2018 #endif 2018 #endif
2019 2019
2020 //buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp); 2020 //buf = (void*)pci_alloc_consistent(pdev,bufsize,&dma_tmp);
2021 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp, 2021 if(-1 == buffer_add(&(priv->rxbuffer), buf,dma_tmp,
2022 &(priv->rxbufferhead))){ 2022 &(priv->rxbufferhead))){
2023 DMESGE("Unable to allocate mem RX buf"); 2023 DMESGE("Unable to allocate mem RX buf");
2024 return -1; 2024 return -1;
2025 } 2025 }
2026 *tmp = 0; //zero pads the header of the descriptor 2026 *tmp = 0; //zero pads the header of the descriptor
2027 *tmp = *tmp |( bufsize&0xfff); 2027 *tmp = *tmp |( bufsize&0xfff);
2028 *(tmp+2) = (u32)dma_tmp; 2028 *(tmp+2) = (u32)dma_tmp;
2029 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC 2029 *tmp = *tmp |(1<<31); // descriptor void, owned by the NIC
2030 2030
2031 #ifdef DEBUG_RXALLOC 2031 #ifdef DEBUG_RXALLOC
2032 DMESG("Alloc %x size buffer, DMA mem @ %x, virtual mem @ %x", 2032 DMESG("Alloc %x size buffer, DMA mem @ %x, virtual mem @ %x",
2033 (u32)(bufsize&0xfff), (u32)dma_tmp, (u32)buf); 2033 (u32)(bufsize&0xfff), (u32)dma_tmp, (u32)buf);
2034 #endif 2034 #endif
2035 2035
2036 tmp=tmp+rx_desc_size; 2036 tmp=tmp+rx_desc_size;
2037 } 2037 }
2038 2038
2039 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor 2039 *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
2040 2040
2041 2041
2042 #ifdef DEBUG_RXALLOC 2042 #ifdef DEBUG_RXALLOC
2043 DMESG("RX DMA physical address: %x",dma_desc); 2043 DMESG("RX DMA physical address: %x",dma_desc);
2044 #endif 2044 #endif
2045 2045
2046 return 0; 2046 return 0;
2047 } 2047 }
2048 2048
2049 2049
2050 void set_nic_rxring(struct net_device *dev) 2050 void set_nic_rxring(struct net_device *dev)
2051 { 2051 {
2052 u8 pgreg; 2052 u8 pgreg;
2053 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 2053 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2054 2054
2055 //rtl8180_set_mode(dev, EPROM_CMD_CONFIG); 2055 //rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2056 2056
2057 pgreg=read_nic_byte(dev, PGSELECT); 2057 pgreg=read_nic_byte(dev, PGSELECT);
2058 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT)); 2058 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
2059 2059
2060 //rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 2060 //rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2061 2061
2062 write_nic_dword(dev, RXRING_ADDR,priv->rxringdma); 2062 write_nic_dword(dev, RXRING_ADDR,priv->rxringdma);
2063 } 2063 }
2064 2064
2065 2065
2066 void rtl8180_reset(struct net_device *dev) 2066 void rtl8180_reset(struct net_device *dev)
2067 { 2067 {
2068 //u32 txconf = 0x80e00707; //FIXME: Make me understandable 2068 //u32 txconf = 0x80e00707; //FIXME: Make me understandable
2069 u8 cr; 2069 u8 cr;
2070 2070
2071 //write_nic_dword(dev,TX_CONF,txconf); 2071 //write_nic_dword(dev,TX_CONF,txconf);
2072 2072
2073 rtl8180_irq_disable(dev); 2073 rtl8180_irq_disable(dev);
2074 2074
2075 cr=read_nic_byte(dev,CMD); 2075 cr=read_nic_byte(dev,CMD);
2076 cr = cr & 2; 2076 cr = cr & 2;
2077 cr = cr | (1<<CMD_RST_SHIFT); 2077 cr = cr | (1<<CMD_RST_SHIFT);
2078 write_nic_byte(dev,CMD,cr); 2078 write_nic_byte(dev,CMD,cr);
2079 2079
2080 force_pci_posting(dev); 2080 force_pci_posting(dev);
2081 2081
2082 mdelay(200); 2082 mdelay(200);
2083 2083
2084 if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT)) 2084 if(read_nic_byte(dev,CMD) & (1<<CMD_RST_SHIFT))
2085 DMESGW("Card reset timeout!"); 2085 DMESGW("Card reset timeout!");
2086 else 2086 else
2087 DMESG("Card successfully reset"); 2087 DMESG("Card successfully reset");
2088 2088
2089 //#ifndef CONFIG_RTL8185B 2089 //#ifndef CONFIG_RTL8185B
2090 rtl8180_set_mode(dev,EPROM_CMD_LOAD); 2090 rtl8180_set_mode(dev,EPROM_CMD_LOAD);
2091 force_pci_posting(dev); 2091 force_pci_posting(dev);
2092 mdelay(200); 2092 mdelay(200);
2093 //#endif 2093 //#endif
2094 } 2094 }
2095 2095
2096 inline u16 ieeerate2rtlrate(int rate) 2096 inline u16 ieeerate2rtlrate(int rate)
2097 { 2097 {
2098 switch(rate){ 2098 switch(rate){
2099 case 10: 2099 case 10:
2100 return 0; 2100 return 0;
2101 case 20: 2101 case 20:
2102 return 1; 2102 return 1;
2103 case 55: 2103 case 55:
2104 return 2; 2104 return 2;
2105 case 110: 2105 case 110:
2106 return 3; 2106 return 3;
2107 case 60: 2107 case 60:
2108 return 4; 2108 return 4;
2109 case 90: 2109 case 90:
2110 return 5; 2110 return 5;
2111 case 120: 2111 case 120:
2112 return 6; 2112 return 6;
2113 case 180: 2113 case 180:
2114 return 7; 2114 return 7;
2115 case 240: 2115 case 240:
2116 return 8; 2116 return 8;
2117 case 360: 2117 case 360:
2118 return 9; 2118 return 9;
2119 case 480: 2119 case 480:
2120 return 10; 2120 return 10;
2121 case 540: 2121 case 540:
2122 return 11; 2122 return 11;
2123 default: 2123 default:
2124 return 3; 2124 return 3;
2125 2125
2126 } 2126 }
2127 } 2127 }
2128 2128
2129 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720}; 2129 static u16 rtl_rate[] = {10,20,55,110,60,90,120,180,240,360,480,540,720};
2130 inline u16 rtl8180_rate2rate(short rate) 2130 inline u16 rtl8180_rate2rate(short rate)
2131 { 2131 {
2132 if (rate >12) return 10; 2132 if (rate >12) return 10;
2133 return rtl_rate[rate]; 2133 return rtl_rate[rate];
2134 } 2134 }
2135 inline u8 rtl8180_IsWirelessBMode(u16 rate) 2135 inline u8 rtl8180_IsWirelessBMode(u16 rate)
2136 { 2136 {
2137 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) ) 2137 if( ((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220) )
2138 return 1; 2138 return 1;
2139 else return 0; 2139 else return 0;
2140 } 2140 }
2141 u16 N_DBPSOfRate(u16 DataRate); 2141 u16 N_DBPSOfRate(u16 DataRate);
2142 u16 ComputeTxTime( 2142 u16 ComputeTxTime(
2143 u16 FrameLength, 2143 u16 FrameLength,
2144 u16 DataRate, 2144 u16 DataRate,
2145 u8 bManagementFrame, 2145 u8 bManagementFrame,
2146 u8 bShortPreamble 2146 u8 bShortPreamble
2147 ) 2147 )
2148 { 2148 {
2149 u16 FrameTime; 2149 u16 FrameTime;
2150 u16 N_DBPS; 2150 u16 N_DBPS;
2151 u16 Ceiling; 2151 u16 Ceiling;
2152 2152
2153 if( rtl8180_IsWirelessBMode(DataRate) ) 2153 if( rtl8180_IsWirelessBMode(DataRate) )
2154 { 2154 {
2155 if( bManagementFrame || !bShortPreamble || DataRate == 10 ) 2155 if( bManagementFrame || !bShortPreamble || DataRate == 10 )
2156 { // long preamble 2156 { // long preamble
2157 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10))); 2157 FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
2158 } 2158 }
2159 else 2159 else
2160 { // Short preamble 2160 { // Short preamble
2161 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10))); 2161 FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
2162 } 2162 }
2163 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling 2163 if( ( FrameLength*8 % (DataRate/10) ) != 0 ) //Get the Ceilling
2164 FrameTime ++; 2164 FrameTime ++;
2165 } else { //802.11g DSSS-OFDM PLCP length field calculation. 2165 } else { //802.11g DSSS-OFDM PLCP length field calculation.
2166 N_DBPS = N_DBPSOfRate(DataRate); 2166 N_DBPS = N_DBPSOfRate(DataRate);
2167 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS 2167 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
2168 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0); 2168 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
2169 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6); 2169 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
2170 } 2170 }
2171 return FrameTime; 2171 return FrameTime;
2172 } 2172 }
2173 u16 N_DBPSOfRate(u16 DataRate) 2173 u16 N_DBPSOfRate(u16 DataRate)
2174 { 2174 {
2175 u16 N_DBPS = 24; 2175 u16 N_DBPS = 24;
2176 2176
2177 switch(DataRate) 2177 switch(DataRate)
2178 { 2178 {
2179 case 60: 2179 case 60:
2180 N_DBPS = 24; 2180 N_DBPS = 24;
2181 break; 2181 break;
2182 2182
2183 case 90: 2183 case 90:
2184 N_DBPS = 36; 2184 N_DBPS = 36;
2185 break; 2185 break;
2186 2186
2187 case 120: 2187 case 120:
2188 N_DBPS = 48; 2188 N_DBPS = 48;
2189 break; 2189 break;
2190 2190
2191 case 180: 2191 case 180:
2192 N_DBPS = 72; 2192 N_DBPS = 72;
2193 break; 2193 break;
2194 2194
2195 case 240: 2195 case 240:
2196 N_DBPS = 96; 2196 N_DBPS = 96;
2197 break; 2197 break;
2198 2198
2199 case 360: 2199 case 360:
2200 N_DBPS = 144; 2200 N_DBPS = 144;
2201 break; 2201 break;
2202 2202
2203 case 480: 2203 case 480:
2204 N_DBPS = 192; 2204 N_DBPS = 192;
2205 break; 2205 break;
2206 2206
2207 case 540: 2207 case 540:
2208 N_DBPS = 216; 2208 N_DBPS = 216;
2209 break; 2209 break;
2210 2210
2211 default: 2211 default:
2212 break; 2212 break;
2213 } 2213 }
2214 2214
2215 return N_DBPS; 2215 return N_DBPS;
2216 } 2216 }
2217 2217
2218 //{by amy 080312 2218 //{by amy 080312
2219 // 2219 //
2220 // Description: 2220 // Description:
2221 // For Netgear case, they want good-looking singal strength. 2221 // For Netgear case, they want good-looking singal strength.
2222 // 2004.12.05, by rcnjko. 2222 // 2004.12.05, by rcnjko.
2223 // 2223 //
2224 long 2224 long
2225 NetgearSignalStrengthTranslate( 2225 NetgearSignalStrengthTranslate(
2226 long LastSS, 2226 long LastSS,
2227 long CurrSS 2227 long CurrSS
2228 ) 2228 )
2229 { 2229 {
2230 long RetSS; 2230 long RetSS;
2231 2231
2232 // Step 1. Scale mapping. 2232 // Step 1. Scale mapping.
2233 if(CurrSS >= 71 && CurrSS <= 100) 2233 if(CurrSS >= 71 && CurrSS <= 100)
2234 { 2234 {
2235 RetSS = 90 + ((CurrSS - 70) / 3); 2235 RetSS = 90 + ((CurrSS - 70) / 3);
2236 } 2236 }
2237 else if(CurrSS >= 41 && CurrSS <= 70) 2237 else if(CurrSS >= 41 && CurrSS <= 70)
2238 { 2238 {
2239 RetSS = 78 + ((CurrSS - 40) / 3); 2239 RetSS = 78 + ((CurrSS - 40) / 3);
2240 } 2240 }
2241 else if(CurrSS >= 31 && CurrSS <= 40) 2241 else if(CurrSS >= 31 && CurrSS <= 40)
2242 { 2242 {
2243 RetSS = 66 + (CurrSS - 30); 2243 RetSS = 66 + (CurrSS - 30);
2244 } 2244 }
2245 else if(CurrSS >= 21 && CurrSS <= 30) 2245 else if(CurrSS >= 21 && CurrSS <= 30)
2246 { 2246 {
2247 RetSS = 54 + (CurrSS - 20); 2247 RetSS = 54 + (CurrSS - 20);
2248 } 2248 }
2249 else if(CurrSS >= 5 && CurrSS <= 20) 2249 else if(CurrSS >= 5 && CurrSS <= 20)
2250 { 2250 {
2251 RetSS = 42 + (((CurrSS - 5) * 2) / 3); 2251 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
2252 } 2252 }
2253 else if(CurrSS == 4) 2253 else if(CurrSS == 4)
2254 { 2254 {
2255 RetSS = 36; 2255 RetSS = 36;
2256 } 2256 }
2257 else if(CurrSS == 3) 2257 else if(CurrSS == 3)
2258 { 2258 {
2259 RetSS = 27; 2259 RetSS = 27;
2260 } 2260 }
2261 else if(CurrSS == 2) 2261 else if(CurrSS == 2)
2262 { 2262 {
2263 RetSS = 18; 2263 RetSS = 18;
2264 } 2264 }
2265 else if(CurrSS == 1) 2265 else if(CurrSS == 1)
2266 { 2266 {
2267 RetSS = 9; 2267 RetSS = 9;
2268 } 2268 }
2269 else 2269 else
2270 { 2270 {
2271 RetSS = CurrSS; 2271 RetSS = CurrSS;
2272 } 2272 }
2273 //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS)); 2273 //RT_TRACE(COMP_DBG, DBG_LOUD, ("##### After Mapping: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2274 2274
2275 // Step 2. Smoothing. 2275 // Step 2. Smoothing.
2276 if(LastSS > 0) 2276 if(LastSS > 0)
2277 { 2277 {
2278 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6; 2278 RetSS = ((LastSS * 5) + (RetSS)+ 5) / 6;
2279 } 2279 }
2280 //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS)); 2280 //RT_TRACE(COMP_DBG, DBG_LOUD, ("$$$$$ After Smoothing: LastSS: %d, CurrSS: %d, RetSS: %d\n", LastSS, CurrSS, RetSS));
2281 2281
2282 return RetSS; 2282 return RetSS;
2283 } 2283 }
2284 // 2284 //
2285 // Description: 2285 // Description:
2286 // Translate 0-100 signal strength index into dBm. 2286 // Translate 0-100 signal strength index into dBm.
2287 // 2287 //
2288 long 2288 long
2289 TranslateToDbm8185( 2289 TranslateToDbm8185(
2290 u8 SignalStrengthIndex // 0-100 index. 2290 u8 SignalStrengthIndex // 0-100 index.
2291 ) 2291 )
2292 { 2292 {
2293 long SignalPower; // in dBm. 2293 long SignalPower; // in dBm.
2294 2294
2295 // Translate to dBm (x=0.5y-95). 2295 // Translate to dBm (x=0.5y-95).
2296 SignalPower = (long)((SignalStrengthIndex + 1) >> 1); 2296 SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
2297 SignalPower -= 95; 2297 SignalPower -= 95;
2298 2298
2299 return SignalPower; 2299 return SignalPower;
2300 } 2300 }
2301 // 2301 //
2302 // Description: 2302 // Description:
2303 // Perform signal smoothing for dynamic mechanism. 2303 // Perform signal smoothing for dynamic mechanism.
2304 // This is different with PerformSignalSmoothing8185 in smoothing fomula. 2304 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2305 // No dramatic adjustion is apply because dynamic mechanism need some degree 2305 // No dramatic adjustion is apply because dynamic mechanism need some degree
2306 // of correctness. Ported from 8187B. 2306 // of correctness. Ported from 8187B.
2307 // 2007-02-26, by Bruce. 2307 // 2007-02-26, by Bruce.
2308 // 2308 //
2309 void 2309 void
2310 PerformUndecoratedSignalSmoothing8185( 2310 PerformUndecoratedSignalSmoothing8185(
2311 struct r8180_priv *priv, 2311 struct r8180_priv *priv,
2312 bool bCckRate 2312 bool bCckRate
2313 ) 2313 )
2314 { 2314 {
2315 2315
2316 2316
2317 // Determin the current packet is CCK rate. 2317 // Determin the current packet is CCK rate.
2318 priv->bCurCCKPkt = bCckRate; 2318 priv->bCurCCKPkt = bCckRate;
2319 2319
2320 if(priv->UndecoratedSmoothedSS >= 0) 2320 if(priv->UndecoratedSmoothedSS >= 0)
2321 { 2321 {
2322 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6; 2322 priv->UndecoratedSmoothedSS = ( (priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10) ) / 6;
2323 } 2323 }
2324 else 2324 else
2325 { 2325 {
2326 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10; 2326 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
2327 } 2327 }
2328 2328
2329 priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60; 2329 priv->UndercorateSmoothedRxPower = ( (priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower* 11)) / 60;
2330 2330
2331 // printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", priv->SignalStrength, priv->UndecoratedSmoothedSS); 2331 // printk("Sommthing SignalSterngth (%d) => UndecoratedSmoothedSS (%d)\n", priv->SignalStrength, priv->UndecoratedSmoothedSS);
2332 // printk("Sommthing RxPower (%d) => UndecoratedRxPower (%d)\n", priv->RxPower, priv->UndercorateSmoothedRxPower); 2332 // printk("Sommthing RxPower (%d) => UndecoratedRxPower (%d)\n", priv->RxPower, priv->UndercorateSmoothedRxPower);
2333 2333
2334 //if(priv->CurCCKRSSI >= 0 && bCckRate) 2334 //if(priv->CurCCKRSSI >= 0 && bCckRate)
2335 if(bCckRate) 2335 if(bCckRate)
2336 { 2336 {
2337 priv->CurCCKRSSI = priv->RSSI; 2337 priv->CurCCKRSSI = priv->RSSI;
2338 } 2338 }
2339 else 2339 else
2340 { 2340 {
2341 priv->CurCCKRSSI = 0; 2341 priv->CurCCKRSSI = 0;
2342 } 2342 }
2343 2343
2344 // Boundary checking. 2344 // Boundary checking.
2345 // TODO: The overflow condition does happen, if we want to fix, 2345 // TODO: The overflow condition does happen, if we want to fix,
2346 // we shall recalculate thresholds first. 2346 // we shall recalculate thresholds first.
2347 if(priv->UndecoratedSmoothedSS > 100) 2347 if(priv->UndecoratedSmoothedSS > 100)
2348 { 2348 {
2349 // printk("UndecoratedSmoothedSS(%d) overflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength); 2349 // printk("UndecoratedSmoothedSS(%d) overflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2350 } 2350 }
2351 if(priv->UndecoratedSmoothedSS < 0) 2351 if(priv->UndecoratedSmoothedSS < 0)
2352 { 2352 {
2353 // printk("UndecoratedSmoothedSS(%d) underflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength); 2353 // printk("UndecoratedSmoothedSS(%d) underflow, SignalStrength(%d)\n", priv->UndecoratedSmoothedSS, priv->SignalStrength);
2354 } 2354 }
2355 2355
2356 } 2356 }
2357 2357
2358 //by amy 080312} 2358 //by amy 080312}
2359 2359
2360 /* This is rough RX isr handling routine*/ 2360 /* This is rough RX isr handling routine*/
2361 void rtl8180_rx(struct net_device *dev) 2361 void rtl8180_rx(struct net_device *dev)
2362 { 2362 {
2363 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 2363 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2364 struct sk_buff *tmp_skb; 2364 struct sk_buff *tmp_skb;
2365 2365
2366 //struct sk_buff *skb; 2366 //struct sk_buff *skb;
2367 short first,last; 2367 short first,last;
2368 u32 len; 2368 u32 len;
2369 int lastlen; 2369 int lastlen;
2370 unsigned char quality, signal; 2370 unsigned char quality, signal;
2371 u8 rate; 2371 u8 rate;
2372 //u32 *prism_hdr; 2372 //u32 *prism_hdr;
2373 u32 *tmp,*tmp2; 2373 u32 *tmp,*tmp2;
2374 u8 rx_desc_size; 2374 u8 rx_desc_size;
2375 u8 padding; 2375 u8 padding;
2376 //u32 count=0; 2376 //u32 count=0;
2377 char rxpower = 0; 2377 char rxpower = 0;
2378 u32 RXAGC = 0; 2378 u32 RXAGC = 0;
2379 long RxAGC_dBm = 0; 2379 long RxAGC_dBm = 0;
2380 u8 LNA=0, BB=0; 2380 u8 LNA=0, BB=0;
2381 u8 LNA_gain[4]={02, 17, 29, 39}; 2381 u8 LNA_gain[4]={02, 17, 29, 39};
2382 u8 Antenna = 0; 2382 u8 Antenna = 0;
2383 struct ieee80211_hdr *hdr;//by amy 2383 struct ieee80211_hdr *hdr;//by amy
2384 u16 fc,type; 2384 u16 fc,type;
2385 u8 bHwError = 0,bCRC = 0,bICV = 0; 2385 u8 bHwError = 0,bCRC = 0,bICV = 0;
2386 //bHwError = 0; 2386 //bHwError = 0;
2387 //bCRC = 0; 2387 //bCRC = 0;
2388 //bICV = 0; 2388 //bICV = 0;
2389 bool bCckRate = false; 2389 bool bCckRate = false;
2390 u8 RSSI = 0; 2390 u8 RSSI = 0;
2391 long SignalStrengthIndex = 0;//+by amy 080312 2391 long SignalStrengthIndex = 0;//+by amy 080312
2392 // u8 SignalStrength = 0; 2392 // u8 SignalStrength = 0;
2393 struct ieee80211_rx_stats stats = { 2393 struct ieee80211_rx_stats stats = {
2394 .signal = 0, 2394 .signal = 0,
2395 .noise = -98, 2395 .noise = -98,
2396 .rate = 0, 2396 .rate = 0,
2397 // .mac_time = jiffies, 2397 // .mac_time = jiffies,
2398 .freq = IEEE80211_24GHZ_BAND, 2398 .freq = IEEE80211_24GHZ_BAND,
2399 }; 2399 };
2400 2400
2401 #ifdef CONFIG_RTL8185B 2401 #ifdef CONFIG_RTL8185B
2402 stats.nic_type = NIC_8185B; 2402 stats.nic_type = NIC_8185B;
2403 rx_desc_size = 8; 2403 rx_desc_size = 8;
2404 2404
2405 #else 2405 #else
2406 stats.nic_type = NIC_8185; 2406 stats.nic_type = NIC_8185;
2407 rx_desc_size = 4; 2407 rx_desc_size = 4;
2408 #endif 2408 #endif
2409 //printk("receive frame!%d\n",count++); 2409 //printk("receive frame!%d\n",count++);
2410 //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!"); 2410 //if (!priv->rxbuffer) DMESG ("EE: NIC RX ack, but RX queue corrupted!");
2411 //else { 2411 //else {
2412 2412
2413 if ((*(priv->rxringtail)) & (1<<31)) { 2413 if ((*(priv->rxringtail)) & (1<<31)) {
2414 2414
2415 /* we have got an RX int, but the descriptor 2415 /* we have got an RX int, but the descriptor
2416 * we are pointing is empty*/ 2416 * we are pointing is empty*/
2417 2417
2418 priv->stats.rxnodata++; 2418 priv->stats.rxnodata++;
2419 priv->ieee80211->stats.rx_errors++; 2419 priv->ieee80211->stats.rx_errors++;
2420 2420
2421 /* if (! *(priv->rxring) & (1<<31)) { 2421 /* if (! *(priv->rxring) & (1<<31)) {
2422 2422
2423 priv->stats.rxreset++; 2423 priv->stats.rxreset++;
2424 priv->rxringtail=priv->rxring; 2424 priv->rxringtail=priv->rxring;
2425 priv->rxbuffer=priv->rxbufferhead; 2425 priv->rxbuffer=priv->rxbufferhead;
2426 2426
2427 }else{*/ 2427 }else{*/
2428 2428
2429 #if 0 2429 #if 0
2430 /* Maybe it is possible that the NIC has skipped some descriptors or 2430 /* Maybe it is possible that the NIC has skipped some descriptors or
2431 * it has reset its internal pointer to the beginning of the ring 2431 * it has reset its internal pointer to the beginning of the ring
2432 * we search for the first filled descriptor in the ring, or we break 2432 * we search for the first filled descriptor in the ring, or we break
2433 * putting again the pointer in the old location if we do not found any. 2433 * putting again the pointer in the old location if we do not found any.
2434 * This is quite dangerous, what does happen if the nic writes 2434 * This is quite dangerous, what does happen if the nic writes
2435 * two descriptor (say A and B) when we have just checked the descriptor 2435 * two descriptor (say A and B) when we have just checked the descriptor
2436 * A and we are going to check the descriptor B..This might happen if the 2436 * A and we are going to check the descriptor B..This might happen if the
2437 * interrupt was dummy, there was not really filled descriptors and 2437 * interrupt was dummy, there was not really filled descriptors and
2438 * the NIC didn't lose pointer 2438 * the NIC didn't lose pointer
2439 */ 2439 */
2440 2440
2441 //priv->stats.rxwrkaround++; 2441 //priv->stats.rxwrkaround++;
2442 2442
2443 tmp = priv->rxringtail; 2443 tmp = priv->rxringtail;
2444 while (*(priv->rxringtail) & (1<<31)){ 2444 while (*(priv->rxringtail) & (1<<31)){
2445 2445
2446 priv->rxringtail+=4; 2446 priv->rxringtail+=4;
2447 2447
2448 if(priv->rxringtail >= 2448 if(priv->rxringtail >=
2449 (priv->rxring)+(priv->rxringcount )*4) 2449 (priv->rxring)+(priv->rxringcount )*4)
2450 priv->rxringtail=priv->rxring; 2450 priv->rxringtail=priv->rxring;
2451 2451
2452 priv->rxbuffer=(priv->rxbuffer->next); 2452 priv->rxbuffer=(priv->rxbuffer->next);
2453 2453
2454 if(priv->rxringtail == tmp ){ 2454 if(priv->rxringtail == tmp ){
2455 //DMESG("EE: Could not find RX pointer"); 2455 //DMESG("EE: Could not find RX pointer");
2456 priv->stats.rxnopointer++; 2456 priv->stats.rxnopointer++;
2457 break; 2457 break;
2458 } 2458 }
2459 } 2459 }
2460 #else 2460 #else
2461 2461
2462 tmp2 = NULL; 2462 tmp2 = NULL;
2463 tmp = priv->rxringtail; 2463 tmp = priv->rxringtail;
2464 do{ 2464 do{
2465 if(tmp == priv->rxring) 2465 if(tmp == priv->rxring)
2466 //tmp = priv->rxring + (priv->rxringcount )*rx_desc_size; xiong-2006-11-15 2466 //tmp = priv->rxring + (priv->rxringcount )*rx_desc_size; xiong-2006-11-15
2467 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size; 2467 tmp = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
2468 else 2468 else
2469 tmp -= rx_desc_size; 2469 tmp -= rx_desc_size;
2470 2470
2471 if(! (*tmp & (1<<31))) 2471 if(! (*tmp & (1<<31)))
2472 tmp2 = tmp; 2472 tmp2 = tmp;
2473 }while(tmp != priv->rxring); 2473 }while(tmp != priv->rxring);
2474 2474
2475 if(tmp2) priv->rxringtail = tmp2; 2475 if(tmp2) priv->rxringtail = tmp2;
2476 #endif 2476 #endif
2477 //} 2477 //}
2478 } 2478 }
2479 2479
2480 /* while there are filled descriptors */ 2480 /* while there are filled descriptors */
2481 while(!(*(priv->rxringtail) & (1<<31))){ 2481 while(!(*(priv->rxringtail) & (1<<31))){
2482 if(*(priv->rxringtail) & (1<<26)) 2482 if(*(priv->rxringtail) & (1<<26))
2483 DMESGW("RX buffer overflow"); 2483 DMESGW("RX buffer overflow");
2484 if(*(priv->rxringtail) & (1<<12)) 2484 if(*(priv->rxringtail) & (1<<12))
2485 priv->stats.rxicverr++; 2485 priv->stats.rxicverr++;
2486 2486
2487 if(*(priv->rxringtail) & (1<<27)){ 2487 if(*(priv->rxringtail) & (1<<27)){
2488 priv->stats.rxdmafail++; 2488 priv->stats.rxdmafail++;
2489 //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); 2489 //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
2490 goto drop; 2490 goto drop;
2491 } 2491 }
2492 2492
2493 pci_dma_sync_single_for_cpu(priv->pdev, 2493 pci_dma_sync_single_for_cpu(priv->pdev,
2494 priv->rxbuffer->dma, 2494 priv->rxbuffer->dma,
2495 priv->rxbuffersize * \ 2495 priv->rxbuffersize * \
2496 sizeof(u8), 2496 sizeof(u8),
2497 PCI_DMA_FROMDEVICE); 2497 PCI_DMA_FROMDEVICE);
2498 2498
2499 first = *(priv->rxringtail) & (1<<29) ? 1:0; 2499 first = *(priv->rxringtail) & (1<<29) ? 1:0;
2500 if(first) priv->rx_prevlen=0; 2500 if(first) priv->rx_prevlen=0;
2501 2501
2502 last = *(priv->rxringtail) & (1<<28) ? 1:0; 2502 last = *(priv->rxringtail) & (1<<28) ? 1:0;
2503 if(last){ 2503 if(last){
2504 lastlen=((*priv->rxringtail) &0xfff); 2504 lastlen=((*priv->rxringtail) &0xfff);
2505 2505
2506 /* if the last descriptor (that should 2506 /* if the last descriptor (that should
2507 * tell us the total packet len) tell 2507 * tell us the total packet len) tell
2508 * us something less than the descriptors 2508 * us something less than the descriptors
2509 * len we had until now, then there is some 2509 * len we had until now, then there is some
2510 * problem.. 2510 * problem..
2511 * workaround to prevent kernel panic 2511 * workaround to prevent kernel panic
2512 */ 2512 */
2513 if(lastlen < priv->rx_prevlen) 2513 if(lastlen < priv->rx_prevlen)
2514 len=0; 2514 len=0;
2515 else 2515 else
2516 len=lastlen-priv->rx_prevlen; 2516 len=lastlen-priv->rx_prevlen;
2517 2517
2518 if(*(priv->rxringtail) & (1<<13)) { 2518 if(*(priv->rxringtail) & (1<<13)) {
2519 //lastlen=((*priv->rxringtail) &0xfff); 2519 //lastlen=((*priv->rxringtail) &0xfff);
2520 if ((*(priv->rxringtail) & 0xfff) <500) 2520 if ((*(priv->rxringtail) & 0xfff) <500)
2521 priv->stats.rxcrcerrmin++; 2521 priv->stats.rxcrcerrmin++;
2522 else if ((*(priv->rxringtail) & 0x0fff) >1000) 2522 else if ((*(priv->rxringtail) & 0x0fff) >1000)
2523 priv->stats.rxcrcerrmax++; 2523 priv->stats.rxcrcerrmax++;
2524 else 2524 else
2525 priv->stats.rxcrcerrmid++; 2525 priv->stats.rxcrcerrmid++;
2526 2526
2527 } 2527 }
2528 2528
2529 }else{ 2529 }else{
2530 len = priv->rxbuffersize; 2530 len = priv->rxbuffersize;
2531 } 2531 }
2532 2532
2533 #ifdef CONFIG_RTL8185B 2533 #ifdef CONFIG_RTL8185B
2534 if(first && last) { 2534 if(first && last) {
2535 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26; 2535 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2536 }else if(first) { 2536 }else if(first) {
2537 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26; 2537 padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
2538 if(padding) { 2538 if(padding) {
2539 len -= 2; 2539 len -= 2;
2540 } 2540 }
2541 }else { 2541 }else {
2542 padding = 0; 2542 padding = 0;
2543 } 2543 }
2544 #ifdef CONFIG_RTL818X_S 2544 #ifdef CONFIG_RTL818X_S
2545 padding = 0; 2545 padding = 0;
2546 #endif 2546 #endif
2547 #endif 2547 #endif
2548 priv->rx_prevlen+=len; 2548 priv->rx_prevlen+=len;
2549 2549
2550 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){ 2550 if(priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100){
2551 /* HW is probably passing several buggy frames 2551 /* HW is probably passing several buggy frames
2552 * without FD or LD flag set. 2552 * without FD or LD flag set.
2553 * Throw this garbage away to prevent skb 2553 * Throw this garbage away to prevent skb
2554 * memory exausting 2554 * memory exausting
2555 */ 2555 */
2556 if(!priv->rx_skb_complete) 2556 if(!priv->rx_skb_complete)
2557 dev_kfree_skb_any(priv->rx_skb); 2557 dev_kfree_skb_any(priv->rx_skb);
2558 priv->rx_skb_complete = 1; 2558 priv->rx_skb_complete = 1;
2559 } 2559 }
2560 2560
2561 #ifdef DEBUG_RX_FRAG 2561 #ifdef DEBUG_RX_FRAG
2562 DMESG("Iteration.. len %x",len); 2562 DMESG("Iteration.. len %x",len);
2563 if(first) DMESG ("First descriptor"); 2563 if(first) DMESG ("First descriptor");
2564 if(last) DMESG("Last descriptor"); 2564 if(last) DMESG("Last descriptor");
2565 2565
2566 #endif 2566 #endif
2567 #ifdef DEBUG_RX_VERBOSE 2567 #ifdef DEBUG_RX_VERBOSE
2568 print_buffer( priv->rxbuffer->buf, len); 2568 print_buffer( priv->rxbuffer->buf, len);
2569 #endif 2569 #endif
2570 2570
2571 #ifdef CONFIG_RTL8185B 2571 #ifdef CONFIG_RTL8185B
2572 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16); 2572 signal=(unsigned char)(((*(priv->rxringtail+3))& (0x00ff0000))>>16);
2573 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6 2573 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
2574 2574
2575 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff)); 2575 quality=(unsigned char)((*(priv->rxringtail+3)) & (0xff));
2576 2576
2577 stats.mac_time[0] = *(priv->rxringtail+1); 2577 stats.mac_time[0] = *(priv->rxringtail+1);
2578 stats.mac_time[1] = *(priv->rxringtail+2); 2578 stats.mac_time[1] = *(priv->rxringtail+2);
2579 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42; 2579 rxpower =((char)(((*(priv->rxringtail+4))& (0x00ff0000))>>16))/2 - 42;
2580 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f); 2580 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>> 8)) & (0x7f);
2581 2581
2582 #else 2582 #else
2583 signal=((*(priv->rxringtail+1))& (0xff0000))>>16; 2583 signal=((*(priv->rxringtail+1))& (0xff0000))>>16;
2584 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6 2584 signal=(signal&0xfe)>>1; // Modify by hikaru 6.6
2585 2585
2586 quality=((*(priv->rxringtail+1)) & (0xff)); 2586 quality=((*(priv->rxringtail+1)) & (0xff));
2587 2587
2588 stats.mac_time[0] = *(priv->rxringtail+2); 2588 stats.mac_time[0] = *(priv->rxringtail+2);
2589 stats.mac_time[1] = *(priv->rxringtail+3); 2589 stats.mac_time[1] = *(priv->rxringtail+3);
2590 #endif 2590 #endif
2591 rate=((*(priv->rxringtail)) & 2591 rate=((*(priv->rxringtail)) &
2592 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20; 2592 ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
2593 2593
2594 stats.rate = rtl8180_rate2rate(rate); 2594 stats.rate = rtl8180_rate2rate(rate);
2595 //DMESG("%d",rate); 2595 //DMESG("%d",rate);
2596 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ; 2596 Antenna = (((*(priv->rxringtail +3))& (0x00008000)) == 0 )? 0:1 ;
2597 // printk("in rtl8180_rx():Antenna is %d\n",Antenna); 2597 // printk("in rtl8180_rx():Antenna is %d\n",Antenna);
2598 //by amy for antenna 2598 //by amy for antenna
2599 if(!rtl8180_IsWirelessBMode(stats.rate)) 2599 if(!rtl8180_IsWirelessBMode(stats.rate))
2600 { // OFDM rate. 2600 { // OFDM rate.
2601 2601
2602 RxAGC_dBm = rxpower+1; //bias 2602 RxAGC_dBm = rxpower+1; //bias
2603 } 2603 }
2604 else 2604 else
2605 { // CCK rate. 2605 { // CCK rate.
2606 RxAGC_dBm = signal;//bit 0 discard 2606 RxAGC_dBm = signal;//bit 0 discard
2607 2607
2608 LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5 2608 LNA = (u8) (RxAGC_dBm & 0x60 ) >> 5 ; //bit 6~ bit 5
2609 BB = (u8) (RxAGC_dBm & 0x1F); // bit 4 ~ bit 0 2609 BB = (u8) (RxAGC_dBm & 0x1F); // bit 4 ~ bit 0
2610 2610
2611 RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm) 2611 RxAGC_dBm = -( LNA_gain[LNA] + (BB *2) ); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
2612 2612
2613 RxAGC_dBm +=4; //bias 2613 RxAGC_dBm +=4; //bias
2614 } 2614 }
2615 2615
2616 if(RxAGC_dBm & 0x80) //absolute value 2616 if(RxAGC_dBm & 0x80) //absolute value
2617 RXAGC= ~(RxAGC_dBm)+1; 2617 RXAGC= ~(RxAGC_dBm)+1;
2618 bCckRate = rtl8180_IsWirelessBMode(stats.rate); 2618 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
2619 // Translate RXAGC into 1-100. 2619 // Translate RXAGC into 1-100.
2620 if(!rtl8180_IsWirelessBMode(stats.rate)) 2620 if(!rtl8180_IsWirelessBMode(stats.rate))
2621 { // OFDM rate. 2621 { // OFDM rate.
2622 if(RXAGC>90) 2622 if(RXAGC>90)
2623 RXAGC=90; 2623 RXAGC=90;
2624 else if(RXAGC<25) 2624 else if(RXAGC<25)
2625 RXAGC=25; 2625 RXAGC=25;
2626 RXAGC=(90-RXAGC)*100/65; 2626 RXAGC=(90-RXAGC)*100/65;
2627 } 2627 }
2628 else 2628 else
2629 { // CCK rate. 2629 { // CCK rate.
2630 if(RXAGC>95) 2630 if(RXAGC>95)
2631 RXAGC=95; 2631 RXAGC=95;
2632 else if(RXAGC<30) 2632 else if(RXAGC<30)
2633 RXAGC=30; 2633 RXAGC=30;
2634 RXAGC=(95-RXAGC)*100/65; 2634 RXAGC=(95-RXAGC)*100/65;
2635 } 2635 }
2636 priv->SignalStrength = (u8)RXAGC; 2636 priv->SignalStrength = (u8)RXAGC;
2637 priv->RecvSignalPower = RxAGC_dBm ; // It can use directly by SD3 CMLin 2637 priv->RecvSignalPower = RxAGC_dBm ; // It can use directly by SD3 CMLin
2638 priv->RxPower = rxpower; 2638 priv->RxPower = rxpower;
2639 priv->RSSI = RSSI; 2639 priv->RSSI = RSSI;
2640 //{by amy 080312 2640 //{by amy 080312
2641 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko. 2641 // SQ translation formular is provided by SD3 DZ. 2006.06.27, by rcnjko.
2642 if(quality >= 127) 2642 if(quality >= 127)
2643 quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now; 2643 quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
2644 else if(quality < 27) 2644 else if(quality < 27)
2645 quality = 100; 2645 quality = 100;
2646 else 2646 else
2647 quality = 127 - quality; 2647 quality = 127 - quality;
2648 priv->SignalQuality = quality; 2648 priv->SignalQuality = quality;
2649 if(!priv->card_8185) 2649 if(!priv->card_8185)
2650 printk("check your card type\n"); 2650 printk("check your card type\n");
2651 2651
2652 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength; 2652 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
2653 stats.signalstrength = RXAGC; 2653 stats.signalstrength = RXAGC;
2654 if(stats.signalstrength > 100) 2654 if(stats.signalstrength > 100)
2655 stats.signalstrength = 100; 2655 stats.signalstrength = 100;
2656 stats.signalstrength = (stats.signalstrength * 70)/100 + 30; 2656 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
2657 // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); 2657 // printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
2658 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality; 2658 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
2659 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual; 2659 stats.noise = priv->wstats.qual.noise = 100 - priv ->wstats.qual.qual;
2660 //by amy 080312} 2660 //by amy 080312}
2661 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 ) 2661 bHwError = (((*(priv->rxringtail))& (0x00000fff)) == 4080)| (((*(priv->rxringtail))& (0x04000000)) != 0 )
2662 | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 ); 2662 | (((*(priv->rxringtail))& (0x08000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x10000000)) != 0 )| (((~(*(priv->rxringtail)))& (0x20000000)) != 0 );
2663 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13; 2663 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
2664 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12; 2664 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
2665 hdr = (struct ieee80211_hdr *)priv->rxbuffer->buf; 2665 hdr = (struct ieee80211_hdr *)priv->rxbuffer->buf;
2666 fc = le16_to_cpu(hdr->frame_ctl); 2666 fc = le16_to_cpu(hdr->frame_ctl);
2667 type = WLAN_FC_GET_TYPE(fc); 2667 type = WLAN_FC_GET_TYPE(fc);
2668 2668
2669 if((IEEE80211_FTYPE_CTL != type) && 2669 if((IEEE80211_FTYPE_CTL != type) &&
2670 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3)) 2670 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS)? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS )? hdr->addr2 : hdr->addr3))
2671 && (!bHwError) && (!bCRC)&& (!bICV)) 2671 && (!bHwError) && (!bCRC)&& (!bICV))
2672 { 2672 {
2673 //by amy 080312 2673 //by amy 080312
2674 // Perform signal smoothing for dynamic mechanism on demand. 2674 // Perform signal smoothing for dynamic mechanism on demand.
2675 // This is different with PerformSignalSmoothing8185 in smoothing fomula. 2675 // This is different with PerformSignalSmoothing8185 in smoothing fomula.
2676 // No dramatic adjustion is apply because dynamic mechanism need some degree 2676 // No dramatic adjustion is apply because dynamic mechanism need some degree
2677 // of correctness. 2007.01.23, by shien chang. 2677 // of correctness. 2007.01.23, by shien chang.
2678 PerformUndecoratedSignalSmoothing8185(priv,bCckRate); 2678 PerformUndecoratedSignalSmoothing8185(priv,bCckRate);
2679 // 2679 //
2680 // For good-looking singal strength. 2680 // For good-looking singal strength.
2681 // 2681 //
2682 SignalStrengthIndex = NetgearSignalStrengthTranslate( 2682 SignalStrengthIndex = NetgearSignalStrengthTranslate(
2683 priv->LastSignalStrengthInPercent, 2683 priv->LastSignalStrengthInPercent,
2684 priv->SignalStrength); 2684 priv->SignalStrength);
2685 2685
2686 priv->LastSignalStrengthInPercent = SignalStrengthIndex; 2686 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
2687 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex); 2687 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
2688 // 2688 //
2689 // We need more correct power of received packets and the "SignalStrength" of RxStats is beautified, 2689 // We need more correct power of received packets and the "SignalStrength" of RxStats is beautified,
2690 // so we record the correct power here. 2690 // so we record the correct power here.
2691 // 2691 //
2692 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6; 2692 priv->Stats_SignalQuality =(long) (priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
2693 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6; 2693 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower -1) / 6;
2694 2694
2695 // Figure out which antenna that received the lasted packet. 2695 // Figure out which antenna that received the lasted packet.
2696 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main. 2696 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
2697 //by amy 080312 2697 //by amy 080312
2698 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength); 2698 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
2699 } 2699 }
2700 2700
2701 //by amy for antenna 2701 //by amy for antenna
2702 2702
2703 2703
2704 2704
2705 2705
2706 2706
2707 2707
2708 #ifndef DUMMY_RX 2708 #ifndef DUMMY_RX
2709 if(first){ 2709 if(first){
2710 if(!priv->rx_skb_complete){ 2710 if(!priv->rx_skb_complete){
2711 /* seems that HW sometimes fails to reiceve and 2711 /* seems that HW sometimes fails to reiceve and
2712 doesn't provide the last descriptor */ 2712 doesn't provide the last descriptor */
2713 #ifdef DEBUG_RX_SKB 2713 #ifdef DEBUG_RX_SKB
2714 DMESG("going to free incomplete skb"); 2714 DMESG("going to free incomplete skb");
2715 #endif 2715 #endif
2716 dev_kfree_skb_any(priv->rx_skb); 2716 dev_kfree_skb_any(priv->rx_skb);
2717 priv->stats.rxnolast++; 2717 priv->stats.rxnolast++;
2718 #ifdef DEBUG_RX_SKB 2718 #ifdef DEBUG_RX_SKB
2719 DMESG("free incomplete skb OK"); 2719 DMESG("free incomplete skb OK");
2720 #endif 2720 #endif
2721 } 2721 }
2722 /* support for prism header has been originally added by Christian */ 2722 /* support for prism header has been originally added by Christian */
2723 if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){ 2723 if(priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR){
2724 2724
2725 #if 0 2725 #if 0
2726 priv->rx_skb = dev_alloc_skb(len+2+PRISM_HDR_SIZE); 2726 priv->rx_skb = dev_alloc_skb(len+2+PRISM_HDR_SIZE);
2727 if(! priv->rx_skb) goto drop; 2727 if(! priv->rx_skb) goto drop;
2728 2728
2729 prism_hdr = (u32*) skb_put(priv->rx_skb,PRISM_HDR_SIZE); 2729 prism_hdr = (u32*) skb_put(priv->rx_skb,PRISM_HDR_SIZE);
2730 prism_hdr[0]=htonl(0x80211001); //version 2730 prism_hdr[0]=htonl(0x80211001); //version
2731 prism_hdr[1]=htonl(0x40); //length 2731 prism_hdr[1]=htonl(0x40); //length
2732 prism_hdr[2]=htonl(stats.mac_time[1]); //mactime (HIGH) 2732 prism_hdr[2]=htonl(stats.mac_time[1]); //mactime (HIGH)
2733 prism_hdr[3]=htonl(stats.mac_time[0]); //mactime (LOW) 2733 prism_hdr[3]=htonl(stats.mac_time[0]); //mactime (LOW)
2734 rdtsc(prism_hdr[5], prism_hdr[4]); //hostime (LOW+HIGH) 2734 rdtsc(prism_hdr[5], prism_hdr[4]); //hostime (LOW+HIGH)
2735 prism_hdr[4]=htonl(prism_hdr[4]); //Byte-Order aendern 2735 prism_hdr[4]=htonl(prism_hdr[4]); //Byte-Order aendern
2736 prism_hdr[5]=htonl(prism_hdr[5]); //Byte-Order aendern 2736 prism_hdr[5]=htonl(prism_hdr[5]); //Byte-Order aendern
2737 prism_hdr[6]=0x00; //phytype 2737 prism_hdr[6]=0x00; //phytype
2738 prism_hdr[7]=htonl(priv->chan); //channel 2738 prism_hdr[7]=htonl(priv->chan); //channel
2739 prism_hdr[8]=htonl(stats.rate); //datarate 2739 prism_hdr[8]=htonl(stats.rate); //datarate
2740 prism_hdr[9]=0x00; //antenna 2740 prism_hdr[9]=0x00; //antenna
2741 prism_hdr[10]=0x00; //priority 2741 prism_hdr[10]=0x00; //priority
2742 prism_hdr[11]=0x00; //ssi_type 2742 prism_hdr[11]=0x00; //ssi_type
2743 prism_hdr[12]=htonl(stats.signal); //ssi_signal 2743 prism_hdr[12]=htonl(stats.signal); //ssi_signal
2744 prism_hdr[13]=htonl(stats.noise); //ssi_noise 2744 prism_hdr[13]=htonl(stats.noise); //ssi_noise
2745 prism_hdr[14]=0x00; //preamble 2745 prism_hdr[14]=0x00; //preamble
2746 prism_hdr[15]=0x00; //encoding 2746 prism_hdr[15]=0x00; //encoding
2747 2747
2748 #endif 2748 #endif
2749 }else{ 2749 }else{
2750 priv->rx_skb = dev_alloc_skb(len+2); 2750 priv->rx_skb = dev_alloc_skb(len+2);
2751 if( !priv->rx_skb) goto drop; 2751 if( !priv->rx_skb) goto drop;
2752 #ifdef DEBUG_RX_SKB 2752 #ifdef DEBUG_RX_SKB
2753 DMESG("Alloc initial skb %x",len+2); 2753 DMESG("Alloc initial skb %x",len+2);
2754 #endif 2754 #endif
2755 } 2755 }
2756 2756
2757 priv->rx_skb_complete=0; 2757 priv->rx_skb_complete=0;
2758 priv->rx_skb->dev=dev; 2758 priv->rx_skb->dev=dev;
2759 }else{ 2759 }else{
2760 /* if we are here we should have already RXed 2760 /* if we are here we should have already RXed
2761 * the first frame. 2761 * the first frame.
2762 * If we get here and the skb is not allocated then 2762 * If we get here and the skb is not allocated then
2763 * we have just throw out garbage (skb not allocated) 2763 * we have just throw out garbage (skb not allocated)
2764 * and we are still rxing garbage.... 2764 * and we are still rxing garbage....
2765 */ 2765 */
2766 if(!priv->rx_skb_complete){ 2766 if(!priv->rx_skb_complete){
2767 2767
2768 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2); 2768 tmp_skb= dev_alloc_skb(priv->rx_skb->len +len+2);
2769 2769
2770 if(!tmp_skb) goto drop; 2770 if(!tmp_skb) goto drop;
2771 2771
2772 tmp_skb->dev=dev; 2772 tmp_skb->dev=dev;
2773 #ifdef DEBUG_RX_SKB 2773 #ifdef DEBUG_RX_SKB
2774 DMESG("Realloc skb %x",len+2); 2774 DMESG("Realloc skb %x",len+2);
2775 #endif 2775 #endif
2776 2776
2777 #ifdef DEBUG_RX_SKB 2777 #ifdef DEBUG_RX_SKB
2778 DMESG("going copy prev frag %x",priv->rx_skb->len); 2778 DMESG("going copy prev frag %x",priv->rx_skb->len);
2779 #endif 2779 #endif
2780 memcpy(skb_put(tmp_skb,priv->rx_skb->len), 2780 memcpy(skb_put(tmp_skb,priv->rx_skb->len),
2781 priv->rx_skb->data, 2781 priv->rx_skb->data,
2782 priv->rx_skb->len); 2782 priv->rx_skb->len);
2783 #ifdef DEBUG_RX_SKB 2783 #ifdef DEBUG_RX_SKB
2784 DMESG("skb copy prev frag complete"); 2784 DMESG("skb copy prev frag complete");
2785 #endif 2785 #endif
2786 2786
2787 dev_kfree_skb_any(priv->rx_skb); 2787 dev_kfree_skb_any(priv->rx_skb);
2788 #ifdef DEBUG_RX_SKB 2788 #ifdef DEBUG_RX_SKB
2789 DMESG("prev skb free ok"); 2789 DMESG("prev skb free ok");
2790 #endif 2790 #endif
2791 2791
2792 priv->rx_skb=tmp_skb; 2792 priv->rx_skb=tmp_skb;
2793 } 2793 }
2794 } 2794 }
2795 #ifdef DEBUG_RX_SKB 2795 #ifdef DEBUG_RX_SKB
2796 DMESG("going to copy current payload %x",len); 2796 DMESG("going to copy current payload %x",len);
2797 #endif 2797 #endif
2798 if(!priv->rx_skb_complete) { 2798 if(!priv->rx_skb_complete) {
2799 #ifdef CONFIG_RTL8185B 2799 #ifdef CONFIG_RTL8185B
2800 if(padding) { 2800 if(padding) {
2801 memcpy(skb_put(priv->rx_skb,len), 2801 memcpy(skb_put(priv->rx_skb,len),
2802 (((unsigned char *)priv->rxbuffer->buf) + 2),len); 2802 (((unsigned char *)priv->rxbuffer->buf) + 2),len);
2803 } else { 2803 } else {
2804 #endif 2804 #endif
2805 memcpy(skb_put(priv->rx_skb,len), 2805 memcpy(skb_put(priv->rx_skb,len),
2806 priv->rxbuffer->buf,len); 2806 priv->rxbuffer->buf,len);
2807 #ifdef CONFIG_RTL8185B 2807 #ifdef CONFIG_RTL8185B
2808 } 2808 }
2809 #endif 2809 #endif
2810 } 2810 }
2811 #ifdef DEBUG_RX_SKB 2811 #ifdef DEBUG_RX_SKB
2812 DMESG("current fragment skb copy complete"); 2812 DMESG("current fragment skb copy complete");
2813 #endif 2813 #endif
2814 2814
2815 if(last && !priv->rx_skb_complete){ 2815 if(last && !priv->rx_skb_complete){
2816 2816
2817 #ifdef DEBUG_RX_SKB 2817 #ifdef DEBUG_RX_SKB
2818 DMESG("Got last fragment"); 2818 DMESG("Got last fragment");
2819 #endif 2819 #endif
2820 2820
2821 if(priv->rx_skb->len > 4) 2821 if(priv->rx_skb->len > 4)
2822 skb_trim(priv->rx_skb,priv->rx_skb->len-4); 2822 skb_trim(priv->rx_skb,priv->rx_skb->len-4);
2823 #ifdef DEBUG_RX_SKB 2823 #ifdef DEBUG_RX_SKB
2824 DMESG("yanked out crc, passing to the upper layer"); 2824 DMESG("yanked out crc, passing to the upper layer");
2825 #endif 2825 #endif
2826 2826
2827 #ifndef RX_DONT_PASS_UL 2827 #ifndef RX_DONT_PASS_UL
2828 if(!ieee80211_rx(priv->ieee80211, 2828 if(!ieee80211_rx(priv->ieee80211,
2829 priv->rx_skb, &stats)){ 2829 priv->rx_skb, &stats)){
2830 #ifdef DEBUG_RX 2830 #ifdef DEBUG_RX
2831 DMESGW("Packet not consumed"); 2831 DMESGW("Packet not consumed");
2832 #endif 2832 #endif
2833 #endif // RX_DONT_PASS_UL 2833 #endif // RX_DONT_PASS_UL
2834 2834
2835 dev_kfree_skb_any(priv->rx_skb); 2835 dev_kfree_skb_any(priv->rx_skb);
2836 #ifndef RX_DONT_PASS_UL 2836 #ifndef RX_DONT_PASS_UL
2837 } 2837 }
2838 #endif 2838 #endif
2839 #ifdef DEBUG_RX 2839 #ifdef DEBUG_RX
2840 else{ 2840 else{
2841 DMESG("Rcv frag"); 2841 DMESG("Rcv frag");
2842 } 2842 }
2843 #endif 2843 #endif
2844 priv->rx_skb_complete=1; 2844 priv->rx_skb_complete=1;
2845 } 2845 }
2846 2846
2847 #endif //DUMMY_RX 2847 #endif //DUMMY_RX
2848 2848
2849 pci_dma_sync_single_for_device(priv->pdev, 2849 pci_dma_sync_single_for_device(priv->pdev,
2850 priv->rxbuffer->dma, 2850 priv->rxbuffer->dma,
2851 priv->rxbuffersize * \ 2851 priv->rxbuffersize * \
2852 sizeof(u8), 2852 sizeof(u8),
2853 PCI_DMA_FROMDEVICE); 2853 PCI_DMA_FROMDEVICE);
2854 2854
2855 2855
2856 drop: // this is used when we have not enought mem 2856 drop: // this is used when we have not enought mem
2857 2857
2858 /* restore the descriptor */ 2858 /* restore the descriptor */
2859 *(priv->rxringtail+2)=priv->rxbuffer->dma; 2859 *(priv->rxringtail+2)=priv->rxbuffer->dma;
2860 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff; 2860 *(priv->rxringtail)=*(priv->rxringtail) &~ 0xfff;
2861 *(priv->rxringtail)= 2861 *(priv->rxringtail)=
2862 *(priv->rxringtail) | priv->rxbuffersize; 2862 *(priv->rxringtail) | priv->rxbuffersize;
2863 2863
2864 *(priv->rxringtail)= 2864 *(priv->rxringtail)=
2865 *(priv->rxringtail) | (1<<31); 2865 *(priv->rxringtail) | (1<<31);
2866 //^empty descriptor 2866 //^empty descriptor
2867 2867
2868 //wmb(); 2868 //wmb();
2869 2869
2870 #ifdef DEBUG_RX 2870 #ifdef DEBUG_RX
2871 DMESG("Current descriptor: %x",(u32)priv->rxringtail); 2871 DMESG("Current descriptor: %x",(u32)priv->rxringtail);
2872 #endif 2872 #endif
2873 //unsigned long flags; 2873 //unsigned long flags;
2874 //spin_lock_irqsave(&priv->irq_lock,flags); 2874 //spin_lock_irqsave(&priv->irq_lock,flags);
2875 2875
2876 priv->rxringtail+=rx_desc_size; 2876 priv->rxringtail+=rx_desc_size;
2877 if(priv->rxringtail >= 2877 if(priv->rxringtail >=
2878 (priv->rxring)+(priv->rxringcount )*rx_desc_size) 2878 (priv->rxring)+(priv->rxringcount )*rx_desc_size)
2879 priv->rxringtail=priv->rxring; 2879 priv->rxringtail=priv->rxring;
2880 2880
2881 //spin_unlock_irqrestore(&priv->irq_lock,flags); 2881 //spin_unlock_irqrestore(&priv->irq_lock,flags);
2882 2882
2883 2883
2884 priv->rxbuffer=(priv->rxbuffer->next); 2884 priv->rxbuffer=(priv->rxbuffer->next);
2885 2885
2886 } 2886 }
2887 2887
2888 2888
2889 2889
2890 // if(get_curr_tx_free_desc(dev,priority)) 2890 // if(get_curr_tx_free_desc(dev,priority))
2891 // ieee80211_sta_ps_sleep(priv->ieee80211, &tmp, &tmp2); 2891 // ieee80211_sta_ps_sleep(priv->ieee80211, &tmp, &tmp2);
2892 2892
2893 2893
2894 2894
2895 } 2895 }
2896 2896
2897 2897
2898 void rtl8180_dma_kick(struct net_device *dev, int priority) 2898 void rtl8180_dma_kick(struct net_device *dev, int priority)
2899 { 2899 {
2900 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 2900 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2901 2901
2902 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 2902 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2903 /* 2903 /*
2904 2904
2905 switch(priority){ 2905 switch(priority){
2906 2906
2907 case LOW_PRIORITY: 2907 case LOW_PRIORITY:
2908 2908
2909 write_nic_byte(dev,TX_DMA_POLLING, 2909 write_nic_byte(dev,TX_DMA_POLLING,
2910 (1<< TX_DMA_POLLING_LOWPRIORITY_SHIFT) | 2910 (1<< TX_DMA_POLLING_LOWPRIORITY_SHIFT) |
2911 priv->dma_poll_mask); 2911 priv->dma_poll_mask);
2912 break; 2912 break;
2913 2913
2914 case NORM_PRIORITY: 2914 case NORM_PRIORITY:
2915 2915
2916 write_nic_byte(dev,TX_DMA_POLLING, 2916 write_nic_byte(dev,TX_DMA_POLLING,
2917 (1<< TX_DMA_POLLING_NORMPRIORITY_SHIFT) | 2917 (1<< TX_DMA_POLLING_NORMPRIORITY_SHIFT) |
2918 priv->dma_poll_mask); 2918 priv->dma_poll_mask);
2919 break; 2919 break;
2920 2920
2921 case HI_PRIORITY: 2921 case HI_PRIORITY:
2922 2922
2923 write_nic_byte(dev,TX_DMA_POLLING, 2923 write_nic_byte(dev,TX_DMA_POLLING,
2924 (1<< TX_DMA_POLLING_HIPRIORITY_SHIFT) | 2924 (1<< TX_DMA_POLLING_HIPRIORITY_SHIFT) |
2925 priv->dma_poll_mask); 2925 priv->dma_poll_mask);
2926 break; 2926 break;
2927 2927
2928 } 2928 }
2929 */ 2929 */
2930 write_nic_byte(dev, TX_DMA_POLLING, 2930 write_nic_byte(dev, TX_DMA_POLLING,
2931 (1 << (priority + 1)) | priv->dma_poll_mask); 2931 (1 << (priority + 1)) | priv->dma_poll_mask);
2932 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 2932 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2933 2933
2934 force_pci_posting(dev); 2934 force_pci_posting(dev);
2935 } 2935 }
2936 2936
2937 #if 0 2937 #if 0
2938 void rtl8180_tx_queues_stop(struct net_device *dev) 2938 void rtl8180_tx_queues_stop(struct net_device *dev)
2939 { 2939 {
2940 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 2940 //struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2941 u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT); 2941 u8 dma_poll_mask = (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2942 dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT); 2942 dma_poll_mask |= (1<<TX_DMA_STOP_HIPRIORITY_SHIFT);
2943 dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT); 2943 dma_poll_mask |= (1<<TX_DMA_STOP_NORMPRIORITY_SHIFT);
2944 dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT); 2944 dma_poll_mask |= (1<<TX_DMA_STOP_BEACON_SHIFT);
2945 2945
2946 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 2946 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2947 write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask); 2947 write_nic_byte(dev,TX_DMA_POLLING,dma_poll_mask);
2948 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 2948 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2949 } 2949 }
2950 #endif 2950 #endif
2951 2951
2952 void rtl8180_data_hard_stop(struct net_device *dev) 2952 void rtl8180_data_hard_stop(struct net_device *dev)
2953 { 2953 {
2954 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 2954 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2955 2955
2956 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 2956 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2957 #ifdef CONFIG_RTL8185B 2957 #ifdef CONFIG_RTL8185B
2958 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ; 2958 priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
2959 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask); 2959 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2960 #else 2960 #else
2961 priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT); 2961 priv->dma_poll_mask |= (1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2962 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask); 2962 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2963 #endif 2963 #endif
2964 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 2964 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2965 } 2965 }
2966 2966
2967 2967
2968 void rtl8180_data_hard_resume(struct net_device *dev) 2968 void rtl8180_data_hard_resume(struct net_device *dev)
2969 { 2969 {
2970 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 2970 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2971 2971
2972 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 2972 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
2973 #ifdef CONFIG_RTL8185B 2973 #ifdef CONFIG_RTL8185B
2974 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ); 2974 priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
2975 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask); 2975 write_nic_byte(dev,TPPollStop, priv->dma_poll_stop_mask);
2976 #else 2976 #else
2977 priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT); 2977 priv->dma_poll_mask &= ~(1<<TX_DMA_STOP_LOWPRIORITY_SHIFT);
2978 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask); 2978 write_nic_byte(dev,TX_DMA_POLLING,priv->dma_poll_mask);
2979 #endif 2979 #endif
2980 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 2980 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
2981 } 2981 }
2982 2982
2983 2983
2984 /* this function TX data frames when the ieee80211 stack requires this. 2984 /* this function TX data frames when the ieee80211 stack requires this.
2985 * It checks also if we need to stop the ieee tx queue, eventually do it 2985 * It checks also if we need to stop the ieee tx queue, eventually do it
2986 */ 2986 */
2987 void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int 2987 void rtl8180_hard_data_xmit(struct sk_buff *skb,struct net_device *dev, int
2988 rate) 2988 rate)
2989 { 2989 {
2990 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 2990 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
2991 int mode; 2991 int mode;
2992 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data; 2992 struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
2993 short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS; 2993 short morefrag = (h->frame_ctl) & IEEE80211_FCTL_MOREFRAGS;
2994 unsigned long flags; 2994 unsigned long flags;
2995 int priority; 2995 int priority;
2996 //static int count = 0; 2996 //static int count = 0;
2997 2997
2998 mode = priv->ieee80211->iw_mode; 2998 mode = priv->ieee80211->iw_mode;
2999 2999
3000 rate = ieeerate2rtlrate(rate); 3000 rate = ieeerate2rtlrate(rate);
3001 /* 3001 /*
3002 * This function doesn't require lock because we make 3002 * This function doesn't require lock because we make
3003 * sure it's called with the tx_lock already acquired. 3003 * sure it's called with the tx_lock already acquired.
3004 * this come from the kernel's hard_xmit callback (trought 3004 * this come from the kernel's hard_xmit callback (trought
3005 * the ieee stack, or from the try_wake_queue (again trought 3005 * the ieee stack, or from the try_wake_queue (again trought
3006 * the ieee stack. 3006 * the ieee stack.
3007 */ 3007 */
3008 #ifdef CONFIG_RTL8185B 3008 #ifdef CONFIG_RTL8185B
3009 priority = AC2Q(skb->priority); 3009 priority = AC2Q(skb->priority);
3010 #else 3010 #else
3011 priority = LOW_PRIORITY; 3011 priority = LOW_PRIORITY;
3012 #endif 3012 #endif
3013 spin_lock_irqsave(&priv->tx_lock,flags); 3013 spin_lock_irqsave(&priv->tx_lock,flags);
3014 3014
3015 if(priv->ieee80211->bHwRadioOff) 3015 if(priv->ieee80211->bHwRadioOff)
3016 { 3016 {
3017 spin_unlock_irqrestore(&priv->tx_lock,flags); 3017 spin_unlock_irqrestore(&priv->tx_lock,flags);
3018 3018
3019 return; 3019 return;
3020 } 3020 }
3021 3021
3022 //printk(KERN_WARNING "priority = %d@%d\n", priority, count++); 3022 //printk(KERN_WARNING "priority = %d@%d\n", priority, count++);
3023 if (!check_nic_enought_desc(dev, priority)){ 3023 if (!check_nic_enought_desc(dev, priority)){
3024 //DMESG("Error: no descriptor left by previous TX (avail %d) ", 3024 //DMESG("Error: no descriptor left by previous TX (avail %d) ",
3025 // get_curr_tx_free_desc(dev, priority)); 3025 // get_curr_tx_free_desc(dev, priority));
3026 DMESGW("Error: no descriptor left by previous TX (avail %d) ", 3026 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
3027 get_curr_tx_free_desc(dev, priority)); 3027 get_curr_tx_free_desc(dev, priority));
3028 //printk(KERN_WARNING "==============================================================> \n"); 3028 //printk(KERN_WARNING "==============================================================> \n");
3029 ieee80211_stop_queue(priv->ieee80211); 3029 ieee80211_stop_queue(priv->ieee80211);
3030 } 3030 }
3031 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate); 3031 rtl8180_tx(dev, skb->data, skb->len, priority, morefrag,0,rate);
3032 if (!check_nic_enought_desc(dev, priority)) 3032 if (!check_nic_enought_desc(dev, priority))
3033 ieee80211_stop_queue(priv->ieee80211); 3033 ieee80211_stop_queue(priv->ieee80211);
3034 3034
3035 //dev_kfree_skb_any(skb); 3035 //dev_kfree_skb_any(skb);
3036 spin_unlock_irqrestore(&priv->tx_lock,flags); 3036 spin_unlock_irqrestore(&priv->tx_lock,flags);
3037 3037
3038 } 3038 }
3039 3039
3040 /* This is a rough attempt to TX a frame 3040 /* This is a rough attempt to TX a frame
3041 * This is called by the ieee 80211 stack to TX management frames. 3041 * This is called by the ieee 80211 stack to TX management frames.
3042 * If the ring is full packet are dropped (for data frame the queue 3042 * If the ring is full packet are dropped (for data frame the queue
3043 * is stopped before this can happen). For this reason it is better 3043 * is stopped before this can happen). For this reason it is better
3044 * if the descriptors are larger than the largest management frame 3044 * if the descriptors are larger than the largest management frame
3045 * we intend to TX: i'm unsure what the HW does if it will not found 3045 * we intend to TX: i'm unsure what the HW does if it will not found
3046 * the last fragment of a frame because it has been dropped... 3046 * the last fragment of a frame because it has been dropped...
3047 * Since queues for Management and Data frames are different we 3047 * Since queues for Management and Data frames are different we
3048 * might use a different lock than tx_lock (for example mgmt_tx_lock) 3048 * might use a different lock than tx_lock (for example mgmt_tx_lock)
3049 */ 3049 */
3050 /* these function may loops if invoked with 0 descriptors or 0 len buffer*/ 3050 /* these function may loops if invoked with 0 descriptors or 0 len buffer*/
3051 int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev) 3051 int rtl8180_hard_start_xmit(struct sk_buff *skb,struct net_device *dev)
3052 { 3052 {
3053 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 3053 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3054 3054
3055 unsigned long flags; 3055 unsigned long flags;
3056 3056
3057 int priority; 3057 int priority;
3058 3058
3059 #ifdef CONFIG_RTL8185B 3059 #ifdef CONFIG_RTL8185B
3060 priority = MANAGE_PRIORITY; 3060 priority = MANAGE_PRIORITY;
3061 #else 3061 #else
3062 priority = NORM_PRIORITY; 3062 priority = NORM_PRIORITY;
3063 #endif 3063 #endif
3064 3064
3065 spin_lock_irqsave(&priv->tx_lock,flags); 3065 spin_lock_irqsave(&priv->tx_lock,flags);
3066 3066
3067 if(priv->ieee80211->bHwRadioOff) 3067 if(priv->ieee80211->bHwRadioOff)
3068 { 3068 {
3069 spin_unlock_irqrestore(&priv->tx_lock,flags); 3069 spin_unlock_irqrestore(&priv->tx_lock,flags);
3070 3070
3071 dev_kfree_skb_any(skb); 3071 dev_kfree_skb_any(skb);
3072 return 0; 3072 return 0;
3073 } 3073 }
3074 3074
3075 rtl8180_tx(dev, skb->data, skb->len, priority, 3075 rtl8180_tx(dev, skb->data, skb->len, priority,
3076 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate)); 3076 0, 0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3077 3077
3078 priv->ieee80211->stats.tx_bytes+=skb->len; 3078 priv->ieee80211->stats.tx_bytes+=skb->len;
3079 priv->ieee80211->stats.tx_packets++; 3079 priv->ieee80211->stats.tx_packets++;
3080 spin_unlock_irqrestore(&priv->tx_lock,flags); 3080 spin_unlock_irqrestore(&priv->tx_lock,flags);
3081 3081
3082 dev_kfree_skb_any(skb); 3082 dev_kfree_skb_any(skb);
3083 return 0; 3083 return 0;
3084 } 3084 }
3085 3085
3086 // longpre 144+48 shortpre 72+24 3086 // longpre 144+48 shortpre 72+24
3087 u16 rtl8180_len2duration(u32 len, short rate,short* ext) 3087 u16 rtl8180_len2duration(u32 len, short rate,short* ext)
3088 { 3088 {
3089 u16 duration; 3089 u16 duration;
3090 u16 drift; 3090 u16 drift;
3091 *ext=0; 3091 *ext=0;
3092 3092
3093 switch(rate){ 3093 switch(rate){
3094 case 0://1mbps 3094 case 0://1mbps
3095 *ext=0; 3095 *ext=0;
3096 duration = ((len+4)<<4) /0x2; 3096 duration = ((len+4)<<4) /0x2;
3097 drift = ((len+4)<<4) % 0x2; 3097 drift = ((len+4)<<4) % 0x2;
3098 if(drift ==0 ) break; 3098 if(drift ==0 ) break;
3099 duration++; 3099 duration++;
3100 break; 3100 break;
3101 3101
3102 case 1://2mbps 3102 case 1://2mbps
3103 *ext=0; 3103 *ext=0;
3104 duration = ((len+4)<<4) /0x4; 3104 duration = ((len+4)<<4) /0x4;
3105 drift = ((len+4)<<4) % 0x4; 3105 drift = ((len+4)<<4) % 0x4;
3106 if(drift ==0 ) break; 3106 if(drift ==0 ) break;
3107 duration++; 3107 duration++;
3108 break; 3108 break;
3109 3109
3110 case 2: //5.5mbps 3110 case 2: //5.5mbps
3111 *ext=0; 3111 *ext=0;
3112 duration = ((len+4)<<4) /0xb; 3112 duration = ((len+4)<<4) /0xb;
3113 drift = ((len+4)<<4) % 0xb; 3113 drift = ((len+4)<<4) % 0xb;
3114 if(drift ==0 ) 3114 if(drift ==0 )
3115 break; 3115 break;
3116 duration++; 3116 duration++;
3117 break; 3117 break;
3118 3118
3119 default: 3119 default:
3120 case 3://11mbps 3120 case 3://11mbps
3121 *ext=0; 3121 *ext=0;
3122 duration = ((len+4)<<4) /0x16; 3122 duration = ((len+4)<<4) /0x16;
3123 drift = ((len+4)<<4) % 0x16; 3123 drift = ((len+4)<<4) % 0x16;
3124 if(drift ==0 ) 3124 if(drift ==0 )
3125 break; 3125 break;
3126 duration++; 3126 duration++;
3127 if(drift > 6) 3127 if(drift > 6)
3128 break; 3128 break;
3129 *ext=1; 3129 *ext=1;
3130 break; 3130 break;
3131 } 3131 }
3132 3132
3133 return duration; 3133 return duration;
3134 } 3134 }
3135 3135
3136 3136
3137 void rtl8180_prepare_beacon(struct net_device *dev) 3137 void rtl8180_prepare_beacon(struct net_device *dev)
3138 { 3138 {
3139 3139
3140 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 3140 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3141 3141
3142 struct sk_buff *skb; 3142 struct sk_buff *skb;
3143 3143
3144 u16 word = read_nic_word(dev, BcnItv); 3144 u16 word = read_nic_word(dev, BcnItv);
3145 word &= ~BcnItv_BcnItv; // clear Bcn_Itv 3145 word &= ~BcnItv_BcnItv; // clear Bcn_Itv
3146 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64; 3146 word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval);//0x64;
3147 write_nic_word(dev, BcnItv, word); 3147 write_nic_word(dev, BcnItv, word);
3148 3148
3149 3149
3150 skb = ieee80211_get_beacon(priv->ieee80211); 3150 skb = ieee80211_get_beacon(priv->ieee80211);
3151 if(skb){ 3151 if(skb){
3152 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY, 3152 rtl8180_tx(dev,skb->data,skb->len,BEACON_PRIORITY,
3153 0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate)); 3153 0,0,ieeerate2rtlrate(priv->ieee80211->basic_rate));
3154 dev_kfree_skb_any(skb); 3154 dev_kfree_skb_any(skb);
3155 } 3155 }
3156 #if 0 3156 #if 0
3157 //DMESG("size %x",len); 3157 //DMESG("size %x",len);
3158 if(*tail & (1<<31)){ 3158 if(*tail & (1<<31)){
3159 3159
3160 //DMESG("No more beacon TX desc"); 3160 //DMESG("No more beacon TX desc");
3161 return ; 3161 return ;
3162 3162
3163 } 3163 }
3164 //while(! *tail & (1<<31)){ 3164 //while(! *tail & (1<<31)){
3165 *tail= 0; // zeroes header 3165 *tail= 0; // zeroes header
3166 3166
3167 *tail = *tail| (1<<29) ; //fist segment of the packet 3167 *tail = *tail| (1<<29) ; //fist segment of the packet
3168 *tail = (*tail) | (1<<28); // last segment 3168 *tail = (*tail) | (1<<28); // last segment
3169 // *tail = *tail | (1<<18); // this is a beacon frame 3169 // *tail = *tail | (1<<18); // this is a beacon frame
3170 *(tail+3)=*(tail+3) &~ 0xfff; 3170 *(tail+3)=*(tail+3) &~ 0xfff;
3171 *(tail+3)=*(tail+3) | len; // buffer lenght 3171 *(tail+3)=*(tail+3) | len; // buffer lenght
3172 *tail = *tail |len; 3172 *tail = *tail |len;
3173 // zeroes the second 32-bits dword of the descriptor 3173 // zeroes the second 32-bits dword of the descriptor
3174 *(tail+1)= 0; 3174 *(tail+1)= 0;
3175 *tail = *tail | (rate << 24); 3175 *tail = *tail | (rate << 24);
3176 3176
3177 duration = rtl8180_len2duration(len,rate,&ext); 3177 duration = rtl8180_len2duration(len,rate,&ext);
3178 3178
3179 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16); 3179 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3180 3180
3181 *tail = *tail | (1<<31); 3181 *tail = *tail | (1<<31);
3182 //^ descriptor ready to be txed 3182 //^ descriptor ready to be txed
3183 if((tail - begin)/8 == priv->txbeaconcount-1) 3183 if((tail - begin)/8 == priv->txbeaconcount-1)
3184 tail=begin; 3184 tail=begin;
3185 else 3185 else
3186 tail=tail+8; 3186 tail=tail+8;
3187 //} 3187 //}
3188 #endif 3188 #endif
3189 } 3189 }
3190 3190
3191 /* This function do the real dirty work: it enqueues a TX command 3191 /* This function do the real dirty work: it enqueues a TX command
3192 * descriptor in the ring buffer, copyes the frame in a TX buffer 3192 * descriptor in the ring buffer, copyes the frame in a TX buffer
3193 * and kicks the NIC to ensure it does the DMA transfer. 3193 * and kicks the NIC to ensure it does the DMA transfer.
3194 */ 3194 */
3195 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority, 3195 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
3196 short morefrag, short descfrag, int rate) 3196 short morefrag, short descfrag, int rate)
3197 { 3197 {
3198 struct r8180_priv *priv = ieee80211_priv(dev); 3198 struct r8180_priv *priv = ieee80211_priv(dev);
3199 u32 *tail,*temp_tail; 3199 u32 *tail,*temp_tail;
3200 u32 *begin; 3200 u32 *begin;
3201 u32 *buf; 3201 u32 *buf;
3202 int i; 3202 int i;
3203 int remain; 3203 int remain;
3204 int buflen; 3204 int buflen;
3205 int count; 3205 int count;
3206 //u16 AckCtsTime; 3206 //u16 AckCtsTime;
3207 //u16 FrameTime; 3207 //u16 FrameTime;
3208 u16 duration; 3208 u16 duration;
3209 short ext; 3209 short ext;
3210 struct buffer* buflist; 3210 struct buffer* buflist;
3211 //unsigned long flags; 3211 //unsigned long flags;
3212 #ifdef CONFIG_RTL8185B 3212 #ifdef CONFIG_RTL8185B
3213 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf; 3213 struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
3214 u8 dest[ETH_ALEN]; 3214 u8 dest[ETH_ALEN];
3215 u8 bUseShortPreamble = 0; 3215 u8 bUseShortPreamble = 0;
3216 u8 bCTSEnable = 0; 3216 u8 bCTSEnable = 0;
3217 u8 bRTSEnable = 0; 3217 u8 bRTSEnable = 0;
3218 //u16 RTSRate = 22; 3218 //u16 RTSRate = 22;
3219 //u8 RetryLimit = 0; 3219 //u8 RetryLimit = 0;
3220 u16 Duration = 0; 3220 u16 Duration = 0;
3221 u16 RtsDur = 0; 3221 u16 RtsDur = 0;
3222 u16 ThisFrameTime = 0; 3222 u16 ThisFrameTime = 0;
3223 u16 TxDescDuration = 0; 3223 u16 TxDescDuration = 0;
3224 u8 ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14 3224 u8 ownbit_flag = false; //added by david woo for sync Tx, 2007.12.14
3225 #endif 3225 #endif
3226 3226
3227 switch(priority) { 3227 switch(priority) {
3228 case MANAGE_PRIORITY: 3228 case MANAGE_PRIORITY:
3229 tail=priv->txmapringtail; 3229 tail=priv->txmapringtail;
3230 begin=priv->txmapring; 3230 begin=priv->txmapring;
3231 buflist = priv->txmapbufstail; 3231 buflist = priv->txmapbufstail;
3232 count = priv->txringcount; 3232 count = priv->txringcount;
3233 break; 3233 break;
3234 3234
3235 case BK_PRIORITY: 3235 case BK_PRIORITY:
3236 tail=priv->txbkpringtail; 3236 tail=priv->txbkpringtail;
3237 begin=priv->txbkpring; 3237 begin=priv->txbkpring;
3238 buflist = priv->txbkpbufstail; 3238 buflist = priv->txbkpbufstail;
3239 count = priv->txringcount; 3239 count = priv->txringcount;
3240 break; 3240 break;
3241 3241
3242 case BE_PRIORITY: 3242 case BE_PRIORITY:
3243 tail=priv->txbepringtail; 3243 tail=priv->txbepringtail;
3244 begin=priv->txbepring; 3244 begin=priv->txbepring;
3245 buflist = priv->txbepbufstail; 3245 buflist = priv->txbepbufstail;
3246 count = priv->txringcount; 3246 count = priv->txringcount;
3247 break; 3247 break;
3248 3248
3249 case VI_PRIORITY: 3249 case VI_PRIORITY:
3250 tail=priv->txvipringtail; 3250 tail=priv->txvipringtail;
3251 begin=priv->txvipring; 3251 begin=priv->txvipring;
3252 buflist = priv->txvipbufstail; 3252 buflist = priv->txvipbufstail;
3253 count = priv->txringcount; 3253 count = priv->txringcount;
3254 break; 3254 break;
3255 3255
3256 case VO_PRIORITY: 3256 case VO_PRIORITY:
3257 tail=priv->txvopringtail; 3257 tail=priv->txvopringtail;
3258 begin=priv->txvopring; 3258 begin=priv->txvopring;
3259 buflist = priv->txvopbufstail; 3259 buflist = priv->txvopbufstail;
3260 count = priv->txringcount; 3260 count = priv->txringcount;
3261 break; 3261 break;
3262 3262
3263 case HI_PRIORITY: 3263 case HI_PRIORITY:
3264 tail=priv->txhpringtail; 3264 tail=priv->txhpringtail;
3265 begin=priv->txhpring; 3265 begin=priv->txhpring;
3266 buflist = priv->txhpbufstail; 3266 buflist = priv->txhpbufstail;
3267 count = priv->txringcount; 3267 count = priv->txringcount;
3268 break; 3268 break;
3269 3269
3270 case BEACON_PRIORITY: 3270 case BEACON_PRIORITY:
3271 tail=priv->txbeaconringtail; 3271 tail=priv->txbeaconringtail;
3272 begin=priv->txbeaconring; 3272 begin=priv->txbeaconring;
3273 buflist = priv->txbeaconbufstail; 3273 buflist = priv->txbeaconbufstail;
3274 count = priv->txbeaconcount; 3274 count = priv->txbeaconcount;
3275 break; 3275 break;
3276 3276
3277 default: 3277 default:
3278 return -1; 3278 return -1;
3279 break; 3279 break;
3280 } 3280 }
3281 3281
3282 //printk("in rtl8180_tx(): rate is %d\n",priv->ieee80211->rate); 3282 //printk("in rtl8180_tx(): rate is %d\n",priv->ieee80211->rate);
3283 #if 1 3283 #if 1
3284 memcpy(&dest, frag_hdr->addr1, ETH_ALEN); 3284 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
3285 if (is_multicast_ether_addr(dest) || 3285 if (is_multicast_ether_addr(dest) ||
3286 is_broadcast_ether_addr(dest)) 3286 is_broadcast_ether_addr(dest))
3287 { 3287 {
3288 Duration = 0; 3288 Duration = 0;
3289 RtsDur = 0; 3289 RtsDur = 0;
3290 bRTSEnable = 0; 3290 bRTSEnable = 0;
3291 bCTSEnable = 0; 3291 bCTSEnable = 0;
3292 3292
3293 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble); 3293 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3294 TxDescDuration = ThisFrameTime; 3294 TxDescDuration = ThisFrameTime;
3295 } else {// Unicast packet 3295 } else {// Unicast packet
3296 //u8 AckRate; 3296 //u8 AckRate;
3297 u16 AckTime; 3297 u16 AckTime;
3298 3298
3299 //YJ,add,080828,for Keep alive 3299 //YJ,add,080828,for Keep alive
3300 priv->NumTxUnicast++; 3300 priv->NumTxUnicast++;
3301 3301
3302 // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko. 3302 // Figure out ACK rate according to BSS basic rate and Tx rate, 2006.03.08 by rcnjko.
3303 //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) ); 3303 //AckRate = ComputeAckRate( pMgntInfo->mBrates, (u1Byte)(pTcb->DataRate) );
3304 // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko. 3304 // Figure out ACK time according to the AckRate and assume long preamble is used on receiver, 2006.03.08, by rcnjko.
3305 //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE); 3305 //AckTime = ComputeTxTime( sAckCtsLng/8, AckRate, FALSE, FALSE);
3306 //For simplicity, just use the 1M basic rate 3306 //For simplicity, just use the 1M basic rate
3307 //AckTime = ComputeTxTime(14, 540,0, 0); // AckCTSLng = 14 use 1M bps send 3307 //AckTime = ComputeTxTime(14, 540,0, 0); // AckCTSLng = 14 use 1M bps send
3308 AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send 3308 AckTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3309 //AckTime = ComputeTxTime(14, 2,false, false); // AckCTSLng = 14 use 1M bps send 3309 //AckTime = ComputeTxTime(14, 2,false, false); // AckCTSLng = 14 use 1M bps send
3310 3310
3311 if ( ((len + sCrcLng) > priv->rts) && priv->rts ) 3311 if ( ((len + sCrcLng) > priv->rts) && priv->rts )
3312 { // RTS/CTS. 3312 { // RTS/CTS.
3313 u16 RtsTime, CtsTime; 3313 u16 RtsTime, CtsTime;
3314 //u16 CtsRate; 3314 //u16 CtsRate;
3315 bRTSEnable = 1; 3315 bRTSEnable = 1;
3316 bCTSEnable = 0; 3316 bCTSEnable = 0;
3317 3317
3318 // Rate and time required for RTS. 3318 // Rate and time required for RTS.
3319 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0); 3319 RtsTime = ComputeTxTime( sAckCtsLng/8,priv->ieee80211->basic_rate, 0, 0);
3320 // Rate and time required for CTS. 3320 // Rate and time required for CTS.
3321 CtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send 3321 CtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3322 3322
3323 // Figure out time required to transmit this frame. 3323 // Figure out time required to transmit this frame.
3324 ThisFrameTime = ComputeTxTime(len + sCrcLng, 3324 ThisFrameTime = ComputeTxTime(len + sCrcLng,
3325 rtl8180_rate2rate(rate), 3325 rtl8180_rate2rate(rate),
3326 0, 3326 0,
3327 bUseShortPreamble); 3327 bUseShortPreamble);
3328 3328
3329 // RTS-CTS-ThisFrame-ACK. 3329 // RTS-CTS-ThisFrame-ACK.
3330 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime; 3330 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
3331 3331
3332 TxDescDuration = RtsTime + RtsDur; 3332 TxDescDuration = RtsTime + RtsDur;
3333 } 3333 }
3334 else {// Normal case. 3334 else {// Normal case.
3335 bCTSEnable = 0; 3335 bCTSEnable = 0;
3336 bRTSEnable = 0; 3336 bRTSEnable = 0;
3337 RtsDur = 0; 3337 RtsDur = 0;
3338 3338
3339 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble); 3339 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
3340 TxDescDuration = ThisFrameTime + aSifsTime + AckTime; 3340 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
3341 } 3341 }
3342 3342
3343 if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment 3343 if(!(frag_hdr->frame_ctl & IEEE80211_FCTL_MOREFRAGS)) { //no more fragment
3344 // ThisFrame-ACK. 3344 // ThisFrame-ACK.
3345 Duration = aSifsTime + AckTime; 3345 Duration = aSifsTime + AckTime;
3346 } else { // One or more fragments remained. 3346 } else { // One or more fragments remained.
3347 u16 NextFragTime; 3347 u16 NextFragTime;
3348 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet 3348 NextFragTime = ComputeTxTime( len + sCrcLng, //pretend following packet length equal current packet
3349 rtl8180_rate2rate(rate), 3349 rtl8180_rate2rate(rate),
3350 0, 3350 0,
3351 bUseShortPreamble ); 3351 bUseShortPreamble );
3352 3352
3353 //ThisFrag-ACk-NextFrag-ACK. 3353 //ThisFrag-ACk-NextFrag-ACK.
3354 Duration = NextFragTime + 3*aSifsTime + 2*AckTime; 3354 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
3355 } 3355 }
3356 3356
3357 } // End of Unicast packet 3357 } // End of Unicast packet
3358 3358
3359 frag_hdr->duration_id = Duration; 3359 frag_hdr->duration_id = Duration;
3360 #endif 3360 #endif
3361 3361
3362 buflen=priv->txbuffsize; 3362 buflen=priv->txbuffsize;
3363 remain=len; 3363 remain=len;
3364 temp_tail = tail; 3364 temp_tail = tail;
3365 //printk("================================>buflen = %d, remain = %d!\n", buflen,remain); 3365 //printk("================================>buflen = %d, remain = %d!\n", buflen,remain);
3366 while(remain!=0){ 3366 while(remain!=0){
3367 #ifdef DEBUG_TX_FRAG 3367 #ifdef DEBUG_TX_FRAG
3368 DMESG("TX iteration"); 3368 DMESG("TX iteration");
3369 #endif 3369 #endif
3370 #ifdef DEBUG_TX 3370 #ifdef DEBUG_TX
3371 DMESG("TX: filling descriptor %x",(u32)tail); 3371 DMESG("TX: filling descriptor %x",(u32)tail);
3372 #endif 3372 #endif
3373 mb(); 3373 mb();
3374 if(!buflist){ 3374 if(!buflist){
3375 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority); 3375 DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
3376 //spin_unlock_irqrestore(&priv->tx_lock,flags); 3376 //spin_unlock_irqrestore(&priv->tx_lock,flags);
3377 return -1; 3377 return -1;
3378 } 3378 }
3379 buf=buflist->buf; 3379 buf=buflist->buf;
3380 3380
3381 if( (*tail & (1<<31)) && (priority != BEACON_PRIORITY)){ 3381 if( (*tail & (1<<31)) && (priority != BEACON_PRIORITY)){
3382 3382
3383 DMESGW("No more TX desc, returning %x of %x", 3383 DMESGW("No more TX desc, returning %x of %x",
3384 remain,len); 3384 remain,len);
3385 priv->stats.txrdu++; 3385 priv->stats.txrdu++;
3386 #ifdef DEBUG_TX_DESC 3386 #ifdef DEBUG_TX_DESC
3387 check_tx_ring(dev,priority); 3387 check_tx_ring(dev,priority);
3388 // netif_stop_queue(dev); 3388 // netif_stop_queue(dev);
3389 // netif_carrier_off(dev); 3389 // netif_carrier_off(dev);
3390 #endif 3390 #endif
3391 // spin_unlock_irqrestore(&priv->tx_lock,flags); 3391 // spin_unlock_irqrestore(&priv->tx_lock,flags);
3392 3392
3393 return remain; 3393 return remain;
3394 3394
3395 } 3395 }
3396 3396
3397 *tail= 0; // zeroes header 3397 *tail= 0; // zeroes header
3398 *(tail+1) = 0; 3398 *(tail+1) = 0;
3399 *(tail+3) = 0; 3399 *(tail+3) = 0;
3400 *(tail+5) = 0; 3400 *(tail+5) = 0;
3401 *(tail+6) = 0; 3401 *(tail+6) = 0;
3402 *(tail+7) = 0; 3402 *(tail+7) = 0;
3403 3403
3404 if(priv->card_8185){ 3404 if(priv->card_8185){
3405 //FIXME: this should be triggered by HW encryption parameters. 3405 //FIXME: this should be triggered by HW encryption parameters.
3406 *tail |= (1<<15); //no encrypt 3406 *tail |= (1<<15); //no encrypt
3407 // *tail |= (1<<30); //raise int when completed 3407 // *tail |= (1<<30); //raise int when completed
3408 } 3408 }
3409 // *tail = *tail | (1<<16); 3409 // *tail = *tail | (1<<16);
3410 if(remain==len && !descfrag) { 3410 if(remain==len && !descfrag) {
3411 ownbit_flag = false; //added by david woo,2007.12.14 3411 ownbit_flag = false; //added by david woo,2007.12.14
3412 #ifdef DEBUG_TX_FRAG 3412 #ifdef DEBUG_TX_FRAG
3413 DMESG("First descriptor"); 3413 DMESG("First descriptor");
3414 #endif 3414 #endif
3415 *tail = *tail| (1<<29) ; //fist segment of the packet 3415 *tail = *tail| (1<<29) ; //fist segment of the packet
3416 *tail = *tail |(len); 3416 *tail = *tail |(len);
3417 } else { 3417 } else {
3418 ownbit_flag = true; 3418 ownbit_flag = true;
3419 } 3419 }
3420 3420
3421 for(i=0;i<buflen&& remain >0;i++,remain--){ 3421 for(i=0;i<buflen&& remain >0;i++,remain--){
3422 ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer 3422 ((u8*)buf)[i]=txbuf[i]; //copy data into descriptor pointed DMAble buffer
3423 if(remain == 4 && i+4 >= buflen) break; 3423 if(remain == 4 && i+4 >= buflen) break;
3424 /* ensure the last desc has at least 4 bytes payload */ 3424 /* ensure the last desc has at least 4 bytes payload */
3425 3425
3426 } 3426 }
3427 txbuf = txbuf + i; 3427 txbuf = txbuf + i;
3428 *(tail+3)=*(tail+3) &~ 0xfff; 3428 *(tail+3)=*(tail+3) &~ 0xfff;
3429 *(tail+3)=*(tail+3) | i; // buffer lenght 3429 *(tail+3)=*(tail+3) | i; // buffer lenght
3430 // Use short preamble or not 3430 // Use short preamble or not
3431 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE) 3431 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
3432 if (priv->plcp_preamble_mode==1 && rate!=0) // short mode now, not long! 3432 if (priv->plcp_preamble_mode==1 && rate!=0) // short mode now, not long!
3433 // *tail |= (1<<16); // enable short preamble mode. 3433 // *tail |= (1<<16); // enable short preamble mode.
3434 3434
3435 #ifdef CONFIG_RTL8185B 3435 #ifdef CONFIG_RTL8185B
3436 if(bCTSEnable) { 3436 if(bCTSEnable) {
3437 *tail |= (1<<18); 3437 *tail |= (1<<18);
3438 } 3438 }
3439 3439
3440 if(bRTSEnable) //rts enable 3440 if(bRTSEnable) //rts enable
3441 { 3441 {
3442 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE 3442 *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
3443 *tail |= (1<<23);//rts enable 3443 *tail |= (1<<23);//rts enable
3444 *(tail+1) |=(RtsDur&0xffff);//RTS Duration 3444 *(tail+1) |=(RtsDur&0xffff);//RTS Duration
3445 } 3445 }
3446 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION 3446 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
3447 // *(tail+3) |= (0xe6<<16); 3447 // *(tail+3) |= (0xe6<<16);
3448 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ; 3448 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
3449 #else 3449 #else
3450 //Use RTS or not 3450 //Use RTS or not
3451 #ifdef CONFIG_RTL8187B 3451 #ifdef CONFIG_RTL8187B
3452 if ( (len>priv->rts) && priv->rts && priority!=MANAGE_PRIORITY){ 3452 if ( (len>priv->rts) && priv->rts && priority!=MANAGE_PRIORITY){
3453 #else 3453 #else
3454 if ( (len>priv->rts) && priv->rts && priority==LOW_PRIORITY){ 3454 if ( (len>priv->rts) && priv->rts && priority==LOW_PRIORITY){
3455 #endif 3455 #endif
3456 *tail |= (1<<23); //enalbe RTS function 3456 *tail |= (1<<23); //enalbe RTS function
3457 *tail |= (0<<19); //use 1M bps send RTS packet 3457 *tail |= (0<<19); //use 1M bps send RTS packet
3458 AckCtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send 3458 AckCtsTime = ComputeTxTime(14, 10,0, 0); // AckCTSLng = 14 use 1M bps send
3459 FrameTime = ComputeTxTime(len + 4, rtl8180_rate2rate(rate), 0, *tail&(1<<16)); 3459 FrameTime = ComputeTxTime(len + 4, rtl8180_rate2rate(rate), 0, *tail&(1<<16));
3460 // RTS/CTS time is calculate as follow 3460 // RTS/CTS time is calculate as follow
3461 duration = FrameTime + 3*10 + 2*AckCtsTime; //10us is the SifsTime; 3461 duration = FrameTime + 3*10 + 2*AckCtsTime; //10us is the SifsTime;
3462 *(tail+1) |= duration; //Need to edit here! ----hikaru 3462 *(tail+1) |= duration; //Need to edit here! ----hikaru
3463 }else{ 3463 }else{
3464 *(tail+1)= 0; // zeroes the second 32-bits dword of the descriptor 3464 *(tail+1)= 0; // zeroes the second 32-bits dword of the descriptor
3465 } 3465 }
3466 #endif 3466 #endif
3467 3467
3468 *tail = *tail | ((rate&0xf) << 24); 3468 *tail = *tail | ((rate&0xf) << 24);
3469 //DMESG("rate %d",rate); 3469 //DMESG("rate %d",rate);
3470 3470
3471 if(priv->card_8185){ 3471 if(priv->card_8185){
3472 3472
3473 #if 0 3473 #if 0
3474 *(tail+5)&= ~(1<<24); /* tx ant 0 */ 3474 *(tail+5)&= ~(1<<24); /* tx ant 0 */
3475 3475
3476 *(tail+5) &= ~(1<<23); /* random tx agc 23-16 */ 3476 *(tail+5) &= ~(1<<23); /* random tx agc 23-16 */
3477 *(tail+5) |= (1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16); 3477 *(tail+5) |= (1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16);
3478 3478
3479 *(tail+5) &= 3479 *(tail+5) &=
3480 ~((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8)); 3480 ~((1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8));
3481 *(tail+5) |= (7<<8); // Max retry limit 3481 *(tail+5) |= (7<<8); // Max retry limit
3482 3482
3483 *(tail+5) &= ~((1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0)); 3483 *(tail+5) &= ~((1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(1<<0));
3484 *(tail+5) |= (8<<4); // Max contention window 3484 *(tail+5) |= (8<<4); // Max contention window
3485 *(tail+6) |= 4; // Min contention window 3485 *(tail+6) |= 4; // Min contention window
3486 #endif 3486 #endif
3487 // *(tail+5) = 0; 3487 // *(tail+5) = 0;
3488 } 3488 }
3489 3489
3490 /* hw_plcp_len is not used for rtl8180 chip */ 3490 /* hw_plcp_len is not used for rtl8180 chip */
3491 /* FIXME */ 3491 /* FIXME */
3492 if(priv->card_8185 == 0 || !priv->hw_plcp_len){ 3492 if(priv->card_8185 == 0 || !priv->hw_plcp_len){
3493 3493
3494 duration = rtl8180_len2duration(len, 3494 duration = rtl8180_len2duration(len,
3495 rate,&ext); 3495 rate,&ext);
3496 3496
3497 3497
3498 #ifdef DEBUG_TX 3498 #ifdef DEBUG_TX
3499 DMESG("PLCP duration %d",duration ); 3499 DMESG("PLCP duration %d",duration );
3500 //DMESG("drift %d",drift); 3500 //DMESG("drift %d",drift);
3501 DMESG("extension %s", (ext==1) ? "on":"off"); 3501 DMESG("extension %s", (ext==1) ? "on":"off");
3502 #endif 3502 #endif
3503 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16); 3503 *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
3504 if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension 3504 if(ext) *(tail+1) = *(tail+1) |(1<<31); //plcp length extension
3505 } 3505 }
3506 3506
3507 if(morefrag) *tail = (*tail) | (1<<17); // more fragment 3507 if(morefrag) *tail = (*tail) | (1<<17); // more fragment
3508 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame 3508 if(!remain) *tail = (*tail) | (1<<28); // last segment of frame
3509 3509
3510 #ifdef DEBUG_TX_FRAG 3510 #ifdef DEBUG_TX_FRAG
3511 if(!remain)DMESG("Last descriptor"); 3511 if(!remain)DMESG("Last descriptor");
3512 if(morefrag)DMESG("More frag"); 3512 if(morefrag)DMESG("More frag");
3513 #endif 3513 #endif
3514 *(tail+5) = *(tail+5)|(2<<27); 3514 *(tail+5) = *(tail+5)|(2<<27);
3515 *(tail+7) = *(tail+7)|(1<<4); 3515 *(tail+7) = *(tail+7)|(1<<4);
3516 3516
3517 wmb(); 3517 wmb();
3518 if(ownbit_flag) 3518 if(ownbit_flag)
3519 { 3519 {
3520 *tail = *tail | (1<<31); // descriptor ready to be txed 3520 *tail = *tail | (1<<31); // descriptor ready to be txed
3521 } 3521 }
3522 3522
3523 #ifdef DEBUG_TX_DESC2 3523 #ifdef DEBUG_TX_DESC2
3524 printk("tx desc is:\n"); 3524 printk("tx desc is:\n");
3525 DMESG("%8x %8x %8x %8x %8x %8x %8x %8x", tail[0], tail[1], tail[2], tail[3], 3525 DMESG("%8x %8x %8x %8x %8x %8x %8x %8x", tail[0], tail[1], tail[2], tail[3],
3526 tail[4], tail[5], tail[6], tail[7]); 3526 tail[4], tail[5], tail[6], tail[7]);
3527 #endif 3527 #endif
3528 3528
3529 if((tail - begin)/8 == count-1) 3529 if((tail - begin)/8 == count-1)
3530 tail=begin; 3530 tail=begin;
3531 3531
3532 else 3532 else
3533 tail=tail+8; 3533 tail=tail+8;
3534 3534
3535 buflist=buflist->next; 3535 buflist=buflist->next;
3536 3536
3537 mb(); 3537 mb();
3538 3538
3539 switch(priority) { 3539 switch(priority) {
3540 case MANAGE_PRIORITY: 3540 case MANAGE_PRIORITY:
3541 priv->txmapringtail=tail; 3541 priv->txmapringtail=tail;
3542 priv->txmapbufstail=buflist; 3542 priv->txmapbufstail=buflist;
3543 break; 3543 break;
3544 3544
3545 case BK_PRIORITY: 3545 case BK_PRIORITY:
3546 priv->txbkpringtail=tail; 3546 priv->txbkpringtail=tail;
3547 priv->txbkpbufstail=buflist; 3547 priv->txbkpbufstail=buflist;
3548 break; 3548 break;
3549 3549
3550 case BE_PRIORITY: 3550 case BE_PRIORITY:
3551 priv->txbepringtail=tail; 3551 priv->txbepringtail=tail;
3552 priv->txbepbufstail=buflist; 3552 priv->txbepbufstail=buflist;
3553 break; 3553 break;
3554 3554
3555 case VI_PRIORITY: 3555 case VI_PRIORITY:
3556 priv->txvipringtail=tail; 3556 priv->txvipringtail=tail;
3557 priv->txvipbufstail=buflist; 3557 priv->txvipbufstail=buflist;
3558 break; 3558 break;
3559 3559
3560 case VO_PRIORITY: 3560 case VO_PRIORITY:
3561 priv->txvopringtail=tail; 3561 priv->txvopringtail=tail;
3562 priv->txvopbufstail=buflist; 3562 priv->txvopbufstail=buflist;
3563 break; 3563 break;
3564 3564
3565 case HI_PRIORITY: 3565 case HI_PRIORITY:
3566 priv->txhpringtail=tail; 3566 priv->txhpringtail=tail;
3567 priv->txhpbufstail = buflist; 3567 priv->txhpbufstail = buflist;
3568 break; 3568 break;
3569 3569
3570 case BEACON_PRIORITY: 3570 case BEACON_PRIORITY:
3571 /* the HW seems to be happy with the 1st 3571 /* the HW seems to be happy with the 1st
3572 * descriptor filled and the 2nd empty... 3572 * descriptor filled and the 2nd empty...
3573 * So always update descriptor 1 and never 3573 * So always update descriptor 1 and never
3574 * touch 2nd 3574 * touch 2nd
3575 */ 3575 */
3576 // priv->txbeaconringtail=tail; 3576 // priv->txbeaconringtail=tail;
3577 // priv->txbeaconbufstail=buflist; 3577 // priv->txbeaconbufstail=buflist;
3578 3578
3579 break; 3579 break;
3580 3580
3581 } 3581 }
3582 3582
3583 //rtl8180_dma_kick(dev,priority); 3583 //rtl8180_dma_kick(dev,priority);
3584 } 3584 }
3585 *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed 3585 *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
3586 rtl8180_dma_kick(dev,priority); 3586 rtl8180_dma_kick(dev,priority);
3587 //spin_unlock_irqrestore(&priv->tx_lock,flags); 3587 //spin_unlock_irqrestore(&priv->tx_lock,flags);
3588 3588
3589 return 0; 3589 return 0;
3590 3590
3591 } 3591 }
3592 3592
3593 3593
3594 void rtl8180_irq_rx_tasklet(struct r8180_priv * priv); 3594 void rtl8180_irq_rx_tasklet(struct r8180_priv * priv);
3595 3595
3596 3596
3597 void rtl8180_link_change(struct net_device *dev) 3597 void rtl8180_link_change(struct net_device *dev)
3598 { 3598 {
3599 struct r8180_priv *priv = ieee80211_priv(dev); 3599 struct r8180_priv *priv = ieee80211_priv(dev);
3600 u16 beacon_interval; 3600 u16 beacon_interval;
3601 3601
3602 struct ieee80211_network *net = &priv->ieee80211->current_network; 3602 struct ieee80211_network *net = &priv->ieee80211->current_network;
3603 // rtl8180_adapter_start(dev); 3603 // rtl8180_adapter_start(dev);
3604 rtl8180_update_msr(dev); 3604 rtl8180_update_msr(dev);
3605 3605
3606 3606
3607 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 3607 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
3608 3608
3609 write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]); 3609 write_nic_dword(dev,BSSID,((u32*)net->bssid)[0]);
3610 write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]); 3610 write_nic_word(dev,BSSID+4,((u16*)net->bssid)[2]);
3611 3611
3612 3612
3613 beacon_interval = read_nic_dword(dev,BEACON_INTERVAL); 3613 beacon_interval = read_nic_dword(dev,BEACON_INTERVAL);
3614 beacon_interval &= ~ BEACON_INTERVAL_MASK; 3614 beacon_interval &= ~ BEACON_INTERVAL_MASK;
3615 beacon_interval |= net->beacon_interval; 3615 beacon_interval |= net->beacon_interval;
3616 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval); 3616 write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
3617 3617
3618 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 3618 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3619 3619
3620 3620
3621 /* 3621 /*
3622 u16 atim = read_nic_dword(dev,ATIM); 3622 u16 atim = read_nic_dword(dev,ATIM);
3623 u16 = u16 &~ ATIM_MASK; 3623 u16 = u16 &~ ATIM_MASK;
3624 u16 = u16 | beacon->atim; 3624 u16 = u16 | beacon->atim;
3625 */ 3625 */
3626 #if 0 3626 #if 0
3627 if (net->capability & WLAN_CAPABILITY_PRIVACY) { 3627 if (net->capability & WLAN_CAPABILITY_PRIVACY) {
3628 if (priv->hw_wep) { 3628 if (priv->hw_wep) {
3629 DMESG("Enabling hardware WEP support"); 3629 DMESG("Enabling hardware WEP support");
3630 rtl8180_set_hw_wep(dev); 3630 rtl8180_set_hw_wep(dev);
3631 priv->ieee80211->host_encrypt=0; 3631 priv->ieee80211->host_encrypt=0;
3632 priv->ieee80211->host_decrypt=0; 3632 priv->ieee80211->host_decrypt=0;
3633 } 3633 }
3634 #ifndef CONFIG_IEEE80211_NOWEP 3634 #ifndef CONFIG_IEEE80211_NOWEP
3635 else { 3635 else {
3636 priv->ieee80211->host_encrypt=1; 3636 priv->ieee80211->host_encrypt=1;
3637 priv->ieee80211->host_decrypt=1; 3637 priv->ieee80211->host_decrypt=1;
3638 } 3638 }
3639 #endif 3639 #endif
3640 } 3640 }
3641 #ifndef CONFIG_IEEE80211_NOWEP 3641 #ifndef CONFIG_IEEE80211_NOWEP
3642 else{ 3642 else{
3643 priv->ieee80211->host_encrypt=0; 3643 priv->ieee80211->host_encrypt=0;
3644 priv->ieee80211->host_decrypt=0; 3644 priv->ieee80211->host_decrypt=0;
3645 } 3645 }
3646 #endif 3646 #endif
3647 #endif 3647 #endif
3648 3648
3649 3649
3650 if(priv->card_8185) 3650 if(priv->card_8185)
3651 rtl8180_set_chan(dev, priv->chan); 3651 rtl8180_set_chan(dev, priv->chan);
3652 3652
3653 3653
3654 } 3654 }
3655 3655
3656 void rtl8180_rq_tx_ack(struct net_device *dev){ 3656 void rtl8180_rq_tx_ack(struct net_device *dev){
3657 3657
3658 struct r8180_priv *priv = ieee80211_priv(dev); 3658 struct r8180_priv *priv = ieee80211_priv(dev);
3659 // printk("====================>%s\n",__func__); 3659 // printk("====================>%s\n",__func__);
3660 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT); 3660 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)|CONFIG4_PWRMGT);
3661 priv->ack_tx_to_ieee = 1; 3661 priv->ack_tx_to_ieee = 1;
3662 } 3662 }
3663 3663
3664 short rtl8180_is_tx_queue_empty(struct net_device *dev){ 3664 short rtl8180_is_tx_queue_empty(struct net_device *dev){
3665 3665
3666 struct r8180_priv *priv = ieee80211_priv(dev); 3666 struct r8180_priv *priv = ieee80211_priv(dev);
3667 u32* d; 3667 u32* d;
3668 3668
3669 for (d = priv->txmapring; 3669 for (d = priv->txmapring;
3670 d < priv->txmapring + priv->txringcount;d+=8) 3670 d < priv->txmapring + priv->txringcount;d+=8)
3671 if(*d & (1<<31)) return 0; 3671 if(*d & (1<<31)) return 0;
3672 3672
3673 for (d = priv->txbkpring; 3673 for (d = priv->txbkpring;
3674 d < priv->txbkpring + priv->txringcount;d+=8) 3674 d < priv->txbkpring + priv->txringcount;d+=8)
3675 if(*d & (1<<31)) return 0; 3675 if(*d & (1<<31)) return 0;
3676 3676
3677 for (d = priv->txbepring; 3677 for (d = priv->txbepring;
3678 d < priv->txbepring + priv->txringcount;d+=8) 3678 d < priv->txbepring + priv->txringcount;d+=8)
3679 if(*d & (1<<31)) return 0; 3679 if(*d & (1<<31)) return 0;
3680 3680
3681 for (d = priv->txvipring; 3681 for (d = priv->txvipring;
3682 d < priv->txvipring + priv->txringcount;d+=8) 3682 d < priv->txvipring + priv->txringcount;d+=8)
3683 if(*d & (1<<31)) return 0; 3683 if(*d & (1<<31)) return 0;
3684 3684
3685 for (d = priv->txvopring; 3685 for (d = priv->txvopring;
3686 d < priv->txvopring + priv->txringcount;d+=8) 3686 d < priv->txvopring + priv->txringcount;d+=8)
3687 if(*d & (1<<31)) return 0; 3687 if(*d & (1<<31)) return 0;
3688 3688
3689 for (d = priv->txhpring; 3689 for (d = priv->txhpring;
3690 d < priv->txhpring + priv->txringcount;d+=8) 3690 d < priv->txhpring + priv->txringcount;d+=8)
3691 if(*d & (1<<31)) return 0; 3691 if(*d & (1<<31)) return 0;
3692 return 1; 3692 return 1;
3693 } 3693 }
3694 /* FIXME FIXME 5msecs is random */ 3694 /* FIXME FIXME 5msecs is random */
3695 #define HW_WAKE_DELAY 5 3695 #define HW_WAKE_DELAY 5
3696 3696
3697 void rtl8180_hw_wakeup(struct net_device *dev) 3697 void rtl8180_hw_wakeup(struct net_device *dev)
3698 { 3698 {
3699 unsigned long flags; 3699 unsigned long flags;
3700 3700
3701 struct r8180_priv *priv = ieee80211_priv(dev); 3701 struct r8180_priv *priv = ieee80211_priv(dev);
3702 3702
3703 spin_lock_irqsave(&priv->ps_lock,flags); 3703 spin_lock_irqsave(&priv->ps_lock,flags);
3704 //DMESG("Waken up!"); 3704 //DMESG("Waken up!");
3705 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT); 3705 write_nic_byte(dev,CONFIG4,read_nic_byte(dev,CONFIG4)&~CONFIG4_PWRMGT);
3706 3706
3707 if(priv->rf_wakeup) 3707 if(priv->rf_wakeup)
3708 priv->rf_wakeup(dev); 3708 priv->rf_wakeup(dev);
3709 // mdelay(HW_WAKE_DELAY); 3709 // mdelay(HW_WAKE_DELAY);
3710 spin_unlock_irqrestore(&priv->ps_lock,flags); 3710 spin_unlock_irqrestore(&priv->ps_lock,flags);
3711 } 3711 }
3712 3712
3713 void rtl8180_hw_sleep_down(struct net_device *dev) 3713 void rtl8180_hw_sleep_down(struct net_device *dev)
3714 { 3714 {
3715 unsigned long flags; 3715 unsigned long flags;
3716 3716
3717 struct r8180_priv *priv = ieee80211_priv(dev); 3717 struct r8180_priv *priv = ieee80211_priv(dev);
3718 3718
3719 spin_lock_irqsave(&priv->ps_lock,flags); 3719 spin_lock_irqsave(&priv->ps_lock,flags);
3720 //DMESG("Sleep!"); 3720 //DMESG("Sleep!");
3721 3721
3722 if(priv->rf_sleep) 3722 if(priv->rf_sleep)
3723 priv->rf_sleep(dev); 3723 priv->rf_sleep(dev);
3724 spin_unlock_irqrestore(&priv->ps_lock,flags); 3724 spin_unlock_irqrestore(&priv->ps_lock,flags);
3725 } 3725 }
3726 3726
3727 3727
3728 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl) 3728 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
3729 { 3729 {
3730 3730
3731 struct r8180_priv *priv = ieee80211_priv(dev); 3731 struct r8180_priv *priv = ieee80211_priv(dev);
3732 3732
3733 u32 rb = jiffies; 3733 u32 rb = jiffies;
3734 unsigned long flags; 3734 unsigned long flags;
3735 3735
3736 spin_lock_irqsave(&priv->ps_lock,flags); 3736 spin_lock_irqsave(&priv->ps_lock,flags);
3737 3737
3738 /* Writing HW register with 0 equals to disable 3738 /* Writing HW register with 0 equals to disable
3739 * the timer, that is not really what we want 3739 * the timer, that is not really what we want
3740 */ 3740 */
3741 tl -= MSECS(4+16+7); 3741 tl -= MSECS(4+16+7);
3742 3742
3743 //if(tl == 0) tl = 1; 3743 //if(tl == 0) tl = 1;
3744 3744
3745 /* FIXME HACK FIXME HACK */ 3745 /* FIXME HACK FIXME HACK */
3746 // force_pci_posting(dev); 3746 // force_pci_posting(dev);
3747 //mdelay(1); 3747 //mdelay(1);
3748 3748
3749 // rb = read_nic_dword(dev, TSFTR); 3749 // rb = read_nic_dword(dev, TSFTR);
3750 3750
3751 /* If the interval in witch we are requested to sleep is too 3751 /* If the interval in witch we are requested to sleep is too
3752 * short then give up and remain awake 3752 * short then give up and remain awake
3753 */ 3753 */
3754 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME)) 3754 if(((tl>=rb)&& (tl-rb) <= MSECS(MIN_SLEEP_TIME))
3755 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) { 3755 ||((rb>tl)&& (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
3756 spin_unlock_irqrestore(&priv->ps_lock,flags); 3756 spin_unlock_irqrestore(&priv->ps_lock,flags);
3757 printk("too short to sleep\n"); 3757 printk("too short to sleep\n");
3758 return; 3758 return;
3759 } 3759 }
3760 3760
3761 // write_nic_dword(dev, TimerInt, tl); 3761 // write_nic_dword(dev, TimerInt, tl);
3762 // rb = read_nic_dword(dev, TSFTR); 3762 // rb = read_nic_dword(dev, TSFTR);
3763 { 3763 {
3764 u32 tmp = (tl>rb)?(tl-rb):(rb-tl); 3764 u32 tmp = (tl>rb)?(tl-rb):(rb-tl);
3765 // if (tl<rb) 3765 // if (tl<rb)
3766 3766
3767 //lzm,add,080828 3767 //lzm,add,080828
3768 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp); 3768 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
3769 3769
3770 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb 3770 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
3771 } 3771 }
3772 /* if we suspect the TimerInt is gone beyond tl 3772 /* if we suspect the TimerInt is gone beyond tl
3773 * while setting it, then give up 3773 * while setting it, then give up
3774 */ 3774 */
3775 #if 1 3775 #if 1
3776 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))|| 3776 if(((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME)))||
3777 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) { 3777 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
3778 spin_unlock_irqrestore(&priv->ps_lock,flags); 3778 spin_unlock_irqrestore(&priv->ps_lock,flags);
3779 return; 3779 return;
3780 } 3780 }
3781 #endif 3781 #endif
3782 // if(priv->rf_sleep) 3782 // if(priv->rf_sleep)
3783 // priv->rf_sleep(dev); 3783 // priv->rf_sleep(dev);
3784 3784
3785 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq); 3785 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
3786 spin_unlock_irqrestore(&priv->ps_lock,flags); 3786 spin_unlock_irqrestore(&priv->ps_lock,flags);
3787 } 3787 }
3788 3788
3789 3789
3790 //void rtl8180_wmm_param_update(struct net_device *dev,u8 *ac_param) 3790 //void rtl8180_wmm_param_update(struct net_device *dev,u8 *ac_param)
3791 #if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20) 3791 #if LINUX_VERSION_CODE >=KERNEL_VERSION(2,6,20)
3792 void rtl8180_wmm_param_update(struct work_struct * work) 3792 void rtl8180_wmm_param_update(struct work_struct * work)
3793 { 3793 {
3794 struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq); 3794 struct ieee80211_device * ieee = container_of(work, struct ieee80211_device,wmm_param_update_wq);
3795 //struct r8180_priv *priv = (struct r8180_priv*)(ieee->priv); 3795 //struct r8180_priv *priv = (struct r8180_priv*)(ieee->priv);
3796 struct net_device *dev = ieee->dev; 3796 struct net_device *dev = ieee->dev;
3797 #else 3797 #else
3798 void rtl8180_wmm_param_update(struct ieee80211_device *ieee) 3798 void rtl8180_wmm_param_update(struct ieee80211_device *ieee)
3799 { 3799 {
3800 struct net_device *dev = ieee->dev; 3800 struct net_device *dev = ieee->dev;
3801 struct r8180_priv *priv = ieee80211_priv(dev); 3801 struct r8180_priv *priv = ieee80211_priv(dev);
3802 #endif 3802 #endif
3803 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param); 3803 u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
3804 u8 mode = ieee->current_network.mode; 3804 u8 mode = ieee->current_network.mode;
3805 AC_CODING eACI; 3805 AC_CODING eACI;
3806 AC_PARAM AcParam; 3806 AC_PARAM AcParam;
3807 PAC_PARAM pAcParam; 3807 PAC_PARAM pAcParam;
3808 u8 i; 3808 u8 i;
3809 3809
3810 #ifndef CONFIG_RTL8185B 3810 #ifndef CONFIG_RTL8185B
3811 //for legacy 8185 keep the PARAM unchange. 3811 //for legacy 8185 keep the PARAM unchange.
3812 return; 3812 return;
3813 #else 3813 #else
3814 if(!ieee->current_network.QoS_Enable){ 3814 if(!ieee->current_network.QoS_Enable){
3815 //legacy ac_xx_param update 3815 //legacy ac_xx_param update
3816 AcParam.longData = 0; 3816 AcParam.longData = 0;
3817 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS. 3817 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
3818 AcParam.f.AciAifsn.f.ACM = 0; 3818 AcParam.f.AciAifsn.f.ACM = 0;
3819 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin. 3819 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
3820 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax. 3820 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
3821 AcParam.f.TXOPLimit = 0; 3821 AcParam.f.TXOPLimit = 0;
3822 for(eACI = 0; eACI < AC_MAX; eACI++){ 3822 for(eACI = 0; eACI < AC_MAX; eACI++){
3823 AcParam.f.AciAifsn.f.ACI = (u8)eACI; 3823 AcParam.f.AciAifsn.f.ACI = (u8)eACI;
3824 { 3824 {
3825 u8 u1bAIFS; 3825 u8 u1bAIFS;
3826 u32 u4bAcParam; 3826 u32 u4bAcParam;
3827 pAcParam = (PAC_PARAM)(&AcParam); 3827 pAcParam = (PAC_PARAM)(&AcParam);
3828 // Retrive paramters to udpate. 3828 // Retrive paramters to udpate.
3829 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime; 3829 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN *(((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3830 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)| 3830 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
3831 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)| 3831 (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
3832 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)| 3832 (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
3833 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET)); 3833 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3834 switch(eACI){ 3834 switch(eACI){
3835 case AC1_BK: 3835 case AC1_BK:
3836 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam); 3836 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3837 break; 3837 break;
3838 3838
3839 case AC0_BE: 3839 case AC0_BE:
3840 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam); 3840 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3841 break; 3841 break;
3842 3842
3843 case AC2_VI: 3843 case AC2_VI:
3844 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam); 3844 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3845 break; 3845 break;
3846 3846
3847 case AC3_VO: 3847 case AC3_VO:
3848 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam); 3848 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3849 break; 3849 break;
3850 3850
3851 default: 3851 default:
3852 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI); 3852 printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
3853 break; 3853 break;
3854 } 3854 }
3855 } 3855 }
3856 } 3856 }
3857 return; 3857 return;
3858 } 3858 }
3859 3859
3860 for(i = 0; i < AC_MAX; i++){ 3860 for(i = 0; i < AC_MAX; i++){
3861 //AcParam.longData = 0; 3861 //AcParam.longData = 0;
3862 pAcParam = (AC_PARAM * )ac_param; 3862 pAcParam = (AC_PARAM * )ac_param;
3863 { 3863 {
3864 AC_CODING eACI; 3864 AC_CODING eACI;
3865 u8 u1bAIFS; 3865 u8 u1bAIFS;
3866 u32 u4bAcParam; 3866 u32 u4bAcParam;
3867 3867
3868 // Retrive paramters to udpate. 3868 // Retrive paramters to udpate.
3869 eACI = pAcParam->f.AciAifsn.f.ACI; 3869 eACI = pAcParam->f.AciAifsn.f.ACI;
3870 //Mode G/A: slotTimeTimer = 9; Mode B: 20 3870 //Mode G/A: slotTimeTimer = 9; Mode B: 20
3871 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime; 3871 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G)?9:20) + aSifsTime;
3872 u4bAcParam = ( (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) | 3872 u4bAcParam = ( (((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET) |
3873 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) | 3873 (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET) |
3874 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) | 3874 (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET) |
3875 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET)); 3875 (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
3876 3876
3877 switch(eACI){ 3877 switch(eACI){
3878 case AC1_BK: 3878 case AC1_BK:
3879 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam); 3879 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
3880 break; 3880 break;
3881 3881
3882 case AC0_BE: 3882 case AC0_BE:
3883 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam); 3883 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
3884 break; 3884 break;
3885 3885
3886 case AC2_VI: 3886 case AC2_VI:
3887 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam); 3887 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
3888 break; 3888 break;
3889 3889
3890 case AC3_VO: 3890 case AC3_VO:
3891 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam); 3891 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
3892 break; 3892 break;
3893 3893
3894 default: 3894 default:
3895 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI); 3895 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
3896 break; 3896 break;
3897 } 3897 }
3898 } 3898 }
3899 ac_param += (sizeof(AC_PARAM)); 3899 ac_param += (sizeof(AC_PARAM));
3900 } 3900 }
3901 #endif 3901 #endif
3902 } 3902 }
3903 3903
3904 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 3904 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3905 void rtl8180_tx_irq_wq(struct work_struct *work); 3905 void rtl8180_tx_irq_wq(struct work_struct *work);
3906 #else 3906 #else
3907 void rtl8180_tx_irq_wq(struct net_device *dev); 3907 void rtl8180_tx_irq_wq(struct net_device *dev);
3908 #endif 3908 #endif
3909 3909
3910 3910
3911 3911
3912 3912
3913 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 3913 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3914 void rtl8180_restart_wq(struct work_struct *work); 3914 void rtl8180_restart_wq(struct work_struct *work);
3915 //void rtl8180_rq_tx_ack(struct work_struct *work); 3915 //void rtl8180_rq_tx_ack(struct work_struct *work);
3916 #else 3916 #else
3917 void rtl8180_restart_wq(struct net_device *dev); 3917 void rtl8180_restart_wq(struct net_device *dev);
3918 //void rtl8180_rq_tx_ack(struct net_device *dev); 3918 //void rtl8180_rq_tx_ack(struct net_device *dev);
3919 #endif 3919 #endif
3920 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 3920 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3921 void rtl8180_watch_dog_wq(struct work_struct *work); 3921 void rtl8180_watch_dog_wq(struct work_struct *work);
3922 #else 3922 #else
3923 void rtl8180_watch_dog_wq(struct net_device *dev); 3923 void rtl8180_watch_dog_wq(struct net_device *dev);
3924 #endif 3924 #endif
3925 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 3925 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3926 void rtl8180_hw_wakeup_wq(struct work_struct *work); 3926 void rtl8180_hw_wakeup_wq(struct work_struct *work);
3927 #else 3927 #else
3928 void rtl8180_hw_wakeup_wq(struct net_device *dev); 3928 void rtl8180_hw_wakeup_wq(struct net_device *dev);
3929 #endif 3929 #endif
3930 3930
3931 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 3931 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3932 void rtl8180_hw_sleep_wq(struct work_struct *work); 3932 void rtl8180_hw_sleep_wq(struct work_struct *work);
3933 #else 3933 #else
3934 void rtl8180_hw_sleep_wq(struct net_device *dev); 3934 void rtl8180_hw_sleep_wq(struct net_device *dev);
3935 #endif 3935 #endif
3936 3936
3937 3937
3938 3938
3939 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 3939 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
3940 void rtl8180_sw_antenna_wq(struct work_struct *work); 3940 void rtl8180_sw_antenna_wq(struct work_struct *work);
3941 #else 3941 #else
3942 void rtl8180_sw_antenna_wq(struct net_device *dev); 3942 void rtl8180_sw_antenna_wq(struct net_device *dev);
3943 #endif 3943 #endif
3944 void rtl8180_watch_dog(struct net_device *dev); 3944 void rtl8180_watch_dog(struct net_device *dev);
3945 void watch_dog_adaptive(unsigned long data) 3945 void watch_dog_adaptive(unsigned long data)
3946 { 3946 {
3947 struct r8180_priv* priv = ieee80211_priv((struct net_device *)data); 3947 struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
3948 // DMESG("---->watch_dog_adaptive()\n"); 3948 // DMESG("---->watch_dog_adaptive()\n");
3949 if(!priv->up) 3949 if(!priv->up)
3950 { 3950 {
3951 DMESG("<----watch_dog_adaptive():driver is not up!\n"); 3951 DMESG("<----watch_dog_adaptive():driver is not up!\n");
3952 return; 3952 return;
3953 } 3953 }
3954 3954
3955 // queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq); 3955 // queue_work(priv->ieee80211->wq,&priv->ieee80211->watch_dog_wq);
3956 //{by amy 080312 3956 //{by amy 080312
3957 #if 1 3957 #if 1
3958 // Tx High Power Mechanism. 3958 // Tx High Power Mechanism.
3959 #ifdef HIGH_POWER 3959 #ifdef HIGH_POWER
3960 if(CheckHighPower((struct net_device *)data)) 3960 if(CheckHighPower((struct net_device *)data))
3961 { 3961 {
3962 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq); 3962 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
3963 } 3963 }
3964 #endif 3964 #endif
3965 3965
3966 #ifdef CONFIG_RTL818X_S 3966 #ifdef CONFIG_RTL818X_S
3967 // Tx Power Tracking on 87SE. 3967 // Tx Power Tracking on 87SE.
3968 #ifdef TX_TRACK 3968 #ifdef TX_TRACK
3969 //if( priv->bTxPowerTrack ) //lzm mod 080826 3969 //if( priv->bTxPowerTrack ) //lzm mod 080826
3970 if( CheckTxPwrTracking((struct net_device *)data)); 3970 if( CheckTxPwrTracking((struct net_device *)data));
3971 TxPwrTracking87SE((struct net_device *)data); 3971 TxPwrTracking87SE((struct net_device *)data);
3972 #endif 3972 #endif
3973 #endif 3973 #endif
3974 3974
3975 // Perform DIG immediately. 3975 // Perform DIG immediately.
3976 #ifdef SW_DIG 3976 #ifdef SW_DIG
3977 if(CheckDig((struct net_device *)data) == true) 3977 if(CheckDig((struct net_device *)data) == true)
3978 { 3978 {
3979 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq); 3979 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
3980 } 3980 }
3981 #endif 3981 #endif
3982 #endif 3982 #endif
3983 //by amy 080312} 3983 //by amy 080312}
3984 rtl8180_watch_dog((struct net_device *)data); 3984 rtl8180_watch_dog((struct net_device *)data);
3985 3985
3986 3986
3987 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem); 3987 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
3988 3988
3989 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME); 3989 priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
3990 add_timer(&priv->watch_dog_timer); 3990 add_timer(&priv->watch_dog_timer);
3991 // DMESG("<----watch_dog_adaptive()\n"); 3991 // DMESG("<----watch_dog_adaptive()\n");
3992 } 3992 }
3993 3993
3994 #ifdef ENABLE_DOT11D 3994 #ifdef ENABLE_DOT11D
3995 3995
3996 static CHANNEL_LIST ChannelPlan[] = { 3996 static CHANNEL_LIST ChannelPlan[] = {
3997 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, //FCC 3997 {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, //FCC
3998 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC 3998 {{1,2,3,4,5,6,7,8,9,10,11},11}, //IC
3999 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI 3999 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //ETSI
4000 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Spain. Change to ETSI. 4000 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Spain. Change to ETSI.
4001 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //France. Change to ETSI. 4001 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //France. Change to ETSI.
4002 {{14,36,40,44,48,52,56,60,64},9}, //MKK 4002 {{14,36,40,44,48,52,56,60,64},9}, //MKK
4003 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1 4003 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
4004 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Israel. 4004 {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, //Israel.
4005 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, // For 11a , TELEC 4005 {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17}, // For 11a , TELEC
4006 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 4006 {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
4007 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 4007 {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
4008 }; 4008 };
4009 4009
4010 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee) 4010 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
4011 { 4011 {
4012 int i; 4012 int i;
4013 4013
4014 //lzm add 080826 4014 //lzm add 080826
4015 ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1; 4015 ieee->MinPassiveChnlNum=MAX_CHANNEL_NUMBER+1;
4016 ieee->IbssStartChnl=0; 4016 ieee->IbssStartChnl=0;
4017 4017
4018 switch (channel_plan) 4018 switch (channel_plan)
4019 { 4019 {
4020 case COUNTRY_CODE_FCC: 4020 case COUNTRY_CODE_FCC:
4021 case COUNTRY_CODE_IC: 4021 case COUNTRY_CODE_IC:
4022 case COUNTRY_CODE_ETSI: 4022 case COUNTRY_CODE_ETSI:
4023 case COUNTRY_CODE_SPAIN: 4023 case COUNTRY_CODE_SPAIN:
4024 case COUNTRY_CODE_FRANCE: 4024 case COUNTRY_CODE_FRANCE:
4025 case COUNTRY_CODE_MKK: 4025 case COUNTRY_CODE_MKK:
4026 case COUNTRY_CODE_MKK1: 4026 case COUNTRY_CODE_MKK1:
4027 case COUNTRY_CODE_ISRAEL: 4027 case COUNTRY_CODE_ISRAEL:
4028 case COUNTRY_CODE_TELEC: 4028 case COUNTRY_CODE_TELEC:
4029 { 4029 {
4030 Dot11d_Init(ieee); 4030 Dot11d_Init(ieee);
4031 ieee->bGlobalDomain = false; 4031 ieee->bGlobalDomain = false;
4032 if (ChannelPlan[channel_plan].Len != 0){ 4032 if (ChannelPlan[channel_plan].Len != 0){
4033 // Clear old channel map 4033 // Clear old channel map
4034 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map)); 4034 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
4035 // Set new channel map 4035 // Set new channel map
4036 for (i=0;i<ChannelPlan[channel_plan].Len;i++) 4036 for (i=0;i<ChannelPlan[channel_plan].Len;i++)
4037 { 4037 {
4038 if(ChannelPlan[channel_plan].Channel[i] <= 14) 4038 if(ChannelPlan[channel_plan].Channel[i] <= 14)
4039 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1; 4039 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
4040 } 4040 }
4041 } 4041 }
4042 break; 4042 break;
4043 } 4043 }
4044 case COUNTRY_CODE_GLOBAL_DOMAIN: 4044 case COUNTRY_CODE_GLOBAL_DOMAIN:
4045 { 4045 {
4046 GET_DOT11D_INFO(ieee)->bEnabled = 0; 4046 GET_DOT11D_INFO(ieee)->bEnabled = 0;
4047 Dot11d_Reset(ieee); 4047 Dot11d_Reset(ieee);
4048 ieee->bGlobalDomain = true; 4048 ieee->bGlobalDomain = true;
4049 break; 4049 break;
4050 } 4050 }
4051 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826 4051 case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
4052 { 4052 {
4053 ieee->MinPassiveChnlNum=12; 4053 ieee->MinPassiveChnlNum=12;
4054 ieee->IbssStartChnl= 10; 4054 ieee->IbssStartChnl= 10;
4055 break; 4055 break;
4056 } 4056 }
4057 default: 4057 default:
4058 { 4058 {
4059 Dot11d_Init(ieee); 4059 Dot11d_Init(ieee);
4060 ieee->bGlobalDomain = false; 4060 ieee->bGlobalDomain = false;
4061 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map)); 4061 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
4062 for (i=1;i<=14;i++) 4062 for (i=1;i<=14;i++)
4063 { 4063 {
4064 GET_DOT11D_INFO(ieee)->channel_map[i] = 1; 4064 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
4065 } 4065 }
4066 break; 4066 break;
4067 } 4067 }
4068 } 4068 }
4069 } 4069 }
4070 #endif 4070 #endif
4071 4071
4072 //Add for RF power on power off by lizhaoming 080512 4072 //Add for RF power on power off by lizhaoming 080512
4073 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 4073 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
4074 void GPIOChangeRFWorkItemCallBack(struct work_struct *work); 4074 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
4075 #else 4075 #else
4076 void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee); 4076 void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee);
4077 #endif 4077 #endif
4078 4078
4079 //YJ,add,080828 4079 //YJ,add,080828
4080 static void rtl8180_statistics_init(struct Stats *pstats) 4080 static void rtl8180_statistics_init(struct Stats *pstats)
4081 { 4081 {
4082 memset(pstats, 0, sizeof(struct Stats)); 4082 memset(pstats, 0, sizeof(struct Stats));
4083 } 4083 }
4084 static void rtl8180_link_detect_init(plink_detect_t plink_detect) 4084 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
4085 { 4085 {
4086 memset(plink_detect, 0, sizeof(link_detect_t)); 4086 memset(plink_detect, 0, sizeof(link_detect_t));
4087 plink_detect->SlotNum = DEFAULT_SLOT_NUM; 4087 plink_detect->SlotNum = DEFAULT_SLOT_NUM;
4088 } 4088 }
4089 //YJ,add,080828,end 4089 //YJ,add,080828,end
4090 4090
4091 short rtl8180_init(struct net_device *dev) 4091 short rtl8180_init(struct net_device *dev)
4092 { 4092 {
4093 struct r8180_priv *priv = ieee80211_priv(dev); 4093 struct r8180_priv *priv = ieee80211_priv(dev);
4094 u16 word; 4094 u16 word;
4095 u16 version; 4095 u16 version;
4096 u8 hw_version; 4096 u8 hw_version;
4097 //u8 config3; 4097 //u8 config3;
4098 u32 usValue; 4098 u32 usValue;
4099 u16 tmpu16; 4099 u16 tmpu16;
4100 int i, j; 4100 int i, j;
4101 4101
4102 #ifdef ENABLE_DOT11D 4102 #ifdef ENABLE_DOT11D
4103 #if 0 4103 #if 0
4104 for(i=0;i<0xFF;i++) { 4104 for(i=0;i<0xFF;i++) {
4105 if(i%16 == 0) 4105 if(i%16 == 0)
4106 printk("\n[%x]: ", i/16); 4106 printk("\n[%x]: ", i/16);
4107 printk("\t%4.4x", eprom_read(dev,i)); 4107 printk("\t%4.4x", eprom_read(dev,i));
4108 } 4108 }
4109 #endif 4109 #endif
4110 priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF; 4110 priv->channel_plan = eprom_read(dev, EEPROM_COUNTRY_CODE>>1) & 0xFF;
4111 if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){ 4111 if(priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN){
4112 printk("rtl8180_init:Error channel plan! Set to default.\n"); 4112 printk("rtl8180_init:Error channel plan! Set to default.\n");
4113 priv->channel_plan = 0; 4113 priv->channel_plan = 0;
4114 } 4114 }
4115 //priv->channel_plan = 9; //Global Domain 4115 //priv->channel_plan = 9; //Global Domain
4116 4116
4117 DMESG("Channel plan is %d\n",priv->channel_plan); 4117 DMESG("Channel plan is %d\n",priv->channel_plan);
4118 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211); 4118 rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
4119 #else 4119 #else
4120 int ch; 4120 int ch;
4121 //Set Default Channel Plan 4121 //Set Default Channel Plan
4122 if(!channels){ 4122 if(!channels){
4123 DMESG("No channels, aborting"); 4123 DMESG("No channels, aborting");
4124 return -1; 4124 return -1;
4125 } 4125 }
4126 ch=channels; 4126 ch=channels;
4127 priv->channel_plan = 0;//hikaru 4127 priv->channel_plan = 0;//hikaru
4128 // set channels 1..14 allowed in given locale 4128 // set channels 1..14 allowed in given locale
4129 for (i=1; i<=14; i++) { 4129 for (i=1; i<=14; i++) {
4130 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01); 4130 (priv->ieee80211->channel_map)[i] = (u8)(ch & 0x01);
4131 ch >>= 1; 4131 ch >>= 1;
4132 } 4132 }
4133 #endif 4133 #endif
4134 4134
4135 //memcpy(priv->stats,0,sizeof(struct Stats)); 4135 //memcpy(priv->stats,0,sizeof(struct Stats));
4136 4136
4137 //FIXME: these constants are placed in a bad pleace. 4137 //FIXME: these constants are placed in a bad pleace.
4138 priv->txbuffsize = 2048;//1024; 4138 priv->txbuffsize = 2048;//1024;
4139 priv->txringcount = 32;//32; 4139 priv->txringcount = 32;//32;
4140 priv->rxbuffersize = 2048;//1024; 4140 priv->rxbuffersize = 2048;//1024;
4141 priv->rxringcount = 64;//32; 4141 priv->rxringcount = 64;//32;
4142 priv->txbeaconcount = 2; 4142 priv->txbeaconcount = 2;
4143 priv->rx_skb_complete = 1; 4143 priv->rx_skb_complete = 1;
4144 //priv->txnp_pending.ispending=0; 4144 //priv->txnp_pending.ispending=0;
4145 /* ^^ the SKB does not containt a partial RXed 4145 /* ^^ the SKB does not containt a partial RXed
4146 * packet (is empty) 4146 * packet (is empty)
4147 */ 4147 */
4148 4148
4149 #ifdef CONFIG_RTL8185B 4149 #ifdef CONFIG_RTL8185B
4150 #ifdef CONFIG_RTL818X_S 4150 #ifdef CONFIG_RTL818X_S
4151 priv->RegThreeWireMode = HW_THREE_WIRE_SI; 4151 priv->RegThreeWireMode = HW_THREE_WIRE_SI;
4152 #else 4152 #else
4153 priv->RegThreeWireMode = SW_THREE_WIRE; 4153 priv->RegThreeWireMode = SW_THREE_WIRE;
4154 #endif 4154 #endif
4155 #endif 4155 #endif
4156 4156
4157 //Add for RF power on power off by lizhaoming 080512 4157 //Add for RF power on power off by lizhaoming 080512
4158 priv->RFChangeInProgress = false; 4158 priv->RFChangeInProgress = false;
4159 priv->SetRFPowerStateInProgress = false; 4159 priv->SetRFPowerStateInProgress = false;
4160 priv->RFProgType = 0; 4160 priv->RFProgType = 0;
4161 priv->bInHctTest = false; 4161 priv->bInHctTest = false;
4162 4162
4163 priv->irq_enabled=0; 4163 priv->irq_enabled=0;
4164 4164
4165 //YJ,modified,080828 4165 //YJ,modified,080828
4166 #if 0 4166 #if 0
4167 priv->stats.rxdmafail=0; 4167 priv->stats.rxdmafail=0;
4168 priv->stats.txrdu=0; 4168 priv->stats.txrdu=0;
4169 priv->stats.rxrdu=0; 4169 priv->stats.rxrdu=0;
4170 priv->stats.rxnolast=0; 4170 priv->stats.rxnolast=0;
4171 priv->stats.rxnodata=0; 4171 priv->stats.rxnodata=0;
4172 //priv->stats.rxreset=0; 4172 //priv->stats.rxreset=0;
4173 //priv->stats.rxwrkaround=0; 4173 //priv->stats.rxwrkaround=0;
4174 priv->stats.rxnopointer=0; 4174 priv->stats.rxnopointer=0;
4175 priv->stats.txnperr=0; 4175 priv->stats.txnperr=0;
4176 priv->stats.txresumed=0; 4176 priv->stats.txresumed=0;
4177 priv->stats.rxerr=0; 4177 priv->stats.rxerr=0;
4178 priv->stats.rxoverflow=0; 4178 priv->stats.rxoverflow=0;
4179 priv->stats.rxint=0; 4179 priv->stats.rxint=0;
4180 priv->stats.txnpokint=0; 4180 priv->stats.txnpokint=0;
4181 priv->stats.txhpokint=0; 4181 priv->stats.txhpokint=0;
4182 priv->stats.txhperr=0; 4182 priv->stats.txhperr=0;
4183 priv->stats.ints=0; 4183 priv->stats.ints=0;
4184 priv->stats.shints=0; 4184 priv->stats.shints=0;
4185 priv->stats.txoverflow=0; 4185 priv->stats.txoverflow=0;
4186 priv->stats.txbeacon=0; 4186 priv->stats.txbeacon=0;
4187 priv->stats.txbeaconerr=0; 4187 priv->stats.txbeaconerr=0;
4188 priv->stats.txlperr=0; 4188 priv->stats.txlperr=0;
4189 priv->stats.txlpokint=0; 4189 priv->stats.txlpokint=0;
4190 priv->stats.txretry=0;//tony 20060601 4190 priv->stats.txretry=0;//tony 20060601
4191 priv->stats.rxcrcerrmin=0; 4191 priv->stats.rxcrcerrmin=0;
4192 priv->stats.rxcrcerrmid=0; 4192 priv->stats.rxcrcerrmid=0;
4193 priv->stats.rxcrcerrmax=0; 4193 priv->stats.rxcrcerrmax=0;
4194 priv->stats.rxicverr=0; 4194 priv->stats.rxicverr=0;
4195 #else 4195 #else
4196 rtl8180_statistics_init(&priv->stats); 4196 rtl8180_statistics_init(&priv->stats);
4197 rtl8180_link_detect_init(&priv->link_detect); 4197 rtl8180_link_detect_init(&priv->link_detect);
4198 #endif 4198 #endif
4199 //YJ,modified,080828,end 4199 //YJ,modified,080828,end
4200 4200
4201 4201
4202 priv->ack_tx_to_ieee = 0; 4202 priv->ack_tx_to_ieee = 0;
4203 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL; 4203 priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
4204 priv->ieee80211->iw_mode = IW_MODE_INFRA; 4204 priv->ieee80211->iw_mode = IW_MODE_INFRA;
4205 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN | 4205 priv->ieee80211->softmac_features = IEEE_SOFTMAC_SCAN |
4206 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ | 4206 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
4207 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE; 4207 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
4208 priv->ieee80211->active_scan = 1; 4208 priv->ieee80211->active_scan = 1;
4209 priv->ieee80211->rate = 110; //11 mbps 4209 priv->ieee80211->rate = 110; //11 mbps
4210 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION; 4210 priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
4211 priv->ieee80211->host_encrypt = 1; 4211 priv->ieee80211->host_encrypt = 1;
4212 priv->ieee80211->host_decrypt = 1; 4212 priv->ieee80211->host_decrypt = 1;
4213 priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup; 4213 priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
4214 priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack; 4214 priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
4215 priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep; 4215 priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
4216 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty; 4216 priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
4217 4217
4218 priv->hw_wep = hwwep; 4218 priv->hw_wep = hwwep;
4219 priv->prism_hdr=0; 4219 priv->prism_hdr=0;
4220 priv->dev=dev; 4220 priv->dev=dev;
4221 priv->retry_rts = DEFAULT_RETRY_RTS; 4221 priv->retry_rts = DEFAULT_RETRY_RTS;
4222 priv->retry_data = DEFAULT_RETRY_DATA; 4222 priv->retry_data = DEFAULT_RETRY_DATA;
4223 priv->RFChangeInProgress = false; 4223 priv->RFChangeInProgress = false;
4224 priv->SetRFPowerStateInProgress = false; 4224 priv->SetRFPowerStateInProgress = false;
4225 priv->RFProgType = 0; 4225 priv->RFProgType = 0;
4226 priv->bInHctTest = false; 4226 priv->bInHctTest = false;
4227 priv->bInactivePs = true;//false; 4227 priv->bInactivePs = true;//false;
4228 priv->ieee80211->bInactivePs = priv->bInactivePs; 4228 priv->ieee80211->bInactivePs = priv->bInactivePs;
4229 priv->bSwRfProcessing = false; 4229 priv->bSwRfProcessing = false;
4230 priv->eRFPowerState = eRfOff; 4230 priv->eRFPowerState = eRfOff;
4231 priv->RfOffReason = 0; 4231 priv->RfOffReason = 0;
4232 priv->LedStrategy = SW_LED_MODE0; 4232 priv->LedStrategy = SW_LED_MODE0;
4233 //priv->NumRxOkInPeriod = 0; //YJ,del,080828 4233 //priv->NumRxOkInPeriod = 0; //YJ,del,080828
4234 //priv->NumTxOkInPeriod = 0; //YJ,del,080828 4234 //priv->NumTxOkInPeriod = 0; //YJ,del,080828
4235 priv->TxPollingTimes = 0;//lzm add 080826 4235 priv->TxPollingTimes = 0;//lzm add 080826
4236 priv->bLeisurePs = true; 4236 priv->bLeisurePs = true;
4237 priv->dot11PowerSaveMode = eActive; 4237 priv->dot11PowerSaveMode = eActive;
4238 //by amy for antenna 4238 //by amy for antenna
4239 priv->AdMinCheckPeriod = 5; 4239 priv->AdMinCheckPeriod = 5;
4240 priv->AdMaxCheckPeriod = 10; 4240 priv->AdMaxCheckPeriod = 10;
4241 // Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312 4241 // Lower signal strength threshold to fit the HW participation in antenna diversity. +by amy 080312
4242 priv->AdMaxRxSsThreshold = 30;//60->30 4242 priv->AdMaxRxSsThreshold = 30;//60->30
4243 priv->AdRxSsThreshold = 20;//50->20 4243 priv->AdRxSsThreshold = 20;//50->20
4244 priv->AdCheckPeriod = priv->AdMinCheckPeriod; 4244 priv->AdCheckPeriod = priv->AdMinCheckPeriod;
4245 priv->AdTickCount = 0; 4245 priv->AdTickCount = 0;
4246 priv->AdRxSignalStrength = -1; 4246 priv->AdRxSignalStrength = -1;
4247 priv->RegSwAntennaDiversityMechanism = 0; 4247 priv->RegSwAntennaDiversityMechanism = 0;
4248 priv->RegDefaultAntenna = 0; 4248 priv->RegDefaultAntenna = 0;
4249 priv->SignalStrength = 0; 4249 priv->SignalStrength = 0;
4250 priv->AdRxOkCnt = 0; 4250 priv->AdRxOkCnt = 0;
4251 priv->CurrAntennaIndex = 0; 4251 priv->CurrAntennaIndex = 0;
4252 priv->AdRxSsBeforeSwitched = 0; 4252 priv->AdRxSsBeforeSwitched = 0;
4253 init_timer(&priv->SwAntennaDiversityTimer); 4253 init_timer(&priv->SwAntennaDiversityTimer);
4254 priv->SwAntennaDiversityTimer.data = (unsigned long)dev; 4254 priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
4255 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback; 4255 priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
4256 //by amy for antenna 4256 //by amy for antenna
4257 //{by amy 080312 4257 //{by amy 080312
4258 priv->bDigMechanism = 1; 4258 priv->bDigMechanism = 1;
4259 priv->InitialGain = 6; 4259 priv->InitialGain = 6;
4260 priv->bXtalCalibration = false; 4260 priv->bXtalCalibration = false;
4261 priv->XtalCal_Xin = 0; 4261 priv->XtalCal_Xin = 0;
4262 priv->XtalCal_Xout = 0; 4262 priv->XtalCal_Xout = 0;
4263 priv->bTxPowerTrack = false; 4263 priv->bTxPowerTrack = false;
4264 priv->ThermalMeter = 0; 4264 priv->ThermalMeter = 0;
4265 priv->FalseAlarmRegValue = 0; 4265 priv->FalseAlarmRegValue = 0;
4266 priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG. 4266 priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
4267 priv->DIG_NumberFallbackVote = 0; 4267 priv->DIG_NumberFallbackVote = 0;
4268 priv->DIG_NumberUpgradeVote = 0; 4268 priv->DIG_NumberUpgradeVote = 0;
4269 priv->LastSignalStrengthInPercent = 0; 4269 priv->LastSignalStrengthInPercent = 0;
4270 priv->Stats_SignalStrength = 0; 4270 priv->Stats_SignalStrength = 0;
4271 priv->LastRxPktAntenna = 0; 4271 priv->LastRxPktAntenna = 0;
4272 priv->SignalQuality = 0; // in 0-100 index. 4272 priv->SignalQuality = 0; // in 0-100 index.
4273 priv->Stats_SignalQuality = 0; 4273 priv->Stats_SignalQuality = 0;
4274 priv->RecvSignalPower = 0; // in dBm. 4274 priv->RecvSignalPower = 0; // in dBm.
4275 priv->Stats_RecvSignalPower = 0; 4275 priv->Stats_RecvSignalPower = 0;
4276 priv->AdMainAntennaRxOkCnt = 0; 4276 priv->AdMainAntennaRxOkCnt = 0;
4277 priv->AdAuxAntennaRxOkCnt = 0; 4277 priv->AdAuxAntennaRxOkCnt = 0;
4278 priv->bHWAdSwitched = false; 4278 priv->bHWAdSwitched = false;
4279 priv->bRegHighPowerMechanism = true; 4279 priv->bRegHighPowerMechanism = true;
4280 priv->RegHiPwrUpperTh = 77; 4280 priv->RegHiPwrUpperTh = 77;
4281 priv->RegHiPwrLowerTh = 75; 4281 priv->RegHiPwrLowerTh = 75;
4282 priv->RegRSSIHiPwrUpperTh = 70; 4282 priv->RegRSSIHiPwrUpperTh = 70;
4283 priv->RegRSSIHiPwrLowerTh = 20; 4283 priv->RegRSSIHiPwrLowerTh = 20;
4284 priv->bCurCCKPkt = false; 4284 priv->bCurCCKPkt = false;
4285 priv->UndecoratedSmoothedSS = -1; 4285 priv->UndecoratedSmoothedSS = -1;
4286 priv->bToUpdateTxPwr = false; 4286 priv->bToUpdateTxPwr = false;
4287 priv->CurCCKRSSI = 0; 4287 priv->CurCCKRSSI = 0;
4288 priv->RxPower = 0; 4288 priv->RxPower = 0;
4289 priv->RSSI = 0; 4289 priv->RSSI = 0;
4290 //YJ,add,080828 4290 //YJ,add,080828
4291 priv->NumTxOkTotal = 0; 4291 priv->NumTxOkTotal = 0;
4292 priv->NumTxUnicast = 0; 4292 priv->NumTxUnicast = 0;
4293 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL; 4293 priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
4294 priv->PowerProfile = POWER_PROFILE_AC; 4294 priv->PowerProfile = POWER_PROFILE_AC;
4295 //YJ,add,080828,end 4295 //YJ,add,080828,end
4296 //by amy for rate adaptive 4296 //by amy for rate adaptive
4297 priv->CurrRetryCnt=0; 4297 priv->CurrRetryCnt=0;
4298 priv->LastRetryCnt=0; 4298 priv->LastRetryCnt=0;
4299 priv->LastTxokCnt=0; 4299 priv->LastTxokCnt=0;
4300 priv->LastRxokCnt=0; 4300 priv->LastRxokCnt=0;
4301 priv->LastRetryRate=0; 4301 priv->LastRetryRate=0;
4302 priv->bTryuping=0; 4302 priv->bTryuping=0;
4303 priv->CurrTxRate=0; 4303 priv->CurrTxRate=0;
4304 priv->CurrRetryRate=0; 4304 priv->CurrRetryRate=0;
4305 priv->TryupingCount=0; 4305 priv->TryupingCount=0;
4306 priv->TryupingCountNoData=0; 4306 priv->TryupingCountNoData=0;
4307 priv->TryDownCountLowData=0; 4307 priv->TryDownCountLowData=0;
4308 priv->LastTxOKBytes=0; 4308 priv->LastTxOKBytes=0;
4309 priv->LastFailTxRate=0; 4309 priv->LastFailTxRate=0;
4310 priv->LastFailTxRateSS=0; 4310 priv->LastFailTxRateSS=0;
4311 priv->FailTxRateCount=0; 4311 priv->FailTxRateCount=0;
4312 priv->LastTxThroughput=0; 4312 priv->LastTxThroughput=0;
4313 priv->NumTxOkBytesTotal=0; 4313 priv->NumTxOkBytesTotal=0;
4314 priv->ForcedDataRate = 0; 4314 priv->ForcedDataRate = 0;
4315 priv->RegBModeGainStage = 1; 4315 priv->RegBModeGainStage = 1;
4316 4316
4317 //by amy for rate adaptive 4317 //by amy for rate adaptive
4318 //by amy 080312} 4318 //by amy 080312}
4319 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0; 4319 priv->promisc = (dev->flags & IFF_PROMISC) ? 1:0;
4320 spin_lock_init(&priv->irq_lock); 4320 spin_lock_init(&priv->irq_lock);
4321 spin_lock_init(&priv->irq_th_lock); 4321 spin_lock_init(&priv->irq_th_lock);
4322 spin_lock_init(&priv->tx_lock); 4322 spin_lock_init(&priv->tx_lock);
4323 spin_lock_init(&priv->ps_lock); 4323 spin_lock_init(&priv->ps_lock);
4324 spin_lock_init(&priv->rf_ps_lock); 4324 spin_lock_init(&priv->rf_ps_lock);
4325 sema_init(&priv->wx_sem,1); 4325 sema_init(&priv->wx_sem,1);
4326 sema_init(&priv->rf_state,1); 4326 sema_init(&priv->rf_state,1);
4327 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 4327 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
4328 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq); 4328 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq);
4329 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq); 4329 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq);
4330 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq); 4330 INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq);
4331 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq); 4331 INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq);
4332 //INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq); 4332 //INIT_DELAYED_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq);
4333 //INIT_DELAYED_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq); 4333 //INIT_DELAYED_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq);
4334 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update); 4334 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update);
4335 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312 4335 INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter);//+by amy 080312
4336 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312 4336 INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq);//+by amy 080312
4337 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312 4337 INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq);//+by amy 080312
4338 4338
4339 //add for RF power on power off by lizhaoming 080512 4339 //add for RF power on power off by lizhaoming 080512
4340 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack); 4340 INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack);
4341 #else 4341 #else
4342 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev); 4342 INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4343 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq,dev); 4343 INIT_WORK(&priv->tx_irq_wq,(void*) rtl8180_tx_irq_wq,dev);
4344 //INIT_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq,dev); 4344 //INIT_WORK(&priv->ieee80211->watch_dog_wq,(void*) rtl8180_watch_dog_wq,dev);
4345 INIT_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq,dev); 4345 INIT_WORK(&priv->ieee80211->hw_wakeup_wq,(void*) rtl8180_hw_wakeup_wq,dev);
4346 INIT_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq,dev); 4346 INIT_WORK(&priv->ieee80211->hw_sleep_wq,(void*) rtl8180_hw_sleep_wq,dev);
4347 //INIT_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq,dev); 4347 //INIT_WORK(&priv->ieee80211->sw_antenna_wq,(void*) rtl8180_sw_antenna_wq,dev);
4348 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update,priv->ieee80211); 4348 INIT_WORK(&priv->ieee80211->wmm_param_update_wq,(void*) rtl8180_wmm_param_update,priv->ieee80211);
4349 INIT_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter,dev);//+by amy 080312 4349 INIT_WORK(&priv->ieee80211->rate_adapter_wq,(void*)rtl8180_rate_adapter,dev);//+by amy 080312
4350 INIT_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq,dev);//+by amy 080312 4350 INIT_WORK(&priv->ieee80211->hw_dig_wq,(void*)rtl8180_hw_dig_wq,dev);//+by amy 080312
4351 INIT_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq,dev);//+by amy 080312 4351 INIT_WORK(&priv->ieee80211->tx_pw_wq,(void*)rtl8180_tx_pw_wq,dev);//+by amy 080312
4352 4352
4353 //add for RF power on power off by lizhaoming 080512 4353 //add for RF power on power off by lizhaoming 080512
4354 INIT_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack, priv->ieee80211); 4354 INIT_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,(void*) GPIOChangeRFWorkItemCallBack, priv->ieee80211);
4355 #endif 4355 #endif
4356 //INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev); 4356 //INIT_WORK(&priv->reset_wq,(void*) rtl8180_restart_wq,dev);
4357 4357
4358 tasklet_init(&priv->irq_rx_tasklet, 4358 tasklet_init(&priv->irq_rx_tasklet,
4359 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet, 4359 (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
4360 (unsigned long)priv); 4360 (unsigned long)priv);
4361 //by amy 4361 //by amy
4362 init_timer(&priv->watch_dog_timer); 4362 init_timer(&priv->watch_dog_timer);
4363 priv->watch_dog_timer.data = (unsigned long)dev; 4363 priv->watch_dog_timer.data = (unsigned long)dev;
4364 priv->watch_dog_timer.function = watch_dog_adaptive; 4364 priv->watch_dog_timer.function = watch_dog_adaptive;
4365 //by amy 4365 //by amy
4366 4366
4367 //{by amy 080312 4367 //{by amy 080312
4368 //by amy for rate adaptive 4368 //by amy for rate adaptive
4369 init_timer(&priv->rateadapter_timer); 4369 init_timer(&priv->rateadapter_timer);
4370 priv->rateadapter_timer.data = (unsigned long)dev; 4370 priv->rateadapter_timer.data = (unsigned long)dev;
4371 priv->rateadapter_timer.function = timer_rate_adaptive; 4371 priv->rateadapter_timer.function = timer_rate_adaptive;
4372 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD; 4372 priv->RateAdaptivePeriod= RATE_ADAPTIVE_TIMER_PERIOD;
4373 priv->bEnhanceTxPwr=false; 4373 priv->bEnhanceTxPwr=false;
4374 //by amy for rate adaptive 4374 //by amy for rate adaptive
4375 //by amy 080312} 4375 //by amy 080312}
4376 //priv->ieee80211->func = 4376 //priv->ieee80211->func =
4377 // kmalloc(sizeof(struct ieee80211_helper_functions),GFP_KERNEL); 4377 // kmalloc(sizeof(struct ieee80211_helper_functions),GFP_KERNEL);
4378 //memset(priv->ieee80211->func, 0, 4378 //memset(priv->ieee80211->func, 0,
4379 // sizeof(struct ieee80211_helper_functions)); 4379 // sizeof(struct ieee80211_helper_functions));
4380 4380
4381 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit; 4381 priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
4382 priv->ieee80211->set_chan = rtl8180_set_chan; 4382 priv->ieee80211->set_chan = rtl8180_set_chan;
4383 priv->ieee80211->link_change = rtl8180_link_change; 4383 priv->ieee80211->link_change = rtl8180_link_change;
4384 priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit; 4384 priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
4385 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop; 4385 priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
4386 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume; 4386 priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
4387 4387
4388 priv->ieee80211->init_wmmparam_flag = 0; 4388 priv->ieee80211->init_wmmparam_flag = 0;
4389 4389
4390 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon; 4390 priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
4391 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable; 4391 priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
4392 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD; 4392 priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
4393 4393
4394 #ifdef CONFIG_RTL8185B 4394 #ifdef CONFIG_RTL8185B
4395 priv->MWIEnable = 0; 4395 priv->MWIEnable = 0;
4396 4396
4397 priv->ShortRetryLimit = 7; 4397 priv->ShortRetryLimit = 7;
4398 priv->LongRetryLimit = 7; 4398 priv->LongRetryLimit = 7;
4399 priv->EarlyRxThreshold = 7; 4399 priv->EarlyRxThreshold = 7;
4400 4400
4401 priv->CSMethod = (0x01 << 29); 4401 priv->CSMethod = (0x01 << 29);
4402 4402
4403 priv->TransmitConfig = 4403 priv->TransmitConfig =
4404 1<<TCR_DurProcMode_OFFSET | //for RTL8185B, duration setting by HW 4404 1<<TCR_DurProcMode_OFFSET | //for RTL8185B, duration setting by HW
4405 (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied. 4405 (7<<TCR_MXDMA_OFFSET) | // Max DMA Burst Size per Tx DMA Burst, 7: reservied.
4406 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit 4406 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) | // Short retry limit
4407 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit 4407 (priv->LongRetryLimit<<TCR_LRL_OFFSET) | // Long retry limit
4408 (0 ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them 4408 (0 ? TCR_SAT : 0); // FALSE: HW provies PLCP length and LENGEXT, TURE: SW proiveds them
4409 4409
4410 priv->ReceiveConfig = 4410 priv->ReceiveConfig =
4411 #ifdef CONFIG_RTL818X_S 4411 #ifdef CONFIG_RTL818X_S
4412 #else 4412 #else
4413 priv->CSMethod | 4413 priv->CSMethod |
4414 #endif 4414 #endif
4415 // RCR_ENMARP | 4415 // RCR_ENMARP |
4416 RCR_AMF | RCR_ADF | //accept management/data 4416 RCR_AMF | RCR_ADF | //accept management/data
4417 RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko. 4417 RCR_ACF | //accept control frame for SW AP needs PS-poll, 2005.07.07, by rcnjko.
4418 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC 4418 RCR_AB | RCR_AM | RCR_APM | //accept BC/MC/UC
4419 //RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet 4419 //RCR_AICV | RCR_ACRC32 | //accept ICV/CRC error packet
4420 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited. 4420 (7<<RCR_MXDMA_OFFSET) | // Max DMA Burst Size per Rx DMA Burst, 7: unlimited.
4421 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold. 4421 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) | // Rx FIFO Threshold, 7: No Rx threshold.
4422 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0); 4422 (priv->EarlyRxThreshold == 7 ? RCR_ONLYERLPKT:0);
4423 4423
4424 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER | 4424 priv->IntrMask = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
4425 IMR_THPDER | IMR_THPDOK | 4425 IMR_THPDER | IMR_THPDOK |
4426 IMR_TVODER | IMR_TVODOK | 4426 IMR_TVODER | IMR_TVODOK |
4427 IMR_TVIDER | IMR_TVIDOK | 4427 IMR_TVIDER | IMR_TVIDOK |
4428 IMR_TBEDER | IMR_TBEDOK | 4428 IMR_TBEDER | IMR_TBEDOK |
4429 IMR_TBKDER | IMR_TBKDOK | 4429 IMR_TBKDER | IMR_TBKDOK |
4430 IMR_RDU | // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27. 4430 IMR_RDU | // To handle the defragmentation not enough Rx descriptors case. Annie, 2006-03-27.
4431 IMR_RER | IMR_ROK | 4431 IMR_RER | IMR_ROK |
4432 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko. 4432 IMR_RQoSOK; // <NOTE> ROK and RQoSOK are mutually exclusive, so, we must handle RQoSOK interrupt to receive QoS frames, 2005.12.09, by rcnjko.
4433 4433
4434 priv->InitialGain = 6; 4434 priv->InitialGain = 6;
4435 #endif 4435 #endif
4436 4436
4437 hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT; 4437 hw_version =( read_nic_dword(dev, TCR) & TCR_HWVERID_MASK)>>TCR_HWVERID_SHIFT;
4438 4438
4439 switch (hw_version){ 4439 switch (hw_version){
4440 #ifdef CONFIG_RTL8185B 4440 #ifdef CONFIG_RTL8185B
4441 case HW_VERID_R8185B_B: 4441 case HW_VERID_R8185B_B:
4442 #ifdef CONFIG_RTL818X_S 4442 #ifdef CONFIG_RTL818X_S
4443 priv->card_8185 = VERSION_8187S_C; 4443 priv->card_8185 = VERSION_8187S_C;
4444 DMESG("MAC controller is a RTL8187SE b/g"); 4444 DMESG("MAC controller is a RTL8187SE b/g");
4445 priv->phy_ver = 2; 4445 priv->phy_ver = 2;
4446 break; 4446 break;
4447 #else 4447 #else
4448 DMESG("MAC controller is a RTL8185B b/g"); 4448 DMESG("MAC controller is a RTL8185B b/g");
4449 priv->card_8185 = 3; 4449 priv->card_8185 = 3;
4450 priv->phy_ver = 2; 4450 priv->phy_ver = 2;
4451 break; 4451 break;
4452 #endif 4452 #endif
4453 #endif 4453 #endif
4454 case HW_VERID_R8185_ABC: 4454 case HW_VERID_R8185_ABC:
4455 DMESG("MAC controller is a RTL8185 b/g"); 4455 DMESG("MAC controller is a RTL8185 b/g");
4456 priv->card_8185 = 1; 4456 priv->card_8185 = 1;
4457 /* you should not find a card with 8225 PHY ver < C*/ 4457 /* you should not find a card with 8225 PHY ver < C*/
4458 priv->phy_ver = 2; 4458 priv->phy_ver = 2;
4459 break; 4459 break;
4460 4460
4461 case HW_VERID_R8185_D: 4461 case HW_VERID_R8185_D:
4462 DMESG("MAC controller is a RTL8185 b/g (V. D)"); 4462 DMESG("MAC controller is a RTL8185 b/g (V. D)");
4463 priv->card_8185 = 2; 4463 priv->card_8185 = 2;
4464 /* you should not find a card with 8225 PHY ver < C*/ 4464 /* you should not find a card with 8225 PHY ver < C*/
4465 priv->phy_ver = 2; 4465 priv->phy_ver = 2;
4466 break; 4466 break;
4467 4467
4468 case HW_VERID_R8180_ABCD: 4468 case HW_VERID_R8180_ABCD:
4469 DMESG("MAC controller is a RTL8180"); 4469 DMESG("MAC controller is a RTL8180");
4470 priv->card_8185 = 0; 4470 priv->card_8185 = 0;
4471 break; 4471 break;
4472 4472
4473 case HW_VERID_R8180_F: 4473 case HW_VERID_R8180_F:
4474 DMESG("MAC controller is a RTL8180 (v. F)"); 4474 DMESG("MAC controller is a RTL8180 (v. F)");
4475 priv->card_8185 = 0; 4475 priv->card_8185 = 0;
4476 break; 4476 break;
4477 4477
4478 default: 4478 default:
4479 DMESGW("MAC chip not recognized: version %x. Assuming RTL8180",hw_version); 4479 DMESGW("MAC chip not recognized: version %x. Assuming RTL8180",hw_version);
4480 priv->card_8185 = 0; 4480 priv->card_8185 = 0;
4481 break; 4481 break;
4482 } 4482 }
4483 4483
4484 if(priv->card_8185){ 4484 if(priv->card_8185){
4485 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION; 4485 priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
4486 priv->ieee80211->short_slot = 1; 4486 priv->ieee80211->short_slot = 1;
4487 } 4487 }
4488 /* you should not found any 8185 Ver B Card */ 4488 /* you should not found any 8185 Ver B Card */
4489 priv->card_8185_Bversion = 0; 4489 priv->card_8185_Bversion = 0;
4490 4490
4491 #ifdef CONFIG_RTL8185B 4491 #ifdef CONFIG_RTL8185B
4492 #ifdef CONFIG_RTL818X_S 4492 #ifdef CONFIG_RTL818X_S
4493 // just for sync 85 4493 // just for sync 85
4494 priv->card_type = PCI; 4494 priv->card_type = PCI;
4495 DMESG("This is a PCI NIC"); 4495 DMESG("This is a PCI NIC");
4496 #else 4496 #else
4497 config3 = read_nic_byte(dev, CONFIG3); 4497 config3 = read_nic_byte(dev, CONFIG3);
4498 if(config3 & 0x8){ 4498 if(config3 & 0x8){
4499 priv->card_type = CARDBUS; 4499 priv->card_type = CARDBUS;
4500 DMESG("This is a CARDBUS NIC"); 4500 DMESG("This is a CARDBUS NIC");
4501 } 4501 }
4502 else if( config3 & 0x4){ 4502 else if( config3 & 0x4){
4503 priv->card_type = MINIPCI; 4503 priv->card_type = MINIPCI;
4504 DMESG("This is a MINI-PCI NIC"); 4504 DMESG("This is a MINI-PCI NIC");
4505 }else{ 4505 }else{
4506 priv->card_type = PCI; 4506 priv->card_type = PCI;
4507 DMESG("This is a PCI NIC"); 4507 DMESG("This is a PCI NIC");
4508 } 4508 }
4509 #endif 4509 #endif
4510 #endif 4510 #endif
4511 priv->enable_gpio0 = 0; 4511 priv->enable_gpio0 = 0;
4512 4512
4513 //by amy for antenna 4513 //by amy for antenna
4514 #ifdef CONFIG_RTL8185B 4514 #ifdef CONFIG_RTL8185B
4515 usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET); 4515 usValue = eprom_read(dev, EEPROM_SW_REVD_OFFSET);
4516 DMESG("usValue is 0x%x\n",usValue); 4516 DMESG("usValue is 0x%x\n",usValue);
4517 #ifdef CONFIG_RTL818X_S 4517 #ifdef CONFIG_RTL818X_S
4518 //3Read AntennaDiversity 4518 //3Read AntennaDiversity
4519 // SW Antenna Diversity. 4519 // SW Antenna Diversity.
4520 if( (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE ) 4520 if( (usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE )
4521 { 4521 {
4522 priv->EEPROMSwAntennaDiversity = false; 4522 priv->EEPROMSwAntennaDiversity = false;
4523 //printk("EEPROM Disable SW Antenna Diversity\n"); 4523 //printk("EEPROM Disable SW Antenna Diversity\n");
4524 } 4524 }
4525 else 4525 else
4526 { 4526 {
4527 priv->EEPROMSwAntennaDiversity = true; 4527 priv->EEPROMSwAntennaDiversity = true;
4528 //printk("EEPROM Enable SW Antenna Diversity\n"); 4528 //printk("EEPROM Enable SW Antenna Diversity\n");
4529 } 4529 }
4530 // Default Antenna to use. 4530 // Default Antenna to use.
4531 if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 ) 4531 if( (usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1 )
4532 { 4532 {
4533 priv->EEPROMDefaultAntenna1 = false; 4533 priv->EEPROMDefaultAntenna1 = false;
4534 //printk("EEPROM Default Antenna 0\n"); 4534 //printk("EEPROM Default Antenna 0\n");
4535 } 4535 }
4536 else 4536 else
4537 { 4537 {
4538 priv->EEPROMDefaultAntenna1 = true; 4538 priv->EEPROMDefaultAntenna1 = true;
4539 //printk("EEPROM Default Antenna 1\n"); 4539 //printk("EEPROM Default Antenna 1\n");
4540 } 4540 }
4541 4541
4542 // 4542 //
4543 // Antenna diversity mechanism. Added by Roger, 2007.11.05. 4543 // Antenna diversity mechanism. Added by Roger, 2007.11.05.
4544 // 4544 //
4545 if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto 4545 if( priv->RegSwAntennaDiversityMechanism == 0 ) // Auto
4546 {// 0: default from EEPROM. 4546 {// 0: default from EEPROM.
4547 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity; 4547 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
4548 } 4548 }
4549 else 4549 else
4550 {// 1:disable antenna diversity, 2: enable antenna diversity. 4550 {// 1:disable antenna diversity, 2: enable antenna diversity.
4551 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true); 4551 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1)? false : true);
4552 } 4552 }
4553 //printk("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity); 4553 //printk("bSwAntennaDiverity = %d\n", priv->bSwAntennaDiverity);
4554 4554
4555 4555
4556 // 4556 //
4557 // Default antenna settings. Added by Roger, 2007.11.05. 4557 // Default antenna settings. Added by Roger, 2007.11.05.
4558 // 4558 //
4559 if( priv->RegDefaultAntenna == 0) 4559 if( priv->RegDefaultAntenna == 0)
4560 {// 0: default from EEPROM. 4560 {// 0: default from EEPROM.
4561 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1; 4561 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
4562 } 4562 }
4563 else 4563 else
4564 {// 1: main, 2: aux. 4564 {// 1: main, 2: aux.
4565 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false); 4565 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna== 2) ? true : false);
4566 } 4566 }
4567 //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1); 4567 //printk("bDefaultAntenna1 = %d\n", priv->bDefaultAntenna1);
4568 #endif 4568 #endif
4569 #endif 4569 #endif
4570 //by amy for antenna 4570 //by amy for antenna
4571 /* rtl8185 can calc plcp len in HW.*/ 4571 /* rtl8185 can calc plcp len in HW.*/
4572 priv->hw_plcp_len = 1; 4572 priv->hw_plcp_len = 1;
4573 4573
4574 priv->plcp_preamble_mode = 2; 4574 priv->plcp_preamble_mode = 2;
4575 /*the eeprom type is stored in RCR register bit #6 */ 4575 /*the eeprom type is stored in RCR register bit #6 */
4576 if (RCR_9356SEL & read_nic_dword(dev, RCR)){ 4576 if (RCR_9356SEL & read_nic_dword(dev, RCR)){
4577 priv->epromtype=EPROM_93c56; 4577 priv->epromtype=EPROM_93c56;
4578 //DMESG("Reported EEPROM chip is a 93c56 (2Kbit)"); 4578 //DMESG("Reported EEPROM chip is a 93c56 (2Kbit)");
4579 }else{ 4579 }else{
4580 priv->epromtype=EPROM_93c46; 4580 priv->epromtype=EPROM_93c46;
4581 //DMESG("Reported EEPROM chip is a 93c46 (1Kbit)"); 4581 //DMESG("Reported EEPROM chip is a 93c46 (1Kbit)");
4582 } 4582 }
4583 4583
4584 dev->get_stats = rtl8180_stats; 4584 dev->get_stats = rtl8180_stats;
4585 4585
4586 dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff; 4586 dev->dev_addr[0]=eprom_read(dev,MAC_ADR) & 0xff;
4587 dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8; 4587 dev->dev_addr[1]=(eprom_read(dev,MAC_ADR) & 0xff00)>>8;
4588 dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff; 4588 dev->dev_addr[2]=eprom_read(dev,MAC_ADR+1) & 0xff;
4589 dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8; 4589 dev->dev_addr[3]=(eprom_read(dev,MAC_ADR+1) & 0xff00)>>8;
4590 dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff; 4590 dev->dev_addr[4]=eprom_read(dev,MAC_ADR+2) & 0xff;
4591 dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8; 4591 dev->dev_addr[5]=(eprom_read(dev,MAC_ADR+2) & 0xff00)>>8;
4592 //DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr)); 4592 //DMESG("Card MAC address is "MAC_FMT, MAC_ARG(dev->dev_addr));
4593 4593
4594 4594
4595 for(i=1,j=0; i<14; i+=2,j++){ 4595 for(i=1,j=0; i<14; i+=2,j++){
4596 4596
4597 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j); 4597 word = eprom_read(dev,EPROM_TXPW_CH1_2 + j);
4598 priv->chtxpwr[i]=word & 0xff; 4598 priv->chtxpwr[i]=word & 0xff;
4599 priv->chtxpwr[i+1]=(word & 0xff00)>>8; 4599 priv->chtxpwr[i+1]=(word & 0xff00)>>8;
4600 #ifdef DEBUG_EPROM 4600 #ifdef DEBUG_EPROM
4601 DMESG("tx word %x:%x",j,word); 4601 DMESG("tx word %x:%x",j,word);
4602 DMESG("ch %d pwr %x",i,priv->chtxpwr[i]); 4602 DMESG("ch %d pwr %x",i,priv->chtxpwr[i]);
4603 DMESG("ch %d pwr %x",i+1,priv->chtxpwr[i+1]); 4603 DMESG("ch %d pwr %x",i+1,priv->chtxpwr[i+1]);
4604 #endif 4604 #endif
4605 } 4605 }
4606 if(priv->card_8185){ 4606 if(priv->card_8185){
4607 for(i=1,j=0; i<14; i+=2,j++){ 4607 for(i=1,j=0; i<14; i+=2,j++){
4608 4608
4609 word = eprom_read(dev,EPROM_TXPW_OFDM_CH1_2 + j); 4609 word = eprom_read(dev,EPROM_TXPW_OFDM_CH1_2 + j);
4610 priv->chtxpwr_ofdm[i]=word & 0xff; 4610 priv->chtxpwr_ofdm[i]=word & 0xff;
4611 priv->chtxpwr_ofdm[i+1]=(word & 0xff00)>>8; 4611 priv->chtxpwr_ofdm[i+1]=(word & 0xff00)>>8;
4612 #ifdef DEBUG_EPROM 4612 #ifdef DEBUG_EPROM
4613 DMESG("ofdm tx word %x:%x",j,word); 4613 DMESG("ofdm tx word %x:%x",j,word);
4614 DMESG("ofdm ch %d pwr %x",i,priv->chtxpwr_ofdm[i]); 4614 DMESG("ofdm ch %d pwr %x",i,priv->chtxpwr_ofdm[i]);
4615 DMESG("ofdm ch %d pwr %x",i+1,priv->chtxpwr_ofdm[i+1]); 4615 DMESG("ofdm ch %d pwr %x",i+1,priv->chtxpwr_ofdm[i+1]);
4616 #endif 4616 #endif
4617 } 4617 }
4618 } 4618 }
4619 //{by amy 080312 4619 //{by amy 080312
4620 //3Read crystal calibtration and thermal meter indication on 87SE. 4620 //3Read crystal calibtration and thermal meter indication on 87SE.
4621 4621
4622 // By SD3 SY's request. Added by Roger, 2007.12.11. 4622 // By SD3 SY's request. Added by Roger, 2007.12.11.
4623 4623
4624 tmpu16 = eprom_read(dev, EEPROM_RSV>>1); 4624 tmpu16 = eprom_read(dev, EEPROM_RSV>>1);
4625 4625
4626 //printk("ReadAdapterInfo8185(): EEPROM_RSV(%04x)\n", tmpu16); 4626 //printk("ReadAdapterInfo8185(): EEPROM_RSV(%04x)\n", tmpu16);
4627 4627
4628 // Crystal calibration for Xin and Xout resp. 4628 // Crystal calibration for Xin and Xout resp.
4629 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF 4629 priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK; // 0~7.5pF
4630 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF 4630 priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK)>>4; // 0~7.5pF
4631 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12) 4631 if((tmpu16 & EEPROM_XTAL_CAL_ENABLE)>>12)
4632 priv->bXtalCalibration = true; 4632 priv->bXtalCalibration = true;
4633 4633
4634 // Thermal meter reference indication. 4634 // Thermal meter reference indication.
4635 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8); 4635 priv->ThermalMeter = (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK)>>8);
4636 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13) 4636 if((tmpu16 & EEPROM_THERMAL_METER_ENABLE)>>13)
4637 priv->bTxPowerTrack = true; 4637 priv->bTxPowerTrack = true;
4638 4638
4639 //by amy 080312} 4639 //by amy 080312}
4640 #ifdef CONFIG_RTL8185B 4640 #ifdef CONFIG_RTL8185B
4641 word = eprom_read(dev,EPROM_TXPW_BASE); 4641 word = eprom_read(dev,EPROM_TXPW_BASE);
4642 priv->cck_txpwr_base = word & 0xf; 4642 priv->cck_txpwr_base = word & 0xf;
4643 priv->ofdm_txpwr_base = (word>>4) & 0xf; 4643 priv->ofdm_txpwr_base = (word>>4) & 0xf;
4644 #endif 4644 #endif
4645 4645
4646 version = eprom_read(dev,EPROM_VERSION); 4646 version = eprom_read(dev,EPROM_VERSION);
4647 DMESG("EEPROM version %x",version); 4647 DMESG("EEPROM version %x",version);
4648 if( (!priv->card_8185) && version < 0x0101){ 4648 if( (!priv->card_8185) && version < 0x0101){
4649 DMESG ("EEPROM version too old, assuming defaults"); 4649 DMESG ("EEPROM version too old, assuming defaults");
4650 DMESG ("If you see this message *plase* send your \ 4650 DMESG ("If you see this message *plase* send your \
4651 DMESG output to andreamrl@tiscali.it THANKS"); 4651 DMESG output to andreamrl@tiscali.it THANKS");
4652 priv->digphy=1; 4652 priv->digphy=1;
4653 priv->antb=0; 4653 priv->antb=0;
4654 priv->diversity=1; 4654 priv->diversity=1;
4655 priv->cs_treshold=0xc; 4655 priv->cs_treshold=0xc;
4656 priv->rcr_csense=1; 4656 priv->rcr_csense=1;
4657 priv->rf_chip=RFCHIPID_PHILIPS; 4657 priv->rf_chip=RFCHIPID_PHILIPS;
4658 }else{ 4658 }else{
4659 if(!priv->card_8185){ 4659 if(!priv->card_8185){
4660 u8 rfparam = eprom_read(dev,RF_PARAM); 4660 u8 rfparam = eprom_read(dev,RF_PARAM);
4661 DMESG("RfParam: %x",rfparam); 4661 DMESG("RfParam: %x",rfparam);
4662 4662
4663 priv->digphy = rfparam & (1<<RF_PARAM_DIGPHY_SHIFT) ? 0:1; 4663 priv->digphy = rfparam & (1<<RF_PARAM_DIGPHY_SHIFT) ? 0:1;
4664 priv->antb = rfparam & (1<<RF_PARAM_ANTBDEFAULT_SHIFT) ? 1:0; 4664 priv->antb = rfparam & (1<<RF_PARAM_ANTBDEFAULT_SHIFT) ? 1:0;
4665 4665
4666 priv->rcr_csense = (rfparam & RF_PARAM_CARRIERSENSE_MASK) >> 4666 priv->rcr_csense = (rfparam & RF_PARAM_CARRIERSENSE_MASK) >>
4667 RF_PARAM_CARRIERSENSE_SHIFT; 4667 RF_PARAM_CARRIERSENSE_SHIFT;
4668 4668
4669 priv->diversity = 4669 priv->diversity =
4670 (read_nic_byte(dev,CONFIG2)&(1<<CONFIG2_ANTENNA_SHIFT)) ? 1:0; 4670 (read_nic_byte(dev,CONFIG2)&(1<<CONFIG2_ANTENNA_SHIFT)) ? 1:0;
4671 }else{ 4671 }else{
4672 priv->rcr_csense = 3; 4672 priv->rcr_csense = 3;
4673 } 4673 }
4674 4674
4675 priv->cs_treshold = (eprom_read(dev,ENERGY_TRESHOLD)&0xff00) >>8; 4675 priv->cs_treshold = (eprom_read(dev,ENERGY_TRESHOLD)&0xff00) >>8;
4676 4676
4677 priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID); 4677 priv->rf_chip = 0xff & eprom_read(dev,RFCHIPID);
4678 } 4678 }
4679 4679
4680 #ifdef CONFIG_RTL8185B 4680 #ifdef CONFIG_RTL8185B
4681 #ifdef CONFIG_RTL818X_S 4681 #ifdef CONFIG_RTL818X_S
4682 priv->rf_chip = RF_ZEBRA4; 4682 priv->rf_chip = RF_ZEBRA4;
4683 priv->rf_sleep = rtl8225z4_rf_sleep; 4683 priv->rf_sleep = rtl8225z4_rf_sleep;
4684 priv->rf_wakeup = rtl8225z4_rf_wakeup; 4684 priv->rf_wakeup = rtl8225z4_rf_wakeup;
4685 #else 4685 #else
4686 priv->rf_chip = RF_ZEBRA2; 4686 priv->rf_chip = RF_ZEBRA2;
4687 #endif 4687 #endif
4688 //DMESG("Card reports RF frontend Realtek 8225z2"); 4688 //DMESG("Card reports RF frontend Realtek 8225z2");
4689 //DMESGW("This driver has EXPERIMENTAL support for this chipset."); 4689 //DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4690 //DMESGW("use it with care and at your own risk and"); 4690 //DMESGW("use it with care and at your own risk and");
4691 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!"); 4691 DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
4692 4692
4693 priv->rf_close = rtl8225z2_rf_close; 4693 priv->rf_close = rtl8225z2_rf_close;
4694 priv->rf_init = rtl8225z2_rf_init; 4694 priv->rf_init = rtl8225z2_rf_init;
4695 priv->rf_set_chan = rtl8225z2_rf_set_chan; 4695 priv->rf_set_chan = rtl8225z2_rf_set_chan;
4696 priv->rf_set_sens = NULL; 4696 priv->rf_set_sens = NULL;
4697 //priv->rf_sleep = rtl8225_rf_sleep; 4697 //priv->rf_sleep = rtl8225_rf_sleep;
4698 //priv->rf_wakeup = rtl8225_rf_wakeup; 4698 //priv->rf_wakeup = rtl8225_rf_wakeup;
4699 4699
4700 #else 4700 #else
4701 /* check RF frontend chipset */ 4701 /* check RF frontend chipset */
4702 switch (priv->rf_chip) { 4702 switch (priv->rf_chip) {
4703 4703
4704 case RFCHIPID_RTL8225: 4704 case RFCHIPID_RTL8225:
4705 4705
4706 if(priv->card_8185){ 4706 if(priv->card_8185){
4707 DMESG("Card reports RF frontend Realtek 8225"); 4707 DMESG("Card reports RF frontend Realtek 8225");
4708 DMESGW("This driver has EXPERIMENTAL support for this chipset."); 4708 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4709 DMESGW("use it with care and at your own risk and"); 4709 DMESGW("use it with care and at your own risk and");
4710 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it"); 4710 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4711 4711
4712 priv->rf_close = rtl8225_rf_close; 4712 priv->rf_close = rtl8225_rf_close;
4713 priv->rf_init = rtl8225_rf_init; 4713 priv->rf_init = rtl8225_rf_init;
4714 priv->rf_set_chan = rtl8225_rf_set_chan; 4714 priv->rf_set_chan = rtl8225_rf_set_chan;
4715 priv->rf_set_sens = NULL; 4715 priv->rf_set_sens = NULL;
4716 priv->rf_sleep = rtl8225_rf_sleep; 4716 priv->rf_sleep = rtl8225_rf_sleep;
4717 priv->rf_wakeup = rtl8225_rf_wakeup; 4717 priv->rf_wakeup = rtl8225_rf_wakeup;
4718 4718
4719 }else{ 4719 }else{
4720 DMESGW("Detected RTL8225 radio on a card recognized as RTL8180"); 4720 DMESGW("Detected RTL8225 radio on a card recognized as RTL8180");
4721 DMESGW("This could not be... something went wrong...."); 4721 DMESGW("This could not be... something went wrong....");
4722 return -ENODEV; 4722 return -ENODEV;
4723 } 4723 }
4724 break; 4724 break;
4725 4725
4726 case RFCHIPID_RTL8255: 4726 case RFCHIPID_RTL8255:
4727 if(priv->card_8185){ 4727 if(priv->card_8185){
4728 DMESG("Card reports RF frontend Realtek 8255"); 4728 DMESG("Card reports RF frontend Realtek 8255");
4729 DMESGW("This driver has EXPERIMENTAL support for this chipset."); 4729 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4730 DMESGW("use it with care and at your own risk and"); 4730 DMESGW("use it with care and at your own risk and");
4731 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it"); 4731 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4732 4732
4733 priv->rf_close = rtl8255_rf_close; 4733 priv->rf_close = rtl8255_rf_close;
4734 priv->rf_init = rtl8255_rf_init; 4734 priv->rf_init = rtl8255_rf_init;
4735 priv->rf_set_chan = rtl8255_rf_set_chan; 4735 priv->rf_set_chan = rtl8255_rf_set_chan;
4736 priv->rf_set_sens = NULL; 4736 priv->rf_set_sens = NULL;
4737 priv->rf_sleep = NULL; 4737 priv->rf_sleep = NULL;
4738 priv->rf_wakeup = NULL; 4738 priv->rf_wakeup = NULL;
4739 4739
4740 }else{ 4740 }else{
4741 DMESGW("Detected RTL8255 radio on a card recognized as RTL8180"); 4741 DMESGW("Detected RTL8255 radio on a card recognized as RTL8180");
4742 DMESGW("This could not be... something went wrong...."); 4742 DMESGW("This could not be... something went wrong....");
4743 return -ENODEV; 4743 return -ENODEV;
4744 } 4744 }
4745 break; 4745 break;
4746 4746
4747 4747
4748 case RFCHIPID_INTERSIL: 4748 case RFCHIPID_INTERSIL:
4749 DMESGW("Card reports RF frontend by Intersil."); 4749 DMESGW("Card reports RF frontend by Intersil.");
4750 DMESGW("This driver has NO support for this chipset."); 4750 DMESGW("This driver has NO support for this chipset.");
4751 return -ENODEV; 4751 return -ENODEV;
4752 break; 4752 break;
4753 4753
4754 case RFCHIPID_RFMD: 4754 case RFCHIPID_RFMD:
4755 DMESGW("Card reports RF frontend by RFMD."); 4755 DMESGW("Card reports RF frontend by RFMD.");
4756 DMESGW("This driver has NO support for this chipset."); 4756 DMESGW("This driver has NO support for this chipset.");
4757 return -ENODEV; 4757 return -ENODEV;
4758 break; 4758 break;
4759 4759
4760 case RFCHIPID_GCT: 4760 case RFCHIPID_GCT:
4761 DMESGW("Card reports RF frontend by GCT."); 4761 DMESGW("Card reports RF frontend by GCT.");
4762 DMESGW("This driver has EXPERIMENTAL support for this chipset."); 4762 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4763 DMESGW("use it with care and at your own risk and"); 4763 DMESGW("use it with care and at your own risk and");
4764 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it"); 4764 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4765 priv->rf_close = gct_rf_close; 4765 priv->rf_close = gct_rf_close;
4766 priv->rf_init = gct_rf_init; 4766 priv->rf_init = gct_rf_init;
4767 priv->rf_set_chan = gct_rf_set_chan; 4767 priv->rf_set_chan = gct_rf_set_chan;
4768 priv->rf_set_sens = NULL; 4768 priv->rf_set_sens = NULL;
4769 priv->rf_sleep = NULL; 4769 priv->rf_sleep = NULL;
4770 priv->rf_wakeup = NULL; 4770 priv->rf_wakeup = NULL;
4771 break; 4771 break;
4772 4772
4773 case RFCHIPID_MAXIM: 4773 case RFCHIPID_MAXIM:
4774 DMESGW("Card reports RF frontend by MAXIM."); 4774 DMESGW("Card reports RF frontend by MAXIM.");
4775 DMESGW("This driver has EXPERIMENTAL support for this chipset."); 4775 DMESGW("This driver has EXPERIMENTAL support for this chipset.");
4776 DMESGW("use it with care and at your own risk and"); 4776 DMESGW("use it with care and at your own risk and");
4777 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it"); 4777 DMESGW("**PLEASE** REPORT SUCCESS/INSUCCESS TO andreamrl@tiscali.it");
4778 priv->rf_close = maxim_rf_close; 4778 priv->rf_close = maxim_rf_close;
4779 priv->rf_init = maxim_rf_init; 4779 priv->rf_init = maxim_rf_init;
4780 priv->rf_set_chan = maxim_rf_set_chan; 4780 priv->rf_set_chan = maxim_rf_set_chan;
4781 priv->rf_set_sens = NULL; 4781 priv->rf_set_sens = NULL;
4782 priv->rf_sleep = NULL; 4782 priv->rf_sleep = NULL;
4783 priv->rf_wakeup = NULL; 4783 priv->rf_wakeup = NULL;
4784 break; 4784 break;
4785 4785
4786 case RFCHIPID_PHILIPS: 4786 case RFCHIPID_PHILIPS:
4787 DMESG("Card reports RF frontend by Philips."); 4787 DMESG("Card reports RF frontend by Philips.");
4788 DMESG("OK! Philips SA2400 radio chipset is supported."); 4788 DMESG("OK! Philips SA2400 radio chipset is supported.");
4789 priv->rf_close = sa2400_rf_close; 4789 priv->rf_close = sa2400_rf_close;
4790 priv->rf_init = sa2400_rf_init; 4790 priv->rf_init = sa2400_rf_init;
4791 priv->rf_set_chan = sa2400_rf_set_chan; 4791 priv->rf_set_chan = sa2400_rf_set_chan;
4792 priv->rf_set_sens = sa2400_rf_set_sens; 4792 priv->rf_set_sens = sa2400_rf_set_sens;
4793 priv->sens = SA2400_RF_DEF_SENS; /* default sensitivity */ 4793 priv->sens = SA2400_RF_DEF_SENS; /* default sensitivity */
4794 priv->max_sens = SA2400_RF_MAX_SENS; /* maximum sensitivity */ 4794 priv->max_sens = SA2400_RF_MAX_SENS; /* maximum sensitivity */
4795 priv->rf_sleep = NULL; 4795 priv->rf_sleep = NULL;
4796 priv->rf_wakeup = NULL; 4796 priv->rf_wakeup = NULL;
4797 4797
4798 if(priv->digphy){ 4798 if(priv->digphy){
4799 DMESGW("Digital PHY found"); 4799 DMESGW("Digital PHY found");
4800 DMESGW("Philips DIGITAL PHY is untested! *Please*\ 4800 DMESGW("Philips DIGITAL PHY is untested! *Please*\
4801 report success/failure to <andreamrl@tiscali.it>"); 4801 report success/failure to <andreamrl@tiscali.it>");
4802 }else{ 4802 }else{
4803 DMESG ("Analog PHY found"); 4803 DMESG ("Analog PHY found");
4804 } 4804 }
4805 4805
4806 break; 4806 break;
4807 4807
4808 default: 4808 default:
4809 DMESGW("Unknown RF module %x",priv->rf_chip); 4809 DMESGW("Unknown RF module %x",priv->rf_chip);
4810 DMESGW("Exiting..."); 4810 DMESGW("Exiting...");
4811 return -1; 4811 return -1;
4812 4812
4813 } 4813 }
4814 #endif 4814 #endif
4815 4815
4816 4816
4817 if(!priv->card_8185){ 4817 if(!priv->card_8185){
4818 if(priv->antb) 4818 if(priv->antb)
4819 DMESG ("Antenna B is default antenna"); 4819 DMESG ("Antenna B is default antenna");
4820 else 4820 else
4821 DMESG ("Antenna A is default antenna"); 4821 DMESG ("Antenna A is default antenna");
4822 4822
4823 if(priv->diversity) 4823 if(priv->diversity)
4824 DMESG ("Antenna diversity is enabled"); 4824 DMESG ("Antenna diversity is enabled");
4825 else 4825 else
4826 DMESG("Antenna diversity is disabled"); 4826 DMESG("Antenna diversity is disabled");
4827 4827
4828 DMESG("Carrier sense %d",priv->rcr_csense); 4828 DMESG("Carrier sense %d",priv->rcr_csense);
4829 } 4829 }
4830 4830
4831 if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount)) 4831 if (0!=alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
4832 return -ENOMEM; 4832 return -ENOMEM;
4833 4833
4834 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 4834 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4835 TX_MANAGEPRIORITY_RING_ADDR)) 4835 TX_MANAGEPRIORITY_RING_ADDR))
4836 return -ENOMEM; 4836 return -ENOMEM;
4837 4837
4838 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 4838 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4839 TX_BKPRIORITY_RING_ADDR)) 4839 TX_BKPRIORITY_RING_ADDR))
4840 return -ENOMEM; 4840 return -ENOMEM;
4841 4841
4842 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 4842 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4843 TX_BEPRIORITY_RING_ADDR)) 4843 TX_BEPRIORITY_RING_ADDR))
4844 return -ENOMEM; 4844 return -ENOMEM;
4845 4845
4846 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 4846 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4847 TX_VIPRIORITY_RING_ADDR)) 4847 TX_VIPRIORITY_RING_ADDR))
4848 return -ENOMEM; 4848 return -ENOMEM;
4849 4849
4850 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 4850 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4851 TX_VOPRIORITY_RING_ADDR)) 4851 TX_VOPRIORITY_RING_ADDR))
4852 return -ENOMEM; 4852 return -ENOMEM;
4853 4853
4854 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount, 4854 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
4855 TX_HIGHPRIORITY_RING_ADDR)) 4855 TX_HIGHPRIORITY_RING_ADDR))
4856 return -ENOMEM; 4856 return -ENOMEM;
4857 4857
4858 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount, 4858 if (0!=alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
4859 TX_BEACON_RING_ADDR)) 4859 TX_BEACON_RING_ADDR))
4860 return -ENOMEM; 4860 return -ENOMEM;
4861 4861
4862 4862
4863 //priv->beacon_buf=NULL; 4863 //priv->beacon_buf=NULL;
4864 4864
4865 if(!priv->card_8185){ 4865 if(!priv->card_8185){
4866 4866
4867 if(read_nic_byte(dev, CONFIG0) & (1<<CONFIG0_WEP40_SHIFT)) 4867 if(read_nic_byte(dev, CONFIG0) & (1<<CONFIG0_WEP40_SHIFT))
4868 DMESG ("40-bit WEP is supported in hardware"); 4868 DMESG ("40-bit WEP is supported in hardware");
4869 else 4869 else
4870 DMESG ("40-bit WEP is NOT supported in hardware"); 4870 DMESG ("40-bit WEP is NOT supported in hardware");
4871 4871
4872 if(read_nic_byte(dev,CONFIG0) & (1<<CONFIG0_WEP104_SHIFT)) 4872 if(read_nic_byte(dev,CONFIG0) & (1<<CONFIG0_WEP104_SHIFT))
4873 DMESG ("104-bit WEP is supported in hardware"); 4873 DMESG ("104-bit WEP is supported in hardware");
4874 else 4874 else
4875 DMESG ("104-bit WEP is NOT supported in hardware"); 4875 DMESG ("104-bit WEP is NOT supported in hardware");
4876 } 4876 }
4877 #if !defined(SA_SHIRQ) 4877 #if !defined(SA_SHIRQ)
4878 if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){ 4878 if(request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)){
4879 #else 4879 #else
4880 if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){ 4880 if(request_irq(dev->irq, (void *)rtl8180_interrupt, SA_SHIRQ, dev->name, dev)){
4881 #endif 4881 #endif
4882 DMESGE("Error allocating IRQ %d",dev->irq); 4882 DMESGE("Error allocating IRQ %d",dev->irq);
4883 return -1; 4883 return -1;
4884 }else{ 4884 }else{
4885 priv->irq=dev->irq; 4885 priv->irq=dev->irq;
4886 DMESG("IRQ %d",dev->irq); 4886 DMESG("IRQ %d",dev->irq);
4887 } 4887 }
4888 4888
4889 #ifdef DEBUG_EPROM 4889 #ifdef DEBUG_EPROM
4890 dump_eprom(dev); 4890 dump_eprom(dev);
4891 #endif 4891 #endif
4892 4892
4893 return 0; 4893 return 0;
4894 4894
4895 } 4895 }
4896 4896
4897 4897
4898 void rtl8180_no_hw_wep(struct net_device *dev) 4898 void rtl8180_no_hw_wep(struct net_device *dev)
4899 { 4899 {
4900 struct r8180_priv *priv = ieee80211_priv(dev); 4900 struct r8180_priv *priv = ieee80211_priv(dev);
4901 4901
4902 if(!priv->card_8185) 4902 if(!priv->card_8185)
4903 { 4903 {
4904 u8 security; 4904 u8 security;
4905 4905
4906 security = read_nic_byte(dev, SECURITY); 4906 security = read_nic_byte(dev, SECURITY);
4907 security &=~(1<<SECURITY_WEP_TX_ENABLE_SHIFT); 4907 security &=~(1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4908 security &=~(1<<SECURITY_WEP_RX_ENABLE_SHIFT); 4908 security &=~(1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4909 4909
4910 write_nic_byte(dev, SECURITY, security); 4910 write_nic_byte(dev, SECURITY, security);
4911 4911
4912 }else{ 4912 }else{
4913 4913
4914 //FIXME!!! 4914 //FIXME!!!
4915 } 4915 }
4916 /* 4916 /*
4917 write_nic_dword(dev,TX_CONF,read_nic_dword(dev,TX_CONF) | 4917 write_nic_dword(dev,TX_CONF,read_nic_dword(dev,TX_CONF) |
4918 (1<<TX_NOICV_SHIFT) ); 4918 (1<<TX_NOICV_SHIFT) );
4919 */ 4919 */
4920 // priv->ieee80211->hw_wep=0; 4920 // priv->ieee80211->hw_wep=0;
4921 } 4921 }
4922 4922
4923 4923
4924 void rtl8180_set_hw_wep(struct net_device *dev) 4924 void rtl8180_set_hw_wep(struct net_device *dev)
4925 { 4925 {
4926 struct r8180_priv *priv = ieee80211_priv(dev); 4926 struct r8180_priv *priv = ieee80211_priv(dev);
4927 u8 pgreg; 4927 u8 pgreg;
4928 u8 security; 4928 u8 security;
4929 u32 key0_word4; 4929 u32 key0_word4;
4930 4930
4931 pgreg=read_nic_byte(dev, PGSELECT); 4931 pgreg=read_nic_byte(dev, PGSELECT);
4932 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT)); 4932 write_nic_byte(dev, PGSELECT, pgreg &~ (1<<PGSELECT_PG_SHIFT));
4933 4933
4934 key0_word4 = read_nic_dword(dev, KEY0+4+4+4); 4934 key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
4935 key0_word4 &= ~ 0xff; 4935 key0_word4 &= ~ 0xff;
4936 key0_word4 |= priv->key0[3]& 0xff; 4936 key0_word4 |= priv->key0[3]& 0xff;
4937 write_nic_dword(dev,KEY0,(priv->key0[0])); 4937 write_nic_dword(dev,KEY0,(priv->key0[0]));
4938 write_nic_dword(dev,KEY0+4,(priv->key0[1])); 4938 write_nic_dword(dev,KEY0+4,(priv->key0[1]));
4939 write_nic_dword(dev,KEY0+4+4,(priv->key0[2])); 4939 write_nic_dword(dev,KEY0+4+4,(priv->key0[2]));
4940 write_nic_dword(dev,KEY0+4+4+4,(key0_word4)); 4940 write_nic_dword(dev,KEY0+4+4+4,(key0_word4));
4941 4941
4942 /* 4942 /*
4943 TX_CONF,read_nic_dword(dev,TX_CONF) &~(1<<TX_NOICV_SHIFT)); 4943 TX_CONF,read_nic_dword(dev,TX_CONF) &~(1<<TX_NOICV_SHIFT));
4944 */ 4944 */
4945 4945
4946 security = read_nic_byte(dev,SECURITY); 4946 security = read_nic_byte(dev,SECURITY);
4947 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT); 4947 security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
4948 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT); 4948 security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
4949 security &= ~ SECURITY_ENCRYP_MASK; 4949 security &= ~ SECURITY_ENCRYP_MASK;
4950 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT); 4950 security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
4951 4951
4952 write_nic_byte(dev, SECURITY, security); 4952 write_nic_byte(dev, SECURITY, security);
4953 4953
4954 DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4), 4954 DMESG("key %x %x %x %x",read_nic_dword(dev,KEY0+4+4+4),
4955 read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4), 4955 read_nic_dword(dev,KEY0+4+4),read_nic_dword(dev,KEY0+4),
4956 read_nic_dword(dev,KEY0)); 4956 read_nic_dword(dev,KEY0));
4957 4957
4958 //priv->ieee80211->hw_wep=1; 4958 //priv->ieee80211->hw_wep=1;
4959 } 4959 }
4960 4960
4961 4961
4962 void rtl8185_rf_pins_enable(struct net_device *dev) 4962 void rtl8185_rf_pins_enable(struct net_device *dev)
4963 { 4963 {
4964 // u16 tmp; 4964 // u16 tmp;
4965 // tmp = read_nic_word(dev, RFPinsEnable); 4965 // tmp = read_nic_word(dev, RFPinsEnable);
4966 write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp); 4966 write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
4967 // write_nic_word(dev, RFPinsEnable,7 | tmp); 4967 // write_nic_word(dev, RFPinsEnable,7 | tmp);
4968 } 4968 }
4969 4969
4970 4970
4971 void rtl8185_set_anaparam2(struct net_device *dev, u32 a) 4971 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
4972 { 4972 {
4973 u8 conf3; 4973 u8 conf3;
4974 4974
4975 rtl8180_set_mode(dev, EPROM_CMD_CONFIG); 4975 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4976 4976
4977 conf3 = read_nic_byte(dev, CONFIG3); 4977 conf3 = read_nic_byte(dev, CONFIG3);
4978 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT)); 4978 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4979 write_nic_dword(dev, ANAPARAM2, a); 4979 write_nic_dword(dev, ANAPARAM2, a);
4980 4980
4981 conf3 = read_nic_byte(dev, CONFIG3); 4981 conf3 = read_nic_byte(dev, CONFIG3);
4982 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT)); 4982 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
4983 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 4983 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
4984 4984
4985 } 4985 }
4986 4986
4987 4987
4988 void rtl8180_set_anaparam(struct net_device *dev, u32 a) 4988 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
4989 { 4989 {
4990 u8 conf3; 4990 u8 conf3;
4991 4991
4992 rtl8180_set_mode(dev, EPROM_CMD_CONFIG); 4992 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
4993 4993
4994 conf3 = read_nic_byte(dev, CONFIG3); 4994 conf3 = read_nic_byte(dev, CONFIG3);
4995 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT)); 4995 write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
4996 write_nic_dword(dev, ANAPARAM, a); 4996 write_nic_dword(dev, ANAPARAM, a);
4997 4997
4998 conf3 = read_nic_byte(dev, CONFIG3); 4998 conf3 = read_nic_byte(dev, CONFIG3);
4999 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT)); 4999 write_nic_byte(dev, CONFIG3, conf3 &~(1<<CONFIG3_ANAPARAM_W_SHIFT));
5000 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 5000 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5001 } 5001 }
5002 5002
5003 5003
5004 void rtl8185_tx_antenna(struct net_device *dev, u8 ant) 5004 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
5005 { 5005 {
5006 write_nic_byte(dev, TX_ANTENNA, ant); 5006 write_nic_byte(dev, TX_ANTENNA, ant);
5007 force_pci_posting(dev); 5007 force_pci_posting(dev);
5008 mdelay(1); 5008 mdelay(1);
5009 } 5009 }
5010 5010
5011 5011
5012 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data) 5012 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
5013 { 5013 {
5014 //u8 phyr; 5014 //u8 phyr;
5015 u32 phyw; 5015 u32 phyw;
5016 //int i; 5016 //int i;
5017 5017
5018 adr |= 0x80; 5018 adr |= 0x80;
5019 5019
5020 phyw= ((data<<8) | adr); 5020 phyw= ((data<<8) | adr);
5021 #if 0 5021 #if 0
5022 5022
5023 write_nic_dword(dev, PHY_ADR, phyw); 5023 write_nic_dword(dev, PHY_ADR, phyw);
5024 5024
5025 //read_nic_dword(dev, PHY_ADR); 5025 //read_nic_dword(dev, PHY_ADR);
5026 for(i=0;i<10;i++){ 5026 for(i=0;i<10;i++){
5027 write_nic_dword(dev, PHY_ADR, 0xffffff7f & phyw); 5027 write_nic_dword(dev, PHY_ADR, 0xffffff7f & phyw);
5028 phyr = read_nic_byte(dev, PHY_READ); 5028 phyr = read_nic_byte(dev, PHY_READ);
5029 if(phyr == (data&0xff)) break; 5029 if(phyr == (data&0xff)) break;
5030 5030
5031 } 5031 }
5032 #else 5032 #else
5033 // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. 5033 // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
5034 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24)); 5034 write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
5035 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16)); 5035 write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
5036 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8)); 5036 write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
5037 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) )); 5037 write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff) ));
5038 #endif 5038 #endif
5039 /* this is ok to fail when we write AGC table. check for AGC table might be 5039 /* this is ok to fail when we write AGC table. check for AGC table might be
5040 * done by masking with 0x7f instead of 0xff 5040 * done by masking with 0x7f instead of 0xff
5041 */ 5041 */
5042 //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr); 5042 //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
5043 } 5043 }
5044 5044
5045 5045
5046 inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data) 5046 inline void write_phy_ofdm (struct net_device *dev, u8 adr, u32 data)
5047 { 5047 {
5048 data = data & 0xff; 5048 data = data & 0xff;
5049 rtl8185_write_phy(dev, adr, data); 5049 rtl8185_write_phy(dev, adr, data);
5050 } 5050 }
5051 5051
5052 5052
5053 void write_phy_cck (struct net_device *dev, u8 adr, u32 data) 5053 void write_phy_cck (struct net_device *dev, u8 adr, u32 data)
5054 { 5054 {
5055 data = data & 0xff; 5055 data = data & 0xff;
5056 rtl8185_write_phy(dev, adr, data | 0x10000); 5056 rtl8185_write_phy(dev, adr, data | 0x10000);
5057 } 5057 }
5058 5058
5059 5059
5060 /* 70*3 = 210 ms 5060 /* 70*3 = 210 ms
5061 * I hope this is enougth 5061 * I hope this is enougth
5062 */ 5062 */
5063 #define MAX_PHY 70 5063 #define MAX_PHY 70
5064 void write_phy(struct net_device *dev, u8 adr, u8 data) 5064 void write_phy(struct net_device *dev, u8 adr, u8 data)
5065 { 5065 {
5066 u32 phy; 5066 u32 phy;
5067 int i; 5067 int i;
5068 5068
5069 phy = 0xff0000; 5069 phy = 0xff0000;
5070 phy |= adr; 5070 phy |= adr;
5071 phy |= 0x80; /* this should enable writing */ 5071 phy |= 0x80; /* this should enable writing */
5072 phy |= (data<<8); 5072 phy |= (data<<8);
5073 5073
5074 //PHY_ADR, PHY_R and PHY_W are contig and treated as one dword 5074 //PHY_ADR, PHY_R and PHY_W are contig and treated as one dword
5075 write_nic_dword(dev,PHY_ADR, phy); 5075 write_nic_dword(dev,PHY_ADR, phy);
5076 5076
5077 phy= 0xffff00; 5077 phy= 0xffff00;
5078 phy |= adr; 5078 phy |= adr;
5079 5079
5080 write_nic_dword(dev,PHY_ADR, phy); 5080 write_nic_dword(dev,PHY_ADR, phy);
5081 for(i=0;i<MAX_PHY;i++){ 5081 for(i=0;i<MAX_PHY;i++){
5082 phy=read_nic_dword(dev,PHY_ADR); 5082 phy=read_nic_dword(dev,PHY_ADR);
5083 phy= phy & 0xff0000; 5083 phy= phy & 0xff0000;
5084 phy= phy >> 16; 5084 phy= phy >> 16;
5085 if(phy == data){ //SUCCESS! 5085 if(phy == data){ //SUCCESS!
5086 force_pci_posting(dev); 5086 force_pci_posting(dev);
5087 mdelay(3); //random value 5087 mdelay(3); //random value
5088 #ifdef DEBUG_BB 5088 #ifdef DEBUG_BB
5089 DMESG("Phy wr %x,%x",adr,data); 5089 DMESG("Phy wr %x,%x",adr,data);
5090 #endif 5090 #endif
5091 return; 5091 return;
5092 }else{ 5092 }else{
5093 force_pci_posting(dev); 5093 force_pci_posting(dev);
5094 mdelay(3); //random value 5094 mdelay(3); //random value
5095 } 5095 }
5096 } 5096 }
5097 DMESGW ("Phy writing %x %x failed!", adr,data); 5097 DMESGW ("Phy writing %x %x failed!", adr,data);
5098 } 5098 }
5099 5099
5100 void rtl8185_set_rate(struct net_device *dev) 5100 void rtl8185_set_rate(struct net_device *dev)
5101 { 5101 {
5102 int i; 5102 int i;
5103 u16 word; 5103 u16 word;
5104 int basic_rate,min_rr_rate,max_rr_rate; 5104 int basic_rate,min_rr_rate,max_rr_rate;
5105 5105
5106 // struct r8180_priv *priv = ieee80211_priv(dev); 5106 // struct r8180_priv *priv = ieee80211_priv(dev);
5107 5107
5108 //if (ieee80211_is_54g(priv->ieee80211->current_network) && 5108 //if (ieee80211_is_54g(priv->ieee80211->current_network) &&
5109 // priv->ieee80211->state == IEEE80211_LINKED){ 5109 // priv->ieee80211->state == IEEE80211_LINKED){
5110 basic_rate = ieeerate2rtlrate(240); 5110 basic_rate = ieeerate2rtlrate(240);
5111 min_rr_rate = ieeerate2rtlrate(60); 5111 min_rr_rate = ieeerate2rtlrate(60);
5112 max_rr_rate = ieeerate2rtlrate(240); 5112 max_rr_rate = ieeerate2rtlrate(240);
5113 5113
5114 // 5114 //
5115 // }else{ 5115 // }else{
5116 // basic_rate = ieeerate2rtlrate(20); 5116 // basic_rate = ieeerate2rtlrate(20);
5117 // min_rr_rate = ieeerate2rtlrate(10); 5117 // min_rr_rate = ieeerate2rtlrate(10);
5118 // max_rr_rate = ieeerate2rtlrate(110); 5118 // max_rr_rate = ieeerate2rtlrate(110);
5119 // } 5119 // }
5120 5120
5121 write_nic_byte(dev, RESP_RATE, 5121 write_nic_byte(dev, RESP_RATE,
5122 max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT); 5122 max_rr_rate<<MAX_RESP_RATE_SHIFT| min_rr_rate<<MIN_RESP_RATE_SHIFT);
5123 5123
5124 word = read_nic_word(dev, BRSR); 5124 word = read_nic_word(dev, BRSR);
5125 word &= ~BRSR_MBR_8185; 5125 word &= ~BRSR_MBR_8185;
5126 5126
5127 5127
5128 for(i=0;i<=basic_rate;i++) 5128 for(i=0;i<=basic_rate;i++)
5129 word |= (1<<i); 5129 word |= (1<<i);
5130 5130
5131 write_nic_word(dev, BRSR, word); 5131 write_nic_word(dev, BRSR, word);
5132 //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE),read_nic_word(dev,BRSR)); 5132 //DMESG("RR:%x BRSR: %x", read_nic_byte(dev,RESP_RATE),read_nic_word(dev,BRSR));
5133 } 5133 }
5134 5134
5135 5135
5136 5136
5137 void rtl8180_adapter_start(struct net_device *dev) 5137 void rtl8180_adapter_start(struct net_device *dev)
5138 { 5138 {
5139 struct r8180_priv *priv = ieee80211_priv(dev); 5139 struct r8180_priv *priv = ieee80211_priv(dev);
5140 u32 anaparam; 5140 u32 anaparam;
5141 u16 word; 5141 u16 word;
5142 u8 config3; 5142 u8 config3;
5143 // int i; 5143 // int i;
5144 5144
5145 rtl8180_rtx_disable(dev); 5145 rtl8180_rtx_disable(dev);
5146 rtl8180_reset(dev); 5146 rtl8180_reset(dev);
5147 5147
5148 /* seems that 0xffff or 0xafff will cause 5148 /* seems that 0xffff or 0xafff will cause
5149 * HW interrupt line crash 5149 * HW interrupt line crash
5150 */ 5150 */
5151 5151
5152 //priv->irq_mask = 0xafff; 5152 //priv->irq_mask = 0xafff;
5153 // priv->irq_mask = 0x4fcf; 5153 // priv->irq_mask = 0x4fcf;
5154 5154
5155 /* enable beacon timeout, beacon TX ok and err 5155 /* enable beacon timeout, beacon TX ok and err
5156 * LP tx ok and err, HP TX ok and err, NP TX ok and err, 5156 * LP tx ok and err, HP TX ok and err, NP TX ok and err,
5157 * RX ok and ERR, and GP timer */ 5157 * RX ok and ERR, and GP timer */
5158 priv->irq_mask = 0x6fcf; 5158 priv->irq_mask = 0x6fcf;
5159 5159
5160 priv->dma_poll_mask = 0; 5160 priv->dma_poll_mask = 0;
5161 5161
5162 rtl8180_beacon_tx_disable(dev); 5162 rtl8180_beacon_tx_disable(dev);
5163 5163
5164 if(priv->card_type == CARDBUS ){ 5164 if(priv->card_type == CARDBUS ){
5165 config3=read_nic_byte(dev, CONFIG3); 5165 config3=read_nic_byte(dev, CONFIG3);
5166 write_nic_byte(dev,CONFIG3,config3 | CONFIG3_FuncRegEn); 5166 write_nic_byte(dev,CONFIG3,config3 | CONFIG3_FuncRegEn);
5167 write_nic_word(dev,FEMR, FEMR_INTR | FEMR_WKUP | FEMR_GWAKE | 5167 write_nic_word(dev,FEMR, FEMR_INTR | FEMR_WKUP | FEMR_GWAKE |
5168 read_nic_word(dev, FEMR)); 5168 read_nic_word(dev, FEMR));
5169 } 5169 }
5170 rtl8180_set_mode(dev, EPROM_CMD_CONFIG); 5170 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5171 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]); 5171 write_nic_dword(dev, MAC0, ((u32*)dev->dev_addr)[0]);
5172 write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff ); 5172 write_nic_word(dev, MAC4, ((u32*)dev->dev_addr)[1] & 0xffff );
5173 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 5173 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5174 5174
5175 rtl8180_update_msr(dev); 5175 rtl8180_update_msr(dev);
5176 5176
5177 if(!priv->card_8185){ 5177 if(!priv->card_8185){
5178 anaparam = eprom_read(dev,EPROM_ANAPARAM_ADDRLWORD); 5178 anaparam = eprom_read(dev,EPROM_ANAPARAM_ADDRLWORD);
5179 anaparam |= eprom_read(dev,EPROM_ANAPARAM_ADDRHWORD)<<16; 5179 anaparam |= eprom_read(dev,EPROM_ANAPARAM_ADDRHWORD)<<16;
5180 5180
5181 rtl8180_set_anaparam(dev,anaparam); 5181 rtl8180_set_anaparam(dev,anaparam);
5182 } 5182 }
5183 /* These might be unnecessary since we do in rx_enable / tx_enable */ 5183 /* These might be unnecessary since we do in rx_enable / tx_enable */
5184 fix_rx_fifo(dev); 5184 fix_rx_fifo(dev);
5185 fix_tx_fifo(dev); 5185 fix_tx_fifo(dev);
5186 /*set_nic_rxring(dev); 5186 /*set_nic_rxring(dev);
5187 set_nic_txring(dev);*/ 5187 set_nic_txring(dev);*/
5188 5188
5189 rtl8180_set_mode(dev, EPROM_CMD_CONFIG); 5189 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5190 5190
5191 /* 5191 /*
5192 The following is very strange. seems to be that 1 means test mode, 5192 The following is very strange. seems to be that 1 means test mode,
5193 but we need to acknolwledges the nic when a packet is ready 5193 but we need to acknolwledges the nic when a packet is ready
5194 altought we set it to 0 5194 altought we set it to 0
5195 */ 5195 */
5196 5196
5197 write_nic_byte(dev, 5197 write_nic_byte(dev,
5198 CONFIG2, read_nic_byte(dev,CONFIG2) &~\ 5198 CONFIG2, read_nic_byte(dev,CONFIG2) &~\
5199 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT)); 5199 (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
5200 //^the nic isn't in test mode 5200 //^the nic isn't in test mode
5201 if(priv->card_8185) 5201 if(priv->card_8185)
5202 write_nic_byte(dev, 5202 write_nic_byte(dev,
5203 CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4)); 5203 CONFIG2, read_nic_byte(dev,CONFIG2)|(1<<4));
5204 5204
5205 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 5205 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5206 5206
5207 write_nic_dword(dev,INT_TIMEOUT,0); 5207 write_nic_dword(dev,INT_TIMEOUT,0);
5208 #ifdef DEBUG_REGISTERS 5208 #ifdef DEBUG_REGISTERS
5209 rtl8180_dump_reg(dev); 5209 rtl8180_dump_reg(dev);
5210 #endif 5210 #endif
5211 5211
5212 if(!priv->card_8185) 5212 if(!priv->card_8185)
5213 { 5213 {
5214 /* 5214 /*
5215 experimental - this might be needed to calibrate AGC, 5215 experimental - this might be needed to calibrate AGC,
5216 anyway it shouldn't hurt 5216 anyway it shouldn't hurt
5217 */ 5217 */
5218 write_nic_byte(dev, CONFIG5, 5218 write_nic_byte(dev, CONFIG5,
5219 read_nic_byte(dev, CONFIG5) | (1<<AGCRESET_SHIFT)); 5219 read_nic_byte(dev, CONFIG5) | (1<<AGCRESET_SHIFT));
5220 read_nic_byte(dev, CONFIG5); 5220 read_nic_byte(dev, CONFIG5);
5221 udelay(15); 5221 udelay(15);
5222 write_nic_byte(dev, CONFIG5, 5222 write_nic_byte(dev, CONFIG5,
5223 read_nic_byte(dev, CONFIG5) &~ (1<<AGCRESET_SHIFT)); 5223 read_nic_byte(dev, CONFIG5) &~ (1<<AGCRESET_SHIFT));
5224 }else{ 5224 }else{
5225 5225
5226 write_nic_byte(dev, WPA_CONFIG, 0); 5226 write_nic_byte(dev, WPA_CONFIG, 0);
5227 //write_nic_byte(dev, TESTR, 0xd); 5227 //write_nic_byte(dev, TESTR, 0xd);
5228 } 5228 }
5229 5229
5230 rtl8180_no_hw_wep(dev); 5230 rtl8180_no_hw_wep(dev);
5231 5231
5232 if(priv->card_8185){ 5232 if(priv->card_8185){
5233 rtl8185_set_rate(dev); 5233 rtl8185_set_rate(dev);
5234 write_nic_byte(dev, RATE_FALLBACK, 0x81); 5234 write_nic_byte(dev, RATE_FALLBACK, 0x81);
5235 // write_nic_byte(dev, 0xdf, 0x15); 5235 // write_nic_byte(dev, 0xdf, 0x15);
5236 }else{ 5236 }else{
5237 word = read_nic_word(dev, BRSR); 5237 word = read_nic_word(dev, BRSR);
5238 word &= ~BRSR_MBR; 5238 word &= ~BRSR_MBR;
5239 word &= ~BRSR_BPLCP; 5239 word &= ~BRSR_BPLCP;
5240 word |= ieeerate2rtlrate(priv->ieee80211->basic_rate); 5240 word |= ieeerate2rtlrate(priv->ieee80211->basic_rate);
5241 //by amy 5241 //by amy
5242 word |= 0x0f; 5242 word |= 0x0f;
5243 //by amy 5243 //by amy
5244 write_nic_word(dev, BRSR, word); 5244 write_nic_word(dev, BRSR, word);
5245 } 5245 }
5246 5246
5247 5247
5248 if(priv->card_8185){ 5248 if(priv->card_8185){
5249 write_nic_byte(dev, GP_ENABLE,read_nic_byte(dev, GP_ENABLE) & ~(1<<6)); 5249 write_nic_byte(dev, GP_ENABLE,read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
5250 5250
5251 //FIXME cfg 3 ClkRun enable - isn't it ReadOnly ? 5251 //FIXME cfg 3 ClkRun enable - isn't it ReadOnly ?
5252 rtl8180_set_mode(dev, EPROM_CMD_CONFIG); 5252 rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
5253 write_nic_byte(dev,CONFIG3, read_nic_byte(dev, CONFIG3) 5253 write_nic_byte(dev,CONFIG3, read_nic_byte(dev, CONFIG3)
5254 |(1<<CONFIG3_CLKRUN_SHIFT)); 5254 |(1<<CONFIG3_CLKRUN_SHIFT));
5255 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 5255 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5256 5256
5257 } 5257 }
5258 5258
5259 priv->rf_init(dev); 5259 priv->rf_init(dev);
5260 5260
5261 if(priv->rf_set_sens != NULL) 5261 if(priv->rf_set_sens != NULL)
5262 priv->rf_set_sens(dev,priv->sens); 5262 priv->rf_set_sens(dev,priv->sens);
5263 rtl8180_irq_enable(dev); 5263 rtl8180_irq_enable(dev);
5264 5264
5265 netif_start_queue(dev); 5265 netif_start_queue(dev);
5266 /*DMESG ("lfree %d",get_curr_tx_free_desc(dev,LOW_PRIORITY)); 5266 /*DMESG ("lfree %d",get_curr_tx_free_desc(dev,LOW_PRIORITY));
5267 5267
5268 DMESG ("nfree %d",get_curr_tx_free_desc(dev,NORM_PRIORITY)); 5268 DMESG ("nfree %d",get_curr_tx_free_desc(dev,NORM_PRIORITY));
5269 5269
5270 DMESG ("hfree %d",get_curr_tx_free_desc(dev,HI_PRIORITY)); 5270 DMESG ("hfree %d",get_curr_tx_free_desc(dev,HI_PRIORITY));
5271 if(check_nic_enought_desc(dev,NORM_PRIORITY)) DMESG("NORM OK"); 5271 if(check_nic_enought_desc(dev,NORM_PRIORITY)) DMESG("NORM OK");
5272 if(check_nic_enought_desc(dev,HI_PRIORITY)) DMESG("HI OK"); 5272 if(check_nic_enought_desc(dev,HI_PRIORITY)) DMESG("HI OK");
5273 if(check_nic_enought_desc(dev,LOW_PRIORITY)) DMESG("LOW OK");*/ 5273 if(check_nic_enought_desc(dev,LOW_PRIORITY)) DMESG("LOW OK");*/
5274 } 5274 }
5275 5275
5276 5276
5277 5277
5278 /* this configures registers for beacon tx and enables it via 5278 /* this configures registers for beacon tx and enables it via
5279 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might 5279 * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
5280 * be used to stop beacon transmission 5280 * be used to stop beacon transmission
5281 */ 5281 */
5282 void rtl8180_start_tx_beacon(struct net_device *dev) 5282 void rtl8180_start_tx_beacon(struct net_device *dev)
5283 { 5283 {
5284 // struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 5284 // struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5285 u16 word; 5285 u16 word;
5286 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA)); 5286 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5287 5287
5288 DMESG("Enabling beacon TX"); 5288 DMESG("Enabling beacon TX");
5289 //write_nic_byte(dev, 0x42,0xe6);// TCR 5289 //write_nic_byte(dev, 0x42,0xe6);// TCR
5290 // set_nic_txring(dev); 5290 // set_nic_txring(dev);
5291 // fix_tx_fifo(dev); 5291 // fix_tx_fifo(dev);
5292 rtl8180_prepare_beacon(dev); 5292 rtl8180_prepare_beacon(dev);
5293 rtl8180_irq_disable(dev); 5293 rtl8180_irq_disable(dev);
5294 rtl8180_beacon_tx_enable(dev); 5294 rtl8180_beacon_tx_enable(dev);
5295 #if 0 5295 #if 0
5296 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 5296 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5297 //write_nic_byte(dev,0x9d,0x20); //DMA Poll 5297 //write_nic_byte(dev,0x9d,0x20); //DMA Poll
5298 //write_nic_word(dev,0x7a,0); 5298 //write_nic_word(dev,0x7a,0);
5299 //write_nic_word(dev,0x7a,0x8000); 5299 //write_nic_word(dev,0x7a,0x8000);
5300 5300
5301 #if 0 5301 #if 0
5302 word = read_nic_word(dev, BcnItv); 5302 word = read_nic_word(dev, BcnItv);
5303 word &= ~BcnItv_BcnItv; // clear Bcn_Itv 5303 word &= ~BcnItv_BcnItv; // clear Bcn_Itv
5304 word |= priv->ieee80211->current_network.beacon_interval;//0x64; 5304 word |= priv->ieee80211->current_network.beacon_interval;//0x64;
5305 write_nic_word(dev, BcnItv, word); 5305 write_nic_word(dev, BcnItv, word);
5306 #endif 5306 #endif
5307 #endif 5307 #endif
5308 word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd; 5308 word = read_nic_word(dev, AtimWnd) &~ AtimWnd_AtimWnd;
5309 write_nic_word(dev, AtimWnd,word);// word |= 5309 write_nic_word(dev, AtimWnd,word);// word |=
5310 //priv->ieee80211->current_network.atim_window); 5310 //priv->ieee80211->current_network.atim_window);
5311 5311
5312 word = read_nic_word(dev, BintrItv); 5312 word = read_nic_word(dev, BintrItv);
5313 word &= ~BintrItv_BintrItv; 5313 word &= ~BintrItv_BintrItv;
5314 word |= 1000;/*priv->ieee80211->current_network.beacon_interval * 5314 word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
5315 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1); 5315 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
5316 // FIXME: check if correct ^^ worked with 0x3e8; 5316 // FIXME: check if correct ^^ worked with 0x3e8;
5317 */ 5317 */
5318 write_nic_word(dev, BintrItv, word); 5318 write_nic_word(dev, BintrItv, word);
5319 5319
5320 5320
5321 rtl8180_set_mode(dev, EPROM_CMD_NORMAL); 5321 rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
5322 5322
5323 // rtl8180_beacon_tx_enable(dev); 5323 // rtl8180_beacon_tx_enable(dev);
5324 #ifdef CONFIG_RTL8185B 5324 #ifdef CONFIG_RTL8185B
5325 rtl8185b_irq_enable(dev); 5325 rtl8185b_irq_enable(dev);
5326 #else 5326 #else
5327 rtl8180_irq_enable(dev); 5327 rtl8180_irq_enable(dev);
5328 #endif 5328 #endif
5329 /* VV !!!!!!!!!! VV*/ 5329 /* VV !!!!!!!!!! VV*/
5330 /* 5330 /*
5331 rtl8180_set_mode(dev,EPROM_CMD_CONFIG); 5331 rtl8180_set_mode(dev,EPROM_CMD_CONFIG);
5332 write_nic_byte(dev,0x9d,0x00); 5332 write_nic_byte(dev,0x9d,0x00);
5333 rtl8180_set_mode(dev,EPROM_CMD_NORMAL); 5333 rtl8180_set_mode(dev,EPROM_CMD_NORMAL);
5334 */ 5334 */
5335 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA)); 5335 // DMESG("ring %x %x", priv->txlpringdma,read_nic_dword(dev,TLPDA));
5336 5336
5337 } 5337 }
5338 5338
5339 5339
5340 5340
5341 /*************************************************************************** 5341 /***************************************************************************
5342 -------------------------------NET STUFF--------------------------- 5342 -------------------------------NET STUFF---------------------------
5343 ***************************************************************************/ 5343 ***************************************************************************/
5344 static struct net_device_stats *rtl8180_stats(struct net_device *dev) 5344 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
5345 { 5345 {
5346 struct r8180_priv *priv = ieee80211_priv(dev); 5346 struct r8180_priv *priv = ieee80211_priv(dev);
5347 5347
5348 return &priv->ieee80211->stats; 5348 return &priv->ieee80211->stats;
5349 } 5349 }
5350 // 5350 //
5351 // Change current and default preamble mode. 5351 // Change current and default preamble mode.
5352 // 2005.01.06, by rcnjko. 5352 // 2005.01.06, by rcnjko.
5353 // 5353 //
5354 bool 5354 bool
5355 MgntActSet_802_11_PowerSaveMode( 5355 MgntActSet_802_11_PowerSaveMode(
5356 struct r8180_priv *priv, 5356 struct r8180_priv *priv,
5357 RT_PS_MODE rtPsMode 5357 RT_PS_MODE rtPsMode
5358 ) 5358 )
5359 { 5359 {
5360 5360
5361 // Currently, we do not change power save mode on IBSS mode. 5361 // Currently, we do not change power save mode on IBSS mode.
5362 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) 5362 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5363 { 5363 {
5364 return false; 5364 return false;
5365 } 5365 }
5366 5366
5367 // 5367 //
5368 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us, 5368 // <RJ_NOTE> If we make HW to fill up the PwrMgt bit for us,
5369 // some AP will not response to our mgnt frames with PwrMgt bit set, 5369 // some AP will not response to our mgnt frames with PwrMgt bit set,
5370 // e.g. cannot associate the AP. 5370 // e.g. cannot associate the AP.
5371 // So I commented out it. 2005.02.16, by rcnjko. 5371 // So I commented out it. 2005.02.16, by rcnjko.
5372 // 5372 //
5373 // // Change device's power save mode. 5373 // // Change device's power save mode.
5374 // Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode ); 5374 // Adapter->HalFunc.SetPSModeHandler( Adapter, rtPsMode );
5375 5375
5376 // Update power save mode configured. 5376 // Update power save mode configured.
5377 // priv->dot11PowerSaveMode = rtPsMode; 5377 // priv->dot11PowerSaveMode = rtPsMode;
5378 priv->ieee80211->ps = rtPsMode; 5378 priv->ieee80211->ps = rtPsMode;
5379 // Determine ListenInterval. 5379 // Determine ListenInterval.
5380 #if 0 5380 #if 0
5381 if(priv->dot11PowerSaveMode == eMaxPs) 5381 if(priv->dot11PowerSaveMode == eMaxPs)
5382 { 5382 {
5383 priv->ieee80211->ListenInterval = 10; 5383 priv->ieee80211->ListenInterval = 10;
5384 } 5384 }
5385 else 5385 else
5386 { 5386 {
5387 priv->ieee80211->ListenInterval = 2; 5387 priv->ieee80211->ListenInterval = 2;
5388 } 5388 }
5389 #endif 5389 #endif
5390 return true; 5390 return true;
5391 } 5391 }
5392 5392
5393 //================================================================================ 5393 //================================================================================
5394 // Leisure Power Save in linked state. 5394 // Leisure Power Save in linked state.
5395 //================================================================================ 5395 //================================================================================
5396 5396
5397 // 5397 //
5398 // Description: 5398 // Description:
5399 // Enter the leisure power save mode. 5399 // Enter the leisure power save mode.
5400 // 5400 //
5401 void 5401 void
5402 LeisurePSEnter( 5402 LeisurePSEnter(
5403 struct r8180_priv *priv 5403 struct r8180_priv *priv
5404 ) 5404 )
5405 { 5405 {
5406 if (priv->bLeisurePs) 5406 if (priv->bLeisurePs)
5407 { 5407 {
5408 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED) 5408 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
5409 { 5409 {
5410 //printk("----Enter PS\n"); 5410 //printk("----Enter PS\n");
5411 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE 5411 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
5412 } 5412 }
5413 } 5413 }
5414 } 5414 }
5415 5415
5416 5416
5417 // 5417 //
5418 // Description: 5418 // Description:
5419 // Leave the leisure power save mode. 5419 // Leave the leisure power save mode.
5420 // 5420 //
5421 void 5421 void
5422 LeisurePSLeave( 5422 LeisurePSLeave(
5423 struct r8180_priv *priv 5423 struct r8180_priv *priv
5424 ) 5424 )
5425 { 5425 {
5426 if (priv->bLeisurePs) 5426 if (priv->bLeisurePs)
5427 { 5427 {
5428 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED) 5428 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
5429 { 5429 {
5430 //printk("----Leave PS\n"); 5430 //printk("----Leave PS\n");
5431 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED); 5431 MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
5432 } 5432 }
5433 } 5433 }
5434 } 5434 }
5435 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 5435 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5436 void rtl8180_hw_wakeup_wq (struct work_struct *work) 5436 void rtl8180_hw_wakeup_wq (struct work_struct *work)
5437 { 5437 {
5438 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq); 5438 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5439 // struct ieee80211_device * ieee = (struct ieee80211_device*) 5439 // struct ieee80211_device * ieee = (struct ieee80211_device*)
5440 // container_of(work, struct ieee80211_device, watch_dog_wq); 5440 // container_of(work, struct ieee80211_device, watch_dog_wq);
5441 struct delayed_work *dwork = container_of(work,struct delayed_work,work); 5441 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5442 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq); 5442 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_wakeup_wq);
5443 struct net_device *dev = ieee->dev; 5443 struct net_device *dev = ieee->dev;
5444 #else 5444 #else
5445 void rtl8180_hw_wakeup_wq(struct net_device *dev) 5445 void rtl8180_hw_wakeup_wq(struct net_device *dev)
5446 { 5446 {
5447 struct r8180_priv *priv = ieee80211_priv(dev); 5447 struct r8180_priv *priv = ieee80211_priv(dev);
5448 #endif 5448 #endif
5449 5449
5450 // printk("dev is %d\n",dev); 5450 // printk("dev is %d\n",dev);
5451 // printk("&*&(^*(&(&=========>%s()\n", __func__); 5451 // printk("&*&(^*(&(&=========>%s()\n", __func__);
5452 rtl8180_hw_wakeup(dev); 5452 rtl8180_hw_wakeup(dev);
5453 5453
5454 } 5454 }
5455 5455
5456 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 5456 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5457 void rtl8180_hw_sleep_wq (struct work_struct *work) 5457 void rtl8180_hw_sleep_wq (struct work_struct *work)
5458 { 5458 {
5459 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq); 5459 // struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
5460 // struct ieee80211_device * ieee = (struct ieee80211_device*) 5460 // struct ieee80211_device * ieee = (struct ieee80211_device*)
5461 // container_of(work, struct ieee80211_device, watch_dog_wq); 5461 // container_of(work, struct ieee80211_device, watch_dog_wq);
5462 struct delayed_work *dwork = container_of(work,struct delayed_work,work); 5462 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
5463 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq); 5463 struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_sleep_wq);
5464 struct net_device *dev = ieee->dev; 5464 struct net_device *dev = ieee->dev;
5465 #else 5465 #else
5466 void rtl8180_hw_sleep_wq(struct net_device *dev) 5466 void rtl8180_hw_sleep_wq(struct net_device *dev)
5467 { 5467 {
5468 struct r8180_priv *priv = ieee80211_priv(dev); 5468 struct r8180_priv *priv = ieee80211_priv(dev);
5469 #endif 5469 #endif
5470 5470
5471 rtl8180_hw_sleep_down(dev); 5471 rtl8180_hw_sleep_down(dev);
5472 } 5472 }
5473 5473
5474 //YJ,add,080828,for KeepAlive 5474 //YJ,add,080828,for KeepAlive
5475 static void MgntLinkKeepAlive(struct r8180_priv *priv ) 5475 static void MgntLinkKeepAlive(struct r8180_priv *priv )
5476 { 5476 {
5477 if (priv->keepAliveLevel == 0) 5477 if (priv->keepAliveLevel == 0)
5478 return; 5478 return;
5479 5479
5480 if(priv->ieee80211->state == IEEE80211_LINKED) 5480 if(priv->ieee80211->state == IEEE80211_LINKED)
5481 { 5481 {
5482 // 5482 //
5483 // Keep-Alive. 5483 // Keep-Alive.
5484 // 5484 //
5485 //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount); 5485 //printk("LastTx:%d Tx:%d LastRx:%d Rx:%ld Idle:%d\n",priv->link_detect.LastNumTxUnicast,priv->NumTxUnicast, priv->link_detect.LastNumRxUnicast, priv->ieee80211->NumRxUnicast, priv->link_detect.IdleCount);
5486 5486
5487 if ( (priv->keepAliveLevel== 2) || 5487 if ( (priv->keepAliveLevel== 2) ||
5488 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast && 5488 (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
5489 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast ) 5489 priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast )
5490 ) 5490 )
5491 { 5491 {
5492 priv->link_detect.IdleCount++; 5492 priv->link_detect.IdleCount++;
5493 5493
5494 // 5494 //
5495 // Send a Keep-Alive packet packet to AP if we had been idle for a while. 5495 // Send a Keep-Alive packet packet to AP if we had been idle for a while.
5496 // 5496 //
5497 if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) ) 5497 if(priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1) )
5498 { 5498 {
5499 priv->link_detect.IdleCount = 0; 5499 priv->link_detect.IdleCount = 0;
5500 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false); 5500 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
5501 } 5501 }
5502 } 5502 }
5503 else 5503 else
5504 { 5504 {
5505 priv->link_detect.IdleCount = 0; 5505 priv->link_detect.IdleCount = 0;
5506 } 5506 }
5507 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast; 5507 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
5508 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast; 5508 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
5509 } 5509 }
5510 } 5510 }
5511 //YJ,add,080828,for KeepAlive,end 5511 //YJ,add,080828,for KeepAlive,end
5512 5512
5513 static u8 read_acadapter_file(char *filename); 5513 static u8 read_acadapter_file(char *filename);
5514 void rtl8180_watch_dog(struct net_device *dev) 5514 void rtl8180_watch_dog(struct net_device *dev)
5515 { 5515 {
5516 struct r8180_priv *priv = ieee80211_priv(dev); 5516 struct r8180_priv *priv = ieee80211_priv(dev);
5517 bool bEnterPS = false; 5517 bool bEnterPS = false;
5518 bool bBusyTraffic = false; 5518 bool bBusyTraffic = false;
5519 u32 TotalRxNum = 0; 5519 u32 TotalRxNum = 0;
5520 u16 SlotIndex = 0; 5520 u16 SlotIndex = 0;
5521 u16 i = 0; 5521 u16 i = 0;
5522 #ifdef ENABLE_IPS 5522 #ifdef ENABLE_IPS
5523 if(priv->ieee80211->actscanning == false){ 5523 if(priv->ieee80211->actscanning == false){
5524 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){ 5524 if((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn)){
5525 IPSEnter(dev); 5525 IPSEnter(dev);
5526 } 5526 }
5527 } 5527 }
5528 #endif 5528 #endif
5529 //YJ,add,080828,for link state check 5529 //YJ,add,080828,for link state check
5530 if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){ 5530 if((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)){
5531 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum; 5531 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
5532 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod; 5532 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
5533 for( i=0; i<priv->link_detect.SlotNum; i++ ) 5533 for( i=0; i<priv->link_detect.SlotNum; i++ )
5534 TotalRxNum+= priv->link_detect.RxFrameNum[i]; 5534 TotalRxNum+= priv->link_detect.RxFrameNum[i];
5535 //printk("&&&&&=== TotalRxNum = %d\n", TotalRxNum); 5535 //printk("&&&&&=== TotalRxNum = %d\n", TotalRxNum);
5536 if(TotalRxNum == 0){ 5536 if(TotalRxNum == 0){
5537 priv->ieee80211->state = IEEE80211_ASSOCIATING; 5537 priv->ieee80211->state = IEEE80211_ASSOCIATING;
5538 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq); 5538 queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
5539 } 5539 }
5540 } 5540 }
5541 5541
5542 //YJ,add,080828,for KeepAlive 5542 //YJ,add,080828,for KeepAlive
5543 MgntLinkKeepAlive(priv); 5543 MgntLinkKeepAlive(priv);
5544 5544
5545 //YJ,add,080828,for LPS 5545 //YJ,add,080828,for LPS
5546 #ifdef ENABLE_LPS 5546 #ifdef ENABLE_LPS
5547 if(priv->PowerProfile == POWER_PROFILE_BATTERY ) 5547 if(priv->PowerProfile == POWER_PROFILE_BATTERY )
5548 { 5548 {
5549 //Turn on LeisurePS on battery power 5549 //Turn on LeisurePS on battery power
5550 //printk("!!!!!On battery power\n"); 5550 //printk("!!!!!On battery power\n");
5551 priv->bLeisurePs = true; 5551 priv->bLeisurePs = true;
5552 } 5552 }
5553 else if(priv->PowerProfile == POWER_PROFILE_AC ) 5553 else if(priv->PowerProfile == POWER_PROFILE_AC )
5554 { 5554 {
5555 // Turn off LeisurePS on AC power 5555 // Turn off LeisurePS on AC power
5556 //printk("----On AC power\n"); 5556 //printk("----On AC power\n");
5557 LeisurePSLeave(priv); 5557 LeisurePSLeave(priv);
5558 priv->bLeisurePs= false; 5558 priv->bLeisurePs= false;
5559 } 5559 }
5560 #endif 5560 #endif
5561 5561
5562 #if 0 5562 #if 0
5563 #ifndef ENABLE_LPS 5563 #ifndef ENABLE_LPS
5564 if(priv->ieee80211->state == IEEE80211_LINKED){ 5564 if(priv->ieee80211->state == IEEE80211_LINKED){
5565 if( priv->NumRxOkInPeriod> 666 || 5565 if( priv->NumRxOkInPeriod> 666 ||
5566 priv->NumTxOkInPeriod > 666 ) { 5566 priv->NumTxOkInPeriod > 666 ) {
5567 bBusyTraffic = true; 5567 bBusyTraffic = true;
5568 } 5568 }
5569 if((priv->ieee80211->NumRxData + priv->NumTxOkInPeriod)<8) { 5569 if((priv->ieee80211->NumRxData + priv->NumTxOkInPeriod)<8) {
5570 bEnterPS= true; 5570 bEnterPS= true;
5571 } 5571 }
5572 if(bEnterPS) { 5572 if(bEnterPS) {
5573 LeisurePSEnter(priv); 5573 LeisurePSEnter(priv);
5574 } 5574 }
5575 else { 5575 else {
5576 LeisurePSLeave(priv); 5576 LeisurePSLeave(priv);
5577 } 5577 }
5578 } 5578 }
5579 else { 5579 else {
5580 LeisurePSLeave(priv); 5580 LeisurePSLeave(priv);
5581 } 5581 }
5582 #endif 5582 #endif
5583 priv->NumRxOkInPeriod = 0; 5583 priv->NumRxOkInPeriod = 0;
5584 priv->NumTxOkInPeriod = 0; 5584 priv->NumTxOkInPeriod = 0;
5585 priv->ieee80211->NumRxData = 0; 5585 priv->ieee80211->NumRxData = 0;
5586 #else 5586 #else
5587 #ifdef ENABLE_LPS 5587 #ifdef ENABLE_LPS
5588 if(priv->ieee80211->state == IEEE80211_LINKED){ 5588 if(priv->ieee80211->state == IEEE80211_LINKED){
5589 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod; 5589 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
5590 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod); 5590 //printk("TxOk=%d RxOk=%d\n", priv->link_detect.NumTxOkInPeriod, priv->link_detect.NumRxOkInPeriod);
5591 if( priv->link_detect.NumRxOkInPeriod> 666 || 5591 if( priv->link_detect.NumRxOkInPeriod> 666 ||
5592 priv->link_detect.NumTxOkInPeriod> 666 ) { 5592 priv->link_detect.NumTxOkInPeriod> 666 ) {
5593 bBusyTraffic = true; 5593 bBusyTraffic = true;
5594 } 5594 }
5595 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8) 5595 if(((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
5596 || (priv->link_detect.NumRxOkInPeriod > 2)) { 5596 || (priv->link_detect.NumRxOkInPeriod > 2)) {
5597 bEnterPS= false; 5597 bEnterPS= false;
5598 } 5598 }
5599 else { 5599 else {
5600 bEnterPS= true; 5600 bEnterPS= true;
5601 } 5601 }
5602 5602
5603 if(bEnterPS) { 5603 if(bEnterPS) {
5604 LeisurePSEnter(priv); 5604 LeisurePSEnter(priv);
5605 } 5605 }
5606 else { 5606 else {
5607 LeisurePSLeave(priv); 5607 LeisurePSLeave(priv);
5608 } 5608 }
5609 } 5609 }
5610 else{ 5610 else{
5611 LeisurePSLeave(priv); 5611 LeisurePSLeave(priv);
5612 } 5612 }
5613 #endif 5613 #endif
5614 priv->link_detect.bBusyTraffic = bBusyTraffic; 5614 priv->link_detect.bBusyTraffic = bBusyTraffic;
5615 priv->link_detect.NumRxOkInPeriod = 0; 5615 priv->link_detect.NumRxOkInPeriod = 0;
5616 priv->link_detect.NumTxOkInPeriod = 0; 5616 priv->link_detect.NumTxOkInPeriod = 0;
5617 priv->ieee80211->NumRxDataInPeriod = 0; 5617 priv->ieee80211->NumRxDataInPeriod = 0;
5618 priv->ieee80211->NumRxBcnInPeriod = 0; 5618 priv->ieee80211->NumRxBcnInPeriod = 0;
5619 #endif 5619 #endif
5620 } 5620 }
5621 int _rtl8180_up(struct net_device *dev) 5621 int _rtl8180_up(struct net_device *dev)
5622 { 5622 {
5623 struct r8180_priv *priv = ieee80211_priv(dev); 5623 struct r8180_priv *priv = ieee80211_priv(dev);
5624 //int i; 5624 //int i;
5625 5625
5626 priv->up=1; 5626 priv->up=1;
5627 5627
5628 DMESG("Bringing up iface"); 5628 DMESG("Bringing up iface");
5629 #ifdef CONFIG_RTL8185B 5629 #ifdef CONFIG_RTL8185B
5630 rtl8185b_adapter_start(dev); 5630 rtl8185b_adapter_start(dev);
5631 rtl8185b_rx_enable(dev); 5631 rtl8185b_rx_enable(dev);
5632 rtl8185b_tx_enable(dev); 5632 rtl8185b_tx_enable(dev);
5633 #else 5633 #else
5634 rtl8180_adapter_start(dev); 5634 rtl8180_adapter_start(dev);
5635 rtl8180_rx_enable(dev); 5635 rtl8180_rx_enable(dev);
5636 rtl8180_tx_enable(dev); 5636 rtl8180_tx_enable(dev);
5637 #endif 5637 #endif
5638 #ifdef ENABLE_IPS 5638 #ifdef ENABLE_IPS
5639 if(priv->bInactivePs){ 5639 if(priv->bInactivePs){
5640 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC) 5640 if(priv->ieee80211->iw_mode == IW_MODE_ADHOC)
5641 IPSLeave(dev); 5641 IPSLeave(dev);
5642 } 5642 }
5643 #endif 5643 #endif
5644 //by amy 080312 5644 //by amy 080312
5645 #ifdef RATE_ADAPT 5645 #ifdef RATE_ADAPT
5646 timer_rate_adaptive((unsigned long)dev); 5646 timer_rate_adaptive((unsigned long)dev);
5647 #endif 5647 #endif
5648 //by amy 080312 5648 //by amy 080312
5649 watch_dog_adaptive((unsigned long)dev); 5649 watch_dog_adaptive((unsigned long)dev);
5650 #ifdef SW_ANTE 5650 #ifdef SW_ANTE
5651 if(priv->bSwAntennaDiverity) 5651 if(priv->bSwAntennaDiverity)
5652 SwAntennaDiversityTimerCallback(dev); 5652 SwAntennaDiversityTimerCallback(dev);
5653 #endif 5653 #endif
5654 // IPSEnter(dev); 5654 // IPSEnter(dev);
5655 ieee80211_softmac_start_protocol(priv->ieee80211); 5655 ieee80211_softmac_start_protocol(priv->ieee80211);
5656 5656
5657 //Add for RF power on power off by lizhaoming 080512 5657 //Add for RF power on power off by lizhaoming 080512
5658 // priv->eRFPowerState = eRfOn; 5658 // priv->eRFPowerState = eRfOn;
5659 // printk("\n--------Start queue_work:GPIOChangeRFWorkItem"); 5659 // printk("\n--------Start queue_work:GPIOChangeRFWorkItem");
5660 // queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,1000); 5660 // queue_delayed_work(priv->ieee80211->wq,&priv->ieee80211->GPIOChangeRFWorkItem,1000);
5661 5661
5662 return 0; 5662 return 0;
5663 } 5663 }
5664 5664
5665 5665
5666 int rtl8180_open(struct net_device *dev) 5666 int rtl8180_open(struct net_device *dev)
5667 { 5667 {
5668 struct r8180_priv *priv = ieee80211_priv(dev); 5668 struct r8180_priv *priv = ieee80211_priv(dev);
5669 int ret; 5669 int ret;
5670 5670
5671 down(&priv->wx_sem); 5671 down(&priv->wx_sem);
5672 ret = rtl8180_up(dev); 5672 ret = rtl8180_up(dev);
5673 up(&priv->wx_sem); 5673 up(&priv->wx_sem);
5674 return ret; 5674 return ret;
5675 5675
5676 } 5676 }
5677 5677
5678 5678
5679 int rtl8180_up(struct net_device *dev) 5679 int rtl8180_up(struct net_device *dev)
5680 { 5680 {
5681 struct r8180_priv *priv = ieee80211_priv(dev); 5681 struct r8180_priv *priv = ieee80211_priv(dev);
5682 5682
5683 if (priv->up == 1) return -1; 5683 if (priv->up == 1) return -1;
5684 5684
5685 return _rtl8180_up(dev); 5685 return _rtl8180_up(dev);
5686 } 5686 }
5687 5687
5688 5688
5689 int rtl8180_close(struct net_device *dev) 5689 int rtl8180_close(struct net_device *dev)
5690 { 5690 {
5691 struct r8180_priv *priv = ieee80211_priv(dev); 5691 struct r8180_priv *priv = ieee80211_priv(dev);
5692 int ret; 5692 int ret;
5693 5693
5694 down(&priv->wx_sem); 5694 down(&priv->wx_sem);
5695 ret = rtl8180_down(dev); 5695 ret = rtl8180_down(dev);
5696 up(&priv->wx_sem); 5696 up(&priv->wx_sem);
5697 5697
5698 return ret; 5698 return ret;
5699 5699
5700 } 5700 }
5701 5701
5702 int rtl8180_down(struct net_device *dev) 5702 int rtl8180_down(struct net_device *dev)
5703 { 5703 {
5704 struct r8180_priv *priv = ieee80211_priv(dev); 5704 struct r8180_priv *priv = ieee80211_priv(dev);
5705 5705
5706 if (priv->up == 0) return -1; 5706 if (priv->up == 0) return -1;
5707 5707
5708 priv->up=0; 5708 priv->up=0;
5709 5709
5710 ieee80211_softmac_stop_protocol(priv->ieee80211); 5710 ieee80211_softmac_stop_protocol(priv->ieee80211);
5711 /* FIXME */ 5711 /* FIXME */
5712 if (!netif_queue_stopped(dev)) 5712 if (!netif_queue_stopped(dev))
5713 netif_stop_queue(dev); 5713 netif_stop_queue(dev);
5714 rtl8180_rtx_disable(dev); 5714 rtl8180_rtx_disable(dev);
5715 rtl8180_irq_disable(dev); 5715 rtl8180_irq_disable(dev);
5716 del_timer_sync(&priv->watch_dog_timer); 5716 del_timer_sync(&priv->watch_dog_timer);
5717 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq); 5717 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5718 //{by amy 080312 5718 //{by amy 080312
5719 del_timer_sync(&priv->rateadapter_timer); 5719 del_timer_sync(&priv->rateadapter_timer);
5720 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq); 5720 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5721 //by amy 080312} 5721 //by amy 080312}
5722 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq); 5722 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5723 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq); 5723 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5724 cancel_delayed_work(&priv->ieee80211->hw_dig_wq); 5724 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5725 cancel_delayed_work(&priv->ieee80211->tx_pw_wq); 5725 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5726 del_timer_sync(&priv->SwAntennaDiversityTimer); 5726 del_timer_sync(&priv->SwAntennaDiversityTimer);
5727 SetZebraRFPowerState8185(dev,eRfOff); 5727 SetZebraRFPowerState8185(dev,eRfOff);
5728 //ieee80211_softmac_stop_protocol(priv->ieee80211); 5728 //ieee80211_softmac_stop_protocol(priv->ieee80211);
5729 memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network)); 5729 memset(&(priv->ieee80211->current_network),0,sizeof(struct ieee80211_network));
5730 priv->ieee80211->state = IEEE80211_NOLINK; 5730 priv->ieee80211->state = IEEE80211_NOLINK;
5731 return 0; 5731 return 0;
5732 } 5732 }
5733 5733
5734 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 5734 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
5735 void rtl8180_restart_wq(struct work_struct *work) 5735 void rtl8180_restart_wq(struct work_struct *work)
5736 { 5736 {
5737 struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq); 5737 struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
5738 struct net_device *dev = priv->dev; 5738 struct net_device *dev = priv->dev;
5739 #else 5739 #else
5740 void rtl8180_restart_wq(struct net_device *dev) 5740 void rtl8180_restart_wq(struct net_device *dev)
5741 { 5741 {
5742 struct r8180_priv *priv = ieee80211_priv(dev); 5742 struct r8180_priv *priv = ieee80211_priv(dev);
5743 #endif 5743 #endif
5744 down(&priv->wx_sem); 5744 down(&priv->wx_sem);
5745 5745
5746 rtl8180_commit(dev); 5746 rtl8180_commit(dev);
5747 5747
5748 up(&priv->wx_sem); 5748 up(&priv->wx_sem);
5749 } 5749 }
5750 5750
5751 void rtl8180_restart(struct net_device *dev) 5751 void rtl8180_restart(struct net_device *dev)
5752 { 5752 {
5753 struct r8180_priv *priv = ieee80211_priv(dev); 5753 struct r8180_priv *priv = ieee80211_priv(dev);
5754 //rtl8180_commit(dev); 5754 //rtl8180_commit(dev);
5755 schedule_work(&priv->reset_wq); 5755 schedule_work(&priv->reset_wq);
5756 //DMESG("TXTIMEOUT"); 5756 //DMESG("TXTIMEOUT");
5757 } 5757 }
5758 5758
5759 5759
5760 void rtl8180_commit(struct net_device *dev) 5760 void rtl8180_commit(struct net_device *dev)
5761 { 5761 {
5762 struct r8180_priv *priv = ieee80211_priv(dev); 5762 struct r8180_priv *priv = ieee80211_priv(dev);
5763 5763
5764 if (priv->up == 0) return ; 5764 if (priv->up == 0) return ;
5765 //+by amy 080312 5765 //+by amy 080312
5766 del_timer_sync(&priv->watch_dog_timer); 5766 del_timer_sync(&priv->watch_dog_timer);
5767 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq); 5767 //cancel_delayed_work(&priv->ieee80211->watch_dog_wq);
5768 //{by amy 080312 5768 //{by amy 080312
5769 //by amy for rate adaptive 5769 //by amy for rate adaptive
5770 del_timer_sync(&priv->rateadapter_timer); 5770 del_timer_sync(&priv->rateadapter_timer);
5771 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq); 5771 cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
5772 //by amy for rate adaptive 5772 //by amy for rate adaptive
5773 //by amy 080312} 5773 //by amy 080312}
5774 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq); 5774 cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
5775 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq); 5775 cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
5776 cancel_delayed_work(&priv->ieee80211->hw_dig_wq); 5776 cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
5777 cancel_delayed_work(&priv->ieee80211->tx_pw_wq); 5777 cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
5778 del_timer_sync(&priv->SwAntennaDiversityTimer); 5778 del_timer_sync(&priv->SwAntennaDiversityTimer);
5779 ieee80211_softmac_stop_protocol(priv->ieee80211); 5779 ieee80211_softmac_stop_protocol(priv->ieee80211);
5780 rtl8180_irq_disable(dev); 5780 rtl8180_irq_disable(dev);
5781 rtl8180_rtx_disable(dev); 5781 rtl8180_rtx_disable(dev);
5782 _rtl8180_up(dev); 5782 _rtl8180_up(dev);
5783 } 5783 }
5784 5784
5785 5785
5786 static void r8180_set_multicast(struct net_device *dev) 5786 static void r8180_set_multicast(struct net_device *dev)
5787 { 5787 {
5788 struct r8180_priv *priv = ieee80211_priv(dev); 5788 struct r8180_priv *priv = ieee80211_priv(dev);
5789 short promisc; 5789 short promisc;
5790 5790
5791 //down(&priv->wx_sem); 5791 //down(&priv->wx_sem);
5792 5792
5793 promisc = (dev->flags & IFF_PROMISC) ? 1:0; 5793 promisc = (dev->flags & IFF_PROMISC) ? 1:0;
5794 5794
5795 if (promisc != priv->promisc) 5795 if (promisc != priv->promisc)
5796 rtl8180_restart(dev); 5796 rtl8180_restart(dev);
5797 5797
5798 priv->promisc = promisc; 5798 priv->promisc = promisc;
5799 5799
5800 //up(&priv->wx_sem); 5800 //up(&priv->wx_sem);
5801 } 5801 }
5802 5802
5803 #if 0 5803 #if 0
5804 /* this is called by the kernel when it needs to TX a 802.3 encapsulated frame*/ 5804 /* this is called by the kernel when it needs to TX a 802.3 encapsulated frame*/
5805 int rtl8180_8023_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) 5805 int rtl8180_8023_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
5806 { 5806 {
5807 struct r8180_priv *priv = ieee80211_priv(dev); 5807 struct r8180_priv *priv = ieee80211_priv(dev);
5808 int ret; 5808 int ret;
5809 unsigned long flags; 5809 unsigned long flags;
5810 5810
5811 spin_lock_irqsave(&priv->tx_lock,flags); 5811 spin_lock_irqsave(&priv->tx_lock,flags);
5812 ret = ieee80211_r8180_8023_hardstartxmit(skb,priv->ieee80211); 5812 ret = ieee80211_r8180_8023_hardstartxmit(skb,priv->ieee80211);
5813 spin_unlock_irqrestore(&priv->tx_lock,flags); 5813 spin_unlock_irqrestore(&priv->tx_lock,flags);
5814 return ret; 5814 return ret;
5815 } 5815 }
5816 #endif 5816 #endif
5817 5817
5818 int r8180_set_mac_adr(struct net_device *dev, void *mac) 5818 int r8180_set_mac_adr(struct net_device *dev, void *mac)
5819 { 5819 {
5820 struct r8180_priv *priv = ieee80211_priv(dev); 5820 struct r8180_priv *priv = ieee80211_priv(dev);
5821 struct sockaddr *addr = mac; 5821 struct sockaddr *addr = mac;
5822 5822
5823 down(&priv->wx_sem); 5823 down(&priv->wx_sem);
5824 5824
5825 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); 5825 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
5826 5826
5827 if(priv->ieee80211->iw_mode == IW_MODE_MASTER) 5827 if(priv->ieee80211->iw_mode == IW_MODE_MASTER)
5828 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN); 5828 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
5829 5829
5830 if (priv->up) { 5830 if (priv->up) {
5831 rtl8180_down(dev); 5831 rtl8180_down(dev);
5832 rtl8180_up(dev); 5832 rtl8180_up(dev);
5833 } 5833 }
5834 5834
5835 up(&priv->wx_sem); 5835 up(&priv->wx_sem);
5836 5836
5837 return 0; 5837 return 0;
5838 } 5838 }
5839 5839
5840 /* based on ipw2200 driver */ 5840 /* based on ipw2200 driver */
5841 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 5841 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5842 { 5842 {
5843 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 5843 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
5844 5844
5845 struct iwreq *wrq = (struct iwreq *) rq; 5845 struct iwreq *wrq = (struct iwreq *) rq;
5846 int ret=-1; 5846 int ret=-1;
5847 switch (cmd) { 5847 switch (cmd) {
5848 case RTL_IOCTL_WPA_SUPPLICANT: 5848 case RTL_IOCTL_WPA_SUPPLICANT:
5849 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data); 5849 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
5850 return ret; 5850 return ret;
5851 5851
5852 default: 5852 default:
5853 return -EOPNOTSUPP; 5853 return -EOPNOTSUPP;
5854 } 5854 }
5855 5855
5856 return -EOPNOTSUPP; 5856 return -EOPNOTSUPP;
5857 } 5857 }
5858 5858
5859 5859
5860 5860
5861 /**************************************************************************** 5861 /****************************************************************************
5862 -----------------------------PCI STUFF--------------------------- 5862 -----------------------------PCI STUFF---------------------------
5863 *****************************************************************************/ 5863 *****************************************************************************/
5864 5864
5865 5865
5866 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev, 5866 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
5867 const struct pci_device_id *id) 5867 const struct pci_device_id *id)
5868 { 5868 {
5869 unsigned long ioaddr = 0; 5869 unsigned long ioaddr = 0;
5870 struct net_device *dev = NULL; 5870 struct net_device *dev = NULL;
5871 struct r8180_priv *priv= NULL; 5871 struct r8180_priv *priv= NULL;
5872 //u8 *ptr; 5872 //u8 *ptr;
5873 u8 unit = 0; 5873 u8 unit = 0;
5874 5874
5875 #ifdef CONFIG_RTL8180_IO_MAP 5875 #ifdef CONFIG_RTL8180_IO_MAP
5876 unsigned long pio_start, pio_len, pio_flags; 5876 unsigned long pio_start, pio_len, pio_flags;
5877 #else 5877 #else
5878 unsigned long pmem_start, pmem_len, pmem_flags; 5878 unsigned long pmem_start, pmem_len, pmem_flags;
5879 #endif //end #ifdef RTL_IO_MAP 5879 #endif //end #ifdef RTL_IO_MAP
5880 5880
5881 DMESG("Configuring chip resources"); 5881 DMESG("Configuring chip resources");
5882 5882
5883 if( pci_enable_device (pdev) ){ 5883 if( pci_enable_device (pdev) ){
5884 DMESG("Failed to enable PCI device"); 5884 DMESG("Failed to enable PCI device");
5885 return -EIO; 5885 return -EIO;
5886 } 5886 }
5887 5887
5888 pci_set_master(pdev); 5888 pci_set_master(pdev);
5889 //pci_set_wmi(pdev); 5889 //pci_set_wmi(pdev);
5890 pci_set_dma_mask(pdev, 0xffffff00ULL); 5890 pci_set_dma_mask(pdev, 0xffffff00ULL);
5891 pci_set_consistent_dma_mask(pdev,0xffffff00ULL); 5891 pci_set_consistent_dma_mask(pdev,0xffffff00ULL);
5892 dev = alloc_ieee80211(sizeof(struct r8180_priv)); 5892 dev = alloc_ieee80211(sizeof(struct r8180_priv));
5893 if (!dev) 5893 if (!dev)
5894 return -ENOMEM; 5894 return -ENOMEM;
5895 priv = ieee80211_priv(dev); 5895 priv = ieee80211_priv(dev);
5896 priv->ieee80211 = netdev_priv(dev); 5896 priv->ieee80211 = netdev_priv(dev);
5897 5897
5898 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) 5898 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
5899 SET_MODULE_OWNER(dev); 5899 SET_MODULE_OWNER(dev);
5900 #endif 5900 #endif
5901 pci_set_drvdata(pdev, dev); 5901 pci_set_drvdata(pdev, dev);
5902 SET_NETDEV_DEV(dev, &pdev->dev); 5902 SET_NETDEV_DEV(dev, &pdev->dev);
5903 5903
5904 priv = ieee80211_priv(dev); 5904 priv = ieee80211_priv(dev);
5905 // memset(priv,0,sizeof(struct r8180_priv)); 5905 // memset(priv,0,sizeof(struct r8180_priv));
5906 priv->pdev=pdev; 5906 priv->pdev=pdev;
5907 5907
5908 5908
5909 #ifdef CONFIG_RTL8180_IO_MAP 5909 #ifdef CONFIG_RTL8180_IO_MAP
5910 5910
5911 pio_start = (unsigned long)pci_resource_start (pdev, 0); 5911 pio_start = (unsigned long)pci_resource_start (pdev, 0);
5912 pio_len = (unsigned long)pci_resource_len (pdev, 0); 5912 pio_len = (unsigned long)pci_resource_len (pdev, 0);
5913 pio_flags = (unsigned long)pci_resource_flags (pdev, 0); 5913 pio_flags = (unsigned long)pci_resource_flags (pdev, 0);
5914 5914
5915 if (!(pio_flags & IORESOURCE_IO)) { 5915 if (!(pio_flags & IORESOURCE_IO)) {
5916 DMESG("region #0 not a PIO resource, aborting"); 5916 DMESG("region #0 not a PIO resource, aborting");
5917 goto fail; 5917 goto fail;
5918 } 5918 }
5919 5919
5920 //DMESG("IO space @ 0x%08lx", pio_start ); 5920 //DMESG("IO space @ 0x%08lx", pio_start );
5921 if( ! request_region( pio_start, pio_len, RTL8180_MODULE_NAME ) ){ 5921 if( ! request_region( pio_start, pio_len, RTL8180_MODULE_NAME ) ){
5922 DMESG("request_region failed!"); 5922 DMESG("request_region failed!");
5923 goto fail; 5923 goto fail;
5924 } 5924 }
5925 5925
5926 ioaddr = pio_start; 5926 ioaddr = pio_start;
5927 dev->base_addr = ioaddr; // device I/O address 5927 dev->base_addr = ioaddr; // device I/O address
5928 5928
5929 #else 5929 #else
5930 5930
5931 pmem_start = pci_resource_start(pdev, 1); 5931 pmem_start = pci_resource_start(pdev, 1);
5932 pmem_len = pci_resource_len(pdev, 1); 5932 pmem_len = pci_resource_len(pdev, 1);
5933 pmem_flags = pci_resource_flags (pdev, 1); 5933 pmem_flags = pci_resource_flags (pdev, 1);
5934 5934
5935 if (!(pmem_flags & IORESOURCE_MEM)) { 5935 if (!(pmem_flags & IORESOURCE_MEM)) {
5936 DMESG("region #1 not a MMIO resource, aborting"); 5936 DMESG("region #1 not a MMIO resource, aborting");
5937 goto fail; 5937 goto fail;
5938 } 5938 }
5939 5939
5940 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start); 5940 //DMESG("Memory mapped space @ 0x%08lx ", pmem_start);
5941 if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) { 5941 if( ! request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
5942 DMESG("request_mem_region failed!"); 5942 DMESG("request_mem_region failed!");
5943 goto fail; 5943 goto fail;
5944 } 5944 }
5945 5945
5946 5946
5947 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len); 5947 ioaddr = (unsigned long)ioremap_nocache( pmem_start, pmem_len);
5948 if( ioaddr == (unsigned long)NULL ){ 5948 if( ioaddr == (unsigned long)NULL ){
5949 DMESG("ioremap failed!"); 5949 DMESG("ioremap failed!");
5950 // release_mem_region( pmem_start, pmem_len ); 5950 // release_mem_region( pmem_start, pmem_len );
5951 goto fail1; 5951 goto fail1;
5952 } 5952 }
5953 5953
5954 dev->mem_start = ioaddr; // shared mem start 5954 dev->mem_start = ioaddr; // shared mem start
5955 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end 5955 dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
5956 5956
5957 #endif //end #ifdef RTL_IO_MAP 5957 #endif //end #ifdef RTL_IO_MAP
5958 5958
5959 #ifdef CONFIG_RTL8185B 5959 #ifdef CONFIG_RTL8185B
5960 //pci_read_config_byte(pdev, 0x05, ptr); 5960 //pci_read_config_byte(pdev, 0x05, ptr);
5961 //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04)); 5961 //pci_write_config_byte(pdev, 0x05, (*ptr) & (~0x04));
5962 pci_read_config_byte(pdev, 0x05, &unit); 5962 pci_read_config_byte(pdev, 0x05, &unit);
5963 pci_write_config_byte(pdev, 0x05, unit & (~0x04)); 5963 pci_write_config_byte(pdev, 0x05, unit & (~0x04));
5964 #endif 5964 #endif
5965 5965
5966 dev->irq = pdev->irq; 5966 dev->irq = pdev->irq;
5967 priv->irq = 0; 5967 priv->irq = 0;
5968 5968
5969 dev->open = rtl8180_open; 5969 dev->open = rtl8180_open;
5970 dev->stop = rtl8180_close; 5970 dev->stop = rtl8180_close;
5971 //dev->hard_start_xmit = ieee80211_xmit; 5971 //dev->hard_start_xmit = ieee80211_xmit;
5972 dev->tx_timeout = rtl8180_restart; 5972 dev->tx_timeout = rtl8180_restart;
5973 dev->wireless_handlers = &r8180_wx_handlers_def; 5973 dev->wireless_handlers = &r8180_wx_handlers_def;
5974 dev->do_ioctl = rtl8180_ioctl; 5974 dev->do_ioctl = rtl8180_ioctl;
5975 dev->set_multicast_list = r8180_set_multicast; 5975 dev->set_multicast_list = r8180_set_multicast;
5976 dev->set_mac_address = r8180_set_mac_adr; 5976 dev->set_mac_address = r8180_set_mac_adr;
5977 5977
5978 #if WIRELESS_EXT >= 12 5978 #if WIRELESS_EXT >= 12
5979 #if WIRELESS_EXT < 17 5979 #if WIRELESS_EXT < 17
5980 dev->get_wireless_stats = r8180_get_wireless_stats; 5980 dev->get_wireless_stats = r8180_get_wireless_stats;
5981 #endif 5981 #endif
5982 dev->wireless_handlers = (struct iw_handler_def *) &r8180_wx_handlers_def; 5982 dev->wireless_handlers = (struct iw_handler_def *) &r8180_wx_handlers_def;
5983 #endif 5983 #endif
5984 5984
5985 dev->type=ARPHRD_ETHER; 5985 dev->type=ARPHRD_ETHER;
5986 dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13 5986 dev->watchdog_timeo = HZ*3; //added by david woo, 2007.12.13
5987 5987
5988 if (dev_alloc_name(dev, ifname) < 0){ 5988 if (dev_alloc_name(dev, ifname) < 0){
5989 DMESG("Oops: devname already taken! Trying wlan%%d...\n"); 5989 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
5990 ifname = "wlan%d"; 5990 ifname = "wlan%d";
5991 // ifname = "ath%d"; 5991 // ifname = "ath%d";
5992 dev_alloc_name(dev, ifname); 5992 dev_alloc_name(dev, ifname);
5993 } 5993 }
5994 5994
5995 5995
5996 if(rtl8180_init(dev)!=0){ 5996 if(rtl8180_init(dev)!=0){
5997 DMESG("Initialization failed"); 5997 DMESG("Initialization failed");
5998 goto fail1; 5998 goto fail1;
5999 } 5999 }
6000 6000
6001 netif_carrier_off(dev); 6001 netif_carrier_off(dev);
6002 6002
6003 register_netdev(dev); 6003 register_netdev(dev);
6004 6004
6005 rtl8180_proc_init_one(dev); 6005 rtl8180_proc_init_one(dev);
6006 6006
6007 DMESG("Driver probe completed\n"); 6007 DMESG("Driver probe completed\n");
6008 return 0; 6008 return 0;
6009 6009
6010 fail1: 6010 fail1:
6011 6011
6012 #ifdef CONFIG_RTL8180_IO_MAP 6012 #ifdef CONFIG_RTL8180_IO_MAP
6013 6013
6014 if( dev->base_addr != 0 ){ 6014 if( dev->base_addr != 0 ){
6015 6015
6016 release_region(dev->base_addr, 6016 release_region(dev->base_addr,
6017 pci_resource_len(pdev, 0) ); 6017 pci_resource_len(pdev, 0) );
6018 } 6018 }
6019 #else 6019 #else
6020 if( dev->mem_start != (unsigned long)NULL ){ 6020 if( dev->mem_start != (unsigned long)NULL ){
6021 iounmap( (void *)dev->mem_start ); 6021 iounmap( (void *)dev->mem_start );
6022 release_mem_region( pci_resource_start(pdev, 1), 6022 release_mem_region( pci_resource_start(pdev, 1),
6023 pci_resource_len(pdev, 1) ); 6023 pci_resource_len(pdev, 1) );
6024 } 6024 }
6025 #endif //end #ifdef RTL_IO_MAP 6025 #endif //end #ifdef RTL_IO_MAP
6026 6026
6027 6027
6028 fail: 6028 fail:
6029 if(dev){ 6029 if(dev){
6030 6030
6031 if (priv->irq) { 6031 if (priv->irq) {
6032 free_irq(dev->irq, dev); 6032 free_irq(dev->irq, dev);
6033 dev->irq=0; 6033 dev->irq=0;
6034 } 6034 }
6035 free_ieee80211(dev); 6035 free_ieee80211(dev);
6036 } 6036 }
6037 6037
6038 pci_disable_device(pdev); 6038 pci_disable_device(pdev);
6039 6039
6040 DMESG("wlan driver load failed\n"); 6040 DMESG("wlan driver load failed\n");
6041 pci_set_drvdata(pdev, NULL); 6041 pci_set_drvdata(pdev, NULL);
6042 return -ENODEV; 6042 return -ENODEV;
6043 6043
6044 } 6044 }
6045 6045
6046 6046
6047 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev) 6047 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
6048 { 6048 {
6049 struct r8180_priv *priv; 6049 struct r8180_priv *priv;
6050 struct net_device *dev = pci_get_drvdata(pdev); 6050 struct net_device *dev = pci_get_drvdata(pdev);
6051 if(dev){ 6051 if(dev){
6052 6052
6053 unregister_netdev(dev); 6053 unregister_netdev(dev);
6054 6054
6055 priv=ieee80211_priv(dev); 6055 priv=ieee80211_priv(dev);
6056 6056
6057 rtl8180_proc_remove_one(dev); 6057 rtl8180_proc_remove_one(dev);
6058 rtl8180_down(dev); 6058 rtl8180_down(dev);
6059 priv->rf_close(dev); 6059 priv->rf_close(dev);
6060 rtl8180_reset(dev); 6060 rtl8180_reset(dev);
6061 //rtl8180_rtx_disable(dev); 6061 //rtl8180_rtx_disable(dev);
6062 //rtl8180_irq_disable(dev); 6062 //rtl8180_irq_disable(dev);
6063 mdelay(10); 6063 mdelay(10);
6064 //write_nic_word(dev,INTA,read_nic_word(dev,INTA)); 6064 //write_nic_word(dev,INTA,read_nic_word(dev,INTA));
6065 //force_pci_posting(dev); 6065 //force_pci_posting(dev);
6066 //mdelay(10); 6066 //mdelay(10);
6067 6067
6068 if(priv->irq){ 6068 if(priv->irq){
6069 6069
6070 DMESG("Freeing irq %d",dev->irq); 6070 DMESG("Freeing irq %d",dev->irq);
6071 free_irq(dev->irq, dev); 6071 free_irq(dev->irq, dev);
6072 priv->irq=0; 6072 priv->irq=0;
6073 6073
6074 } 6074 }
6075 6075
6076 free_rx_desc_ring(dev); 6076 free_rx_desc_ring(dev);
6077 free_tx_desc_rings(dev); 6077 free_tx_desc_rings(dev);
6078 // free_beacon_desc_ring(dev,priv->txbeaconcount); 6078 // free_beacon_desc_ring(dev,priv->txbeaconcount);
6079 6079
6080 #ifdef CONFIG_RTL8180_IO_MAP 6080 #ifdef CONFIG_RTL8180_IO_MAP
6081 6081
6082 if( dev->base_addr != 0 ){ 6082 if( dev->base_addr != 0 ){
6083 6083
6084 release_region(dev->base_addr, 6084 release_region(dev->base_addr,
6085 pci_resource_len(pdev, 0) ); 6085 pci_resource_len(pdev, 0) );
6086 } 6086 }
6087 #else 6087 #else
6088 if( dev->mem_start != (unsigned long)NULL ){ 6088 if( dev->mem_start != (unsigned long)NULL ){
6089 iounmap( (void *)dev->mem_start ); 6089 iounmap( (void *)dev->mem_start );
6090 release_mem_region( pci_resource_start(pdev, 1), 6090 release_mem_region( pci_resource_start(pdev, 1),
6091 pci_resource_len(pdev, 1) ); 6091 pci_resource_len(pdev, 1) );
6092 } 6092 }
6093 #endif /*end #ifdef RTL_IO_MAP*/ 6093 #endif /*end #ifdef RTL_IO_MAP*/
6094 6094
6095 free_ieee80211(dev); 6095 free_ieee80211(dev);
6096 } 6096 }
6097 pci_disable_device(pdev); 6097 pci_disable_device(pdev);
6098 6098
6099 DMESG("wlan driver removed\n"); 6099 DMESG("wlan driver removed\n");
6100 } 6100 }
6101 6101
6102 6102
6103 /* fun with the built-in ieee80211 stack... */ 6103 /* fun with the built-in ieee80211 stack... */
6104 extern int ieee80211_crypto_init(void); 6104 extern int ieee80211_crypto_init(void);
6105 extern void ieee80211_crypto_deinit(void); 6105 extern void ieee80211_crypto_deinit(void);
6106 extern int ieee80211_crypto_tkip_init(void); 6106 extern int ieee80211_crypto_tkip_init(void);
6107 extern void ieee80211_crypto_tkip_exit(void); 6107 extern void ieee80211_crypto_tkip_exit(void);
6108 extern int ieee80211_crypto_ccmp_init(void); 6108 extern int ieee80211_crypto_ccmp_init(void);
6109 extern void ieee80211_crypto_ccmp_exit(void); 6109 extern void ieee80211_crypto_ccmp_exit(void);
6110 extern int ieee80211_crypto_wep_init(void); 6110 extern int ieee80211_crypto_wep_init(void);
6111 extern void ieee80211_crypto_wep_exit(void); 6111 extern void ieee80211_crypto_wep_exit(void);
6112 6112
6113 static int __init rtl8180_pci_module_init(void) 6113 static int __init rtl8180_pci_module_init(void)
6114 { 6114 {
6115 int ret; 6115 int ret;
6116 6116
6117 ret = ieee80211_crypto_init(); 6117 ret = ieee80211_crypto_init();
6118 if (ret) { 6118 if (ret) {
6119 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret); 6119 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
6120 return ret; 6120 return ret;
6121 } 6121 }
6122 ret = ieee80211_crypto_tkip_init(); 6122 ret = ieee80211_crypto_tkip_init();
6123 if (ret) { 6123 if (ret) {
6124 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret); 6124 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
6125 return ret; 6125 return ret;
6126 } 6126 }
6127 ret = ieee80211_crypto_ccmp_init(); 6127 ret = ieee80211_crypto_ccmp_init();
6128 if (ret) { 6128 if (ret) {
6129 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret); 6129 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
6130 return ret; 6130 return ret;
6131 } 6131 }
6132 ret = ieee80211_crypto_wep_init(); 6132 ret = ieee80211_crypto_wep_init();
6133 if (ret) { 6133 if (ret) {
6134 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret); 6134 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
6135 return ret; 6135 return ret;
6136 } 6136 }
6137 6137
6138 printk(KERN_INFO "\nLinux kernel driver for RTL8180 \ 6138 printk(KERN_INFO "\nLinux kernel driver for RTL8180 \
6139 / RTL8185 based WLAN cards\n"); 6139 / RTL8185 based WLAN cards\n");
6140 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n"); 6140 printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
6141 DMESG("Initializing module"); 6141 DMESG("Initializing module");
6142 DMESG("Wireless extensions version %d", WIRELESS_EXT); 6142 DMESG("Wireless extensions version %d", WIRELESS_EXT);
6143 rtl8180_proc_module_init(); 6143 rtl8180_proc_module_init();
6144 6144
6145 #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)) 6145 #if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22))
6146 if(0!=pci_module_init(&rtl8180_pci_driver)) 6146 if(0!=pci_module_init(&rtl8180_pci_driver))
6147 #else 6147 #else
6148 if(0!=pci_register_driver(&rtl8180_pci_driver)) 6148 if(0!=pci_register_driver(&rtl8180_pci_driver))
6149 #endif 6149 #endif
6150 //if(0!=pci_module_init(&rtl8180_pci_driver)) 6150 //if(0!=pci_module_init(&rtl8180_pci_driver))
6151 { 6151 {
6152 DMESG("No device found"); 6152 DMESG("No device found");
6153 /*pci_unregister_driver (&rtl8180_pci_driver);*/ 6153 /*pci_unregister_driver (&rtl8180_pci_driver);*/
6154 return -ENODEV; 6154 return -ENODEV;
6155 } 6155 }
6156 return 0; 6156 return 0;
6157 } 6157 }
6158 6158
6159 6159
6160 static void __exit rtl8180_pci_module_exit(void) 6160 static void __exit rtl8180_pci_module_exit(void)
6161 { 6161 {
6162 pci_unregister_driver (&rtl8180_pci_driver); 6162 pci_unregister_driver (&rtl8180_pci_driver);
6163 rtl8180_proc_module_remove(); 6163 rtl8180_proc_module_remove();
6164 ieee80211_crypto_deinit();
6165 ieee80211_crypto_tkip_exit(); 6164 ieee80211_crypto_tkip_exit();
6166 ieee80211_crypto_ccmp_exit(); 6165 ieee80211_crypto_ccmp_exit();
6167 ieee80211_crypto_wep_exit(); 6166 ieee80211_crypto_wep_exit();
6167 ieee80211_crypto_deinit();
6168 DMESG("Exiting"); 6168 DMESG("Exiting");
6169 } 6169 }
6170 6170
6171 6171
6172 void rtl8180_try_wake_queue(struct net_device *dev, int pri) 6172 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
6173 { 6173 {
6174 unsigned long flags; 6174 unsigned long flags;
6175 short enough_desc; 6175 short enough_desc;
6176 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 6176 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6177 6177
6178 spin_lock_irqsave(&priv->tx_lock,flags); 6178 spin_lock_irqsave(&priv->tx_lock,flags);
6179 enough_desc = check_nic_enought_desc(dev,pri); 6179 enough_desc = check_nic_enought_desc(dev,pri);
6180 spin_unlock_irqrestore(&priv->tx_lock,flags); 6180 spin_unlock_irqrestore(&priv->tx_lock,flags);
6181 6181
6182 if(enough_desc) 6182 if(enough_desc)
6183 ieee80211_wake_queue(priv->ieee80211); 6183 ieee80211_wake_queue(priv->ieee80211);
6184 } 6184 }
6185 6185
6186 /***************************************************************************** 6186 /*****************************************************************************
6187 -----------------------------IRQ STUFF--------------------------- 6187 -----------------------------IRQ STUFF---------------------------
6188 ******************************************************************************/ 6188 ******************************************************************************/
6189 6189
6190 void rtl8180_tx_isr(struct net_device *dev, int pri,short error) 6190 void rtl8180_tx_isr(struct net_device *dev, int pri,short error)
6191 { 6191 {
6192 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 6192 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6193 6193
6194 u32 *tail; //tail virtual addr 6194 u32 *tail; //tail virtual addr
6195 u32 *head; //head virtual addr 6195 u32 *head; //head virtual addr
6196 u32 *begin;//start of ring virtual addr 6196 u32 *begin;//start of ring virtual addr
6197 u32 *nicv; //nic pointer virtual addr 6197 u32 *nicv; //nic pointer virtual addr
6198 // u32 *txdv; //packet just TXed 6198 // u32 *txdv; //packet just TXed
6199 u32 nic; //nic pointer physical addr 6199 u32 nic; //nic pointer physical addr
6200 u32 nicbegin;// start of ring physical addr 6200 u32 nicbegin;// start of ring physical addr
6201 // short txed; 6201 // short txed;
6202 unsigned long flag; 6202 unsigned long flag;
6203 /* physical addr are ok on 32 bits since we set DMA mask*/ 6203 /* physical addr are ok on 32 bits since we set DMA mask*/
6204 6204
6205 int offs; 6205 int offs;
6206 int j,i; 6206 int j,i;
6207 int hd; 6207 int hd;
6208 if (error) priv->stats.txretry++; //tony 20060601 6208 if (error) priv->stats.txretry++; //tony 20060601
6209 spin_lock_irqsave(&priv->tx_lock,flag); 6209 spin_lock_irqsave(&priv->tx_lock,flag);
6210 switch(pri) { 6210 switch(pri) {
6211 case MANAGE_PRIORITY: 6211 case MANAGE_PRIORITY:
6212 tail = priv->txmapringtail; 6212 tail = priv->txmapringtail;
6213 begin = priv->txmapring; 6213 begin = priv->txmapring;
6214 head = priv->txmapringhead; 6214 head = priv->txmapringhead;
6215 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR); 6215 nic = read_nic_dword(dev,TX_MANAGEPRIORITY_RING_ADDR);
6216 nicbegin = priv->txmapringdma; 6216 nicbegin = priv->txmapringdma;
6217 break; 6217 break;
6218 6218
6219 case BK_PRIORITY: 6219 case BK_PRIORITY:
6220 tail = priv->txbkpringtail; 6220 tail = priv->txbkpringtail;
6221 begin = priv->txbkpring; 6221 begin = priv->txbkpring;
6222 head = priv->txbkpringhead; 6222 head = priv->txbkpringhead;
6223 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR); 6223 nic = read_nic_dword(dev,TX_BKPRIORITY_RING_ADDR);
6224 nicbegin = priv->txbkpringdma; 6224 nicbegin = priv->txbkpringdma;
6225 break; 6225 break;
6226 6226
6227 case BE_PRIORITY: 6227 case BE_PRIORITY:
6228 tail = priv->txbepringtail; 6228 tail = priv->txbepringtail;
6229 begin = priv->txbepring; 6229 begin = priv->txbepring;
6230 head = priv->txbepringhead; 6230 head = priv->txbepringhead;
6231 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR); 6231 nic = read_nic_dword(dev,TX_BEPRIORITY_RING_ADDR);
6232 nicbegin = priv->txbepringdma; 6232 nicbegin = priv->txbepringdma;
6233 break; 6233 break;
6234 6234
6235 case VI_PRIORITY: 6235 case VI_PRIORITY:
6236 tail = priv->txvipringtail; 6236 tail = priv->txvipringtail;
6237 begin = priv->txvipring; 6237 begin = priv->txvipring;
6238 head = priv->txvipringhead; 6238 head = priv->txvipringhead;
6239 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR); 6239 nic = read_nic_dword(dev,TX_VIPRIORITY_RING_ADDR);
6240 nicbegin = priv->txvipringdma; 6240 nicbegin = priv->txvipringdma;
6241 break; 6241 break;
6242 6242
6243 case VO_PRIORITY: 6243 case VO_PRIORITY:
6244 tail = priv->txvopringtail; 6244 tail = priv->txvopringtail;
6245 begin = priv->txvopring; 6245 begin = priv->txvopring;
6246 head = priv->txvopringhead; 6246 head = priv->txvopringhead;
6247 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR); 6247 nic = read_nic_dword(dev,TX_VOPRIORITY_RING_ADDR);
6248 nicbegin = priv->txvopringdma; 6248 nicbegin = priv->txvopringdma;
6249 break; 6249 break;
6250 6250
6251 case HI_PRIORITY: 6251 case HI_PRIORITY:
6252 tail = priv->txhpringtail; 6252 tail = priv->txhpringtail;
6253 begin = priv->txhpring; 6253 begin = priv->txhpring;
6254 head = priv->txhpringhead; 6254 head = priv->txhpringhead;
6255 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR); 6255 nic = read_nic_dword(dev,TX_HIGHPRIORITY_RING_ADDR);
6256 nicbegin = priv->txhpringdma; 6256 nicbegin = priv->txhpringdma;
6257 break; 6257 break;
6258 6258
6259 default: 6259 default:
6260 spin_unlock_irqrestore(&priv->tx_lock,flag); 6260 spin_unlock_irqrestore(&priv->tx_lock,flag);
6261 return ; 6261 return ;
6262 } 6262 }
6263 /* DMESG("%x %s %x %x",((int)nic & 0xfff)/8/4, 6263 /* DMESG("%x %s %x %x",((int)nic & 0xfff)/8/4,
6264 *(priv->txnpring + ((int)nic&0xfff)/4/8) & (1<<31) ? "filled" : "empty", 6264 *(priv->txnpring + ((int)nic&0xfff)/4/8) & (1<<31) ? "filled" : "empty",
6265 (priv->txnpringtail - priv->txnpring)/8,(priv->txnpringhead - 6265 (priv->txnpringtail - priv->txnpring)/8,(priv->txnpringhead -
6266 priv->txnpring)/8); 6266 priv->txnpring)/8);
6267 */ 6267 */
6268 //nicv = (u32*) ((nic - nicbegin) + (int)begin); 6268 //nicv = (u32*) ((nic - nicbegin) + (int)begin);
6269 nicv = (u32*) ((nic - nicbegin) + (u8*)begin); 6269 nicv = (u32*) ((nic - nicbegin) + (u8*)begin);
6270 if((head <= tail && (nicv > tail || nicv < head)) || 6270 if((head <= tail && (nicv > tail || nicv < head)) ||
6271 (head > tail && (nicv > tail && nicv < head))){ 6271 (head > tail && (nicv > tail && nicv < head))){
6272 6272
6273 DMESGW("nic has lost pointer"); 6273 DMESGW("nic has lost pointer");
6274 #ifdef DEBUG_TX_DESC 6274 #ifdef DEBUG_TX_DESC
6275 //check_tx_ring(dev,NORM_PRIORITY); 6275 //check_tx_ring(dev,NORM_PRIORITY);
6276 check_tx_ring(dev,pri); 6276 check_tx_ring(dev,pri);
6277 #endif 6277 #endif
6278 spin_unlock_irqrestore(&priv->tx_lock,flag); 6278 spin_unlock_irqrestore(&priv->tx_lock,flag);
6279 rtl8180_restart(dev); 6279 rtl8180_restart(dev);
6280 return; 6280 return;
6281 } 6281 }
6282 6282
6283 /* we check all the descriptors between the head and the nic, 6283 /* we check all the descriptors between the head and the nic,
6284 * but not the currenly pointed by the nic (the next to be txed) 6284 * but not the currenly pointed by the nic (the next to be txed)
6285 * and the previous of the pointed (might be in process ??) 6285 * and the previous of the pointed (might be in process ??)
6286 */ 6286 */
6287 //if (head == nic) return; 6287 //if (head == nic) return;
6288 //DMESG("%x %x",head,nic); 6288 //DMESG("%x %x",head,nic);
6289 offs = (nic - nicbegin); 6289 offs = (nic - nicbegin);
6290 //DMESG("%x %x %x",nic ,(u32)nicbegin, (int)nic -nicbegin); 6290 //DMESG("%x %x %x",nic ,(u32)nicbegin, (int)nic -nicbegin);
6291 6291
6292 offs = offs / 8 /4; 6292 offs = offs / 8 /4;
6293 6293
6294 hd = (head - begin) /8; 6294 hd = (head - begin) /8;
6295 6295
6296 if(offs >= hd) 6296 if(offs >= hd)
6297 j = offs - hd; 6297 j = offs - hd;
6298 else 6298 else
6299 j = offs + (priv->txringcount -1 -hd); 6299 j = offs + (priv->txringcount -1 -hd);
6300 // j= priv->txringcount -1- (hd - offs); 6300 // j= priv->txringcount -1- (hd - offs);
6301 6301
6302 j-=2; 6302 j-=2;
6303 if(j<0) j=0; 6303 if(j<0) j=0;
6304 6304
6305 6305
6306 for(i=0;i<j;i++) 6306 for(i=0;i<j;i++)
6307 { 6307 {
6308 // printk("+++++++++++++check status desc\n"); 6308 // printk("+++++++++++++check status desc\n");
6309 if((*head) & (1<<31)) 6309 if((*head) & (1<<31))
6310 break; 6310 break;
6311 if(((*head)&(0x10000000)) != 0){ 6311 if(((*head)&(0x10000000)) != 0){
6312 // printk("++++++++++++++last desc,retry count is %d\n",((*head) & (0x000000ff))); 6312 // printk("++++++++++++++last desc,retry count is %d\n",((*head) & (0x000000ff)));
6313 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff)); 6313 priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
6314 #if 1 6314 #if 1
6315 if(!error) 6315 if(!error)
6316 { 6316 {
6317 priv->NumTxOkTotal++; 6317 priv->NumTxOkTotal++;
6318 // printk("NumTxOkTotal is %d\n",priv->NumTxOkTotal++); 6318 // printk("NumTxOkTotal is %d\n",priv->NumTxOkTotal++);
6319 } 6319 }
6320 #endif 6320 #endif
6321 // printk("in function %s:curr_retry_count is %d\n",__func__,((*head) & (0x000000ff))); 6321 // printk("in function %s:curr_retry_count is %d\n",__func__,((*head) & (0x000000ff)));
6322 } 6322 }
6323 if(!error){ 6323 if(!error){
6324 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff); 6324 priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
6325 } 6325 }
6326 // printk("in function %s:curr_txokbyte_count is %d\n",__func__,(*(head+3)) & (0x00000fff)); 6326 // printk("in function %s:curr_txokbyte_count is %d\n",__func__,(*(head+3)) & (0x00000fff));
6327 *head = *head &~ (1<<31); 6327 *head = *head &~ (1<<31);
6328 6328
6329 if((head - begin)/8 == priv->txringcount-1) 6329 if((head - begin)/8 == priv->txringcount-1)
6330 head=begin; 6330 head=begin;
6331 6331
6332 else 6332 else
6333 head+=8; 6333 head+=8;
6334 } 6334 }
6335 #if 0 6335 #if 0
6336 if(nicv == begin) 6336 if(nicv == begin)
6337 txdv = begin + (priv->txringcount -1)*8; 6337 txdv = begin + (priv->txringcount -1)*8;
6338 else 6338 else
6339 txdv = nicv - 8; 6339 txdv = nicv - 8;
6340 6340
6341 txed = !(txdv[0] &(1<<31)); 6341 txed = !(txdv[0] &(1<<31));
6342 6342
6343 if(txed){ 6343 if(txed){
6344 if(!(txdv[0] & (1<<15))) error = 1; 6344 if(!(txdv[0] & (1<<15))) error = 1;
6345 //if(!(txdv[0] & (1<<30))) error = 1; 6345 //if(!(txdv[0] & (1<<30))) error = 1;
6346 if(error)DMESG("%x",txdv[0]); 6346 if(error)DMESG("%x",txdv[0]);
6347 } 6347 }
6348 #endif 6348 #endif
6349 //DMESG("%x",txdv[0]); 6349 //DMESG("%x",txdv[0]);
6350 /* the head has been moved to the last certainly TXed 6350 /* the head has been moved to the last certainly TXed
6351 * (or at least processed by the nic) packet. 6351 * (or at least processed by the nic) packet.
6352 * The driver take forcefully owning of all these packets 6352 * The driver take forcefully owning of all these packets
6353 * If the packet previous of the nic pointer has been 6353 * If the packet previous of the nic pointer has been
6354 * processed this doesn't matter: it will be checked 6354 * processed this doesn't matter: it will be checked
6355 * here at the next round. Anyway if no more packet are 6355 * here at the next round. Anyway if no more packet are
6356 * TXed no memory leak occour at all. 6356 * TXed no memory leak occour at all.
6357 */ 6357 */
6358 6358
6359 switch(pri) { 6359 switch(pri) {
6360 case MANAGE_PRIORITY: 6360 case MANAGE_PRIORITY:
6361 priv->txmapringhead = head; 6361 priv->txmapringhead = head;
6362 //printk("1==========================================> priority check!\n"); 6362 //printk("1==========================================> priority check!\n");
6363 if(priv->ack_tx_to_ieee){ 6363 if(priv->ack_tx_to_ieee){
6364 // try to implement power-save mode 2008.1.22 6364 // try to implement power-save mode 2008.1.22
6365 // printk("2==========================================> priority check!\n"); 6365 // printk("2==========================================> priority check!\n");
6366 #if 1 6366 #if 1
6367 if(rtl8180_is_tx_queue_empty(dev)){ 6367 if(rtl8180_is_tx_queue_empty(dev)){
6368 // printk("tx queue empty, after send null sleep packet, try to sleep !\n"); 6368 // printk("tx queue empty, after send null sleep packet, try to sleep !\n");
6369 priv->ack_tx_to_ieee = 0; 6369 priv->ack_tx_to_ieee = 0;
6370 ieee80211_ps_tx_ack(priv->ieee80211,!error); 6370 ieee80211_ps_tx_ack(priv->ieee80211,!error);
6371 } 6371 }
6372 #endif 6372 #endif
6373 } 6373 }
6374 break; 6374 break;
6375 6375
6376 case BK_PRIORITY: 6376 case BK_PRIORITY:
6377 priv->txbkpringhead = head; 6377 priv->txbkpringhead = head;
6378 break; 6378 break;
6379 6379
6380 case BE_PRIORITY: 6380 case BE_PRIORITY:
6381 priv->txbepringhead = head; 6381 priv->txbepringhead = head;
6382 break; 6382 break;
6383 6383
6384 case VI_PRIORITY: 6384 case VI_PRIORITY:
6385 priv->txvipringhead = head; 6385 priv->txvipringhead = head;
6386 break; 6386 break;
6387 6387
6388 case VO_PRIORITY: 6388 case VO_PRIORITY:
6389 priv->txvopringhead = head; 6389 priv->txvopringhead = head;
6390 break; 6390 break;
6391 6391
6392 case HI_PRIORITY: 6392 case HI_PRIORITY:
6393 priv->txhpringhead = head; 6393 priv->txhpringhead = head;
6394 break; 6394 break;
6395 } 6395 }
6396 6396
6397 /*DMESG("%x %x %x", (priv->txnpringhead - priv->txnpring) /8 , 6397 /*DMESG("%x %x %x", (priv->txnpringhead - priv->txnpring) /8 ,
6398 (priv->txnpringtail - priv->txnpring) /8, 6398 (priv->txnpringtail - priv->txnpring) /8,
6399 offs ); 6399 offs );
6400 */ 6400 */
6401 6401
6402 spin_unlock_irqrestore(&priv->tx_lock,flag); 6402 spin_unlock_irqrestore(&priv->tx_lock,flag);
6403 6403
6404 } 6404 }
6405 6405
6406 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 6406 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
6407 void rtl8180_tx_irq_wq(struct work_struct *work) 6407 void rtl8180_tx_irq_wq(struct work_struct *work)
6408 { 6408 {
6409 //struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq); 6409 //struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
6410 struct delayed_work *dwork = container_of(work,struct delayed_work,work); 6410 struct delayed_work *dwork = container_of(work,struct delayed_work,work);
6411 struct ieee80211_device * ieee = (struct ieee80211_device*) 6411 struct ieee80211_device * ieee = (struct ieee80211_device*)
6412 container_of(dwork, struct ieee80211_device, watch_dog_wq); 6412 container_of(dwork, struct ieee80211_device, watch_dog_wq);
6413 struct net_device *dev = ieee->dev; 6413 struct net_device *dev = ieee->dev;
6414 #else 6414 #else
6415 void rtl8180_tx_irq_wq(struct net_device *dev) 6415 void rtl8180_tx_irq_wq(struct net_device *dev)
6416 { 6416 {
6417 //struct r8180_priv *priv = ieee80211_priv(dev); 6417 //struct r8180_priv *priv = ieee80211_priv(dev);
6418 #endif 6418 #endif
6419 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0); 6419 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6420 } 6420 }
6421 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs) 6421 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
6422 { 6422 {
6423 struct net_device *dev = (struct net_device *) netdev; 6423 struct net_device *dev = (struct net_device *) netdev;
6424 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev); 6424 struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
6425 unsigned long flags; 6425 unsigned long flags;
6426 u32 inta; 6426 u32 inta;
6427 6427
6428 /* We should return IRQ_NONE, but for now let me keep this */ 6428 /* We should return IRQ_NONE, but for now let me keep this */
6429 if(priv->irq_enabled == 0) return IRQ_HANDLED; 6429 if(priv->irq_enabled == 0) return IRQ_HANDLED;
6430 6430
6431 spin_lock_irqsave(&priv->irq_th_lock,flags); 6431 spin_lock_irqsave(&priv->irq_th_lock,flags);
6432 6432
6433 #ifdef CONFIG_RTL8185B 6433 #ifdef CONFIG_RTL8185B
6434 //ISR: 4bytes 6434 //ISR: 4bytes
6435 inta = read_nic_dword(dev, ISR);// & priv->IntrMask; 6435 inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
6436 write_nic_dword(dev,ISR,inta); // reset int situation 6436 write_nic_dword(dev,ISR,inta); // reset int situation
6437 #else 6437 #else
6438 inta = read_nic_word(dev,INTA) & priv->irq_mask; 6438 inta = read_nic_word(dev,INTA) & priv->irq_mask;
6439 write_nic_word(dev,INTA,inta); // reset int situation 6439 write_nic_word(dev,INTA,inta); // reset int situation
6440 #endif 6440 #endif
6441 6441
6442 priv->stats.shints++; 6442 priv->stats.shints++;
6443 6443
6444 //DMESG("Enter interrupt, ISR value = 0x%08x", inta); 6444 //DMESG("Enter interrupt, ISR value = 0x%08x", inta);
6445 6445
6446 if(!inta){ 6446 if(!inta){
6447 spin_unlock_irqrestore(&priv->irq_th_lock,flags); 6447 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6448 return IRQ_HANDLED; 6448 return IRQ_HANDLED;
6449 /* 6449 /*
6450 most probably we can safely return IRQ_NONE, 6450 most probably we can safely return IRQ_NONE,
6451 but for now is better to avoid problems 6451 but for now is better to avoid problems
6452 */ 6452 */
6453 } 6453 }
6454 6454
6455 if(inta == 0xffff){ 6455 if(inta == 0xffff){
6456 /* HW disappared */ 6456 /* HW disappared */
6457 spin_unlock_irqrestore(&priv->irq_th_lock,flags); 6457 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6458 return IRQ_HANDLED; 6458 return IRQ_HANDLED;
6459 } 6459 }
6460 6460
6461 priv->stats.ints++; 6461 priv->stats.ints++;
6462 #ifdef DEBUG_IRQ 6462 #ifdef DEBUG_IRQ
6463 DMESG("NIC irq %x",inta); 6463 DMESG("NIC irq %x",inta);
6464 #endif 6464 #endif
6465 //priv->irqpending = inta; 6465 //priv->irqpending = inta;
6466 6466
6467 6467
6468 if(!netif_running(dev)) { 6468 if(!netif_running(dev)) {
6469 spin_unlock_irqrestore(&priv->irq_th_lock,flags); 6469 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6470 return IRQ_HANDLED; 6470 return IRQ_HANDLED;
6471 } 6471 }
6472 6472
6473 if(inta & ISR_TimeOut){ 6473 if(inta & ISR_TimeOut){
6474 write_nic_dword(dev, TimerInt, 0); 6474 write_nic_dword(dev, TimerInt, 0);
6475 //DMESG("=================>waking up"); 6475 //DMESG("=================>waking up");
6476 // rtl8180_hw_wakeup(dev); 6476 // rtl8180_hw_wakeup(dev);
6477 } 6477 }
6478 6478
6479 if(inta & ISR_TBDOK){ 6479 if(inta & ISR_TBDOK){
6480 priv->stats.txbeacon++; 6480 priv->stats.txbeacon++;
6481 } 6481 }
6482 6482
6483 if(inta & ISR_TBDER){ 6483 if(inta & ISR_TBDER){
6484 priv->stats.txbeaconerr++; 6484 priv->stats.txbeaconerr++;
6485 } 6485 }
6486 6486
6487 if(inta & IMR_TMGDOK ) { 6487 if(inta & IMR_TMGDOK ) {
6488 // priv->NumTxOkTotal++; 6488 // priv->NumTxOkTotal++;
6489 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0); 6489 rtl8180_tx_isr(dev,MANAGE_PRIORITY,0);
6490 // schedule_work(&priv->tx_irq_wq); 6490 // schedule_work(&priv->tx_irq_wq);
6491 6491
6492 } 6492 }
6493 6493
6494 if(inta & ISR_THPDER){ 6494 if(inta & ISR_THPDER){
6495 #ifdef DEBUG_TX 6495 #ifdef DEBUG_TX
6496 DMESG ("TX high priority ERR"); 6496 DMESG ("TX high priority ERR");
6497 #endif 6497 #endif
6498 priv->stats.txhperr++; 6498 priv->stats.txhperr++;
6499 rtl8180_tx_isr(dev,HI_PRIORITY,1); 6499 rtl8180_tx_isr(dev,HI_PRIORITY,1);
6500 priv->ieee80211->stats.tx_errors++; 6500 priv->ieee80211->stats.tx_errors++;
6501 } 6501 }
6502 6502
6503 if(inta & ISR_THPDOK){ //High priority tx ok 6503 if(inta & ISR_THPDOK){ //High priority tx ok
6504 #ifdef DEBUG_TX 6504 #ifdef DEBUG_TX
6505 DMESG ("TX high priority OK"); 6505 DMESG ("TX high priority OK");
6506 #endif 6506 #endif
6507 // priv->NumTxOkTotal++; 6507 // priv->NumTxOkTotal++;
6508 //priv->NumTxOkInPeriod++; //YJ,del,080828 6508 //priv->NumTxOkInPeriod++; //YJ,del,080828
6509 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828 6509 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6510 priv->stats.txhpokint++; 6510 priv->stats.txhpokint++;
6511 rtl8180_tx_isr(dev,HI_PRIORITY,0); 6511 rtl8180_tx_isr(dev,HI_PRIORITY,0);
6512 } 6512 }
6513 6513
6514 if(inta & ISR_RER) { 6514 if(inta & ISR_RER) {
6515 priv->stats.rxerr++; 6515 priv->stats.rxerr++;
6516 #ifdef DEBUG_RX 6516 #ifdef DEBUG_RX
6517 DMESGW("RX error int"); 6517 DMESGW("RX error int");
6518 #endif 6518 #endif
6519 } 6519 }
6520 #ifdef CONFIG_RTL8185B 6520 #ifdef CONFIG_RTL8185B
6521 if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY 6521 if(inta & ISR_TBKDER){ //corresponding to BK_PRIORITY
6522 priv->stats.txbkperr++; 6522 priv->stats.txbkperr++;
6523 priv->ieee80211->stats.tx_errors++; 6523 priv->ieee80211->stats.tx_errors++;
6524 #ifdef DEBUG_TX 6524 #ifdef DEBUG_TX
6525 DMESGW("TX bkp error int"); 6525 DMESGW("TX bkp error int");
6526 #endif 6526 #endif
6527 //tasklet_schedule(&priv->irq_tx_tasklet); 6527 //tasklet_schedule(&priv->irq_tx_tasklet);
6528 rtl8180_tx_isr(dev,BK_PRIORITY,1); 6528 rtl8180_tx_isr(dev,BK_PRIORITY,1);
6529 rtl8180_try_wake_queue(dev, BE_PRIORITY); 6529 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6530 } 6530 }
6531 6531
6532 if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY 6532 if(inta & ISR_TBEDER){ //corresponding to BE_PRIORITY
6533 priv->stats.txbeperr++; 6533 priv->stats.txbeperr++;
6534 priv->ieee80211->stats.tx_errors++; 6534 priv->ieee80211->stats.tx_errors++;
6535 #ifdef DEBUG_TX 6535 #ifdef DEBUG_TX
6536 DMESGW("TX bep error int"); 6536 DMESGW("TX bep error int");
6537 #endif 6537 #endif
6538 rtl8180_tx_isr(dev,BE_PRIORITY,1); 6538 rtl8180_tx_isr(dev,BE_PRIORITY,1);
6539 //tasklet_schedule(&priv->irq_tx_tasklet); 6539 //tasklet_schedule(&priv->irq_tx_tasklet);
6540 rtl8180_try_wake_queue(dev, BE_PRIORITY); 6540 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6541 } 6541 }
6542 #endif 6542 #endif
6543 if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY 6543 if(inta & ISR_TNPDER){ //corresponding to VO_PRIORITY
6544 priv->stats.txnperr++; 6544 priv->stats.txnperr++;
6545 priv->ieee80211->stats.tx_errors++; 6545 priv->ieee80211->stats.tx_errors++;
6546 #ifdef DEBUG_TX 6546 #ifdef DEBUG_TX
6547 DMESGW("TX np error int"); 6547 DMESGW("TX np error int");
6548 #endif 6548 #endif
6549 //tasklet_schedule(&priv->irq_tx_tasklet); 6549 //tasklet_schedule(&priv->irq_tx_tasklet);
6550 rtl8180_tx_isr(dev,NORM_PRIORITY,1); 6550 rtl8180_tx_isr(dev,NORM_PRIORITY,1);
6551 #ifdef CONFIG_RTL8185B 6551 #ifdef CONFIG_RTL8185B
6552 rtl8180_try_wake_queue(dev, NORM_PRIORITY); 6552 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
6553 #endif 6553 #endif
6554 } 6554 }
6555 6555
6556 if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY 6556 if(inta & ISR_TLPDER){ //corresponding to VI_PRIORITY
6557 priv->stats.txlperr++; 6557 priv->stats.txlperr++;
6558 priv->ieee80211->stats.tx_errors++; 6558 priv->ieee80211->stats.tx_errors++;
6559 #ifdef DEBUG_TX 6559 #ifdef DEBUG_TX
6560 DMESGW("TX lp error int"); 6560 DMESGW("TX lp error int");
6561 #endif 6561 #endif
6562 rtl8180_tx_isr(dev,LOW_PRIORITY,1); 6562 rtl8180_tx_isr(dev,LOW_PRIORITY,1);
6563 //tasklet_schedule(&priv->irq_tx_tasklet); 6563 //tasklet_schedule(&priv->irq_tx_tasklet);
6564 rtl8180_try_wake_queue(dev, LOW_PRIORITY); 6564 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6565 } 6565 }
6566 6566
6567 if(inta & ISR_ROK){ 6567 if(inta & ISR_ROK){
6568 #ifdef DEBUG_RX 6568 #ifdef DEBUG_RX
6569 DMESG("Frame arrived !"); 6569 DMESG("Frame arrived !");
6570 #endif 6570 #endif
6571 //priv->NumRxOkInPeriod++; //YJ,del,080828 6571 //priv->NumRxOkInPeriod++; //YJ,del,080828
6572 priv->stats.rxint++; 6572 priv->stats.rxint++;
6573 tasklet_schedule(&priv->irq_rx_tasklet); 6573 tasklet_schedule(&priv->irq_rx_tasklet);
6574 } 6574 }
6575 6575
6576 if(inta & ISR_RQoSOK ){ 6576 if(inta & ISR_RQoSOK ){
6577 #ifdef DEBUG_RX 6577 #ifdef DEBUG_RX
6578 DMESG("QoS Frame arrived !"); 6578 DMESG("QoS Frame arrived !");
6579 #endif 6579 #endif
6580 //priv->NumRxOkInPeriod++; //YJ,del,080828 6580 //priv->NumRxOkInPeriod++; //YJ,del,080828
6581 priv->stats.rxint++; 6581 priv->stats.rxint++;
6582 tasklet_schedule(&priv->irq_rx_tasklet); 6582 tasklet_schedule(&priv->irq_rx_tasklet);
6583 } 6583 }
6584 if(inta & ISR_BcnInt) { 6584 if(inta & ISR_BcnInt) {
6585 //DMESG("Preparing Beacons"); 6585 //DMESG("Preparing Beacons");
6586 rtl8180_prepare_beacon(dev); 6586 rtl8180_prepare_beacon(dev);
6587 } 6587 }
6588 6588
6589 if(inta & ISR_RDU){ 6589 if(inta & ISR_RDU){
6590 //#ifdef DEBUG_RX 6590 //#ifdef DEBUG_RX
6591 DMESGW("No RX descriptor available"); 6591 DMESGW("No RX descriptor available");
6592 priv->stats.rxrdu++; 6592 priv->stats.rxrdu++;
6593 //#endif 6593 //#endif
6594 tasklet_schedule(&priv->irq_rx_tasklet); 6594 tasklet_schedule(&priv->irq_rx_tasklet);
6595 /*queue_work(priv->workqueue ,&priv->restart_work);*/ 6595 /*queue_work(priv->workqueue ,&priv->restart_work);*/
6596 6596
6597 } 6597 }
6598 if(inta & ISR_RXFOVW){ 6598 if(inta & ISR_RXFOVW){
6599 #ifdef DEBUG_RX 6599 #ifdef DEBUG_RX
6600 DMESGW("RX fifo overflow"); 6600 DMESGW("RX fifo overflow");
6601 #endif 6601 #endif
6602 priv->stats.rxoverflow++; 6602 priv->stats.rxoverflow++;
6603 tasklet_schedule(&priv->irq_rx_tasklet); 6603 tasklet_schedule(&priv->irq_rx_tasklet);
6604 //queue_work(priv->workqueue ,&priv->restart_work); 6604 //queue_work(priv->workqueue ,&priv->restart_work);
6605 } 6605 }
6606 6606
6607 if(inta & ISR_TXFOVW) priv->stats.txoverflow++; 6607 if(inta & ISR_TXFOVW) priv->stats.txoverflow++;
6608 6608
6609 if(inta & ISR_TNPDOK){ //Normal priority tx ok 6609 if(inta & ISR_TNPDOK){ //Normal priority tx ok
6610 #ifdef DEBUG_TX 6610 #ifdef DEBUG_TX
6611 DMESG ("TX normal priority OK"); 6611 DMESG ("TX normal priority OK");
6612 #endif 6612 #endif
6613 // priv->NumTxOkTotal++; 6613 // priv->NumTxOkTotal++;
6614 //priv->NumTxOkInPeriod++; //YJ,del,080828 6614 //priv->NumTxOkInPeriod++; //YJ,del,080828
6615 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828 6615 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6616 // priv->ieee80211->stats.tx_packets++; 6616 // priv->ieee80211->stats.tx_packets++;
6617 priv->stats.txnpokint++; 6617 priv->stats.txnpokint++;
6618 rtl8180_tx_isr(dev,NORM_PRIORITY,0); 6618 rtl8180_tx_isr(dev,NORM_PRIORITY,0);
6619 } 6619 }
6620 6620
6621 if(inta & ISR_TLPDOK){ //Low priority tx ok 6621 if(inta & ISR_TLPDOK){ //Low priority tx ok
6622 #ifdef DEBUG_TX 6622 #ifdef DEBUG_TX
6623 DMESG ("TX low priority OK"); 6623 DMESG ("TX low priority OK");
6624 #endif 6624 #endif
6625 // priv->NumTxOkTotal++; 6625 // priv->NumTxOkTotal++;
6626 //priv->NumTxOkInPeriod++; //YJ,del,080828 6626 //priv->NumTxOkInPeriod++; //YJ,del,080828
6627 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828 6627 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6628 // priv->ieee80211->stats.tx_packets++; 6628 // priv->ieee80211->stats.tx_packets++;
6629 priv->stats.txlpokint++; 6629 priv->stats.txlpokint++;
6630 rtl8180_tx_isr(dev,LOW_PRIORITY,0); 6630 rtl8180_tx_isr(dev,LOW_PRIORITY,0);
6631 rtl8180_try_wake_queue(dev, LOW_PRIORITY); 6631 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
6632 } 6632 }
6633 6633
6634 #ifdef CONFIG_RTL8185B 6634 #ifdef CONFIG_RTL8185B
6635 if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY 6635 if(inta & ISR_TBKDOK){ //corresponding to BK_PRIORITY
6636 priv->stats.txbkpokint++; 6636 priv->stats.txbkpokint++;
6637 #ifdef DEBUG_TX 6637 #ifdef DEBUG_TX
6638 DMESGW("TX bk priority ok"); 6638 DMESGW("TX bk priority ok");
6639 #endif 6639 #endif
6640 // priv->NumTxOkTotal++; 6640 // priv->NumTxOkTotal++;
6641 //priv->NumTxOkInPeriod++; //YJ,del,080828 6641 //priv->NumTxOkInPeriod++; //YJ,del,080828
6642 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828 6642 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6643 rtl8180_tx_isr(dev,BK_PRIORITY,0); 6643 rtl8180_tx_isr(dev,BK_PRIORITY,0);
6644 rtl8180_try_wake_queue(dev, BE_PRIORITY); 6644 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6645 } 6645 }
6646 6646
6647 if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY 6647 if(inta & ISR_TBEDOK){ //corresponding to BE_PRIORITY
6648 priv->stats.txbeperr++; 6648 priv->stats.txbeperr++;
6649 #ifdef DEBUG_TX 6649 #ifdef DEBUG_TX
6650 DMESGW("TX be priority ok"); 6650 DMESGW("TX be priority ok");
6651 #endif 6651 #endif
6652 // priv->NumTxOkTotal++; 6652 // priv->NumTxOkTotal++;
6653 //priv->NumTxOkInPeriod++; //YJ,del,080828 6653 //priv->NumTxOkInPeriod++; //YJ,del,080828
6654 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828 6654 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
6655 rtl8180_tx_isr(dev,BE_PRIORITY,0); 6655 rtl8180_tx_isr(dev,BE_PRIORITY,0);
6656 rtl8180_try_wake_queue(dev, BE_PRIORITY); 6656 rtl8180_try_wake_queue(dev, BE_PRIORITY);
6657 } 6657 }
6658 #endif 6658 #endif
6659 force_pci_posting(dev); 6659 force_pci_posting(dev);
6660 spin_unlock_irqrestore(&priv->irq_th_lock,flags); 6660 spin_unlock_irqrestore(&priv->irq_th_lock,flags);
6661 6661
6662 return IRQ_HANDLED; 6662 return IRQ_HANDLED;
6663 } 6663 }
6664 6664
6665 6665
6666 void rtl8180_irq_rx_tasklet(struct r8180_priv* priv) 6666 void rtl8180_irq_rx_tasklet(struct r8180_priv* priv)
6667 { 6667 {
6668 // unsigned long flags; 6668 // unsigned long flags;
6669 6669
6670 /* spin_lock_irqsave(&priv->irq_lock, flags); 6670 /* spin_lock_irqsave(&priv->irq_lock, flags);
6671 priv->irq_mask &=~IMR_ROK; 6671 priv->irq_mask &=~IMR_ROK;
6672 priv->irq_mask &=~IMR_RDU; 6672 priv->irq_mask &=~IMR_RDU;
6673 6673
6674 rtl8180_irq_enable(priv->dev); 6674 rtl8180_irq_enable(priv->dev);
6675 spin_unlock_irqrestore(&priv->irq_lock, flags); 6675 spin_unlock_irqrestore(&priv->irq_lock, flags);
6676 */ 6676 */
6677 rtl8180_rx(priv->dev); 6677 rtl8180_rx(priv->dev);
6678 6678
6679 /* spin_lock_irqsave(&priv->irq_lock, flags); 6679 /* spin_lock_irqsave(&priv->irq_lock, flags);
6680 priv->irq_mask |= IMR_ROK; 6680 priv->irq_mask |= IMR_ROK;
6681 priv->irq_mask |= IMR_RDU; 6681 priv->irq_mask |= IMR_RDU;
6682 rtl8180_irq_enable(priv->dev); 6682 rtl8180_irq_enable(priv->dev);
6683 spin_unlock_irqrestore(&priv->irq_lock, flags); 6683 spin_unlock_irqrestore(&priv->irq_lock, flags);
6684 */ 6684 */
6685 } 6685 }
6686 6686
6687 /**************************************************************************** 6687 /****************************************************************************
6688 lizhaoming--------------------------- RF power on/power off ----------------- 6688 lizhaoming--------------------------- RF power on/power off -----------------
6689 *****************************************************************************/ 6689 *****************************************************************************/
6690 6690
6691 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) 6691 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
6692 void GPIOChangeRFWorkItemCallBack(struct work_struct *work) 6692 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
6693 { 6693 {
6694 //struct delayed_work *dwork = container_of(work, struct delayed_work, work); 6694 //struct delayed_work *dwork = container_of(work, struct delayed_work, work);
6695 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work); 6695 struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
6696 struct net_device *dev = ieee->dev; 6696 struct net_device *dev = ieee->dev;
6697 struct r8180_priv *priv = ieee80211_priv(dev); 6697 struct r8180_priv *priv = ieee80211_priv(dev);
6698 #else 6698 #else
6699 void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee) 6699 void GPIOChangeRFWorkItemCallBack(struct ieee80211_device *ieee)
6700 { 6700 {
6701 struct net_device *dev = ieee->dev; 6701 struct net_device *dev = ieee->dev;
6702 struct r8180_priv *priv = ieee80211_priv(dev); 6702 struct r8180_priv *priv = ieee80211_priv(dev);
6703 #endif 6703 #endif
6704 6704
6705 //u16 tmp2byte; 6705 //u16 tmp2byte;
6706 u8 btPSR; 6706 u8 btPSR;
6707 u8 btConfig0; 6707 u8 btConfig0;
6708 RT_RF_POWER_STATE eRfPowerStateToSet; 6708 RT_RF_POWER_STATE eRfPowerStateToSet;
6709 bool bActuallySet=false; 6709 bool bActuallySet=false;
6710 6710
6711 char *argv[3]; 6711 char *argv[3];
6712 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh"; 6712 static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
6713 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL}; 6713 static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
6714 static int readf_count = 0; 6714 static int readf_count = 0;
6715 //printk("============>%s in \n", __func__); 6715 //printk("============>%s in \n", __func__);
6716 6716
6717 #ifdef ENABLE_LPS 6717 #ifdef ENABLE_LPS
6718 if(readf_count % 10 == 0) 6718 if(readf_count % 10 == 0)
6719 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state"); 6719 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
6720 6720
6721 readf_count = (readf_count+1)%0xffff; 6721 readf_count = (readf_count+1)%0xffff;
6722 #endif 6722 #endif
6723 #if 0 6723 #if 0
6724 if(priv->up == 0)//driver stopped 6724 if(priv->up == 0)//driver stopped
6725 { 6725 {
6726 printk("\nDo nothing..."); 6726 printk("\nDo nothing...");
6727 goto out; 6727 goto out;
6728 } 6728 }
6729 else 6729 else
6730 #endif 6730 #endif
6731 { 6731 {
6732 // We should turn off LED before polling FF51[4]. 6732 // We should turn off LED before polling FF51[4].
6733 6733
6734 //Turn off LED. 6734 //Turn off LED.
6735 btPSR = read_nic_byte(dev, PSR); 6735 btPSR = read_nic_byte(dev, PSR);
6736 write_nic_byte(dev, PSR, (btPSR & ~BIT3)); 6736 write_nic_byte(dev, PSR, (btPSR & ~BIT3));
6737 6737
6738 //It need to delay 4us suggested by Jong, 2008-01-16 6738 //It need to delay 4us suggested by Jong, 2008-01-16
6739 udelay(4); 6739 udelay(4);
6740 6740
6741 //HW radio On/Off according to the value of FF51[4](config0) 6741 //HW radio On/Off according to the value of FF51[4](config0)
6742 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0); 6742 btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
6743 6743
6744 //Turn on LED. 6744 //Turn on LED.
6745 write_nic_byte(dev, PSR, btPSR| BIT3); 6745 write_nic_byte(dev, PSR, btPSR| BIT3);
6746 6746
6747 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff; 6747 eRfPowerStateToSet = (btConfig0 & BIT4) ? eRfOn : eRfOff;
6748 6748
6749 if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn)) 6749 if((priv->ieee80211->bHwRadioOff == true) && (eRfPowerStateToSet == eRfOn))
6750 { 6750 {
6751 priv->ieee80211->bHwRadioOff = false; 6751 priv->ieee80211->bHwRadioOff = false;
6752 bActuallySet = true; 6752 bActuallySet = true;
6753 } 6753 }
6754 else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff)) 6754 else if((priv->ieee80211->bHwRadioOff == false) && (eRfPowerStateToSet == eRfOff))
6755 { 6755 {
6756 priv->ieee80211->bHwRadioOff = true; 6756 priv->ieee80211->bHwRadioOff = true;
6757 bActuallySet = true; 6757 bActuallySet = true;
6758 } 6758 }
6759 6759
6760 if(bActuallySet) 6760 if(bActuallySet)
6761 { 6761 {
6762 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW); 6762 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
6763 6763
6764 /* To update the UI status for Power status changed */ 6764 /* To update the UI status for Power status changed */
6765 if(priv->ieee80211->bHwRadioOff == true) 6765 if(priv->ieee80211->bHwRadioOff == true)
6766 argv[1] = "RFOFF"; 6766 argv[1] = "RFOFF";
6767 else{ 6767 else{
6768 //if(!priv->RfOffReason) 6768 //if(!priv->RfOffReason)
6769 argv[1] = "RFON"; 6769 argv[1] = "RFON";
6770 //else 6770 //else
6771 // argv[1] = "RFOFF"; 6771 // argv[1] = "RFOFF";
6772 } 6772 }
6773 argv[0] = RadioPowerPath; 6773 argv[0] = RadioPowerPath;
6774 argv[2] = NULL; 6774 argv[2] = NULL;
6775 6775
6776 call_usermodehelper(RadioPowerPath,argv,envp,1); 6776 call_usermodehelper(RadioPowerPath,argv,envp,1);
6777 } 6777 }
6778 6778
6779 } 6779 }
6780 6780
6781 } 6781 }
6782 6782
6783 static u8 read_acadapter_file(char *filename) 6783 static u8 read_acadapter_file(char *filename)
6784 { 6784 {
6785 //#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) 6785 //#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21))
6786 #if 0 6786 #if 0
6787 int fd; 6787 int fd;
6788 char buf[1]; 6788 char buf[1];
6789 char ret[50]; 6789 char ret[50];
6790 int i = 0; 6790 int i = 0;
6791 int n = 0; 6791 int n = 0;
6792 mm_segment_t old_fs = get_fs(); 6792 mm_segment_t old_fs = get_fs();
6793 set_fs(KERNEL_DS); 6793 set_fs(KERNEL_DS);
6794 6794
6795 fd = sys_open(filename, O_RDONLY, 0); 6795 fd = sys_open(filename, O_RDONLY, 0);
6796 if (fd >= 0) { 6796 if (fd >= 0) {
6797 while (sys_read(fd, buf, 1) == 1) 6797 while (sys_read(fd, buf, 1) == 1)
6798 { 6798 {
6799 i++; 6799 i++;
6800 if(i>10) 6800 if(i>10)
6801 { 6801 {
6802 if(buf[0]!=' ') 6802 if(buf[0]!=' ')
6803 { 6803 {
6804 ret[n]=buf[0]; 6804 ret[n]=buf[0];
6805 n++; 6805 n++;
6806 } 6806 }
6807 } 6807 }
6808 } 6808 }
6809 sys_close(fd); 6809 sys_close(fd);
6810 } 6810 }
6811 ret[n]='\0'; 6811 ret[n]='\0';
6812 // printk("%s \n", ret); 6812 // printk("%s \n", ret);
6813 set_fs(old_fs); 6813 set_fs(old_fs);
6814 6814
6815 if(strncmp(ret, "off-line",8) == 0) 6815 if(strncmp(ret, "off-line",8) == 0)
6816 { 6816 {
6817 return 1; 6817 return 1;
6818 } 6818 }
6819 #endif 6819 #endif
6820 return 0; 6820 return 0;
6821 } 6821 }
6822 6822
6823 /*************************************************************************** 6823 /***************************************************************************
6824 ------------------- module init / exit stubs ---------------- 6824 ------------------- module init / exit stubs ----------------
6825 ****************************************************************************/ 6825 ****************************************************************************/
6826 module_init(rtl8180_pci_module_init); 6826 module_init(rtl8180_pci_module_init);
6827 module_exit(rtl8180_pci_module_exit); 6827 module_exit(rtl8180_pci_module_exit);
6828 6828
drivers/staging/winbond/wbusb.c
Diff comments   View file @ 778ef1e
1 /* 1 /*
2 * Copyright 2008 Pavel Machek <pavel@suse.cz> 2 * Copyright 2008 Pavel Machek <pavel@suse.cz>
3 * 3 *
4 * Distribute under GPLv2. 4 * Distribute under GPLv2.
5 */ 5 */
6 #include <net/mac80211.h> 6 #include <net/mac80211.h>
7 #include <linux/usb.h> 7 #include <linux/usb.h>
8 8
9 #include "core.h" 9 #include "core.h"
10 #include "mds_f.h" 10 #include "mds_f.h"
11 #include "mlmetxrx_f.h" 11 #include "mlmetxrx_f.h"
12 #include "mto_f.h" 12 #include "mto_f.h"
13 #include "wbhal_f.h" 13 #include "wbhal_f.h"
14 #include "wblinux_f.h" 14 #include "wblinux_f.h"
15 15
16 MODULE_AUTHOR("Original by: Jeff Lee<YY_Lee@issc.com.tw> Adapted to 2.6.x by Costantino Leandro (Rxart Desktop) <le_costantino@pixartargentina.com.ar>"); 16 MODULE_AUTHOR("Original by: Jeff Lee<YY_Lee@issc.com.tw> Adapted to 2.6.x by Costantino Leandro (Rxart Desktop) <le_costantino@pixartargentina.com.ar>");
17 MODULE_DESCRIPTION("IS89C35 802.11bg WLAN USB Driver"); 17 MODULE_DESCRIPTION("IS89C35 802.11bg WLAN USB Driver");
18 MODULE_LICENSE("GPL"); 18 MODULE_LICENSE("GPL");
19 MODULE_VERSION("0.1"); 19 MODULE_VERSION("0.1");
20 20
21 static struct usb_device_id wb35_table[] __devinitdata = { 21 static struct usb_device_id wb35_table[] __devinitdata = {
22 {USB_DEVICE(0x0416, 0x0035)}, 22 {USB_DEVICE(0x0416, 0x0035)},
23 {USB_DEVICE(0x18E8, 0x6201)}, 23 {USB_DEVICE(0x18E8, 0x6201)},
24 {USB_DEVICE(0x18E8, 0x6206)}, 24 {USB_DEVICE(0x18E8, 0x6206)},
25 {USB_DEVICE(0x18E8, 0x6217)}, 25 {USB_DEVICE(0x18E8, 0x6217)},
26 {USB_DEVICE(0x18E8, 0x6230)}, 26 {USB_DEVICE(0x18E8, 0x6230)},
27 {USB_DEVICE(0x18E8, 0x6233)}, 27 {USB_DEVICE(0x18E8, 0x6233)},
28 {USB_DEVICE(0x1131, 0x2035)}, 28 {USB_DEVICE(0x1131, 0x2035)},
29 { 0, } 29 { 0, }
30 }; 30 };
31 31
32 MODULE_DEVICE_TABLE(usb, wb35_table); 32 MODULE_DEVICE_TABLE(usb, wb35_table);
33 33
34 static struct ieee80211_rate wbsoft_rates[] = { 34 static struct ieee80211_rate wbsoft_rates[] = {
35 { .bitrate = 10, .flags = IEEE80211_RATE_SHORT_PREAMBLE }, 35 { .bitrate = 10, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
36 }; 36 };
37 37
38 static struct ieee80211_channel wbsoft_channels[] = { 38 static struct ieee80211_channel wbsoft_channels[] = {
39 { .center_freq = 2412}, 39 { .center_freq = 2412},
40 }; 40 };
41 41
42 static struct ieee80211_supported_band wbsoft_band_2GHz = { 42 static struct ieee80211_supported_band wbsoft_band_2GHz = {
43 .channels = wbsoft_channels, 43 .channels = wbsoft_channels,
44 .n_channels = ARRAY_SIZE(wbsoft_channels), 44 .n_channels = ARRAY_SIZE(wbsoft_channels),
45 .bitrates = wbsoft_rates, 45 .bitrates = wbsoft_rates,
46 .n_bitrates = ARRAY_SIZE(wbsoft_rates), 46 .n_bitrates = ARRAY_SIZE(wbsoft_rates),
47 }; 47 };
48 48
49 static int wbsoft_add_interface(struct ieee80211_hw *dev, 49 static int wbsoft_add_interface(struct ieee80211_hw *dev,
50 struct ieee80211_if_init_conf *conf) 50 struct ieee80211_if_init_conf *conf)
51 { 51 {
52 printk("wbsoft_add interface called\n"); 52 printk("wbsoft_add interface called\n");
53 return 0; 53 return 0;
54 } 54 }
55 55
56 static void wbsoft_remove_interface(struct ieee80211_hw *dev, 56 static void wbsoft_remove_interface(struct ieee80211_hw *dev,
57 struct ieee80211_if_init_conf *conf) 57 struct ieee80211_if_init_conf *conf)
58 { 58 {
59 printk("wbsoft_remove interface called\n"); 59 printk("wbsoft_remove interface called\n");
60 } 60 }
61 61
62 static void wbsoft_stop(struct ieee80211_hw *hw) 62 static void wbsoft_stop(struct ieee80211_hw *hw)
63 { 63 {
64 printk(KERN_INFO "%s called\n", __func__); 64 printk(KERN_INFO "%s called\n", __func__);
65 } 65 }
66 66
67 static int wbsoft_get_stats(struct ieee80211_hw *hw, 67 static int wbsoft_get_stats(struct ieee80211_hw *hw,
68 struct ieee80211_low_level_stats *stats) 68 struct ieee80211_low_level_stats *stats)
69 { 69 {
70 printk(KERN_INFO "%s called\n", __func__); 70 printk(KERN_INFO "%s called\n", __func__);
71 return 0; 71 return 0;
72 } 72 }
73 73
74 static int wbsoft_get_tx_stats(struct ieee80211_hw *hw, 74 static int wbsoft_get_tx_stats(struct ieee80211_hw *hw,
75 struct ieee80211_tx_queue_stats *stats) 75 struct ieee80211_tx_queue_stats *stats)
76 { 76 {
77 printk(KERN_INFO "%s called\n", __func__); 77 printk(KERN_INFO "%s called\n", __func__);
78 return 0; 78 return 0;
79 } 79 }
80 80
81 static void wbsoft_configure_filter(struct ieee80211_hw *dev, 81 static void wbsoft_configure_filter(struct ieee80211_hw *dev,
82 unsigned int changed_flags, 82 unsigned int changed_flags,
83 unsigned int *total_flags, 83 unsigned int *total_flags,
84 int mc_count, struct dev_mc_list *mclist) 84 int mc_count, struct dev_mc_list *mclist)
85 { 85 {
86 unsigned int bit_nr, new_flags; 86 unsigned int bit_nr, new_flags;
87 u32 mc_filter[2]; 87 u32 mc_filter[2];
88 int i; 88 int i;
89 89
90 new_flags = 0; 90 new_flags = 0;
91 91
92 if (*total_flags & FIF_PROMISC_IN_BSS) { 92 if (*total_flags & FIF_PROMISC_IN_BSS) {
93 new_flags |= FIF_PROMISC_IN_BSS; 93 new_flags |= FIF_PROMISC_IN_BSS;
94 mc_filter[1] = mc_filter[0] = ~0; 94 mc_filter[1] = mc_filter[0] = ~0;
95 } else if ((*total_flags & FIF_ALLMULTI) || (mc_count > 32)) { 95 } else if ((*total_flags & FIF_ALLMULTI) || (mc_count > 32)) {
96 new_flags |= FIF_ALLMULTI; 96 new_flags |= FIF_ALLMULTI;
97 mc_filter[1] = mc_filter[0] = ~0; 97 mc_filter[1] = mc_filter[0] = ~0;
98 } else { 98 } else {
99 mc_filter[1] = mc_filter[0] = 0; 99 mc_filter[1] = mc_filter[0] = 0;
100 for (i = 0; i < mc_count; i++) { 100 for (i = 0; i < mc_count; i++) {
101 if (!mclist) 101 if (!mclist)
102 break; 102 break;
103 printk("Should call ether_crc here\n"); 103 printk("Should call ether_crc here\n");
104 //bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; 104 //bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
105 bit_nr = 0; 105 bit_nr = 0;
106 106
107 bit_nr &= 0x3F; 107 bit_nr &= 0x3F;
108 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); 108 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
109 mclist = mclist->next; 109 mclist = mclist->next;
110 } 110 }
111 } 111 }
112 112
113 dev->flags &= ~IEEE80211_HW_RX_INCLUDES_FCS; 113 dev->flags &= ~IEEE80211_HW_RX_INCLUDES_FCS;
114 114
115 *total_flags = new_flags; 115 *total_flags = new_flags;
116 } 116 }
117 117
118 static int wbsoft_tx(struct ieee80211_hw *dev, struct sk_buff *skb) 118 static int wbsoft_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
119 { 119 {
120 struct wbsoft_priv *priv = dev->priv; 120 struct wbsoft_priv *priv = dev->priv;
121 121
122 MLMESendFrame(priv, skb->data, skb->len, FRAME_TYPE_802_11_MANAGEMENT); 122 MLMESendFrame(priv, skb->data, skb->len, FRAME_TYPE_802_11_MANAGEMENT);
123 123
124 return NETDEV_TX_OK; 124 return NETDEV_TX_OK;
125 } 125 }
126 126
127 127
128 static int wbsoft_start(struct ieee80211_hw *dev) 128 static int wbsoft_start(struct ieee80211_hw *dev)
129 { 129 {
130 struct wbsoft_priv *priv = dev->priv; 130 struct wbsoft_priv *priv = dev->priv;
131 131
132 priv->enabled = true; 132 priv->enabled = true;
133 133
134 return 0; 134 return 0;
135 } 135 }
136 136
137 static int wbsoft_config(struct ieee80211_hw *dev, u32 changed) 137 static int wbsoft_config(struct ieee80211_hw *dev, u32 changed)
138 { 138 {
139 struct wbsoft_priv *priv = dev->priv; 139 struct wbsoft_priv *priv = dev->priv;
140 struct ieee80211_conf *conf = &dev->conf; 140 struct ieee80211_conf *conf = &dev->conf;
141 ChanInfo ch; 141 ChanInfo ch;
142 142
143 printk("wbsoft_config called\n"); 143 printk("wbsoft_config called\n");
144 144
145 ch.band = 1; 145 ch.band = 1;
146 ch.ChanNo = 1; /* Should use channel_num, or something, as that is already pre-translated */ 146 ch.ChanNo = 1; /* Should use channel_num, or something, as that is already pre-translated */
147 147
148 148
149 hal_set_current_channel(&priv->sHwData, ch); 149 hal_set_current_channel(&priv->sHwData, ch);
150 hal_set_beacon_period(&priv->sHwData, conf->beacon_int); 150 hal_set_beacon_period(&priv->sHwData, conf->beacon_int);
151 // hal_set_cap_info(&priv->sHwData, ?? ); 151 // hal_set_cap_info(&priv->sHwData, ?? );
152 // hal_set_ssid(phw_data_t pHwData, u8 * pssid, u8 ssid_len); ?? 152 // hal_set_ssid(phw_data_t pHwData, u8 * pssid, u8 ssid_len); ??
153 hal_set_accept_broadcast(&priv->sHwData, 1); 153 hal_set_accept_broadcast(&priv->sHwData, 1);
154 hal_set_accept_promiscuous(&priv->sHwData, 1); 154 hal_set_accept_promiscuous(&priv->sHwData, 1);
155 hal_set_accept_multicast(&priv->sHwData, 1); 155 hal_set_accept_multicast(&priv->sHwData, 1);
156 hal_set_accept_beacon(&priv->sHwData, 1); 156 hal_set_accept_beacon(&priv->sHwData, 1);
157 hal_set_radio_mode(&priv->sHwData, 0); 157 hal_set_radio_mode(&priv->sHwData, 0);
158 //hal_set_antenna_number( phw_data_t pHwData, u8 number ) 158 //hal_set_antenna_number( phw_data_t pHwData, u8 number )
159 //hal_set_rf_power(phw_data_t pHwData, u8 PowerIndex) 159 //hal_set_rf_power(phw_data_t pHwData, u8 PowerIndex)
160 160
161 161
162 // hal_start_bss(&priv->sHwData, WLAN_BSSTYPE_INFRASTRUCTURE); ?? 162 // hal_start_bss(&priv->sHwData, WLAN_BSSTYPE_INFRASTRUCTURE); ??
163 163
164 //void hal_set_rates(phw_data_t pHwData, u8 * pbss_rates, 164 //void hal_set_rates(phw_data_t pHwData, u8 * pbss_rates,
165 // u8 length, unsigned char basic_rate_set) 165 // u8 length, unsigned char basic_rate_set)
166 166
167 return 0; 167 return 0;
168 } 168 }
169 169
170 static int wbsoft_config_interface(struct ieee80211_hw *dev, 170 static int wbsoft_config_interface(struct ieee80211_hw *dev,
171 struct ieee80211_vif *vif, 171 struct ieee80211_vif *vif,
172 struct ieee80211_if_conf *conf) 172 struct ieee80211_if_conf *conf)
173 { 173 {
174 printk("wbsoft_config_interface called\n"); 174 printk("wbsoft_config_interface called\n");
175 return 0; 175 return 0;
176 } 176 }
177 177
178 static u64 wbsoft_get_tsf(struct ieee80211_hw *dev) 178 static u64 wbsoft_get_tsf(struct ieee80211_hw *dev)
179 { 179 {
180 printk("wbsoft_get_tsf called\n"); 180 printk("wbsoft_get_tsf called\n");
181 return 0; 181 return 0;
182 } 182 }
183 183
184 static const struct ieee80211_ops wbsoft_ops = { 184 static const struct ieee80211_ops wbsoft_ops = {
185 .tx = wbsoft_tx, 185 .tx = wbsoft_tx,
186 .start = wbsoft_start, /* Start can be pretty much empty as we do wb35_hw_init() during probe? */ 186 .start = wbsoft_start, /* Start can be pretty much empty as we do wb35_hw_init() during probe? */
187 .stop = wbsoft_stop, 187 .stop = wbsoft_stop,
188 .add_interface = wbsoft_add_interface, 188 .add_interface = wbsoft_add_interface,
189 .remove_interface = wbsoft_remove_interface, 189 .remove_interface = wbsoft_remove_interface,
190 .config = wbsoft_config, 190 .config = wbsoft_config,
191 .config_interface = wbsoft_config_interface, 191 .config_interface = wbsoft_config_interface,
192 .configure_filter = wbsoft_configure_filter, 192 .configure_filter = wbsoft_configure_filter,
193 .get_stats = wbsoft_get_stats, 193 .get_stats = wbsoft_get_stats,
194 .get_tx_stats = wbsoft_get_tx_stats, 194 .get_tx_stats = wbsoft_get_tx_stats,
195 .get_tsf = wbsoft_get_tsf, 195 .get_tsf = wbsoft_get_tsf,
196 // conf_tx: hal_set_cwmin()/hal_set_cwmax; 196 // conf_tx: hal_set_cwmin()/hal_set_cwmax;
197 }; 197 };
198 198
199 static unsigned char wb35_hw_init(struct ieee80211_hw *hw) 199 static unsigned char wb35_hw_init(struct ieee80211_hw *hw)
200 { 200 {
201 struct wbsoft_priv *priv = hw->priv; 201 struct wbsoft_priv *priv = hw->priv;
202 phw_data_t pHwData; 202 phw_data_t pHwData;
203 u8 *pMacAddr; 203 u8 *pMacAddr;
204 u8 *pMacAddr2; 204 u8 *pMacAddr2;
205 u32 InitStep = 0; 205 u32 InitStep = 0;
206 u8 EEPROM_region; 206 u8 EEPROM_region;
207 u8 HwRadioOff; 207 u8 HwRadioOff;
208 208
209 // 209 //
210 // Setting default value for Linux 210 // Setting default value for Linux
211 // 211 //
212 priv->sLocalPara.region_INF = REGION_AUTO; 212 priv->sLocalPara.region_INF = REGION_AUTO;
213 priv->sLocalPara.TxRateMode = RATE_AUTO; 213 priv->sLocalPara.TxRateMode = RATE_AUTO;
214 priv->sLocalPara.bMacOperationMode = MODE_802_11_BG; // B/G mode 214 priv->sLocalPara.bMacOperationMode = MODE_802_11_BG; // B/G mode
215 priv->Mds.TxRTSThreshold = DEFAULT_RTSThreshold; 215 priv->Mds.TxRTSThreshold = DEFAULT_RTSThreshold;
216 priv->Mds.TxFragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD; 216 priv->Mds.TxFragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD;
217 hal_set_phy_type( &priv->sHwData, RF_WB_242_1 ); 217 hal_set_phy_type( &priv->sHwData, RF_WB_242_1 );
218 priv->sLocalPara.MTUsize = MAX_ETHERNET_PACKET_SIZE; 218 priv->sLocalPara.MTUsize = MAX_ETHERNET_PACKET_SIZE;
219 priv->sLocalPara.bPreambleMode = AUTO_MODE; 219 priv->sLocalPara.bPreambleMode = AUTO_MODE;
220 priv->sLocalPara.RadioOffStatus.boSwRadioOff = false; 220 priv->sLocalPara.RadioOffStatus.boSwRadioOff = false;
221 pHwData = &priv->sHwData; 221 pHwData = &priv->sHwData;
222 hal_set_phy_type( pHwData, RF_DECIDE_BY_INF ); 222 hal_set_phy_type( pHwData, RF_DECIDE_BY_INF );
223 223
224 //added by ws for wep key error detection 224 //added by ws for wep key error detection
225 priv->sLocalPara.bWepKeyError= false; 225 priv->sLocalPara.bWepKeyError= false;
226 priv->sLocalPara.bToSelfPacketReceived = false; 226 priv->sLocalPara.bToSelfPacketReceived = false;
227 priv->sLocalPara.WepKeyDetectTimerCount= 2 * 100; /// 2 seconds 227 priv->sLocalPara.WepKeyDetectTimerCount= 2 * 100; /// 2 seconds
228 228
229 // Initial USB hal 229 // Initial USB hal
230 InitStep = 1; 230 InitStep = 1;
231 pHwData = &priv->sHwData; 231 pHwData = &priv->sHwData;
232 if (!hal_init_hardware(hw)) 232 if (!hal_init_hardware(hw))
233 goto error; 233 goto error;
234 234
235 EEPROM_region = hal_get_region_from_EEPROM( pHwData ); 235 EEPROM_region = hal_get_region_from_EEPROM( pHwData );
236 if (EEPROM_region != REGION_AUTO) 236 if (EEPROM_region != REGION_AUTO)
237 priv->sLocalPara.region = EEPROM_region; 237 priv->sLocalPara.region = EEPROM_region;
238 else { 238 else {
239 if (priv->sLocalPara.region_INF != REGION_AUTO) 239 if (priv->sLocalPara.region_INF != REGION_AUTO)
240 priv->sLocalPara.region = priv->sLocalPara.region_INF; 240 priv->sLocalPara.region = priv->sLocalPara.region_INF;
241 else 241 else
242 priv->sLocalPara.region = REGION_USA; //default setting 242 priv->sLocalPara.region = REGION_USA; //default setting
243 } 243 }
244 244
245 // Get Software setting flag from hal 245 // Get Software setting flag from hal
246 priv->sLocalPara.boAntennaDiversity = false; 246 priv->sLocalPara.boAntennaDiversity = false;
247 if (hal_software_set(pHwData) & 0x00000001) 247 if (hal_software_set(pHwData) & 0x00000001)
248 priv->sLocalPara.boAntennaDiversity = true; 248 priv->sLocalPara.boAntennaDiversity = true;
249 249
250 // 250 //
251 // For TS module 251 // For TS module
252 // 252 //
253 InitStep = 2; 253 InitStep = 2;
254 254
255 // For MDS module 255 // For MDS module
256 InitStep = 3; 256 InitStep = 3;
257 Mds_initial(priv); 257 Mds_initial(priv);
258 258
259 //======================================= 259 //=======================================
260 // Initialize the SME, SCAN, MLME, ROAM 260 // Initialize the SME, SCAN, MLME, ROAM
261 //======================================= 261 //=======================================
262 InitStep = 4; 262 InitStep = 4;
263 InitStep = 5; 263 InitStep = 5;
264 InitStep = 6; 264 InitStep = 6;
265 265
266 // If no user-defined address in the registry, use the addresss "burned" on the NIC instead. 266 // If no user-defined address in the registry, use the addresss "burned" on the NIC instead.
267 pMacAddr = priv->sLocalPara.ThisMacAddress; 267 pMacAddr = priv->sLocalPara.ThisMacAddress;
268 pMacAddr2 = priv->sLocalPara.PermanentAddress; 268 pMacAddr2 = priv->sLocalPara.PermanentAddress;
269 hal_get_permanent_address( pHwData, priv->sLocalPara.PermanentAddress );// Reading ethernet address from EEPROM 269 hal_get_permanent_address( pHwData, priv->sLocalPara.PermanentAddress );// Reading ethernet address from EEPROM
270 if (memcmp(pMacAddr, "\x00\x00\x00\x00\x00\x00", MAC_ADDR_LENGTH) == 0) 270 if (memcmp(pMacAddr, "\x00\x00\x00\x00\x00\x00", MAC_ADDR_LENGTH) == 0)
271 memcpy(pMacAddr, pMacAddr2, MAC_ADDR_LENGTH); 271 memcpy(pMacAddr, pMacAddr2, MAC_ADDR_LENGTH);
272 else { 272 else {
273 // Set the user define MAC address 273 // Set the user define MAC address
274 hal_set_ethernet_address(pHwData, priv->sLocalPara.ThisMacAddress); 274 hal_set_ethernet_address(pHwData, priv->sLocalPara.ThisMacAddress);
275 } 275 }
276 276
277 //get current antenna 277 //get current antenna
278 priv->sLocalPara.bAntennaNo = hal_get_antenna_number(pHwData); 278 priv->sLocalPara.bAntennaNo = hal_get_antenna_number(pHwData);
279 #ifdef _PE_STATE_DUMP_ 279 #ifdef _PE_STATE_DUMP_
280 WBDEBUG(("Driver init, antenna no = %d\n", psLOCAL->bAntennaNo)); 280 WBDEBUG(("Driver init, antenna no = %d\n", psLOCAL->bAntennaNo));
281 #endif 281 #endif
282 hal_get_hw_radio_off( pHwData ); 282 hal_get_hw_radio_off( pHwData );
283 283
284 // Waiting for HAL setting OK 284 // Waiting for HAL setting OK
285 while (!hal_idle(pHwData)) 285 while (!hal_idle(pHwData))
286 msleep(10); 286 msleep(10);
287 287
288 MTO_Init(priv); 288 MTO_Init(priv);
289 289
290 HwRadioOff = hal_get_hw_radio_off( pHwData ); 290 HwRadioOff = hal_get_hw_radio_off( pHwData );
291 priv->sLocalPara.RadioOffStatus.boHwRadioOff = !!HwRadioOff; 291 priv->sLocalPara.RadioOffStatus.boHwRadioOff = !!HwRadioOff;
292 292
293 hal_set_radio_mode( pHwData, (unsigned char)(priv->sLocalPara.RadioOffStatus.boSwRadioOff || priv->sLocalPara.RadioOffStatus.boHwRadioOff) ); 293 hal_set_radio_mode( pHwData, (unsigned char)(priv->sLocalPara.RadioOffStatus.boSwRadioOff || priv->sLocalPara.RadioOffStatus.boHwRadioOff) );
294 294
295 hal_driver_init_OK(pHwData) = 1; // Notify hal that the driver is ready now. 295 hal_driver_init_OK(pHwData) = 1; // Notify hal that the driver is ready now.
296 //set a tx power for reference..... 296 //set a tx power for reference.....
297 // sme_set_tx_power_level(priv, 12); FIXME? 297 // sme_set_tx_power_level(priv, 12); FIXME?
298 return true; 298 return true;
299 299
300 error: 300 error:
301 switch (InitStep) { 301 switch (InitStep) {
302 case 5: 302 case 5:
303 case 4: 303 case 4:
304 case 3: Mds_Destroy( priv ); 304 case 3: Mds_Destroy( priv );
305 case 2: 305 case 2:
306 case 1: hal_halt( pHwData, NULL ); 306 case 1: hal_halt( pHwData, NULL );
307 case 0: break; 307 case 0: break;
308 } 308 }
309 309
310 return false; 310 return false;
311 } 311 }
312 312
313 static int wb35_probe(struct usb_interface *intf, const struct usb_device_id *id_table) 313 static int wb35_probe(struct usb_interface *intf, const struct usb_device_id *id_table)
314 { 314 {
315 PWBUSB pWbUsb; 315 PWBUSB pWbUsb;
316 struct usb_host_interface *interface; 316 struct usb_host_interface *interface;
317 struct usb_endpoint_descriptor *endpoint; 317 struct usb_endpoint_descriptor *endpoint;
318 u32 ltmp; 318 u32 ltmp;
319 struct usb_device *udev = interface_to_usbdev(intf); 319 struct usb_device *udev = interface_to_usbdev(intf);
320 struct wbsoft_priv *priv; 320 struct wbsoft_priv *priv;
321 struct ieee80211_hw *dev; 321 struct ieee80211_hw *dev;
322 int err; 322 int nr, err;
323 323
324 usb_get_dev(udev); 324 usb_get_dev(udev);
325 325
326 // 20060630.2 Check the device if it already be opened 326 // 20060630.2 Check the device if it already be opened
327 err = usb_control_msg(udev, usb_rcvctrlpipe( udev, 0 ), 327 nr = usb_control_msg(udev, usb_rcvctrlpipe( udev, 0 ),
328 0x01, USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN, 328 0x01, USB_TYPE_VENDOR|USB_RECIP_DEVICE|USB_DIR_IN,
329 0x0, 0x400, &ltmp, 4, HZ*100 ); 329 0x0, 0x400, &ltmp, 4, HZ*100 );
330 if (err) 330 if (nr < 0) {
331 err = nr;
331 goto error; 332 goto error;
333 }
332 334
333 ltmp = cpu_to_le32(ltmp); 335 ltmp = cpu_to_le32(ltmp);
334 if (ltmp) { // Is already initialized? 336 if (ltmp) { // Is already initialized?
335 err = -EBUSY; 337 err = -EBUSY;
336 goto error; 338 goto error;
337 } 339 }
338 340
339 dev = ieee80211_alloc_hw(sizeof(*priv), &wbsoft_ops); 341 dev = ieee80211_alloc_hw(sizeof(*priv), &wbsoft_ops);
340 if (!dev) 342 if (!dev) {
343 err = -ENOMEM;
341 goto error; 344 goto error;
345 }
342 346
343 priv = dev->priv; 347 priv = dev->priv;
344 348
345 spin_lock_init(&priv->SpinLock); 349 spin_lock_init(&priv->SpinLock);
346 350
347 pWbUsb = &priv->sHwData.WbUsb; 351 pWbUsb = &priv->sHwData.WbUsb;
348 pWbUsb->udev = udev; 352 pWbUsb->udev = udev;
349 353
350 interface = intf->cur_altsetting; 354 interface = intf->cur_altsetting;
351 endpoint = &interface->endpoint[0].desc; 355 endpoint = &interface->endpoint[0].desc;
352 356
353 if (endpoint[2].wMaxPacketSize == 512) { 357 if (endpoint[2].wMaxPacketSize == 512) {
354 printk("[w35und] Working on USB 2.0\n"); 358 printk("[w35und] Working on USB 2.0\n");
355 pWbUsb->IsUsb20 = 1; 359 pWbUsb->IsUsb20 = 1;
356 } 360 }
357 361
358 if (!wb35_hw_init(dev)) { 362 if (!wb35_hw_init(dev)) {
359 err = -EINVAL; 363 err = -EINVAL;
360 goto error_free_hw; 364 goto error_free_hw;
361 } 365 }
362 366
363 SET_IEEE80211_DEV(dev, &udev->dev); 367 SET_IEEE80211_DEV(dev, &udev->dev);
364 { 368 {
365 phw_data_t pHwData = &priv->sHwData; 369 phw_data_t pHwData = &priv->sHwData;
366 unsigned char dev_addr[MAX_ADDR_LEN]; 370 unsigned char dev_addr[MAX_ADDR_LEN];
367 hal_get_permanent_address(pHwData, dev_addr); 371 hal_get_permanent_address(pHwData, dev_addr);
368 SET_IEEE80211_PERM_ADDR(dev, dev_addr); 372 SET_IEEE80211_PERM_ADDR(dev, dev_addr);
369 } 373 }
370 374
371 dev->extra_tx_headroom = 12; /* FIXME */ 375 dev->extra_tx_headroom = 12; /* FIXME */
372 dev->flags = 0; 376 dev->flags = IEEE80211_HW_SIGNAL_UNSPEC;
377 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
373 378
374 dev->channel_change_time = 1000; 379 dev->channel_change_time = 1000;
380 dev->max_signal = 100;
375 dev->queues = 1; 381 dev->queues = 1;
376 382
377 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &wbsoft_band_2GHz; 383 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &wbsoft_band_2GHz;
378 384
379 err = ieee80211_register_hw(dev); 385 err = ieee80211_register_hw(dev);
380 if (err) 386 if (err)
381 goto error_free_hw; 387 goto error_free_hw;
382 388
383 usb_set_intfdata(intf, priv); 389 usb_set_intfdata(intf, priv);
384 390
385 return 0; 391 return 0;
386 392
387 error_free_hw: 393 error_free_hw:
388 ieee80211_free_hw(dev); 394 ieee80211_free_hw(dev);
389 error: 395 error:
390 usb_put_dev(udev); 396 usb_put_dev(udev);
391 return err; 397 return err;
392 } 398 }
393 399
394 static void wb35_hw_halt(struct wbsoft_priv *adapter) 400 static void wb35_hw_halt(struct wbsoft_priv *adapter)
395 { 401 {
396 Mds_Destroy( adapter ); 402 Mds_Destroy( adapter );
397 403
398 // Turn off Rx and Tx hardware ability 404 // Turn off Rx and Tx hardware ability
399 hal_stop( &adapter->sHwData ); 405 hal_stop( &adapter->sHwData );
400 #ifdef _PE_USB_INI_DUMP_ 406 #ifdef _PE_USB_INI_DUMP_
401 WBDEBUG(("[w35und] Hal_stop O.K.\n")); 407 WBDEBUG(("[w35und] Hal_stop O.K.\n"));
402 #endif 408 #endif
403 msleep(100);// Waiting Irp completed 409 msleep(100);// Waiting Irp completed
404 410
405 // Halt the HAL 411 // Halt the HAL
406 hal_halt(&adapter->sHwData, NULL); 412 hal_halt(&adapter->sHwData, NULL);
407 } 413 }
408 414
409 415
410 static void wb35_disconnect(struct usb_interface *intf) 416 static void wb35_disconnect(struct usb_interface *intf)
411 { 417 {
412 struct wbsoft_priv *priv = usb_get_intfdata(intf); 418 struct wbsoft_priv *priv = usb_get_intfdata(intf);
413 419
414 wb35_hw_halt(priv); 420 wb35_hw_halt(priv);
415 421
416 usb_set_intfdata(intf, NULL); 422 usb_set_intfdata(intf, NULL);
417 usb_put_dev(interface_to_usbdev(intf)); 423 usb_put_dev(interface_to_usbdev(intf));
418 } 424 }
419 425
420 static struct usb_driver wb35_driver = { 426 static struct usb_driver wb35_driver = {
421 .name = "w35und", 427 .name = "w35und",
422 .id_table = wb35_table, 428 .id_table = wb35_table,
423 .probe = wb35_probe, 429 .probe = wb35_probe,
424 .disconnect = wb35_disconnect, 430 .disconnect = wb35_disconnect,
425 }; 431 };
426 432
427 static int __init wb35_init(void) 433 static int __init wb35_init(void)
428 { 434 {
429 return usb_register(&wb35_driver); 435 return usb_register(&wb35_driver);
430 } 436 }
431 437
432 static void __exit wb35_exit(void) 438 static void __exit wb35_exit(void)
433 { 439 {
434 usb_deregister(&wb35_driver); 440 usb_deregister(&wb35_driver);
435 } 441 }
436 442
437 module_init(wb35_init); 443 module_init(wb35_init);
438 module_exit(wb35_exit); 444 module_exit(wb35_exit);
439 445