Blame view
Documentation/fb/pxafb.rst
4.6 KB
ab42b8189
|
1 |
================================ |
1da177e4c
|
2 3 4 5 6 |
Driver for PXA25x LCD controller ================================ The driver supports the following options, either via options=<OPTIONS> when modular or video=pxafb:<OPTIONS> when built in. |
ab42b8189
|
7 |
For example:: |
77e196752
|
8 |
modprobe pxafb options=vmem:2M,mode:640x480-8,passive |
ab42b8189
|
9 10 |
or on the kernel command line:: |
77e196752
|
11 12 13 |
video=pxafb:vmem:2M,mode:640x480-8,passive vmem: VIDEO_MEM_SIZE |
ab42b8189
|
14 |
|
77e196752
|
15 16 |
Amount of video memory to allocate (can be suffixed with K or M for kilobytes or megabytes) |
1da177e4c
|
17 18 |
mode:XRESxYRES[-BPP] |
ab42b8189
|
19 |
|
1da177e4c
|
20 |
XRES == LCCR1_PPL + 1 |
ab42b8189
|
21 |
|
1da177e4c
|
22 |
YRES == LLCR2_LPP + 1 |
ab42b8189
|
23 |
|
1da177e4c
|
24 |
The resolution of the display in pixels |
ab42b8189
|
25 |
|
1da177e4c
|
26 27 28 |
BPP == The bit depth. Valid values are 1, 2, 4, 8 and 16. pixclock:PIXCLOCK |
ab42b8189
|
29 |
|
1da177e4c
|
30 31 32 |
Pixel clock in picoseconds left:LEFT == LCCR1_BLW + 1 |
ab42b8189
|
33 |
|
1da177e4c
|
34 |
right:RIGHT == LCCR1_ELW + 1 |
ab42b8189
|
35 |
|
1da177e4c
|
36 |
hsynclen:HSYNC == LCCR1_HSW + 1 |
ab42b8189
|
37 |
|
1da177e4c
|
38 |
upper:UPPER == LCCR2_BFW |
ab42b8189
|
39 |
|
1da177e4c
|
40 |
lower:LOWER == LCCR2_EFR |
ab42b8189
|
41 |
|
1da177e4c
|
42 |
vsynclen:VSYNC == LCCR2_VSW + 1 |
ab42b8189
|
43 |
|
1da177e4c
|
44 45 46 |
Display margins and sync times color | mono => LCCR0_CMS |
ab42b8189
|
47 |
|
1da177e4c
|
48 49 50 |
umm... active | passive => LCCR0_PAS |
ab42b8189
|
51 |
|
1da177e4c
|
52 53 54 |
Active (TFT) or Passive (STN) display single | dual => LCCR0_SDS |
ab42b8189
|
55 |
|
1da177e4c
|
56 57 58 |
Single or dual panel passive display 4pix | 8pix => LCCR0_DPD |
ab42b8189
|
59 |
|
1da177e4c
|
60 |
4 or 8 pixel monochrome single panel data |
ab42b8189
|
61 |
hsync:HSYNC, vsync:VSYNC |
1da177e4c
|
62 63 64 65 |
Horizontal and vertical sync. 0 => active low, 1 => active high. dpc:DPC |
ab42b8189
|
66 |
|
1da177e4c
|
67 68 69 |
Double pixel clock. 1=>true, 0=>false outputen:POLARITY |
ab42b8189
|
70 |
|
1da177e4c
|
71 72 73 |
Output Enable Polarity. 0 => active low, 1 => active high pixclockpol:POLARITY |
ab42b8189
|
74 |
|
1da177e4c
|
75 76 |
pixel clock polarity 0 => falling edge, 1 => rising edge |
198fc108e
|
77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 |
Overlay Support for PXA27x and later LCD controllers ==================================================== PXA27x and later processors support overlay1 and overlay2 on-top of the base framebuffer (although under-neath the base is also possible). They support palette and no-palette RGB formats, as well as YUV formats (only available on overlay2). These overlays have dedicated DMA channels and behave in a similar way as a framebuffer. However, there are some differences between these overlay framebuffers and normal framebuffers, as listed below: 1. overlay can start at a 32-bit word aligned position within the base framebuffer, which means they have a start (x, y). This information is encoded into var->nonstd (no, var->xoffset and var->yoffset are not for such purpose). 2. overlay framebuffer is allocated dynamically according to specified |
ab42b8189
|
97 |
'struct fb_var_screeninfo', the amount is decided by:: |
198fc108e
|
98 |
|
ab42b8189
|
99 |
var->xres_virtual * var->yres_virtual * bpp |
198fc108e
|
100 101 |
bpp = 16 -- for RGB565 or RGBT555 |
ab42b8189
|
102 103 104 105 106 107 108 109 |
bpp = 24 -- for YUV444 packed bpp = 24 -- for YUV444 planar bpp = 16 -- for YUV422 planar (1 pixel = 1 Y + 1/2 Cb + 1/2 Cr) bpp = 12 -- for YUV420 planar (1 pixel = 1 Y + 1/4 Cb + 1/4 Cr) |
198fc108e
|
110 111 112 113 |
NOTE: a. overlay does not support panning in x-direction, thus |
ab42b8189
|
114 |
var->xres_virtual will always be equal to var->xres |
198fc108e
|
115 116 |
b. line length of overlay(s) must be on a 32-bit word boundary, |
ab42b8189
|
117 |
for YUV planar modes, it is a requirement for the component |
198fc108e
|
118 119 120 121 122 |
with minimum bits per pixel, e.g. for YUV420, Cr component for one pixel is actually 2-bits, it means the line length should be a multiple of 16-pixels c. starting horizontal position (XPOS) should start on a 32-bit |
ab42b8189
|
123 |
word boundary, otherwise the fb_check_var() will just fail. |
198fc108e
|
124 125 |
d. the rectangle of the overlay should be within the base plane, |
ab42b8189
|
126 |
otherwise fail |
198fc108e
|
127 128 129 |
Applications should follow the sequence below to operate an overlay framebuffer: |
ab42b8189
|
130 |
a. open("/dev/fb[1-2]", ...) |
198fc108e
|
131 132 |
b. ioctl(fd, FBIOGET_VSCREENINFO, ...) c. modify 'var' with desired parameters: |
ab42b8189
|
133 |
|
198fc108e
|
134 135 136 137 138 |
1) var->xres and var->yres 2) larger var->yres_virtual if more memory is required, usually for double-buffering 3) var->nonstd for starting (x, y) and color format 4) var->{red, green, blue, transp} if RGB mode is to be used |
ab42b8189
|
139 |
|
198fc108e
|
140 141 142 143 144 145 146 147 148 149 |
d. ioctl(fd, FBIOPUT_VSCREENINFO, ...) e. ioctl(fd, FBIOGET_FSCREENINFO, ...) f. mmap g. ... 3. for YUV planar formats, these are actually not supported within the framebuffer framework, application has to take care of the offsets and lengths of each component within the framebuffer. 4. var->nonstd is used to pass starting (x, y) position and color format, |
ab42b8189
|
150 |
the detailed bit fields are shown below:: |
198fc108e
|
151 |
|
ab42b8189
|
152 153 154 155 |
31 23 20 10 0 +-----------------+---+----------+----------+ | ... unused ... |FOR| XPOS | YPOS | +-----------------+---+----------+----------+ |
198fc108e
|
156 157 |
FOR - color format, as defined by OVERLAY_FORMAT_* in pxafb.h |
ab42b8189
|
158 159 160 161 162 163 |
- 0 - RGB - 1 - YUV444 PACKED - 2 - YUV444 PLANAR - 3 - YUV422 PLANAR - 4 - YUR420 PLANAR |
198fc108e
|
164 165 |
XPOS - starting horizontal position |
ab42b8189
|
166 |
|
198fc108e
|
167 |
YPOS - starting vertical position |