Blame view
drivers/watchdog/it87_wdt.c
17.8 KB
e1fee94f3 [WATCHDOG] add wa... |
1 2 3 4 5 6 7 8 9 10 11 12 13 14 |
/* * Watchdog Timer Driver * for ITE IT87xx Environment Control - Low Pin Count Input / Output * * (c) Copyright 2007 Oliver Schuster <olivers137@aol.com> * * Based on softdog.c by Alan Cox, * 83977f_wdt.c by Jose Goncalves, * it87.c by Chris Gauthron, Jean Delvare * * Data-sheets: Publicly available at the ITE website * http://www.ite.com.tw/ * * Support of the watchdog timers, which are available on |
4bc30272a watchdog: it87_wd... |
15 |
* IT8702, IT8712, IT8716, IT8718, IT8720, IT8721 and IT8726. |
e1fee94f3 [WATCHDOG] add wa... |
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 |
* * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version * 2 of the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/types.h> #include <linux/kernel.h> #include <linux/fs.h> #include <linux/miscdevice.h> #include <linux/init.h> #include <linux/ioport.h> #include <linux/watchdog.h> #include <linux/notifier.h> #include <linux/reboot.h> #include <linux/uaccess.h> #include <linux/io.h> #include <asm/system.h> |
4bc30272a watchdog: it87_wd... |
47 |
#define WATCHDOG_VERSION "1.14" |
e1fee94f3 [WATCHDOG] add wa... |
48 49 50 51 52 53 54 55 56 |
#define WATCHDOG_NAME "IT87 WDT" #define PFX WATCHDOG_NAME ": " #define DRIVER_VERSION WATCHDOG_NAME " driver, v" WATCHDOG_VERSION " " #define WD_MAGIC 'V' /* Defaults for Module Parameter */ #define DEFAULT_NOGAMEPORT 0 #define DEFAULT_EXCLUSIVE 1 |
5f3b27569 watchdog: cleanup... |
57 |
#define DEFAULT_TIMEOUT 60 |
e1fee94f3 [WATCHDOG] add wa... |
58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 |
#define DEFAULT_TESTMODE 0 #define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT /* IO Ports */ #define REG 0x2e #define VAL 0x2f /* Logical device Numbers LDN */ #define GPIO 0x07 #define GAMEPORT 0x09 #define CIR 0x0a /* Configuration Registers and Functions */ #define LDNREG 0x07 #define CHIPID 0x20 |
5f3b27569 watchdog: cleanup... |
73 |
#define CHIPREV 0x22 |
e1fee94f3 [WATCHDOG] add wa... |
74 |
#define ACTREG 0x30 |
5f3b27569 watchdog: cleanup... |
75 |
#define BASEREG 0x60 |
e1fee94f3 [WATCHDOG] add wa... |
76 77 78 |
/* Chip Id numbers */ #define NO_DEV_ID 0xffff |
dfb0b8eae watchdog: it87_wd... |
79 |
#define IT8702_ID 0x8702 |
e1fee94f3 [WATCHDOG] add wa... |
80 81 82 83 |
#define IT8705_ID 0x8705 #define IT8712_ID 0x8712 #define IT8716_ID 0x8716 #define IT8718_ID 0x8718 |
ee3e96583 watchdog: it87_wd... |
84 |
#define IT8720_ID 0x8720 |
4bc30272a watchdog: it87_wd... |
85 |
#define IT8721_ID 0x8721 |
e1fee94f3 [WATCHDOG] add wa... |
86 87 88 |
#define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */ /* GPIO Configuration Registers LDN=0x07 */ |
5f3b27569 watchdog: cleanup... |
89 |
#define WDTCTRL 0x71 |
e1fee94f3 [WATCHDOG] add wa... |
90 91 92 93 94 95 96 97 |
#define WDTCFG 0x72 #define WDTVALLSB 0x73 #define WDTVALMSB 0x74 /* GPIO Bits WDTCTRL */ #define WDT_CIRINT 0x80 #define WDT_MOUSEINT 0x40 #define WDT_KYBINT 0x20 |
4bc30272a watchdog: it87_wd... |
98 |
#define WDT_GAMEPORT 0x10 /* not in it8718, it8720, it8721 */ |
e1fee94f3 [WATCHDOG] add wa... |
99 100 101 102 103 104 105 |
#define WDT_FORCE 0x02 #define WDT_ZERO 0x01 /* GPIO Bits WDTCFG */ #define WDT_TOV1 0x80 #define WDT_KRST 0x40 #define WDT_TOVE 0x20 |
4bc30272a watchdog: it87_wd... |
106 |
#define WDT_PWROK 0x10 /* not in it8721 */ |
e1fee94f3 [WATCHDOG] add wa... |
107 108 109 |
#define WDT_INT_MASK 0x0f /* CIR Configuration Register LDN=0x0a */ |
5f3b27569 watchdog: cleanup... |
110 |
#define CIR_ILS 0x70 |
e1fee94f3 [WATCHDOG] add wa... |
111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 |
/* The default Base address is not always available, we use this */ #define CIR_BASE 0x0208 /* CIR Controller */ #define CIR_DR(b) (b) #define CIR_IER(b) (b + 1) #define CIR_RCR(b) (b + 2) #define CIR_TCR1(b) (b + 3) #define CIR_TCR2(b) (b + 4) #define CIR_TSR(b) (b + 5) #define CIR_RSR(b) (b + 6) #define CIR_BDLR(b) (b + 5) #define CIR_BDHR(b) (b + 6) #define CIR_IIR(b) (b + 7) /* Default Base address of Game port */ #define GP_BASE_DEFAULT 0x0201 /* wdt_status */ #define WDTS_TIMER_RUN 0 #define WDTS_DEV_OPEN 1 #define WDTS_KEEPALIVE 2 #define WDTS_LOCKED 3 #define WDTS_USE_GP 4 #define WDTS_EXPECTED 5 |
4bc30272a watchdog: it87_wd... |
137 |
static unsigned int base, gpact, ciract, max_units, chip_type; |
e1fee94f3 [WATCHDOG] add wa... |
138 |
static unsigned long wdt_status; |
e1fee94f3 [WATCHDOG] add wa... |
139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 |
static int nogameport = DEFAULT_NOGAMEPORT; static int exclusive = DEFAULT_EXCLUSIVE; static int timeout = DEFAULT_TIMEOUT; static int testmode = DEFAULT_TESTMODE; static int nowayout = DEFAULT_NOWAYOUT; module_param(nogameport, int, 0); MODULE_PARM_DESC(nogameport, "Forbid the activation of game port, default=" __MODULE_STRING(DEFAULT_NOGAMEPORT)); module_param(exclusive, int, 0); MODULE_PARM_DESC(exclusive, "Watchdog exclusive device open, default=" __MODULE_STRING(DEFAULT_EXCLUSIVE)); module_param(timeout, int, 0); MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default=" __MODULE_STRING(DEFAULT_TIMEOUT)); module_param(testmode, int, 0); MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default=" __MODULE_STRING(DEFAULT_TESTMODE)); module_param(nowayout, int, 0); MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default=" __MODULE_STRING(WATCHDOG_NOWAYOUT)); /* Superio Chip */ |
a134b8256 watchdog: Use "re... |
163 |
static inline int superio_enter(void) |
e1fee94f3 [WATCHDOG] add wa... |
164 |
{ |
a134b8256 watchdog: Use "re... |
165 166 167 168 169 |
/* * Try to reserve REG and REG + 1 for exclusive access. */ if (!request_muxed_region(REG, 2, WATCHDOG_NAME)) return -EBUSY; |
e1fee94f3 [WATCHDOG] add wa... |
170 171 172 173 |
outb(0x87, REG); outb(0x01, REG); outb(0x55, REG); outb(0x55, REG); |
a134b8256 watchdog: Use "re... |
174 |
return 0; |
e1fee94f3 [WATCHDOG] add wa... |
175 176 177 178 179 180 |
} static inline void superio_exit(void) { outb(0x02, REG); outb(0x02, VAL); |
a134b8256 watchdog: Use "re... |
181 |
release_region(REG, 2); |
e1fee94f3 [WATCHDOG] add wa... |
182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 |
} static inline void superio_select(int ldn) { outb(LDNREG, REG); outb(ldn, VAL); } static inline int superio_inb(int reg) { outb(reg, REG); return inb(VAL); } static inline void superio_outb(int val, int reg) { |
143a2e54b [WATCHDOG] More c... |
198 199 |
outb(reg, REG); outb(val, VAL); |
e1fee94f3 [WATCHDOG] add wa... |
200 201 202 203 204 205 206 207 208 209 210 211 212 213 |
} static inline int superio_inw(int reg) { int val; outb(reg++, REG); val = inb(VAL) << 8; outb(reg, REG); val |= inb(VAL); return val; } static inline void superio_outw(int val, int reg) { |
143a2e54b [WATCHDOG] More c... |
214 215 216 217 |
outb(reg++, REG); outb(val >> 8, VAL); outb(reg, REG); outb(val, VAL); |
e1fee94f3 [WATCHDOG] add wa... |
218 |
} |
dfb0b8eae watchdog: it87_wd... |
219 220 221 |
/* Internal function, should be called after superio_select(GPIO) */ static void wdt_update_timeout(void) { |
4bc30272a watchdog: it87_wd... |
222 |
unsigned char cfg = WDT_KRST; |
dfb0b8eae watchdog: it87_wd... |
223 224 225 226 227 228 229 230 231 |
int tm = timeout; if (testmode) cfg = 0; if (tm <= max_units) cfg |= WDT_TOV1; else tm /= 60; |
4bc30272a watchdog: it87_wd... |
232 233 |
if (chip_type != IT8721_ID) cfg |= WDT_PWROK; |
dfb0b8eae watchdog: it87_wd... |
234 235 236 237 238 239 240 241 242 243 244 245 |
superio_outb(cfg, WDTCFG); superio_outb(tm, WDTVALLSB); if (max_units > 255) superio_outb(tm>>8, WDTVALMSB); } static int wdt_round_time(int t) { t += 59; t -= t % 60; return t; } |
e1fee94f3 [WATCHDOG] add wa... |
246 247 248 249 250 251 252 253 254 255 256 |
/* watchdog timer handling */ static void wdt_keepalive(void) { if (test_bit(WDTS_USE_GP, &wdt_status)) inb(base); else /* The timer reloads with around 5 msec delay */ outb(0x55, CIR_DR(base)); set_bit(WDTS_KEEPALIVE, &wdt_status); } |
a134b8256 watchdog: Use "re... |
257 |
static int wdt_start(void) |
e1fee94f3 [WATCHDOG] add wa... |
258 |
{ |
a134b8256 watchdog: Use "re... |
259 260 261 |
int ret = superio_enter(); if (ret) return ret; |
e1fee94f3 [WATCHDOG] add wa... |
262 263 264 265 266 267 |
superio_select(GPIO); if (test_bit(WDTS_USE_GP, &wdt_status)) superio_outb(WDT_GAMEPORT, WDTCTRL); else superio_outb(WDT_CIRINT, WDTCTRL); |
dfb0b8eae watchdog: it87_wd... |
268 |
wdt_update_timeout(); |
e1fee94f3 [WATCHDOG] add wa... |
269 270 |
superio_exit(); |
a134b8256 watchdog: Use "re... |
271 272 |
return 0; |
e1fee94f3 [WATCHDOG] add wa... |
273 |
} |
a134b8256 watchdog: Use "re... |
274 |
static int wdt_stop(void) |
e1fee94f3 [WATCHDOG] add wa... |
275 |
{ |
a134b8256 watchdog: Use "re... |
276 277 278 |
int ret = superio_enter(); if (ret) return ret; |
e1fee94f3 [WATCHDOG] add wa... |
279 280 281 282 |
superio_select(GPIO); superio_outb(0x00, WDTCTRL); superio_outb(WDT_TOV1, WDTCFG); |
e1fee94f3 [WATCHDOG] add wa... |
283 |
superio_outb(0x00, WDTVALLSB); |
dfb0b8eae watchdog: it87_wd... |
284 285 |
if (max_units > 255) superio_outb(0x00, WDTVALMSB); |
e1fee94f3 [WATCHDOG] add wa... |
286 287 |
superio_exit(); |
a134b8256 watchdog: Use "re... |
288 |
return 0; |
e1fee94f3 [WATCHDOG] add wa... |
289 290 291 292 293 294 |
} /** * wdt_set_timeout - set a new timeout value with watchdog ioctl * @t: timeout value in seconds * |
dfb0b8eae watchdog: it87_wd... |
295 296 |
* The hardware device has a 8 or 16 bit watchdog timer (depends on * chip version) that can be configured to count seconds or minutes. |
e1fee94f3 [WATCHDOG] add wa... |
297 298 299 300 301 302 |
* * Used within WDIOC_SETTIMEOUT watchdog device ioctl. */ static int wdt_set_timeout(int t) { |
dfb0b8eae watchdog: it87_wd... |
303 |
if (t < 1 || t > max_units * 60) |
e1fee94f3 [WATCHDOG] add wa... |
304 |
return -EINVAL; |
dfb0b8eae watchdog: it87_wd... |
305 306 307 308 |
if (t > max_units) timeout = wdt_round_time(t); else timeout = t; |
e1fee94f3 [WATCHDOG] add wa... |
309 |
|
e1fee94f3 [WATCHDOG] add wa... |
310 |
if (test_bit(WDTS_TIMER_RUN, &wdt_status)) { |
a134b8256 watchdog: Use "re... |
311 312 313 |
int ret = superio_enter(); if (ret) return ret; |
e1fee94f3 [WATCHDOG] add wa... |
314 |
superio_select(GPIO); |
dfb0b8eae watchdog: it87_wd... |
315 |
wdt_update_timeout(); |
e1fee94f3 [WATCHDOG] add wa... |
316 317 |
superio_exit(); } |
e1fee94f3 [WATCHDOG] add wa... |
318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 |
return 0; } /** * wdt_get_status - determines the status supported by watchdog ioctl * @status: status returned to user space * * The status bit of the device does not allow to distinguish * between a regular system reset and a watchdog forced reset. * But, in test mode it is useful, so it is supported through * WDIOC_GETSTATUS watchdog ioctl. Additionally the driver * reports the keepalive signal and the acception of the magic. * * Used within WDIOC_GETSTATUS watchdog device ioctl. */ static int wdt_get_status(int *status) { |
e1fee94f3 [WATCHDOG] add wa... |
336 337 |
*status = 0; if (testmode) { |
a134b8256 watchdog: Use "re... |
338 339 340 |
int ret = superio_enter(); if (ret) return ret; |
e1fee94f3 [WATCHDOG] add wa... |
341 342 343 344 345 346 347 348 |
superio_select(GPIO); if (superio_inb(WDTCTRL) & WDT_ZERO) { superio_outb(0x00, WDTCTRL); clear_bit(WDTS_TIMER_RUN, &wdt_status); *status |= WDIOF_CARDRESET; } superio_exit(); |
e1fee94f3 [WATCHDOG] add wa... |
349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 |
} if (test_and_clear_bit(WDTS_KEEPALIVE, &wdt_status)) *status |= WDIOF_KEEPALIVEPING; if (test_bit(WDTS_EXPECTED, &wdt_status)) *status |= WDIOF_MAGICCLOSE; return 0; } /* /dev/watchdog handling */ /** * wdt_open - watchdog file_operations .open * @inode: inode of the device * @file: file handle to the device * * The watchdog timer starts by opening the device. * * Used within the file operation of the watchdog device. */ static int wdt_open(struct inode *inode, struct file *file) { if (exclusive && test_and_set_bit(WDTS_DEV_OPEN, &wdt_status)) return -EBUSY; if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) { |
a134b8256 watchdog: Use "re... |
374 |
int ret; |
e1fee94f3 [WATCHDOG] add wa... |
375 376 |
if (nowayout && !test_and_set_bit(WDTS_LOCKED, &wdt_status)) __module_get(THIS_MODULE); |
a134b8256 watchdog: Use "re... |
377 378 379 380 381 382 383 384 |
ret = wdt_start(); if (ret) { clear_bit(WDTS_LOCKED, &wdt_status); clear_bit(WDTS_TIMER_RUN, &wdt_status); clear_bit(WDTS_DEV_OPEN, &wdt_status); return ret; } |
e1fee94f3 [WATCHDOG] add wa... |
385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 |
} return nonseekable_open(inode, file); } /** * wdt_release - watchdog file_operations .release * @inode: inode of the device * @file: file handle to the device * * Closing the watchdog device either stops the watchdog timer * or in the case, that nowayout is set or the magic character * wasn't written, a critical warning about an running watchdog * timer is given. * * Used within the file operation of the watchdog device. */ static int wdt_release(struct inode *inode, struct file *file) { if (test_bit(WDTS_TIMER_RUN, &wdt_status)) { if (test_and_clear_bit(WDTS_EXPECTED, &wdt_status)) { |
a134b8256 watchdog: Use "re... |
406 407 408 409 410 411 412 413 414 415 |
int ret = wdt_stop(); if (ret) { /* * Stop failed. Just keep the watchdog alive * and hope nothing bad happens. */ set_bit(WDTS_EXPECTED, &wdt_status); wdt_keepalive(); return ret; } |
e1fee94f3 [WATCHDOG] add wa... |
416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 |
clear_bit(WDTS_TIMER_RUN, &wdt_status); } else { wdt_keepalive(); printk(KERN_CRIT PFX "unexpected close, not stopping watchdog! "); } } clear_bit(WDTS_DEV_OPEN, &wdt_status); return 0; } /** * wdt_write - watchdog file_operations .write * @file: file handle to the watchdog * @buf: buffer to write * @count: count of bytes * @ppos: pointer to the position to write. No seeks allowed * * A write to a watchdog device is defined as a keepalive signal. Any * write of data will do, as we don't define content meaning. * * Used within the file operation of the watchdog device. */ static ssize_t wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) { if (count) { clear_bit(WDTS_EXPECTED, &wdt_status); wdt_keepalive(); } if (!nowayout) { size_t ofs; /* note: just in case someone wrote the magic character long ago */ for (ofs = 0; ofs != count; ofs++) { char c; if (get_user(c, buf + ofs)) return -EFAULT; if (c == WD_MAGIC) set_bit(WDTS_EXPECTED, &wdt_status); } } return count; } |
42747d712 [WATCHDOG] watchd... |
462 |
static const struct watchdog_info ident = { |
e1fee94f3 [WATCHDOG] add wa... |
463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 |
.options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, .firmware_version = 1, .identity = WATCHDOG_NAME, }; /** * wdt_ioctl - watchdog file_operations .unlocked_ioctl * @file: file handle to the device * @cmd: watchdog command * @arg: argument pointer * * The watchdog API defines a common set of functions for all watchdogs * according to their available features. * * Used within the file operation of the watchdog device. */ static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { int rc = 0, status, new_options, new_timeout; union { struct watchdog_info __user *ident; int __user *i; } uarg; uarg.i = (int __user *)arg; switch (cmd) { case WDIOC_GETSUPPORT: return copy_to_user(uarg.ident, &ident, sizeof(ident)) ? -EFAULT : 0; case WDIOC_GETSTATUS: |
a134b8256 watchdog: Use "re... |
496 497 498 |
rc = wdt_get_status(&status); if (rc) return rc; |
e1fee94f3 [WATCHDOG] add wa... |
499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 |
return put_user(status, uarg.i); case WDIOC_GETBOOTSTATUS: return put_user(0, uarg.i); case WDIOC_KEEPALIVE: wdt_keepalive(); return 0; case WDIOC_SETOPTIONS: if (get_user(new_options, uarg.i)) return -EFAULT; switch (new_options) { case WDIOS_DISABLECARD: |
a134b8256 watchdog: Use "re... |
514 515 516 517 518 |
if (test_bit(WDTS_TIMER_RUN, &wdt_status)) { rc = wdt_stop(); if (rc) return rc; } |
e1fee94f3 [WATCHDOG] add wa... |
519 520 521 522 |
clear_bit(WDTS_TIMER_RUN, &wdt_status); return 0; case WDIOS_ENABLECARD: |
a134b8256 watchdog: Use "re... |
523 524 525 526 527 528 529 |
if (!test_and_set_bit(WDTS_TIMER_RUN, &wdt_status)) { rc = wdt_start(); if (rc) { clear_bit(WDTS_TIMER_RUN, &wdt_status); return rc; } } |
e1fee94f3 [WATCHDOG] add wa... |
530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 |
return 0; default: return -EFAULT; } case WDIOC_SETTIMEOUT: if (get_user(new_timeout, uarg.i)) return -EFAULT; rc = wdt_set_timeout(new_timeout); case WDIOC_GETTIMEOUT: if (put_user(timeout, uarg.i)) return -EFAULT; return rc; default: return -ENOTTY; } } static int wdt_notify_sys(struct notifier_block *this, unsigned long code, void *unused) { if (code == SYS_DOWN || code == SYS_HALT) wdt_stop(); return NOTIFY_DONE; } static const struct file_operations wdt_fops = { .owner = THIS_MODULE, .llseek = no_llseek, .write = wdt_write, .unlocked_ioctl = wdt_ioctl, .open = wdt_open, .release = wdt_release, }; static struct miscdevice wdt_miscdev = { .minor = WATCHDOG_MINOR, .name = "watchdog", .fops = &wdt_fops, }; static struct notifier_block wdt_notifier = { .notifier_call = wdt_notify_sys, }; static int __init it87_wdt_init(void) { int rc = 0; |
ee3e96583 watchdog: it87_wd... |
580 |
int try_gameport = !nogameport; |
e1fee94f3 [WATCHDOG] add wa... |
581 |
u8 chip_rev; |
a134b8256 watchdog: Use "re... |
582 |
int gp_rreq_fail = 0; |
e1fee94f3 [WATCHDOG] add wa... |
583 |
|
dfb0b8eae watchdog: it87_wd... |
584 |
wdt_status = 0; |
a134b8256 watchdog: Use "re... |
585 586 587 |
rc = superio_enter(); if (rc) return rc; |
e1fee94f3 [WATCHDOG] add wa... |
588 589 590 |
chip_type = superio_inw(CHIPID); chip_rev = superio_inb(CHIPREV) & 0x0f; superio_exit(); |
e1fee94f3 [WATCHDOG] add wa... |
591 592 |
switch (chip_type) { |
dfb0b8eae watchdog: it87_wd... |
593 594 595 596 597 598 |
case IT8702_ID: max_units = 255; break; case IT8712_ID: max_units = (chip_rev < 8) ? 255 : 65535; break; |
e1fee94f3 [WATCHDOG] add wa... |
599 |
case IT8716_ID: |
e1fee94f3 [WATCHDOG] add wa... |
600 |
case IT8726_ID: |
dfb0b8eae watchdog: it87_wd... |
601 |
max_units = 65535; |
e1fee94f3 [WATCHDOG] add wa... |
602 |
break; |
ee3e96583 watchdog: it87_wd... |
603 604 |
case IT8718_ID: case IT8720_ID: |
4bc30272a watchdog: it87_wd... |
605 |
case IT8721_ID: |
dfb0b8eae watchdog: it87_wd... |
606 |
max_units = 65535; |
ee3e96583 watchdog: it87_wd... |
607 608 |
try_gameport = 0; break; |
e1fee94f3 [WATCHDOG] add wa... |
609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 |
case IT8705_ID: printk(KERN_ERR PFX "Unsupported Chip found, Chip %04x Revision %02x ", chip_type, chip_rev); return -ENODEV; case NO_DEV_ID: printk(KERN_ERR PFX "no device "); return -ENODEV; default: printk(KERN_ERR PFX "Unknown Chip found, Chip %04x Revision %04x ", chip_type, chip_rev); return -ENODEV; } |
a134b8256 watchdog: Use "re... |
626 627 628 |
rc = superio_enter(); if (rc) return rc; |
e1fee94f3 [WATCHDOG] add wa... |
629 630 631 632 633 634 |
superio_select(GPIO); superio_outb(WDT_TOV1, WDTCFG); superio_outb(0x00, WDTCTRL); /* First try to get Gameport support */ |
ee3e96583 watchdog: it87_wd... |
635 |
if (try_gameport) { |
e1fee94f3 [WATCHDOG] add wa... |
636 637 638 639 640 641 642 643 |
superio_select(GAMEPORT); base = superio_inw(BASEREG); if (!base) { base = GP_BASE_DEFAULT; superio_outw(base, BASEREG); } gpact = superio_inb(ACTREG); superio_outb(0x01, ACTREG); |
e1fee94f3 [WATCHDOG] add wa... |
644 645 646 |
if (request_region(base, 1, WATCHDOG_NAME)) set_bit(WDTS_USE_GP, &wdt_status); else |
a134b8256 watchdog: Use "re... |
647 |
gp_rreq_fail = 1; |
e1fee94f3 [WATCHDOG] add wa... |
648 649 650 651 652 |
} /* If we haven't Gameport support, try to get CIR support */ if (!test_bit(WDTS_USE_GP, &wdt_status)) { if (!request_region(CIR_BASE, 8, WATCHDOG_NAME)) { |
a134b8256 watchdog: Use "re... |
653 |
if (gp_rreq_fail) |
e1fee94f3 [WATCHDOG] add wa... |
654 655 656 657 658 659 660 661 662 663 664 665 666 |
printk(KERN_ERR PFX "I/O Address 0x%04x and 0x%04x" " already in use ", base, CIR_BASE); else printk(KERN_ERR PFX "I/O Address 0x%04x already in use ", CIR_BASE); rc = -EIO; goto err_out; } base = CIR_BASE; |
e1fee94f3 [WATCHDOG] add wa... |
667 668 669 670 671 672 |
superio_select(CIR); superio_outw(base, BASEREG); superio_outb(0x00, CIR_ILS); ciract = superio_inb(ACTREG); superio_outb(0x01, ACTREG); |
a134b8256 watchdog: Use "re... |
673 |
if (gp_rreq_fail) { |
e1fee94f3 [WATCHDOG] add wa... |
674 675 676 |
superio_select(GAMEPORT); superio_outb(gpact, ACTREG); } |
e1fee94f3 [WATCHDOG] add wa... |
677 |
} |
dfb0b8eae watchdog: it87_wd... |
678 |
if (timeout < 1 || timeout > max_units * 60) { |
e1fee94f3 [WATCHDOG] add wa... |
679 680 681 682 683 684 |
timeout = DEFAULT_TIMEOUT; printk(KERN_WARNING PFX "Timeout value out of range, use default %d sec ", DEFAULT_TIMEOUT); } |
dfb0b8eae watchdog: it87_wd... |
685 686 |
if (timeout > max_units) timeout = wdt_round_time(timeout); |
e1fee94f3 [WATCHDOG] add wa... |
687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 |
rc = register_reboot_notifier(&wdt_notifier); if (rc) { printk(KERN_ERR PFX "Cannot register reboot notifier (err=%d) ", rc); goto err_out_region; } rc = misc_register(&wdt_miscdev); if (rc) { printk(KERN_ERR PFX "Cannot register miscdev on minor=%d (err=%d) ", wdt_miscdev.minor, rc); goto err_out_reboot; } /* Initialize CIR to use it as keepalive source */ if (!test_bit(WDTS_USE_GP, &wdt_status)) { outb(0x00, CIR_RCR(base)); outb(0xc0, CIR_TCR1(base)); outb(0x5c, CIR_TCR2(base)); outb(0x10, CIR_IER(base)); outb(0x00, CIR_BDHR(base)); outb(0x01, CIR_BDLR(base)); outb(0x09, CIR_IER(base)); } |
dfb0b8eae watchdog: it87_wd... |
714 |
printk(KERN_INFO PFX "Chip IT%04x revision %d initialized. " |
e1fee94f3 [WATCHDOG] add wa... |
715 716 717 718 |
"timeout=%d sec (nowayout=%d testmode=%d exclusive=%d " "nogameport=%d) ", chip_type, chip_rev, timeout, nowayout, testmode, exclusive, nogameport); |
a134b8256 watchdog: Use "re... |
719 |
superio_exit(); |
e1fee94f3 [WATCHDOG] add wa... |
720 721 722 723 724 725 726 |
return 0; err_out_reboot: unregister_reboot_notifier(&wdt_notifier); err_out_region: release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8); if (!test_bit(WDTS_USE_GP, &wdt_status)) { |
e1fee94f3 [WATCHDOG] add wa... |
727 728 |
superio_select(CIR); superio_outb(ciract, ACTREG); |
e1fee94f3 [WATCHDOG] add wa... |
729 730 |
} err_out: |
ee3e96583 watchdog: it87_wd... |
731 |
if (try_gameport) { |
e1fee94f3 [WATCHDOG] add wa... |
732 733 |
superio_select(GAMEPORT); superio_outb(gpact, ACTREG); |
e1fee94f3 [WATCHDOG] add wa... |
734 |
} |
a134b8256 watchdog: Use "re... |
735 |
superio_exit(); |
e1fee94f3 [WATCHDOG] add wa... |
736 737 738 739 740 |
return rc; } static void __exit it87_wdt_exit(void) { |
a134b8256 watchdog: Use "re... |
741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 |
if (superio_enter() == 0) { superio_select(GPIO); superio_outb(0x00, WDTCTRL); superio_outb(0x00, WDTCFG); superio_outb(0x00, WDTVALLSB); if (max_units > 255) superio_outb(0x00, WDTVALMSB); if (test_bit(WDTS_USE_GP, &wdt_status)) { superio_select(GAMEPORT); superio_outb(gpact, ACTREG); } else { superio_select(CIR); superio_outb(ciract, ACTREG); } superio_exit(); |
e1fee94f3 [WATCHDOG] add wa... |
756 |
} |
e1fee94f3 [WATCHDOG] add wa... |
757 758 759 760 761 762 763 764 765 766 767 768 769 |
misc_deregister(&wdt_miscdev); unregister_reboot_notifier(&wdt_notifier); release_region(base, test_bit(WDTS_USE_GP, &wdt_status) ? 1 : 8); } module_init(it87_wdt_init); module_exit(it87_wdt_exit); MODULE_AUTHOR("Oliver Schuster"); MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O"); MODULE_LICENSE("GPL"); MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |