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arch/arm/mach-at91/at91sam9261_devices.c
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/* |
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* arch/arm/mach-at91/at91sam9261_devices.c |
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* * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> * Copyright (C) 2005 David Brownell * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * */ #include <asm/mach/arch.h> #include <asm/mach/map.h> |
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#include <linux/dma-mapping.h> |
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#include <linux/gpio.h> |
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#include <linux/platform_device.h> |
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#include <linux/i2c-gpio.h> |
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#include <linux/fb.h> |
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#include <video/atmel_lcdc.h> |
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#include <mach/board.h> |
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#include <mach/at91sam9261.h> #include <mach/at91sam9261_matrix.h> #include <mach/at91sam9_smc.h> |
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#include "generic.h" |
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/* -------------------------------------------------------------------- * USB Host * -------------------------------------------------------------------- */ #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
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static u64 ohci_dmamask = DMA_BIT_MASK(32); |
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static struct at91_usbh_data usbh_data; static struct resource usbh_resources[] = { [0] = { .start = AT91SAM9261_UHP_BASE, .end = AT91SAM9261_UHP_BASE + SZ_1M - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_UHP, .end = AT91SAM9261_ID_UHP, .flags = IORESOURCE_IRQ, }, }; static struct platform_device at91sam9261_usbh_device = { .name = "at91_ohci", .id = -1, .dev = { .dma_mask = &ohci_dmamask, |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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.platform_data = &usbh_data, }, .resource = usbh_resources, .num_resources = ARRAY_SIZE(usbh_resources), }; void __init at91_add_device_usbh(struct at91_usbh_data *data) { |
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int i; |
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if (!data) return; |
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/* Enable overcurrent notification */ for (i = 0; i < data->ports; i++) { if (data->overcurrent_pin[i]) at91_set_gpio_input(data->overcurrent_pin[i], 1); } |
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usbh_data = *data; platform_device_register(&at91sam9261_usbh_device); } #else void __init at91_add_device_usbh(struct at91_usbh_data *data) {} #endif /* -------------------------------------------------------------------- * USB Device (Gadget) * -------------------------------------------------------------------- */ |
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#ifdef CONFIG_USB_AT91 |
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static struct at91_udc_data udc_data; static struct resource udc_resources[] = { [0] = { .start = AT91SAM9261_BASE_UDP, .end = AT91SAM9261_BASE_UDP + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_UDP, .end = AT91SAM9261_ID_UDP, .flags = IORESOURCE_IRQ, }, }; static struct platform_device at91sam9261_udc_device = { .name = "at91_udc", .id = -1, .dev = { .platform_data = &udc_data, }, .resource = udc_resources, .num_resources = ARRAY_SIZE(udc_resources), }; void __init at91_add_device_udc(struct at91_udc_data *data) { |
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if (!data) return; |
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if (gpio_is_valid(data->vbus_pin)) { |
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at91_set_gpio_input(data->vbus_pin, 0); at91_set_deglitch(data->vbus_pin, 1); } |
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/* Pullup pin is handled internally by USB device peripheral */ |
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udc_data = *data; platform_device_register(&at91sam9261_udc_device); } #else void __init at91_add_device_udc(struct at91_udc_data *data) {} #endif /* -------------------------------------------------------------------- * MMC / SD * -------------------------------------------------------------------- */ #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) |
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static u64 mmc_dmamask = DMA_BIT_MASK(32); |
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static struct at91_mmc_data mmc_data; static struct resource mmc_resources[] = { [0] = { .start = AT91SAM9261_BASE_MCI, .end = AT91SAM9261_BASE_MCI + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_MCI, .end = AT91SAM9261_ID_MCI, .flags = IORESOURCE_IRQ, }, }; static struct platform_device at91sam9261_mmc_device = { .name = "at91_mci", .id = -1, .dev = { .dma_mask = &mmc_dmamask, |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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.platform_data = &mmc_data, }, .resource = mmc_resources, .num_resources = ARRAY_SIZE(mmc_resources), }; |
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void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) |
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{ if (!data) return; /* input/irq */ |
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if (gpio_is_valid(data->det_pin)) { |
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at91_set_gpio_input(data->det_pin, 1); at91_set_deglitch(data->det_pin, 1); } |
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if (gpio_is_valid(data->wp_pin)) |
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at91_set_gpio_input(data->wp_pin, 1); |
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if (gpio_is_valid(data->vcc_pin)) |
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at91_set_gpio_output(data->vcc_pin, 0); /* CLK */ at91_set_B_periph(AT91_PIN_PA2, 0); /* CMD */ at91_set_B_periph(AT91_PIN_PA1, 1); /* DAT0, maybe DAT1..DAT3 */ at91_set_B_periph(AT91_PIN_PA0, 1); if (data->wire4) { at91_set_B_periph(AT91_PIN_PA4, 1); at91_set_B_periph(AT91_PIN_PA5, 1); at91_set_B_periph(AT91_PIN_PA6, 1); } mmc_data = *data; platform_device_register(&at91sam9261_mmc_device); } #else |
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void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} |
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#endif /* -------------------------------------------------------------------- * NAND / SmartMedia * -------------------------------------------------------------------- */ |
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#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE) |
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static struct atmel_nand_data nand_data; |
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#define NAND_BASE AT91_CHIPSELECT_3 static struct resource nand_resources[] = { { .start = NAND_BASE, .end = NAND_BASE + SZ_256M - 1, .flags = IORESOURCE_MEM, } }; |
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static struct platform_device atmel_nand_device = { .name = "atmel_nand", |
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.id = -1, .dev = { .platform_data = &nand_data, }, .resource = nand_resources, .num_resources = ARRAY_SIZE(nand_resources), }; |
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void __init at91_add_device_nand(struct atmel_nand_data *data) |
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{ |
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unsigned long csa; |
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if (!data) return; csa = at91_sys_read(AT91_MATRIX_EBICSA); |
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at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
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|
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/* enable pin */ |
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if (gpio_is_valid(data->enable_pin)) |
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at91_set_gpio_output(data->enable_pin, 1); /* ready/busy pin */ |
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if (gpio_is_valid(data->rdy_pin)) |
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at91_set_gpio_input(data->rdy_pin, 1); /* card detect pin */ |
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if (gpio_is_valid(data->det_pin)) |
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at91_set_gpio_input(data->det_pin, 1); at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ nand_data = *data; |
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platform_device_register(&atmel_nand_device); |
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} #else |
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void __init at91_add_device_nand(struct atmel_nand_data *data) {} |
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#endif /* -------------------------------------------------------------------- * TWI (i2c) * -------------------------------------------------------------------- */ |
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/* * Prefer the GPIO code since the TWI controller isn't robust * (gets overruns and underruns under load) and can only issue * repeated STARTs in one scenario (the driver doesn't yet handle them). */ #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) static struct i2c_gpio_platform_data pdata = { .sda_pin = AT91_PIN_PA7, .sda_is_open_drain = 1, .scl_pin = AT91_PIN_PA8, .scl_is_open_drain = 1, .udelay = 2, /* ~100 kHz */ }; static struct platform_device at91sam9261_twi_device = { .name = "i2c-gpio", .id = -1, .dev.platform_data = &pdata, }; void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) { at91_set_GPIO_periph(AT91_PIN_PA7, 1); /* TWD (SDA) */ at91_set_multi_drive(AT91_PIN_PA7, 1); at91_set_GPIO_periph(AT91_PIN_PA8, 1); /* TWCK (SCL) */ at91_set_multi_drive(AT91_PIN_PA8, 1); i2c_register_board_info(0, devices, nr_devices); platform_device_register(&at91sam9261_twi_device); } #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) |
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static struct resource twi_resources[] = { [0] = { .start = AT91SAM9261_BASE_TWI, .end = AT91SAM9261_BASE_TWI + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_TWI, .end = AT91SAM9261_ID_TWI, .flags = IORESOURCE_IRQ, }, }; static struct platform_device at91sam9261_twi_device = { .name = "at91_i2c", .id = -1, .resource = twi_resources, .num_resources = ARRAY_SIZE(twi_resources), }; |
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void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) |
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{ /* pins used for TWI interface */ at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */ at91_set_multi_drive(AT91_PIN_PA7, 1); at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */ at91_set_multi_drive(AT91_PIN_PA8, 1); |
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i2c_register_board_info(0, devices, nr_devices); |
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platform_device_register(&at91sam9261_twi_device); } #else |
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void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {} |
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#endif /* -------------------------------------------------------------------- * SPI * -------------------------------------------------------------------- */ #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) |
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static u64 spi_dmamask = DMA_BIT_MASK(32); |
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static struct resource spi0_resources[] = { [0] = { .start = AT91SAM9261_BASE_SPI0, .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_SPI0, .end = AT91SAM9261_ID_SPI0, .flags = IORESOURCE_IRQ, }, }; static struct platform_device at91sam9261_spi0_device = { .name = "atmel_spi", .id = 0, .dev = { .dma_mask = &spi_dmamask, |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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}, .resource = spi0_resources, .num_resources = ARRAY_SIZE(spi0_resources), }; static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; static struct resource spi1_resources[] = { [0] = { .start = AT91SAM9261_BASE_SPI1, .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_SPI1, .end = AT91SAM9261_ID_SPI1, .flags = IORESOURCE_IRQ, }, }; static struct platform_device at91sam9261_spi1_device = { .name = "atmel_spi", .id = 1, .dev = { .dma_mask = &spi_dmamask, |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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}, .resource = spi1_resources, .num_resources = ARRAY_SIZE(spi1_resources), }; static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 }; void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) { int i; unsigned long cs_pin; short enable_spi0 = 0; short enable_spi1 = 0; /* Choose SPI chip-selects */ for (i = 0; i < nr_devices; i++) { if (devices[i].controller_data) cs_pin = (unsigned long) devices[i].controller_data; else if (devices[i].bus_num == 0) cs_pin = spi0_standard_cs[devices[i].chip_select]; else cs_pin = spi1_standard_cs[devices[i].chip_select]; if (devices[i].bus_num == 0) enable_spi0 = 1; else enable_spi1 = 1; /* enable chip-select pin */ at91_set_gpio_output(cs_pin, 1); /* pass chip-select pin to driver */ devices[i].controller_data = (void *) cs_pin; } spi_register_board_info(devices, nr_devices); /* Configure SPI bus(es) */ if (enable_spi0) { at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ |
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platform_device_register(&at91sam9261_spi0_device); } if (enable_spi1) { at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */ at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */ at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */ |
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platform_device_register(&at91sam9261_spi1_device); } } #else void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} #endif /* -------------------------------------------------------------------- * LCD Controller * -------------------------------------------------------------------- */ |
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#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) |
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static u64 lcdc_dmamask = DMA_BIT_MASK(32); |
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static struct atmel_lcdfb_info lcdc_data; |
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static struct resource lcdc_resources[] = { [0] = { .start = AT91SAM9261_LCDC_BASE, .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_LCDC, .end = AT91SAM9261_ID_LCDC, .flags = IORESOURCE_IRQ, }, #if defined(CONFIG_FB_INTSRAM) [2] = { .start = AT91SAM9261_SRAM_BASE, .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1, .flags = IORESOURCE_MEM, }, #endif }; static struct platform_device at91_lcdc_device = { |
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.name = "atmel_lcdfb", |
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.id = 0, .dev = { .dma_mask = &lcdc_dmamask, |
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.coherent_dma_mask = DMA_BIT_MASK(32), |
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.platform_data = &lcdc_data, }, .resource = lcdc_resources, .num_resources = ARRAY_SIZE(lcdc_resources), }; |
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void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) |
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{ if (!data) { return; } |
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#if defined(CONFIG_FB_ATMEL_STN) at91_set_A_periph(AT91_PIN_PB0, 0); /* LCDVSYNC */ at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ at91_set_A_periph(AT91_PIN_PB5, 0); /* LCDD0 */ at91_set_A_periph(AT91_PIN_PB6, 0); /* LCDD1 */ at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ #else |
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at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */ at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */ at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */ at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */ at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */ at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */ at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */ at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */ at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */ at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */ at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */ at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */ at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */ at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ |
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#endif |
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if (ARRAY_SIZE(lcdc_resources) > 2) { void __iomem *fb; struct resource *fb_res = &lcdc_resources[2]; |
28f65c11f treewide: Convert... |
515 |
size_t fb_len = resource_size(fb_res); |
01d3a5e7f atmel_lcdfb: don'... |
516 |
|
90898709d atmel_lcdfb: fix ... |
517 |
fb = ioremap(fb_res->start, fb_len); |
01d3a5e7f atmel_lcdfb: don'... |
518 519 |
if (fb) { memset(fb, 0, fb_len); |
90898709d atmel_lcdfb: fix ... |
520 |
iounmap(fb); |
01d3a5e7f atmel_lcdfb: don'... |
521 522 |
} } |
86ad76bb2 [ARM] 3953/1: AT9... |
523 524 525 526 |
lcdc_data = *data; platform_device_register(&at91_lcdc_device); } #else |
7776a94c3 [ARM] 4352/1: AT9... |
527 |
void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} |
86ad76bb2 [ARM] 3953/1: AT9... |
528 529 530 531 |
#endif /* -------------------------------------------------------------------- |
e5f40bfaf [ARM] 4909/1: [AT... |
532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 |
* Timer/Counter block * -------------------------------------------------------------------- */ #ifdef CONFIG_ATMEL_TCLIB static struct resource tcb_resources[] = { [0] = { .start = AT91SAM9261_BASE_TCB0, .end = AT91SAM9261_BASE_TCB0 + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_TC0, .end = AT91SAM9261_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { .start = AT91SAM9261_ID_TC1, .end = AT91SAM9261_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { .start = AT91SAM9261_ID_TC2, .end = AT91SAM9261_ID_TC2, .flags = IORESOURCE_IRQ, }, }; static struct platform_device at91sam9261_tcb_device = { .name = "atmel_tcb", .id = 0, .resource = tcb_resources, .num_resources = ARRAY_SIZE(tcb_resources), }; static void __init at91_add_device_tc(void) { |
e5f40bfaf [ARM] 4909/1: [AT... |
569 570 571 572 573 574 575 576 |
platform_device_register(&at91sam9261_tcb_device); } #else static void __init at91_add_device_tc(void) { } #endif /* -------------------------------------------------------------------- |
884f5a6a8 [ARM] 4752/1: [AT... |
577 578 579 580 581 |
* RTT * -------------------------------------------------------------------- */ static struct resource rtt_resources[] = { { |
eab5fd67d ARM: at91: make r... |
582 583 |
.start = AT91SAM9261_BASE_RTT, .end = AT91SAM9261_BASE_RTT + SZ_16 - 1, |
884f5a6a8 [ARM] 4752/1: [AT... |
584 585 586 587 588 589 |
.flags = IORESOURCE_MEM, } }; static struct platform_device at91sam9261_rtt_device = { .name = "at91_rtt", |
4fd9212cb [ARM] 4908/1: [AT... |
590 |
.id = 0, |
884f5a6a8 [ARM] 4752/1: [AT... |
591 592 593 594 595 596 597 598 599 600 601 602 603 |
.resource = rtt_resources, .num_resources = ARRAY_SIZE(rtt_resources), }; static void __init at91_add_device_rtt(void) { platform_device_register(&at91sam9261_rtt_device); } /* -------------------------------------------------------------------- * Watchdog * -------------------------------------------------------------------- */ |
2af29b786 [ARM] 5390/1: AT9... |
604 |
#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) |
c1c30a29d ARM: at91: make w... |
605 606 607 608 609 610 611 |
static struct resource wdt_resources[] = { { .start = AT91SAM9261_BASE_WDT, .end = AT91SAM9261_BASE_WDT + SZ_16 - 1, .flags = IORESOURCE_MEM, } }; |
884f5a6a8 [ARM] 4752/1: [AT... |
612 613 614 |
static struct platform_device at91sam9261_wdt_device = { .name = "at91_wdt", .id = -1, |
c1c30a29d ARM: at91: make w... |
615 616 |
.resource = wdt_resources, .num_resources = ARRAY_SIZE(wdt_resources), |
884f5a6a8 [ARM] 4752/1: [AT... |
617 618 619 620 621 622 623 624 625 626 627 628 |
}; static void __init at91_add_device_watchdog(void) { platform_device_register(&at91sam9261_wdt_device); } #else static void __init at91_add_device_watchdog(void) {} #endif /* -------------------------------------------------------------------- |
bfbc32663 [ARM] 4754/1: [AT... |
629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 |
* SSC -- Synchronous Serial Controller * -------------------------------------------------------------------- */ #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) static u64 ssc0_dmamask = DMA_BIT_MASK(32); static struct resource ssc0_resources[] = { [0] = { .start = AT91SAM9261_BASE_SSC0, .end = AT91SAM9261_BASE_SSC0 + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_SSC0, .end = AT91SAM9261_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; static struct platform_device at91sam9261_ssc0_device = { .name = "ssc", .id = 0, .dev = { .dma_mask = &ssc0_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = ssc0_resources, .num_resources = ARRAY_SIZE(ssc0_resources), }; static inline void configure_ssc0_pins(unsigned pins) { if (pins & ATMEL_SSC_TF) at91_set_A_periph(AT91_PIN_PB21, 1); if (pins & ATMEL_SSC_TK) at91_set_A_periph(AT91_PIN_PB22, 1); if (pins & ATMEL_SSC_TD) at91_set_A_periph(AT91_PIN_PB23, 1); if (pins & ATMEL_SSC_RD) at91_set_A_periph(AT91_PIN_PB24, 1); if (pins & ATMEL_SSC_RK) at91_set_A_periph(AT91_PIN_PB25, 1); if (pins & ATMEL_SSC_RF) at91_set_A_periph(AT91_PIN_PB26, 1); } static u64 ssc1_dmamask = DMA_BIT_MASK(32); static struct resource ssc1_resources[] = { [0] = { .start = AT91SAM9261_BASE_SSC1, .end = AT91SAM9261_BASE_SSC1 + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_SSC1, .end = AT91SAM9261_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; static struct platform_device at91sam9261_ssc1_device = { .name = "ssc", .id = 1, .dev = { .dma_mask = &ssc1_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = ssc1_resources, .num_resources = ARRAY_SIZE(ssc1_resources), }; static inline void configure_ssc1_pins(unsigned pins) { if (pins & ATMEL_SSC_TF) at91_set_B_periph(AT91_PIN_PA17, 1); if (pins & ATMEL_SSC_TK) at91_set_B_periph(AT91_PIN_PA18, 1); if (pins & ATMEL_SSC_TD) at91_set_B_periph(AT91_PIN_PA19, 1); if (pins & ATMEL_SSC_RD) at91_set_B_periph(AT91_PIN_PA20, 1); if (pins & ATMEL_SSC_RK) at91_set_B_periph(AT91_PIN_PA21, 1); if (pins & ATMEL_SSC_RF) at91_set_B_periph(AT91_PIN_PA22, 1); } static u64 ssc2_dmamask = DMA_BIT_MASK(32); static struct resource ssc2_resources[] = { [0] = { .start = AT91SAM9261_BASE_SSC2, .end = AT91SAM9261_BASE_SSC2 + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_SSC2, .end = AT91SAM9261_ID_SSC2, .flags = IORESOURCE_IRQ, }, }; static struct platform_device at91sam9261_ssc2_device = { .name = "ssc", .id = 2, .dev = { .dma_mask = &ssc2_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), }, .resource = ssc2_resources, .num_resources = ARRAY_SIZE(ssc2_resources), }; static inline void configure_ssc2_pins(unsigned pins) { if (pins & ATMEL_SSC_TF) at91_set_B_periph(AT91_PIN_PC25, 1); if (pins & ATMEL_SSC_TK) at91_set_B_periph(AT91_PIN_PC26, 1); if (pins & ATMEL_SSC_TD) at91_set_B_periph(AT91_PIN_PC27, 1); if (pins & ATMEL_SSC_RD) at91_set_B_periph(AT91_PIN_PC28, 1); if (pins & ATMEL_SSC_RK) at91_set_B_periph(AT91_PIN_PC29, 1); if (pins & ATMEL_SSC_RF) at91_set_B_periph(AT91_PIN_PC30, 1); } /* * SSC controllers are accessed through library code, instead of any * kind of all-singing/all-dancing driver. For example one could be * used by a particular I2S audio codec's driver, while another one * on the same system might be used by a custom data capture driver. */ void __init at91_add_device_ssc(unsigned id, unsigned pins) { struct platform_device *pdev; /* * NOTE: caller is responsible for passing information matching * "pins" to whatever will be using each particular controller. */ switch (id) { case AT91SAM9261_ID_SSC0: pdev = &at91sam9261_ssc0_device; configure_ssc0_pins(pins); |
bfbc32663 [ARM] 4754/1: [AT... |
777 778 779 780 |
break; case AT91SAM9261_ID_SSC1: pdev = &at91sam9261_ssc1_device; configure_ssc1_pins(pins); |
bfbc32663 [ARM] 4754/1: [AT... |
781 782 783 784 |
break; case AT91SAM9261_ID_SSC2: pdev = &at91sam9261_ssc2_device; configure_ssc2_pins(pins); |
bfbc32663 [ARM] 4754/1: [AT... |
785 786 787 788 789 790 791 792 793 794 795 796 797 798 |
break; default: return; } platform_device_register(pdev); } #else void __init at91_add_device_ssc(unsigned id, unsigned pins) {} #endif /* -------------------------------------------------------------------- |
86ad76bb2 [ARM] 3953/1: AT9... |
799 800 801 802 803 804 |
* UART * -------------------------------------------------------------------- */ #if defined(CONFIG_SERIAL_ATMEL) static struct resource dbgu_resources[] = { [0] = { |
13079a733 ARM: at91: make D... |
805 806 |
.start = AT91SAM9261_BASE_DBGU, .end = AT91SAM9261_BASE_DBGU + SZ_512 - 1, |
86ad76bb2 [ARM] 3953/1: AT9... |
807 808 809 810 811 812 813 814 815 816 817 818 |
.flags = IORESOURCE_MEM, }, [1] = { .start = AT91_ID_SYS, .end = AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; static struct atmel_uart_data dbgu_data = { .use_dma_tx = 0, .use_dma_rx = 0, /* DBGU not capable of receive DMA */ |
86ad76bb2 [ARM] 3953/1: AT9... |
819 |
}; |
c6686ff9d [ARM] 4753/1: [AT... |
820 |
static u64 dbgu_dmamask = DMA_BIT_MASK(32); |
86ad76bb2 [ARM] 3953/1: AT9... |
821 822 823 824 |
static struct platform_device at91sam9261_dbgu_device = { .name = "atmel_usart", .id = 0, .dev = { |
c6686ff9d [ARM] 4753/1: [AT... |
825 826 827 |
.dma_mask = &dbgu_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &dbgu_data, |
86ad76bb2 [ARM] 3953/1: AT9... |
828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 |
}, .resource = dbgu_resources, .num_resources = ARRAY_SIZE(dbgu_resources), }; static inline void configure_dbgu_pins(void) { at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ } static struct resource uart0_resources[] = { [0] = { .start = AT91SAM9261_BASE_US0, .end = AT91SAM9261_BASE_US0 + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_US0, .end = AT91SAM9261_ID_US0, .flags = IORESOURCE_IRQ, }, }; static struct atmel_uart_data uart0_data = { .use_dma_tx = 1, .use_dma_rx = 1, }; |
c6686ff9d [ARM] 4753/1: [AT... |
856 |
static u64 uart0_dmamask = DMA_BIT_MASK(32); |
86ad76bb2 [ARM] 3953/1: AT9... |
857 858 859 860 |
static struct platform_device at91sam9261_uart0_device = { .name = "atmel_usart", .id = 1, .dev = { |
c6686ff9d [ARM] 4753/1: [AT... |
861 862 863 |
.dma_mask = &uart0_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &uart0_data, |
86ad76bb2 [ARM] 3953/1: AT9... |
864 865 866 867 |
}, .resource = uart0_resources, .num_resources = ARRAY_SIZE(uart0_resources), }; |
c8f385a63 [ARM] 4757/1: [AT... |
868 |
static inline void configure_usart0_pins(unsigned pins) |
86ad76bb2 [ARM] 3953/1: AT9... |
869 870 871 |
{ at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ |
c8f385a63 [ARM] 4757/1: [AT... |
872 873 874 875 876 |
if (pins & ATMEL_UART_RTS) at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */ if (pins & ATMEL_UART_CTS) at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */ |
86ad76bb2 [ARM] 3953/1: AT9... |
877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 |
} static struct resource uart1_resources[] = { [0] = { .start = AT91SAM9261_BASE_US1, .end = AT91SAM9261_BASE_US1 + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_US1, .end = AT91SAM9261_ID_US1, .flags = IORESOURCE_IRQ, }, }; static struct atmel_uart_data uart1_data = { .use_dma_tx = 1, .use_dma_rx = 1, }; |
c6686ff9d [ARM] 4753/1: [AT... |
896 |
static u64 uart1_dmamask = DMA_BIT_MASK(32); |
86ad76bb2 [ARM] 3953/1: AT9... |
897 898 899 900 |
static struct platform_device at91sam9261_uart1_device = { .name = "atmel_usart", .id = 2, .dev = { |
c6686ff9d [ARM] 4753/1: [AT... |
901 902 903 |
.dma_mask = &uart1_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &uart1_data, |
86ad76bb2 [ARM] 3953/1: AT9... |
904 905 906 907 |
}, .resource = uart1_resources, .num_resources = ARRAY_SIZE(uart1_resources), }; |
c8f385a63 [ARM] 4757/1: [AT... |
908 |
static inline void configure_usart1_pins(unsigned pins) |
86ad76bb2 [ARM] 3953/1: AT9... |
909 910 911 |
{ at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ |
c8f385a63 [ARM] 4757/1: [AT... |
912 913 914 915 916 |
if (pins & ATMEL_UART_RTS) at91_set_B_periph(AT91_PIN_PA12, 0); /* RTS1 */ if (pins & ATMEL_UART_CTS) at91_set_B_periph(AT91_PIN_PA13, 0); /* CTS1 */ |
86ad76bb2 [ARM] 3953/1: AT9... |
917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 |
} static struct resource uart2_resources[] = { [0] = { .start = AT91SAM9261_BASE_US2, .end = AT91SAM9261_BASE_US2 + SZ_16K - 1, .flags = IORESOURCE_MEM, }, [1] = { .start = AT91SAM9261_ID_US2, .end = AT91SAM9261_ID_US2, .flags = IORESOURCE_IRQ, }, }; static struct atmel_uart_data uart2_data = { .use_dma_tx = 1, .use_dma_rx = 1, }; |
c6686ff9d [ARM] 4753/1: [AT... |
936 |
static u64 uart2_dmamask = DMA_BIT_MASK(32); |
86ad76bb2 [ARM] 3953/1: AT9... |
937 938 939 940 |
static struct platform_device at91sam9261_uart2_device = { .name = "atmel_usart", .id = 3, .dev = { |
c6686ff9d [ARM] 4753/1: [AT... |
941 942 943 |
.dma_mask = &uart2_dmamask, .coherent_dma_mask = DMA_BIT_MASK(32), .platform_data = &uart2_data, |
86ad76bb2 [ARM] 3953/1: AT9... |
944 945 946 947 |
}, .resource = uart2_resources, .num_resources = ARRAY_SIZE(uart2_resources), }; |
c8f385a63 [ARM] 4757/1: [AT... |
948 |
static inline void configure_usart2_pins(unsigned pins) |
86ad76bb2 [ARM] 3953/1: AT9... |
949 950 951 |
{ at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ |
c8f385a63 [ARM] 4757/1: [AT... |
952 953 954 955 956 |
if (pins & ATMEL_UART_RTS) at91_set_B_periph(AT91_PIN_PA15, 0); /* RTS2*/ if (pins & ATMEL_UART_CTS) at91_set_B_periph(AT91_PIN_PA16, 0); /* CTS2 */ |
86ad76bb2 [ARM] 3953/1: AT9... |
957 |
} |
11aadac4f [ARM] 4982/1: [AT... |
958 |
static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |
86ad76bb2 [ARM] 3953/1: AT9... |
959 |
struct platform_device *atmel_default_console_device; /* the serial console device */ |
c8f385a63 [ARM] 4757/1: [AT... |
960 961 962 |
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) { struct platform_device *pdev; |
2b348e2f8 atmel_serial: kee... |
963 |
struct atmel_uart_data *pdata; |
c8f385a63 [ARM] 4757/1: [AT... |
964 965 966 967 968 |
switch (id) { case 0: /* DBGU */ pdev = &at91sam9261_dbgu_device; configure_dbgu_pins(); |
c8f385a63 [ARM] 4757/1: [AT... |
969 970 971 972 |
break; case AT91SAM9261_ID_US0: pdev = &at91sam9261_uart0_device; configure_usart0_pins(pins); |
c8f385a63 [ARM] 4757/1: [AT... |
973 974 975 976 |
break; case AT91SAM9261_ID_US1: pdev = &at91sam9261_uart1_device; configure_usart1_pins(pins); |
c8f385a63 [ARM] 4757/1: [AT... |
977 978 979 980 |
break; case AT91SAM9261_ID_US2: pdev = &at91sam9261_uart2_device; configure_usart2_pins(pins); |
c8f385a63 [ARM] 4757/1: [AT... |
981 982 983 984 |
break; default: return; } |
2b348e2f8 atmel_serial: kee... |
985 986 |
pdata = pdev->dev.platform_data; pdata->num = portnr; /* update to mapped ID */ |
c8f385a63 [ARM] 4757/1: [AT... |
987 988 989 990 991 992 993 |
if (portnr < ATMEL_MAX_UART) at91_uarts[portnr] = pdev; } void __init at91_set_serial_console(unsigned portnr) { |
bd6029959 at91: switch to C... |
994 |
if (portnr < ATMEL_MAX_UART) { |
c8f385a63 [ARM] 4757/1: [AT... |
995 |
atmel_default_console_device = at91_uarts[portnr]; |
5c1f96686 at91: fix at91_se... |
996 |
at91sam9261_set_console_clock(at91_uarts[portnr]->id); |
bd6029959 at91: switch to C... |
997 |
} |
c8f385a63 [ARM] 4757/1: [AT... |
998 |
} |
86ad76bb2 [ARM] 3953/1: AT9... |
999 1000 1001 1002 1003 1004 1005 1006 |
void __init at91_add_device_serial(void) { int i; for (i = 0; i < ATMEL_MAX_UART; i++) { if (at91_uarts[i]) platform_device_register(at91_uarts[i]); } |
11aadac4f [ARM] 4982/1: [AT... |
1007 1008 1009 1010 |
if (!atmel_default_console_device) printk(KERN_INFO "AT91: No default serial console defined. "); |
86ad76bb2 [ARM] 3953/1: AT9... |
1011 1012 |
} #else |
c8f385a63 [ARM] 4757/1: [AT... |
1013 1014 |
void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} void __init at91_set_serial_console(unsigned portnr) {} |
86ad76bb2 [ARM] 3953/1: AT9... |
1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 |
void __init at91_add_device_serial(void) {} #endif /* -------------------------------------------------------------------- */ /* * These devices are always present and don't need any board-specific * setup. */ static int __init at91_add_standard_devices(void) { |
884f5a6a8 [ARM] 4752/1: [AT... |
1027 1028 |
at91_add_device_rtt(); at91_add_device_watchdog(); |
e5f40bfaf [ARM] 4909/1: [AT... |
1029 |
at91_add_device_tc(); |
86ad76bb2 [ARM] 3953/1: AT9... |
1030 1031 1032 1033 |
return 0; } arch_initcall(at91_add_standard_devices); |