Blame view

arch/arm/mach-ux500/timer.c 1.86 KB
5f5663a43   Jonas Aaberg   ARM: ux500: Move ...
1
2
3
4
5
6
7
  /*
   * Copyright (C) ST-Ericsson SA 2011
   *
   * License Terms: GNU General Public License v2
   * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson
   */
  #include <linux/io.h>
b1e3be064   Linus Walleij   clocksource: fixu...
8
  #include <linux/errno.h>
5f5663a43   Jonas Aaberg   ARM: ux500: Move ...
9
10
11
12
13
14
15
16
17
18
19
  #include <linux/clksrc-dbx500-prcmu.h>
  
  #include <asm/localtimer.h>
  
  #include <plat/mtu.h>
  
  #include <mach/setup.h>
  #include <mach/hardware.h>
  
  static void __init ux500_timer_init(void)
  {
b1e3be064   Linus Walleij   clocksource: fixu...
20
  	void __iomem *prcmu_timer_base;
5f5663a43   Jonas Aaberg   ARM: ux500: Move ...
21
22
23
24
25
  	if (cpu_is_u5500()) {
  #ifdef CONFIG_LOCAL_TIMERS
  		twd_base = __io_address(U5500_TWD_BASE);
  #endif
  		mtu_base = __io_address(U5500_MTU0_BASE);
b1e3be064   Linus Walleij   clocksource: fixu...
26
  		prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE);
5f5663a43   Jonas Aaberg   ARM: ux500: Move ...
27
28
29
30
31
  	} else if (cpu_is_u8500()) {
  #ifdef CONFIG_LOCAL_TIMERS
  		twd_base = __io_address(U8500_TWD_BASE);
  #endif
  		mtu_base = __io_address(U8500_MTU0_BASE);
b1e3be064   Linus Walleij   clocksource: fixu...
32
  		prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
5f5663a43   Jonas Aaberg   ARM: ux500: Move ...
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
  	} else {
  		ux500_unknown_soc();
  	}
  
  	/*
  	 * Here we register the timerblocks active in the system.
  	 * Localtimers (twd) is started when both cpu is up and running.
  	 * MTU register a clocksource, clockevent and sched_clock.
  	 * Since the MTU is located in the VAPE power domain
  	 * it will be cleared in sleep which makes it unsuitable.
  	 * We however need it as a timer tick (clockevent)
  	 * during boot to calibrate delay until twd is started.
  	 * RTC-RTT have problems as timer tick during boot since it is
  	 * depending on delay which is not yet calibrated. RTC-RTT is in the
  	 * always-on powerdomain and is used as clockevent instead of twd when
  	 * sleeping.
  	 * The PRCMU timer 4(3 for DB5500) register a clocksource and
  	 * sched_clock with higher rating then MTU since is always-on.
  	 *
  	 */
  
  	nmdk_timer_init();
b1e3be064   Linus Walleij   clocksource: fixu...
55
  	clksrc_dbx500_prcmu_init(prcmu_timer_base);
5f5663a43   Jonas Aaberg   ARM: ux500: Move ...
56
  }
bb219dba0   Jonas Aaberg   ARM: ux500: Repro...
57
58
59
60
61
  static void ux500_timer_reset(void)
  {
  	nmdk_clkevt_reset();
  	nmdk_clksrc_reset();
  }
5f5663a43   Jonas Aaberg   ARM: ux500: Move ...
62
63
  struct sys_timer ux500_timer = {
  	.init		= ux500_timer_init,
bb219dba0   Jonas Aaberg   ARM: ux500: Repro...
64
  	.resume		= ux500_timer_reset,
5f5663a43   Jonas Aaberg   ARM: ux500: Move ...
65
  };