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drivers/bcma/core.c
3.62 KB
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/* * Broadcom specific AMBA * Core ops * * Licensed under the GNU/GPL. See COPYING for details. */ #include "bcma_private.h" |
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#include <linux/export.h> |
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#include <linux/bcma/bcma.h> |
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static bool bcma_core_wait_value(struct bcma_device *core, u16 reg, u32 mask, u32 value, int timeout) { unsigned long deadline = jiffies + timeout; u32 val; do { val = bcma_aread32(core, reg); if ((val & mask) == value) return true; cpu_relax(); udelay(10); } while (!time_after_eq(jiffies, deadline)); bcma_warn(core->bus, "Timeout waiting for register 0x%04X! ", reg); return false; } |
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bool bcma_core_is_enabled(struct bcma_device *core) { if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC)) != BCMA_IOCTL_CLK) return false; if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET) return false; return true; } EXPORT_SYMBOL_GPL(bcma_core_is_enabled); |
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void bcma_core_disable(struct bcma_device *core, u32 flags) |
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{ if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET) return; |
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bcma_core_wait_value(core, BCMA_RESET_ST, ~0, 0, 300); |
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bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET); |
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bcma_aread32(core, BCMA_RESET_CTL); |
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udelay(1); |
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bcma_awrite32(core, BCMA_IOCTL, flags); bcma_aread32(core, BCMA_IOCTL); udelay(10); |
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} |
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EXPORT_SYMBOL_GPL(bcma_core_disable); |
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int bcma_core_enable(struct bcma_device *core, u32 flags) { bcma_core_disable(core, flags); bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC | flags)); bcma_aread32(core, BCMA_IOCTL); bcma_awrite32(core, BCMA_RESET_CTL, 0); |
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bcma_aread32(core, BCMA_RESET_CTL); |
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udelay(1); bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags)); bcma_aread32(core, BCMA_IOCTL); udelay(1); return 0; } EXPORT_SYMBOL_GPL(bcma_core_enable); |
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void bcma_core_set_clockmode(struct bcma_device *core, enum bcma_clkmode clkmode) { u16 i; WARN_ON(core->id.id != BCMA_CORE_CHIPCOMMON && core->id.id != BCMA_CORE_PCIE && core->id.id != BCMA_CORE_80211); switch (clkmode) { case BCMA_CLKMODE_FAST: bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT); |
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usleep_range(64, 300); |
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for (i = 0; i < 1500; i++) { if (bcma_read32(core, BCMA_CLKCTLST) & BCMA_CLKCTLST_HAVEHT) { i = 0; break; } udelay(10); } if (i) |
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bcma_err(core->bus, "HT force timeout "); |
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break; case BCMA_CLKMODE_DYNAMIC: |
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bcma_set32(core, BCMA_CLKCTLST, ~BCMA_CLKCTLST_FORCEHT); |
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break; } } EXPORT_SYMBOL_GPL(bcma_core_set_clockmode); |
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void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on) { u16 i; WARN_ON(req & ~BCMA_CLKCTLST_EXTRESREQ); WARN_ON(status & ~BCMA_CLKCTLST_EXTRESST); if (on) { bcma_set32(core, BCMA_CLKCTLST, req); for (i = 0; i < 10000; i++) { if ((bcma_read32(core, BCMA_CLKCTLST) & status) == status) { i = 0; break; } udelay(10); } if (i) |
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bcma_err(core->bus, "PLL enable timeout "); |
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} else { |
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/* * Mask the PLL but don't wait for it to be disabled. PLL may be * shared between cores and will be still up if there is another * core using it. */ bcma_mask32(core, BCMA_CLKCTLST, ~req); bcma_read32(core, BCMA_CLKCTLST); |
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} } EXPORT_SYMBOL_GPL(bcma_core_pll_ctl); |
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u32 bcma_core_dma_translation(struct bcma_device *core) { switch (core->bus->hosttype) { |
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case BCMA_HOSTTYPE_SOC: return 0; |
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case BCMA_HOSTTYPE_PCI: if (bcma_aread32(core, BCMA_IOST) & BCMA_IOST_DMA64) return BCMA_DMA_TRANSLATION_DMA64_CMT; else return BCMA_DMA_TRANSLATION_DMA32_CMT; default: |
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bcma_err(core->bus, "DMA translation unknown for host %d ", core->bus->hosttype); |
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} return BCMA_DMA_TRANSLATION_NONE; } EXPORT_SYMBOL(bcma_core_dma_translation); |