/*
   * OMAP4 OPP table definitions.
   *
   * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
   *	Nishanth Menon
   *	Kevin Hilman
   *	Thara Gopinath

   * Copyright (C) 2010-2011 Nokia Corporation.

   *      Eduardo Valentin

   *      Paul Walmsley

   *
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License version 2 as
   * published by the Free Software Foundation.
   *
   * This program is distributed "as is" WITHOUT ANY WARRANTY of any
   * kind, whether express or implied; without even the implied warranty
   * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   * GNU General Public License for more details.
   */
  #include <linux/module.h>
  
  #include <plat/cpu.h>

  #include "control.h"

  #include "omap_opp_data.h"

  #include "pm.h"

  /*
   * Structures containing OMAP4430 voltage supported and various
   * voltage dependent data for each VDD.
   */

  #define OMAP4430_VDD_MPU_OPP50_UV		1025000
  #define OMAP4430_VDD_MPU_OPP100_UV		1200000
  #define OMAP4430_VDD_MPU_OPPTURBO_UV		1313000
  #define OMAP4430_VDD_MPU_OPPNITRO_UV		1375000

  
  struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
  	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
  	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
  	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
  	VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
  	VOLT_DATA_DEFINE(0, 0, 0, 0),
  };

  #define OMAP4430_VDD_IVA_OPP50_UV		1013000
  #define OMAP4430_VDD_IVA_OPP100_UV		1188000
  #define OMAP4430_VDD_IVA_OPPTURBO_UV		1300000

  
  struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
  	VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
  	VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
  	VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
  	VOLT_DATA_DEFINE(0, 0, 0, 0),
  };

  #define OMAP4430_VDD_CORE_OPP50_UV		1025000
  #define OMAP4430_VDD_CORE_OPP100_UV		1200000

  
  struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
  	VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
  	VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
  	VOLT_DATA_DEFINE(0, 0, 0, 0),
  };

  static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
  	/* MPU OPP1 - OPP50 */

  	OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV),

  	/* MPU OPP2 - OPP100 */

  	OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV),

  	/* MPU OPP3 - OPP-Turbo */

  	OPP_INITIALIZER("mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),

  	/* MPU OPP4 - OPP-SB */

  	OPP_INITIALIZER("mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),

  	/* L3 OPP1 - OPP50 */

  	OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV),

  	/* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */

  	OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV),

  	/* IVA OPP1 - OPP50 */
  	OPP_INITIALIZER("iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV),
  	/* IVA OPP2 - OPP100 */
  	OPP_INITIALIZER("iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV),
  	/* IVA OPP3 - OPP-Turbo */
  	OPP_INITIALIZER("iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV),
  	/* TODO: add DSP, aess, fdif, gpu */

  };
  
  /**
   * omap4_opp_init() - initialize omap4 opp table
   */

  int __init omap4_opp_init(void)

  {
  	int r = -ENODEV;
  
  	if (!cpu_is_omap44xx())
  		return r;
  
  	r = omap_init_opp_table(omap44xx_opp_def_list,
  			ARRAY_SIZE(omap44xx_opp_def_list));
  
  	return r;
  }
  device_initcall(omap4_opp_init);