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arch/mips/kernel/ptrace32.c
7.94 KB
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/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 1992 Ross Biro * Copyright (C) Linus Torvalds * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle * Copyright (C) 1996 David S. Miller * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com * Copyright (C) 1999 MIPS Technologies, Inc. * Copyright (C) 2000 Ulf Carlsson * * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit * binaries. */ #include <linux/compiler.h> |
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#include <linux/compat.h> |
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#include <linux/kernel.h> #include <linux/sched.h> #include <linux/mm.h> #include <linux/errno.h> #include <linux/ptrace.h> #include <linux/smp.h> |
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#include <linux/user.h> #include <linux/security.h> #include <asm/cpu.h> |
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#include <asm/dsp.h> |
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#include <asm/fpu.h> #include <asm/mipsregs.h> |
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#include <asm/mipsmtregs.h> |
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#include <asm/pgtable.h> #include <asm/page.h> #include <asm/system.h> #include <asm/uaccess.h> #include <asm/bootinfo.h> /* * Tracing a 32-bit process with a 64-bit strace and vice versa will not * work. I don't know how to fix this. */ |
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long compat_arch_ptrace(struct task_struct *child, compat_long_t request, compat_ulong_t caddr, compat_ulong_t cdata) |
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{ |
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int addr = caddr; int data = cdata; |
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int ret; |
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switch (request) { |
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|
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/* * Read 4 bytes of the other process' storage * data is a pointer specifying where the user wants the * 4 bytes copied into * addr is a pointer in the user's storage that contains an 8 byte * address in the other process of the 4 bytes that is to be read * (this is run in a 32-bit process looking at a 64-bit process) * when I and D space are separate, these will need to be fixed. */ case PTRACE_PEEKTEXT_3264: case PTRACE_PEEKDATA_3264: { u32 tmp; int copied; u32 __user * addrOthers; ret = -EIO; /* Get the addr in the other process that we want to read */ if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0) break; copied = access_process_vm(child, (u64)addrOthers, &tmp, sizeof(tmp), 0); if (copied != sizeof(tmp)) break; ret = put_user(tmp, (u32 __user *) (unsigned long) data); break; } |
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/* Read the word at location addr in the USER area. */ case PTRACE_PEEKUSR: { struct pt_regs *regs; unsigned int tmp; |
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regs = task_pt_regs(child); |
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ret = 0; /* Default return value. */ switch (addr) { case 0 ... 31: tmp = regs->regs[addr]; break; case FPR_BASE ... FPR_BASE + 31: if (tsk_used_math(child)) { fpureg_t *fregs = get_fpu_regs(child); /* * The odd registers are actually the high * order bits of the values stored in the even * registers - unless we're using r2k_switch.S. */ if (addr & 1) tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32); else tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff); } else { tmp = -1; /* FP not yet used */ } break; case PC: tmp = regs->cp0_epc; break; case CAUSE: tmp = regs->cp0_cause; break; case BADVADDR: tmp = regs->cp0_badvaddr; break; case MMHI: tmp = regs->hi; break; case MMLO: tmp = regs->lo; break; case FPC_CSR: |
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tmp = child->thread.fpu.fcr31; |
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break; case FPC_EIR: { /* implementation / version register */ unsigned int flags; |
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#ifdef CONFIG_MIPS_MT_SMTC unsigned int irqflags; unsigned int mtflags; #endif /* CONFIG_MIPS_MT_SMTC */ |
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|
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preempt_disable(); |
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if (!cpu_has_fpu) { |
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preempt_enable(); |
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tmp = 0; |
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break; |
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} |
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|
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#ifdef CONFIG_MIPS_MT_SMTC /* Read-modify-write of Status must be atomic */ local_irq_save(irqflags); mtflags = dmt(); #endif /* CONFIG_MIPS_MT_SMTC */ |
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if (cpu_has_mipsmt) { unsigned int vpflags = dvpe(); flags = read_c0_status(); __enable_fpu(); __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); write_c0_status(flags); evpe(vpflags); } else { flags = read_c0_status(); __enable_fpu(); __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp)); write_c0_status(flags); } |
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#ifdef CONFIG_MIPS_MT_SMTC emt(mtflags); local_irq_restore(irqflags); #endif /* CONFIG_MIPS_MT_SMTC */ |
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preempt_enable(); |
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break; } |
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case DSP_BASE ... DSP_BASE + 5: { dspreg_t *dregs; |
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if (!cpu_has_dsp) { tmp = 0; ret = -EIO; |
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goto out; |
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} |
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dregs = __get_dsp_regs(child); |
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tmp = (unsigned long) (dregs[addr - DSP_BASE]); |
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break; |
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} |
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case DSP_CONTROL: if (!cpu_has_dsp) { tmp = 0; ret = -EIO; |
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goto out; |
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} tmp = child->thread.dsp.dspcontrol; break; |
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default: tmp = 0; ret = -EIO; |
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goto out; |
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} |
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ret = put_user(tmp, (unsigned __user *) (unsigned long) data); |
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break; } |
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/* * Write 4 bytes into the other process' storage * data is the 4 bytes that the user wants written * addr is a pointer in the user's storage that contains an * 8 byte address in the other process where the 4 bytes * that is to be written * (this is run in a 32-bit process looking at a 64-bit process) * when I and D space are separate, these will need to be fixed. */ case PTRACE_POKETEXT_3264: case PTRACE_POKEDATA_3264: { u32 __user * addrOthers; /* Get the addr in the other process that we want to write into */ ret = -EIO; if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0) break; ret = 0; if (access_process_vm(child, (u64)addrOthers, &data, sizeof(data), 1) == sizeof(data)) break; ret = -EIO; break; } |
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case PTRACE_POKEUSR: { struct pt_regs *regs; ret = 0; |
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regs = task_pt_regs(child); |
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switch (addr) { case 0 ... 31: regs->regs[addr] = data; break; case FPR_BASE ... FPR_BASE + 31: { fpureg_t *fregs = get_fpu_regs(child); if (!tsk_used_math(child)) { /* FP not yet used */ |
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memset(&child->thread.fpu, ~0, sizeof(child->thread.fpu)); child->thread.fpu.fcr31 = 0; |
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} /* * The odd registers are actually the high order bits * of the values stored in the even registers - unless * we're using r2k_switch.S. */ if (addr & 1) { fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff; fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32; } else { fregs[addr - FPR_BASE] &= ~0xffffffffLL; /* Must cast, lest sign extension fill upper bits! */ fregs[addr - FPR_BASE] |= (unsigned int)data; } break; } case PC: regs->cp0_epc = data; break; case MMHI: regs->hi = data; break; case MMLO: regs->lo = data; break; case FPC_CSR: |
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child->thread.fpu.fcr31 = data; |
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break; |
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case DSP_BASE ... DSP_BASE + 5: { dspreg_t *dregs; |
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if (!cpu_has_dsp) { ret = -EIO; break; } |
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dregs = __get_dsp_regs(child); |
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dregs[addr - DSP_BASE] = data; break; |
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} |
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case DSP_CONTROL: if (!cpu_has_dsp) { ret = -EIO; break; } child->thread.dsp.dspcontrol = data; break; |
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default: /* The rest are not allowed. */ ret = -EIO; break; } break; } |
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case PTRACE_GETREGS: |
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ret = ptrace_getregs(child, (__s64 __user *) (__u64) data); |
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break; case PTRACE_SETREGS: |
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ret = ptrace_setregs(child, (__s64 __user *) (__u64) data); |
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break; case PTRACE_GETFPREGS: |
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ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data); |
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break; case PTRACE_SETFPREGS: |
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ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data); |
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break; |
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case PTRACE_GET_THREAD_AREA: |
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ret = put_user(task_thread_info(child)->tp_value, |
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(unsigned int __user *) (unsigned long) data); break; |
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case PTRACE_GET_THREAD_AREA_3264: |
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ret = put_user(task_thread_info(child)->tp_value, |
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(unsigned long __user *) (unsigned long) data); break; |
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case PTRACE_GET_WATCH_REGS: ret = ptrace_get_watch_regs(child, (struct pt_watch_regs __user *) (unsigned long) addr); break; case PTRACE_SET_WATCH_REGS: ret = ptrace_set_watch_regs(child, (struct pt_watch_regs __user *) (unsigned long) addr); break; |
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default: |
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ret = compat_ptrace_request(child, request, addr, data); |
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break; } |
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out: |
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return ret; } |