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drivers/input/touchscreen/intel-mid-touch.c
15.3 KB
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/* |
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* Intel MID Resistive Touch Screen Driver |
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* * Copyright (C) 2008 Intel Corp * * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; version 2 of the License. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License along |
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* with this program; if not, write to the Free Software Foundation, Inc., |
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. * * Questions/Comments/Bug fixes to Sreedhara (sreedhara.ds@intel.com) |
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* Ramesh Agarwal (ramesh.agarwal@intel.com) |
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * * TODO: |
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* review conversion of r/m/w sequences |
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*/ #include <linux/module.h> #include <linux/init.h> #include <linux/input.h> #include <linux/interrupt.h> #include <linux/err.h> #include <linux/param.h> |
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#include <linux/slab.h> #include <linux/platform_device.h> |
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#include <linux/irq.h> #include <linux/delay.h> |
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#include <asm/intel_scu_ipc.h> |
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/* PMIC Interrupt registers */ |
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#define PMIC_REG_ID1 0x00 /* PMIC ID1 register */ |
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/* PMIC Interrupt registers */ |
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#define PMIC_REG_INT 0x04 /* PMIC interrupt register */ #define PMIC_REG_MINT 0x05 /* PMIC interrupt mask register */ |
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/* ADC Interrupt registers */ |
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#define PMIC_REG_ADCINT 0x5F /* ADC interrupt register */ #define PMIC_REG_MADCINT 0x60 /* ADC interrupt mask register */ |
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/* ADC Control registers */ |
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#define PMIC_REG_ADCCNTL1 0x61 /* ADC control register */ |
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/* ADC Channel Selection registers */ |
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#define PMICADDR0 0xA4 #define END_OF_CHANNEL 0x1F |
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/* ADC Result register */ |
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#define PMIC_REG_ADCSNS0H 0x64 |
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/* ADC channels for touch screen */ |
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#define MRST_TS_CHAN10 0xA /* Touch screen X+ connection */ #define MRST_TS_CHAN11 0xB /* Touch screen X- connection */ #define MRST_TS_CHAN12 0xC /* Touch screen Y+ connection */ #define MRST_TS_CHAN13 0xD /* Touch screen Y- connection */ |
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/* Touch screen channel BIAS constants */ |
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#define MRST_XBIAS 0x20 #define MRST_YBIAS 0x40 #define MRST_ZBIAS 0x80 |
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/* Touch screen coordinates */ |
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#define MRST_X_MIN 10 #define MRST_X_MAX 1024 #define MRST_X_FUZZ 5 #define MRST_Y_MIN 10 #define MRST_Y_MAX 1024 #define MRST_Y_FUZZ 5 #define MRST_PRESSURE_MIN 0 #define MRST_PRESSURE_NOMINAL 50 #define MRST_PRESSURE_MAX 100 #define WAIT_ADC_COMPLETION 10 /* msec */ |
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/* PMIC ADC round robin delays */ |
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#define ADC_LOOP_DELAY0 0x0 /* Continuous loop */ #define ADC_LOOP_DELAY1 0x1 /* 4.5 ms approximate */ |
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/* PMIC Vendor Identifiers */ |
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#define PMIC_VENDOR_FS 0 /* PMIC vendor FreeScale */ #define PMIC_VENDOR_MAXIM 1 /* PMIC vendor MAXIM */ #define PMIC_VENDOR_NEC 2 /* PMIC vendor NEC */ #define MRSTOUCH_MAX_CHANNELS 32 /* Maximum ADC channels */ |
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/* Touch screen device structure */ struct mrstouch_dev { |
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struct device *dev; /* device associated with touch screen */ |
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struct input_dev *input; char phys[32]; u16 asr; /* Address selection register */ int irq; unsigned int vendor; /* PMIC vendor */ unsigned int rev; /* PMIC revision */ int (*read_prepare)(struct mrstouch_dev *tsdev); int (*read)(struct mrstouch_dev *tsdev, u16 *x, u16 *y, u16 *z); int (*read_finish)(struct mrstouch_dev *tsdev); }; |
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/*************************** NEC and Maxim Interface ************************/ static int mrstouch_nec_adc_read_prepare(struct mrstouch_dev *tsdev) |
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{ |
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return intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0, 0x20); |
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} /* |
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* Enables PENDET interrupt. |
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*/ |
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static int mrstouch_nec_adc_read_finish(struct mrstouch_dev *tsdev) |
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{ |
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int err; |
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err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0x20, 0x20); if (!err) err = intel_scu_ipc_update_register(PMIC_REG_ADCCNTL1, 0, 0x05); |
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return err; |
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} |
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/* * Reads PMIC ADC touch screen result * Reads ADC storage registers for higher 7 and lower 3 bits and * converts the two readings into a single value and turns off gain bit |
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*/ static int mrstouch_ts_chan_read(u16 offset, u16 chan, u16 *vp, u16 *vm) { int err; u16 result; u32 res; result = PMIC_REG_ADCSNS0H + offset; if (chan == MRST_TS_CHAN12) result += 4; err = intel_scu_ipc_ioread32(result, &res); if (err) return err; /* Mash the bits up */ *vp = (res & 0xFF) << 3; /* Highest 7 bits */ *vp |= (res >> 8) & 0x07; /* Lower 3 bits */ *vp &= 0x3FF; res >>= 16; *vm = (res & 0xFF) << 3; /* Highest 7 bits */ *vm |= (res >> 8) & 0x07; /* Lower 3 bits */ *vm &= 0x3FF; return 0; } |
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/* * Enables X, Y and Z bias values * Enables YPYM for X channels and XPXM for Y channels |
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*/ |
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static int mrstouch_ts_bias_set(uint offset, uint bias) |
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{ int count; |
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u16 chan, start; u16 reg[4]; u8 data[4]; |
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chan = PMICADDR0 + offset; |
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start = MRST_TS_CHAN10; |
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for (count = 0; count <= 3; count++) { reg[count] = chan++; |
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data[count] = bias | (start + count); |
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} |
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return intel_scu_ipc_writev(reg, data, 4); |
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} |
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/* To read touch screen channel values */ static int mrstouch_nec_adc_read(struct mrstouch_dev *tsdev, u16 *x, u16 *y, u16 *z) |
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{ int err; |
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u16 xm, ym, zm; |
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/* configure Y bias for X channels */ err = mrstouch_ts_bias_set(tsdev->asr, MRST_YBIAS); if (err) goto ipc_error; |
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msleep(WAIT_ADC_COMPLETION); |
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/* read x+ and x- channels */ err = mrstouch_ts_chan_read(tsdev->asr, MRST_TS_CHAN10, x, &xm); |
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if (err) goto ipc_error; |
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/* configure x bias for y channels */ err = mrstouch_ts_bias_set(tsdev->asr, MRST_XBIAS); if (err) goto ipc_error; |
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msleep(WAIT_ADC_COMPLETION); |
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/* read y+ and y- channels */ err = mrstouch_ts_chan_read(tsdev->asr, MRST_TS_CHAN12, y, &ym); if (err) goto ipc_error; |
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/* configure z bias for x and y channels */ err = mrstouch_ts_bias_set(tsdev->asr, MRST_ZBIAS); |
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if (err) goto ipc_error; |
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msleep(WAIT_ADC_COMPLETION); /* read z+ and z- channels */ err = mrstouch_ts_chan_read(tsdev->asr, MRST_TS_CHAN10, z, &zm); if (err) goto ipc_error; |
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return 0; ipc_error: |
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dev_err(tsdev->dev, "ipc error during adc read "); |
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return err; } |
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/*************************** Freescale Interface ************************/ static int mrstouch_fs_adc_read_prepare(struct mrstouch_dev *tsdev) |
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{ int err, count; u16 chan; |
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u16 reg[5]; u8 data[5]; |
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/* Stop the ADC */ err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0x00, 0x02); if (err) goto ipc_error; |
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chan = PMICADDR0 + tsdev->asr; /* Set X BIAS */ for (count = 0; count <= 3; count++) { reg[count] = chan++; data[count] = 0x2A; } reg[count] = chan++; /* Dummy */ data[count] = 0; err = intel_scu_ipc_writev(reg, data, 5); if (err) goto ipc_error; msleep(WAIT_ADC_COMPLETION); /* Set Y BIAS */ for (count = 0; count <= 3; count++) { reg[count] = chan++; data[count] = 0x4A; } reg[count] = chan++; /* Dummy */ data[count] = 0; err = intel_scu_ipc_writev(reg, data, 5); if (err) goto ipc_error; msleep(WAIT_ADC_COMPLETION); /* Set Z BIAS */ err = intel_scu_ipc_iowrite32(chan + 2, 0x8A8A8A8A); if (err) goto ipc_error; msleep(WAIT_ADC_COMPLETION); |
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return 0; ipc_error: |
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dev_err(tsdev->dev, "ipc error during %s ", __func__); |
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return err; } static int mrstouch_fs_adc_read(struct mrstouch_dev *tsdev, u16 *x, u16 *y, u16 *z) { int err; u16 result; u16 reg[4]; u8 data[4]; result = PMIC_REG_ADCSNS0H + tsdev->asr; reg[0] = result + 4; reg[1] = result + 5; reg[2] = result + 16; reg[3] = result + 17; err = intel_scu_ipc_readv(reg, data, 4); if (err) goto ipc_error; *x = data[0] << 3; /* Higher 7 bits */ *x |= data[1] & 0x7; /* Lower 3 bits */ *x &= 0x3FF; *y = data[2] << 3; /* Higher 7 bits */ *y |= data[3] & 0x7; /* Lower 3 bits */ *y &= 0x3FF; /* Read Z value */ reg[0] = result + 28; reg[1] = result + 29; err = intel_scu_ipc_readv(reg, data, 4); if (err) goto ipc_error; *z = data[0] << 3; /* Higher 7 bits */ *z |= data[1] & 0x7; /* Lower 3 bits */ *z &= 0x3FF; return 0; ipc_error: |
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dev_err(tsdev->dev, "ipc error during %s ", __func__); |
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return err; } static int mrstouch_fs_adc_read_finish(struct mrstouch_dev *tsdev) { int err, count; u16 chan; u16 reg[5]; u8 data[5]; |
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/* Clear all TS channels */ chan = PMICADDR0 + tsdev->asr; for (count = 0; count <= 4; count++) { reg[count] = chan++; data[count] = 0; } err = intel_scu_ipc_writev(reg, data, 5); if (err) goto ipc_error; for (count = 0; count <= 4; count++) { reg[count] = chan++; data[count] = 0; } err = intel_scu_ipc_writev(reg, data, 5); if (err) goto ipc_error; err = intel_scu_ipc_iowrite32(chan + 2, 0x00000000); if (err) goto ipc_error; |
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/* Start ADC */ err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, 0x02, 0x02); if (err) goto ipc_error; |
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return 0; ipc_error: |
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dev_err(tsdev->dev, "ipc error during %s ", __func__); |
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return err; } |
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static void mrstouch_report_event(struct input_dev *input, unsigned int x, unsigned int y, unsigned int z) |
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{ |
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if (z > MRST_PRESSURE_NOMINAL) { /* Pen touched, report button touch and coordinates */ input_report_key(input, BTN_TOUCH, 1); input_report_abs(input, ABS_X, x); input_report_abs(input, ABS_Y, y); } else { input_report_key(input, BTN_TOUCH, 0); |
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} |
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input_report_abs(input, ABS_PRESSURE, z); input_sync(input); |
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} |
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/* PENDET interrupt handler */ static irqreturn_t mrstouch_pendet_irq(int irq, void *dev_id) |
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{ |
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struct mrstouch_dev *tsdev = dev_id; u16 x, y, z; |
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/* * Should we lower thread priority? Probably not, since we are * not spinning but sleeping... */ |
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if (tsdev->read_prepare(tsdev)) goto out; |
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do { if (tsdev->read(tsdev, &x, &y, &z)) break; |
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mrstouch_report_event(tsdev->input, x, y, z); } while (z > MRST_PRESSURE_NOMINAL); |
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tsdev->read_finish(tsdev); |
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out: return IRQ_HANDLED; } |
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/* Utility to read PMIC ID */ static int __devinit mrstouch_read_pmic_id(uint *vendor, uint *rev) { int err; u8 r; |
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err = intel_scu_ipc_ioread8(PMIC_REG_ID1, &r); |
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if (err) |
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return err; |
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*vendor = r & 0x7; *rev = (r >> 3) & 0x7; |
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return 0; |
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} |
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/* * Parse ADC channels to find end of the channel configured by other ADC user * NEC and MAXIM requires 4 channels and FreeScale needs 18 channels */ static int __devinit mrstouch_chan_parse(struct mrstouch_dev *tsdev) |
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{ |
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int found = 0; int err, i; |
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u8 r8; |
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for (i = 0; i < MRSTOUCH_MAX_CHANNELS; i++) { |
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err = intel_scu_ipc_ioread8(PMICADDR0 + i, &r8); |
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if (err) return err; |
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if (r8 == END_OF_CHANNEL) { found = i; break; |
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} } |
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if (tsdev->vendor == PMIC_VENDOR_FS) { |
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if (found > MRSTOUCH_MAX_CHANNELS - 18) |
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return -ENOSPC; } else { |
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if (found > MRSTOUCH_MAX_CHANNELS - 4) |
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return -ENOSPC; |
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} |
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return found; |
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} |
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/* * Writes touch screen channels to ADC address selection registers */ static int __devinit mrstouch_ts_chan_set(uint offset) |
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{ |
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u16 chan; |
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int ret, count; |
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chan = PMICADDR0 + offset; for (count = 0; count <= 3; count++) { |
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ret = intel_scu_ipc_iowrite8(chan++, MRST_TS_CHAN10 + count); if (ret) return ret; |
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} |
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return intel_scu_ipc_iowrite8(chan++, END_OF_CHANNEL); |
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} |
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/* Initialize ADC */ static int __devinit mrstouch_adc_init(struct mrstouch_dev *tsdev) |
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{ |
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int err, start; u8 ra, rm; |
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err = mrstouch_read_pmic_id(&tsdev->vendor, &tsdev->rev); if (err) { |
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dev_err(tsdev->dev, "Unable to read PMIC id "); |
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return err; |
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} |
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switch (tsdev->vendor) { case PMIC_VENDOR_NEC: case PMIC_VENDOR_MAXIM: tsdev->read_prepare = mrstouch_nec_adc_read_prepare; tsdev->read = mrstouch_nec_adc_read; tsdev->read_finish = mrstouch_nec_adc_read_finish; break; case PMIC_VENDOR_FS: tsdev->read_prepare = mrstouch_fs_adc_read_prepare; tsdev->read = mrstouch_fs_adc_read; tsdev->read_finish = mrstouch_fs_adc_read_finish; break; default: |
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dev_err(tsdev->dev, |
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"Unsupported touchscreen: %d ", tsdev->vendor); return -ENXIO; } |
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start = mrstouch_chan_parse(tsdev); if (start < 0) { |
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dev_err(tsdev->dev, "Unable to parse channels "); |
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return start; } |
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tsdev->asr = start; |
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/* * ADC power on, start, enable PENDET and set loop delay * ADC loop delay is set to 4.5 ms approximately * Loop delay more than this results in jitter in adc readings |
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* Setting loop delay to 0 (continuous loop) in MAXIM stops PENDET |
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* interrupt generation sometimes. */ |
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if (tsdev->vendor == PMIC_VENDOR_FS) { ra = 0xE0 | ADC_LOOP_DELAY0; rm = 0x5; } else { /* NEC and MAXIm not consistent with loop delay 0 */ ra = 0xE0 | ADC_LOOP_DELAY1; rm = 0x0; /* configure touch screen channels */ err = mrstouch_ts_chan_set(tsdev->asr); if (err) return err; |
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} |
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|
544 545 546 547 548 549 550 551 552 |
err = intel_scu_ipc_update_register(PMIC_REG_ADCCNTL1, ra, 0xE7); if (err) return err; err = intel_scu_ipc_update_register(PMIC_REG_MADCINT, rm, 0x03); if (err) return err; return 0; |
a4cff8b82
|
553 |
} |
95b7127c1
|
554 |
|
a4cff8b82
|
555 |
/* Probe function for touch screen driver */ |
36466a1b4
|
556 |
static int __devinit mrstouch_probe(struct platform_device *pdev) |
a4cff8b82
|
557 |
{ |
a4cff8b82
|
558 |
struct mrstouch_dev *tsdev; |
95b7127c1
|
559 560 |
struct input_dev *input; int err; |
36466a1b4
|
561 |
int irq; |
a4cff8b82
|
562 |
|
36466a1b4
|
563 564 565 566 |
irq = platform_get_irq(pdev, 0); if (irq < 0) { dev_err(&pdev->dev, "no interrupt assigned "); |
a4cff8b82
|
567 568 569 570 |
return -EINVAL; } tsdev = kzalloc(sizeof(struct mrstouch_dev), GFP_KERNEL); |
95b7127c1
|
571 572 |
input = input_allocate_device(); if (!tsdev || !input) { |
36466a1b4
|
573 574 |
dev_err(&pdev->dev, "unable to allocate memory "); |
95b7127c1
|
575 576 |
err = -ENOMEM; goto err_free_mem; |
a4cff8b82
|
577 |
} |
36466a1b4
|
578 |
tsdev->dev = &pdev->dev; |
95b7127c1
|
579 |
tsdev->input = input; |
36466a1b4
|
580 |
tsdev->irq = irq; |
95b7127c1
|
581 582 |
snprintf(tsdev->phys, sizeof(tsdev->phys), |
36466a1b4
|
583 |
"%s/input0", dev_name(tsdev->dev)); |
a4cff8b82
|
584 585 586 |
err = mrstouch_adc_init(tsdev); if (err) { |
36466a1b4
|
587 588 |
dev_err(&pdev->dev, "ADC initialization failed "); |
95b7127c1
|
589 |
goto err_free_mem; |
a4cff8b82
|
590 |
} |
95b7127c1
|
591 592 |
input->name = "mrst_touchscreen"; input->phys = tsdev->phys; |
36466a1b4
|
593 |
input->dev.parent = tsdev->dev; |
a4cff8b82
|
594 |
|
95b7127c1
|
595 596 |
input->id.vendor = tsdev->vendor; input->id.version = tsdev->rev; |
a4cff8b82
|
597 |
|
95b7127c1
|
598 599 |
input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS); input->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH); |
a4cff8b82
|
600 |
|
95b7127c1
|
601 602 603 604 605 606 607 608 609 |
input_set_abs_params(tsdev->input, ABS_X, MRST_X_MIN, MRST_X_MAX, MRST_X_FUZZ, 0); input_set_abs_params(tsdev->input, ABS_Y, MRST_Y_MIN, MRST_Y_MAX, MRST_Y_FUZZ, 0); input_set_abs_params(tsdev->input, ABS_PRESSURE, MRST_PRESSURE_MIN, MRST_PRESSURE_MAX, 0, 0); err = request_threaded_irq(tsdev->irq, NULL, mrstouch_pendet_irq, 0, "mrstouch", tsdev); |
a4cff8b82
|
610 |
if (err) { |
36466a1b4
|
611 612 |
dev_err(tsdev->dev, "unable to allocate irq "); |
95b7127c1
|
613 |
goto err_free_mem; |
a4cff8b82
|
614 |
} |
95b7127c1
|
615 616 |
err = input_register_device(tsdev->input); if (err) { |
36466a1b4
|
617 618 |
dev_err(tsdev->dev, "unable to register input device "); |
95b7127c1
|
619 |
goto err_free_irq; |
a4cff8b82
|
620 |
} |
95b7127c1
|
621 |
|
36466a1b4
|
622 |
platform_set_drvdata(pdev, tsdev); |
a4cff8b82
|
623 |
return 0; |
95b7127c1
|
624 625 626 627 628 |
err_free_irq: free_irq(tsdev->irq, tsdev); err_free_mem: input_free_device(input); |
a4cff8b82
|
629 630 631 |
kfree(tsdev); return err; } |
36466a1b4
|
632 |
static int __devexit mrstouch_remove(struct platform_device *pdev) |
a4cff8b82
|
633 |
{ |
36466a1b4
|
634 |
struct mrstouch_dev *tsdev = platform_get_drvdata(pdev); |
95b7127c1
|
635 636 637 638 |
free_irq(tsdev->irq, tsdev); input_unregister_device(tsdev->input); kfree(tsdev); |
36466a1b4
|
639 |
platform_set_drvdata(pdev, NULL); |
95b7127c1
|
640 |
|
a4cff8b82
|
641 642 |
return 0; } |
36466a1b4
|
643 |
static struct platform_driver mrstouch_driver = { |
a4cff8b82
|
644 |
.driver = { |
36466a1b4
|
645 646 |
.name = "pmic_touch", .owner = THIS_MODULE, |
a4cff8b82
|
647 |
}, |
36466a1b4
|
648 649 |
.probe = mrstouch_probe, .remove = __devexit_p(mrstouch_remove), |
a4cff8b82
|
650 |
}; |
95b7127c1
|
651 |
static int __init mrstouch_init(void) |
a4cff8b82
|
652 |
{ |
36466a1b4
|
653 |
return platform_driver_register(&mrstouch_driver); |
a4cff8b82
|
654 |
} |
95b7127c1
|
655 |
module_init(mrstouch_init); |
a4cff8b82
|
656 |
|
95b7127c1
|
657 |
static void __exit mrstouch_exit(void) |
a4cff8b82
|
658 |
{ |
36466a1b4
|
659 |
platform_driver_unregister(&mrstouch_driver); |
a4cff8b82
|
660 |
} |
95b7127c1
|
661 |
module_exit(mrstouch_exit); |
a4cff8b82
|
662 663 664 665 |
MODULE_AUTHOR("Sreedhara Murthy. D.S, sreedhara.ds@intel.com"); MODULE_DESCRIPTION("Intel Moorestown Resistive Touch Screen Driver"); MODULE_LICENSE("GPL"); |