Blame view

drivers/watchdog/at91sam9_wdt.c 7.7 KB
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
  /*
   * Watchdog driver for Atmel AT91SAM9x processors.
   *
   * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
   *
   * This program is free software; you can redistribute it and/or
   * modify it under the terms of the GNU General Public License
   * as published by the Free Software Foundation; either version
   * 2 of the License, or (at your option) any later version.
   */
  
  /*
   * The Watchdog Timer Mode Register can be only written to once. If the
   * timeout need to be set from Linux, be sure that the bootstrap or the
   * bootloader doesn't write to this register.
   */
  
  #include <linux/errno.h>
  #include <linux/fs.h>
  #include <linux/init.h>
2af29b786   Andrew Victor   [ARM] 5390/1: AT9...
21
  #include <linux/io.h>
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
22
23
24
25
26
27
28
29
30
31
32
  #include <linux/kernel.h>
  #include <linux/miscdevice.h>
  #include <linux/module.h>
  #include <linux/moduleparam.h>
  #include <linux/platform_device.h>
  #include <linux/types.h>
  #include <linux/watchdog.h>
  #include <linux/jiffies.h>
  #include <linux/timer.h>
  #include <linux/bitops.h>
  #include <linux/uaccess.h>
e7b39145b   Jean-Christophe Plagniol-Villard   watchdog: at91sam...
33
  #include "at91sam9_wdt.h"
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
34
35
  
  #define DRV_NAME "AT91SAM9 Watchdog"
c1c30a29d   Jean-Christophe PLAGNIOL-VILLARD   ARM: at91: make w...
36
37
38
39
  #define wdt_read(field) \
  	__raw_readl(at91wdt_private.base + field)
  #define wdt_write(field, val) \
  	__raw_writel((val), at91wdt_private.base + field)
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
  /* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
   * use this to convert a watchdog
   * value from/to milliseconds.
   */
  #define ms_to_ticks(t)	(((t << 8) / 1000) - 1)
  #define ticks_to_ms(t)	(((t + 1) * 1000) >> 8)
  
  /* Hardware timeout in seconds */
  #define WDT_HW_TIMEOUT 2
  
  /* Timer heartbeat (500ms) */
  #define WDT_TIMEOUT	(HZ/2)
  
  /* User land timeout */
  #define WDT_HEARTBEAT 15
  static int heartbeat = WDT_HEARTBEAT;
  module_param(heartbeat, int, 0);
  MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
  	"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
  
  static int nowayout = WATCHDOG_NOWAYOUT;
  module_param(nowayout, int, 0);
  MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  
  static void at91_ping(unsigned long data);
  
  static struct {
c1c30a29d   Jean-Christophe PLAGNIOL-VILLARD   ARM: at91: make w...
68
  	void __iomem *base;
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
69
70
71
72
73
74
75
76
77
78
79
80
81
82
  	unsigned long next_heartbeat;	/* the next_heartbeat for the timer */
  	unsigned long open;
  	char expect_close;
  	struct timer_list timer;	/* The timer that pings the watchdog */
  } at91wdt_private;
  
  /* ......................................................................... */
  
  
  /*
   * Reload the watchdog timer.  (ie, pat the watchdog)
   */
  static inline void at91_wdt_reset(void)
  {
c1c30a29d   Jean-Christophe PLAGNIOL-VILLARD   ARM: at91: make w...
83
  	wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
  }
  
  /*
   * Timer tick
   */
  static void at91_ping(unsigned long data)
  {
  	if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
  			(!nowayout && !at91wdt_private.open)) {
  		at91_wdt_reset();
  		mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
  	} else
  		printk(KERN_CRIT DRV_NAME": I will reset your machine !
  ");
  }
  
  /*
   * Watchdog device is opened, and watchdog starts running.
   */
  static int at91_wdt_open(struct inode *inode, struct file *file)
  {
  	if (test_and_set_bit(0, &at91wdt_private.open))
  		return -EBUSY;
  
  	at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
  	mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
  
  	return nonseekable_open(inode, file);
  }
  
  /*
   * Close the watchdog device.
   */
  static int at91_wdt_close(struct inode *inode, struct file *file)
  {
  	clear_bit(0, &at91wdt_private.open);
  
  	/* stop internal ping */
  	if (!at91wdt_private.expect_close)
  		del_timer(&at91wdt_private.timer);
  
  	at91wdt_private.expect_close = 0;
  	return 0;
  }
  
  /*
   * Set the watchdog time interval in 1/256Hz (write-once)
   * Counter is 12 bit.
   */
  static int at91_wdt_settimeout(unsigned int timeout)
  {
  	unsigned int reg;
  	unsigned int mr;
  
  	/* Check if disabled */
c1c30a29d   Jean-Christophe PLAGNIOL-VILLARD   ARM: at91: make w...
139
  	mr = wdt_read(AT91_WDT_MR);
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
  	if (mr & AT91_WDT_WDDIS) {
  		printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled
  ");
  		return -EIO;
  	}
  
  	/*
  	 * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
  	 *
  	 * Since WDV is a 12-bit counter, the maximum period is
  	 * 4096 / 256 = 16 seconds.
  	 */
  	reg = AT91_WDT_WDRSTEN	/* causes watchdog reset */
  		/* | AT91_WDT_WDRPROC	causes processor reset only */
  		| AT91_WDT_WDDBGHLT	/* disabled in debug mode */
  		| AT91_WDT_WDD		/* restart at any time */
  		| (timeout & AT91_WDT_WDV);  /* timer value */
c1c30a29d   Jean-Christophe PLAGNIOL-VILLARD   ARM: at91: make w...
157
  	wdt_write(AT91_WDT_MR, reg);
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
158
159
160
161
162
163
  
  	return 0;
  }
  
  static const struct watchdog_info at91_wdt_info = {
  	.identity	= DRV_NAME,
e73a78027   Wim Van Sebroeck   [WATCHDOG] Correc...
164
165
  	.options	= WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
  						WDIOF_MAGICCLOSE,
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
  };
  
  /*
   * Handle commands from user-space.
   */
  static long at91_wdt_ioctl(struct file *file,
  		unsigned int cmd, unsigned long arg)
  {
  	void __user *argp = (void __user *)arg;
  	int __user *p = argp;
  	int new_value;
  
  	switch (cmd) {
  	case WDIOC_GETSUPPORT:
  		return copy_to_user(argp, &at91_wdt_info,
  				    sizeof(at91_wdt_info)) ? -EFAULT : 0;
  
  	case WDIOC_GETSTATUS:
  	case WDIOC_GETBOOTSTATUS:
  		return put_user(0, p);
  
  	case WDIOC_KEEPALIVE:
  		at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
  		return 0;
  
  	case WDIOC_SETTIMEOUT:
  		if (get_user(new_value, p))
  			return -EFAULT;
  
  		heartbeat = new_value;
  		at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
  
  		return put_user(new_value, p);  /* return current value */
  
  	case WDIOC_GETTIMEOUT:
  		return put_user(heartbeat, p);
  	}
  	return -ENOTTY;
  }
  
  /*
   * Pat the watchdog whenever device is written to.
   */
  static ssize_t at91_wdt_write(struct file *file, const char *data, size_t len,
143a2e54b   Wim Van Sebroeck   [WATCHDOG] More c...
210
  								loff_t *ppos)
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
  {
  	if (!len)
  		return 0;
  
  	/* Scan for magic character */
  	if (!nowayout) {
  		size_t i;
  
  		at91wdt_private.expect_close = 0;
  
  		for (i = 0; i < len; i++) {
  			char c;
  			if (get_user(c, data + i))
  				return -EFAULT;
  			if (c == 'V') {
  				at91wdt_private.expect_close = 42;
  				break;
  			}
  		}
  	}
  
  	at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
  
  	return len;
  }
  
  /* ......................................................................... */
  
  static const struct file_operations at91wdt_fops = {
  	.owner			= THIS_MODULE,
  	.llseek			= no_llseek,
  	.unlocked_ioctl	= at91_wdt_ioctl,
  	.open			= at91_wdt_open,
  	.release		= at91_wdt_close,
  	.write			= at91_wdt_write,
  };
  
  static struct miscdevice at91wdt_miscdev = {
  	.minor		= WATCHDOG_MINOR,
  	.name		= "watchdog",
  	.fops		= &at91wdt_fops,
  };
  
  static int __init at91wdt_probe(struct platform_device *pdev)
  {
c1c30a29d   Jean-Christophe PLAGNIOL-VILLARD   ARM: at91: make w...
256
  	struct resource	*r;
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
257
258
259
260
261
  	int res;
  
  	if (at91wdt_miscdev.parent)
  		return -EBUSY;
  	at91wdt_miscdev.parent = &pdev->dev;
c1c30a29d   Jean-Christophe PLAGNIOL-VILLARD   ARM: at91: make w...
262
263
264
265
266
267
268
269
270
  	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  	if (!r)
  		return -ENODEV;
  	at91wdt_private.base = ioremap(r->start, resource_size(r));
  	if (!at91wdt_private.base) {
  		dev_err(&pdev->dev, "failed to map registers, aborting.
  ");
  		return -ENOMEM;
  	}
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
  	/* Set watchdog */
  	res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
  	if (res)
  		return res;
  
  	res = misc_register(&at91wdt_miscdev);
  	if (res)
  		return res;
  
  	at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
  	setup_timer(&at91wdt_private.timer, at91_ping, 0);
  	mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
  
  	printk(KERN_INFO DRV_NAME " enabled (heartbeat=%d sec, nowayout=%d)
  ",
  		heartbeat, nowayout);
  
  	return 0;
  }
  
  static int __exit at91wdt_remove(struct platform_device *pdev)
  {
  	int res;
  
  	res = misc_deregister(&at91wdt_miscdev);
  	if (!res)
  		at91wdt_miscdev.parent = NULL;
  
  	return res;
  }
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
301
302
  static struct platform_driver at91wdt_driver = {
  	.remove		= __exit_p(at91wdt_remove),
e6bb42e3d   Renaud CERRATO   [WATCHDOG] Add AT...
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
  	.driver		= {
  		.name	= "at91_wdt",
  		.owner	= THIS_MODULE,
  	},
  };
  
  static int __init at91sam_wdt_init(void)
  {
  	return platform_driver_probe(&at91wdt_driver, at91wdt_probe);
  }
  
  static void __exit at91sam_wdt_exit(void)
  {
  	platform_driver_unregister(&at91wdt_driver);
  }
  
  module_init(at91sam_wdt_init);
  module_exit(at91sam_wdt_exit);
  
  MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
  MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
  MODULE_LICENSE("GPL");
  MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);