Blame view
drivers/watchdog/iop_wdt.c
5.96 KB
70c14ff0e [ARM] 4495/1: iop... |
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 |
/* * drivers/char/watchdog/iop_wdt.c * * WDT driver for Intel I/O Processors * Copyright (C) 2005, Intel Corporation. * * Based on ixp4xx driver, Copyright 2004 (c) MontaVista, Software, Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. * * This program is distributed in the hope it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program; if not, write to the Free Software Foundation, Inc., 59 Temple * Place - Suite 330, Boston, MA 02111-1307 USA. * * Curt E Bruns <curt.e.bruns@intel.com> * Peter Milne <peter.milne@d-tacq.com> * Dan Williams <dan.j.williams@intel.com> */ #include <linux/module.h> #include <linux/kernel.h> #include <linux/fs.h> #include <linux/init.h> #include <linux/device.h> #include <linux/miscdevice.h> #include <linux/watchdog.h> #include <linux/uaccess.h> |
a09e64fbc [ARM] Move includ... |
35 |
#include <mach/hardware.h> |
70c14ff0e [ARM] 4495/1: iop... |
36 37 38 39 |
static int nowayout = WATCHDOG_NOWAYOUT; static unsigned long wdt_status; static unsigned long boot_status; |
1334f3293 watchdog: Use DEF... |
40 |
static DEFINE_SPINLOCK(wdt_lock); |
70c14ff0e [ARM] 4495/1: iop... |
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 |
#define WDT_IN_USE 0 #define WDT_OK_TO_CLOSE 1 #define WDT_ENABLED 2 static unsigned long iop_watchdog_timeout(void) { return (0xffffffffUL / get_iop_tick_rate()); } /** * wdt_supports_disable - determine if we are accessing a iop13xx watchdog * or iop3xx by whether it has a disable command */ static int wdt_supports_disable(void) { int can_disable; if (IOP_WDTCR_EN_ARM != IOP_WDTCR_DIS_ARM) can_disable = 1; else can_disable = 0; return can_disable; } static void wdt_enable(void) { /* Arm and enable the Timer to starting counting down from 0xFFFF.FFFF * Takes approx. 10.7s to timeout */ |
02e3814e1 [WATCHDOG 16/57] ... |
72 |
spin_lock(&wdt_lock); |
70c14ff0e [ARM] 4495/1: iop... |
73 74 |
write_wdtcr(IOP_WDTCR_EN_ARM); write_wdtcr(IOP_WDTCR_EN); |
02e3814e1 [WATCHDOG 16/57] ... |
75 |
spin_unlock(&wdt_lock); |
70c14ff0e [ARM] 4495/1: iop... |
76 77 78 79 80 81 82 |
} /* returns 0 if the timer was successfully disabled */ static int wdt_disable(void) { /* Stop Counting */ if (wdt_supports_disable()) { |
02e3814e1 [WATCHDOG 16/57] ... |
83 |
spin_lock(&wdt_lock); |
70c14ff0e [ARM] 4495/1: iop... |
84 85 86 |
write_wdtcr(IOP_WDTCR_DIS_ARM); write_wdtcr(IOP_WDTCR_DIS); clear_bit(WDT_ENABLED, &wdt_status); |
02e3814e1 [WATCHDOG 16/57] ... |
87 |
spin_unlock(&wdt_lock); |
70c14ff0e [ARM] 4495/1: iop... |
88 89 90 91 92 93 94 95 96 97 98 99 100 |
printk(KERN_INFO "WATCHDOG: Disabled "); return 0; } else return 1; } static int iop_wdt_open(struct inode *inode, struct file *file) { if (test_and_set_bit(WDT_IN_USE, &wdt_status)) return -EBUSY; clear_bit(WDT_OK_TO_CLOSE, &wdt_status); |
70c14ff0e [ARM] 4495/1: iop... |
101 |
wdt_enable(); |
70c14ff0e [ARM] 4495/1: iop... |
102 |
set_bit(WDT_ENABLED, &wdt_status); |
70c14ff0e [ARM] 4495/1: iop... |
103 104 |
return nonseekable_open(inode, file); } |
02e3814e1 [WATCHDOG 16/57] ... |
105 |
static ssize_t iop_wdt_write(struct file *file, const char *data, size_t len, |
70c14ff0e [ARM] 4495/1: iop... |
106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 |
loff_t *ppos) { if (len) { if (!nowayout) { size_t i; clear_bit(WDT_OK_TO_CLOSE, &wdt_status); for (i = 0; i != len; i++) { char c; if (get_user(c, data + i)) return -EFAULT; if (c == 'V') set_bit(WDT_OK_TO_CLOSE, &wdt_status); } } wdt_enable(); } |
70c14ff0e [ARM] 4495/1: iop... |
125 126 |
return len; } |
02e3814e1 [WATCHDOG 16/57] ... |
127 |
static const struct watchdog_info ident = { |
70c14ff0e [ARM] 4495/1: iop... |
128 129 130 |
.options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING, .identity = "iop watchdog", }; |
02e3814e1 [WATCHDOG 16/57] ... |
131 132 |
static long iop_wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
70c14ff0e [ARM] 4495/1: iop... |
133 134 135 |
{ int options; int ret = -ENOTTY; |
02e3814e1 [WATCHDOG 16/57] ... |
136 |
int __user *argp = (int __user *)arg; |
70c14ff0e [ARM] 4495/1: iop... |
137 138 139 |
switch (cmd) { case WDIOC_GETSUPPORT: |
e04ab9587 [WATCHDOG] sizeof... |
140 |
if (copy_to_user(argp, &ident, sizeof(ident))) |
70c14ff0e [ARM] 4495/1: iop... |
141 142 143 144 145 146 |
ret = -EFAULT; else ret = 0; break; case WDIOC_GETSTATUS: |
02e3814e1 [WATCHDOG 16/57] ... |
147 |
ret = put_user(0, argp); |
70c14ff0e [ARM] 4495/1: iop... |
148 149 150 |
break; case WDIOC_GETBOOTSTATUS: |
02e3814e1 [WATCHDOG 16/57] ... |
151 |
ret = put_user(boot_status, argp); |
70c14ff0e [ARM] 4495/1: iop... |
152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 |
break; case WDIOC_SETOPTIONS: if (get_user(options, (int *)arg)) return -EFAULT; if (options & WDIOS_DISABLECARD) { if (!nowayout) { if (wdt_disable() == 0) { set_bit(WDT_OK_TO_CLOSE, &wdt_status); ret = 0; } else ret = -ENXIO; } else ret = 0; } |
70c14ff0e [ARM] 4495/1: iop... |
168 169 170 171 172 |
if (options & WDIOS_ENABLECARD) { wdt_enable(); ret = 0; } break; |
70c14ff0e [ARM] 4495/1: iop... |
173 |
|
0c06090c9 [WATCHDOG] Coding... |
174 175 176 177 178 179 180 181 |
case WDIOC_KEEPALIVE: wdt_enable(); ret = 0; break; case WDIOC_GETTIMEOUT: ret = put_user(iop_watchdog_timeout(), argp); break; |
70c14ff0e [ARM] 4495/1: iop... |
182 |
} |
70c14ff0e [ARM] 4495/1: iop... |
183 184 185 186 187 188 189 190 191 |
return ret; } static int iop_wdt_release(struct inode *inode, struct file *file) { int state = 1; if (test_bit(WDT_OK_TO_CLOSE, &wdt_status)) if (test_bit(WDT_ENABLED, &wdt_status)) state = wdt_disable(); |
4b512d26f trivial: typo (en... |
192 |
/* if the timer is not disabled reload and notify that we are still |
70c14ff0e [ARM] 4495/1: iop... |
193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 |
* going down */ if (state != 0) { wdt_enable(); printk(KERN_CRIT "WATCHDOG: Device closed unexpectedly - " "reset in %lu seconds ", iop_watchdog_timeout()); } clear_bit(WDT_IN_USE, &wdt_status); clear_bit(WDT_OK_TO_CLOSE, &wdt_status); return 0; } static const struct file_operations iop_wdt_fops = { .owner = THIS_MODULE, .llseek = no_llseek, .write = iop_wdt_write, |
02e3814e1 [WATCHDOG 16/57] ... |
212 |
.unlocked_ioctl = iop_wdt_ioctl, |
70c14ff0e [ARM] 4495/1: iop... |
213 214 215 216 217 218 219 220 221 222 223 224 225 |
.open = iop_wdt_open, .release = iop_wdt_release, }; static struct miscdevice iop_wdt_miscdev = { .minor = WATCHDOG_MINOR, .name = "watchdog", .fops = &iop_wdt_fops, }; static int __init iop_wdt_init(void) { int ret; |
70c14ff0e [ARM] 4495/1: iop... |
226 227 228 229 230 231 232 |
/* check if the reset was caused by the watchdog timer */ boot_status = (read_rcsr() & IOP_RCSR_WDT) ? WDIOF_CARDRESET : 0; /* Configure Watchdog Timeout to cause an Internal Bus (IB) Reset * NOTE: An IB Reset will Reset both cores in the IOP342 */ write_wdtsr(IOP13XX_WDTCR_IB_RESET); |
02e3814e1 [WATCHDOG 16/57] ... |
233 234 235 236 |
/* Register after we have the device set up so we cannot race with an open */ ret = misc_register(&iop_wdt_miscdev); if (ret == 0) |
7944d3a5a [WATCHDOG] more c... |
237 238 |
printk(KERN_INFO "iop watchdog timer: timeout %lu sec ", |
02e3814e1 [WATCHDOG 16/57] ... |
239 |
iop_watchdog_timeout()); |
70c14ff0e [ARM] 4495/1: iop... |
240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 |
return ret; } static void __exit iop_wdt_exit(void) { misc_deregister(&iop_wdt_miscdev); } module_init(iop_wdt_init); module_exit(iop_wdt_exit); module_param(nowayout, int, 0); MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started"); MODULE_AUTHOR("Curt E Bruns <curt.e.bruns@intel.com>"); MODULE_DESCRIPTION("iop watchdog timer driver"); MODULE_LICENSE("GPL"); MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |