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drivers/cpufreq/longhaul.c
25.9 KB
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/* |
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* (C) 2001-2004 Dave Jones. <davej@redhat.com> |
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* (C) 2002 Padraig Brady. <padraig@antefacto.com> * * Licensed under the terms of the GNU GPL License version 2. * Based upon datasheets & sample CPUs kindly provided by VIA. * * VIA have currently 3 different versions of Longhaul. * Version 1 (Longhaul) uses the BCR2 MSR at 0x1147. * It is present only in Samuel 1 (C5A), Samuel 2 (C5B) stepping 0. |
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* Version 2 of longhaul is backward compatible with v1, but adds * LONGHAUL MSR for purpose of both frequency and voltage scaling. * Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C). |
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* Version 3 of longhaul got renamed to Powersaver and redesigned |
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* to use only the POWERSAVER MSR at 0x110a. |
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* It is present in Ezra-T (C5M), Nehemiah (C5X) and above. * It's pretty much the same feature wise to longhaul v2, though * there is provision for scaling FSB too, but this doesn't work * too well in practice so we don't even try to use this. * * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous* */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/moduleparam.h> #include <linux/init.h> #include <linux/cpufreq.h> |
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#include <linux/pci.h> |
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#include <linux/slab.h> #include <linux/string.h> |
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#include <linux/delay.h> |
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#include <linux/timex.h> #include <linux/io.h> #include <linux/acpi.h> |
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#include <asm/msr.h> |
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#include <acpi/processor.h> |
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#include "longhaul.h" #define PFX "longhaul: " #define TYPE_LONGHAUL_V1 1 #define TYPE_LONGHAUL_V2 2 #define TYPE_POWERSAVER 3 #define CPU_SAMUEL 1 #define CPU_SAMUEL2 2 #define CPU_EZRA 3 #define CPU_EZRA_T 4 #define CPU_NEHEMIAH 5 |
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#define CPU_NEHEMIAH_C 6 |
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|
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/* Flags */ #define USE_ACPI_C3 (1 << 1) #define USE_NORTHBRIDGE (1 << 2) |
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static int cpu_model; |
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static unsigned int numscales = 16; |
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static unsigned int fsb; |
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|
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static const struct mV_pos *vrm_mV_table; static const unsigned char *mV_vrm_table; |
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static unsigned int highest_speed, lowest_speed; /* kHz */ |
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static unsigned int minmult, maxmult; static int can_scale_voltage; |
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static struct acpi_processor *pr; static struct acpi_processor_cx *cx; |
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static u32 acpi_regs_addr; |
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static u8 longhaul_flags; |
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static unsigned int longhaul_index; |
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/* Module parameters */ |
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static int scale_voltage; |
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static int disable_acpi_c3; |
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static int revid_errata; |
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/* Clock ratios multiplied by 10 */ |
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static int mults[32]; static int eblcr[32]; |
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static int longhaul_version; static struct cpufreq_frequency_table *longhaul_table; |
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static char speedbuffer[8]; static char *print_speed(int speed) { |
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if (speed < 1000) { |
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snprintf(speedbuffer, sizeof(speedbuffer), "%dMHz", speed); |
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return speedbuffer; } if (speed%1000 == 0) snprintf(speedbuffer, sizeof(speedbuffer), "%dGHz", speed/1000); else snprintf(speedbuffer, sizeof(speedbuffer), "%d.%dGHz", speed/1000, (speed%1000)/100); |
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return speedbuffer; } |
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static unsigned int calc_speed(int mult) { int khz; khz = (mult/10)*fsb; if (mult%10) khz += fsb/2; khz *= 1000; return khz; } static int longhaul_get_cpu_mult(void) { |
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unsigned long invalue = 0, lo, hi; |
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|
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rdmsr(MSR_IA32_EBL_CR_POWERON, lo, hi); invalue = (lo & (1<<22|1<<23|1<<24|1<<25))>>22; if (longhaul_version == TYPE_LONGHAUL_V2 || longhaul_version == TYPE_POWERSAVER) { |
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if (lo & (1<<27)) |
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invalue += 16; |
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} |
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return eblcr[invalue]; |
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} |
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/* For processor with BCR2 MSR */ |
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|
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static void do_longhaul1(unsigned int mults_index) |
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{ |
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union msr_bcr2 bcr2; |
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|
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rdmsrl(MSR_VIA_BCR2, bcr2.val); /* Enable software clock multiplier */ bcr2.bits.ESOFTBF = 1; |
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bcr2.bits.CLOCKMUL = mults_index & 0xff; |
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|
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/* Sync to timer tick */ safe_halt(); |
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/* Change frequency on next halt or sleep */ wrmsrl(MSR_VIA_BCR2, bcr2.val); |
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/* Invoke transition */ ACPI_FLUSH_CPU_CACHE(); halt(); |
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/* Disable software clock multiplier */ local_irq_disable(); rdmsrl(MSR_VIA_BCR2, bcr2.val); bcr2.bits.ESOFTBF = 0; wrmsrl(MSR_VIA_BCR2, bcr2.val); } |
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/* For processor with Longhaul MSR */ |
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static void do_powersaver(int cx_address, unsigned int mults_index, |
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unsigned int dir) |
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{ union msr_longhaul longhaul; u32 t; |
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|
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rdmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
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/* Setup new frequency */ |
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if (!revid_errata) longhaul.bits.RevisionKey = longhaul.bits.RevisionID; else longhaul.bits.RevisionKey = 0; |
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longhaul.bits.SoftBusRatio = mults_index & 0xf; longhaul.bits.SoftBusRatio4 = (mults_index & 0x10) >> 4; |
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/* Setup new voltage */ if (can_scale_voltage) |
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longhaul.bits.SoftVID = (mults_index >> 8) & 0x1f; |
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/* Sync to timer tick */ safe_halt(); /* Raise voltage if necessary */ |
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if (can_scale_voltage && dir) { |
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longhaul.bits.EnableSoftVID = 1; |
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wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); /* Change voltage */ if (!cx_address) { ACPI_FLUSH_CPU_CACHE(); halt(); } else { ACPI_FLUSH_CPU_CACHE(); /* Invoke C3 */ inb(cx_address); /* Dummy op - must do something useless after P_LVL3 * read */ |
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t = inl(acpi_gbl_FADT.xpm_timer_block.address); |
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} longhaul.bits.EnableSoftVID = 0; wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
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} |
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/* Change frequency on next halt or sleep */ |
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longhaul.bits.EnableSoftBusRatio = 1; |
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wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
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if (!cx_address) { |
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ACPI_FLUSH_CPU_CACHE(); |
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halt(); } else { ACPI_FLUSH_CPU_CACHE(); /* Invoke C3 */ inb(cx_address); /* Dummy op - must do something useless after P_LVL3 read */ |
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t = inl(acpi_gbl_FADT.xpm_timer_block.address); |
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} |
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/* Disable bus ratio bit */ |
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longhaul.bits.EnableSoftBusRatio = 0; |
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wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
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/* Reduce voltage if necessary */ |
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if (can_scale_voltage && !dir) { |
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longhaul.bits.EnableSoftVID = 1; wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); /* Change voltage */ if (!cx_address) { ACPI_FLUSH_CPU_CACHE(); halt(); } else { ACPI_FLUSH_CPU_CACHE(); /* Invoke C3 */ inb(cx_address); /* Dummy op - must do something useless after P_LVL3 * read */ |
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t = inl(acpi_gbl_FADT.xpm_timer_block.address); |
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} longhaul.bits.EnableSoftVID = 0; wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
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} |
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} /** * longhaul_set_cpu_frequency() |
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* @mults_index : bitpattern of the new multiplier. |
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* * Sets a new clock ratio. */ |
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static void longhaul_setstate(unsigned int table_index) |
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{ |
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unsigned int mults_index; |
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int speed, mult; struct cpufreq_freqs freqs; |
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unsigned long flags; unsigned int pic1_mask, pic2_mask; |
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u16 bm_status = 0; |
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u32 bm_timeout = 1000; |
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unsigned int dir = 0; |
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|
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mults_index = longhaul_table[table_index].index; |
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/* Safety precautions */ |
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mult = mults[mults_index & 0x1f]; |
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if (mult == -1) return; |
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speed = calc_speed(mult); if ((speed > highest_speed) || (speed < lowest_speed)) return; |
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/* Voltage transition before frequency transition? */ if (can_scale_voltage && longhaul_index < table_index) dir = 1; |
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freqs.old = calc_speed(longhaul_get_cpu_mult()); freqs.new = speed; freqs.cpu = 0; /* longhaul.c is UP only driver */ cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); |
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pr_debug("Setting to FSB:%dMHz Mult:%d.%dx (%s) ", |
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fsb, mult/10, mult%10, print_speed(speed/1000)); |
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retry_loop: |
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preempt_disable(); local_irq_save(flags); pic2_mask = inb(0xA1); pic1_mask = inb(0x21); /* works on C3. save mask. */ |
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outb(0xFF, 0xA1); /* Overkill */ outb(0xFE, 0x21); /* TMR0 only */ |
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|
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/* Wait while PCI bus is busy. */ |
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if (acpi_regs_addr && (longhaul_flags & USE_NORTHBRIDGE || ((pr != NULL) && pr->flags.bm_control))) { bm_status = inw(acpi_regs_addr); |
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bm_status &= 1 << 4; |
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while (bm_status && bm_timeout) { |
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outw(1 << 4, acpi_regs_addr); |
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bm_timeout--; |
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bm_status = inw(acpi_regs_addr); |
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bm_status &= 1 << 4; |
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} } |
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if (longhaul_flags & USE_NORTHBRIDGE) { /* Disable AGP and PCI arbiters */ outb(3, 0x22); } else if ((pr != NULL) && pr->flags.bm_control) { |
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/* Disable bus master arbitration */ |
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acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); |
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} |
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switch (longhaul_version) { /* * Longhaul v1. (Samuel[C5A] and Samuel2 stepping 0[C5B]) * Software controlled multipliers only. |
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*/ case TYPE_LONGHAUL_V1: |
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do_longhaul1(mults_index); |
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break; /* |
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* Longhaul v2 appears in Samuel2 Steppings 1->7 [C5B] and Ezra [C5C] * |
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* Longhaul v3 (aka Powersaver). (Ezra-T [C5M] & Nehemiah [C5N]) |
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* Nehemiah can do FSB scaling too, but this has never been proven * to work in practice. */ |
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case TYPE_LONGHAUL_V2: |
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case TYPE_POWERSAVER: |
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if (longhaul_flags & USE_ACPI_C3) { /* Don't allow wakeup */ |
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acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 0); |
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do_powersaver(cx->address, mults_index, dir); |
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} else { |
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do_powersaver(0, mults_index, dir); |
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} |
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break; } |
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if (longhaul_flags & USE_NORTHBRIDGE) { /* Enable arbiters */ outb(0, 0x22); } else if ((pr != NULL) && pr->flags.bm_control) { |
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/* Enable bus master arbitration */ |
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acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); |
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} |
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outb(pic2_mask, 0xA1); /* restore mask */ outb(pic1_mask, 0x21); |
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local_irq_restore(flags); preempt_enable(); |
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freqs.new = calc_speed(longhaul_get_cpu_mult()); |
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/* Check if requested frequency is set. */ if (unlikely(freqs.new != speed)) { printk(KERN_INFO PFX "Failed to set requested frequency! "); /* Revision ID = 1 but processor is expecting revision key * equal to 0. Jumpers at the bottom of processor will change * multiplier and FSB, but will not change bits in Longhaul * MSR nor enable voltage scaling. */ if (!revid_errata) { printk(KERN_INFO PFX "Enabling \"Ignore Revision ID\" " "option. "); revid_errata = 1; msleep(200); goto retry_loop; } /* Why ACPI C3 sometimes doesn't work is a mystery for me. * But it does happen. Processor is entering ACPI C3 state, * but it doesn't change frequency. I tried poking various * bits in northbridge registers, but without success. */ if (longhaul_flags & USE_ACPI_C3) { printk(KERN_INFO PFX "Disabling ACPI C3 support. "); longhaul_flags &= ~USE_ACPI_C3; if (revid_errata) { printk(KERN_INFO PFX "Disabling \"Ignore " "Revision ID\" option. "); revid_errata = 0; } msleep(200); goto retry_loop; } /* This shouldn't happen. Longhaul ver. 2 was reported not * working on processors without voltage scaling, but with * RevID = 1. RevID errata will make things right. Just * to be 100% sure. */ if (longhaul_version == TYPE_LONGHAUL_V2) { printk(KERN_INFO PFX "Switching to Longhaul ver. 1 "); longhaul_version = TYPE_LONGHAUL_V1; msleep(200); goto retry_loop; } } /* Report true CPU frequency */ |
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
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if (!bm_timeout) |
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printk(KERN_INFO PFX "Warning: Timeout while waiting for " "idle PCI bus. "); |
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} /* * Centaur decided to make life a little more tricky. * Only longhaul v1 is allowed to read EBLCR BSEL[0:1]. * Samuel2 and above have to try and guess what the FSB is. * We do this by assuming we booted at maximum multiplier, and interpolate * between that value multiplied by possible FSBs and cpu_mhz which * was calculated at boot time. Really ugly, but no other way to do this. */ #define ROUNDING 0xf |
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static int guess_fsb(int mult) |
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{ |
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int speed = cpu_khz / 1000; |
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int i; |
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int speeds[] = { 666, 1000, 1333, 2000 }; int f_max, f_min; for (i = 0; i < 4; i++) { f_max = ((speeds[i] * mult) + 50) / 100; f_max += (ROUNDING / 2); f_min = f_max - ROUNDING; if ((speed <= f_max) && (speed >= f_min)) return speeds[i] / 10; |
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} return 0; } |
2530573e4 [CPUFREQ] Fix sec... |
419 |
static int __cpuinit longhaul_get_ranges(void) |
1da177e4c Linux-2.6.12-rc2 |
420 |
{ |
73e107d4a [CPUFREQ] Longhau... |
421 422 |
unsigned int i, j, k = 0; unsigned int ratio; |
980342a7e [CPUFREQ] Longhau... |
423 |
int mult; |
1da177e4c Linux-2.6.12-rc2 |
424 |
|
980342a7e [CPUFREQ] Longhau... |
425 426 427 428 429 430 431 432 433 434 435 436 437 438 |
/* Get current frequency */ mult = longhaul_get_cpu_mult(); if (mult == -1) { printk(KERN_INFO PFX "Invalid (reserved) multiplier! "); return -EINVAL; } fsb = guess_fsb(mult); if (fsb == 0) { printk(KERN_INFO PFX "Invalid (reserved) FSB! "); return -EINVAL; } /* Get max multiplier - as we always did. |
0d2eb44f6 x86: Fix common m... |
439 |
* Longhaul MSR is useful only when voltage scaling is enabled. |
980342a7e [CPUFREQ] Longhau... |
440 441 442 |
* C3 is booting at max anyway. */ maxmult = mult; /* Get min multiplier */ |
9addf3b63 [CPUFREQ] Longhau... |
443 444 445 |
switch (cpu_model) { case CPU_NEHEMIAH: minmult = 50; |
1da177e4c Linux-2.6.12-rc2 |
446 |
break; |
9addf3b63 [CPUFREQ] Longhau... |
447 448 449 450 451 |
case CPU_NEHEMIAH_C: minmult = 40; break; default: minmult = 30; |
980342a7e [CPUFREQ] Longhau... |
452 |
break; |
1da177e4c Linux-2.6.12-rc2 |
453 |
} |
2d06d8c49 [CPUFREQ] use dyn... |
454 455 |
pr_debug("MinMult:%d.%dx MaxMult:%d.%dx ", |
1da177e4c Linux-2.6.12-rc2 |
456 |
minmult/10, minmult%10, maxmult/10, maxmult%10); |
1da177e4c Linux-2.6.12-rc2 |
457 458 |
highest_speed = calc_speed(maxmult); lowest_speed = calc_speed(minmult); |
2d06d8c49 [CPUFREQ] use dyn... |
459 460 |
pr_debug("FSB:%dMHz Lowest speed: %s Highest speed:%s ", fsb, |
cee324b14 ACPICA: use new A... |
461 |
print_speed(lowest_speed/1000), |
1da177e4c Linux-2.6.12-rc2 |
462 463 464 |
print_speed(highest_speed/1000)); if (lowest_speed == highest_speed) { |
ac617bd0f [CPUFREQ] checkpa... |
465 466 |
printk(KERN_INFO PFX "highestspeed == lowest, aborting. "); |
1da177e4c Linux-2.6.12-rc2 |
467 468 469 |
return -EINVAL; } if (lowest_speed > highest_speed) { |
ac617bd0f [CPUFREQ] checkpa... |
470 471 |
printk(KERN_INFO PFX "nonsense! lowest (%d > %d) ! ", |
1da177e4c Linux-2.6.12-rc2 |
472 473 474 |
lowest_speed, highest_speed); return -EINVAL; } |
ac617bd0f [CPUFREQ] checkpa... |
475 476 477 |
longhaul_table = kmalloc((numscales + 1) * sizeof(*longhaul_table), GFP_KERNEL); if (!longhaul_table) |
1da177e4c Linux-2.6.12-rc2 |
478 |
return -ENOMEM; |
73e107d4a [CPUFREQ] Longhau... |
479 |
for (j = 0; j < numscales; j++) { |
ac617bd0f [CPUFREQ] checkpa... |
480 |
ratio = mults[j]; |
1da177e4c Linux-2.6.12-rc2 |
481 482 483 484 485 486 487 488 |
if (ratio == -1) continue; if (ratio > maxmult || ratio < minmult) continue; longhaul_table[k].frequency = calc_speed(ratio); longhaul_table[k].index = j; k++; } |
73e107d4a [CPUFREQ] Longhau... |
489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 |
if (k <= 1) { kfree(longhaul_table); return -ENODEV; } /* Sort */ for (j = 0; j < k - 1; j++) { unsigned int min_f, min_i; min_f = longhaul_table[j].frequency; min_i = j; for (i = j + 1; i < k; i++) { if (longhaul_table[i].frequency < min_f) { min_f = longhaul_table[i].frequency; min_i = i; } } if (min_i != j) { |
91420220d [CPUFREQ] Use swa... |
505 506 507 508 |
swap(longhaul_table[j].frequency, longhaul_table[min_i].frequency); swap(longhaul_table[j].index, longhaul_table[min_i].index); |
73e107d4a [CPUFREQ] Longhau... |
509 510 |
} } |
1da177e4c Linux-2.6.12-rc2 |
511 512 |
longhaul_table[k].frequency = CPUFREQ_TABLE_END; |
1da177e4c Linux-2.6.12-rc2 |
513 |
|
73e107d4a [CPUFREQ] Longhau... |
514 515 |
/* Find index we are running on */ for (j = 0; j < k; j++) { |
ac617bd0f [CPUFREQ] checkpa... |
516 |
if (mults[longhaul_table[j].index & 0x1f] == mult) { |
73e107d4a [CPUFREQ] Longhau... |
517 518 519 520 |
longhaul_index = j; break; } } |
1da177e4c Linux-2.6.12-rc2 |
521 522 |
return 0; } |
2530573e4 [CPUFREQ] Fix sec... |
523 |
static void __cpuinit longhaul_setup_voltagescaling(void) |
1da177e4c Linux-2.6.12-rc2 |
524 525 |
{ union msr_longhaul longhaul; |
73e107d4a [CPUFREQ] Longhau... |
526 |
struct mV_pos minvid, maxvid, vid; |
db44aaf3a [CPUFREQ] Longhau... |
527 |
unsigned int j, speed, pos, kHz_step, numvscales; |
348f31ed2 [CPUFREQ] Longhau... |
528 |
int min_vid_speed; |
1da177e4c Linux-2.6.12-rc2 |
529 |
|
db44aaf3a [CPUFREQ] Longhau... |
530 531 532 533 |
rdmsrl(MSR_VIA_LONGHAUL, longhaul.val); if (!(longhaul.bits.RevisionID & 1)) { printk(KERN_INFO PFX "Voltage scaling not supported by CPU. "); |
1da177e4c Linux-2.6.12-rc2 |
534 |
return; |
db44aaf3a [CPUFREQ] Longhau... |
535 536 537 |
} if (!longhaul.bits.VRMRev) { |
73e107d4a [CPUFREQ] Longhau... |
538 539 |
printk(KERN_INFO PFX "VRM 8.5 "); |
db44aaf3a [CPUFREQ] Longhau... |
540 541 542 |
vrm_mV_table = &vrm85_mV[0]; mV_vrm_table = &mV_vrm85[0]; } else { |
73e107d4a [CPUFREQ] Longhau... |
543 544 |
printk(KERN_INFO PFX "Mobile VRM "); |
2b8c0e130 [CPUFREQ] Longhau... |
545 546 |
if (cpu_model < CPU_NEHEMIAH) return; |
db44aaf3a [CPUFREQ] Longhau... |
547 548 549 |
vrm_mV_table = &mobilevrm_mV[0]; mV_vrm_table = &mV_mobilevrm[0]; } |
1da177e4c Linux-2.6.12-rc2 |
550 |
|
db44aaf3a [CPUFREQ] Longhau... |
551 552 |
minvid = vrm_mV_table[longhaul.bits.MinimumVID]; maxvid = vrm_mV_table[longhaul.bits.MaximumVID]; |
1da177e4c Linux-2.6.12-rc2 |
553 |
|
db44aaf3a [CPUFREQ] Longhau... |
554 |
if (minvid.mV == 0 || maxvid.mV == 0 || minvid.mV > maxvid.mV) { |
ac617bd0f [CPUFREQ] checkpa... |
555 |
printk(KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. " |
1da177e4c Linux-2.6.12-rc2 |
556 557 |
"Voltage scaling disabled. ", |
ac617bd0f [CPUFREQ] checkpa... |
558 559 |
minvid.mV/1000, minvid.mV%1000, maxvid.mV/1000, maxvid.mV%1000); |
1da177e4c Linux-2.6.12-rc2 |
560 561 |
return; } |
db44aaf3a [CPUFREQ] Longhau... |
562 |
if (minvid.mV == maxvid.mV) { |
ac617bd0f [CPUFREQ] checkpa... |
563 564 565 566 |
printk(KERN_INFO PFX "Claims to support voltage scaling but " "min & max are both %d.%03d. " "Voltage scaling disabled ", |
db44aaf3a [CPUFREQ] Longhau... |
567 |
maxvid.mV/1000, maxvid.mV%1000); |
1da177e4c Linux-2.6.12-rc2 |
568 569 |
return; } |
ac617bd0f [CPUFREQ] checkpa... |
570 |
/* How many voltage steps*/ |
348f31ed2 [CPUFREQ] Longhau... |
571 572 573 574 575 576 |
numvscales = maxvid.pos - minvid.pos + 1; printk(KERN_INFO PFX "Max VID=%d.%03d " "Min VID=%d.%03d, " "%d possible voltage scales ", |
db44aaf3a [CPUFREQ] Longhau... |
577 578 579 |
maxvid.mV/1000, maxvid.mV%1000, minvid.mV/1000, minvid.mV%1000, numvscales); |
348f31ed2 [CPUFREQ] Longhau... |
580 581 582 583 584 |
/* Calculate max frequency at min voltage */ j = longhaul.bits.MinMHzBR; if (longhaul.bits.MinMHzBR4) j += 16; |
ac617bd0f [CPUFREQ] checkpa... |
585 |
min_vid_speed = eblcr[j]; |
348f31ed2 [CPUFREQ] Longhau... |
586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 |
if (min_vid_speed == -1) return; switch (longhaul.bits.MinMHzFSB) { case 0: min_vid_speed *= 13333; break; case 1: min_vid_speed *= 10000; break; case 3: min_vid_speed *= 6666; break; default: return; break; } if (min_vid_speed >= highest_speed) return; /* Calculate kHz for one voltage step */ kHz_step = (highest_speed - min_vid_speed) / numvscales; |
db44aaf3a [CPUFREQ] Longhau... |
606 607 608 |
j = 0; while (longhaul_table[j].frequency != CPUFREQ_TABLE_END) { speed = longhaul_table[j].frequency; |
348f31ed2 [CPUFREQ] Longhau... |
609 610 611 612 |
if (speed > min_vid_speed) pos = (speed - min_vid_speed) / kHz_step + minvid.pos; else pos = minvid.pos; |
73e107d4a [CPUFREQ] Longhau... |
613 614 |
longhaul_table[j].index |= mV_vrm_table[pos] << 8; vid = vrm_mV_table[mV_vrm_table[pos]]; |
ac617bd0f [CPUFREQ] checkpa... |
615 616 617 |
printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV ", speed, j, vid.mV); |
db44aaf3a [CPUFREQ] Longhau... |
618 |
j++; |
1da177e4c Linux-2.6.12-rc2 |
619 |
} |
1da177e4c Linux-2.6.12-rc2 |
620 |
can_scale_voltage = 1; |
73e107d4a [CPUFREQ] Longhau... |
621 622 |
printk(KERN_INFO PFX "Voltage scaling enabled. "); |
1da177e4c Linux-2.6.12-rc2 |
623 624 625 626 627 628 629 630 631 632 633 634 635 |
} static int longhaul_verify(struct cpufreq_policy *policy) { return cpufreq_frequency_table_verify(policy, longhaul_table); } static int longhaul_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) { unsigned int table_index = 0; |
73e107d4a [CPUFREQ] Longhau... |
636 637 638 |
unsigned int i; unsigned int dir = 0; u8 vid, current_vid; |
1da177e4c Linux-2.6.12-rc2 |
639 |
|
ac617bd0f [CPUFREQ] checkpa... |
640 641 |
if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq, relation, &table_index)) |
1da177e4c Linux-2.6.12-rc2 |
642 |
return -EINVAL; |
73e107d4a [CPUFREQ] Longhau... |
643 644 645 |
/* Don't set same frequency again */ if (longhaul_index == table_index) return 0; |
1da177e4c Linux-2.6.12-rc2 |
646 |
|
73e107d4a [CPUFREQ] Longhau... |
647 648 649 650 651 652 653 654 655 |
if (!can_scale_voltage) longhaul_setstate(table_index); else { /* On test system voltage transitions exceeding single * step up or down were turning motherboard off. Both * "ondemand" and "userspace" are unsafe. C7 is doing * this in hardware, C3 is old and we need to do this * in software. */ i = longhaul_index; |
ac617bd0f [CPUFREQ] checkpa... |
656 657 |
current_vid = (longhaul_table[longhaul_index].index >> 8); current_vid &= 0x1f; |
73e107d4a [CPUFREQ] Longhau... |
658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 |
if (table_index > longhaul_index) dir = 1; while (i != table_index) { vid = (longhaul_table[i].index >> 8) & 0x1f; if (vid != current_vid) { longhaul_setstate(i); current_vid = vid; msleep(200); } if (dir) i++; else i--; } longhaul_setstate(table_index); } longhaul_index = table_index; |
1da177e4c Linux-2.6.12-rc2 |
675 676 677 678 679 680 681 682 683 684 |
return 0; } static unsigned int longhaul_get(unsigned int cpu) { if (cpu) return 0; return calc_speed(longhaul_get_cpu_mult()); } |
c4a96c1eb [CPUFREQ] Make lo... |
685 686 687 |
static acpi_status longhaul_walk_callback(acpi_handle obj_handle, u32 nesting_level, void *context, void **return_value) |
dadb49d87 [CPUFREQ] Longhau... |
688 689 |
{ struct acpi_device *d; |
ac617bd0f [CPUFREQ] checkpa... |
690 |
if (acpi_bus_get_device(obj_handle, &d)) |
dadb49d87 [CPUFREQ] Longhau... |
691 |
return 0; |
ac617bd0f [CPUFREQ] checkpa... |
692 |
|
ade1af771 x86: remove unned... |
693 |
*return_value = acpi_driver_data(d); |
dadb49d87 [CPUFREQ] Longhau... |
694 695 |
return 1; } |
1da177e4c Linux-2.6.12-rc2 |
696 |
|
179da8e6e [CPUFREQ] Longhau... |
697 698 699 700 |
/* VIA don't support PM2 reg, but have something similar */ static int enable_arbiter_disable(void) { struct pci_dev *dev; |
73e107d4a [CPUFREQ] Longhau... |
701 |
int status = 1; |
7f1be8924 [CPUFREQ] Longhau... |
702 |
int reg; |
179da8e6e [CPUFREQ] Longhau... |
703 704 705 |
u8 pci_cmd; /* Find PLE133 host bridge */ |
7f1be8924 [CPUFREQ] Longhau... |
706 |
reg = 0x78; |
fb48e1564 [CPUFREQ] Longhau... |
707 708 |
dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8601_0, NULL); |
a09d60a62 [CPUFREQ] Longhau... |
709 710 711 712 |
/* Find PM133/VT8605 host bridge */ if (dev == NULL) dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8605_0, NULL); |
7f1be8924 [CPUFREQ] Longhau... |
713 714 |
/* Find CLE266 host bridge */ if (dev == NULL) { |
7f1be8924 [CPUFREQ] Longhau... |
715 |
reg = 0x76; |
fb48e1564 [CPUFREQ] Longhau... |
716 717 |
dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_862X_0, NULL); |
db2fb9db5 [CPUFREQ] Longhau... |
718 719 |
/* Find CN400 V-Link host bridge */ if (dev == NULL) |
fb48e1564 [CPUFREQ] Longhau... |
720 |
dev = pci_get_device(PCI_VENDOR_ID_VIA, 0x7259, NULL); |
7f1be8924 [CPUFREQ] Longhau... |
721 |
} |
179da8e6e [CPUFREQ] Longhau... |
722 723 |
if (dev != NULL) { /* Enable access to port 0x22 */ |
7f1be8924 [CPUFREQ] Longhau... |
724 |
pci_read_config_byte(dev, reg, &pci_cmd); |
786f46b26 [CPUFREQ] Longhau... |
725 |
if (!(pci_cmd & 1<<7)) { |
179da8e6e [CPUFREQ] Longhau... |
726 |
pci_cmd |= 1<<7; |
7f1be8924 [CPUFREQ] Longhau... |
727 |
pci_write_config_byte(dev, reg, pci_cmd); |
786f46b26 [CPUFREQ] Longhau... |
728 729 730 731 732 |
pci_read_config_byte(dev, reg, &pci_cmd); if (!(pci_cmd & 1<<7)) { printk(KERN_ERR PFX "Can't enable access to port 0x22. "); |
fb48e1564 [CPUFREQ] Longhau... |
733 |
status = 0; |
786f46b26 [CPUFREQ] Longhau... |
734 |
} |
179da8e6e [CPUFREQ] Longhau... |
735 |
} |
fb48e1564 [CPUFREQ] Longhau... |
736 737 |
pci_dev_put(dev); return status; |
179da8e6e [CPUFREQ] Longhau... |
738 739 740 |
} return 0; } |
7d5edcc02 [CPUFREQ] Longhau... |
741 |
static int longhaul_setup_southbridge(void) |
786f46b26 [CPUFREQ] Longhau... |
742 743 744 745 746 |
{ struct pci_dev *dev; u8 pci_cmd; /* Find VT8235 southbridge */ |
fb48e1564 [CPUFREQ] Longhau... |
747 |
dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, NULL); |
920dd0fbb [CPUFREQ] Longhau... |
748 |
if (dev == NULL) |
ac617bd0f [CPUFREQ] checkpa... |
749 |
/* Find VT8237 southbridge */ |
920dd0fbb [CPUFREQ] Longhau... |
750 751 |
dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, NULL); |
786f46b26 [CPUFREQ] Longhau... |
752 753 754 755 756 757 758 759 760 761 762 |
if (dev != NULL) { /* Set transition time to max */ pci_read_config_byte(dev, 0xec, &pci_cmd); pci_cmd &= ~(1 << 2); pci_write_config_byte(dev, 0xec, pci_cmd); pci_read_config_byte(dev, 0xe4, &pci_cmd); pci_cmd &= ~(1 << 7); pci_write_config_byte(dev, 0xe4, pci_cmd); pci_read_config_byte(dev, 0xe5, &pci_cmd); pci_cmd |= 1 << 7; pci_write_config_byte(dev, 0xe5, pci_cmd); |
275bc6b7f [CPUFREQ] Longhau... |
763 764 765 766 767 |
/* Get address of ACPI registers block*/ pci_read_config_byte(dev, 0x81, &pci_cmd); if (pci_cmd & 1 << 7) { pci_read_config_dword(dev, 0x88, &acpi_regs_addr); acpi_regs_addr &= 0xff00; |
ac617bd0f [CPUFREQ] checkpa... |
768 769 770 |
printk(KERN_INFO PFX "ACPI I/O at 0x%x ", acpi_regs_addr); |
275bc6b7f [CPUFREQ] Longhau... |
771 |
} |
fb48e1564 [CPUFREQ] Longhau... |
772 |
pci_dev_put(dev); |
786f46b26 [CPUFREQ] Longhau... |
773 774 775 776 |
return 1; } return 0; } |
2530573e4 [CPUFREQ] Fix sec... |
777 |
static int __cpuinit longhaul_cpu_init(struct cpufreq_policy *policy) |
1da177e4c Linux-2.6.12-rc2 |
778 |
{ |
92cb7612a x86: convert cpui... |
779 |
struct cpuinfo_x86 *c = &cpu_data(0); |
ac617bd0f [CPUFREQ] checkpa... |
780 |
char *cpuname = NULL; |
1da177e4c Linux-2.6.12-rc2 |
781 |
int ret; |
2b8c0e130 [CPUFREQ] Longhau... |
782 |
u32 lo, hi; |
1da177e4c Linux-2.6.12-rc2 |
783 |
|
179da8e6e [CPUFREQ] Longhau... |
784 |
/* Check what we have on this motherboard */ |
1da177e4c Linux-2.6.12-rc2 |
785 786 787 788 789 |
switch (c->x86_model) { case 6: cpu_model = CPU_SAMUEL; cpuname = "C3 'Samuel' [C5A]"; longhaul_version = TYPE_LONGHAUL_V1; |
ac617bd0f [CPUFREQ] checkpa... |
790 791 |
memcpy(mults, samuel1_mults, sizeof(samuel1_mults)); memcpy(eblcr, samuel1_eblcr, sizeof(samuel1_eblcr)); |
1da177e4c Linux-2.6.12-rc2 |
792 793 794 |
break; case 7: |
1da177e4c Linux-2.6.12-rc2 |
795 796 |
switch (c->x86_mask) { case 0: |
2b8c0e130 [CPUFREQ] Longhau... |
797 |
longhaul_version = TYPE_LONGHAUL_V1; |
1da177e4c Linux-2.6.12-rc2 |
798 799 |
cpu_model = CPU_SAMUEL2; cpuname = "C3 'Samuel 2' [C5B]"; |
2b8c0e130 [CPUFREQ] Longhau... |
800 801 |
/* Note, this is not a typo, early Samuel2's had * Samuel1 ratios. */ |
ac617bd0f [CPUFREQ] checkpa... |
802 803 |
memcpy(mults, samuel1_mults, sizeof(samuel1_mults)); memcpy(eblcr, samuel2_eblcr, sizeof(samuel2_eblcr)); |
1da177e4c Linux-2.6.12-rc2 |
804 805 |
break; case 1 ... 15: |
f7f3cad06 [CPUFREQ] longhau... |
806 |
longhaul_version = TYPE_LONGHAUL_V2; |
1da177e4c Linux-2.6.12-rc2 |
807 808 809 810 811 812 813 |
if (c->x86_mask < 8) { cpu_model = CPU_SAMUEL2; cpuname = "C3 'Samuel 2' [C5B]"; } else { cpu_model = CPU_EZRA; cpuname = "C3 'Ezra' [C5C]"; } |
ac617bd0f [CPUFREQ] checkpa... |
814 815 |
memcpy(mults, ezra_mults, sizeof(ezra_mults)); memcpy(eblcr, ezra_eblcr, sizeof(ezra_eblcr)); |
1da177e4c Linux-2.6.12-rc2 |
816 817 818 819 820 821 822 823 |
break; } break; case 8: cpu_model = CPU_EZRA_T; cpuname = "C3 'Ezra-T' [C5M]"; longhaul_version = TYPE_POWERSAVER; |
ac617bd0f [CPUFREQ] checkpa... |
824 825 826 |
numscales = 32; memcpy(mults, ezrat_mults, sizeof(ezrat_mults)); memcpy(eblcr, ezrat_eblcr, sizeof(ezrat_eblcr)); |
1da177e4c Linux-2.6.12-rc2 |
827 828 829 |
break; case 9: |
1da177e4c Linux-2.6.12-rc2 |
830 |
longhaul_version = TYPE_POWERSAVER; |
0d44b2ba2 [CPUFREQ] Longhau... |
831 |
numscales = 32; |
ac617bd0f [CPUFREQ] checkpa... |
832 833 |
memcpy(mults, nehemiah_mults, sizeof(nehemiah_mults)); memcpy(eblcr, nehemiah_eblcr, sizeof(nehemiah_eblcr)); |
1da177e4c Linux-2.6.12-rc2 |
834 835 |
switch (c->x86_mask) { case 0 ... 1: |
980342a7e [CPUFREQ] Longhau... |
836 |
cpu_model = CPU_NEHEMIAH; |
e57501c15 [CPUFREQ] Longhau... |
837 |
cpuname = "C3 'Nehemiah A' [C5XLOE]"; |
1da177e4c Linux-2.6.12-rc2 |
838 839 |
break; case 2 ... 4: |
980342a7e [CPUFREQ] Longhau... |
840 |
cpu_model = CPU_NEHEMIAH; |
e57501c15 [CPUFREQ] Longhau... |
841 |
cpuname = "C3 'Nehemiah B' [C5XLOH]"; |
1da177e4c Linux-2.6.12-rc2 |
842 843 |
break; case 5 ... 15: |
980342a7e [CPUFREQ] Longhau... |
844 |
cpu_model = CPU_NEHEMIAH_C; |
e57501c15 [CPUFREQ] Longhau... |
845 |
cpuname = "C3 'Nehemiah C' [C5P]"; |
1da177e4c Linux-2.6.12-rc2 |
846 847 848 849 850 851 852 853 |
break; } break; default: cpuname = "Unknown"; break; } |
2b8c0e130 [CPUFREQ] Longhau... |
854 855 856 857 858 859 860 |
/* Check Longhaul ver. 2 */ if (longhaul_version == TYPE_LONGHAUL_V2) { rdmsr(MSR_VIA_LONGHAUL, lo, hi); if (lo == 0 && hi == 0) /* Looks like MSR isn't present */ longhaul_version = TYPE_LONGHAUL_V1; } |
1da177e4c Linux-2.6.12-rc2 |
861 |
|
ac617bd0f [CPUFREQ] checkpa... |
862 |
printk(KERN_INFO PFX "VIA %s CPU detected. ", cpuname); |
1da177e4c Linux-2.6.12-rc2 |
863 864 865 |
switch (longhaul_version) { case TYPE_LONGHAUL_V1: case TYPE_LONGHAUL_V2: |
ac617bd0f [CPUFREQ] checkpa... |
866 867 |
printk(KERN_CONT "Longhaul v%d supported. ", longhaul_version); |
1da177e4c Linux-2.6.12-rc2 |
868 869 |
break; case TYPE_POWERSAVER: |
ac617bd0f [CPUFREQ] checkpa... |
870 871 |
printk(KERN_CONT "Powersaver supported. "); |
1da177e4c Linux-2.6.12-rc2 |
872 873 |
break; }; |
786f46b26 [CPUFREQ] Longhau... |
874 |
/* Doesn't hurt */ |
7d5edcc02 [CPUFREQ] Longhau... |
875 |
longhaul_setup_southbridge(); |
786f46b26 [CPUFREQ] Longhau... |
876 |
|
179da8e6e [CPUFREQ] Longhau... |
877 |
/* Find ACPI data for processor */ |
786f46b26 [CPUFREQ] Longhau... |
878 |
acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, |
2263576cf ACPICA: Add post-... |
879 |
ACPI_UINT32_MAX, &longhaul_walk_callback, NULL, |
786f46b26 [CPUFREQ] Longhau... |
880 |
NULL, (void *)&pr); |
179da8e6e [CPUFREQ] Longhau... |
881 |
|
264166e60 [CPUFREQ] Longhau... |
882 |
/* Check ACPI support for C3 state */ |
7ab77e03c Longhaul - Revert... |
883 |
if (pr != NULL && longhaul_version == TYPE_POWERSAVER) { |
179da8e6e [CPUFREQ] Longhau... |
884 |
cx = &pr->power.states[ACPI_STATE_C3]; |
7d5edcc02 [CPUFREQ] Longhau... |
885 |
if (cx->address > 0 && cx->latency <= 1000) |
264166e60 [CPUFREQ] Longhau... |
886 |
longhaul_flags |= USE_ACPI_C3; |
eed7d4125 [CPUFREQ] longhau... |
887 |
} |
905497c4b [CPUFREQ] Longhau... |
888 889 890 |
/* Disable if it isn't working */ if (disable_acpi_c3) longhaul_flags &= ~USE_ACPI_C3; |
264166e60 [CPUFREQ] Longhau... |
891 |
/* Check if northbridge is friendly */ |
7d5edcc02 [CPUFREQ] Longhau... |
892 |
if (enable_arbiter_disable()) |
264166e60 [CPUFREQ] Longhau... |
893 |
longhaul_flags |= USE_NORTHBRIDGE; |
7d5edcc02 [CPUFREQ] Longhau... |
894 |
|
eed7d4125 [CPUFREQ] longhau... |
895 |
/* Check ACPI support for bus master arbiter disable */ |
7d5edcc02 [CPUFREQ] Longhau... |
896 897 898 |
if (!(longhaul_flags & USE_ACPI_C3 || longhaul_flags & USE_NORTHBRIDGE) && ((pr == NULL) || !(pr->flags.bm_control))) { |
264166e60 [CPUFREQ] Longhau... |
899 900 901 902 |
printk(KERN_ERR PFX "No ACPI support. Unsupported northbridge. "); return -ENODEV; |
179da8e6e [CPUFREQ] Longhau... |
903 |
} |
264166e60 [CPUFREQ] Longhau... |
904 |
|
786f46b26 [CPUFREQ] Longhau... |
905 |
if (longhaul_flags & USE_NORTHBRIDGE) |
7d5edcc02 [CPUFREQ] Longhau... |
906 907 908 909 910 |
printk(KERN_INFO PFX "Using northbridge support. "); if (longhaul_flags & USE_ACPI_C3) printk(KERN_INFO PFX "Using ACPI support. "); |
179da8e6e [CPUFREQ] Longhau... |
911 |
|
1da177e4c Linux-2.6.12-rc2 |
912 913 914 |
ret = longhaul_get_ranges(); if (ret != 0) return ret; |
786f46b26 [CPUFREQ] Longhau... |
915 |
if ((longhaul_version != TYPE_LONGHAUL_V1) && (scale_voltage != 0)) |
1da177e4c Linux-2.6.12-rc2 |
916 |
longhaul_setup_voltagescaling(); |
6778bae0f [CPUFREQ] longhau... |
917 |
policy->cpuinfo.transition_latency = 200000; /* nsec */ |
1da177e4c Linux-2.6.12-rc2 |
918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 |
policy->cur = calc_speed(longhaul_get_cpu_mult()); ret = cpufreq_frequency_table_cpuinfo(policy, longhaul_table); if (ret) return ret; cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu); return 0; } static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy) { cpufreq_frequency_table_put_attr(policy->cpu); return 0; } |
ac617bd0f [CPUFREQ] checkpa... |
934 |
static struct freq_attr *longhaul_attr[] = { |
1da177e4c Linux-2.6.12-rc2 |
935 936 937 |
&cpufreq_freq_attr_scaling_available_freqs, NULL, }; |
221dee285 Revert "[CPUFREQ]... |
938 |
static struct cpufreq_driver longhaul_driver = { |
1da177e4c Linux-2.6.12-rc2 |
939 940 941 942 943 944 945 946 947 948 949 950 951 |
.verify = longhaul_verify, .target = longhaul_target, .get = longhaul_get, .init = longhaul_cpu_init, .exit = __devexit_p(longhaul_cpu_exit), .name = "longhaul", .owner = THIS_MODULE, .attr = longhaul_attr, }; static int __init longhaul_init(void) { |
92cb7612a x86: convert cpui... |
952 |
struct cpuinfo_x86 *c = &cpu_data(0); |
1da177e4c Linux-2.6.12-rc2 |
953 954 955 |
if (c->x86_vendor != X86_VENDOR_CENTAUR || c->x86 != 6) return -ENODEV; |
48b7bde0f [CPUFREQ] Longhau... |
956 957 |
#ifdef CONFIG_SMP if (num_online_cpus() > 1) { |
ac617bd0f [CPUFREQ] checkpa... |
958 959 960 |
printk(KERN_ERR PFX "More than 1 CPU detected, " "longhaul disabled. "); |
1cfe20142 [CPUFREQ] longhau... |
961 |
return -ENODEV; |
48b7bde0f [CPUFREQ] Longhau... |
962 963 964 965 |
} #endif #ifdef CONFIG_X86_IO_APIC if (cpu_has_apic) { |
ac617bd0f [CPUFREQ] checkpa... |
966 967 968 |
printk(KERN_ERR PFX "APIC detected. Longhaul is currently " "broken in this configuration. "); |
48b7bde0f [CPUFREQ] Longhau... |
969 970 971 |
return -ENODEV; } #endif |
1da177e4c Linux-2.6.12-rc2 |
972 973 974 |
switch (c->x86_model) { case 6 ... 9: return cpufreq_register_driver(&longhaul_driver); |
8ec9822dd [CPUFREQ] Advise ... |
975 976 977 |
case 10: printk(KERN_ERR PFX "Use acpi-cpufreq driver for VIA C7 "); |
1da177e4c Linux-2.6.12-rc2 |
978 |
default: |
c19a28e11 remove lots of do... |
979 |
; |
1da177e4c Linux-2.6.12-rc2 |
980 981 982 983 984 985 986 987 |
} return -ENODEV; } static void __exit longhaul_exit(void) { |
8eebf1a4c [CPUFREQ] Remove ... |
988 |
int i; |
1da177e4c Linux-2.6.12-rc2 |
989 |
|
ac617bd0f [CPUFREQ] checkpa... |
990 991 |
for (i = 0; i < numscales; i++) { if (mults[i] == maxmult) { |
1da177e4c Linux-2.6.12-rc2 |
992 993 994 995 996 997 998 999 |
longhaul_setstate(i); break; } } cpufreq_unregister_driver(&longhaul_driver); kfree(longhaul_table); } |
52a2638bf Longhaul: add aut... |
1000 1001 1002 |
/* Even if BIOS is exporting ACPI C3 state, and it is used * with success when CPU is idle, this state doesn't * trigger frequency transition in some cases. */ |
ac617bd0f [CPUFREQ] checkpa... |
1003 |
module_param(disable_acpi_c3, int, 0644); |
905497c4b [CPUFREQ] Longhau... |
1004 |
MODULE_PARM_DESC(disable_acpi_c3, "Don't use ACPI C3 support"); |
0d2eb44f6 x86: Fix common m... |
1005 |
/* Change CPU voltage with frequency. Very useful to save |
52a2638bf Longhaul: add aut... |
1006 |
* power, but most VIA C3 processors aren't supporting it. */ |
ac617bd0f [CPUFREQ] checkpa... |
1007 |
module_param(scale_voltage, int, 0644); |
db44aaf3a [CPUFREQ] Longhau... |
1008 |
MODULE_PARM_DESC(scale_voltage, "Scale voltage of processor"); |
52a2638bf Longhaul: add aut... |
1009 1010 1011 1012 1013 |
/* Force revision key to 0 for processors which doesn't * support voltage scaling, but are introducing itself as * such. */ module_param(revid_errata, int, 0644); MODULE_PARM_DESC(revid_errata, "Ignore CPU Revision ID"); |
1da177e4c Linux-2.6.12-rc2 |
1014 |
|
ac617bd0f [CPUFREQ] checkpa... |
1015 1016 1017 |
MODULE_AUTHOR("Dave Jones <davej@redhat.com>"); MODULE_DESCRIPTION("Longhaul driver for VIA Cyrix processors."); MODULE_LICENSE("GPL"); |
1da177e4c Linux-2.6.12-rc2 |
1018 |
|
0d6daba5f [CPUFREQ] Longhau... |
1019 |
late_initcall(longhaul_init); |
1da177e4c Linux-2.6.12-rc2 |
1020 |
module_exit(longhaul_exit); |